Chapter 13-Processes for

Electronic Products
Presenter John Patrick Quia Perez Part 3
K. Integrated Circuits (ICs)
(Microcircuits or Chips)
Integrated circuits are electronic circuits in
micro- miniature size, existing on a single
piece of silicon, germanium, gallium arsenide,
or inert material (glass or ceramic) containing
up to tens of millions of transistors and other
devices (diodes, resistors, capacitors).
K1. material preparation - making ultra-pure
silicon5

Quartzite (chiefly silicon dioxide, SiO2), coke,

coal and wood chips (to supply carbon), are
Processes for Electronic Products 551placed in
the crucible of a submerged electric-arc
furnace (See 1A2.).
K2. making a single crystal of
silicon
Most single crystal silicon is grown by the
Czochralski (CZ) method. The rods of
electronic grade silicon are broken up, loaded
into a large crucible and melted at a
temperature of 2580°F (1415°C).
K2a. slicing into wafers
The boule, after it has reached the desired
diameter and length, is removed from the
crucible. It is checked for physical defects by
etching, for proper doping by making
resistivity measurements, and for crystal
orientation.
K2b. polishing the wafers
The surface of the wafers must be extremely flat and smooth, far flatter and
smoother than the surface resulting from sawing.
K2c. other wafer preparation
operations12
The edges of the wafers are rounded to minimize the possibility of edge chipping or
other damage to the wafer during further processing
K3. wafer fab
is the name given to the series of operations that create semiconductor devices on
and in the wafer surface.
• Layering - processes that add thin layers of material to the wafer surface.
• patterning - a series of processes that removes portions of surface material so
that a layer on the wafer incorporates microcircuit elements.
• doping - operations that change the electrical conductivity, usually in localized
areas of the wafer surface.
• heat treatments - heating operations that make physical changes in the wafer
material.
K3a. layering
There are two basically different ways of providing layers in integrated circuits.
Grown layers are made by chemical reaction with the existing surface material to
create a surface layer of a different compound. Oxidation and nitridation are two
processes used to grow new layers by chemical reaction.
K3a1. oxidation of silicon
creates a grown layer of silicon dioxide. This oxide layer has many possible uses. It
is a dielectric and is used to electrically separate the circuits on different layers, to
provide a dielectric in circuits, and to passivate the surface of the wafer, that is, to
provide a protective coating to guard semiconductor surfaces against physical
damage, chemical contaminants, and dirt particles.
K3a2. nitridation
- Some transistors utilize a thin gate oxide of 100Å or less in thickness.
K3a3. chemical vapor deposition (CVD)
Chemical vapor deposition is a gas-phase process discussed in Chapter 8, section
F3b. Most integrated circuit films are produced by a CVD method.
K3a3a. epitaxy
is the process of growing a single crystal, layer by layer, on the flat surface of
another single crystal.
K3a4. vacuum deposition
The material is evaporated in a vacuum, often by electron beam, and the vapor
condenses as a film on the wafer surface.
K3a5. sputtering
Sputtering is another vacuum method and is used for metals, alloys, semiconductor
materials, and dielectrics, including glass.
K3a6. adding thick films
involves the printing and then firing of a coating on a substrate material.
K3a7. adding protective layers
Layers of silicon dioxide or silicon nitride are added to provide insulation between
devices on the integrated surface and to provide protection to the existing layers.
K3b. patterning
is the series of operations that incorporates the circuit layout from a photomask or
reticle into the surfaces of the wafer.
K3b1. lithography
is a means for etching patterns in integrated circuit surfaces corresponding to the
elements of the integrated circuit.
K3b1a. making masks
A unique photomask, which delineates the circuit layout, is made for each layer of
the chip.
K3b1b. applying resist (photoresist
film)
Application of the photoresist involves three steps: 1) priming the wafer surface. 2)
applying the resist in a uniform coating, 3) soft baking the photoresist.
K3b1c. expose and develop the resist
glass mask or reticle, carrying the desired circuit pattern for each chip, is used in a
precision optical device to project an image of the circuit on one small area of the
wafer.
K3b2. etching
After the resist is developed and the developed portion removed, the substrate (or
film on the substrate) may be etched in those areas not covered by resist.
K3b2a. wet etching with liquid
etchants (wet chemical etching)
The etchant is applied by immersion of the wafer in etchant solution or by spraying.
K3b2b. dry etching
includes plasma etching, ion beam etching and reactive ion etching.
K3b2b1. plasma etching
The plasma, a low-pressure body of neutral ionized gas, is produced for integrated
circuit etching by applying radio-frequency energy to gas contained in a vacuum
chamber of approximately 10−3 atmospheres (102 Pa).9
K3b2b2. ion beam etching (sputter
etching or ion milling)
is a physical process in contrast to the chemical nature of plasma etching.
K3b2b3. reactive ion etching
(RIE)
is a combination process involving elements of both plasma and ion beam etching.
K3b3.stripping photoresist from
wafers
The photoresist film is removed after etching, since it has served its purpose of
limiting the etching to the desired areas. The film is also removed after ion
implantation.
K3c. doping (dopant defusion)
selectively changes the electrical conductivity of the semiconductor materials
(silicon, germanium, gallium arsenide).
K3d. heat treating
The wafer is heated to produce effects or changes in the wafer material.
K3d1. annealing
is a heating operation performed after doping by ion implantation.
K3d2. alloying
is a heat treatment operation that takes place after metallic layers have been
deposited and patterned into the wafer.
K4. wafer testing and sorting
After all the circuitry has been incorporated in the wafer, each individual die is
tested to verify the circuit function and that the die meets all other design
specifications.
K5. packaging (assembly) of chips
The purpose of packaging (after the die is separated from the wafer) is to provide
strong leads for easy connection of the chip to a circuit, to protect the chip from
physical damage and exposure to reactive environments, and to dissipate heat.
K5a. backside preparation12
Some chips that are to be used in thin packages or those that have some backside
junctions or damage are reduced in thickness in the wafer state.
K5b. dicing (die separation)
- Individual dies are separated from wafers by one of two methods: sawing, or
scribing and breaking.
K5c. chip insertion and fastening to
the package
Chips separated from the wafer are placed, with others, on a carrier tray called a
plate.
K5d. wire bonding
is a means of providing an electrical connection between a wire and a contact
surface
K5e. closing and sealing the package
After the wiring connections are made between the chip and the leads of the
package, a metal, ceramic, or plastic enclosure is assembled over the chip and
wires, and is sealed.
K5f. lead plating and trimming12
After the package is assembled and sealed, the external leads are coated with
solder, tin, or gold to promote solderability when the IC is connected to the circuit
board and to provide corrosion protection.
K5g. marking and final testing12
The finished IC is marked by laser etching, or by ink-jet or offset printing.
K6. other methods
of connecting the
integrated
circuit to the
board
K6a. chip on board (COB) technology
refers to the procedure of attaching integrated circuit leads directly to the circuit
board.
K6b. conductive adhesive connections
are made from one-part, quick setting epoxy, containing small flakes of silver to
provide conductive paths.
K6c. tape automated bonding (TAB)
is a means of electrically connecting chips to circuit boards, other substrates or
packages.
K6d. flip-chips
constitute a method for connecting integrated circuits to printed circuit boards
with no wire leads and very short connections.
L. Making Discrete Devices
Transistors, diodes, resistors, capacitors, inductors, and transformers are all
included, where necessary, in integrated circuits. However, there are circuits in
electronic products that need power handling capabilities, or other capacities
greater or different than those normally included in integrated circuits.
L1. making resistors
Resistors are of several varieties: composition, film, wire-wound, or integrated
circuit.
L2. making capacitors
Electronic capacitors have two or more electrodes separated by some dielectric.
L3. making inductors (chokes, choke
coils)
These are electrical or electronic devices that tend to oppose rapid changes in
current intensity.
L4. making transformers
Transformers convey energy from one circuit to another, usually stepping AC
voltage up or down at the same time.
L5. making discrete transistors and
diodes
Transistors and diodes are solid-state electronic devices made from single-crystal
semiconductor materials, usually silicon or other semiconductor materials
containing gallium, aluminum, and arsenic.
M. Conformal Coatings
Conformal coatings are applied to an entire printed circuit board after all traces and
devices on the board are soldered.
N. Other Chip
Configurations
N1. multiple integrated circuit packages (multichip
devices, assemblies, modules [MCM], system in a
package (SIP) or packages)
involve the assembly, in one protective package, of several integrated circuit chips
(unpackaged) and, optionally, some other components connected on one
substrate.
Thank You For Listening, Have a
Blessed Day!!! 