Lecture 6: Instruction Set

Architecture

Computer Engineering 585

Fall 2001
 Costs of misalignment
Memory Multiplexor
3 addr bits: a3, a2, a1
a3=0 a3=1

0 1 2 3 at addr:
Word 4 2 5 6 7

a2=0 a2=1
Data Alignment Network
Internal bus/reg file

memory port
 Addressing Modes
Addr mode Example inst Meaning
Register Add R4,R3 R[R4] RRR[R3]
Immediate Add R4,#3 R[R4]  R[R4]+3 constants.

Displacement Add R4,100(R1) R[R4] RRR[R1]] local var.
Reg deferred Add R4,(R1) R[R4] RRR[R1]] pointer

Indexed Add R3,(R1 + R2) R[R3] RRR[R1]+R[R2]]

Direct Add R1,(1001) R[R1] RR1001] static data

Mem indirect Add R1,@(R3) R[R1] RRRR3]]] .
*p
R[R1] RRR[R2]]
Autoincrement Add R1,(R2)+ Array access
R[R2] RRd
.

Auto- R[R2] RRd

Add R1,-(R2)
decrement R[R1]
Add RRR[R2]]
R[R1] index arrays
Scaled
R1,100(R2)[R3] RRR[R2]+
R[R3]d]
 Addressing Modes Design Issues
• an appropriate choice leads to compact code.e.g. where a
small constant is needed, keep it in a memory location and then
load it into a register vs the use of immediate addr mode.

• should choose the sizes of various addr mode fields judiciously.

e.g. a 32-bit immediate loses all its advantages!

• program-mix should be used to dictate these decisions:

 addr modes: which addr modes should be supported?
 displacement size: how large a displacement should be
allowed?
 immediate size: how large an immediate value should be
allowed?
Some are architecture independent (immediate size distribution
while some are architecture/compiler dependent (use of
different addressing modes).
 Addressing Modes Usage
TeX# 1%
Memory indirect spice# 6%
gcc 1%

TeX# 0%
Scaled spice# 16%
gcc 6%

TeX# 24%
Register deferred spice# 3%
gcc 11%

TeX# 43%
Immediate spice# 17%
gcc 39%

TeX# 32%
Displacement spice# 55%
gcc 40%

0% 10% 20% 30% 40% 50% 60%

Frequency of the addressing mode

Register mode: 50%, Displacement: 8, 16, 32-bits, on a VAX

FIGURE 2.6 Summary of use of memory addressing modes (including immediates).
 Displacement Distribution
30%

Integer average
25%

Floating-point average
20%
Percentage of #
displacement
15%

10%

5%

0%
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Value

MIPS, avg of SPEC92, majority of 14+ bits –ve, 1% above 15 bits

FIGURE 2.7 Displacement values are widely distributed.
 Immediates vs Inst. class
Loads 10%
45%

Compares 87%
77%

ALU operations 58%

78%

35%
All instructions
10%

0% 50% 100%
Percentage of operations that use immediates

Integer average# Floating-point average#

# #

DLX: constant shifts-ALU, compare-0 included

FIGURE 2.8 We see that for integer ALU operations about one-half to three-
quarters of the operations have an immediate operand, while for integer compares
75% to 85% of the occurrences use an immediate operand.
 Immediates Distribution
60%

50% gcc

40%

30%
TeX
20%

spice
10%

0%
0 4 8 12 16# 20 24 28 32
Number of bits needed for an immediate value#
#

Vax: 6% < -ve; 50-70% -- 8bits; 75-80% -- 16bits

FIGURE 2.9 The distribution of immediate values is shown.
Addressing Modes Summary
 50% Register; 22% Displacement; 17%
Immediate; 6.3% Register indirect;
3.6% scaled.
 Displacement: 12-bits capture 75%; 16-
bits capture 99% of displacements.
 Immediates: 8-bits capture 50%; 16-
bits capture 80% of immediate values.
 Instruction Set Operations
Operator type Examples
Arithmetic and logical
Int arith & logical operations: add, and, subtract, or
Data transfer Loads-stores (move instructions)

Control Branch, jump, procedure call and return, traps

System Operating system call, virtual memory management instructions

Floating point Floating-point operations: add, multiply

Decimal Decimal add, decimal multiply, decimal-to-character conversions

String String move, string compare, string search

Graphics Pixel operations, compression/decompression operations

Instruction Set Operations

 Which operations should be supported?

 How should the operations of a given
class be encoded, say ALU operations?
 Again, program-mix should be used to
dictate these decisions
 Instruction-Mix: X86
Integer average
Rank 80x86 instruction (% total executed)
1 load 22%
2 conditional branch 20%
3 compare 16%
4 store 12%
5 add 8%
6 and 6%
7 sub 5%
8 move register-register 4%
9 call 1%
10 return 1%
Total 96%
FIGURE 2.11 The top 10 instructions for the 80x86.
 Control Flow Instructions
 Cond. Branches, jumps, procedure call/return
 Branch instruction:
while C do if C then for I=x to y do

endwhile endif endfor

eval C eval C I=x

Br ¬C, +N Br ¬C, +N Br I==y, +N
PC-relative Branches: PC+N