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10/8/2015
TMS320C54xx Internal Block Diagram
• Memory Access
– 4 16 bit internal bus pairs
– C,D for data read
– E for data write
– P for program
• Others
– 2 40-bit Accumulator.
– 40-bit Barrel shifter
– 40-bit ALU
– 17bx17b multiplier and 40b dedicated adder perform a non
pipelined single-cycle MAC
– Compare, select and store unit
– Exponent adder
– DAGEN and PAGEN
Status register
Temporary register
12/8/2015
Functional diagram of Barrel shifter
Functional diagram of multiplier/adder unit
14/8/2015
Internal memory mapped (CPU) registers
Peripheral registers
Processor mode status register(PMST)
• Data addressing modes
17/8/2015
Immediate and Accumulator Addressing
19/8/2015
EE201A, Spring 2003, Yung-Szu Tu, Chun- Example 5.1 20
Ching, UCLA - Memory Addressing
Indirect addressing (cont’d)
Example 5.2,5.3
EE201A, Spring 2003, Yung-Szu Tu, Chun-
23
Ching, UCLA - Memory Addressing
Indirect addressing (cont’d)
• Bit-Reversed Address Modifications (MOD=4
or 7) N N- 1
2 2
– Enhances execution speed and program memory for FFT algorithms that use a
variety of radixes
24/8/2015
Example 5.4,5.5
• Program Control
It contains program counter (PC), the program counter related H/W, hard
stack, repeat counters &status registers.
PC addresses memory in several ways namely:
Branch: The PC is loaded with the immediate value following the branch
instruction
Subroutine call: The PC is loaded with the immediate value following the
call instruction
Interrupt: The PC is loaded with the address of the appropriate interrupt
vector.
Instructions such as BACC, CALA, etc ;The PC is loaded with the
contents of the accumulator low word
End of a block repeat loop: The PC is loaded with the contents of the block
repeat program address start register.
Return: The PC is loaded from the top of the stack.