CHARGE SHARING

K.Harshavardhan
19021D6802
M.Tech(VLSI & ES)
CHARGE SHARING AND
CHARGE LEAKAGE
PROBLEMS
Charge sharing problems are approached by adjusting the layout dimensions, and
perhaps restructuring the logic functions if necessary.

The ability to maintain the charge on the internal nodes (Cx) is crucial for the
proper operation of a domino design
Let us examine one aspect of the problem using the circuit shown below

The critical node is identified as having a voltage Vx.

 Since this acts as the input voltage to the inverter consisting of Mp1 and Mn1, we may
construct the DC voltage transfer curve shown in the upper portion of Figure(b).
The dynamics of the problem are indicated by the plot of in the lower portion of the same
drawing. This shows decaying in time due first to charge sharing, and then because of charge
leakage.
The objective of the circuit design at this point is to keep low as long as possible.
With regards to the to the VTC, this means that we want to keep Vx>ViH since this defines the
maximum hold time identified as Tmax in the figure(b).
Since charge leakage problems can lead to errors, it is often worthwhile to provide additional
circuitry to combat the problem.
The circuit in Figure below uses a pFET MX to provide charge to Cx to overcome charge
leakage effects. MX is biased into conduction by grounding the gate.
An improved design is obtained by using a feedback loop to control the conduction of the pFET.
This results in the “charge-keeper” circuit shown in Figure below.

 In this circuit, MX is biased by the output voltage Vout. When Vout is low, then the gate of MX
is at 0v, and Idx flows if Vdd-Vx>0 is to help maintain charge on Cx. If a discharge occurs, then
Vx falls towards 0v, and the gate voltage on the pFET will eventually change to Vout=Vdd. This
drives MX into cutoff and allows the rest of the discharge to proceed without any hinderance.
THANK YOU