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FLOATING POINT MULTIPLICATION

J Component Project FPGA


Guide name
Dr. Prathibha A

Group Members
Sirsa Das – 21MVD1011
Chandrima Chowdhury Ghosh Roy -21MVD1026
Debdatta Praharaj-21MVD1027
BASE PAPER
Implementation for Multiplying IEEE 754-2008 Binary 32 Bit
Number Using Verilog

Amit Kumar, Snehprabha Lad Date of Conference: 14-16 Nov. 2014Date Added to IEEE
Xplore: 26 March 2015ISBN Information:INSPEC Accession Number: 15021447DOI:
10.1109/CICN.2014.213Publisher: IEEEConference Location: Bhopal, India
Floating point Multiplication

Let two numbers :


X=M1*2^a
Y=M2*2^b
Multiplication of pair of two floating point numbers are represented as
X*Y=(M1*M2)*2^(a+b)
STEPS INVOLVED

• Compute the exponent of the product by adding the


exponents together.
• Multiply two mantissas.
• Normalize and round off the final product .
BLOCK DIAGRAM
EXAMPLE
• Given, A = 1.11 x 2^0 and B = 1.01 x 2^2
• So, exponent c = a + b = 0 + 2 = 2 is the resulting exponent.
• Now, multiply 1.11 by 1.01, so result will be 10.0011
• Resulting sign bit 0 (XOR) 0 = 0, means positive.
• Now, normalise it 10.0011 ×2 ^2 to 1.000 x 2^3.
DESIGN ENTITY
• ADDER
• MULTIPLIER
• XOR GATE
• SHIFT REGISTER
TOOL USED
THANK YOU

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