Indian Institute of Technology Guwahati

Electronics and Electrical Engineering Department

Mid – Semester Examination

EE 213M : Digital Circuits Semester: Jan – May 2022

Date: 6th March 2022 Time : 9.00 AM – 11.00 AM

Instructions:

1. Solve any number of questions for a maximum total of 30 marks only.

2. Upload your answers in one pdf file only. Do write your name and roll no on your
answer sheets.
3. Students can solve the questions until 11 AM. At 11.00 o’clock, they should stop
writing and start uploading their work. 20 extra minutes will be assigned for uploading
the answers. Submission window will close at 11.20 AM automatically.

Q 1. What is the minimum number of two-input NAND gates required to implement the
following

F (A,B,C) = A + AB + ABC

Justify your answer. [1 mark]

Q 2. Select the correct statement(s): [1 mark]

(a) A binary subtractor can be seen as a complementor + binary adder

(b) We have a 4 bit binary adder/subtractor IC at hand. It can be used to subtract decimal
numbers 15 – 10.
(c) We can add decimal numbers 6 and 3 with this 4 bit binary adder/subtractor IC.
(d) We can add decimal numbers 4 and 2 with this 4 bit binary adder/subtradctor IC.

Justify your answer.

Q 3. Consider the equation (45)𝑥 = (𝑦1)8 where x and y are unknown. What are all possible
solutions of x and y? [2 marks]

Q 4. Following expression is equivalent to a single 2-input .......... gate. [2 marks]

((1 ⊕ A) ⊕ (A ⊕ B)) ⊕ ((A ⊕ B) ⊕ (B ⊕ 0))
Q 5. Find essential prime implicants for the following Boolean expressions [2 marks]
(a) 𝐹(𝐴,𝐵,𝐶)= Σ(1,2,5,6,7)
(b) 𝐹(𝐴,𝐵,𝐶)= Σ(0,1,2,5,6,7)

Q 6. Draw characteristic table for the following logic circuit: [2 marks]

Q 7. How many 2 input NAND, NOR, and NOT gates respectively can be enough to implement
a 2:4 active-low decoder with no enable inputs? Show your design. [3 marks]

Q 8. The circuit given below has P3 P2 P1 P0 as inputs and D4 D3 D2 D1 D0 as outputs. It

performs “binary to base - ..........” conversion. Explain your answer. [3 marks]

Q 9. What is an SR latch? Draw it’s logic diagram and characteristic table. What modifications
in the logic circuit can overcome the invalid/not used state? [3 marks]
Q 10. The roots of a quadratic equation 𝑥 2 − 10𝑥 − 11 = 0 are given to be 𝑥 = 13, 𝑥 = −1.
What is the radix (r) of the numbers? Convert the last four decimal digits of your IITG roll no.
in the found base. Find r’s complement of the converted number. Convert the result to gray
code representation. [4 marks]

Q 11. The following Boolean function has to be designed

𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(0,1,3,5,8,9,12,14,15)

Design it using

(a) Using only NAND gates

(b) Using 3:8 decoders
(c) Using 4:1 MUXs

Assume the ICs you have in hand are such that each NAND IC has 4 NAND gates fabricated
in it, each decoder IC has two 3:8 decoder units fabricated in it, and each MUX IC has two 4:1
MUX units fabricated in it. All ICs are of same size. Which design would you prefer and why?
[4 marks]

Q 12. Priyanka wants to design a circuit that gives 4-bit signed output in 2’s complement
representation. She wants to display only the magnitude of the result. The only components left
with her are 1-bit full adders, 2:1 multiplexers, and inverters. Help her in designing the circuit
for generating magnitude of result (in binary form) by providing a properly labeled block
diagram. Write all steps that lead to the answer. Use the minimum number of components.
[7 marks]

Q 13. Implement the function F(A,B,C,D,E) =∏ M(0,1,4,14,15) using multiplexers and no

other logic gates. Try and use the smallest multiplexers possible List the type and count of the
multiplexers that you have used and draw your circuit. [7 marks]

Q 14. If F=(A’+B’+C) (A+C’) (B+C’), then how many half adders will be required to
implement F’? How many half adders are required to implement F? [7 marks]

Q 15. A combinational circuit accepts a 7-bit input (I6 I5 I4 I3 I2 I1 I0) and outputs the number
of inputs that are ‘1’ as a 3-bit binary number Y (Y2 Y1 Y0). Design the circuit using only full
adders. No gates are allowed in your design. Signal complements are not available. [7 marks]