Code: R7310404

R07

III B. Tech I Semester (R07) Supplementary Examinations, November 2012 DIGITAL IC APPLICATIONS (Electronics & Communication Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE questions All questions carry equal marks ***** 1 (a) Design a CMOS transistor circuit that has the functional behavior f (Z) = A.(B+C). (b) Design a 4-input CMOS AND-OR-INVERT gate. Draw the logic diagram and function table. 2 (a) (b) Draw the circuit diagram of basic CMS gate and explain the operation. Design a transistor circuit of 2-input ECL NOR gate. Explain the operation with the help of function table. Explain the behavioral design model of VHDL. Write a process based VHDL program for the prime-number detector of 4-bit input and explain the flow using logic circuit. Design the logic circuit and write a data-flow style VHDL program for the following function: (a) F(X ) = A,B,C,D (3, 5, 6, 7, 13) + d (1, 2, 4, 12, 15). (b) F(Y) = A,B,C,D (1, 7, 9, 13, 15). Draw the logic symbol of 74x181 and write a VHDL code for it. Write short notes on: (a) Floating point addition with a suitable example. (b) Dual priority encoder. Design a modulo 16 counter , using one 74X 169 with the following sequence 7,6,5,4,3,2,1,0,8,9,10,11,12,13,14,15,7. Write short notes on: (a) All commercial ROM types. (b) FLASH memory. (c) One time programmable ROM (OTP ROM). *****

(a) (b)

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