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0 D0
1 D1
• Here the 2: 1 MUX has two I/P lines D0 and D1 and one
select (control) line S0
• When S0 =0 then output= D0
• When S0 =1 then output= D1
4:1 Multiplexer
Circuit diagram and truth table of 4:1 MUX are shown below:
Inputs Output
S1 S0
0 0 D0
0 1 D1
1 0 D2
1 1 D3
• Assignment:
• Draw circuit diagram and write the truth table of 8:1
Multiplexer and 16:1 multiplexer.
realizations of a 4-to-1 multiplexer from a decoder, AND
gate and an OR gate:
Demultiplexer
m control signals
• Also called as Data
distributor.
• Demultiplex means one
to Many.
1 i/p signals n o/p
Demultiplexer signal
Circuit Diag.
• Here the 1:2 DEMUX has 2 O/P lines Y0 and Y1 and one
select (control) line S0
• When S0 =0 then output= Y0
• When S0 =1 then output= Y1
1:4 Demultiplexer
Circuit diagram and truth table of 1:4 DEMUX are shown below:
Inputs Output
S1 S0
0 0 Y0=D
0 1 Y1=D
1 0 Y2=D
1 1 Y3=D
• Assignment:
• Draw circuit diagram and write the truth
table of 1:8 Demultiplexer and 1:16
Demultiplexer.
Applications
• A very common application for this type of circuit is found
in computers, where dynamic memory uses the same
address lines for both row and column addressing. A set of
multiplexers is used to first select the row address to the
memory, then switch to the column address