1.

Sequential circuits

 Circuit whose output depends not only on the present

values of input but also on the past values of the input are
known as sequential logic circuits.
 It consist of a combinational circuit along with the
memory elements. The memory element always appear in
feedback path.
 The present value is stored in memory elements. These
present values are applied to the combinational circuits
along with the external inputs. Therefore output and the
next states are decided by the external inputs and the
present state.
 The mathematical model of a sequential circuit is usually
referred as a sequential machine or a finite state machine.
 Divided into two parts: Synchronous and Asynchronous
2. Synchronous sequential circuit
• This circuit uses identical clock pulses in the inputs
of all the flip flops.
• The behavior depends upon the any input signal at
any instant of time and order of input change.
• This synchronization is achieved by the clock pulses.
• The storage elements used are called flip flops.
• It consist of combinational circuit and one or more
flip flops.
• In this content of memory elements can be changed
only at the rising and falling edge of clock signal.
3. Asynchronous sequential circuit
• In this circuits the transition from one state to
another is initiated by the change in primary
inputs, there is no external synchronization.
• In this type of circuits no clock signal is used.
• In this the contents of memory elements can be
changed at any instant of time.
4. Difference between synchronous and asynchronous circuit
Synchronous sequential circuit
1. The circuit are easy to design.
2. A clocked flip flop acts as
memory element.
3. slower, because the delay
correspond to those of the
memory element.
4. The status of memory element
is affected only at the active edge
of clock if the input is changed.
Asynchronous sequential circuit
1. Difficult to design
2. An unclocked flip flop or time
delay element is used as memory
element.
3. Faster as the clock is not
present.
4. The status of memory element
will change any time as soon as
input is changed.
5. Models for synchronous sequential circuit
• There are 2 models for representing the
synchronous sequential circuit as under:
i. Moore circuit
ii. Mealy circuit
• In synchronous sequential circuit, the
combinational circuits consist of combination of
logic gates whereas flip flops are used as a memory
element.
• Moore circuit: If output depends only on present
states of flip flops.
• Mealy circuit: if the output depends on present
state of flip flop and the external inputs.
 w

In the above circuit:

W = set of primary inputs
Z = set of outputs
Q = state = value of outputs of flip flops
• Under control of the clock signal, the flip flop outputs change their state as determined
by the combinational logic that feeds the inputs of these flip flops. Thus the circuit
moves from one state to another.
• The flip flops are edge triggered so that only one transition from one state to another
takes place during one clock cycle.
• They can be triggered either by positive (0 to 1) or by negative (1 to 0) edge of the clock.
• The clock edges that causes the change in state is called active clock edge.
• The combinational logic that provides the
input signals to the flip flops derives its inputs
from two sources : the primary inputs W and
the present output of the flip flops Q.

• Sequential circuits are also called finite state

machines (FSMs) because the functional
behavior of these circuits can be represented
using a finite number of states.
 6. MOORE circuit
• There are some techniques for designing sequential circuits.
Suppose we design a circuit that meets the following specifications:
i. The circuit has one input W and one output Z.
ii. All changes in the circuit occur at the positive edge of a clock signal.
iii. The output Z is equal to 1 if during two immediately preceding
clock cycles the input W was equal to 1. otherwise the value of Z is
equal to 0.
• Thus Z is not determined only by the present value of W but is
determined by different state in the circuit.
 While designing finite state machine, the first stage is to determine
how many states are needed and which transitions are possible from
one state to other. One particular state is selected as a starting state.
 This starting state is one that the circuit should enter when power is
first turned ON or when reset signal is applied.
 The behavior of a sequential circuit can be described by pictorial
Clock
cycle

W 0 1 0 1 1 0 1 1 1 0 1
Z 0 0 0 0 0 1 0 0 1 1 0

RESET
W =1
W =0
A/Z = 0 B/Z = 0
W =0

W=0 W=1

C/Z = 1
W=1
State table:
 The information contained in the state diagram can be translated into a tabular form.
 The table indicates all transitions from each present state to the next state for different
values of the input signal.
 The output Z is specified with respect to the present state.

PRESENT STATE NEXT STATE OUTPUT

Y Z

W=0 W =1

A A B 0

B A C 0

C A C 1
7. MEALY circuit
• In mealy type machine, the output values are
generated based on both the state of circuit and
the present value of its input.
• Here the output Z = 1 in the same clock cycle when
the second occurrence of W =1 is detected. The
suitable input output sequence is given as:
 Clock
cycle

W 0 1 0 1 1 0 1 1 1 0 1
Z 0 0 0 0 1 0 0 1 1 0 0

RESET
W =1/ Z = 0
W =0 / Z = 0
W =1/ Z =1
A B
W =0 / Z = 0

PRESENT STATE NEXT STATE OUTPUT Z

Y
W=0 W =1 W =0 W=1

A A B 0 0

B A B 0 1
8. Comparison of Moore and Mealy circuit
Sr. Moore circuit Mealy circuit
No.
1 The final output depends only The final output depends on
on the present state of the present state of memory
memory elements. elements and the external
inputs.
2 The output changes only after Output can change in
the active clock edge. between the clock edges if
the external input changes.

3 The implementation of a logic Implementation of the same

function needs more number logic function requires less
of states. number of states.