ARM processors originated in the 1980s in England as the Acorn RISC Machine. In the 1990s, ARM Ltd was formed to commercialize the ARM architecture. ARM uses a RISC design with a 32-bit instruction set. This simplified design allows ARM processors to have low power consumption and small die sizes, making them well-suited for embedded applications like mobile devices.
ARM processors originated in the 1980s in England as the Acorn RISC Machine. In the 1990s, ARM Ltd was formed to commercialize the ARM architecture. ARM uses a RISC design with a 32-bit instruction set. This simplified design allows ARM processors to have low power consumption and small die sizes, making them well-suited for embedded applications like mobile devices.
ARM processors originated in the 1980s in England as the Acorn RISC Machine. In the 1990s, ARM Ltd was formed to commercialize the ARM architecture. ARM uses a RISC design with a 32-bit instruction set. This simplified design allows ARM processors to have low power consumption and small die sizes, making them well-suited for embedded applications like mobile devices.
The processor originated in England in 1984. At its inception ARM stood for Acorn RISC Machine. The first ARM reliant systems include the Acorn: BBC Micro, Masters, and the Archimedes. During this early period they were used mostly for British educational systems, and therefore, were not widely available or known outside England. However in 1987 the ARM became the first commercial RISC processor. In 1990, the research section of Acorn separated from the parent company and formed: ARM Ltd. (Advanced RISC Machines Limited). Other historical notables are that the Macintosh Apple ][GS was run by an ARM processor, as was the ill-fated Newton portable note-taking device. (Not ill-fated because of the processor but because of the market timing) What is a RISC machine anyways? A brief overview It is worthwhile to go over this concept since RISC is implied in the name! It also lends itself to the discussion of where some of the hardware choices, as well as claims that are made on this type of processor's performance, came from.RISC is an acronym standing for "Reduced Instruction Set Computer", contrasted with a CISC machine (Complex Instruction Set Computer). RISC claims of simplicity in comparison to CISC: Fixed 32-bit instruction size instead of variable Large register bank of GPR 32-bit registers Easier to prototype and put together RISC Organization: Hard-wired instruction decode logic instead of microcoded ROMs to decode Pipelined execution Possible single cycle execution RISC Advantages Smaller die sizes Shorter time to develop Possible higher performance than CISC High clock rate with single cycle RISC Disadvantages Generally less code density than CISC Cannot execute x86 code, at least not without some sort of conversion and performance drawback Advanced RISC Machine (ARM)
What Does Advanced RISC Machine (ARM) Mean?
Advanced RISC Machine (ARM) is a processor architecture based on a 32-bit reduced instruction set (RISC) computer. Licensed worldwide, the ARM architecture is the most commonly implemented 32-bit instruction set architecture. ARM architecture is implemented on Windows, Unix, and Unix-like operating systems, including Apple iOS, Android, BSD, Inferno, Solaris, WebOS, Plan 9 and GNU/Linux. Advanced RISC Machine was originally known as Acorn RISC Machine. ARM features include: Load/store-based architecture Single-cycle instruction execution Consistent 16x32 bit register file Link register Easy decoding and pipelining Power-indexed addressing modes Fixed 32-bit instruction set ARM Processor What Does ARM Processor Mean? An ARM processor is a specific type of computer processor designed according to a model developed by ARM Holdings PLC. This processor design is described as a reduced instruction set computing (RISC) design, where a simplified central processing unit (CPU) design accommodates higher performance. what make the ARM architecture so special? The sales pitch goes something like this, "The ARM architecture has the best MIPS to Watts ratio as well as best MIPS to $ ratio in the industry; the smallest CPU die size; all the necessary computing capability coupled with low power consumption of which a highly flexible and customizable set of processors are available with options to choose from, all at a low cost."
"What does that all really mean?"
The fact that it is a simple hardware design and the fact that many things can be left off the chip, such as a FP multiplier as options, coupled with the fact that it is a RISC pipeline architecture all lend themselves to creating a chip with a very small die size.Small die size translates into low cost since much of the cost of a chip is proportional to the die area. Having small die area and simple pipeline construction allows the other major benefit of the ARM chip. Designers are able to use less hardware and make better hardware decisions to reduce the processor's power consumption. The small size, low cost, and low power usage leads to one of the most common uses for an ARM processor today, embedded applications. Embedded environments like cell phones or PDAs (Personal Digital Assistants) require those benefits that this architecture provides. Sure, there has to be a trade-off between performance, cost, and size. But, the ARM fits into this category nicely. It has very small die size, its performance, although not on the cutting edge, is more than adequate for the tasks at hand, and most importantly, it is cheap and low in power consumption. how can it have performance, low wattage, and simplicity, all at a low cost? An Important factor that contributes to making such a claim true is its simple design using a not-so-fancy 5 stage pipeline. But, other contributing factors are as follows below. ARM makers have been able to apply an instruction set called Thumb, which takes 32-bit instructions and compresses them down to 16-bits. This tactic enables programs to be coded much more densely than standard RISC instruction sets, not to mention cutting some portions of the hardware down in size. Processors enabled to take advantage of Thumb also allow 32-bit instructions to run on the same processor. In fact, 16-bit and 32-bit instructions can be mixed together and the hardware will be able to decode and decompress at the same time without a performance hit, thus maintaining powerful computing capabilities. Cost is minimized by having a simple, small structure with many configurations available. Small means less silicon, higher yield per wafer. A simple pipeline and instruction set makes it easier to learn, optimize, and build, again saving on cost.