Chapter Four

Instruction Format
Instruction Format
To convert an assembly language program to machine code, we must convert
each assembly language instruction to its equivalent machine code instruction.
In general, for an instruction, the machine code specifies things like :
What operation is to be performed
What operand or operands are to be used
Whether the operation is performed on byte or word data
Whether the operation involves operands that are located in registers or
storage location in memory
If one of the operands is in memory, how its address is to be generated
Cont…..

First Bye Second Byte

Byte 1 contains three kinds of information

The operation code (opcode),
The register direction bit (D),
Data size bit (W).
Opcode field (6 bits) specifies the operation, such as add, subtract, and move,
etc. that is to be performed.
Register Direction bit (D bit) specifies whether the register (REG) operand that is
specified in byte 2 is the source or destination operand.
A logic 1 at this bit position indicates that the register (REG) operand is a
destination operand
A logic 0 indicates that it is a source operand.
Data size bit (W bit) specifies whether the operation will be performed on 8-bit
or 16-bit data. Logic 0 selects 8 bits and logic 1 selects 16 bits.
The second byte has three fields
They are
The mode (MOD) field
The register (REG) field
The register/memory (R/M) field.
These fields are used to specify which register is used for the first operand and
where the second operand is stored.
The second operand can be in either a register or memory location.
The 3-bit REG field is used to identify the register for the first operand
This is the operand that was defined as the source or destination by the D bit in
byte 1.
The encoding for each of the 8088/8086 registers is shown in the figure below.
REG W=0 W=1
000 AL AX
001 CL CX
010 DL DX
011 BL BX
100 AH SP
101 CH BP
110 DH SI
111 BH DI

Register (REG) field encoding

Here we find that the 16-bit register AX and the 8 bit register AL are specified by the
same binary code.
Notice that the decision whether to use AX or AL is made based on the setting of the
operation size (W) bit in byte 1.

The 2- bit MOD field and 3-bit R/M field together specify the second operand.
Encoding for these fields are shown in Fig (c) and (d), respectively.
MOD indicates whether the operand is in a register or memory.
Notice that in the case of a second operand that is in a register, the MOD field is always
11.
The R/M field along with the W bit from byte 1 selects the register.
For a second operand that is located in memory, there are a number of different ways its
location can be specified. That is, any of the addressing modes supported by the 8086
microprocessor can be used to generate its address.
The addressing mode is also selected with the MOD and R/M fields.
Here we find that the 16-bit register AX and the 8 bit register AL are specified by the
same binary code.
Notice that the decision whether to use AX or AL is made based on the setting of the
operation size (W) bit in byte 1.

The 2- bit MOD field and 3-bit R/M field together specify the second operand.
Encoding for these fields are shown in the tables below
MOD indicates whether the operand is in a register or memory.
Notice that in the case of a second operand that is in a register, the MOD field is always
11.
The R/M field along with the W bit from byte 1 selects the register.
For a second operand that is located in memory, there are a number of different ways its
location can be specified. That is, any of the addressing modes supported by the 8086
microprocessor can be used to generate its address.
The addressing mode is also selected with the MOD and R/M fields.
Notice that the addressing mode for an operand in memory is indicated by one of
the other three values (00, 01, and 10) in the MOD field and an appropriate R/M
code.
The different ways in which the operand’s address can be generated are shown in
the effective address calculation part of the table

CODE Explanation
00 Memory Mode, no displacement follows*
   
01 Memory Mode, 8 –bit displacement follows
   
10 Memory Mode, 16-bit displacement follows
   
11 Register Mode ( no displacement)
 

*Except when R/M=110, then 16-bit displacement follows.

 MOD=00 Effective Address Calculation
R/M W=0 W=1 R/M MOD=00 MOD=01 MOD=10
000 AL AX 000 [BX]+[SI] [BX]+[SI]+d8 [BX]+[SI]+d16

001 CL CX 001 [BX]+[DI] [BX]+[DI]+d8 [BX]+[DI]+d16

010 DL DX 010 [BP]+[SI] [BP]+[SI]+d8 [BP]+[SI]+d16

011 BL BX 011 [BP]+[DI] [BP]+[DI]+d8 [BP]+[DI]+d16

100 AH SP 100 [SI] [SI]+d8 [SI]+16

101 CH BP 101 [DI] [DI]+d8 [DI]+D16
110 DH SI 110 Direct [BP]+d8 [BP]+d16
addressing
111 BH DI 111 [BX] [BX]+d8 [BX]+d16
Example 1:
The instruction ADD AX, [SI] stands for “add the 16-bit contents of the memory
location indirectly specified by SI to the contents of AX.“ Encode the instruction in
machine code. The opcode for this add operation is 0000002
Solution
To specify a 16-bit operation with a register as the destination, the first byte of
machine code will be
Byte 1 =000000112= 0316
The REG field bits in byte 2 are 000 to select AX as the destination register. The
other operand is in memory and its address is specified by the contents of SI with
no displacement.
we find that for indirect addressing using SI with no displacement, MOD equals 00
and R/M equals 100.
MOD=00, R/M=100, So Byte 2 = 000001002 = 0416
Thus the machine code for the instruction is ADD AX , [SI] = 0304H
Example 2:
What is the machine code for the following instruction XOR CL , [1234H]
Solution
This instruction stands for exclusive-OR the byte of data at memory address 123416
with the byte contents of CL. The opcode for exclusive-OR is 0011002.
Using the XOR opcode 0011002, 1 for destination operand, and 0 for byte data, we
get
Byte1 = 001100102= 3216
The REG field has to specify CL, which makes it equal to 001. In this case a direct
address has been specified for operand 2. This requires MOD=00 and R/M= 110.
Byte 2= 00001110 =0E16
To specify the address 123416, we must use bytes 3 and 4. The least significant byte
of the address is encoded first, followed by the most significant byte. This gives
Byte 3= 3416, Byte 4 = 1216
The entire machine code form of the instruction is XOR CL, [1234H] = 320E3412H
Example 3
Give the instruction MOV AX, BX, if the operation code for the MOV
instruction is 100010, encode the instruction in machine code.
Assuming BX as Source Register, The D becomes 0.
AX and BX registers are 16 bit registers, the value of W becomes 1
MOD =11, register mode.
The value of the REG is 011 for BX register
The value of the other operand, AX, is 000.
So, byte 1 = 10001001B =89H
Byte 2 =11011000B = D8H
So, MOV AX, BX = 89D8H
One Byte Instruction implied Operands
In this type of instruction, all the 8 bits are instruction bits and the register holding the
operand can be implied, an  implicit addressing mode.
Instruction

1 0 1 1 1 0 1 0

One Byte Instruction register mode.

Here, the first 5 bits represent for the instruction and the last 3 bits for register

•1
•0In Instruction Register
•1
•1
•1
•0
•1
•0