Introduction

To
GPIOs

1
Outline of the presentation

 GPIOs
 GPIOs Registers
 GPIOs Registers configuration ALP point of view
 GPIOs Registers configuration C language
programming point of view

2
Peripherals Map

Memory Mapped
I/O Mapping

For GPIOs
0x2009 C000
To
0x200A 0000

3
Pin Configuration of LPC1768

4
 GPIOs
• LPC1768 is an ARM Cortex-M3 based MCU by Phillips/NXP
and has plenty of General Purpose Input Output pins to play with.
• Pins on LPC176x Microcontrollers are grouped into Ports.
- LPC1768 has 5 ports viz. Port 0 to 4.
- The associated registers for each port are grouped into
a structure with the following naming convention :
LPC_GPIOx , where x is the port number.
• From the programming point of view
-These ports are 32-bit wide i.e. a maximum 32 pins

- But each port may have a few or many pins are ‘reserved’.
- In Port 0 Pins 12, 13, 14 & 31 are not available.
- In Port 1 Pins 2, 3, 7, 6, 5, 11, 12, & 13 are not available.
- In Port 2 only pins 0 to 13 are available and rest are reserved.
- In Port 3 only pins 25, 26 are available and rest are reserved.
- Finally in Port 4 only 28, 29 are available and rest are reserved.
5
• The naming convention for Pins on MCU is ‘Px.y’
- where ‘x’ is the port number (0,1,2,3 or 4 in our case
since we have only 5 ports to play within lpc1768)
- and ‘y’ is simply the pin number in port ‘x’.
- For example:
P0.7 refers to Pin number 7 of Port 0
P2.11 refers to Pin number 11 in Port 2.

msb P0.31 p0.30 p0.29 p0.28 p0.27 p0.26 p0.25 p0.24

p0.23 p0.22 p0.21 p0.20 p0.19 p0.18 p0.17 p0.16
p0.15 p0.14 p0.13 p0.12 p0.11 p0.10 p0.9 p0.8
p0.7 p0.6 p0.5 p0.4 p0.3 p0.2 p0.1 p0.0 lsb

6
 GPIO: Registers
 Registers to control GPIO functionality through fast Interface
AHB Bus
• FIODIR: Fast GPIO Port Direction control register (0=in, 1=out).
- This register individually controls the direction of each port pin.
• FIOMASK: Fast Mask register for port.
- Writes, sets, clears, and reads (done via writes to FIOPIN,
FIOSET, and FIOCLR, and reads of FIOPIN)
- To alter or return only the bits enabled by 0 in this register.
• FIOPIN: Fast Port Pin value register using FIOMASK.
- Current state of digital port pins can be read from this
register, regardless of pin direction or alternate function selection
• FIOSET: Fast Port Output Set register using FIOMASK.
- Writing 1s produces highs at the corresponding port pins.
• FIOCLR: Fast Port Output Clear register using FIOMASK.
- Writing 1s produces lows at the corresponding port pins.
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 GPIOs: General Purpose I/O
Peripherals->GPIO Fast Interface

8
 GPIO: Registers Address
FIO0DIR equ 0x2009c000 FIO1DIR equ 0x2009c020
FIO0MASK equ 0x2009c010 FIO1MASK equ 0x2009c030
FIO0PIN equ 0x2009c014 FIO1PIN equ 0x2009c034
FIO0SET equ 0x2009c018 FIO1SET equ 0x2009c038
FIO0CLR equ 0x2009c01c FIO1CLR equ 0x2009c03c
FIO2DIR equ 0x2009c040 FIO3DIR equ 0x2009c060
FIO2MASK equ 0x2009c050 FIO3MASK equ 0x2009c070
FIO2PIN equ 0x2009c054 FIO3PIN equ 0x2009c074
FIO2SET equ 0x2009c058 FIO3SET equ 0x2009c078
FIO2CLR equ 0x2009c05c FIO3CLR equ 0x2009c07c
FIO4DIR equ 0x2009c080
FIO4MASK equ 0x2009c090
FIO4PIN equ 0x2009c094
FIO4SET equ 0x2009c098
FIO4CLR equ 0x2009c09c 9
;ARM ALP to display sum on port0
area reset,data,readonly
export __Vectors
__Vectors ldr r0,=0x12345678
dcd 0 ldr r1,=0x11111111
dcd Reset_Handler
area hello,code,readonly adds r2,r0,r1
FIO0DIR equ 0x2009c000
rev r3,r2
FIO0MASK equ 0x2009c010
FIO0PIN equ 0x2009c014 ldr r4,=sum
FIO0SET equ 0x2009c018 str r3,[r4]
FIO0CLR equ 0x2009c01c
entry ldr r5,=FIO0DIR
export Reset_Handler
ldr r6,=0xffffffff ; o/p port
Reset_Handler
str r6,[r5] ;

stop b stop ldr r7,=FIO0PIN

area mydata,data,readwrite str r2,[r7]
sum space 0
end 10
 Bit-Banding operation
1. Setting particular bit/bits without disturbing other bits
orr r0,#1<<0 ; set 0th bit
orr r0,#0xff<<16 ; set 23-16 bits
2. Clearing/Masking other bits without disturbing particular
bit/bits.
and r1,#1<<4 ; clear other bits other than 4th bit
and r1,#0xff<<16 ; clear other bits other than 23-16 bits

2. Clearing/Masking particular bit/bits without disturbing other

bits
bic r2,#1<<4 ; clear 4th bit
bic r2,#0xff<<16; clear 23-16 bits

3. Toggling particular bit/bits without disturbing other bits

eor r3,#1<<8; toggle 8th bit
eor r3,#0xff<<16; toggle 23-16 bits 11
 ARM Embedded C
#include "lpc17xx.h"
• The Name of Registers, Data structures that we have used
are defined in LPC17xx.h header file.
• LPC17xx.h header is based on CMSIS
(Cortex Microcontroller System Interface Standard)
developed by ARM.
• System startup, core CPU access and peripheral definitions
are given by CMSIS-CORE component of CMSIS.
• As per the CMSIS convention, the different registers are
grouped into different structures
• LPC_GPIOx is defined as a pointer to this structure
in LPC17xx.h header.
• For example all registers for Port 0 are grouped into structure

defined as LPC_GPIO0.
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setting, Clearing and Toggling in ARM Embedded C

Setting
LPC_GPIO0->FIOPIN |= (1<<3); //set P0.3 to digital 1
LPC_GPIO1->FIOPIN |= (0xFF<<16); // Set P1 (bits 16-23) to digital 1

Clearing
LPC_GPIO0->FIOPIN &=~ (1<<3); //set P0.3 to digital 0
LPC_GPIO1->FIOPIN &= ~(0xFF<<16); // Set P1 (bits 16-23) to digital 0

Toggling
LPC_GPIO1->FIOPIN ^= 1 << 29; // Toggle the LED

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PCONP Register (power control for peripheral registers)

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15
• LPC17xx MCUs have Peripheral Power Control feature
- Which allows individual peripherals to be turned off
for power saving using PCONP Register
- Which is a member of LPC_SC (system control) structure.

• Ex: PCONP ->Bit- 4 = PCUART1 ; Bit-15 = PCGPIO

• LPC_SC->PCONP |=((1<<4)|(1<<15)); //1 means enabled;

0 means disabled

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 Pin Function Setting

• Most of the PINS of LPC176x MCU are Multiplexed

- i.e. these pins can be configured to provide up to 4
different functions.
• Pins on LPC1768 are divided into 5 groups (PORTs)
- Starting from PORT 0 to PORT 4.
• Each pin has 4 operating modes:
- GPIO(default), 1st alternate function, 2nd alternate
function, 3rd alternate function.

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 PINSEL register
• By default, after Power-On or Reset :
- All pins of all ports are set as GPIO
- The different functions that any particular pin
provides can be selected by setting appropriate
value in the PINSEL register for the corresponding pin.
• Each pin on any port has 2 corresponding bits
in PINSEL register.
- The first 16 pins (0-15) on a given port will have
a corresponding 32 bit PINSEL register and the rest 16
bits will have another register.
- For example bits 0 & 1 in PINSEL0 are used to
select function for Pin 1 of Port 0, bits 2 & 3 in PINSEL0
are used to select function for PIN 2 of port 0 and so on.

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Bit Value Function
00 GPIO Function
1st alternate
01
function
2nd alternate
10
function
3rd alternate
11
function

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Example:
To set pin 0.3 as GPIO (set corresponding bit to 00)
LPC_PINCON –> PINSEL0 &= ~ ((1<<7) | (1<<6));
To set pin 0.3 as ADC channel 0.6 (2nd alternate function,
set corresponding bit to 10)
LPC_PINCON –> PINSEL0 |= ((1<<7) | (0<<6)); //
LPC_PINCON->PINSEL0 |=(2<<6) 20
 Pin modes of Port pins

• According to the NXP data sheet for the LPC1768,

• GPIO low is 0v and high is 3.3v (Vdd).
- When the direction is set to input, the pin is floating
and you might measure just about any voltage on
it from 0v up to Vdd (3.3v).
- If you want it to be high (3.3v) or low (0v)
when an input, then enable pullup or pulldown.

• The PINMODE registers control the input mode of all ports.

- This includes the use of the on-chip pull-up/pull-down
resistor feature and a special open drain operating mode.

21
Pull –up Resistor

22
Pull –down Resistor

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24
• LPC1768 MCU supports 4 pin modes.
Bit Value Pin Mode
00 On chip pull-up resistor enabled
01 Repeater Mode (Retains its last state if it is configured
as an input and is not driven externally)
10 Tri-State mode, (neither pull-up nor pull-down)
11 On chip pull-down resistor enabled
- These include the internal (on-chip) pull-up and pull-down
resistor modes and a special operating mode.
- Pull-up and Pull-down resistors prevent the inputs
from 'floating' by either pulling them to logic HIGH or LOW.
- The state of the inputs is therefore always defined.
-The PINMODE and PINMODE_OD registers together are
used to control the pin mode.
- A total of 3 bits are used to control the mode of a any pin,
2 bits from PINMODE and 1 bit from PINMODE_OD register.
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• Hence we have a total of 10 PINMODE registers and
a total of 5 PINMODE_OD.

• Bits 0 & 1 of PINMODE0 corresponds to Pin 0 of Port 0,

bits 2 & 3 of PINMODE0 corresponds to Pin 1 of Port 0
and so on.

• PINMODE_ODx has 1:1 correspondence to all the pins in

PORTx.

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27
28
 Example:
• By default all pins which are set as input has internal
pull-up on (00).
•To disable internal pull-up on pin 0.3
LPC_PINCON –> PINSEL0 |= (1<<7);
LPC_PINCON->PINMODE3 &= ~(3<<15);
/* Making pull register low */
LPC_PINCON->PINMODE3 |= (1<<15);
/* Configuring Pull register */
LPC_PINCON->PINMODE1 &= ~0x003FC000;
/* Pull up the register */
LPC_PINCON->PINMODE1 |= (2<<14)|(2<<16)|(2<<18)|(2<<20);
/*pull down the register */

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 GPIO Registers

- Registers on LPC1768 are present on Peripheral AHB bus

(Advanced High performance Bus) for fast read/write timing.

- These are basically Fast I/O or Enhanced I/O and

hence the naming convention in datasheet uses a prefix
of “FIO” instead of something like “GIO” for all the registers
related to GPIO.

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 1. FIODIR (Pin Direction Setting)

• This is the GPIO direction control register.

• Setting a bit to 0 in this register will configure the

corresponding pin to be used as an Input
while setting it to 1 will configure it as Output.

• To set 0.3 as output

LPC_GPIO –> FIODIR |= (1<<3);

31
 Pin is Set as Output
. i) FIOSET
• It is used to drive an ‘output’ configured pin to Logic 1 i.e
HIGH.
• Writing Zero does NOT have any effect and hence
it cannot be used to drive a pin to Logic 0 i.e LOW.
Example
Turn Pin 0.3 to high
LPC_GPIO0 –> FIOSET |= (1<<3);
If we set LPC_GPIOn –> FIOSET bit to ‘0’ there is no effect.
ii) FIOCLR
• It is used to drive an ‘output’ configured pin to Logic 0 i.e LOW.
• Writing Zero does NOT have any effect and hence
it cannot be used to drive a pin to Logic 1.
Turn Pin 0.3 to low
LPC_GPIO0 –> FIOCLR |= (1<<3);
If we set LPC_GPIOn –> FIOCLR bit to ‘0’ there is no effect 32
 FIOPIN (Pin is Set to Input)
• This register can be used to Read or Write values directly
to the pins.
• Regardless of the direction set for the particular pins
it gives the current start of the GPIO pin when read.

Read a Pin Value

Register LPC_GPIOn –> FIOPIN stores the current pin state.
The corresponding bit is ‘1’ indicates that the pin is driven high.
Example
To read current state of Pin 0.3
Value = ((LPC_GPIO0 –> FIOPIN & (1<<3)) >> 3);
//or if(!(LPC_GPIO0->FIOPIN&(1<<3)));
 FIOMASK
• This gives masking mechanism for any pin i.e.
it is used for Pin access control.
• Setting a bit to 0 means that the corresponding pin will be
affected by changes to other registers like FIOPIN, FIOSET,
FIOCLR.
• Writing a 1 means that the corresponding pin won’t be
affected by other registers.
•These registers are defined as members of this structure.
Hence to use any register, for e.g. FIODIR,
• We must use the arrow “->” operator to de-reference
members of structure (since the structure itself is a
pointer) to access the register as follows :
LPC_GPIO0->FIODIR = some value.
Ex: LPC_GPIO0->FIODIR =0x0000ffff;
Different registers are grouped into different structures

Structure/pointer Registers Example

LPC_SC-> PCONP LPC_SC->PCONP |=((1<<4)|(1<<15))
PCLKSELx LPC_SC->PCLKSEL1 = 2<< 14
LPC_PINCON-> PINSELx
PINMODEx LPC_PINCON->PINSEL0 |=(2<<6)
PINMODE_ODx LPC_PINCON->PINMODE3 |= (1<<15)

LPC_GPIOx –> FIODIR

FIOPIN
FIOSET LPC_GPIO0 –> FIODIR |= (1<<3);
FIOCLR
FIOMASK
LPC_TIM0-> MCR
PR
MRx LPC_TIM0->MCR = 0x04
TC

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 Programming of GPIOs
Step1: Power-up GPIOs using PCONP Register
(optional, since on-reset GPIOs are turned-on)
LPC_SC->PCONP |=(1<<15);

Step2: Select default GPIO function using PINSEL Register

(optional, since on-reset all GPIO works as I/Os)
LPC_PINCON –> PINSEL0 = 0x0000;
// Port0 I/Os (15:0)
LPC_PINCON –> PINSEL0 &= ~ ((1<<10) | (1<<5));
// particular I/O pins, in this case digitally 5th and 10th pins of Port0
LPC_PINCON –> PINSEL0 &= ~ (0xff<<0);
// particular I/O pins, in this case 7,6,5,4,3,2,1 and 0th pins of Port0

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Step3: Select on-chip pull-up or pull-down resistor mode
using PINMODE register
(prevent the inputs from floating)
LPC_PINCON –> PINMODE0 = 0x0000;
// Port0 I/Os (15:0) default pull-up
LPC_PINCON –> PINMODE0 &= ~ ((1<<10) | (1<<5));
// particular I/O pins, in this case digitally 5th and 10th pins of
Port0 default pull-up
LPC_PINCON –> PINMODE0 &= ~ (0xff<<0);
// particular I/O pins, in this case 7,6,5,4,3,2,1 and 0th pins of
Port0 default pull-up
LPC_PINCON –> PINMODE0 = 0xffff;
// Port0 I/Os (15:0) pull-down
LPC_PINCON –> PINMODE0 |= ((1<<10) | (1<<5));
// particular I/O pins, in this case digitally 5th & 10th pins of Port0
pull-down
LPC_PINCON –> PINMODE0 |= (0xff<<0);
// particular I/O pins, in this case 7,6,5,4,3,2,1 and 0th pins of 37
Step4: Configure particular GPIOs either as input or output pins
using FIODIR register
LPC_GPIO0 –> FIODIR = 0x00000000;
// all Port0 I/Os (31:0) default input pins
LPC_GPIO0 –> FIODIR &= ~ ((1<<10) | (1<<5));
// particular I/O pins, in this case digitally 5th and 10th pins of Port0
default input pins
LPC_GPIO0 –> FIODIR &= ~ (0xff<<0);
// particular I/O pins, in this case 7,6,5,4,3,2,1 and 0th pins of Port0
default input pins
LPC_GPIO0 –> FIODIR = 0xffffffff;
// all Port0 I/Os (31:0) output pins
LPC_GPIO0 –> FIODIR |= ((1<<10) | (1<<5));
// particular I/O pins, in this case digitally 5th and 10th pins of Port0

output pins
LPC_GPIO0 –> FIODIR |= (0xff<<0);
// particular I/O pins, in this case 7,6,5,4,3,2,1 and 0th pins of Port0
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Step5: Enable all bits of FIOSET, FIOCLR and FIOPIN registers
using FIOMASK register
(0 means enable and 1 means disable)
(optional, since on-reset, all bits of FIOMASK register are 0s )
LPC_GPIO0 –> FIOMASK = 0x00000000;
// all bits default enable
LPC_GPIO0 –> FIOMASK &= ~ ((1<<10) | (1<<5));
// particular bits, in this case digitally 5th and 10th bits default
enable
LPC_GPIO0 –> FIOMASK &= ~ (0xff<<0);
// particular bits, in this case 7,6,5,4,3,2,1 and 0th bits default
enable
LPC_GPIO0 –> FIOMASK = 0xffffffff;
//all bits disable
LPC_GPIO0 –> FIOMASK |= ((1<<10) | (1<<5));
// particular bits, in this case digitally 5th and 10th bits disable
LPC_GPIO0 –> FIODIR |= (0xff<<0);
// particular bits, in this case 7,6,5,4,3,2,1 and 0th bits disable 39
Step6: Make GPIOs pin status HIGH using FIOSET register

LPC_GPIO0 –> FIOSET= 0xffffffff;

// all pins of port0 are HIGH
LPC_GPIO0 –> FIOSET |= ((1<<10) | (1<<5));
// particular bits, in this case digitally 5th and 10th pins of port0
are HIGH
LPC_GPIO0 –> FIOSET |= (0xff<<0);
// particular bits, in this case 7,6,5,4,3,2,1 and 0th pins of port0
are HIGH

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Step7: Make GPIOs pin status LOW using FIOCLR register

LPC_GPIO0 –> FIOCLR= 0xffffffff;

// all pins of port0 are LOW
LPC_GPIO0 –> FIOCLR |= ((1<<10) | (1<<5));
// particular bits, in this case digitally 5th and 10th pins of port0
are LOW
LPC_GPIO0 –> FIOCLR |= (0xff<<0);
// particular bits, in this case 7,6,5,4,3,2,1 and 0th pins of port0
are LOW

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Step8: Send data through GPIOs configured as output pins
using FIOPIN register

LPC_GPIO0 –> FIOPIN= 0x00000000;

// Sending 0x00000000 through port0

LPC_GPIO0 –> FIOPIN = 0xffffffff;

// Sending 0xffffffff through port0

Step9: Receive data through GPIOs configured as input pins

using FIOPIN register

Value = ((LPC_GPIO0 –> FIOPIN & (1<<3)) >> 3);

//or if(!(LPC_GPIO0->FIOPIN&(1<<3)));

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