Logic Circuits and

Switching Theory
BY: ENGR. JOSHUA ANIKEN G. ACUSTA, ECT
 Topic Outline (based on the NEW
T.O.S.)
1. Boolean Algebra and Logic Gates (3)  Half-Adder and Full-Adder
 Number Systems  Binary Parallel Adder
 Conversion of Number Systems  Encoder and Decoder
 Operations on Number Systems  Multiplexer (MUX) and Demultiplexer (DEMUX)
 Negative Numbers in Complement Form
3. Sequential Logic Circuits (3)
 Boolean Algebra and its Operations
 Sequential Logic and its Types
 Laws of Boolean Algebra and De Morgan’s Law
 Flipflops and Latches
 Simplifying Boolean Expressions
 Counters
 Basic Logic Gates and Their Symbols
 Universal Logic Gates 4. Algorithmic State Machine (1)

2. Combinational Logic Circuits (4) 5. Asynchronous Sequential Logic (1)

 Forms of Boolean Expressions
 Karnaugh Map (K-Map)
Boolean Algebra and
Logic Gates
UNIT 1
Number Systems (Base-N)
Most Common Number Systems:
Decimal (Base-10) – 0 1 2 3 4 5 6 7 8 9
Binary (Base-2) – 0 1
Octal (Base-8) –
Hexadecimal (Base-16) –
QUESTION 01
Which of the following is an octal number?
A. 1999
B. 800
C. 799
D. 1001001
QUESTION 02
What is the highest valued digit in a Base-11 number?
A. A
B. B
C. 10
D. 11
Conversion of Number Systems
Base-N to Base-10
1. Starting from the right, multiply each digit by , where
2. Add all the products together.
Example: 101101 in binary to decimal 2023 in hexadecimal to
decimal
1 0 1 1 0 1

32 0 8 4 0 1
32+8+4+1=45
Conversion of Number Systems
Base-10 to Base-N 4. Repeat Steps 2 and 3 until the
quotient becomes 0.
1. Divide the original number by N,
then record the quotient and Example:
remainder.
45 in decimal to binary
2. Divide the previous quotient by N, 0 1 2 5 11 22 45 Q
then record the current quotient
1 0 1 1 0 1 R
and remainder.
3. List the remainders from RIGHT to 1000 in decimal to hexadecimal
LEFT. The remainders represent the
Base-N equivalent of the original
number.
Conversion using the Calculator
QUESTION 03
Convert to octal
A. 16
B. 26
C. 36
D. I don’t know
QUESTION 04
Which of the following has the largest value?
Operations on Number Systems
Addition and subtraction work similarly to operations that we
normally know (that is, in Base-10 or decimal).
Example:

Multiplication and Division also works similarly, but is more

challenging.
Just convert the numbers to decimal, and use your calculator!
Negative Numbers in Complement Form
The Most Significant Digit (MSD) determines the sign of the
number: 0 for positive, and (N-1) for negative.
In binary, 0 MSD is positive and 1 MSD is negative.
1. 1’s Complement (for binary numbers only) – each 1 becomes 0,
and each 0 becomes 1
2. 2’s Complement (for binary numbers only) – add 1 to the 1’s
complement
Negative Numbers in Complement Form
Example: Find the 1’s and 2’s complement of the following.
1. 01101001

2. 10010100
Negative Numbers in Complement Form
Diminished Radix Complement – a more general form of the 1’s
complement obtained by subtracting the number to another number
of the highest value but with the same number of digits.
True Complement – a more general form of the 2’s complement
obtained by adding 1 to the diminished radix complement.
Example:
Diminished Radix Complement:
True Complement: 634+1=635
Negative Numbers in Complement Form
Find the diminished radix complement and true complement of the
following.

Answers:
1. ,
2. ,
Boolean Algebra and its Operations
AND () – all inputs should be HIGH to have a HIGH output.
OR () – at least 1 input should be HIGH to have a HIGH output.
COMPLEMENT () – the output is inverted.
XOR () – an ODD number of inputs should be HIGH to have a HIGH
output.
XNOR () – an XOR followed by a NOT
Truth Tables
A B X A B X A B X A X
0 0 0 0 0 0 0 0 0 0 1
0 1 0 0 1 1 0 1 1 1 0
1 0 0 1 0 1 1 0 1
1 1 1 1 1 1 1 1 0

A B X A B X A B X
0 0 1 0 0 1 0 0 1
0 1 1 0 1 0 0 1 0
1 0 1 1 0 0 1 0 0
1 1 0 1 1 0 1 1 1
QUESTION 05
What Boolean operation is described if the output is
always LOW only when at least 1 input is LOW?
A. NOR
B. NAND
C. OR
D. AND
QUESTION 06
What Boolean operation is described if the output is
HIGH only when the inputs are different?
A. XNAND
B. XAND
C. XOR
D. XNOR
Laws of Boolean Algebra and De
Morgan’s Law
De Morgan’s Law
DE MORGAN’S FIRST LAW (NOR) DE MORGAN’S SECOND LAW (NAND)

The complement of the union of two sets A The complement of the intersection of two
and B is equal to the intersection of the sets A and B is equal to the union of the
complement of the sets A and B. complement of the sets A and B.
Simplifying Boolean Expressions
Simplify the following Boolean expressions
1. A’+AB+AB’

2. (A’+B’+CD)’
QUESTION 07
What Boolean law is shown in the following
expression: AA’=0?
A. Identity Law
B. Complementary Law
C. Inverse Law
D. Prime Law
QUESTION 08
What Boolean laws are used (in order) to simplify the
following expression: XY+XY’=X?
A. Distributive, then Inverse, then Identity
B. Distributive, then Identity, then Inverse
C. Inverse, then Identity, then Distributive
D. Identity, then Inverse, then Distributive
Basic Logic Gates and Their Symbols
Universal Logic Gates
NAND Gate and NOR Gate
Can be used to construct any other logic gate
Easily implemented with CMOS technology
Logic Gates using NAND Gates
Logic Gates using NOR Gates
QUESTION 09
What is the minimum number of NOR gates needed
to implement an OR gate?
A. 1
B. 2
C. 3
D. 4
QUESTION 10
A buffer gate simply enhances a signal passing
through it. What is the minimum number of NAND
gates needed to implement a buffer gate?
A. 1
B. 2
C. 3
D. I don’t know again
Combinational Logic
Circuits
UNIT 2
Forms of Boolean Expressions
Minimal Forms of Boolean Expressions
Minimal Sum Terms: A+B’+C, X’+Y’+Z, etc.

Minimal Product Terms: AB’C, X’Y’Z, etc.

Minimal Sum of Product (SOP) Terms: AB’C+A’B, A+BC, etc.

Minimal Product of Sum (POS) Terms: (A+B’+C)(A’+B), A(B+C), etc.

Forms of Boolean Functions
Canonical Forms of Boolean Functions
Canonical Disjunctive Form (min-terms or SOP): X=AB+A’B’

Canonical Conjunctive Form (max-terms or POS): X=(A+B)(A’+B’)

Boolean Function Notation using
Minterms and Maxterms
MINTERMS (SOP) MAXTERMS (POS)

𝐹 ( 𝐴 , 𝐵)= 𝐴 𝐵+𝐴𝐵 𝐹 ( 𝐴, 𝐵)=( 𝐴+𝐵)( 𝐴 +𝐵′)

A
0
B
0
′
Minterm
A’B’
′
Minterm
Notation
m0
Maxterm
A+B
Maxterm
Notation
M0
F
0
′
0 1 A’B m1 A+B’ M1 1
1 0 AB’ m2 A’+B M2 1
1 1 AB m3 A’+B’ M3 0
 Boolean Function Notation using
Minterms and Maxterms
Example: Given the truth table below, determine the canonical forms.
X Y Z F SOP POS Canonical Disjunctive Canonical Conjunctive
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
QUESTION 11
Which of the following is a minimal SOP term?
A. A(B+C)
B. A+B+C
C. AB+AC
D. None of the above
QUESTION 12
For a Boolean function with 3 binary variables, which
of the following are equivalent?
A. Σ(1,2,3,4) and Π(5,6,7,8)
B. Σ(0,1,2,3) and Π(4,5,6,7)
C. Σ(0,2,4,6,8) and Π(1,3,5,7)
D. Σ(2,4,6,8) and Π(1,3,5,7)
Karnaugh Map (K-Map)
Converts any truth table into systematic 2-D arrays
Used to simplify Boolean expressions
How to use the K-Map: Create the BIGGEST RECTANGLES

1 1 0 0 0 1 1 0 1 0 0 1 X 1 0 X
1 1 1 0 1 0 0 1 0 0 0 0 1 1 0 0
1 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0
1 1 0 0 0 1 1 0 1 0 0 1 0 0 0 1
 Karnaugh Map (K-Map)
Example: Determine the minimal SOP and POS that represents the
truth table below, using minterms and maxterms
X Y Z F
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
QUESTION 13
In Karnaugh Maps and Truth Tables, an output of X
symbolizes what?
A. Don’t Care
B. Don’t Mind
C. Don’t Know
D. Your past
QUESTION 14
Karnaugh Maps produce the minterm or maxterm
forms of Boolean functions.
A. Completely true
B. Completely false
C. Partially true
D. Partially false
Half-Adder and Full-Adder
HALF-ADDER FULL-ADDER
Has 2 inputs and 2 outputs Has 3 inputs and 2 outputs
Composed of an XOR gate and an AND gate Composed of 2 XOR gates, 2 AND gates, and
1 OR gate
Binary Parallel Adder
It is a digital circuit that adds two binary numbers in parallel form and
produces the arithmetic sum of those numbers in parallel form.
Encoder and Decoder
Encoders and decoders convert one form of data into another.
In most cases, an encoder converts single-bit inputs into an n-bit
output.
A decoder reverses the process of an encoder.
Encoders and decoders are programmed to work together.
Encoders can only accept one input at a time.
Encoder and Decoder
Encoder and Decoder
Priority Encoder
Works very similarly to normal encoders, with the additional
feature that it can accept MULTIPLE INPUTS at a time, and give an
output based on the input with the highest priority.
Multiplexers and Demultiplexers
A multiplexer is a circuit used to select and route any one of the
several input signals to a single output.
A demultiplexer is a circuit with one input and many outputs. By
applying control signal, we can connect any input to the output.
Multiplexers and Demultiplexers
Multiplexers and Demultiplexers
Sequential Logic
Circuits
UNIT 3
Sequential Logic
Sequential logic is a type of logic circuit
whose output depends not only on the
present value of its input signals but also on
the sequence of past inputs.
This is in contrast to combinational logic,
whose output is only a function of the
present inputs.
The output from the past state serves as
an input for the present state.
Types of Sequential Logic
ASYNCHRONOUS SYNCHRONOUS

Does not depend on CLOCK input. Depends on CLOCK input.

Output changes immediately as the input Output changes immediately as the CLOCK
changes. signal is received.
In cascaded flip-flops, each output changes In cascaded flip-flops with a common CLOCK
one after the other. input, output changes simultaneously.
Types of Sequential Logic
Flipflops and Latches
One-bit memory devices
Bi-stable devices
Can be constructed using either NAND gates or NOR gates, but NOT
BOTH.
Flipflops are associated with SYNCHRONOUS operations, whereas
Latches are associated with ASYNCHRONOUS operations.
Types of Flipflops
SR Flipflop – the most basic type of flipflop, but has the disadvantage of
having an invalid input called “race condition”.
JK Flipflop – an improvement of the SR Flipflop that eliminates the invalid
condition. The JK flip flop was named after Jack Kilby, the Texas Instruments
engineer that invented the integrated circuit in 1958.
D (delay) Flipflop – a digital electronic circuit used to delay the change of
state of its output signal (Q) until the next rising edge of a clock timing input
signal occurs.
T (toggle) Flipflop – a modification of the JK Flipflop where both inputs are
connected together, forming one equivalent input.
SR Flipflop
JK Flipflop
D Flipflop
T Flipflop
Counters
A sequential logic circuit used to count pulses
Most common application of flipflops
A group of cascaded flipflops with interconnected clock signals.
Types of Counters
ASYNCHRONOUS (RIPPLE) SYNCHRONOUS (PARALLEL)
The CLOCK signal is applied only to the first The CLOCK signal is applied to each flipflop.
flipflop.
Algorithmic State
Machine (ASM)
UNIT 4
Algorithmic State Machine (ASM)
Charts
It is a method for designing Finite State Machines (FSMs).
FSM – a synchronous sequential logic circuit that has a finite
number of output states.

Mealy State Machine Moore State Machine

 Basic Components of ASM Charts

State Box
The output of the state Decision Box
is indicated inside the A diamond indicates that the
stated condition/expression is
rectangle box
to be tested and the exit path
is to be chosen accordingly.
Conditional Output Box
An oval denotes the output signals that
are of Mealy type. These outputs
depend not only on the state but also
the inputs to the FSM.
QUESTION 15
A full adder is composed of:
A. 2 half adders
B. 2 half adders and an extra AND
C. 2 half adders and an extra OR gate
D. 2 half adders and an extra XOR gate
QUESTION 16
When the carry in and carry out of successive full
adders are connected, it is a
A. Carried Adder
B. Binary Carried Adder
C. Binary Series Adder
D. Binary Parallel Adder
QUESTION 17
A 16-input binary encoder has how many outputs?
A. 16
B. 8
C. 4
D. 2
QUESTION 18
An encoder that can have more than 1 input in a HIGH
state but consider only one input is a/an
A. Priority Encoder
B. Important Encoder
C. PWD Encoder
D. Senior Citizen Encoder
QUESTION 19
An 8-input multiplexer has how many output/s?
A. 8
B. 4
C. 2
D. 1
QUESTION 20
Sequential Logic Circuits, based on the stability of
their output, are
A. Astable devices
B. Monostable devices
C. Bistable devices
D. Tristable devices
QUESTION 21
Which of the following has an unstable output?
A. SR Flipflop
B. JK Flipflop
C. D Flipflop
D. T Flipflop
QUESTION 22
To convert a JK Flipflop into a D Flipflop, which of the
following should be done?
A. Combine both inputs into a single input
B. Invert one input, then combine into a single input
C. Invert both inputs, then combine into a single input
D. Combine both inputs into a single input, then invert
QUESTION 23
A parallel counter is also called as
A. Synchronous counter
B. Asynchronous counter
C. Quasi-synchronous counter
D. Binary Parallel Adder
QUESTION 24
For asynchronous counters using T flipflops, the
inputs should be connected to
A. The previous output
B. The clock signal
C. VCC or Logic 1
D. Ground or Logic 0
QUESTION 25
In ASM charts, it is represented by a diamond.
A. State Box
B. Decision Box
C. Conditional Output Box
D. Letter B