Chapter 4

The Processor

Chapter 4 — The Processor — 1

• Instruction Execution
• Building a Data Path
• Designing a Control Unit
• Hardwired Control
• Micro programmed Control
• Pipelining
• Data Hazard
• Control Hazards
Instruction Execution
 Instruction Execution
• PC points to instruction memory,
– To FETCH instruction
• Register numbers point to the register file,
– To read register contents
• Depending on instruction class
– Use ALU to calculate
• Arithmetic result
• Memory address for load/store
• Branch target address
– Access data memory for load/store
– PC  target address or next instruction (PC + 4)
Basic MIPS Implementation
Building a Data Path
 Data path Segment for
Arithmetic-Logic Instructions
Data path Segment for Store word and Load
Word Instructions
Data Path Segment For Branch Instructions
Creating a single data path
 ALU Control
• ALU used for
– Load/Store: F = add
– Branch: F = subtract
– R-type: F depends on funct field
ALU control Function
0000 AND
0001 OR
0010 add
0110 subtract
0111 set-on-less-than
1100 NOR
 ALU Control
Assume 2-bit ALUOp derived from opcode
Combinational logic derives ALU control
 The Main Control Unit
• Control signals derived from instruction

R-type 0 rs rt rd shamt funct

31:26 25:21 20:16 15:11 10:6 5:0

Load/
35 or 43 rs rt address
Store
31:26 25:21 20:16 15:0

Branch 4 rs rt address
31:26 25:21 20:16 15:0

opcode always read, write for sign-extend

read except R-type and and add
for load load
The datapath with all necessary multiplexors and all control lines identified.
 Effect of the 7 control signals in the datapath

The effect of each of the seven control signals. When the 1-bit control to a twoway multiplexor is asserted, the multiplexor selects
the input corresponding to 1. Otherwise, if the control is deasserted, the multiplexor selects the 0 input. Remember that the state
elements all have the clock as an implicit input and that the clock is used in controlling writes. Gating the clock externally to a state
element can create timing problems.

Chapter 4 — The Processor — 18

Simple Datapath With Control Unit
 Setting of control lines

The setting of the control lines is completely determined by the opcode fields of the
instruction.

Chapter 4 — The Processor — 20

R-Type Instruction
Load Instruction
Branch-on-Equal Instruction
Finalizing Control
 Implementing Jumps
Jump 000010 address
31:26 25:0
• Jump uses word address
• Update PC with concatenation of
– Top 4 bits of old PC
– 26-bit jump address
– 00
Add
4
4
Jump
Instruction Shift
Memory
address
left 2 28
PC Read Instruction
Address 26

• Need an extra control signal decoded from opcode

Datapath With Jumps Added