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Computer Organization & Architecture


Module 4 - Part 1 .

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Microprogrammed Control
Control Unit
● The function of the control unit in a digital computer is to initiate sequences of microoperations.
● Two methods of implementing control unit are
○ Hardwired control
○ Microprogrammed control.
● Hardwired Control
○ Design involves the use of fixed instructions, fixed logic blocks, encoders, decoders, etc.
○ Key characteristics are high-speed operation, expensive, relatively complex, and no flexibility of adding
new instructions.
○ Example CPUs: Intel 8085, Motorola 6802, and any RISC (Reduced Instruction Set Computer) CPUs.

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Microprogrammed Control Unit
● A control unit whose binary control variables are stored in memory is called a microprogrammed control
unit.
● Main advantage - for different control sequence; only have to change microprogram residing in control
memory. (No need of hardware changes)
● The control function that specifies a microoperation is a binary variable.
● The control variables at any given time can be represented by a string of 1’s and 0’s called a control word.
● Each word in control memory contains a microinstruction.
● The microinstruction specifies one or more microoperations.
● A sequence of microinstructions constitutes a microprogram.

Microoperations ➙ Control word ➙ Microinstruction ➙ Microprogram ➙ Control Memory.

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Microprogrammed Control Unit
● A computer with microprogrammed control unit will have 2 memories.
○ Main Memory.
○ Control Memory.
● The main memory is available to the user for storing the programs.
● The contents of main memory may alter when the data are manipulated and every time that the program is
changed.
● A memory that is part of a control unit is referred to as a control memory.
● The control memory holds a fixed microprogram that cannot be altered by the user and contains various
control signals.
● The control memory can be a read-only memory (ROM) since alterations are not needed.
● Writable control memory is used in dynamic programing.

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Microprogrammed Control Unit

● The control memory is a ROM in which all control information is permanently stored.
● The control address register specifies the address of the microinstruction
● Control data register holds the microinstruction read from memory.
● The microinstruction contains a control word that specifies one or more microoperations for the data
processor.
● The next address is computed in the next address generator(sequencer) and then transferred into the
control address register to read the next microinstruction.
● The control data register(pipeline register) holds the present microinstruction while the next address is
computed and read from memory.

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Address Sequencing

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Address Sequencing

● Microinstructions are stored in control memory in groups, with each group specifying a routine.
● Each computer instruction has its own microprogram routine in control memory to generate the
microoperations that execute the instruction.
● The hardware that controls the address sequencing must be capable of sequencing the microinstructions
within a routine and be able to branch from one routine to another.

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Executing a Single Instruction

● Instruction Fetch Routine


○ An initial address is loaded into the CAR when power is turned on.
○ Routine is sequenced by incrementing the control address register(CAR).
○ At the end of the routine, the instruction is in the instruction register (IR)
● Effective Address Computation Routine
○ It determines the effective address of the operand.
○ Routine can be reached through a branch microinstruction, based on the status of the mode bits of the
instruction.
○ At the end the address of the operand is in the memory address register.
● Generating Microoperations
○ Depend on the operation code part of the instruction.
○ The transformation from the instruction code bits to an address in control memory where the routine
is located is referred to as a mapping process.

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In brief, the address sequencing capabilities required in a
control memory

1. Incrementing of the control address register.


2. Unconditional branch or conditional branch,
depending on status bit conditions.
3. A mapping process from the bits of the instruction
to an address for control memory.
4. A facility for subroutine call and return.

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Incrementing CAR
● The incrementer increments the content of the
control address register by one, to select the next
microinstruction in sequence.

Conditional Branching
● Branch logic provides decision-making capabilities in
the control unit.
● The status bits, together with the field in the
microinstruction that specifies a branch address,
control the conditional branch decisions
● Simplest way to implement branch logic is to test
the specified condition and branch to an address if
the condition is met; else increment the address
register.

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Mapping of Instruction
● A special type of branch instruction.
● Here a branching is done to the first word in control memory where a microprogram routine for an instruction
is located.
● The status bits for this branch are the bits in the operation code of the instruction.
● Can be implemented using ROM.
● The bits of the instruction specify the address of a mapping ROM.
● The contents of the mapping ROM give the bits for the control address register.
● This concept provides flexibility for adding instructions for control memory as the need arises.

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Subroutines
● Programs that are used by other routines to accomplish a particular task.
● Microinstructions can be saved by employing subroutines that use common sections of microcode.
● Must have a provision for storing the return address during a subroutine call and restoring the address during
a subroutine return.
● This may be accomplished by placing the incremented address from the control address register into a
subroutine register and branching to the beginning of the subroutine.
● The subroutine register can then become the source for transferring the address for the return to the main
routine.

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Microprogram Example

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Microinstruction Format

● Generating microcode for the control memory is called microprogramming.

● 20 bits of the microinstruction are divided into four functional parts.


● Three fields Fl, F2, and F3 specify microoperations for the computer.
○ Each field is 3 bits which provides 21 microoperations.
● CD field selects status bit conditions.
○ 2 bits are encoded to specify 4 status bits conditions.
● BR field specifies the type or branch to be used.
○ Used in conjunction with the field AD, to choose the address of the next microinstruction.
● AD field contains a branch address. Since the control memory has 128 = 27 words, AD has 7 bits.

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Microinstruction Field Description

F1 Microoperation Symbol F2 Microoperation Symbol F3 Microoperation Symbol

000 None NOP 000 None NOP 000 None NOP

001 AC ← AC DR ADD 001 AC ← AC DR SUB 001 AC ← AC DR XOP

010 AC ← 0 CLRAC 010 AC ← AC DR OR 010 AC ← AC CM

011 AC ← AC 1 INCAC 011 AC ← AC DR AND 011 AC ← shl AC SHL

100 AC ← DR DRTAC 100 DR ← M [AR] READ 100 AC ← shr AC SHR

101 AC ← DR DRTAR 101 DR ← AC ACTDR 101 PC ← PC 1 INCPC

110 AR ← PC PCTAR 110 DR ← DR 1 INCDR 110 PC ← AR ARTPC

111 M [AR] ← DR WRITE 111 DR(010) ← PC PCTDR 111 Reserved

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Microinstruction Field Description
CD Condition Symbol Comments BR Symbol Function

00 Always 1 U Unconditional branch 00 JMP CAR ← AD if condition = 1


CAR ← CAR 1 if condition = 0
01 DR(15) I Indirect address bit
01 CALL CAR ← AD, SBR ← CAR 1 if condition = 1
10 AC(15) S Sign bit of AC CAR ← CAR 1 if condition = 0

11 AC 0 Z Zero value in AC 10 RET CAR ← SBR (Return from subroutine)

11 MAP CAR(25) ← DR(1114), CAR(0,l,6) ← 0

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Symbolic Microinstructions

● Symbolic microprogram can be translated into its binary equivalent by means of an assembler.
● Each symbolic microinstruction is divided into five fields
○ Label
○ Microoperations
○ CD
○ BR
○ AD
● The label field may be empty or it specify a symbolic address.
● It is terminated with a colon (:)
● The microoperations field consists of one, two, or three symbols, separated by commas.
There may be no more than one symbol from each F field.
The NOP symbol is used when the microinstruction has no microoperations.

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Symbolic Microinstructions

● The CD field has one of the letters U, I, S, or Z.


● BR field contains one of the four symbols JMP, CALL, RET, MAP.
● The AD field specifies a value for the address field of the microinstruction in one of three possible ways:
○ With a symbolic address, which must also appear as a label.
○ With the symbol NEXT to designate the next address in sequence.
○ When the BR field contains a RET or MAP symbol, the AD field is left empty.
● We will use also the pseudoinstruction ORG to define the origin, or first address, of a microprogram routine.

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The Fetch Routine

● The microinstructions needed for the fetch routine are


AR ← PC
DR ← M[AR], PC ← PC + 1
AR ← DR(0 - 10), CAR(25) ← DR(11 - 14), CAR(0,1,6) ← 0
● Symbolic microprogram for the fetch routine
ORG 64
FETCH: PCTAR U JMP NEXT
READ,INCPC U JMP NEXT
DRTAR U MAP
● Equivalent binary microprogram
Binary Address Fl F2 F3 CD BR AD
1000000 110 000 000 00 00 1000001
1000001 000 100 101 00 00 1000010
1000010 101 000 000 00 11 0000000

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Design of Control Unit

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● Bits of the microinstruction are usually divided into
fields, with each field defining a separate function.
(F1-F2-F3, CD, BR,AD)
● Each field requires a decoder to produce the
corresponding control signals.
● Each of the three fields of the microinstruction
presently available in the output of control memory
are decoded with a 3x8 decoder to provide eight
outputs.
● Each of these outputs must be connected to the
proper circuit to initiate the corresponding
microoperation.

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Microprogram Sequencer
● The basic components of microprogrammed control unit are the control memory and the circuits that select
the next address.
● The address selection part is called as microprogram sequencer.
● Microprogram sequencer can be constructed with digital functions to suit a particular application.
● Two imp. factors that must be considered while designing the microinstruction sequencer:
○ The size of the microinstruction.
○ The address generation time.
● The purpose of microprogram sequencer is to present an address to the control memory so that a
microinstruction may be read and executed.
● The next address logic of the sequencer determines the specific address source to be loaded into the CAR.
● The choice of the address source is guided by the next address information bits that the sequencer receives
from address information bits that the sequencer receives from the present microinstruction.

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