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• It consists of full adders connected in a chain. with the output carry from
each full-adder connected to the input carry of the next full-adder in the
chain.
• The number of full adders in a parallel binary adder depends on the number
of bits present in the number for the addition.
• If 2-bits numbers are to be added, then there will be 2-full adder in the
parallel binary adder.
Addition of 2 -bit
• When one binary number is added to another, each
column generates a sum bit and a 1 or 0 carry bit to
the next column to the left.
• To add two binary numbers, a full-adder (FA) is
required for each bit in the numbers.
• for 2-bit numbers, two adders are needed; for 4-bit
numbers, four adders are used; and so on.
Addition of 2 -bit
The carry output of each adder is connected to the carry input of
the next higher-order adder
Notice that either a half-adder can be used for the least significant
position or the carry input of a full-adder can be made 0
(grounded) because there is no carry input to the least significant
bit position.
Exercise 1
• Determine the sum generated by the 3-bit
parallel adder and show the intermediate
carries when the binary numbers 101 and 011
are being added.
4- bit Parallel Adder
4- bit Parallel Adder
• The interconnection of four full-adder (FA) circuits to provide a 4-bit
parallel adder.
C out
4-bit Full-adder
• When the 4-bit full-adder circuit is enclosed within an IC
package, it has four terminals for the augends bits, four
terminals for the addend bits, four terminals for the sum
bits, and two terminals for the input and output carries.
Types of Parallel Adders
• The parallel adders can be placed into two categories
based on the way in which internal carries from stage to
stage are handled.
• Ripple carry and look-ahead carry(Carry look-ahead
adder).
• Externally, both types of adders are the same in terms of
inputs and outputs.
• The difference is the speed at which they can add
numbers.
• The carry look-ahead adder is much faster than the ripple
carry adder.
RIPPLE CARRY ADDER:
• In the parallel adder, the carry –out of each stage is connected to the carry-in of the
next stage.
• The sum and carry-out bits of any stage cannot be produced, until sometime after the
carry-in of that stage occurs.
• This is due to the propagation delays in the logic circuitry, which lead to a time delay
in the addition process.
• The carry propagation delay for each full adder is the time between the
application of the carry-in and the occurrence of the carry-out.
• The parallel adder in which the carry-out of each full-adder is the carry-in
to the next most significant adder is called a ripple carry adder.
• The greater the number of bits that a ripple carry adder must add, the greater the time
required for it to perform a valid addition.
• If two numbers are added such that no carries occur between stages, then the add
time is simply the propagation time through a single full-adder.
RIPPLE CARRY ADDER
Full-adder 1 (FA1) cannot produce a potential output carry until an input carry is
applied. Full-adder 2 (FA2) cannot produce a potential output carry until FA1
produces an output carry and so on.
Why Ripple Carry Adder is Called So?
• Ripple Carry Adder does not allow to use all the full
adders simultaneously.
• Each full adder has to necessarily wait until the carry bit
becomes available from its adjacent full adder.
• This increases the propagation time.
• Due to this reason, ripple carry adder becomes extremely
slow.
Carry Look ahead Adder
• Carry Look Ahead Adder is an improved version of the
ripple carry adder.
• It generates the carry-in of each full adder simultaneously
without causing any delay.
• It examines all the input bits simultaneously and also
generates the carry-in bits for all the stages simultaneously.
• The look-ahead carry adder anticipates the output carry of
each stage, and based on the inputs, produces the output
carry by either carry generation or carry propagation.
• Carry generation occurs when an output carry is produced (generated) internally
by the full-adder. A carry is generated only when both input bits are 1s. The
generated carry, Cg, is expressed as the AND function of the two input bits, A and
B.
Cg = AB
• Carry propagation occurs when the input carry is rippled to become the output
carry. An input carry may be propagated by the full-adder when either or both of
the input bits are 1s. The propagated carry, Cp, is expressed as the OR function of
the input bits.
Cp = A B
• The conditions for carry generation and carry propagation are illustrated in Figure
6–15. The three arrowheads symbolize ripple (propagation).
Illustration of conditions for carry generation and carry
propagation
propagate
Cout = Cg + CpCin
• For each full adder, the output carry is dependent on the
generated carry (Cg), the propagated carry (Cp), and its
input carry (Cin).
• The Cg and Cp functions for each stage are immediately
available as soon as the input bits A and B and the input carry
to the LSB adder are applied because they are dependent only
on these bits.
• The input carry to each stage is the output carry of the
previous stage.
• Based on this analysis, we can now develop expressions for
the output carry, Cout, of each full-adder stage for the 4-bit
example.
• Advantages of Carry Look-ahead Adder
• In this adder, the propagation delay is reduced.
• The carry output at any stage is dependent
only on the initial carry bit of the beginning
stage.
• Using this adder it is possible to calculate the
intermediate results. This adder is the fastest
adder used for computation.
BCD Adder
The sum 1 1 1 0 is an invalid BCD number. This has occurred because the
sum of the two digits exceeds 9. Whenever this occurs the sum has to be
corrected by the addition of six (0110) in the invalid BCD number,
Sum equals or less than 9, with carry 1
• Let us consider addition of 8 and 9 in BCD
To get the correct BCD result correction factor of 6 has to be added to the least significant digit
sum,
• we can summarize the BCD addition procedure as
follows :
– Add two BCD numbers using ordinary binary addition.
– If four-bit sum is equal to or less than 9, no correction is
needed. The sum is in proper BCD form.
– If the four-bit sum is greater than 9 or if a carry is
generated from the four-bit sum, the sum is invalid.
– To correct the invalid sum, add 01102 to the four-bit sum.
If a carry results from this addition, add it to the next
higher-order BCD digit.
• Thus to implement BCD Adder Circuit we require :
– 4-bit binary adder for initial addition
– Logic circuit to detect sum greater than 9 and
– One more 4-bit adder to add 01102 in the sum if sum is
greater than 9 or carry is 1.
K- Map for sum>9
The above equation represents the condition when sum >9. When we add C out to this sum
, we get the representation for both the invalid choices.(i.e. sum>9 and carry =1)
With this design information we can draw the BCD Adder Block Diagram
0110
• the two BCD numbers, together with input carry, are first added in the top 4-bit binary adder to produce a binary sum.
When the output carry is equal to zero (i.e. when sum ≤ 9 and Cout = 0) nothing (zero) is added to the binary sum.
When it is equal to one (i.e. when sum > 9 or Cout = 1), binary 0110 is added to the binary sum through the bottom 4-bit binary adder.
The output carry generated from the bottom binary adder can be ignored, since it supplies information already available at the
output-carry terminal.
Binary to Gray Code Converter
• The logical circuit which converts the binary code to equivalent gray
code is known as binary to gray code converter.
Gray to Binary Code Converter