Power Electronic System Design I

Winter 2010
Steven Trigno, Satya Nimmala, Romeen Rao

Buck-Boost Converter Analysis

iL

Vc

+
Vg

PWM

iC

Figure 1-Buck-boost circuit schematic implemented with practical switch

When the transistor is turned ON, the diode is reverse-biased; therefore, not conducting (turned OFF)
and the circuit schematic looks like as follows: 0 < t < DTs
Transistor ON, Diode OFF

+
Vg

Vc

VL

L
iC

ig

iL

Figure 2-Schematic of buck-boost converter when the switch is ON

VL(t) = Vg iL.RON Vg iL.RON

iC(t) = -v(t) / R

ig(t) = iL(t) IL
When the transistor is OFF, the Diode is turned ON (DTs < t < Ts). The circuit is shown in fig 3:

Transistor OFF, Diode ON

+
Vg

Vc

VL

L
iC

iL

ig

Figure 3 Schematic Buck-boost converter when the switch is OFF

VL(t) = -v(t) -V
Ic(t) = ()

()

Ig(t) = 0

volt.second balance:

<VL(t)> = 0 = D(Vg - IL.RON) + D(-V)

charge balance:

<ic(t)> = 0 = D(-V/R) + D(IL V/R)

Average input current:

<ig> = Ig = D(IL) + D(0)

Next, we construct the equivalent circuit for each loop equation:

Inductor loop equation:

DVg - IL.DRon DV = <VL> = 0

IL
DRon
+
_

DVg

Capacitor node equation:

+
_

DV

= < > = 0

+
R

DIL

Input current (node) equation: Ig = D.IL

_
DIL

Vg
+
Ig

Then we draw the circuit models together as shown below:

DRon

IL

_
Vg

Ig

+
DIL

+
_

DVg

DV

+
_

DIL

1:D transformer
reversed polarity marks

Model including ideal dc transformers:

D:1 transformer

IL
1:D

D:1

Ig

+
R

Vg
+

()
()

+
+

( )

IL =

And for the efficiency ():

DRon

Ploss = .

Discontinuous Conduction Mode in Buck-Boost Converter

iL
_

Vg

L
PWM

V
C

Figure 4-Buck-boost converter

During D1Ts:

iL
_

Vg

V
C

Figure 5-Transistor ON, Diode OFF

VL = Vg

During D2Ts:

iL
_

Vg
VL

V
+

Figure 6 - Transistor OFF, Diode ON

VL = -V
During D3Ts:

iL
_

Vg
VL

V
+

Figure 7 - Transistor OFF, Diode OFF

VL = 0
Boundary between modes:
CCM:

(i = peak ripple in L)

(V = peak ripple in C)

IL =

(average inductor current)

Boundary:

>
<

( )

>

>

in CCM

> ()

Buck Boost Convertor

DTS

DTS
KVL

-Vg + VL = 0

-VL + V = 0

VL = Vg

VL = V
KCL

ic =

ic = iL VV

VR

Inductor volt sec balance:

< VL > = DVg + D V = 0
D V = -DVg
V
D

=
Vg
1D
Capacitor Charge Balance:
< ic > = D

V
V

VR + D i VR

= D

V
VR + D i L D V R

= D iL D

V
V
VR D VR

= D iL

V
(D
VR + D)

= D iL

V
VR = 0

iL =

1D

State Space Analysis

DTs:
Apply KVL to fig.1.
+

=0

Apply KCL to fig.1.

+ =0

= 1
1

= 1
+ 1

(1)

(2)

By comparing the equations (1) and (2) we get values of 1 and 1

1 =

0
1

1
1 =
0

DTs:
Apply KVL to fig.2.

+ = 0

Apply KCL to fig.2.

+

+ =0

=
1

= 1
+ 1

0
+
(3)

0
(4)

By comparing the equations (3) and (4) we get values of 2 and 2

2 =

0
1

2 =

0
0

= 1 + 2

= 1 + 2

=
0
= -

1

1
0

=
=

Calculating inductor current ripple and capacitor voltage ripple:

We know that the following formula for calculating the ripple values
= (1 + 1)

=
= 2

Inductor current ripple is
=

Capacitor voltage ripple is

2
=