BJT Small Signal Model and AC amplifiers

We calculated the DC behavior of

the BJT (DC biasing) with a simple large-signal model as shown. In
active-linear region, this model is
simply: vBE = 0.7 V, iC = iB .
This model is sufficient for calculating the Q point as we are only
interested in ensuring sufficient design space for the amplifier, i.e., Q
point should be in the middle of
the load line in the active linear region. In fact, for our good biasing
scheme with negative feedback, the
Q point location is independent of
BJT parameters. (and, therefore,
independent of model used!)

iB

iC

vBE

vsat

vCE

A comparison of the simple model

with the iv characteristics of the
BJT shows that our simple largesignal model is very crude and is
not accurate for AC analysis.

For example, the input AC signal results in small changes in vBE around 0.7 V (Q point) and
corresponding changes in iB . The simple model cannot be used to calculate these changes
(It assume vBE is constant!). Also for a fixed iB , iC is not exactly constant as is assumed in
the simple model (see iC vs vCE graphs). As a whole, the simple large signal model is not
sufficient to describe the AC behavior of BJT amplifiers where more accurate representations
of the amplifier gain, input and output resistance, etc. are needed.
A more accurate, but still linear, model can be developed by assuming that the changes in
transistor voltages and currents due to the AC signal are small compared to corresponding
Q-point values and using a Taylor series expansion. Consider function f (x). Suppose we
know the value of the function and all of its derivative at some known point, x0 . Then, value

ECE60L Lecture Notes, Winter 2002

57

of the function in the neighborhood of x0 can be found from the Taylor Series expansion as:


(x)2 d2 f 
df 
+ ...

+
f (x0 + x) = f (x0 ) + x

dx x=x0
2 dx2 x=x0

Close to our original point of x0 , x is small and the high order terms of this expansion
(terms with (x)n , n = 1, 2, 3, ...) usually become very small. Typically, we consider only
the first order term, i.e.,


df 
f (x0 + x) f (x0 ) + x

dx x=x0

The Taylor series expansion can be similarly applied to function of two or more variables
such as f (x, y):


f 
f 


+
y
f (x0 + x, y0 + y) f (x0 , y0 ) + x
x x0 ,y0
y x0 ,y0

In a BJT, there are four parameters of interest: iB , iC , vBE , and vCE . The BJT iv characteristics plots, specify two of the above parameters, vBE and iC in terms of the other two,
iB and vCE , i.e., vBE is a function of iB and vCE (written as vBE (iB , vCE ) similar to f (x, y))
and iC is a function of iB and vCE , iC (iB , vCE ).
Lets assume that BJT is biased and the Q point parameters are IB , IC , VBE and VCE . We
now apply a small AC signal to the BJT. This small AC signal changes vCE and iB by small
values around the Q point:
iB = IB + iB

vCE = VCE + vCE

The AC changes, iB and vCE results in AC changes in vBE and iC that can be found
from Taylor series expansion in the neighborhood of the Q point, similar to expansion of
f (x0 + x, y0 + y) above:
vBE
vBE
iB +
vCE
iB
vCE
iC
iC
+ vCE ) = IC +
iB +
vCE
iB
vCE

vBE (IB + iB , VCE + vCE ) = VBE +

iC (IB + iB , VCE

where all partial derivatives are calculated at the Q point and we have noted that at the Q
point, vBE (IB , VCE ) = VBE and iC (IB , VCE ) = IC . We can denote the AC changes in vBE
ECE60L Lecture Notes, Winter 2002

58

and iC as vBE and iC , respectively:

vBE (IB + iB , VCE + vCE ) = VBE + vBE
iC (IB + iB , VCE + vCE ) = IC + iC
So, by applying a small AC signal, we have changed iB and vCE by small amounts, iB and
vCE , and BJT has responded by changing , vBE and iC by small AC amounts, vBE and
iC . From the above two sets of equations we can find the BJT response to AC signals:
vBE =

vBE
vBE
iB +
vCE ,
iB
vCE

iC =

iC
iC
iB +
vCE
iB
vCE

where the partial derivatives are the slope of the iv curves near the Q point. We define
hie

vBE
,
iB

hre

vBE
,
vCE

hf e

iC
,
iB

hoe

iC
vCE

Thus, response of BJT to small signals can be written as:

vBE = hie iB + hre vCE

iC = hf e iB + hoe vCE

which is our small-signal model for BJT.

We now need to relate the above analytical model to circuit elements so that we can solve
BJT circuits. Consider the expression for vBE
vBE = hie iB + hre vCE
Each term on the right hand side should have units of Volts. Thus, hie should have units of
resistance and hre should have no units (these are consistent with the definitions of hie and
hre .) Furthermore, the above equation is like a KVL: the voltage drop between base and
emitter is written as sum of voltage drops across two elements. The voltage drop across the
first element is hie iB . So, it is resistor with a value of hie . The voltage drop across the
second element is hre vCE . Thus, it is dependent voltage source.
i

V1 = hie iB
-

+
V2 = hre v CE

ECE60L Lecture Notes, Winter 2002

h ie

hre v CE

+
-

59

Now consider the expression for iC :

iC = hf e iB + hoe vCE
Each term on the right hand side should have units of Amperes. Thus, hf e should have no
units and hoe should have units of conductance (these are consistent with the definitions of
hoe and hf e .) Furthermore, the above equation is like a KCL: the collector current is written
as sum of two currents. The current in first element is hf e iB . So, it is dependent current
source. The current in the second element is proportional to hoe /vCE . So it is a resistor
with the value of 1/hoe .
i

i1 = h fe iB

v
i = h oe v
2

CE

1/hoe

CE

CE

Now, if put the models for BE and

CE terminals together we arrive at
the small signal hybrid model for
BJT. It is similar to the hybrid
model for a two-port network (Carlson Chap. 14).

C
+

hfe iB

h ie

+
v

BE

hre v CE

+
-

C
+

hfe iB
1/hoe

CE

The small-signal model is mathematically valid only for signals with small amplitude. But
the model is so useful that is often used for sinusoidal signals with amplitudes approaching
those of Q-point parameters by using average values of h parameters. h parameters are
given in manufacturers spec sheets for each BJT. It should not be surprising to note that
even in a given BJT, h parameter can vary substantially depending on manufacturing
statistics, operating temperature, etc. Manufacturers spec sheets list these h parameters
and give the minimum and maximum values. Traditionally, the geometric mean of the
minimum and maximum values are used as the average value in design (see table).
Since hf e = iC /iB , BJT = iC /iB is sometimes called hF E in manufacturers spec sheets
and has a value quite close to hf e . In most electronic text books, , hF E and hf e are used
interchangeably.

ECE60L Lecture Notes, Winter 2002

60

Typical hybrid parameters of a general-purpose 2N3904 NPN BJT

Minimum
1
0.5 104
100
1
25
10

r = hie (k)
hre
hf e
hoe (S)
ro = 1/hoe (k)
re = hie /hf e ()

Maximum
10
8 104
400
40
1,000
25

Average*
3
2 104
200
6
150
15

* Geometric mean.
As hre is small, it is usually ignored in analytical calculations as it makes analysis much
simpler. This model, called the hybrid- model, is most often used in analyzing BJT circuits.
In order to distinguish this model from the hybrid model, most electronic text books use a
different notation for various elements of the hybrid- model:
r = hie
i

1
hoe

= hf e
i

+
v

ro =

BE

hfe iB
h ie

1/hoe

BE

ro

The above hybrid- model includes a current-controlled current source. This implies that
BJT behavior is controlled by iB . In reality, vBE controls the BJT behavior. A variant of the
hybrid- model can be developed which includes a voltage-controlled current source. This
can be achieved by noting it the above model that vBE = hie iB and
hf e iB = hf e

vBE
= gm vBE
hie

hf e
Transfer conductance
hie
1
hie
re
=
Emitter resistance
gm
hf e
gm

ECE60L Lecture Notes, Winter 2002

BE

gm vBE

+
r

ro

61

BJT Amplifier Circuits

As we have developed different models for DC signals (simple large-signal model) and AC
signals (small-signal model), analysis of BJT circuits follows these steps:
DC biasing analysis: Assume all capacitors are open circuit. Analyze the transistor circuit
using the simple large signal mode as described in pp 57-58.
AC analysis:
1) Kill all DC sources
2) Assume coupling capacitors are short circuit. The effect of these capacitors is to set a
lower cut-off frequency for the circuit. This is analyzed in the last step.
3) Inspect the circuit. If you identify the circuit as a prototype circuit, you can directly use
the formulas for that circuit. Otherwise go to step 3. 3) Replace the BJT with its small
signal model.
4) Solve for voltage and current transfer functions and input and output impedances (nodevoltage method is the best).
5) Compute the cut-off frequency of the amplifier circuit.
Several standard BJT amplifier configurations are discussed below and are analyzed. Because
most manufacturer spec sheets quote BJT h parameters, I have used this notation for
analysis. Conversion to notation used in most electronic text books (r , ro , and gm ) is
straight-forward.
Common Collector Amplifier (Emitter Follower)
VCC

DC analysis: With the capacitors open circuit, this circuit is the

same as our good biasing circuit of page 57 with Rc = 0. The
bias point currents and voltages can be found using procedure
of pages 57 and 58.

R1
vi

Cc
vo

AC analysis: To start the analysis, we kill all DC sources:

R2

RE

VCC = 0
R1
vi

Cc

vi

Cc

vo

vo
E

R2

ECE60L Lecture Notes, Winter 2002

RE

R1

R2

RE

62

We can combine R1 and R2 into RB (same resistance that we encountered in the biasing
analysis) and replace the BJT with its small signal model:
vi

Cc

+
v
RB

BE

vi

Cc

hfe iB

vo

1/hoe

h ie

RB

RE

1/hoe

vo

h ie

h fe iB

RE

The figure above shows why this is a common collector configuration: collector is shared
between input and output AC signals. We can now proceed with the analysis. Node voltage
method is usually the best approach to solve these circuits. For example, the above circuit
will have only one node equation for node at point E with a voltage vo :
vo v i vo 0
vo 0
+
iB +
=0
r
ro
RE
Because of the controlled source, we need to write an auxiliary equation relating the control
current (iB ) to node voltages:
iB =

vi v o
r

Substituting the expression for iB in our node equation, multiplying both sides by r , and
collecting terms, we get:


vi (1 + ) = vo 1 + + r

1
1
+
ro RE



= vo

"

r
1++
ro k R E

Amplifier Gain can now be directly calculated:

Av

vo
=
vi
1+

r
(1 + )(ro k RE )

Unless RE is very small (tens of ), the fraction in the denominator is quite small compared
to 1 and Av 1.
To find the input impedance, we calculate ii by KCL:
ii = i1 + iB =

vi v o
vi
+
RB
r

ECE60L Lecture Notes, Winter 2002

63

Since vo vi , we have ii = vi /RB or

Ri

vi
= RB
ii

Note that RB is the combination of our biasing resistors R1 and R2 . With alternative biasing
schemes which do not require R1 and R2 , (and, therefore RB ), the input resistance of
the emitter follower circuit will become large. In this case, we cannot use vo vi . Using the
full expression for vo from above, the input resistance of the emitter follower circuit becomes:
Ri

vi
= RB k [r + (RE k ro )(1 + )]
ii

and it is quite large (hundreds of k to several M) for RB . Such a circuit is in fact

the first stage of the 741 OpAmp.
The output resistance of the common collector amplifier (in fact for all transistor amplifiers)
is somewhat complicated because the load can be configured in two ways (see figure): First,
RE , itself, is the load. This is the case when the common collector is used as a current
amplifier to raise the power level and to drive the load. The output resistance of the circuit
is Ro as is shown in the circuit model. This is usually the case when values of Ro and Ai
(current gain) is quoted in electronic text books.
VCC

VCC

R1

R1

Cc

vi

vi

Cc

vo
R2

vo

RE = RL

R2

RE is the Load

vi

Cc

vo

vi

Cc

RL

Separate Load

i
RB

RE

RE

ro

RB

vo
B

ro

RE

RL

C
Ro

Ro

Alternatively, the load can be placed in parallel to RE . This is done when the common
collector amplifier is used as a buffer (Av 1, Ri large). In this case, the output resistance
is denoted by Ro0 (see figure). For this circuit, BJT sees a resistance of RE k RL . Obviously,
if we want the load not to affect the emitter follower circuit, we should use RL to be much
ECE60L Lecture Notes, Winter 2002

64

larger than RE . In this case, little current flows in RL which is fine because we are using
this configuration as a buffer and not to amplify the current and power. As such, value of
Ro0 or Ai does not have much use.
When RE is the load, the output resistance can
be found by killing the source (short vi ) and finding the Thevenin resistance of the two-terminal
network (using a test voltage source).

vi

Cc

B
i

vT

iB

RB

iT

ro

vT
iB
KCL:
iT = iB +
ro
KVL (outside loop):
r iB = vT

Ro

Substituting for iB from the 2nd equation in the first and rearranging terms we get:
Ro

vT
(ro ) r
(ro ) r
r
r
=

= re
iT
(1 + )(ro ) + r
(1 + )(ro )
(1 + )

where we have used the fact that (1 + )(ro )  r .

When RE is the load, the current gain in this amplifier can be calculated by noting io = vo /RE
and ii vi /RB as found above:
Ai

RB
io
=
ii
RE

In summary, the general properties of the common collector amplifier (emitter follower)
include a voltage gain of unity (Av 1), a very large input resistance Ri RB (and can
be made much larger with alternate biasing schemes). This circuit can be used as buffer for
matching impedance, at the first stage of an amplifier to provide very large input resistance
(such in 741 OpAmp). As a buffer, we need to ensure that RL  RE . The common collector
amplifier can be also used as the last stage of some amplifier system to amplify the current
(and thus, power) and drive a load. In this case, RE is the load, Ro is small: Ro = re and
current gain can be substantial: Ai = RB /RE .
Impact of Coupling Capacitor:
Up to now, we have neglected the impact of the coupling capacitor in the circuit (assumed
it was a short circuit). This is not a correct assumption at low frequencies. The coupling
capacitor results in a lower cut-off frequency for the transistor amplifiers. In order to find the
cut-off frequency, we need to repeat the above analysis and include the coupling capacitor
ECE60L Lecture Notes, Winter 2002

65

impedance in the calculation. In most cases, however, the impact of the coupling capacitor
and the lower cut-off frequency can be deduced be examining the amplifier circuit model.
Consider our general model for any
amplifier circuit. If we assume that
coupling capacitor is short circuit
(similar to our AC analysis of BJT
amplifier), vi0 = vi .

Ro

Cc
Vi

Vi

Ri

Io
+

AVi

Vo

ZL

Voltage Amplifier Model

When we account for impedance of the capacitor, we have set up a high pass filter in the
input part of the circuit (combination of the coupling capacitor and the input resistance of
the amplifier). This combination introduces a lower cut-off frequency for our amplifier which
is the same as the cut-off frequency of the high-pass filter:
l = 2 fl =

1
Ri Cc

Lastly, our small signal model is a low-frequency model. As such, our analysis indicates
that the amplifier has no upper cut-off frequency (which is not true). At high frequencies,
the capacitance between BE , BC, CE layers become important and a high-frequency smallsignal model for BJT should be used for analysis. You will see these models in upper division
courses. Basically, these capacitances results in amplifier gain to drop at high frequencies.
PSpice includes a high-frequency model for BJT, so your simulation should show the upper
cut-off frequency for BJT amplifiers.

ECE60L Lecture Notes, Winter 2002

66

VCC

Common Emitter Amplifier

DC analysis: Recall that an emitter resistor is
necessary to provide stability of the bias point.
As such, the circuit configuration as is shown
has as a poor bias. We need to include RE for
good biasing (DC signals) and eliminate it for
AC signals. The solution to include an emitter resistance and use a bypass capacitor to
short it out for AC signals as is shown.

VCC

RC

R1

RC

R1
vo

vi

vo

Cc

vi

Cc

R2

R2

Cb

RE

Good Bias using a

bypass capacitor

Poor Bias

For this new circuit and with the capacitors open circuit, this circuit is the same as our
good biasing circuit of page 57. The bias point currents and voltages can be found using
procedure of pages 57 and 58.
AC analysis: To start the analysis, we kill all DC sources, combine R1 and R2 into RB and
replace the BJT with its small signal model. We see that emitter is now common between
input and output AC signals (thus, common emitter amplifier. Analysis of this circuit is
straightforward. Examination of the circuit shows that:
vi

vi = r iB

Cc

vo = (Rc k ro ) iB

Rc
vo
= (Rc k ro ) Rc =
Av
vi
r
r
re
Ri = R B k r
Ro = r o

C
i

RB

vo

iB

RC

ro

E
Ro

The negative sign in Av indicates 180 phase shift between input and output. The circuit
has a large voltage gain but has medium value for input resistance.
As with the emitter follower circuit, the load can be configured in two ways: 1) Rc is the
load. Then Ro = ro and the circuit has a reasonable current gain. 2) Load is placed in
parallel to Rc . In this case, we need to ensure that RL  Rc . Little current will flow in RL
and Ro and Ai values are of not much use.
Lower cut-off frequency: Both the coupling and bypass capacitors contribute to setting
the lower cut-off frequency for this amplifier. After some involved analysis one arrives at:
l = 2 fl =

1
1
+
Ri Cc (RE + re )Cb

ECE60L Lecture Notes, Winter 2002

67

Common Emitter Amplifier with Emitter resistance

VCC

A problem with the common emitter amplifier is that its gain

depend on BJT parameters Av (/r )Rc . Some form of feedback is necessary to ensure stable gain for this amplifier. One
way to achieve this is to add an emitter resistance. Recall impact of negative feedback on OpAmp circuits: we traded gain
for stability of the output. Same principles apply here.

R1

RC
vo

Cc

vi

R2

DC analysis: With the capacitors open circuit, this circuit is the

RE
same as our good biasing circuit of page 57. The bias point
currents and voltages can be found using procedure of pages 57
and 58.
AC analysis: To start the analysis, we kill all DC sources, combine R1 and R2 into RB and
replace the BJT with its small signal model. Analysis is straight forward using node-voltage
method.
vi

vE
vE v o
vE v i
+
iB +
=0
r
RE
ro
vo v E
vo
+
+ iB = 0
RC
ro
vi v E
iB =
(Controlled source aux. Eq.)
r

C1

+
v
RB

BE

vo

iB
r

ro

E
RE

RC

Substituting for iB in the node equations and noting 1 + , we get:

vE
vE v i vE v o
+
+
=0
RE
r
ro
vo
vo v E
vE v i
+

=0
RC
ro
r
Above are two equations in two unknowns (vE and vo ). Adding the two equation together
we get vE = (RE /RC )vo and substituting that in either equations we can find vo .
Alternatively, we can find compact and simple solutions by noting that terms containing ro
in the denominator are usually small as ro is quite large. In this case, the node equations
simplify to (using r / = re ):
1
vi
RE
1
vE
+
=
vE =
vi
RE re
re
RE + r e


RE
RC
RC
RC
vo =
(vE vi ) =
1 vi =
vi
re
re RE + r e
RE + r e


ECE60L Lecture Notes, Winter 2002

68

Then, the voltage gain and input and output resistance can also be easily calculated:
RC
RC
vo
=

vi
RE + r e
RE
Ri = RB k [(RE + re )]
Ro = re
Av =

As before the minus sign in Av indicates a 180 phase shift between input and output signals.
Note the impact of negative feedback introduced by the emitter resistance. The voltage gain
is independent of BJT parameters and is set by RC and RE as RE  re (recall OpAmp
inverting amplifier!). The input resistance is increased dramatically.
A Possible Biasing Problem: The gain of the common
emitter amplifier with the emitter resistance is approximately
RC /RE . For cases when a high gain (5-20) is needed, RE may
be become so small that the necessary good biasing condition,
VE = RE IE > 1 V cannot be fulfilled. The solution is to use a
by-pass capacitor as is shown. The AC signal sees an emitter
resistance of RE1 while for DC signal the emitter resistance is
RE = RE1 + RE2 .
Lower cut-off frequency: Both the coupling and bypass capacitors contribute to setting the lower cut-off frequency for this
amplifier. After some involved analysis one arrives at:
l = 2 fl =

VCC

R1

RC
vo

vi

Cc

R2
RE1

RE2

Cb

1
1
+
Ri Cc (RE2 + re )Cb

Note that if the by-pass capacitor does not exist, the second term should not be included in
the expression for l .

ECE60L Lecture Notes, Winter 2002

69

Summary of BJT Amplifiers

Common Collector (Emitter Follower):
(RE k ro )(1 + )
1
Av =
r + (RE k ro )(1 + )

VCC

R1
vi

Cc

Ri = RB k [r + (RE k ro )(1 + )] RB

vo

(ro ) r
r

= re
(1 + )(ro ) + r

1
2 fl =
Ri Cc
Ro =

R2

VCC

Common Emitter:

Rc

(Rc k ro ) Rc =
r
r
re
Ri = R B k r

RE

Av =

R1

RC
vo

vi

Cc

Ro = r o
2 fl =

1
1
+
Ri Cc (RE + re )Cb

R2
Cb

RE

Common Emitter with Emitter Resistance:

RC
RC

RE1 + re
RE1
Ri = RB k [(RE1 + re )]

VCC

Av =

vo

Ro = r e
2 fl =

RC

R1

1
1
+
Ri Cc (RE2 + re )Cb

vi

Cc

R2
RE1

RE2

ECE60L Lecture Notes, Winter 2002

Cb

70

Examples of Analysis and Design of BJT Amplifiers

Example 1: Find the bias point and AC amplifier parameters of this circuit (Manufacturers
spec sheets give: hf e = 200, hie = 5 k, hoe = 10 S).
r = hie = 5 k

ro =

1
= 100 k
hoe

= hf e = 200

re =

r
= 25

DC analysis:
9V

Replace R1 and R2 with their Thevenin equivalent and

proceed with DC analysis (all DC current and voltages
are denoted by capital letters):

18k
vi

0.47 F
vo

RB = 18 k k 22 k = 9.9 k
22
VBB =
9 = 4.95 V
18 + 22

22k

KVL: VBB = RB IB + VBE + 103 IE

3

4.95 0.7 = IE
IE = 4 mA IC ,

IB =

9.9 10
+ 103
2.1

IB =

1k

IE
IE
=
1+
201

9V
IC

RB

IC
= 20 A

IB
+
VBE

VCE
_ _
1k

VBB

KVL: VCC = VCE + 103 IE

VCE = 9 103 4 103 = 5 V
DC Bias summary: IE IC = 4 mA,

IB = 20 A,

VCE = 5 V

AC analysis: The circuit is a common collector amplifier. Using the formulas in page 70,
Av 1
Ri RB = 9.9 k
Ro re = 25
1
1
l
=
=
fl =
= 36 Hz
3
2
2RB Cc
2 9.9 10 0.47 106

ECE60L Lecture Notes, Winter 2002

71

Example 2: Find the bias point and AC amplifier parameters of this circuit (Manufacturers
spec sheets give: hf e = 200, hie = 5 k, hoe = 10 S).
r = hie = 5 k

ro =

1
= 100 k
hoe

= hf e = 200

re =

r
= 25

DC analysis:
15 V

Replace R1 and R2 with their Thevenin equivalent and

proceed with DC analysis (all DC current and voltages
are denoted by capital letters). Since all capacitors are
replaced with open circuit, the emitter resistance for DC
analysis is 270 + 240 = 510 .

34 k

1k
vo

vi

4.7 F

5.9 k

270

RB = 5.9 k k 34 k = 5.0 k
5.9
15 = 2.22 V
VBB =
5.9 + 34
KVL: VBB = RB IB + VBE + 510IE
3

2.22 0.7 = IE

KVL: VCC

IB =

5.0 10
+ 510
2.1

IE
IE
=
1+
201

15 V

IC
RB

IC
= 15 A

= 1000IC + VCE + 510IE

IE = 3 mA IC ,

47 F

240

IB =

IB
+
VBE

VBB

VCE
_ _
270 + 240
= 510

VCE = 15 1, 510 3 103 = 10.5 V

DC Bias summary: IE IC = 3 mA,

IB = 15 A,

VCE = 10.5 V

AC analysis: The circuit is a common collector amplifier with an emitter resistance. Note
that the 240 resistor is shorted out with the by-pass capacitor. It only enters the formula
for the lower cut-off frequency. Using the formulas in page 70:
RC
1, 000
=
= 3.39
RE1 + re
270 + 25
Ri RB = 5.0 k
Av =

Ro re = 25
1
1
l
=
+
=
fl =
2
2Ri Cc 2(RE2 + re )Cb
1
1
+
= 20 Hz
3
6
25.0 10 4.7 10
2(240 + 25)47 106
ECE60L Lecture Notes, Winter 2002

72

Example 3: Design a BJT amplifier with a gain of 4 and a lower cut-off frequency of 100 Hz.
The Q point parameters should be IC = 3 mA and VCE = 7.5 V. (Manufacturers spec sheets
give: min = 100, = 200, hie = 5 k, hoe = 10 S).
VCC

r = hie = 5 k

ro =

1
= 100 k
hoe

re =

r
= 25

R1

RC
vo

The prototype of this circuit is a common emitter amplifier with an

emitter resistance. Using formulas of page 70 (re = r /hf e = 25 ),

vi

Cc

R2
RE

RC
RC

=4
|Av | =
RE + r e
RE
The lower cut-off frequency will set the value of Cc .

VCC

We start with the DC bias: As VCC is not given, we need to

choose it. To set the Q-point in the middle of load line, set
VCC = 2VCE = 15 V. Then, noting IC IE ,:
VCC = RC IC + VCE + RE IE
3

15 7.5 = 3 10 (RC + RE )

RC + RE = 2.5 k

RC
iC
RB

iB
+
vBE

VBB

vCE
_ _
RE

Values of RC and RE can be found from the above equation

together with the AC gain of the amplifier, AV = 4. Ignoring re
compared to RE (usually a good approximation), we get:
RC
=4
RE

4RE + RE = 2.5 k

RE = 500 , RC = 2. k

Commercial values are RE = 510 and RC = 2 k. Use these commercial values for the
rest of analysis.
We need to check if VE > 1 V, the condition for good biasing. VE = RE IE = 5103103 =
1.5 > 1, it is OK (See next example for the case when VE is smaller than 1 V).
We now proceed to find RB and VBB . RB is found from good bias condition and VBB from
a KVL in BE loop:
RB  ( + 1)RE
KVL:

RB = 0.1(min + 1)RE = 0.1 101 510 = 5.1 k

VBB = RB IB + VBE + RE IE

VBB = 5.1 103

3 103
+ 0.7 + 510 3 103 = 2.28 V
201

ECE60L Lecture Notes, Winter 2002

73

Bias resistors R1 and R2 are now found from RB and VBB :

R1 R2
= 5 k
R1 + R 2
R2
2.28
= 0.152
=
=
R1 + R 2
15

RB = R 1 k R 2 =
VBB
VCC

R1 can be found by dividing the two equations: R1 = 33 k. R2 is found from the equation
for VBB to be R2 = 5.9 k. Commercial values are R1 = 33 k and R2 = 6.2 k.
Lastly, we have to find the value of the coupling capacitor:
l =

1
= 2 100
Ri Cc

Using Ri RB = 5.1 k, we find Cc = 3 107 F or a commercial values of Cc = 300 nF.

So, are design values are: R1 = 33 k, R2 = 6.2 k, RE = 510 , RC = 2 k. and
Cc = 300 nF.
Example 4: Design a BJT amplifier with a gain of 10 and a lower cut-off frequency of
100 Hz. The Q point parameters should be IC = 3 mA and VCE = 7.5 V. A power supply
of 15 V is available. Manufacturers spec sheets give: min = 100, hf e = 200, r = 5 k,
hoe = 10 S.
VCC

r = hie = 5 k

ro =

1
= 100 k
hoe

re =

r
= 25

The prototype of this circuit is a common emitter amplifier with an

emitter resistance. Using formulas of page 70:

R1

RC
vo

vi

Cc

R2

RC
RC

= 10
|Av | =
RE + r e
RE

RE

The lower cut-off frequency will set the value of Cc .

We start with the DC bias: As the power supply voltage is given, we set VCC = 15 V. Then,
noting IC IE ,:
VCC = RC IC + VCE + RE IE
15 7.5 = 3 103 (RC + RE )

ECE60L Lecture Notes, Winter 2002

RC + RE = 2.5 k

74

Values of RC and RE can be found from the above equation together with the AC gain of
the amplifier AV = 10. Ignoring re compared to RE (usually a good approximation), we get:
RC
= 10
RE

10RE + RE = 2.5 k

RE = 227 , RC = 2.27 k

We need to check if VE > 1 V which is the condition for good

biasing: VE = RE IE = 227 3 103 = 0.69 < 1. Therefore,
we need to use a bypass capacitor and modify our circuits as is
shown.
For DC analysis, the emitter resistance is RE1 + RE2 while for
AC analysis, the emitter resistance will be RE1 . Therefore:

VCC

R1

RC
vo

Cc

vi

R2

DC Bias:
AC gain:

RE1

RC + RE1 + RE2 = 2.5 k

RC
= 10
Av =
RE1

Above are two equations in three unknowns. A third equation is

derived by setting VE = 1 V to minimize the value of RE1 + RE2 .

VCC

RC

VE = (RE1 + RE2 )IE

1
RE1 + RE2 =
= 333
3 103
Now, solving for RC , RE1 , and RE2 , we find RC = 2.2 k,
RE1 = 220 , and RE2 = 110 (All commercial values).

Cb

RE2

iC
RB

iB
+
vBE

VBB

vCE
_ _
RE1 + RE2

We can now proceed to find RB and VBB :

RB  ( + 1)(RE1 + RE2 )
RB = 0.1(min + 1)(RE1 + RE2 ) = 0.1 101 330 = 3.3 k
KVL:

VBB = RB IB + VBE + RE IE

VBB = 3.3 103

3 103
+ 0.7 + 330 3 103 = 1.7 V
201

Bias resistors R1 and R2 are now found from RB and VB B:

R1 R2
= 3.3 k
R1 + R 2
R2
1
=
=
= 0.066
R1 + R 2
15

RB = R 1 k R 2 =
VBB
VCC

ECE60L Lecture Notes, Winter 2002

75

R1 can be found by dividing the two equations: R1 = 50 k and R2 is found from the
equation for VBB to be R2 = 3.6k . Commercial values are R1 = 51 k and R2 = 3.6k
Lastly, we have to find the value of the coupling and bypass capacitors:
l =

1
1
+
= 2 100
Ri Cc RE2 Cb

This is one equation in two unknown (Cc and CB ) so one can be chosen freely. Typically
Cb  Cc as Ri RB  RE . Using Ri RB = 3.3 k and choosing Cb = 47 F, one find
Cc = 0.7 F (commercial value of 0.68 F).
So, are design values are: R1 = 50 k, R2 = 3.6 k, RE1 = 220 , RE2 = 110 , RC =
2.2 k, Cb = 47 F, and Cc = 680 nF.

ECE60L Lecture Notes, Winter 2002

76