UEC612 Digital Systems design

Tutorial Sheet-1
1. A majority function is generated in combinational circuit. The output is '1' if input
variables have more 1's than 0's.The output is 0 otherwise. Design a 3-input majority
function.
2. Construct 4 to 16 line decoder with an enable input using five 2 to 4 line decoders with
enable inputs.
3. Construct a 10:1 mux using three 4:1 muxes. The muxes should be interconnect and
inputs labeled so that the selection codes 0000 through 1001 can be directly applied to the
mux selection inputs without any added logic.
4. Implement binary full adder with a dual 4:1 mux and a single inverter.
5. Design JK-FF using D-FF.
6. Design Excess-3 to BCD code converter requiring that all the invalid inputs combinations
give 0000 as output code.
7. Design a 3-bit ring counter using D flip-flops.
8. Design a four-bit twisted ring counter.
9. Design a FSM for sequence detector detecting 111 or 000.
10. Design FSM for sequence detector detecting the sequence 110011.Overlapping is
allowed.
11. Design a MOD-5 asynchronous counter using T flip-flops.
12. Design a 3-bit up counter using JK flip-flops.