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  • Ross Lightfoot ECEN 248 504 Lab 2 Mehnaz 2 18 15

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    This document summarizes a lab report on understanding inverters and gate delays in circuits. The student measured the period of a 5-gate ring oscillator to be 66.1 ns, corresponding to a frequency of 15.13 MHz. The student also calculated that for a 21-gate ring oscillator with a gate delay of 10 ns, the period would be 420 ns and frequency would be 0.00238 MHz. The student concluded that gates have a range of input voltages that determine output, and that inverters in a ring form an oscillating clock signal.

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    ECEN 248 Lab 2

    Original Title

    248Lab2

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    This document summarizes a lab report on understanding inverters and gate delays in circuits. The student measured the period of a 5-gate ring oscillator to be 66.1 ns, corresponding to a frequency of 15.13 MHz. The student also calculated that for a 21-gate ring oscillator with a gate delay of 10 ns, the period would be 420 ns and frequency would be 0.00238 MHz. The student concluded that gates have a range of input voltages that determine output, and that inverters in a ring form an oscillating clock signal.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    13 views3 pages

    Ross Lightfoot ECEN 248 504 Lab 2 Mehnaz 2 18 15

    Uploaded by

    Rozay
    This document summarizes a lab report on understanding inverters and gate delays in circuits. The student measured the period of a 5-gate ring oscillator to be 66.1 ns, corresponding to a frequency of 15.13 MHz. The student also calculated that for a 21-gate ring oscillator with a gate delay of 10 ns, the period would be 420 ns and frequency would be 0.00238 MHz. The student concluded that gates have a range of input voltages that determine output, and that inverters in a ring form an oscillating clock signal.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 3

    RossLightfoot

    ECEN248504
    Lab2
    Mehnaz
    21815

    1.Objectives
    Tounderstandinvertersandtheirfunctions.Alsotoseeandunderstandgate
    delayswhenyouformaringorcircularpathinacircuit.

    2.Design

    3.Results
    Part1:

    Part2:
    MeasuredPeriod:66.1ns
    MeasuredFrequency:15.13MHz
    Delayofonegate(5ring):6.61ns

    Ifthedelayofonegateis10nswitha21ringoscilator,
    1
    f = T & T = 2 * N * Dinv
    soT=420nsandf=1/420=0.00238ns

    ArethesignalsatP,Q,R,SinFigure2periodic?Ifso,whatare
    theirtimeperiods?Howdothesesignalsdifferfromthesignalat
    nodeA?
    Nobecauseeachtimearoundthesignalwillbeoppositewhatitwasbefore.and
    A=Q=SwhileP=R

    4.Conclusion

    Inthislabwefoundthatgatesandinvertershaveanacceptablerangefor
    incomingvoltagesthatdetermineswhethertheoutputishighorlow.Additionallywe
    sawthataseriesofinverterscanbeplacedinseriesinaringtoformanoscillating
    clocksignalgoingfromhightolowvoltages,andwelearnedhowtoderivethedelayof
    asingleinvertergiventheperiodandnumberofinvertersinthering.

    5.Questions
    a)
    Whatdidyoulikemostaboutthelabassignmentandwhy?Whatdidyou
    likeleastaboutitandwhy?

    IlikedthefactthatwhenweusedtheOscilatorthatithadanautomaticbuttonto
    seetheperiod,frequencyandothermeasurablesofthewave.Idislikedhowinthefirst
    partOurvaluesweresosimilarfordifferentVinsthatIthoughtIwasdoingitwrong.

    b)
    Werethereanysectionofthelabmanualthatwereunclear?Ifso,what
    wasunclear?Doyouhaveanysuggestionsforimprovingtheclarity?

    NoIhadnoissueswiththelab.

    c)
    Whatsuggestionsdoyouhavetoimprovetheoveralllabassignment?

    Findanotherexerciseforpart1todemonstratethedesiredpointaboutvoltages

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