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Motorola 6800
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Motorola 6800 Microprocessor.

The AMI S6800 is a Motorola MC6800 clone.

The 6800 is an 8-bit microprocessor produced by Motorola and released shortly after the Intel
8080 in late 1974.[1] It had 78 instructions, including the (in)famous, undocumented Halt and
Catch Fire (HCF) bus test instruction.[2] It may have been the first microprocessor with an index
register.

It was usually packaged in a 40 pin DIP (dual-inline package).

Several first-generation microcomputers of the 1970s, available by mail order as kits or in

assembled form, used the 6800 as their CPU; examples are the MEK6800D2 development board,
the SWTPC 6800 (the first computer to use the 6800), the MITS Altair 680 range (MITS offered
these as alternatives to its Altair 8800 which used the Intel 8080), several of the Ohio Scientific
designs, Gimix, Smoke Signal Broadcasting, Midwest Scientific, and the Newbear 77-68.

The 4051, a professional grade desktop graphical system intended for user programming in
BASIC, was manufactured and sold by Tektronix. This integrated a 6800 processor, memory
card, storage display tube, keyboard, and magnetic tape cassette in a single unit and employed an
external thermal imaging printer for hard copy.
The 6800 'fathered' several descendants, the pinnacle being the greatly extended and semi-
compatible 6809, which was used in the Vectrex video game console and the TRS-80 Color
Computer, among several others. There are also many microcontrollers descended from the 6800
architecture, such as the Motorola 6801/6803, 6805, RS08, 68HC08, 68HC11 and 68HC12.

Hitachi, Ltd. acted as a second source for many of Motorola's CPUs, and also produced its own
derivatives including the 6301 and 6303, which could run 6800 code. These microprocessors
also had a couple of extra instructions added to their instruction sets.

Competitor MOS Technology came up with an architectural relative of the 6800, with its 6502
('lawsuit compatible' MPU) and its successors. The 6502 did not have the 16 bit registers of the
6800, but had more addressing modes and was substantially cheaper. The 6502 was used in
many computers and game consoles during the late 1970s and early-to-mid-1980s (most notably
the Atari 2600, Atari 400/800, Apple II, the Commodore PET, VIC-20 and Commodore 64, the
Acorn Electron/BBC Microcomputer, and the Nintendo Entertainment System/NES).

The 6800, used in the Sphere 1 personal computer, was supplanted by the Motorola 68000, used
in large numbers in the Apple Macintosh family before the introduction of the PowerPC, a RISC
technology developed by IBM and produced jointly with Motorola.

Contents
[hide]

 1 Programming model
o 1.1 6800 Bus
o 1.2 Clocking, Power
o 1.3 Criticisms
o 1.4 Designers
o 1.5 Development Systems
 2 Peripheral ICs
 3 See also
 4 References
 5 External links

[edit] Programming model

 7 A 0   7 B 0 
 15 X 0 
 15 PC 0 
 15 SP 0 
   7 CCR 0 
A - Accumulator A
B - Accumulator B
X - Index register
PC - Program Counter
SP - Stack Pointer
CCR - Conditional Code Register: Half carry, Interrupt mask, Negative, Zero, oVerflow and
Carry

The 6800 is a standard "8-bit" 2's complement microprocessor, like the Intel 8080. It supports 8-
bit bytes, 16-bit addresses and 64KB of memory. Like the 8080, code can be placed in ROM.
This is an important feature compared to some of the minicomputers of the time, especially the
PDP-8, which used a linked-list embedded in the code for subroutine linkage.

The 6800 had a 16-bit stack pointer, so the stack can be located anywhere and can grow to any
length up to the size of the memory. Compare this with the 6502 which had only an 8-bit stack
pointer and which mapped the stack into the second page (addresses 256 - 511).

Like the 8080, the 6800 supports multi-precision arithmetic using a carry flag and the ADC (add
with carry) and SBC (subtract with carry) instructions. Decimal arithmetic is supported in a
fashion similar to the 8080: there is a DAA (decimal adjust accumulator) instruction, which
corrects the result of the 2's complement ADD on two packed decimal digits. Unlike the 6502,
the 6800 also provided add and subtract without carry (ADD and SUB instructions).

Arithmetic instructions set the usual 2's complement flags: Sign, Zero, oVerflow and Carry.
Unlike the 8080 and the 6502, the 6800 had a complete set of branch instructions, basically
identical to those provided on the PDP-11, for comparing both signed and unsigned quantities.
For example, if you want to compare i with j, then load i into an accumulator (LDAA i), compare
or subtract with j (CMPA j or SUBA j) and then branch:

 BEQ - Branch if i equals j

 BNE - Branch if i does not equal j
 BHI - Branch if i is greater than j (unsigned)
 BHS - Branch if i is higher or same as j (unsigned)
 BLO - Branch if i is lower than j (unsigned)
 BLS - Branch if i is lower than or equal to j (unsigned)
 BGT - Branch if i is greater than j (signed)
 BGE - Branch if i is greater than or equal to j (signed)
 BLT - Branch if i is less than j (signed)
 BLE - Branch if i is less than or equal to j (signed)
 BPL - Branch if plus (positive or zero)
 BMI - Branch if minus (negative)
 BCC - Branch if Carry clear (same as BHS)
 BCS - Branch if Carry set (same as BLO)
 BVS - Branch if oVerflow set
  BVC - Branch if oVerflow clear
 BRA - Branch always

Unlike the PDP-11, 6502 and 8080 the 6800 was big endian, as was the IBM 360.

Unlike the PDP-11 and 6502, but like the 8080, the 6800 used borrow carry: the carry flag is set
on a borrow during subtraction instead of clear.

Unlike the 8080 and especially the PDP-8, but like the PDP-11, the 6800 had no special purpose
I/O instructions. Instead, all I/O devices share the same address space as memory.

Unlike the 8080, the 6800 had indexing, which allowed it to directly support data structures. The
base address of a data structure is loaded into the index register, and then an 8-bit unsigned offset
from the second byte of indexing instructions is added to it to read different items from the
structure.

The 6800 had four addressing modes: immediate, indexed, extended and direct (or zero-page).
The zero-page mode allows faster direct access to the first 256 bytes of memory and is similar to
the zero-page mode of the PDP-8. The zero-page can be thought of as an extension of the register
set, an idea taken much further with the zero-page indirect modes of the 6502.

The instruction set mnemonics owe a great deal to the PDP-11, and are burned into the brains of
many assembly language programmers and computer architects. Many CPUs, including the
ARM remained close to the form of the 6800 mnemonics.

[edit] 6800 Bus

Like the 8080, the 6800 defines a bus and was the center of a family of peripheral ICs, see the
table below.

The bus was particularly simple: peripherals generally needed just three control signals in
addition to the address and data lines:

 Φ2 or E (from MC6802): a clock cycle is defined as two successive falling edges of E.

 R/W a read cycle if high, or a write cycle if low.
 CS chip select if low (decoded from address lines and VMA).

The bus was clocked: setup and hold times are relative to falling edge of clock E. The 8080 bus
was strobe signal based: setup and hold times are specified relative to the rising edges of
MEM_RD, MEM_WR, IO_RD and IO_WR, which are signals generated by the 8228 system
controller chip. 6800 systems could be simpler as they did not depend on such a system
controller chip for memory timing.

[edit] Clocking, Power

There were three speed grades: 6800 ran at 1 MHz, 68A00 ran at 1.5 MHz and 68B00 ran at 2
MHz. Instructions took between 2 (for LDAA immediate) to 12 (for SWI) cycles.

Like the 4004, 4040, 8008, and 8080, the 6800 required two non-overlapping clock inputs: Φ1
and Φ2. The clocks must not overlap to prevent races in transparent latch-based designs: latches
which feed each other must not both be transparent at the same time. The 6800 used dynamic
logic: the maximum high time for Φ1 and Φ2 was 9.5 μs. Several companion chips were
available to generate these clocks: the MC6870 (built-in crystal), MC6871 (built-in crystal with
clock stretching logic for slow devices) and MC6875 (external crystal, clock stretching and reset
synchronizer).

The MC6802 was a 6800 with a built-in clock generator. A crystal could be directly connected to
the chip. The MC6802 also had 128 bytes of RAM built-in and was intended to be used with an
MC6846 for a complete two-chip microcomputer. The MN 1800A was a MC6802 compatible
processor used in Matsushita JR100/JR200/JR300 computers.

The 6800 required just a single 5V supply. This made it more appealing than the 8080, which
required +12V, +5V and -5V.

[edit] Criticisms

There are a number of problems which were remedied in later devices, such as the 6809 and
6811:

 Only one pointer register. Although the stack pointer can be used in tight copy loops, it is
awkward and interrupts have to be disabled for this trick. The 6800's most important
competitor, the 8080, had three pointers (but no indexing).
 Stack instructions use post-decrement on push and pre-increment on pop instead of the
more natural post-increment on pop and pre-decrement on push (SP pointing at the top
element). This shows up when the stack pointer is transferred to the index register: the
first thing on the stack is at offset 1.
 The index register can not be directly pushed or popped from the stack.
 The accumulators and index registers occupy different spaces and thus there are no
instructions to transfer or operate between the two. For example there is no way to
directly add an accumulator or even a constant to the index register. Later processors
remedied this by adding the "ABX" (add B to X) and "LEA" (load effective address)
instructions.
 The CPX (compare X) instruction does not affect the Carry flag, so direct magnitude
comparisons with the index register are not possible.
 The DAA (decimal adjust) instruction only worked after addition, and not subtraction. To
subtract packed decimal, one had to use 9's complement followed by addition. Other
microprocessors solved this problem in various ways: The 6502 had a decimal mode bit:
when set both the normal addition and subtraction instructions operated on packed
decimal. The Z80 had a subtraction bit in its status flags. If the last operation was a
subtraction, this bit was set to let the decimal adjust instruction know to operate
differently. The 8086 simply had a DAS (decimal adjust for subtraction) instruction.
[edit] Designers

It's not clear if there was a chief architect, but the two main designers were Chuck Peddle and
Charles Melear.[3][4][5] Some of the 6800 designers went on to join MOS Technology where they
created the 6502. These included Chuck Peddle and Bill Mensch.[6]

Charles Melear continued working at Motorola on the 6800 family and the 683xx family
including the 68332.

Bill Mensch designed the MC6820 PIA (Peripheral Interface Adapter).

[edit] Development Systems

 The Motorola EXORcisor was a development system available for the 6800. It used plug-
in cards with 86-pin edge connectors and ran MDOS (Motorola Disk Operating System)
from 8 inch floppy disks.
 MIKBUG was an early debugger in ROM. It allowed loading of memory from paper tape
using the S19 format.
 RASM was the relocatable assembler available on MDOS.
 MPL "Motorola Programming Language" was a PL/M like PL/I clone.

[edit] Peripheral ICs

 MC6810 128 bytes of RAM
 MC6818 Real Time Clock (used in IBM PC/AT)
 MC6820/6821 "PIA" Peripheral Interface Adapter (GPIO / parallel port)
 MC6828 "PIC" Priority Interrupt Controller
 MC6830 1024 bytes of ROM (frequently loaded with MIKBUG)
 MC6840 Counter/Timer
 MC6843 Floppy disk controller
 MC6844 DMA controller
 MC6845 CRT Controller (used in MDA, CGA and EGA)
 MC6846 ROM + Counter/Timer + GPIO
 MC6847 Video Display Generator
 MC6850 "ACIA" Asynchronous Communications Interface Adapter ("async" serial port)
 MC6852 "SSDA" Synchronous Serial Data Adapter (can be used for floppy disk
serialization)
 MC6854 "ADLC" Advanced Data Link Controller (HDLC/SDLC serial
communications)
 MC6860 Low speed FSK modem
 MC6883 "SAM" Synchronous Address Multiplexer (DMA and DRAM controller for
MC6847)

[edit] See also

  Motorola 68000
 Freescale 68HC11
 Motorola 6809

[edit] References
1. ^ Motorola (1976), Motorola Annual Report 1975, pp. 13,
http://www.motorola.com/mot/doc/6/6496_MotDoc.pdf "We introduced our M6800
microprocessor system late in 1974 and it gained broad industry acceptance in 1975."
2. ^ Wheeler, Gerry (December 1977). "Undocumented M6800 Instructions". BYTE 2 (12):
46–47. Halt and Catch Fire instruction.
3. ^ Microprocessor Report, Volume 10, Number 10, August 5, 1996
4. ^ Ken Polsson, Chronology of Events in the History of Microcomputers - 1971-1976 The
Birth of the Microcomputer, http://www.microprocessor.sscc.ru/comphist/comp1971.htm
"Motorola introduces its 6800 chip, an early 8-bit microprocessor used in
microcomputers and industrial and automotive control devices. The 6800 was designed
by Chuck Peddle and Charlie Melear."
5. ^ The Freeman PC Museum, PC Timeline, http://www.thepcmuseum.net/timeline.php
6. ^ Transcript of interview made on 9 October 1995 by Rob Walker for Stanford
University's Silicon Genesis project "Interview with Bill Mensch" (html).
http://silicongenesis.stanford.edu/transcripts/mensch.htm Transcript of interview made on
9 October 1995 by Rob Walker for Stanford University's Silicon Genesis project.

[edit] External links

 MC6800 applications manual from 1975- lots of information
 MDOS User's Manual
 Motorol Exorciser Emulator
 MIKBUG
 680x images and descriptions at cpu-collection.de
 Instruction set summary
 Java Applet Simulator of a simplified M6800 Microprocessor

[hide]
v • d • e
Motorola/Freescale processors
Industrial
14500
Control Unit
6800 family 6800 · 6809 (see also: Hitachi 6309), 68HC11, 68HC08, 68HC05
68000 68000 · 68008 · 68010 · 68012 · 68020 · 68030 · 68040 · 68060 · ColdFire ·
family DragonBall
Embedded
system 68k- 68EC000 · 68EC020 · 68EC030 · 68EC040 · 68LC040
variants
88000 MC88100 (MC88110)
Floating-
point 68881, 68882
coprocessors
Memory
Managemen 68851
t Unit
PowerPC PPC e200 · PPC 6xx/e300 · PPC 7xx · PPC e500 · PPC 74xx/e600 · PPC e700 ·
family PowerQUICC family · QorIQ
[show]
v • d • e
Motorola and Freescale microcontrollers

This article was originally based on material from the Free On-line Dictionary of Computing,
which is licensed under the GFDL.

Retrieved from "http://en.wikipedia.org/wiki/Motorola_6800"

Categories: Motorola microprocessors | 1975 introductions
Hidden categories: Wikipedia articles incorporating text from FOLDOC

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