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Vlsi Question Bank
Vlsi Question Bank
INSTITUTE OF TECHNOLOGY
(Approved by AICTE, New Delhi & Affiliated to Anna University of Technology, Coimbatore)
Numberofgooddie
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*100
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(May/June11)
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Y e DA *100%
BIG QUESTIONS:
1.
2.
3.
4.
5.
8. Explain with neat diagram the SOI process and mention its advantages.
(Nov/Dec 08) (Nov/Dec 11)
9. Explain in detail about submicron CMOS process.
10. Explain the operation of nMOS enhancement mode transistor.
(May/June 10)
11. Explain the operation of pMOS enhancement mode transistor.
12. Explain the operation of pMOS depletion mode transistor.
13. Explain in detail about CMOS design rules.
14. Write notes on lamda based layout rule.
(Nov/Dec 11)
15. Write notes on SCMOS design rule set.
(May/June 10)
16. Draw the layout of CMOS inverter.
(Nov/Dec 11)
UNIT II MOSFET TRANSISTOR
2 MARKS:
1. What is MOSFET? What are their advantages?
Metal Oxide Semiconductor Field Effect Transistor (MOSFET) provide all of the
switching and amplifications in the CMOS integrated circuits. The speed of a digital chip
is directly related to the electrical characteristics of the transistors, which are in turn
functions of the layout and processing technology.
2. What are the different operating regions for an MOS transistor?
Cutoff region, Non- Saturated Region, Saturated Region
Where
,
- Device conductance and has unit of A/V2
- Process conductance and has unit of A/V2
- Mobility,
(Nov/Dec 11)
15. Give the CMOS inverter DC transfer characteristics and operating regions
(May/June 10)
(May/June 10)
BIG QUESTIONS:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
(Nov/Dec 11)
BIG QUESTION:
1. Write notes on serial and parallel connected FETs.
2. Explain how NOR and NAND gates are implemented using serial and parallel connected
FETs.
3. Draw the NOT-Buffer combination circuit and explain its operation.
4. Explain how NOR3 and NAND3 gates are implemented.
5. Write notes on complex logic gates.
6. Write notes on tri state circuit.
7. What is transmission gate and pass logic?
8. Write notes on large FETs.
9. Design 2:1 MUX and XOR using TG.
10. Explain in detail about cell hierarchy.
11. Explain standard cell design and cell libraries.
(Nov/Dec 11)
12. Design XOR cell, half adder and full adder and explain the concept of cell hierarchy.
13. Explain in detail about cell entries.
14. Draw the Euler graph for the function F=(A+B+C).D
(Nov/Dec 10)
15. Draw the logic circuit diagram of a 4:1 multiplier using (i) pass transistor,
(ii) Transmission gate
(Nov/Dec 11)
16. Realise 2 input XOR gate using CMOS transistor.
(Nov/Dec 11)
10
11
UNIT V VHDL
2 MARKS:
1. What is HDL? What are its types?
HDL is Hardware Description Language. Types are VHDL Very High Speed Integrated
Circuit Hardware Description Language Verilog HDL Verification logic.
2. What are the features of VHDL?
The features of VHDL are:
VHDL has powerful constructs.
VHDL supports design library.
The language is not case sensitive.
3. Define entity?
(Nov/Dec 11)
Entity gives the specification of input/output signals to external circuitry. An
entity is modeled using an entity declaration and at least one architecture body. Entity
gives interfacing between device and others peripherals.
4. List out the different elements of entity declaration?
entity_name, signal_name, mode, in:,out:, input, buffer, signal_type.
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