R.M.K.

COLLEGE OF ENGINEERING AND TECHNOLOGY

R.S.M NAGAR, PUDUVOYAL-601206
4th Semester B.E. / B.Tech.
Second Internal Assessment Test March 2013
Sub. Title : COMPUTER ORGANIZATION AND ARCHITECTURE
Sub. Code : CS2253
Time
: 100 minutes

Date
: 02.03.2013
Branch
: CSE & IT
Max. Marks: 50

Answer all questions

Part A - (5 x 2 = 10)

1. What are the relative merits of horizontal and vertical microinstruction format?
2. In what ways the width and height of the control memory be reduced?
3. A=5;

A 3 + A
B4xA

What hazard does the above two instructions create when executed concurrently?
4. How can memory access be made faster in a pipelined operation? Which hazard can be reduced by
faster memory access?
5. List the key aspects in gaining the performance in pipelined systems.
Part B - (2 x 16 + 1 x 8 = 40)
6. a. (i) Briefly describe the design of a hardwired control unit.
(ii) Draw and explain the block diagram of a complete processor.

(8)
(8)

Or
b. Explain the basic organization of a micro programmed control unit and the generation of
control signals using micro program.

(16)

7. a. i) Discuss the role of cache in pipelining.

(8)

ii) Discuss about the pipeline performance considerations.

(8)

Or
b. Discuss the techniques for handling data and instruction hazards in pipelining. (16)
8. a. Discuss the influence of pipelining on instruction set design.

(8)

Or
b. Write a brief note on nano programming.

(8)