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RUTA DE DATOS SENCILLA

 1 registro de 8 bit
 ALU de 8 operaciones
 A: REG y B: INMEDIATO

OP ALU
000 FA + B
001 FA - B
010 FA
011 FB
100 FA AND B
101 FA XOR B
110 FROR A
111 FROL A

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

ENTITY PROCESADOR IS
PORT( CLK:IN STD_LOGIC;
OP:IN BIT_VECTOR(2 DOWNTO 0);
W:IN STD_LOGIC;
INM:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
C0,Z:OUT STD_LOGIC);
END PROCESADOR;

ARCHITECTURE BEHAVIORAL OF PROCESADOR IS

SIGNAL X0,X1:STD_LOGIC_VECTOR(7 DOWNTO 0);

COMPONENT REGISTRO_R0
PORT(DATO:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
A:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
W:IN STD_LOGIC;
CLK:IN STD_LOGIC);
END COMPONENT;

COMPONENT ALU
PORT(A,B:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
OP:IN BIT_VECTOR(2 DOWNTO 0);
C0,Z:OUT STD_LOGIC;
F:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END COMPONENT;

BEGIN
U0:REGISTRO_R0 PORT MAP(X1,X0,W,CLK);
U1:ALU PORT MAP(X0,INM,OP,C0,Z,X1);
END BEHAVIORAL;
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Component ALU

LIBRARY IEEE;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY ALU IS
PORT(A,B:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
OP:IN BIT_VECTOR(2 DOWNTO 0);
C0,Z:OUT STD_LOGIC;
F:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END ALU;

ARCHITECTURE ALGORITMO OF ALU IS

SIGNAL TA,TB,TC:STD_LOGIC_VECTOR(8 DOWNTO 0);

BEGIN

TA<='0' & A;
TB<='0' & B;

PROCESS(TA,TB,OP)
BEGIN
CASE OP IS
WHEN "000"=>TC<=TA+TB;
WHEN "001"=>TC<=TA-TB;
WHEN "010"=>TC<=TA;
WHEN "011"=>TC<=TB;
WHEN "100"=>TC<=(TA AND TB);
WHEN "101"=>TC<=(TA XOR TB);
WHEN "110"=>TC(6 DOWNTO 0)<=A(7 DOWNTO 1);
TC(7)<=A(0);
WHEN "111"=>TC(7 DOWNTO 1)<=A(6 DOWNTO 0);
TC(0)<=A(7);
END CASE;
END PROCESS;

F<=TC(7 DOWNTO 0);

C0<=TC(8);
Z<='1' WHEN TC(7 DOWNTO 0)="00000000" ELSE '0';

END ALGORITMO;
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Component REGISTRO_R0

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

ENTITY REGISTRO_R0 IS
PORT(DATO:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
A:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
W:IN STD_LOGIC;
CLK:IN STD_LOGIC);
END REGISTRO_R0;

ARCHITECTURE ALGORITMO OF REGISTRO_R0 IS

BEGIN

PROCESS(CLK)
BEGIN
IF CLK='1' AND CLK'EVENT THEN
IF W='1' THEN
A<=DATO;
END IF;
END IF;
END PROCESS;

END ALGORITMO;