Garda-5 Block Diagram Project code: 91.4Q201.001 SYSTEM DC/DC Converters and Voltage Outputs

A B C D E
Garda-5 Block Diagram Project code: 91.4Q201.001

PCB P/N : 55.4Q201.XXX
SYSTEM DC/DC
TPS51120
INPUTS OUTPUTS
41
REVISION : 06206-SA 5V_S5
Mobile CPU
DCBATOUT
4
CLK GEN. (Hannstar, GCE) 3D3V_S5
4
ICS951413 G792 SYSTEM DC/DC
Yonah 478
-1-0426
(RTM865T-300/CY28RS400) 20 TPS51124RGER 42
3 PCB STACKUP
INPUTS OUTPUTS
4, 5 TOP
DCBATOUT 1D8V_S3
AGTL+ 133/166MHz VCC 1D2V_S0
SVIDEO/COMP S APL5312 120mA

TVOUT 14
ATI RC410ME LVDS
S
3D3V_S0 1D5V_CPU_S0
AGTL+ CPU I/F 14"WXGA+ LCD 13 43
GND
SINGAL DDR2 CHANNEL
533/667MHz RGB CRT APL5332 1A
DDR2 x 2 INTEGRATED GRAPHICS
LVDS/TVOUT/CRT
CRT 14 BOTTOM
3D3V_S0 1D5V_NEW_
11,12 1 X4 PCIE SB I/F PCIE x 1 Mini Card*1 MINI_S0 43
802.11A/B/G 27
3 6 X1 PCIE GPP I/F APL5912 3A 3
Ver.:A13, 71.RC410.D0U 6,7,8,9,10 PCIE x 1 PWR SW
New card32 1D2V_S0 1D05V_S0
TPS223132 43
A-Link Express TPS51100 1A
Line In X4
PCMCIA I/F DDR_VREF_S3
31 PCMCIA 1D8V_S3 DDR_VREF_S0
Codec AZALIA CARDBUS SLOT 43
ENE PWR SW
31 ALC883 ATI SB460 CB1410 25 TPS2211
Support
APL5308 300mA
30 26 TypeII
USB2.0 8Ports
26
MIC In 3D3V_S5 1D8V_S5
SATA II (4 PORTS) RICOH 1394 43
AZALIA HD AUDIO 1.0 PCI BUS R5C832
1394 CONN 29 MS/MS Pro/xD/
INT.MIC AC97 2.3 MAXIM CHARGER
ATA 66/100/133 CardReader MMC/SD/SDIO MAX8725 44
6 in 1
LPC I/F
28,29 29
2 31 OP AMP Mini-PCI INPUTS OUTPUTS 2
G1432Q 31 ACPI 1.2
802.11A/B/G 32
INT RTC CHG_PWR
INT.SPKR PCI/PCI BDGE LAN 18V 4.0A
DCBATOUT
Reltek10/100 TXFM RJ45 UP+5V
31 24 24 5V 100mA
MAX4411 RTL8100CL 23
Line Out
LPC BUS CPU DC/DC
(SPDIF) Lab Ver. :A11, 71.SB460.A0U ISL6262
Eng Ver. :A12, 71.SB460.B0U 39,40
MODEM INPUTS OUTPUTS
RJ11 MDC Card 15,16,17,18,19 SIO KBC
ENE
BIOS LPC
22 MX29LV800 VCC_CORE_S0
NS87381 3910 DEBUG DCBATOUT
SATA
PATA
35 33 36 CONN. 36 0~1.3V 48A
1
USB FIR 35 Touch INT. <Variant Name>
1
3 PORT
22 Pad 34 KB 34
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
22 Taipei Hsien 221, Taiwan, R.O.C.
MINI USB
HDD 21 CDROM Blue-tooth
Title
21 BLOCK DIAGRAM
Size Document Number Rev
A3
Garda-5 -1
Date: Wednesday, April 26, 2006 Sheet 1 of 46
A B C
History D E
===========================================================
2006/04/26 (-1 Modify)
USB PCI ROUTING TABLE 1. page 27, change R8/R226 to 100 ohm due to power/email to dark.
2. page 15, change C286/C287 from 18pf to 15pf due to frequence shift(from -6.7 to 4ppm).
Pair Device 3. page 23, change C295/C294 from 15p to 12p due to frequence shift(from -23.3 to 7.9ppm).
DEVICE IDSEL IRQ(Default) REQ# / GNT#
0 USB1 4. EMI Solution for USB/MDC
AD22 H REQ#1/ GNT#1
a. Change L23, L24, L31, L32 to "69.10084.071".
1 BT MiniPCI b. del R353,R354,R356,R360,R445,R446.
2 USB2 F : 1394 c. Change L1, L2 to "68.00331.011".
4 R5C832 AD20 H : 6 in 1 REQ#3/ GNT#3 5. Page 44, change C12/C14 to 78.10699.43L due to 78.10699.42L Obsoleted. 4
3 NEW C
===========================================================
4 USB3 LAN(RTL8100CL) AD17 E REQ#2/ GNT#2 2006/04/13 (-1 Modify)
5 CCD 1. Page 31, R447/R448 tp 33ohm.
CARDBUS CB1410 AD16 G REQ#0 / GNT#0 2. Page 45, Add D4:83.P4SSM.0AM.
6 MINIC1 3. Page 44, Change C321 from 78.10492.4BL to 78.10224.2BL(1000P, 50V, K0603).
7 NC USB UHCI AD29 A, B, C, D 4. Page 23, change R209 from 5.6K to 5.37K.
5. Page 24, change XF1 from 68.68161.30A to 68.01201.30A.
USB 2.0 EHCI AD29 A 6. Page 46, Mini card stand-off(銅柱) need to be changed from 34.4P401.001 to 34.4A907.001.
7. change 84.27002.L04 to 84.27002.F31.
DMI-to-PCI AD30 REQ#1 / GNT#1 ===========================================================
PCI_CLK0 PCM
AC97 Modem B 2006/04/10 (-1 Modify)
PCI_CLK1 IEEE1394 A 1. Page 8, add "LVDS_DIGON" solution from ATI PA note.
AC97 Audio
PCI_CLK2 LAN 2. Page 31, Add R to GND and serial R for U60 pin13/15.
PCI_CLK3 MINI LPC Bridge ===========================================================
PCI_CLK4 KBC IDE AD31 2006/04/03 (SB Modify)
SATA A
PCI_CLK5 FWH B 1. Page 40, Dummy C593.
SMBus 2. Page 44, Del C32.
PCI_CLK6 SIO B
PCI_CLK7 SPDIFOUT 3. Page 41, DCBATOUT_51120 change to DCBATOUT (Del G4,G5,G6,G7,G8)
PCI Express AD28 A, B, C, D 4. Page 4/5, updae CPU symbol.
5. Page 15, Change X5 to same as X1 due to ME high limit issue, Cap. the same as X1 but should fine-tune.
3 Azalia Controller AD27 A 6. Page 39/41/42, change "GAP-CLOSE-PWR" to 0 ohm PAD due to layout concern. 3
===========================================================
2006/03/31 (SB Modify)
1. Page 3, change R139 to bead and C211 to 2.2u for CRT Jitter.
2. Page 6, change R105 from 1.8K to 4.7K.
3. Page 8, change C165 to 2.2u for ATI recommend.
4. Page 8, SIV EDID_CLK/DAT issue, change RN53 to 4.7K.
5. Page 14, SIV RBG fail:
6. Page 15,
RESISTOR a. PCIRST1#(1394) shoulder: Add 33 ohm @ SB.
b. PLT_RST1# overshot : change R144 to 33ohm & R141 to 100P.
Symbol name Value Tolerance Rating Size c. Add 0ohm for RTC power for ATI recommend.
0402=> 1/16W, 25V 2=>0402, 3=>0603, 5=>0805, 7. Page 40 , add 10U Cap.
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %) 0603 => 1/16W, 75V 6=>1206, 0=>1210 8. Page 13/27, change Green LED4/LED5/LED1 to 83.00190.L70.
0805 => 1/10W, 100V (manual change yellow LED6/LED3/LED8/LED2 to 83.00190.S70).
9. EMI request:
10KR3 10K Ohm If no letter, it means J: 5% 1/16W, 75V 0603 a. Page 13, USB_PP5,USB_PN5 add COMMON CHOKE.
b. EC28,EC34,C208 add O.1μCap.
33D3R5 33.3 Ohm If no letter, it means J: 5% 1/10W, 100V 0805 c. CLK48_ICH( near CLK GEN.),SB_CLK33_FWH(near R177) add 20p Cap..
===========================================================
1KR3F 1K Ohm F: 1% 1/16W, 75V 0603 2006/03/28 (SB Modify)
2 1. Page 14, change Q15/Q14 to 2N7002 for SIV CRT SMBus bug. 2
The naming rule is value + R + size + tolerance 2. Page 15, Change C248/C261/C264/C263/C252 from 78.10491.4FL to 78.10523.5F1,
For the value, it can be read by the number before R. (R means resistor) and C262 from 78.10693.41L to 78.10623.51L.
For the tolerance, it can be read from the last letter. 3. Page 8, Add "LCDVDD_ON" PL 100K.
For the rating, we don't show on the symbol name. 4. Page 41, change U7 to AO4406(84.04406.A37).
For the size, R2=>0402, R3=>0603, R5=>0805,.... 5. Page 33, KBC GPIO09 for 1394.
6. Page 33, add 1u Cap. for ENE ECRST# spec. 2ms.
7. Page 31, add audio popo noise solution.
CAPACITOR 8. Page 25, change C520 to 1U for "GBRST#".
9. Page 28, change "GBUS_GRST#_1" timing.
Symbol name Value Tolerance Rating Size ===========================================================
(J: +/-5, K: +/-10, ( X5R / X7R < 80%, 2=>0402, 3=>0603, 5=>0805,
M: +/-20, Z: +80/-20) Y5V/Y5U/Z5U < 1/3 ) 6=>1206, 0=>1210
SCD1U10V2MX-1 0.1uF M/X5R 10V 0402
SC10U6D3V5MX 10uF M/X5R 6.3V 0805
SC2D2U16V5ZY 2.2uF Z/Y5V 16V 0805

<Variant Name>
The naming rule is
1 Capacitor type + value + rating + size + tolerance + material 1
SCD1U10V2MX-1 Wistron Corporation
SC=> SMT Ceremic, TC=> POS cap or SP cap 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
D1U => 0.1uF Taipei Hsien 221, Taiwan, R.O.C.
10V => the voltage rating is 10V Title
2=> 0402, 3=>0603, 5=>0805
M=>tolerance J, K, M, Z Reference
X=> X7R/X5R, Y=> Y5V Size Document Number Rev
A3
-1 => symbol version, nonsense to EE characteristic Garda-5 -1
A B C D E
Bead: Bead: Bead: 3D3V_S0

3D3V_S0 200ohm, 200mA. 3D3V_S0 200ohm, 200mA. 26ohm, 600mA.
R128 500mA R139
2 R377 1 3D3V_CLKPLL_S0 2 1 3D3V_48MPWR_S0 3D3V_CLKGEN_S0 2 1 SB Modify
0R3-0-U-GP 50mA 50mA HCB1608K-300T10GP
1
C483 0R3-0-U-GP 68.00214.111
SCD1U16V2ZY-2GP C211 C202 C210 C212 C216 C209 C201 C203 C207 C208
SC2D2U10V3ZY-1GP SC2D2U10V3ZY-1GP SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY At least 2.2u*1
2
2
4 4
At least
22u*1, 0.1U*1
At least
Ioh = 6 * Iref (2.32mA) 22u*1, 0.1u*7.
Voh = 0.7V @ 50 ohm
U29
C200
1 2 GEN_XTAL_IN 2 39 3D3V_CLKPLL_S0
X2 VDDA
1 X1
1
SC27P50V2JN-2-GP X2 GEN_XTAL_OUT_R 1 R140 2 CLK_IREF 37 3 3D3V_48MPWR_S0

475R2F-L1-GP IREF VDD48
11,18,27,32 SMB_CLK 7 SCLK
X-14D31818M-31GP R127 8 32 3D3V_CLKGEN_S0
11,18,27,32 SMB_DATA SDATA VDDATI
82.30005.831 1MR2J-1-GP FS_C 9
2
C199 FS_C
32 CLKREQ_NEW# 10 45
2
CLKREQA# VDDCPU
1 2 27 CLKREQ_MINI# 11 CLKREQB#
18 CLK48_ICH 1 2 CLK48 4 51
SC27P50V2JN-2-GP R134 33R2J-2-GP FS_B USB_48MHZ VDDPCI
2 1 53 FS_B/REF1
C594 DYSC20P50V2JN-1GP FS_A 54 56
FS_A/REF0 VDDREF
SMbus Table: 8 OSC14M 1 R132 2 33R2J-2-GP OSC14M_R 52 TEST_SEL/REF2
SEL_CK410# 50 35
Byte4 bit 4, CLKREQA#. 39 CLK_EN# CLK_EN# 6
CK410#/PCICLK0 VDDSRC
21
CPU_STP#_R VTT_PWRGD#/PD VDDSRC
Byte2 bit 3, CLKREQB#. 15 CPU_STP# 1 2 48 CPU_STOP# VDDSRC 14
R133 0R0402-PAD
"0": not controlled, "1": controlled. CPU_STP# CLK GEN Internal PH 120K 41 CPUCLKT2_ITP
PL: always output 40 CPUCLKC2_ITP SRCCLKC7 13
3 12 3
SRN33J-5-GP-U SRCCLKT7
8 CLK_MCH_BCLK 4 1 RN9CLK_MCH_BCLK_1 43 CPUCLKT1
NB free-running: 8 CLK_MCH_BCLK# 3 2 CLK_MCH_BCLK_1# 42 CPUCLKC1 SRCCLKC6 17
Byte5 bit5 =0. SRCCLKT6 16
4 CLK_CPU_BCLK SRN33J-5-GP-U 4 1 RN7CLK_CPU_BCLK_1 47
CLK_CPU_BCLK_1# CPUCLKT0
4 CLK_CPU_BCLK# 3 2 46 CPUCLKC0 SRCCLKC5 19
SRCCLKT5 18
36 23 CLK_PCIE_NEW_1# RN12 1 4 SRN33J-5-GP-U CLK_PCIE_NEW# 32

GNDSRC SRCCLKC4 CLK_PCIE_NEW_1
26 GNDSRC SRCCLKT4 22 2 NEW 3 CLK_PCIE_NEW 32
1 R137 2 CLKREQ_NEW# 20 GNDSRC
15 25 CLK_PCIE_MINI1_1# RN19 1 4 SRN33J-5-GP-U CLK_PCIE_MINI1# 27
1KR2J-1-GP GNDSRC SRCCLKC3 CLK_PCIE_MINI1_1
SRCCLKT3 24 2 MINIC 3 CLK_PCIE_MINI1 27
49 GNDPCI
1 R138 2 CLKREQ_MINI#
SRCCLKC0 33 CLK_PCIE_ICH_1# RN15 2 3 SRN33J-5-GP-U CLK_PCIE_ICH# 15
44 34 CLK_PCIE_ICH_1 1 4 CLK_PCIE_ICH 15
1KR2J-1-GP GNDCPU SRCCLKT0
31 GNDATI
27 CLK_NB_ALINK_1 RN22 2 3 SRN33J-5-GP-U CLK_NB_ALINK 9
FS_A ATIGCLKT1 CLK_NB_ALINK_1#
4,9 CPU_SEL0 1 2 38 GNDA ATIGCLKC1 28 1 4 CLK_NB_ALINK# 9
R129 4K7R2J-2-GP
55 30 CLK_NB_GFX_1 RN23 1 4 SRN33J-5-GP-U CLK_NB_GFX 9
GND ATIGCLKT0 CLK_NB_GFX_1#
18 SB_OSCIN 1 2 5 GND ATIGCLKC0 29 2 3 CLK_NB_GFX# 9
R126 33R2J-2-GP
ICS951413CGLF 71.95143.A0W
1 2 FS_B ICS951413 Ver C /CY28RS400 Ver.B /CV136
4,9 CPU_SEL1
R131 4K7R2J-2-GP 2nd source: 71.00865.A0W
2 2
35 CLK14_SIO 1 2
R130 33R2J-2-GP
4 CPU_SEL2 1 2 FS_C
R136 4K7R2J-2-GP
CK410# = 0, CK410 MODE 1 DY 2 33R2J-2-GP SEL_CK410#

R135
CK410# = 1, CK409 MODE CK410# CLK GEN Internal PL 120K
CLOCK FREQUENCY SELECT TABLE (MHz)

FSC FSB FSA CPU SRC PCI REF RN18 RN21
CLK_PCIE_MINI1# 1 4 CLK_NB_ALINK# 1 4
CLK_PCIE_MINI1 MINIC CLK_NB_ALINK
1 0 1 100 100 33 14.31 2
SRN49D9F-GP
3 2
SRN49D9F-GP
3
0 0 1 133 100 33 14.31 For Yonah Cerlon-M

0 1 1 166 100 33 14.31 For Yonah
200 100 33 14.31 RN8
0 1 0 CLK_CPU_BCLK 1 4
CLK_CPU_BCLK#
0 0 0 266 100 33 14.31 2
SRN49D9F-GP
3
RN16 RN10 <Variant Name>

1
1 0 0 333 100 33 14.31 CLK_PCIE_ICH 1 4 CLK_MCH_BCLK 1 4
1
CLK_PCIE_ICH# CLK_MCH_BCLK#
1 1 0 400 100 33 14.31 2
SRN49D9F-GP
3 2
SRN49D9F-GP
3
Wistron Corporation
RN11
1 1 1 RESV 100 33 14.31 CLK_PCIE_NEW 2 3
Taipei Hsien 221, Taiwan, R.O.C.
CLK_PCIE_NEW# 1 NEW 4
SRN49D9F-GP Title
RN24
CLK_NB_GFX 1 4 Clock Generator -ICS951413
CLK_NB_GFX# 2 3 Size Document Number Rev
SRN49D9F-GP A3
Garda-5 SB
A B C D E
A B C D E
1D05V_S0
SB460 contains 400ohm inernal pull-up on
CPU sideband signals.
H_FERR# 1 2
R327 56R2J-4-GP
A20M#
IGNNE#
INIT#
TP28 TPAD30
U53A 1D05V_S0 INTR/LIN0 H_PWRGD 1 2
H_A#3 J4 H1 NMI/LIN1 R330 330R2J-3-GP
6 H_A#[31..3] A[3]# ADS# H_ADS# 6
4 H_A#4 L4 E2 H_BNR# 6 SMI# 4
A[4]# BNR#
H_A#5 M3 A[5]# BPRI# G5 H_BPRI# 6 STPCLK#
1
H_A#6 K5 H_BREQ#0 1 2
A[6]#
ADDR GROUP 0
H_A#7 M1 H5 H_DEFER# 6 R78 R329 200R2J-L1-GP
H_A#8 A[7]# DEFER# 56R2J-4-GP
N2 A[8]# DRDY# F21 H_DRDY# 6
H_A#9 J1 E1 H_DBSY# 6
H_A#10 A[9]# DBSY# H_DPSLP#
N3 1 2
2
H_A#11 A[10]# Place testpoint on R326 200R2J-L1-GP
P5 A[11]# BR0# F1 H_BREQ#0 6
H_A#12 P2 H_IERR# with a GND H_CPUSLP# 1 2
A[12]# 0.1" away
CONTROL
H_A#13 L1 D20 H_IERR# R331 200R2J-L1-GP
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 15 H_D#[63..0] 6
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 6
L2 H_CPURST# 6 U53B
6 H_ADSTB#0 ADSTB[0]#
B1 H_RS#[2..0] 6 H_D#0 E22 AA23 H_D#32
6 H_REQ#[4..0] RESET# D[0]# D[32]#
H_REQ#0 K3 F3 H_RS#0 H_D#1 F24 AB24 H_D#33
H_REQ#1 H2 REQ[0]# RS[0]# H_RS#1 H_D#2 D[1]# D[33]# H_D#34
REQ[1]# RS[1]# F4 E26 D[2]# D[34]# V24
H_REQ#2 K2 G3 H_RS#2 H_D#3 H22 V26 H_D#35
H_REQ#3 J3 REQ[2]# RS[2]# H_D#4 D[3]# D[35]# H_D#36
REQ[3]# TRDY# G2 H_TRDY# 6 F23 D[4]# D[36]# W25
DATA GRP 0
H_REQ#4 L5 H_THERMDA H_D#5 H_D#37
DATA GRP 2
REQ[4]# G25 D[5]# D[37]# U23
G6 H_HIT# 6 H_D#6 E25 U25 H_D#38
HIT# D[6]# D[38]#
1
H_A#17 Y2 E4 H_HITM# 6 H_D#7 E23 U22 H_D#39
H_A#18 A[17]# HITM# C84 H_D#8 D[7]# D[39]# H_D#40
U5 A[18]# K24 D[8]# D[40]# AB25
H_A#19 R3 AD4 XDP_BPM#0 TP47 TPAD30 SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41
2
A[19]# BPM[0]# D[9]# D[41]#
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 TP49 TPAD30 H_THERMDC H_D#10 J24 Y23 H_D#42
H_A#21 A[20]# BPM[1]# XDP_BPM#2 TP50 TPAD30 H_D#11 D[10]# D[42]# H_D#43
U4 A[21]# BPM[2]# AD1 J23 D[11]# D[43]# AA26
H_A#22 Y5 AC4 XDP_BPM#3 TP48 TPAD30 H_D#12 H26 Y26 H_D#44
A[22]# BPM[3]# D[12]# D[44]#
XDP/ITP SIGNALS
H_A#23 U2 AC2 XDP_BPM#4 TP46 TPAD30 H_D#13 F26 Y22 H_D#45
H_A#24 A[23]# PRDY# XDP_BPM#5 TP51 TPAD30 1D05V_S0 H_D#14 D[13]# D[45]# H_D#46
R4 A[24]# PREQ# AC1 K22 D[14]# D[46]# AC26
3 H_A#25 T5 AC5 XDP_TCK TP44 TPAD30 H_D#15 H25 AA24 H_D#47 3
A[25]# TCK D[15]# D[47]#
2
H_A#26 T3 AA6 XDP_TDI TP37 TPAD30 H23 W24 H_DSTBN#2 6
A[26]# TDI 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]#
H_A#27 W3 AB3 XDP_TDO TP42 TPAD30 R77 G22 Y25 H_DSTBP#2 6
A[27]# TDO 56R2J-4-GP 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]#
H_A#28 W5 AB5 XDP_TMS TP38 TPAD30 J26 V23 H_DINV#2 6
A[28]# TMS 6 H_DINV#0 DINV[0]# DINV[2]#
H_A#29 Y4 AB6 XDP_TRST# TP45 TPAD30
H_A#30 A[29]# TRST# XDP_DBRESET# TP20 TPAD30
W2 C20
1
H_A#31 A[30]# DBR# R76 H_D#16 H_D#48
Y1 A[31]# N22 D[16]# D[48]# AC22
V4 D21 1 2 H_D#17 K25 AC23 H_D#49
DY CPU_PROCHOT# 39
THERM
6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[17]# D[49]#

A24 H_THERMDA 20 H_D#18 P26 AB22 H_D#50
THERMDA 0R2J-2-GP H_D#19 D[18]# D[50]# H_D#51
15 H_A20M# A6 A20M# THERMDC A25 H_THERMDC 20 R23 D[19]# D[51]# AA21
15 H_FERR# A5 H_D#20 L25 AB21 H_D#52
FERR# H_D#21 D[20]# D[52]# H_D#53
15 H_IGNNE# C4 C7 PM_THRMTRIP-I# 37 L22 AC25
DATA GRP 1
IGNNE# THERMTRIP# D[21]# D[53]#
DATA GRP 3
H_D#22 L23 AD20 H_D#54
H_D#23 D[22]# D[54]# H_D#55
15 H_STPCLK# D5 STPCLK# M23 D[23]# D[55]# AE22
15 H_INTR C6 H_D#24 P25 AF23 H_D#56
LINT0 D[24]# D[56]#
H CLK
B4 A22 PM_THRMTRIP# H_D#25 P22 AD24 H_D#57

15 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 3 D[25]# D[57]#
A3 A21 should connect to H_D#26 P23 AE21 H_D#58
15 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 3 D[26]# D[58]#
ICH7 and Calistoga H_D#27 T24 AD21 H_D#59
TPAD30 TP41 without T-ing H_D#28 D[27]# D[59]# H_D#60
AA1 RSVD[01] R24 D[28]# D[60]# AE25
TPAD30 TP39 AA4 T22 TP34 TPAD30 ( No stub) H_D#29 L26 AF25 H_D#61
TPAD30 TP43 RSVD[02] RSVD[12] 1D05V_S0 H_D#30 D[29]# D[61]# H_D#62
AB2 RSVD[03] T25 D[30]# D[62]# AF22
TPAD30 TP40 AA3 H_D#31 N24 AF26 H_D#63
RSVD[04] D[31]# D[63]#
1
TPAD30 TP32 TP26 TPAD30
RESERVED
M4 RSVD[05] RSVD[13] D2 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6

TPAD30 TP31 N5 F6 TP27 TPAD30 R125 N25 AE24 H_DSTBP#3 6
RSVD[06] RSVD[14] 1KR2F-3-GP 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]#
TPAD30 TP35 T2 D3 M26 AC20 H_DINV#3 6
RSVD[07] RSVD[15] 6 H_DINV#1 DINV[1]# DINV[3]#
TPAD30 TP36 V3 C1
RSVD[08] RSVD[16] TP52 TPAD30 Layout Note: CPU_GTLREF0 COMP0 R99 27D4R2F-L1-GP
B2 AF1 AD26 R26 1 2
1 2
TPAD30 TP22 RSVD[09] RSVD[17] TP25 TPAD30 0.5" max length. GTLREF COMP[0] COMP1 R102 54D9R2F-L1-GP
C3 RSVD[10] RSVD[18] D22 MISC COMP[1] U26 1 2
1
C23 TP24 TPAD30 DY R80 DY 1KR2J-1-GP U1 COMP2 R103 1 2 27D4R2F-L1-GP
2 TPAD30 TP21 RSVD[19] TP23 TPAD30 R124 C197 COMP[2] 2
B25 RSVD[11] RSVD[20] C24 1 2TEST1 C26 TEST1 COMP[3] V1 COMP3 R104 1 2 54D9R2F-L1-GP
2KR2F-3-GP SC1KP16V2KX-GP
2
BGA479-SKT6-GPU2 1 2TEST2 D25 E5 H_DPRSLP# 39
62.10079.001 R83 51R2F-2-GP TEST2 DPRSTP#
B5 H_DPSLP# 15
2
DPSLP#
2nd source: 62.10053.401 DPWR# D24 H_DPWR# 6
3,9 CPU_SEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 15,37
3,9 CPU_SEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 18
3 CPU_SEL2 C21 BSEL[2] PSI# AE6 PSI# 39
BGA479-SKT6-GPU2
Layout Note:
1D05V_S0 Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
1D05V_S0
XDP_TDI 1 2
R107 150R2F-1-GP 3D3V_S0
2
XDP_TMS 1 2
R110 39D2R3F-2-GP R328
XDP_TDO 1 2 470R2J-2-GP
DY
1
R112 54D9R2F-L1-GP
H_CPURST# 1 2 R378
DY
1
R325 220R2J-L2-GP 10KR2J-3-GP

H_DPRSLP#
CPU on die PH 55 ohm 3D3V_S0
2
Q8
C
R71
XDP_DBRESET# 1 2
1
R79 DY 150R2F-1-GP B 1 2 PM_DPRSLPVR 15,39
<Variant Name> 1
Wistron Corporation
E
XDP_TCK CH3904PT-GP 470R2J-2-GP

1 2
R116 27D4R2F-L1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
XDP_TRST# 1 2 Taipei Hsien 221, Taiwan, R.O.C.
R115 680R3F-GP
All place within 2" to CPU Title
CPU (1 of 2)
A3
Garda-5 SA
A B C D E
A B C D E
VCC_CORE_S0
U53D
VCC_CORE_S0 A4 P6
VSS[001] VSS[082]
4 A8 VSS[002] VSS[083] P21 4
A11 VSS[003] VSS[084] P24
U53C A14 R2
VSS[004] VSS[085]
A7 VCC[001] VCC[068] AB20 A16 VSS[005] VSS[086] R5
A9 VCC[002] VCC[069] AB7 A19 VSS[006] VSS[087] R22
A10 VCC[003] VCC[070] AC7 A23 VSS[007] VSS[088] R25
A12 VCC[004] VCC[071] AC9 A26 VSS[008] VSS[089] T1
A13 VCC[005] VCC[072] AC12 B6 VSS[009] VSS[090] T4
A18 VCC[008] VCC[075] AC17 B13 VSS[012] VSS[093] U3
A20 VCC[009] VCC[076] AC18 B16 VSS[013] VSS[094] U6
B7 VCC[010] VCC[077] AD7 B19 VSS[014] VSS[095] U21
B9 VCC[011] VCC[078] AD9 B21 VSS[015] VSS[096] U24
B10 VCC[012] VCC[079] AD10 B24 VSS[016] VSS[097] V2
B12 VCC[013] VCC[080] AD12 C5 VSS[017] VSS[098] V5
B17 VCC[016] VCC[083] AD17 C14 VSS[020] VSS[101] W1
B18 VCC[017] VCC[084] AD18 C16 VSS[021] VSS[102] W4
B20 VCC[018] VCC[085] AE9 C19 VSS[022] VSS[103] W23
C9 VCC[019] VCC[086] AE10 C2 VSS[023] VSS[104] W26
C10 VCC[020] VCC[087] AE12 C22 VSS[024] VSS[105] Y3
C12 VCC[021] VCC[088] AE13 C25 VSS[025] VSS[106] Y6
C13 VCC[022] VCC[089] AE15 D1 VSS[026] VSS[107] Y21
C15 VCC[023] VCC[090] AE17 D4 VSS[027] VSS[108] Y24
C17 VCC[024] VCC[091] AE18 D8 VSS[028] VSS[109] AA2
C18 VCC[025] VCC[092] AE20 D11 VSS[029] VSS[110] AA5
D9 VCC[026] VCC[093] AF9 D13 VSS[030] VSS[111] AA8
3 D10 AF10 D16 AA11 3
VCC[027] VCC[094] VSS[031] VSS[112]
D17 VCC[031] VCC[098] AF17 E3 VSS[035] VSS[116] AA22
D18 VCC[032] VCC[099] AF18 E6 VSS[036] VSS[117] AA25
E7 AF20 1D05V_S0 E8 AB1
VCC[033] VCC[100] VSS[037] VSS[118]
E9 VCC[034] E11 VSS[038] VSS[119] AB4
E10 VCC[035] VCCP[01] V6 E14 VSS[039] VSS[120] AB8
E12 VCC[036] VCCP[02] G21 E16 VSS[040] VSS[121] AB11
E13 VCC[037] VCCP[03] J6 E19 VSS[041] VSS[122] AB13
E15 VCC[038] VCCP[04] K6 E21 VSS[042] VSS[123] AB16
1
E17 VCC[039] VCCP[05] M6 E24 VSS[043] VSS[124] AB19

E18 J21 C171 F5 AB23
VCC[040] VCCP[06] SCD1U10V2KX-4GP VSS[044] VSS[125]
E20 K21 F8 AB26
2
VCC[041] VCCP[07] VSS[045] VSS[126]

F7 VCC[042] VCCP[08] M21 F11 VSS[046] VSS[127] AC3
F9 VCC[043] VCCP[09] N21 F13 VSS[047] VSS[128] AC6
F10 VCC[044] VCCP[10] N6 F16 VSS[048] VSS[129] AC8
F12 VCC[045] VCCP[11] R21 F19 VSS[049] VSS[130] AC11
F14 VCC[046] VCCP[12] R6 F2 VSS[050] VSS[131] AC14
F15 VCC[047] VCCP[13] T21 F22 VSS[051] VSS[132] AC16
F17 VCC[048] VCCP[14] T6 F25 VSS[052] VSS[133] AC19
F18 V21 1D5V_VCCA_S0 1D5V_CPU_S0 G4 AC21
VCC[049] VCCP[15] 1D05V_S0 VSS[053] VSS[134]
F20 VCC[050] VCCP[16] W21 L4 G1 VSS[054] VSS[135] AC24
AA7 VCC[051] G23 VSS[055] VSS[136] AD2
AA9 VCC[052] VCCA B26 1 2 G26 VSS[056] VSS[137] AD5
AA10 HCB1608KF121T30-GP H3 AD8
VCC[053] VSS[057] VSS[138]
1
AA12 C78 68.00230.041 H6 AD11

VCC[054] VSS[058] VSS[139]
AA13 VCC[055] VID[0] AD6 H_VID0 39SCD01U16V2KX-3GP C77 H21 VSS[059] VSS[140] AD13
1
2 SC4D7U6D3V3KX-GP C159 C143 C141 C116 C167 C189 2
AA15 AF5 H_VID1 39 H24 AD16
2
VCC[056] VID[1] VCC_CORE_S0 VSS[060] VSS[141]

AA17 VCC[057] VID[2] AE5 H_VID2 39 DY J2 VSS[061] VSS[142] AD19
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AA18 AF4 H_VID3 39 J5 AD22
2
VCC[058] VID[3] VSS[062] VSS[143]
AA20 VCC[059] VID[4] AE3 H_VID4 39 J22 VSS[063] VSS[144] AD25
1
AB9 VCC[060] VID[5] AF2 H_VID5 39 J25 VSS[064] VSS[145] AE1

AC10 AE2 H_VID6 39 R122 K1 AE4
VCC[061] VID[6] 100R2F-L1-GP-U VSS[065] VSS[146]
AB10 VCC[062] H_VID[0..6] 39 K4 VSS[066] VSS[147] AE8
AB12 VCC[063] K23 VSS[067] VSS[148] AE11
AB14 AF7 VCC_SENSE 39 K26 AE14
2
VCC[064] VCCSENSE VSS[068] VSS[149]

AB15 VCC[065] L3 VSS[069] VSS[150] AE16
AB17 VCC[066] L6 VSS[070] VSS[151] AE19
AB18 VCC[067] VSSSENSE AE7 VSS_SENSE 39 L21 VSS[071] VSS[152] AE23
VCC_CORE_S0 L24 AE26
VSS[072] VSS[153]
1
BGA479-SKT6-GPU2 Layout Note: M2 AF3

R121 VSS[073] VSS[154]
M5 VSS[074] VSS[155] AF6
100R2F-L1-GP-U VCCSENSE and VSSSENSE lines M22 AF8
VSS[075] VSS[156]
1
1
should be of equal length. C115 C112 C113 C420 C456 C440 M25 AF11
VSS[076] VSS[157]
N1 AF13
2
VSS[077] VSS[158]
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
N4 AF16
2
2
Layout Note: VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19
Provide a test point (with N26 AF21
no stub) to connect a VSS[080] VSS[161]
P3 VSS[081] VSS[162] AF24
differential probe
between VCCSENSE and BGA479-SKT6-GPU2
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line. SA Modify
VCC_CORE_S0
1 <Variant Name> 1
Wistron Corporation
1
1
C449 C418 C421 C416 C454 C423 C448 C441 C455
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
2
2
Title
CPU (2 of 2)
A3
Garda-5 SA
A B C D E
A B C D E
U51A
PART 1 OF 6
4 H_A#[31..3] H_D#[63..0] 4
H_A#3 G28 E28 H_D#0
H_A#4 CPU_A3# CPU_D0# H_D#1
H26 CPU_A4# CPU_D1# D28
H_A#5 G27 D29 H_D#2
G30 CPU_A6# CPU_D3# C29
4 H_A#7 G29 D30 H_D#4 4
G26 CPU_A8# CPU_D5# C30
H_A#9 H28 B29 H_D#6
J28 C28
DATA GROUP 0
CPU_A10# CPU_D7#
ADDR. GROUP 0
H_A#11 H25 C26 H_D#8
K28 CPU_A12# CPU_D9# B25
H_A#13 H29 B27 H_D#10
H_A#14 CPU_A13# CPU_D10# H_D#11
J29 CPU_A14# CPU_D11# C25
H_A#15 K24 A27 H_D#12
H_A#16 CPU_A15# CPU_D12# H_D#13
4 H_REQ#[4..0] K25 CPU_A16# CPU_D13# C24
H_REQ#0 F29 A24 H_D#14
H_REQ#1 CPU_REQ0# CPU_D14# H_D#15
G25 CPU_REQ1# CPU_D15# B26
H_REQ#2 F26 C27 H_DINV#0 H_DINV#0 4
H_REQ#3 CPU_REQ2# CPU_DBI0# H_DSTBN#0
F28 CPU_REQ3# CPU_DSTB0N# A28 H_DSTBN#0 4
H_REQ#4 E29 B28 H_DSTBP#0 H_DSTBP#0 4
CPU_REQ4# CPU_DSTB0P#
4 H_ADSTB#0 H27 CPU_ADSTB0#
C19 H_D#16
H_A#17 CPU_D16# H_D#17
M28 CPU_A17# CPU_D17# C23
H_A#18 K29 C20 H_D#18
H_A#19 CPU_A18# CPU_D18# H_D#19
K30 CPU_A19# CPU_D19# C22
H_A#20 J26 B22 H_D#20
H_A#21 CPU_A20# CPU_D20# H_D#21
L28 CPU_A21# CPU_D21# B23
H_A#22 L29 C21 H_D#22
DATA GROUP 1
CPU_A22# CPU_D22#
ADDR. GROUP 1
H_A#23 M30 B24 H_D#23
H_A#24 CPU_A23# CPU_D23# H_D#24
K27 CPU_A24# CPU_D24# E21
H_A#25 M29 B21 H_D#25
H_A#26 CPU_A25# CPU_D25# H_D#26
K26 CPU_A26# CPU_D26# B20
H_A#27 N28 G19 H_D#27
H_A#28 CPU_A27# CPU_D27# H_D#28
L26 CPU_A28# CPU_D28# F21
3 H_A#29 N25 B19 H_D#29 3
H_A#30 CPU_A29# CPU_D29# H_D#30
L25 CPU_A30# CPU_D30# E20
H_A#31 N24 D21 H_D#31
CPU_A31# CPU_D31# H_DINV#1
4 H_ADSTB#1 L27 CPU_ADSTB1# CPU_DBI1# A21 H_DINV#1 4
D22 H_DSTBN#1 H_DSTBN#1 4
CPU_DSTB1N# H_DSTBP#1
4 H_ADS# F25 CPU_ADS# CPU_DSTB1P# E22 H_DSTBP#1 4
4 H_BNR# F24 CPU_BNR#
4 H_BPRI# E23 C18 H_D#32
CPU_BPRI# CPU_D32# H_D#33
4 H_DEFER# E25 CPU_DEFER# CPU_D33# F19
4 H_DRDY# G24 E19 H_D#34
CPU_DRDY# CPU_D34# H_D#35
4 H_DBSY# F23 CPU_DBSY# CPU_D35# A18
4 H_DPWR# G22 D19 H_D#36
CPU_DPWR# CPU_D36# H_D#37
Buffer Implemented:27K 4 H_LOCK# E27 CPU_LOCK# CPU_D37# B18
CONTROL
1D8V_S0 F22 C17 H_D#38
DATA GROUP 2
4 H_TRDY# CPU_TRDY# CPU_D38#
Buffer not Implemented:220K 4 H_HITM# E24 B17 H_D#39
CPU_HITM# CPU_D39# H_D#40
4 H_HIT# D26 CPU_HIT# CPU_D40# E17
2
H_RS#0 E26 B16 H_D#41

H_RS#1 G23 CPU_RS0# CPU_D41# H_D#42
4 H_RS#[2..0] CPU_RS1# CPU_D42# C15
R89 H_RS#2 D23 A15 H_D#43
220KR2J-L2-GP CPU_RS2# CPU_D43# H_D#44
CPU_D44# B15
4 H_BREQ#0 D25 F16 H_D#45
D9
1
RESERVED0 CPU_D45# H_D#46

4 H_CPURST# 1 2 C11 CPU_CPURST# CPU_D46# G18
18,33,35 PM_SUS_STAT# K A R85 0R0402-PAD F18 H_D#47
CH751H-40PT-1GP CPU_D47# H_DINV#2
D8 CPU_DBI2# C16 H_DINV#2 4
TP30 TPAD30 E11 H_DSTBN#2
AGTL+I/F
RESERVED1 CPU_DSTB2N# D18 H_DSTBN#2 4
15 NB_RST# K A AH14 E18 H_DSTBP#2 H_DSTBP#2 4
NB_RST# SUS_STAT# CPU_DSTB2P#
A3 SYSRESET#
8,37 NB_PWRGD E3 E16 H_D#48
CH751H-40PT-1GP POWERGOOD CPU_D48# H_D#49
CPU_D49# D16
2 1D05V_S0 2
1 R87 2 49D9R2F-GP NB_CPU_COMP_P B11 CPU_COMP_P CPU_D50# C14 H_D#50
B14 H_D#51
CPU_D51#
1 R86 2 24D9R2F-L-GP NB_CPU_COMP_N D11 CPU_COMP_N CPU_D52# E15 H_D#52
D15 H_D#53
1D8V_S0 CPU_D53# H_D#54
CPU_D54# C13
MISC.
Critical Bead NB_CPVDD H21 E14 H_D#55
DATA GROUP 3
CPVDD CPU_D55# H_D#56
200ohm 50mA CPU_D56# F13
1
H20 B13 H_D#57

1D05V_S0 CPVSS CPU_D57# H_D#58
200mA CPU_D58# A12
L5 C12 H_D#59
BLM18BD152SN-GP NB_GTLVREF CPU_D59# H_D#60
H22 CPU_VREF CPU_D60# E12
2
68.00143.081 H_D#61
49D9R2F-GP
CPU_D61# D13
R81
D12 H_D#62
2
CPU_D62# H_D#63
LAYOUT NOTE AH13 THERMALDIODE_P CPU_D63# B12
AJ13 E13 H_DINV#3 H_DINV#3 4
THERMALDIODE_N CPU_DBI3#
1
CPVSS need to connect to GND F15 H_DSTBN#3 H_DSTBN#3 4

1
C111 CPU_DSTB3N# H_DSTBP#3

C4 TESTMODE CPU_DSTB3P# G15 H_DSTBP#3 4
immediately through a SC1U6D3V2ZY-GP
2
dedicated VIA C104 C92 RC410ME-GP

100R2F-L1-GP-U
R84
R105 71.RC410.D0U
SC220P50V2JN-3GP
4K7R2J-2-GP
SC1U6D3V2ZY-GP
2
P.L.:Normal Mode.
2
ATI Modify
1 <Variant Name> 1
TP33 TPAD30 1989_DXP3
Wistron Corporation
2
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

C137 Taipei Hsien 221, Taiwan, R.O.C.
SC470P50V2KX-3GP
1
TP29 TPAD30 1989_DXN3 Title

RC410ME (1 of 5) Host I/F
A3
Garda-5 SB
A B C D E
A B C D E
U51C
11,12 M_B_A[17..0]
M_B_A0 AK27 PART 3 OF 6 AJ16 M_B_DQ0
M_B_A1 MEM_A0 MEM_DQ0 M_B_DQ1
AJ27 MEM_A1 MEM_DQ1 AH16 M_B_DQ[63..0] 11
M_B_A2 AH26 AJ19 M_B_DQ2
AJ26 MEM_A3 MEM_DQ3 AH19
M_B_A4 AH25 AH15 M_B_DQ4
AJ25 MEM_A5 MEM_DQ5 AK16
4 M_B_A6 AH24 AH18 M_B_DQ6 4
AH23 MEM_A7 MEM_DQ7 AK19
M_B_A8 AJ24 AF13 M_B_DQ8
AJ23 MEM_A9 MEM_DQ9 AF14
M_B_A10 AH27 AE19 M_B_DQ10
AH22 MEM_A11 MEM_DQ11 AF19
M_B_A12 AJ22 AE13 M_B_DQ12
AF28 MEM_A13 MEM_DQ13 AG13
AG27 MEM_A15 MEM_DQ15 AE17
AH21 MEM_A17 MEM_DQ17 AF21
AG23 M_B_DQ18
MEM_DQ18 M_B_DQ19
11 M_B_DM[7..0] MEM_DQ19 AF24
M_B_DM0 AJ17 AG19 M_B_DQ20
M_B_DM1 MEM_DM0 MEM_DQ20 M_B_DQ21
AG15 MEM_DM1 MEM_DQ21 AG20
M_B_DM2 AE20 AG22 M_B_DQ22
AF25 MEM_DM3 MEM_DQ23 AF23
M_B_DM4 Y27 AD25 M_B_DQ24
AB28 MEM_DM5 MEM_DQ25 AG25
M_B_DM6 R26 AE27 M_B_DQ26
R28 MEM_DM7 MEM_DQ27 AD27
AE23 M_B_DQ28
MEM_DQ28 M_B_DQ29
MEM_DQ29 AD24
11,12 M_B_RAS# AJ29 AE26 M_B_DQ30
MEMB_RAS# MEM_DQ30 M_B_DQ31
11,12 M_B_CAS# AG28 MEMB_CAS# MEM_DQ31 AD26
11,12 M_B_WE# AH30 AA25 M_B_DQ32
MEMB_WE# MEM_DQ32 M_B_DQ33
MEM_DQ33 Y26
11 M_B_DQS[7..0] W24 M_B_DQ34
3 M_B_DQS0 MEM_DQ34 M_B_DQ35 3
AJ18 MEM_DQS0P MEM_DQ35 U25
M_B_DQS1 AE14 AA26 M_B_DQ36
M_B_DQS2 MEM_DQS1P MEM_DQ36 M_B_DQ37
AF22 MEM_DQS2P MEM_DQ37 Y25
M_B_DQS3 AE25 V26 M_B_DQ38
W27 MEM_DQS4P MEM_DQ39 W25
M_B_DQS5 AB29 AC28 M_B_DQ40
P25 MEM_DQS6P MEM_DQ41 AC29
M_B_DQS7 R29 AA29 M_B_DQ42
MEM_DQS7P MEM_DQ42 M_B_DQ43
MEM_DQ43 Y29
11 M_B_DQS#[7..0] AD30 M_B_DQ44
MEM_DQ44
MEM_B I/F
M_B_DQS#0 AH17 AD29 M_B_DQ45
M_B_DQS#1 MEM_DQS0N MEM_DQ45 M_B_DQ46
AF15 MEM_DQS1N MEM_DQ46 AA30
M_B_DQS#2 AE22 Y28 M_B_DQ47
AF26 MEM_DQS3N MEM_DQ48 U27
M_B_DQS#4 W26 T27 M_B_DQ49
AB30 MEM_DQS5N MEM_DQ50 N26
M_B_DQS#6 R25 M27 M_B_DQ51
R30 MEM_DQS7N MEM_DQ52 U26
T26 M_B_DQ53
MEM_DQ53 M_B_DQ54
MEM_DQ54 P27
11 M_CLK_DDR#0 AC26 P26 M_B_DQ55
MEM_CK0N MEM_DQ55 M_B_DQ56
11 M_CLK_DDR0 AC25 MEM_CK0P MEM_DQ56 U29
11 M_CLK_DDR#1 AF16 T29 M_B_DQ57 1D8V_S3
11 M_CLK_DDR1 AE16 MEM_CK1P MEM_DQ58 P29
V29 N29 M_B_DQ59 L=> 2.0V DDR
V30 MEM_CK2P MEM_DQ60 U28
1
11 M_CLK_DDR#3 AC24 T28 M_B_DQ61 H=> 1.8V DDRII
MEM_CK3N MEM_DQ61 M_B_DQ62 R336 R75
11 M_CLK_DDR3 AC23 MEM_CK3P MEM_DQ62 P28
11 M_CLK_DDR#4 AG17 N27 M_B_DQ63 61D9R2F-GP 1KR2J-1-GP
2 MEM_CK4N MEM_DQ63 2
11 M_CLK_DDR4 AF17 MEM_CK4P
W29 1D8V_S3
2
MEM_CK5N MEM_COMPN
W28 MEM_CK5P MEM_COMPN AE29
AJ15 MEM_COMPP
MEM_COMPP
1
11,12 M_CKE0 AH20 MEM_CKE0
SCD1U10V2KX-4GP
11,12 M_CKE1 AJ20 R346
MEM_CKE1
1
11,12 M_CKE2 AE24 N30 MEM_CAP2 61D9R2F-GP
MEM_CKE2 MEM_CAP2
1
11,12 M_CKE3 AE21 C73 R69
MEM_CKE3 1KR2J-1-GP
2
AJ14 MEM_CAP1 DY DDR_VREF_S3
2
M_CS0# MEM_CAP1
11,12 M_CS0# AH29 R68
2
M_CS1# MEM_CS0#
11,12 M_CS1# AG29 MEM_CS1#
11,12 M_CS2# M_CS2# AH28 AB27 MEM_VREF 1 2
M_CS3# MEM_CS2# MEM_VREF 0R2J-2-GP
11,12 M_CS3# AF29 MEM_CS3#
1
AD28 C72 C74 R70
MEM_VMODE
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
C127
C413
11,12 M_ODT0 AG30 1KR2J-1-GP
2
MEM_ODT0
1
1
11,12 M_ODT1 AE28 MEM_ODT1 DY
11,12 M_ODT2 AC30 AB26
2
MEM_RSRV2 MPVDD
SCD47U10V3KX-3GP
SCD47U10V3KX-3GP
11,12 M_ODT3 Y30 AA27 DY DY
2
2
MEM_RSRV3 MPVSS
RC410ME-GP 1D8V_S0
71.RC410.D0U
2
L3
1 HCB1608KF-181-GP <Variant Name> 1
68.00214.051
Bead:
Wistron Corporation
1
NB_MPVDD 200ohm, 200mA.

1

C82
SC1U6D3V2ZY-GP Title
2
RC410ME (2 of 5) Memory I/F

A3
Garda-5 SA
A B C D E
A B C D E
3D3V_S0 5V_S0
4
3
RN68
SRN10KJ-5-GP
NB_PWRGD level-shifted to 5V
1
2
4 4
B
3D3V_S0 6,37 NB_PWRGD E C NB_PWRGD_5V
3D3V_S0 Bead: Q30
G
R117 200ohm, 200mA. CH3904PT-GP Q31
2
Bead: 0R3-0-U-GP
R95 LVDS_DIGON D S
26ohm, 0R3-0-U-GP
LCDVDD_ON 13
1
600mA. 3D3V_S0_VDDR3
FDN337N-1-GP R480
1
C188 C185 100KR2J-1-GP
SC1U6D3V2ZY-GP
SCD1U10V2KX-4GP
1
C156
2
ATI Modify SC2D2U10V3ZY-1GP U51D 1 2
PART 4 OF 6 R492 DY 0R2J-2-GP
2 100mA ATI Modify
1D8V_S0 G5 B4 TXBOUT0- 13
1D8V_S0 VDDR3_1 TXOUT_U0N
G4 VDDR3_2 TXOUT_U0P A4 TXBOUT0+ 13 SB Modify
TXOUT_U1N B5 TXBOUT1- 13
3D3V_S0_AVDD_S C9 C6 TXBOUT1+ 13
AVDD TXOUT_U1P
1
Bead: C170 B6 TXBOUT2- 13

TXOUT_U2N
2
SC1U6D3V2ZY-GP
200ohm, R98
C10 AVSSN 250mA TXOUT_U2P A6
B7
TXBOUT2+ 13
2
TXOUT_U3N
200mA. 0R3-0-U-GP TXOUT_U3P A7
1D8V_S0 D8 1D8V_S0
AVDDDI
SC2D2U10V3ZY-1GP
3 3
Bead: E5 TXAOUT0- 13
1
TXOUT_L0N
C8 F5 TXAOUT0+ 13
200ohm, AVSSDI TXOUT_L0P
2
TXOUT_L1N D5 TXAOUT1- 13
2
200mA. C166 C165 C164 C5 TXAOUT1+ 13 R96

TXOUT_L1P
SC1U6D3V2ZY-GP
SCD1U10V2KX-4GP
L27 1D8V_S0_AVDDQ B8 E6 TXAOUT2- 13 0R3-0-U-GP

HCB1608KF-181-GP AVDDQ TXOUT_L2N
100mA D6 TXAOUT2+ 13
2
68.00214.051 TXOUT_L2P
B9 E7
1
AVSSQ TXOUT_L3N 1D8V_S0
TXOUT_L3P E8
1
1
1D8V_S0_PLLVDD H10 SCD1U10V2KX-4GP C168
PLLVDD
2
SC2D2U10V3ZY-1GP
J8 1D8V_S0_LPVDD C169 SC1U6D3V2ZY-GP

LPVDD
1
C193 C142 R120

H9 20mA
2
C467 PLLVSS
LPVSS J7 0R3-0-U-GP
SC1U6D3V2ZY-GP
SCD1U10V2KX-4GP
2
TPAD30 TP70 TMDS_HPD J2 H8
1
TPAD30 TP72 DDC_DATA TMDS_HPD LVDDR18A_1 1D8V_S0_LVDDR18A
H3 DDC_DATA 100mALVDDR18A_2 H7
1
1 R92 2 C194
150R2F-1-GP 9,14 DAC_VSYNC B3 G9 C175 C162 SC1U6D3V2ZY-GP
DACVSYNC LVSSR_1 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
9,14 DAC_HSYNC C3 G8
2
DACHSYNC LVSSR_2
1 R91 2 R93 715R3-GP
LVSSR_3 G7
150R2F-1-GP 1 2 NB_REST B10 1D8V_S0
RSET
1 R90 2
300mA LVDDR18D C7
14 RED 150R2F-1-GP F10 RED LVDS_DIGON

14 GREEN E10 GREEN LVDS_DIGON E2
14 BLUE D10 BLUE LVDS_BLON G3 BL_ON 33
1
F2 LVDS_BLEN C174
LVDS_BLEN
CRT
TP69 TPAD30 SC1U6D3V2ZY-GP

2 2
F8 TXBCLK+ 13
2
TXCLK_UP
3 OSC14M G1 OSCIN TXCLK_UN F7 TXBCLK- 13
1
F6 3D3V_S0
TXACLK+ 13
CLK. GEN.
R359 TXCLK_LP
TXCLK_LN G6 TXACLK- 13
DUMMY-R2
DY 3 CLK_MCH_BCLK J1 CPU_CLKP
3 CLK_MCH_BCLK# K1 CPU_CLKN
2
C D9 TV_CRMA 14
R97
TV 1150R2F-1-GP
2 R118
2
R358 10KR2J-3-GP F9 TV_LUMA 14

TVCLKIN Y R101
1 2 G2 TVCLKIN TV 1150R2F-1-GP
2 4K7R2J-2-GP
E9 TV_COMP 14
1
COMP
1
SVID
TPAD30 TP71 SB_OSCIN_1 F1 R100

TV 1150R2F-1-GP
2
C466 OSCOUT
DACSCL B2 GMCH_DDCCLK 14
DUMMY-C2
DY DACSDA C2 GMCH_DDCDATA 14
13 EDID_CLK EDID_CLK D2 I2C_CLK STRP_DATA

D1 1 R357 2 4K7R2J-2-GP 3D3V_S0
2
EDID_DAT STRP_DATA
13 EDID_DAT C1 I2C_DATA
RC410ME-GP 3D3V_S0 STRP_DATA:Debug strap

DEFAULT:0
2
71.RC410.D0U
R119 High, E2PROM STRAPING
3D3V_S0 4K7R2J-2-GP Low, Memory Channel STRAPING
1
GMCH_DDCCLK
1 <Variant Name> 1
R362 1 2 4K7R2J-2-GP DDC_DATA
"DACSCL" Wistron Corporation

1 4 EDID_CLK 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
EDID_DAT
This strap select the CPU I/O voltage level. Q12 Taipei Hsien 221, Taiwan, R.O.C.
2 3
C
0: mobile CPU Interface(1.4V or below) R123

RN53 1: reserved(Desktop) B 1 2 Title
SRN4K7J-8-GP SB_PWRGD# 37
SIV Modify 2KR2F-3-GP RC410ME (3 of 5) Vedio I/F
E
CH3904PT-GP Size Document Number Rev

A3
Garda-5 -1
A B C D E
A B C D E
NB Strap pins
All pull-up and pull-down resistors are 4.7kohm.
4 U51B 4
J5 PART 2 OF 6 N1
GFX_RX0P GFX_TX0P
J4 GFX_RX0N GFX_TX0N N2
K4 GFX_RX1P GFX_TX1P P2
L4 R2
DY L6
GFX_RX1N
GFX_RX2P
GFX_TX1N
GFX_TX2P R1
1 R363 2 4K7R2J-2-GP 3D3V_S0 L5 GFX_RX2N GFX_TX2N T1
M5 GFX_RX3P GFX_TX3P T2
BMREQ# 1 R361 2 4K7R2J-2-GP M4 U2
GFX_RX3N GFX_TX3N
N4 GFX_RX4P GFX_TX4P V2
BMREQ# pulled down if CPU doesn't support BSEL2. P4 GFX_RX4N GFX_TX4N V1
P6 GFX_RX5P GFX_TX5P W1
P5 GFX_RX5N GFX_TX5N W2
R5 GFX_RX6P GFX_TX6P Y2
R4 GFX_RX6N GFX_TX6N AA2
3D3V_S0 1D05V_S0 T4 AA1
GFX_RX7P GFX_TX7P
T3 GFX_RX7N GFX_TX7N AB1
U6 GFX_RX8P GFX_TX8P AB2
U5 GFX_RX8N GFX_TX8N AC2
2
2
V5 GFX_RX9P GFX_TX9P AD2
R113 R109 V4 AD1
GFX_RX9N GFX_TX9N
4K7R2J-2-GP 4K7R2J-2-GP W4 GFX_RX10P GFX_TX10P AE1
W3 GFX_RX10N GFX_TX10N AE2
Y6 AF2
1
B 1
GFX_RX11P GFX_TX11P
Y5 GFX_RX11N GFX_TX11N AG2
AA5 GFX_RX12P GFX_TX12P AG1
AA4 GFX_RX12N GFX_TX12N AH1
8,14 DAC_HSYNC 1 R111 2 C E CPU_SEL1 3,4 AB4 GFX_RX13P GFX_TX13P AH2
AB3 GFX_RX13N GFX_TX13N AJ2
3 4K7R2J-2-GP Q11 AC6 AJ3 3
GFX_RX14P GFX_TX14P
AC5 GFX_RX14N GFX_TX14N AJ4
CH3904PT-GP AD5 AK4
GFX_RX15P GFX_TX15P
AD4 GFX_RX15N GFX_TX15N AJ5
3D3V_S0 1D05V_S0
32 PCIE_RXP0 AF8 GPP_RX0P GPP_TX0P AJ8 PCIE_LAN_TXP0_1 C460 1 2 SCD1U10V2KX-4GP PCIE_TXP0 32

R106 AG8 AJ9 PCIE_LAN_TXN0_1 C459 1 2 SCD1U10V2KX-4GP PCIE_TXN0
32 PCIE_RXN0 GPP_RX0N GPP_TX0N 32
2
4K7R2J-2-GP AG6 AE6

R114 GPP_RX1P GPP_TX1P
AG7 AF6
4K7R2J-2-GP DY GPP_RX1N GPP_TX1N
27 PCIE_RXP2 AK7 AJ6 PCIE_MC_TXP_2_1 C462 1 2 SCD1U10V2KX-4GP

1
B 1
GPP_RX2P GPP_TX2P PCIE_TXP2 27

27 PCIE_RXN2 AJ7 GPP_RX2N GPP_TX2N AK6 PCIE_MC_TXN_2_1 C461 1 2 SCD1U10V2KX-4GP PCIE_TXN2 27
AG4 AE4
DY AH4
GPP_RX3P
GPP_RX3N
GPP_TX3P
GPP_TX3N AF4
8,14 DAC_VSYNC 1 R108 2 C E CPU_SEL0 3,4
4K7R2J-2-GP Q10 15 PCIE_RX0P_SB AG9 AJ10 PCIE_TX0P_NB SCD1U10V2KX-4GP 1 2 C451 PCIE_TX0P_SB 15
SB_RX0P SB_TX0P PCIE_TX0N_NB SCD1U10V2KX-4GP C450
15 PCIE_RX0N_SB AG10 SB_RX0N SB_TX0N AJ11 1 2 PCIE_TX0N_SB 15
CH3904PT-GP 15 PCIE_RX1P_SB AE9 AK9 PCIE_TX1P_NB SCD1U10V2KX-4GP 1 2 C457 PCIE_TX1P_SB 15
SB_RX1P SB_TX1P PCIE_TX1N_NB SCD1U10V2KX-4GP C453
15 PCIE_RX1N_SB AF10 SB_RX1N SB_TX1N AK10 1 2 PCIE_TX1N_SB 15
3 CLK_NB_ALINK K2 AK13 PCE_TXSET

SB_CLKP PCE_TXSET
3 CLK_NB_ALINK# L2 SB_CLKN
AJ12 PCE_ISET
PCE_ISET
3 CLK_NB_GFX M2 GFX_CLKP
2 2
3 CLK_NB_GFX# M1 GFX_CLKN
AH12 PCE_PCAL
PCE_PCAL
Select the FSB SPEED H2
15 BMREQ# BMREQ#
PCE_NCAL AG12 PCE_NCAL
BMREQ# HSYNC VSYNC Freq.
1
0 0 0 100MHZ RC410ME-GP R88 R347
71.RC410.D0U 82D5R2F-1-GP R94 R349 8K25R2F-1-GP
150R2F-1-GP 10KR2F-2-GP
0 0 1 133MHZ
2
0 1 0 ------ 1D2V_S0
0 1 1 166MHZ
Adjust PCI-E Amp. R->Small then Amp->Large
1 0 0 100MHZ
1 0 1 100MHZ
1 1 0 ------
1 1 1 ------
1 <Variant Name> 1
Wistron Corporation
Title
RC410ME (4 of 5) PCI-E & Strap
A3
Garda-5 SA
A B C D E
A B C D E
U51F
W5 PART 6 OF 6 M14
VSSA#U5 VSS#M15
W6 VSSA#U6 VSS#G14 AC14
1D2V_S0 At least 1D8V_S3 At least AB5 AG16
U51E VSSA#Y5 VSS#G18
4 AB6 A22 4
22u*1, 0.1u*7. PART 5 OF 6 22u*1(ESR<=100), 0.1u*16. V8
VSSA#Y6 VSS#G27
A2
VSSA#P8 VSS#G3
U16 VDD_CORE#M12 VDD_MEM#AB30 Y24 V7 VSSA#P7 VSS#H13 D27
C123 C144 C148 C146 C147 C133 C109 M13 AC21 C407 C65 C119 C97 C402 C138 C125 AA8 AG26
VDD_CORE#M13 VDD_MEM#AJ21 VSSA#U8 VSS#H14
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
M15 VDD_CORE#M14 VDD_MEM#AK21 AD21 AA7 VSSA#U7 VSS#H18 H18
1
1
DY M17 VDD_CORE#M17 VDD_MEM#AC13 AC13 AD7 VSSA#Y7 VSS#H23 A16
R16 VDD_CORE#M18 VDD_MEM#AC14 AD23 AD8 VSSA#Y8 VSS#H4 A9
V15 AC16 R8 AD17
2
2
VDD_CORE#M19 VDD_MEM#AC15 VSSA#L8 VSS#J23
N12 VDD_CORE#N12 VDD_MEM#AC18 AD19 N8 VSSA#K7 VSS#J24 J24
T15 VDD_CORE#N13 VDD_MEM#AC21 AD22 R7 VSSA#AD7 VSS#J30 R27
N14 VDD_CORE#N14 VDD_MEM#AD10 V23 N7 VSSA#A2 VSS#K27 D24
N16
N18
VDD_CORE#N17 2.6A VDD_MEM#AD13 AD13
AD16
AF7
AE8
VSSA#AF5 VSS#V30 T30
U19
VDD_CORE#N18 VDD_MEM#AD15 VSSA#AC6 VSS#U19
M19 VDD_CORE#N19 VDD_MEM#AD18 AC19 AG5 VSSA#AC5 VSS#M16 M16
R12 AB24 C121 C101 C124 C94 C95 C96 T6 AD11
VDD_CORE#P12 VDD_MEM#AD21 VSSA#P6 VSS#AD11
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SCD1U10V2KX-4GP
C129 C128 C108 C145 C122 C135 C132
CORE POWER
P13 VDD_CORE#P13 VDD_MEM#AE15 AK24 T5 VSSA#P5 VSS#M30 H15
1
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
P15 VDD_CORE#P14 VDD_MEM#AE18 T24 N6 VSSA#L6 VSS#N15 N15

2
1
DY P17 VDD_CORE#P17 VDD_MEM#AE21 AK28 N5 VSSA#L5 VSS#N16 N19
P19 AB23 AH5 D3
2
VDD_CORE#P19 VDD_MEM#AG27 VSSA#H6 VSS#N23
U12 Y23 K5 A25
1
2 VDD_CORE#U12 VDD_MEM#AJ30 VSSA#H5 VSS#N27

T13
U14
VDD_CORE#U13 5A VDD_MEM#AK18 AK21
T23
AH3
AH8
VSSA#P4 VSS#G5 F3
R15
VDD_CORE#U14 VDD_MEM#AK24 1D05V_S0 VSSA#AE3 VSS#P15
T17 VDD_CORE#U17 VDD_MEM#AK9 V24 AH7 VSSA#AD3 VSS#P16 P16
U18 VDD_CORE#U18 VDD_MEM#W23 AC22 AH6 VSSA#AC3 VSS#P23 G10
T19 VDD_CORE#U19 AD3 VSSA#AA3 VSS#P24 M24
V13 H11 AC3 M12
POWER
VDD_CORE#V13 VDD_CPU#H17 C406 C136 C134 C98 C126 C93 C120 C131 C140 VSSA#Y3 VSS#R12
R14 VDD_CORE#V14 VDD_CPU#H19 H13 AA3 VSSA#V3 VSS#R13 R13
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C110 C139
SC10U10V5ZY-1GP
V17 VDD_CORE#V17 VDD_CPU#K23 G20 Y3 VSSA#U3 GND VSS#R14 P12
1
SC1U10V2KX-GP
SCD1U10V2KX-4GP
R18 VDD_CORE#V18 VDD_CPU#L23 L23 V3 VSSA#R3 VSS#R15 P14

1
3 V19 L24 U3 U13 3

VDD_CORE#V19 VDD_CPU#L24 VSSA#P3 VSS#R16
W12 P23 R3 R17
2
VDD_CORE#W12 VDD_CPU#M23 VSSA#M3 VSS#R17
DY W14 N23 P3 V18
2
VDD_CORE#W14 VDD_CPU#M24 VSSA#L3 VSS#R18

W16 VDD_CORE#W17 VDD_CPU#T23 H17 M3 VSSA#J3 VSS#R19 R19
W18 VDD_CORE#W18 VDD_CPU#U23 G17 L3 VSSA#H3 VSS#R23 R23
H14 AF5 R24
MEM POWER
VDD_CPU#U24 VSSA#F3 VSS#R24
J9 VDD_18 VDD_CPU#V23 F17 AF3 VSSA#N3 VSS#R30 J30
AB22 VDD_18#AF26 VDD_CPU#V24 G14 AF9 VSSA#AG3 VSS#T12 T12
AB9
J22
VDD_18#AF9 300mA VDD_CPU#G16 A10
H16
AH9
AH10
VSSA#AE9 VSS#T13 N13
T14
D26 VDD_18#J26 VDD_CPU#G15 VSSA#AH7 VSS#T14
Bead:
2
Y8
1A VDD_CPU#F22 H23
H12
AC20
J23
VSS#A15 VSS#T15 P18
T16
3D3V_S0 VDDA_18#U8 VDD_CPU#F19 VSS#A24 VSS#T16
3 U8 F12 A29 U17
26ohm, 600mA. AB8
VDDA_18#AD8 VDD_CPU#F16
G12 W30
VSS#A29 VSS#T17
T18
VDDA_18#W6 VDD_CPU#F15 VSS#AA23 VSS#T18
1 Y7 VDDA_18#AA8 VDD_CPU#E15 F11 W23 VSS#AA24 VSS#T19 W19
1D8V_S0 U7 P24 AA28 J27
VDDA_18#AA7 VDD_CPU#A16 VSS#AA30 VSS#T27
3
BAV99PT-GP-U
D25
AE11
AC9
VDDA_18#AE7 600mA VDD_CPU#H16 H19
G11
AJ30
AC12
VSS#AB27 VSS#U15 U15
N17
VDDA_18#AD7 VDD_CPU#H15 VSS#AC12 VSS#U16
1
AD10 VDDA_18#AC8 VDD_CPU#G22 H24 At least AC15 VSS#AC16 VSS#V15 M18

L26 AC10 G16 1D2V_S0 K8 V16
HCB1608K-300T10GP BAV99PT-GP-U AG11
VDDA_18#AC7 VDD_CPU#G21
G13 47u*1(ESR<=100), 1u*4. AD12
VSS#AC8 VSS#V16
W17
VDDA_18#AG6 VDD_CPU#G19 L6 VSS#AD12 VSS#W16
68.00214.111 AF11 AD15 M26
1
3D3V_S0_D VDDA_18#AF6 1D2V_S0_PCIE VSS#AD16 VSS#W27

PCIE
VDDA_12#N8 AC8 1 2 AD18 VSS#AD19 VSS#V12 V12

H5 K6 C182 C183 C178 C152 C184 C187 C176 HCB1608KF-300-GP AC17 W13
2
VDDA_12#K6 VDDA_12#C3 VSS#AD23 VSS#W13
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
H4 M8 AE30 V14
CPU IF POWER
VDDA_12#K4 VDDA_12#R7 VSS#AD30 VSS#V14
1
PCIE POWER
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
1D8V_S0_VDD18_A P8 T8 68.00214.081 AD14 W15
C102 C103 C154 C149 VDDA_12#F6 VDDA_12#R8 VSS#AD8 VSS#W15
P7 VDDA_12#F5 2.25A VDDA_12#U7 T7 AC11 VSS#AD9 VSS#Y23 U23
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
At least 1u*4. L7 M7 Bead: AF12 U24
2
VDDA_12#B3 VDDA_12#B2 VSS#AE12 VSS#Y24
1
L8 W8 AF27 A13
2
J6
VDDA_12#A3 VDDA_12#K8
W7 50ohm, 3A. AC18
VSS#AE27 VSS#C19
V28
2
VDDA_12#B4 VDDA_12#L7 VSS#AC19 VSS#C17
AC7 AD9 AG14 AG24
2
VDDA_12#M8 VDDA_12#L8 VSS#AG12 VSS#AH26

AB7 VDDA_12#W5 F4 VSS#AF7 VSS#AH25 AA24
AG18 VSS#AG18 VSS#AG25 AA23
RC410ME-GP AG21 F30
71.RC410.D0U VSS#AG21 VSS#F30
AK25 VSS#AG9 VSS#F25 K23
C161 C160 C181 C180 V27 D20
VSS#AH28 VSS#D27
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
AJ1 VSS#AJ1 VSS#D25 A19
1
1D8V_S0
DY AD20 VSS#AK10 VSS#D23 D17
AK12 VSS#AK13 VSS#D20 D14
AK15 F27
2
VSS#AK16 VSS#D17
Bead: AK18 VSS#AK19 VSS#C3 D4
AK2 M23
50ohm, 3A. VSS#AK2 VSS#C28
1
AH11 VSS#AH11 VSS#B30 B30

L25 J3 B1
VSS#AJ11 VSS#B1
HCB1608KF-300-GP AC27 VSS#AK25 VSS#AK29 AK29
68.00214.081 VSS#AK22 AK22
At least Supply Signal group Icc-max RC410ME-GP
2
100u*1(ESR<=250), 1u*6. 71.RC410.D0U

1D8V_S0_VDD18_B
C151 C155 C153 C177 C179
1D2V_S0 VDD_CORE 5A
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
SC1U10V2KX-GP
1
1D8V_S0 VDD_18 1.37A

2
1D2_S0 VDDA_12 2.25A

1 <Variant Name> 1
1D8V_S3 VDD_MEM 2.6A

Wistron Corporation
1D05V_S0 VDD_CPU 1A Taipei Hsien 221, Taiwan, R.O.C.
Title
RC410ME (5 of 5) Power
A3
Garda-5 SA
A B C D E
A B C D E
DM1
7,12 M_B_A[17..0] DM2 7,12 M_B_A[17..0]

M_B_A0 102 108 M_B_RAS# 7,12 M_B_A0 102 108 M_B_RAS# 7,12
M_B_A1 A0 /RAS M_B_A1 A0 RAS#
101 A1 /WE 109 M_B_WE# 7,12 101 A1 WE# 109 M_B_WE# 7,12
M_B_A2 100 113 M_B_CAS# 7,12 M_B_A2 100 113 M_B_CAS# 7,12
M_B_A3 A2 /CAS M_B_A3 A2 CAS#
99 A3 99 A3
M_B_A4 98 110 M_CS2# 7,12 M_B_A4 98 110 M_CS0# 7,12
M_B_A5 A4 /CS0 M_B_A5 A4 CS0#
97 A5 /CS1 115 M_CS3# 7,12 97 A5 CS1# 115 M_CS1# 7,12
M_B_A6 94 M_B_A6 94
M_B_A7 A6 M_B_A7 A6
92 A7 CKE0 79 M_CKE2 7,12 92 A7 CKE0 79 M_CKE0 7,12
M_B_A8 93 80 M_CKE3 7,12 M_B_A8 93 80 M_CKE1 7,12
M_B_A9 A8 CKE1 M_B_A9 A8 CKE1
91 A9 91 A9
M_B_A10 105 30 M_CLK_DDR4 7 M_B_A10 105 30 M_CLK_DDR1 7
4
M_B_A11 A10/AP CK0 M_B_A11 A10/AP CK0 4
90 A11 /CK0 32 M_CLK_DDR#4 7 90 A11 CK0# 32 M_CLK_DDR#1 7
M_B_A12 89 M_B_A12 89
M_B_A13 A12 M_B_A13 A12
116 A13 CK1 164 M_CLK_DDR3 7 116 A13 CK1 164 M_CLK_DDR0 7
M_B_A14 86 166 M_CLK_DDR#3 7 M_B_A14 86 166 M_CLK_DDR#0 7
A14 /CK1 A14 CK1#
84 A15 M_B_DM[7..0] 7 84 A15
M_B_A17 85 10 M_B_DM0 M_B_A17 85 10 M_B_DM0
A16/BA2 DM0 M_B_DM1 A16/BA2 DM0 M_B_DM1
DM1 26 DM1 26
M_B_A15 107 52 M_B_DM2 M_B_A15 107 52 M_B_DM2
M_B_A16 BA0 DM2 M_B_DM3 M_B_A16 BA0 DM2 M_B_DM3
106 BA1 DM3 67 106 BA1 DM3 67
130 M_B_DM4 130 M_B_DM4
M_B_DQ0 DM4 M_B_DM5 DM4 M_B_DM5
5 DQ0 DM5 147 DM5 147
M_B_DQ1 7 170 M_B_DM6 M_B_DQ0 5 170 M_B_DM6
7 M_B_DQ[63..0] DQ1 DM6 DQ0 DM6
M_B_DQ2 17 185 M_B_DM7 M_B_DQ1 7 185 M_B_DM7
DQ2 DM7 7 M_B_DQ[63..0] DQ1 DM7
M_B_DQ3 19 M_B_DQ2 17
M_B_DQ4 DQ3 M_B_DQ3 DQ2
4 DQ4 SDA 195 SMB_DATA 3,18,27,32 19 DQ3
M_B_DQ5 6 197 SMB_CLK 3,18,27,32 3D3V_S0 M_B_DQ4 4 195 SMB_DATA
M_B_DQ6 DQ5 SCL M_B_DQ5 DQ4 SDA SMB_CLK
14 DQ6 6 DQ5 SCL 197
M_B_DQ7 16 199 M_B_DQ6 14
M_B_DQ8 DQ7 VDDSPD M_B_DQ7 DQ6
23 DQ8 16 DQ7 VDDSPD 199 3D3V_S0
M_B_DQ9 25 198 M_B_DQ8 23
DQ9 SA0 DQ8
1
M_B_DQ10 35 200 1 2 M_B_DQ9 25 198
M_B_DQ11 DQ10 SA1 R31 10KR2J-3-GP M_B_DQ10 DQ9 SA0 C42
37 DQ11 35 DQ10 SA1 200
1
M_B_DQ12 20 50 M_B_DQ11 37 SCD1U16V2ZY-2GP
2
M_B_DQ13 DQ12 NC#50 C41 M_B_DQ12 DQ11
22 DQ13 NC#69 69 20 DQ12 NC#50 50
M_B_DQ14 36 83 SCD1U16V2ZY-2GP M_B_DQ13 22 69
2
M_B_DQ15 DQ14 NC#83 M_B_DQ14 DQ13 NC#69
38 DQ15 NC#120 120 36 DQ14 NC#83 83
M_B_DQ16 43 163 M_B_DQ15 38 120
M_B_DQ17 DQ16 NC#163/TEST M_B_DQ16 DQ15 NC#120
45 DQ17 43 DQ16 NC#163/TEST 163
M_B_DQ18 55 M_B_DQ17 45
M_B_DQ19 DQ18 M_B_DQ18 DQ17
57 DQ19 VDD 81 55 DQ18
M_B_DQ20 44 82 M_B_DQ19 57 81
3 M_B_DQ21 DQ20 VDD M_B_DQ20 DQ19 VDD 3
46 DQ21 VDD 87 44 DQ20 VDD 82
M_B_DQ22 56 88 M_B_DQ21 46 87
M_B_DQ23 DQ22 VDD M_B_DQ22 DQ21 VDD
58 95 56 88
Reverse TYPE
61 96 58 95
Reverse TYPE

63 DQ25 VDD 103 61 DQ24 VDD 96
M_B_DQ26 73 104 M_B_DQ25 63 103
75 DQ27 VDD 111 73 DQ26 VDD 104
M_B_DQ28 62 112 M_B_DQ27 75 111
64 DQ29 VDD 117 62 DQ28 VDD 112
M_B_DQ30 74 118 M_B_DQ29 64 117
DQ30 VDD 1D8V_S3 DQ29 VDD
M_B_DQ31 76 M_B_DQ30 74 118
DQ31 DQ30 VDD 1D8V_S3
M_B_DQ32 123 3 M_B_DQ31 76
M_B_DQ33 DQ32 VSS M_B_DQ32 DQ31
125 DQ33 VSS 8 123 DQ32 VSS 3
M_B_DQ34 135 9 M_B_DQ33 125 8
M_B_DQ35 DQ34 VSS M_B_DQ34 DQ33 VSS
137 DQ35 VSS 12 135 DQ34 VSS 9
M_B_DQ36 124 15 M_B_DQ35 137 12
126 DQ37 VSS 18 124 DQ36 VSS 15
M_B_DQ38 134 21 M_B_DQ37 126 18
136 DQ39 VSS 24 134 DQ38 VSS 21
M_B_DQ40 141 27 M_B_DQ39 136 24
143 DQ41 VSS 28 141 DQ40 VSS 27
M_B_DQ42 151 33 M_B_DQ41 143 28
153 DQ43 VSS 34 151 DQ42 VSS 33
M_B_DQ44 140 39 M_B_DQ43 153 34
142 DQ45 VSS 40 140 DQ44 VSS 39
M_B_DQ46 152 41 M_B_DQ45 142 40
154 DQ47 VSS 42 152 DQ46 VSS 41
M_B_DQ48 157 47 M_B_DQ47 154 42
159 DQ49 VSS 48 157 DQ48 VSS 47
M_B_DQ50 173 53 M_B_DQ49 159 48
175 DQ51 VSS 54 173 DQ50 VSS 53
M_B_DQ52 158 59 M_B_DQ51 175 54
2
M_B_DQ53 DQ52 VSS M_B_DQ52 DQ51 VSS 2
160 DQ53 VSS 60 158 DQ52 VSS 59
M_B_DQ54 174 65 M_B_DQ53 160 60
176 DQ55 VSS 66 174 DQ54 VSS 65
M_B_DQ56 179 71 M_B_DQ55 176 66
181 DQ57 VSS 72 179 DQ56 VSS 71
M_B_DQ58 189 77 M_B_DQ57 181 72
191 DQ59 VSS 78 189 DQ58 VSS 77
M_B_DQ60 180 121 M_B_DQ59 191 78
182 DQ61 VSS 122 180 DQ60 VSS 121
M_B_DQ62 192 127 M_B_DQ61 182 122
194 DQ63 VSS 128 192 DQ62 VSS 127
132 M_B_DQ63 194 128
M_B_DQS#0 VSS DQ63 VSS
11 /DQS0 VSS 133 VSS 132
M_B_DQS#1 29 138 M_B_DQS#0 11 133
7 M_B_DQS#[7..0] /DQS1 VSS DQS0# VSS
M_B_DQS#2 49 139 M_B_DQS#1 29 138
M_B_DQS#3 /DQS2 VSS M_B_DQS#2 DQS1# VSS
68 /DQS3 VSS 144 49 DQS2# VSS 139
M_B_DQS#4 129 145 M_B_DQS#3 68 144
146 /DQS5 VSS 149 129 DQS4# VSS 145
M_B_DQS#6 167 150 M_B_DQS#5 146 149
186 /DQS7 VSS 155 167 DQS6# VSS 150
156 M_B_DQS#7 186 155
M_B_DQS0 VSS DQS7# VSS
13 DQS0 VSS 161 VSS 156
M_B_DQS1 31 162 M_B_DQS0 13 161
7 M_B_DQS[7..0] DQS1 VSS DQS0 VSS
M_B_DQS2 51 165 M_B_DQS1 31 162
M_B_DQS3 DQS2 VSS M_B_DQS2 DQS1 VSS
70 DQS3 VSS 168 51 DQS2 VSS 165
M_B_DQS4 131 171 M_B_DQS3 70 168
148 DQS5 VSS 172 131 DQS4 VSS 171
M_B_DQS6 169 177 M_B_DQS5 148 172
188 DQS7 VSS 178 169 DQS6 VSS 177
183 M_B_DQS7 188 178
VSS DQS7 VSS
7,12 M_ODT1 114 ODT0 VSS 184 VSS 183
1 119 187 114 184 1
7,12 M_ODT3 ODT1 VSS 7,12 M_ODT0 OTD0 VSS
DDR_VREF_S3 VSS 190 7,12 M_ODT2 119 OTD1 VSS 187 <Variant Name>
1 VREF VSS 193 VSS 190
2 VSS VSS 196 DDR_VREF_S3 1 VREF VSS 193
1
C196 C191 2 196

Wistron Corporation
SC2D2U10V3ZY-1GP
VSS VSS
1
DY 202 201 C195 C192

SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
GND GND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

DY 202 201
SCD1U16V2ZY-2GP
2
GND GND Taipei Hsien 221, Taiwan, R.O.C.

SKT-SODIMM20022U1GP
2
62.10017.691 MH1 MH2

MH1 MH2
High 5.2mm Title
2nd source:62.10017.891 DDR2 Socket
DDR2-200P-23-GP-U 62.10017.A71
High 9.2mm Size Document Number Rev
Custom
2nd source:62.10017.B51 Garda-5 SA
A B C D E
A B C D E
PARALLEL TERMINATION Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S0
Put decap near power(0.9V)
RN52 DDR_VREF_S0
8 1 M_B_A12 and pull-up resistor
7 2 M_B_A2
4 6 3 M_B_A4 4
5 4 M_CKE2 7,11
1
SRN56J-5-GP
M_B_A[17..0] 7,11
C405 C408
DY
C410
DY
C412 C414 C425 C427
DY C428 DY
C429 C430 C431
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
1 2 M_ODT1 7,11
R332 56R2J-4-GP
1 2M_B_A17
R82 56R2J-4-GP
RN50
8 1 M_B_A10
7 2 M_B_A16
6 3 M_B_A1
5 4 M_B_A0
1
SRN56J-5-GP C432 C433 C434
DY
C401 C404 C99
DY
C106 C100
DY C107 C118 C117
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN48
2
8 1 M_B_WE# 7,11
7 2 M_B_RAS# 7,11
6 3 M_B_A15
5 4 M_CS2# 7,11
SRN56J-5-GP
RN51
8 1 M_B_A3
M_B_A5
3
7
6
2
3 M_B_A8 1D8V_S3 Place these Caps near DM1 3
5 4 M_B_A9
SRN56J-5-GP DY DY
1
RN4 C400 C403 C67 C435 C436
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
8 1 M_B_A6
2
7 2 M_B_A11
6 3 M_B_A7
5 4 M_B_A14
SRN56J-5-GP
RN46
8 1 M_ODT0 7,11
7 2 M_B_A13
6 3 M_CS0# 7,11
5 4 M_B_CAS# 7,11
1
SRN56J-5-GP C88 C90
DY
C87
DY
C85
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
RN45
8 1 M_ODT2 7,11
7 2 M_CS1# 7,11
6 3 M_ODT3 7,11
5 4 M_CS3# 7,11
SRN56J-5-GP
2 RN5 2
8 1 M_CKE0 7,11
7 2
6
5
3
4
M_CKE3 7,11 1D8V_S3 Place these Caps near DM2
M_CKE1 7,11
SRN56J-5-GP
DY DY
1
1
C426 C66 C415 C411 C91
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
2
2
1
1
C86 C89
DY C105 C83
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1 <Variant Name> 1
Wistron Corporation
Title
DDR2 Termination Resistor

A3
Garda-5 SA
A B C D E
CCD Pin
Pin Symbol
LCD/INVERTER/CCD CONN 3D3V_S0
LCD1 EC78
1 3.3V
43 41 1 2
SCD1U10V2KX-4GP
SC100P50V2JN-3GP
2 USB-
SC100P50V2JN-3GP
MH1 1
1
3 USB+ EC50 EC51
2 CCD_PWR
LCDVDD_S0 3D3V_S0 4 GND 45 3
DY
2
U8
Layout 40 mil 4
DY EDID_CLK 8 LCDVDD_S0
5 GND 5 EDID_DAT 8
Layout 40 mil 6
1 OUT IN 6 7
Inverter Pin
SC10U10V5ZY-1GP
2 5 8
SCD1U16V2ZY-2GP
GND GND
1
8 LCDVDD_ON 3 4 9 C17 C16
ON/OFF# IN TXACLK- 8
Pin Symbol 10 TXACLK+ 8
1
11
DY
2
C20 C23 AAT4280IGU-3-T1GP C25 1 Vin 12
SC1U6D3V2ZY-GP 74.04280.B9P SC1U6D3V2ZY-GP TXAOUT2- 8
13
2
SCD1U50V3ZY-GP TXAOUT2+ 8
2 Vin 14
15 TXAOUT1- 8
3 PWM 16 TXAOUT1+ 8
17 EVEN CHANNEL
4 BLON 18 TXAOUT0- 8
19 TXAOUT0+ 8
1 R20 2 5 GND 20
3D3V_S0 0R2J-2-GP 21
U10 TXBOUT0- 8
6 GND 22 TXBOUT0+ 8
23
5 IN
DY OUT 1 CCD_PWR 24 TXBOUT1- 8
GND 2 Launch BD 25 TXBOUT1+ 8
33 CCD_ON CCD_ON 4 3 26
ON/OFF# NC#3
1
SCD1U10V2KX-4GP
Pin Symbol 27 ODD CHANNEL
SCD1U16V2ZY-2GP
TXBOUT2- 8
1
C30 EC13 28
AAT4250IGV-T1-GP TXBOUT2+ 8
1 3V_S0 29
2
74.04250.A3F 30
2
TXBCLK- 8
2 PWRBTN# 31 TXBCLK+ 8
32
3 PROGRAM# 33 BRIGHTNESS BRIGHTNESS 33
34 BLON_OUT 33
4 EBUTTON# 35
2
EC14 EC15
SC100P50V2JN-3GP
SC100P50V2JN-3GP
36 1 DY 2
R4881 0R2J-2-GP
USB_PN5 18
R19
5 INTERNET# 37 2 USB_PP5 18
46 38 R489 0R2J-2-GP DCBATOUT 100KR2J-1-GP
2
6 MAIL# 39 DY
MH2 40
TOP VIEW
1
SCD1U25V3KX-GP
7 NC Layout 60 mil
SC1U50V5ZY-1-GP
3D3V_S5
LCD
44 42
1
LED6 LED-Y-47-GP 8 MAIL_LED# C19 C18
STDBY_LED#1 2 K A on Front Panel IPEX-CON40-2-GP
33 STDBY_LED# R473 83.00190.D7A 20.F0763.040
9 PWR_B_LED#
2
100R2J-2-GP
1 2 EC43
SCD1U10V2KX-4GP
10 NC
L32
40 1
4 3
DY 3D3V_S0
11 INT_MICP
LED5 12 INT_MICN 1 2
PWRLED# 1 2 2 1 on Front Panel FILTER-79-GP
33 PWRLED# R468 LED-B-48-GP 69.10084.071
100R2J-2-GP 83.00190.L70
1 2 EC44
SCD1U10V2KX-4GP -1 EMI Modify
DY
33 CHRGER_LED#
CHRGER_LED#1
R476
2 K
LED3 LED-Y-47-GP
A
83.00190.D7A
3D3V_S5
LED BD CONN 3D3V_S0 5V_S0
100R2J-2-GP 3D3V_S0
Charger:
on Front Panel OFF : Battery or DC only
1
R343
SATA SATA
1
Orange : Charging 4K7R2J-2-GP
LED4 Orange Blink : Battery low

LEDB1 EC67
SCD1U10V2KX-4GP Dummy when use IDE R151
10KR2J-3-GP
10
2
DC_BATFULL# 1 2 2 1 8
SATA
2
33 DC_BATFULL# R469 LED-B-48-GP on Front Panel Power: 8 7 D24
2
100R2J-2-GP 83.00190.L70 6 2 CDROM_LED# 21 2 1
Green : S0 5 MEDIA_LED# 3 R150 0R2J-2-GP SATA_LED# 16
5V_S0 Orange : S3 4 NUM_LED# 2 PATA

1
3 CAP_LED# 1 R344 0R2J-2-GP HDLED# 2 1
Orange Blinking : Enter S4 2 R345 0R2J-2-GP HDD_LED# 21
LED7 1 BAW56PT-U
33 BT_LED#
BT_LED# 1 2 2 1 on Front Panel 1 83.00056.E11 PATA
R477
330R2J-3-GP
LED-B-27-U-GP
83.00190.P70
9 Dummy when use SATA
MLX-CON8-7-GP-U
3D3V_S0 20.K0185.008
1st source: 20.K0228.008
LED8 LED-Y-47-GP
1 R475
2 K A on Front Panel
27 WLAN_LED# 100R2J-2-GP 83.00190.D7A
RC3
SRC100P50V-2-GP
CHRGER_LED# 1 8
3D3V_S0 DC_BATFULL# 2 7
RN67
PWRLED# 3 6
33 BT_BTN# 1 4 STDBY_LED# 4 DY 5
<Variant Name>
33 WIRELESS_BTN# 2 3 RC2
SRC100P50V-2-GP
SRN10KJ-5-GP 1 8 Wistron Corporation
CAP_LED# 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Front panel 33 CAP_LED# NUM_LED# 3 DY 76 Taipei Hsien 221, Taiwan, R.O.C.
LED V V V V BTBTN1 WLBTN1 1 3 33 NUM_LED# MEDIA_LED# 4 5
Title
4 1 1 4
Button V V EC88
2 2 BT_LED# 1 2 LCD / LAUNCH / LEDs
BlutTooth Wireless Charger Power2 3 3 DY SC100P25V2JN-1GP Size Document Number Rev
5 5 EC87 A3
Edge Trigger WLAN_LED# 1 2
Gards-5 -1
SW-SLIDE49-GP SW-SLIDE49-GP DY SC100P25V2JN-1GP Date: Wednesday, April 26, 2006 Sheet 13 of 46
2nd source: 62.40066.001 62.40068.001 62.40068.001
A B C D E
Layout Note:
Place these resistors
Ferrite bead impedance: 30 ohm@100MHz
CRT I/F & CONNECTOR
close to the CRT-out 5V_S0
connector
L14
RED 1 2 CRT_R 5V_CRT_S0
A
8 RED BLM18PG300SN-GP
68.00143.071 D5
CH751H-40PT-1GP
L13
GREEN 1 2 CRT_G
K
8 GREEN BLM18PG300SN-GP
4 4
68.00143.071
1
4
3
L12 C1
BLUE 1 2 CRT_B RN1 SCD01U16V2KX-3GP
2
8 BLUE BLM18PG300SN-GP SRN2K2J-1-GP
1
SC3D9P50V2CN-1GP
SC3D9P50V2CN-1GP
SC3D9P50V2CN-1GP
68.00143.071 CRT1
1
R224 R217 R225 C326 C324 C327 C319 C318 C314 17 3D3V_S0
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
2
1
2
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
6
2
11 1 CRT_R
1
7 R5
DAT_DDC1_5 12 2 CRT_G 10KR2J-3-GP
8
JVGA_HS 13 3 CRT_B
Layout Note:
2
SB Modify for SIV issue 9
JVGA_VS
* Must be a ground return path between this ground and the ground on 14 4
10 R2
the VGA connector. CLK_DDC1_5 15 5 1 2
33R2J-2-GP
CRT_IN# 33
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT 16
1
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. VIDEO-15-42-GP-U C2
SC100P50V2JN-3GP
20.20378.015 3D3V_S0
2
C6 C5 C4 C3
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
2
2
2 D13
3
When no CRT_IN#, 3CRT_IN# 3
replace to 1Kohm.
1
BAV99PT-GP-U
Hsync & Vsync level shift
5V_S0
DDC_CLK & DATA level shift
1
C9
SCD1U16V2ZY-2GP
2
3D3V_S0
U1A
14
1
SB Modify for SIV issue
8,9 DAC_HSYNC
R232 1 2 HSYNC_4
39R2J-L-GP
2 3 CRT_HSYNC1 1
R4
2 JVGA_HS
0R2J-2-GP PH at RC410ME side
G
TSAHCT125PW-GP
14
For System CRT

7
4
1
R229 1 2 VSYNC_4 5 6 CRT_VSYNC1 1 2 JVGA_VS
8,9 DAC_VSYNC 39R2J-L-GP R3 0R2J-2-GP DAT_DDC1_5
D
8 GMCH_DDCDATA 1 2 2 3
S
R216 0R0402-PAD
2 U1B TSAHCT125PW-GP Q15 2
7
G
2N7002PT-U
84.27002.F31
1
CLK_DDC1_5
D
8 GMCH_DDCCLK 1 2 2 3
S
R215 0R0402-PAD
Q14
2N7002PT-U
84.27002.F31
DY
1
L9
2 C310
SC33P50V3JN-GP
3
9 TV OUT CONN 5V_S0 5V_S0 CHROMA LUMA
1 2 CRMA_1 6 TVOUT1
8 TV_CRMA IND-1D8UH-3-GP 7
1
TV TV TV 5 TV D16 2
R221 2 D1 2 6 5 4
150R2F-1-GP C315 C307 4 CRT_R 3 DY
2
TV SC82P50V2JN-3GP SC82P50V2JN-3GP LUMA_1 3 DY

1 1 3 7 2 1
2
1 2 C312 8 1
SC33P50V3JN-GP BAV99PT-GP-U
DY L11 BAV99PT-GP-U
MINDIN7-11-U2-GP
1 2 LUMA_1 22.10021.D81
8 TV_LUMA IND-1D8UH-3-GP D15 2 COMPOSIT
1
TV TV TV Reverse type D2 2 <Variant Name>

1
R223 CRT_G 3 DY 1
150R2F-1-GP C317 C309 CRMA_1 3 DY
2
TV SC82P50V2JN-3GP SC82P50V2JN-3GP 1
1 Wistron Corporation
2
1 2 C311 BAV99PT-GP-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

DY L10 SC33P50V3JN-GP BAV99PT-GP-U Taipei Hsien 221, Taiwan, R.O.C.
1 2 COMP_1 D14 2
8 TV_COMP IND-1D8UH-3-GP D3 Title
2
1
TV CRT_B 3 DY CRT/TV Connector

1
R222 TV TV COMP_1 3 DY
150R2F-1-GP 1 Size Document Number Rev
TV C316 C308 1 A3
Garda-5 SB
2
SC82P50V2JN-3GP SC82P50V2JN-3GP BAV99PT-GP-U

2
BAV99PT-GP-U Date: Wednesday, April 26, 2006 Sheet 14 of 46
A B C D E
A B C D E
1D8V_S0
At least PCIE_PVDD R142
10u*1 1 2
L7
1u*1
1 2 8K2R2F-1-GP
PCI_AD[0..31] 19,23,25,28,32
Bead: HCB1608KF-181-GP U57A
1
68.00214.051 R143
200ohm, C245 C240 C244 1 2 SB_A_RST# AG10 1 of 4 U2 PCI_CLK0_R R168 1 2 22R2F-1-GP SB_CLK33_PCM
6 NB_RST# A_RST# PCICLK0 SB_CLK33_PCM 19,25
200mA. SCD1U16V2ZY-2GP 33R3J-2-GP PCI_CLK1_R R182 22R2F-1-GP SB_CLK33_1394
PCI CLKS
T2 1 2 SB_CLK33_1394 19,28
2
SC10U10V5ZY-1GP PCICLK1 PCI_CLK2_R R172 22R2F-1-GP SB_CLK33_LAN
3 CLK_PCIE_ICH J24 PCIE_RCLKP PCICLK2 U1 1 2 SB_CLK33_LAN 19,23
SC1U6D3V2ZY-GP 3 CLK_PCIE_ICH# J25 V2 PCI_CLK3_R R169 1 2 22R2F-1-GP SB_CLK33_MINI
PCIE_RCLKN PCICLK3 SB_CLK33_MINI 19,32
W3 PCI_CLK4_R R170 1 2 22R2F-1-GP SB_CLK33_KBC
PCICLK4 SB_CLK33_KBC 19,33
4 SCD01U16V2KX-3GP C515 1 2 TX0P P29 U3 PCI_CLK5_R R175 1 2 22R2F-1-GP SB_CLK33_FWH 4
9 PCIE_RX0P_SB PCIE_TX0P PCICLK5 SB_CLK33_FWH 19,36
SCD01U16V2KX-3GP1 2C513 TX0N P28 V1 PCI_CLK6_R R159 1 2 22R2F-1-GP SB_CLK33_SIO
9 PCIE_RX0N_SB PCIE_TX0N PCICLK6 SB_CLK33_SIO 19,35
SCD01U16V2KX-3GP C519 1 2 TX1P M29 T1 PCI_CLK7_R R174 1 2 0R0402-PAD SPDIF_OUT_STRAP
9 PCIE_RX1P_SB PCIE_TX1P SPDIF_OUT/GPIO41 SPDIF_OUT_STRAP 19
SCD01U16V2KX-3GP1 2C517 TX1N M28
9 PCIE_RX1N_SB PCIE_TX1N
At least K29 PCIE_TX2P PCIRST# AJ9 1 2 PCIRST1# 23,25,28,32
1D8V_S0 PCIE_VDDR K28 R485
22u*1 H29
PCIE_TX2N 33R2J-2-GP
R180 PCIE_TX3P
1
0.1u*5 H28 W7 PCI_AD0 PCI PULL UP
SC1U10V2KX-GP SC1U10V2KX-GP PCIE_TX3N AD0/ROMA18 PCI_AD1 R380
1 2 AD1/ROMA17 Y1
3D3V_S0
PCI EXPRESS INTERFACE

0R3-0-U-GP 9 PCIE_TX0P_SB PCIE_TX0P_SB T25 W8 PCI_AD2 8K2R2F-1-GP SIV Modify
PCIE_RX0P AD2/ROMA16
SC10U10V5KX-2GP
Bead: 9 PCIE_TX0N_SB PCIE_TX0N_SB T26 W5 PCI_AD3

PCIE_RX0N AD3/ROMA15
1
1
9 PCIE_TX1P_SB PCIE_TX1P_SB T22 AA5 PCI_AD4 RN26
2
26ohm, C262 C248 C261 C264 C263 C252 9 PCIE_TX1N_SB PCIE_TX1N_SB T23
PCIE_RX1P AD4/ROMA14
Y3 PCI_AD5 PCI_STOP# 4 5
PCIE_RX1N AD5/ROMA13 PCI_AD6 PCI_TRDY#
600mA. M25 AA6 3 6
2
2
PCIE_RX2P AD6/ROMA12 PCI_AD7 PCI_REQ#1
M26 PCIE_RX2N AD7/ROMA11 AC5 2 7
M22 AA7 PCI_AD8 PCI_FRAME# 1 8
SC1U10V2KX-GP SC1U10V2KX-GP SC1U10V2KX-GP PCIE_RX3P AD8/ROMA9 PCI_AD9
M23 PCIE_RX3N AD9/ROMA8 AC3
SB Modify AC7 PCI_AD10 SRN8K2J-4-GP
R422 1 AD10/ROMA7
2 150R2F-1-GP PCIE_CALRP E29 PCIE_CALRP AD11/ROMA6 AJ7 PCI_AD11
R416 1 2 150R2F-1-GP PCIE_CALRN E28 AD4 PCI_AD12 RN20
PCIE_VDDR PCIE_CALRN AD12/ROMA5
AB11 PCI_AD13 4 5
R424 AD13/ROMA4
1 2 4K12R2F-GP PCIE_CALI E27 PCIE_CALI AD14/ROMA3 AE6 PCI_AD14 3 6
AC9 PCI_AD15 PCI_LOCK# 2 7
3D3V_S5 PCIE_PVDD AD15/ROMA2 PCI_AD16 PCI_IRDY#
U29 PCIE_PVDD AD16/ROMD0 AA3 1 8
AJ4 PCI_AD17
AD17/ROMD1 PCI_AD18 SRN8K2J-4-GP
U28 NC49 AD18/ROMD2 AB1
U31 AH4 PCI_AD19
AD19/ROMD3 PCI_AD20 RN54
SB Modify PCIE_VDDR F27 PCIE_VDDR_1 AD20/ROMD4 AB2
5 1 F28 AJ3 PCI_AD21 PCI_REQ#4 4 5
VCC OE PCIE_VDDR_2 AD21/ROMD5
PCI INTERFACE
3 R144 2 SB_A_RST# F29 AB3 PCI_AD22 PCI_DEVSEL# 3 6 3
A PCIE_VDDR_3 AD22/ROMD6
21,27,32,33,35,36 PLT_RST1# 2 1PLT_RST# 4 Y GND 3 G26 PCIE_VDDR_4 AD23/ROMD7 AH3 PCI_AD23 PCI_REQ#3 2 7
33R3J-2-GP G27 AC1 PCI_AD24 PCI_REQ#0 1 8
PCIE_VDDR_5 AD24 PCI_AD25
SC100P50V2JN-3GP
G28 PCIE_VDDR_6 AD25 AH2

1
R141 NC7SZ126P5X-GP G29 AC2 PCI_AD26 SRN8K2J-4-GP

73.7S126.AAH PCIE_VDDR_7 AD26 PCI_AD27
J27 PCIE_VDDR_8 AD27 AH1
J29 AD2 PCI_AD28 RN17
2
PCIE_VDDR_9 AD28 PCI_AD29 PCI_SERR#

L25 PCIE_VDDR_10 AD29 AG2 4 5
Buffered to ensure clean edges. L26 AD1 PCI_AD30 PCI_REQ#2 3 6
PCIE_VDDR_11 AD30 PCI_AD31 PCI_PERR#
L29 PCIE_VDDR_12 AD31 AG1 2 7
N29 AB9 PCI_C/BE#0 1 8
PCIE_VDDR_13 CBE0#/ROMA10 PCI_C/BE#0 23,25,28,32
2 R148 1 CBE1#/ROMA1 AF9 PCI_C/BE#1
PCI_C/BE#1 23,25,28,32
0R2J-2-GP AJ5 PCI_C/BE#2 SRN8K2J-4-GP
CBE2#/ROMWE# PCI_C/BE#2 23,25,28,32
AG3 PCI_C/BE#3
DY CBE3# PCI_C/BE#3 23,25,28,32
SB Modify AA2 PCI_FRAME# RN25
FRAME# PCI_FRAME# 23,25,28,32
C287 AH6 PCI_DEVSEL# INT_PIRQG# 4 5
DEVSEL#/ROMA0 PCI_DEVSEL# 23,25,28,32
1 2 AG5 PCI_IRDY# INT_PIRQH# 3 6
IRDY# PCI_IRDY# 23,25,28,32
AA1 PCI_TRDY# INT_PIRQE# 2 7
TRDY#/ROMOE# PCI_TRDY# 23,25,28,32
SC15P50V2JN-2-GP AF7 PCI_PAR INT_PIRQF# 1 8
PAR/ROMA19 PCI_PAR 23,25,28,32
Y2 PCI_STOP#
STOP# PCI_STOP# 23,25,28,32
1
AG8 PCI_PERR# SRN8K2J-4-GP
PERR# PCI_PERR# 23,25,28,32
1
X5 R193 AC11 PCI_SERR#

SERR# PCI_SERR# 23,25,28,32
-1 Modify R198 3 4RESO-32D768KHZ-GP AJ8 PCI_REQ#0
REQ0# PCI_REQ#0 25
20MR3-GP AE2 PCI_REQ#1 LPC PULL UP
REQ1# PCI_REQ#1 32
20MR3-GP 82.10026.021 AG9 PCI_REQ#2
PCI_REQ#2 23
2
REQ2# PCI_REQ#3
DY AH8 PCI_REQ#3 28
2
REQ3#/PDMA_REQ0# PCI_REQ#4 3D3V_S0

REQ4#/PLL_BP33/PDMA_REQ1# AH5
C286 AD11 PCI_GNT#0
GNT0# PCI_GNT#0 25
1 2 AF2 PCI_GNT#1 RN14
2 GNT1# PCI_GNT#1 32 2
AH7 PCI_GNT#2 LPC_LAD0 4 5
GNT2# PCI_GNT#2 23
No implemented as DPSLP# SC15P50V2JN-2-GP AB12 PCI_GNT#3 LPC_LAD2 3 6
GNT3#/PLL_BP66/PDMA_GNT0# PCI_GNT#3 28
AG4 PCI_GNT#4 TP54 TPAD30 LPC_LAD1 2 7
GNT4#/PLL_BP50/PDMA_GNT1# PM_CLKRUN# LPC_LAD3
R147
DY CLKRUN# AG7
PCI_LOCK#
PM_CLKRUN# 23,25,28,32,33,35 1 8
LOCK# AF6
1 2 SB460_DPSLP# SB460_DPSLP# 18 SRN100KJ-4-GP
AD3 INT_PIRQE#
INTE#/GPIO33 INT_PIRQE# 23 RN13
0R2J-2-GP AF1 INT_PIRQF#
INTF#/GPIO34 INT_PIRQF# 28
32K_X1 D2 AF4 INT_PIRQG# PM_CLKRUN# 4 5
X1 INTG#/GPIO35 INT_PIRQG# 25
INT_PIRQH# INT_SERIRQ
XTAL
INTH#/GPIO36 AF3 INT_PIRQH# 28,32 3 6

Q25 LPC_LDRQ0# 2 7
2N7002PT-U LPC_LDRQ1# 1 8
LPC_LAD[0..3] 33,35,36
84.27002.F31 R379 32K_X2 C1 X2 3D3V_AUX_S5
36 SB_FWH_INIT# 1 2 SRN10KJ-6-GP
3 2 AG24 LPC_LAD0
S
4 H_DPSLP# LAD0
0R2J-2-GP H_PWRGD LPC_LAD1
D
4,37 H_PWRGD AC26 AG25 ATI Modify
A
H_INTR CPU_PG LAD1 LPC_LAD2
4 H_INTR W26 INTR/LINT0 LAD2 AH24
H_NMI LPC_LAD3 D32 2nd source: 62.70001.011
LPC
4 H_NMI W24 AH25
1
0R2J-2-GP H_INIT# NMI/LINT1 LAD3 LPC_LFRAME#

4 H_INIT# W25 INIT# LFRAME# AF24 LPC_LFRAME# 19,33,35,36 CH751H-40PT-1GP
R375 H_SMI# AA24 AJ24 LPC_LDRQ0# DY RTC1
G
4 H_SMI# SMI# LDRQ0# LPC_LDRQ0# 35 D33

1 2 AA23 AH26 LPC_LDRQ1# DY
K
H_IGNNE# NC55 LDRQ1# BMREQ1# RTCBAT
CPU
4 H_IGNNE# AA22 IGNNE# BMREQ# W22 K A 1 PWR

H_A20M# AA26 AF23 INT_SERIRQ CH751H-40PT-1GP 2
4 H_A20M# A20M# SERIRQ INT_SERIRQ 25,28,32,33,35 GND
3 2 DPRSLPVR_SB H_FERR# Y27 MH1
S
4,39 PM_DPRSLPVR 4 H_FERR# FERR# MH1

H_STPCLK# RTC_CLK
D
4 H_STPCLK# AA25 STPCLK#/ALLOW_LDTSTP RTCCLK D3 RTC_CLK 19,20 MH2 MH2

CPU_STP#_SB AH9 RTC_IRQ# 1 R487
RCT
Q26
DY 3D3V_S5 CPU_STP#/DPSLP_3V# RTC_IRQ#/ACPWR_STRAP F5 RTC_IRQ# 19
0R2J-2-GP
2
B24
1
2N7002PT-U DPRSLPVR_SB W23 NC13 RTC_VBATIN

DPRSLPVR VBAT E1 1 R423 2 RTCBATIN BAT-CON2-U2-GP
84.27002.F31 TPAD30 TP58 LDT_RST# AC25 D1 1KR2J-1-GP 22.70031.001
G
1 LDT_RST# RTC_GND <Variant Name> 1

14
1
U27F C526
R374 SB460-GP 71.SB460.00U
12 13 CPU_STP#_SB_R 1 2 CPU_STP#_SB 1 R376 2 CPU_STP# 3 C3 Pop-up and C1e support Wistron Corporation
2
3D3V_S0 SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC330P50V3JN-GP
TSLCX14MTCX-1-GP 220KR2J-L2-GP 4K7R2J-2-GP 2 R383 1 Taipei Hsien 221, Taiwan, R.O.C.

1
D27 4K7R2J-2-GP
7
C481 A K C482 Title

SC33P50V3JN-GP 9 BMREQ# K DYA BMREQ1# ATI-SB460 (1 of 5) PCI, PCIE
2
CH751H-40PT-1GP D30
CH751H-40PT-1GP 2 1 C492 Size Document Number Rev
SC15P50V2JN-2-GP A3
DY Garda-5 -1
DY Date: Wednesday, April 26, 2006 Sheet 15 of 46
A B C D E
A B C D E
When no SATA replace to 0 ohm.
4 4
U57B
SATA_TXP0 SCD1U10V2KX-4GP 1SATA

2 C486 SB_SATA_TXP0 AH21 2 of 4
21 SATA_TXP0 SATA_TX0+
SATA_TXN0 SCD1U10V2KX-4GP 1SATA
2 C487 SB_SATA_TXN0 AJ21 AB29 IDE_PDIORDY 21
21 SATA_TXN0 SATA_TX0- PIDE_IORDY
PIDE_IRQ AA28 INT_IRQ14 21
21 SATA_RXN0 SATA_RXN0 SCD1U10V2KX-4GP 1SATA
2 C489 SB_SATA_RXN0 AH20 AA29 IDE_PDA0 21
SATA_RXP0 SCD1U10V2KX-4GP 1SATA SATA_RX0- PIDE_A0
21 SATA_RXP0 2 C488 SB_SATA_RXP0 AJ20 SATA_RX0+ PIDE_A1 AB27 IDE_PDA1 21
PIDE_A2 Y28 IDE_PDA2 21
AH18 SATA_TX1+ PIDE_DACK# AB28 IDE_PDDACK# 19,21
AJ18 SATA_TX1- PIDE_DRQ AC27 IDE_PDDREQ 21
SB Modify PIDE_IOR# AC29 IDE_PDIOR# 21
AH17 SATA_RX1- PIDE_IOW# AC28 IDE_PDIOW# 21
SERIAL ATA
AJ17 SATA_RX1+ PIDE_CS1# W28 IDE_PDCS1# 21
PIDE_CS3# W27 IDE_PDCS3# 21
ATA 66/100
AH13 SATA_TX2+
C214 AH14 AD28 IDE_PDD0 21
SATA_X1 SATA_TX2- PIDE_D0
1 2 PIDE_D1 AD26 IDE_PDD1 21
AH16 SATA_RX2- PIDE_D2 AE29 IDE_PDD2 21
SC27P50V2JN-2-GP AJ16 AF27
SATA SATA_RX2+ PIDE_D3
PIDE_D4 AG29
IDE_PDD3
IDE_PDD4
21
21
1
AJ11 SATA_TX3+ PIDE_D5 AH28 IDE_PDD5 21

1
R149 AH11 AJ28

X3 SATA SATA_TX3- PIDE_D6
PIDE_D7 AJ27
IDE_PDD6
IDE_PDD7
21
21
10MR3J-L1-GP XTAL-25MHZ-70GP AH12 AH27 IDE_PDD8 21
SATA_RX3- PIDE_D8
82.30020.581 R152 AJ13 AG27 IDE_PDD9 21
2
SATA_RX3+ PIDE_D9
AG28
1SATA2
PIDE_D10 IDE_PDD10 21
C215 AF12 AF28 IDE_PDD11 21
SATA_CAL PIDE_D11
PIDE_D12 AF29 IDE_PDD12 21
3 1 2 SATA_X2 1KR2F-3-GP SATA_X1 AD16 AE28 3
SATA 82.30020.391?
SATA_X1 PIDE_D13
PIDE_D14 AD25
IDE_PDD13
IDE_PDD14
21
21
SATA_X2 AD18 AD29 IDE_PDD15 21
SC27P50V2JN-2-GP SATA_X2 PIDE_D15
13 SATA_LED# AC12 SATA_ACT#

PLLVDD_SATA AD14 PLLVDD_SATA_1
AJ10 PLLVDD_SATA_2 NC29 J3
NC30 J6
AC16 G3
SPI ROM
XTLVDD_SATA XTLVDD_SATA NC24
NC23 G2
1D8V_S0 PLLVDD_SATA AE14 G6
AVDD_SATA AVDD_SATA_1 NC26
R161 AE16 AVDD_SATA_2
SC1U6D3V2ZY-GP AE18 C23
AVDD_SATA_3 NC17
1 2 AE19 G5
Bead: SATA
AVDD_SATA_4 NC25
AF19
0R3-0-U-GP SATA SATA AF21
AVDD_SATA_5
M4
200ohm, AVDD_SATA_6 NC35
1
AG22 AVDD_SATA_7 NC46 T3

200mA. C484 C221 C490 AG23 V4
SCD1U16V2ZY-2GP AVDD_SATA_8 NC50
AH22
2
SC10U10V5ZY-1GP AVDD_SATA_9
AH23 AVDD_SATA_10 NC40 N3
At least AJ12 AVDD_SATA_11 NC41 P2
AJ14 W4
1u*1 AJ19
AVDD_SATA_12 NC54
AVDD_SATA_13
SERIAL ATA POWER
HW MONITOR (SB600)
AJ22 AVDD_SATA_14 NC43 P5
AJ23 AVDD_SATA_15 NC44 P7
NC45 P8
AB14 AVSS_SATA_1 NC48 T8
1D8V_S0 XTLVDD_SATA AB16 T7
2 AVSS_SATA_2 NC47 2
R162 AB18 AVSS_SATA_3
SC1U6D3V2ZY-GP AC14 V5
AVSS_SATA_4 NC51
1 2 AC18 L7
Bead: SATA At least
AVSS_SATA_5 NC33
AC19 AVSS_SATA_6 NC38 M8
0R3-0-U-GP AD12 V6
200ohm, 1u*1 SATA AVSS_SATA_7 NC52
1
AD19 AVSS_SATA_8 NC36 M6

200mA. C235 C236 AD21 P4
AVSS_SATA_9 NC42
AE12 M7
2
AVSS_SATA_10 NC37
AE21 AVSS_SATA_11 NC53 V7
SCD1U16V2ZY-2GP AF11 AVSS_SATA_12
AF14 AVSS_SATA_13
AF16 AVSS_SATA_14
AF18 AVSS_SATA_15 NC39 N1
AG11 AVSS_SATA_16
AG12 AVSS_SATA_17 NC34 M1
AG13 AVSS_SATA_18
AG14 AVSS_SATA_19
AG16 AVSS_SATA_20
AG17 AVSS_SATA_21
1D8V_S0 AVDD_SATA AG18 AVSS_SATA_22
R155 AG19 AVSS_SATA_23
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP AG20 AVSS_SATA_24
1 2 AG21
Bead: SATA
AVSS_SATA_25
AH10 AVSS_SATA_26
0R3-0-U-GP AH19
200ohm, SATA SATASATASATASATA AVSS_SATA_27
1
200mA. C219 C218 C217 C224 C225 C226

2
SC10U10V5ZY-1GP SB460-GP
1 <Variant Name> 1
At least
22u*1 SC1U6D3V2ZY-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
0.1u*4 Wistron Corporation
Title
ATI-SB460 (2 of 5) IDE/SATA
A3
Garda-5 SB
A B C D E
A B C D E
3D3V_S0 U57C
SC10U10V5KX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
A25 VDDQ_1 3 of 4 VSS_1 A1
At least A28 VDDQ_2 VSS_2 A20
C29 A21
220u*1, VDDQ_3 VSS_3
1
D24 VDDQ_4 VSS_4 A29
C291 C276 C254 C230 C253 C237 C491 C485 C247 C246 1u*6. L9 B1
VDDQ_5 VSS_5
4 L21 B7 4
2
VDDQ_6 VSS_6
M5 VDDQ_7 VSS_7 B25
P3 VDDQ_8 VSS_8 C21
P9 VDDQ_9 VSS_9 C22
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP T5 C24
VDDQ_10 VSS_10
V9 VDDQ_11 VSS_11 D6
W2 VDDQ_12 VSS_12 E24
W6 VDDQ_13 I/O VSS_13 F2
W21 F23
W29
VDDQ_14 Power VSS_14
G1
VDDQ_15 VSS_15
AA12 VDDQ_16 VSS_16 J1
1D8V_S0 AA16 J8
VDDQ_17 VSS_17
AA19 VDDQ_18 VSS_18 L6
SC10U10V5KX-2GP SCD1U16V2ZY-2GP SC1U6D3V2ZY-GP SCD1U16V2ZY-2GP AC4 L8
VDDQ_19 VSS_19
AC23 VDDQ_20 VSS_20 M9
At least AD27 VDDQ_21 VSS_21 M12
AE1 M15
22u*1, VDDQ_22 VSS_22
1
AE9 VDDQ_23 VSS_23 M18
C521 C251 C250 C242 C243 C238 C249 1u*4. AE23 N13
VDDQ_24 VSS_24
AH29 N17
2
VDDQ_25 VSS_25
AJ2 VDDQ_26 VSS_26 P1
SC2D2U10V3ZY-1GP SC1U6D3V2ZY-GP SC1U6D3V2ZY-GP R12
VSS_29
M13 VDD_1 VSS_30 R15
M17 VDD_2 VSS_31 R18
N12 VDD_3 VSS_32 T6
N15 VDD_4 VSS_33 T9
3D3V_S5
3
N18 VDD_5 Core VSS_34 U13
3
R13 VDD_6 Power VSS_35 U17
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP R17 V3
VDD_7 VSS_36
U12 VDD_8 VSS_37 V8
At least U15 VDD_9 VSS_38 V12
U18 V15
22u*1, VDD_10 VSS_39
1
V13 VDD_11 VSS_40 V18
C267 C255 C266 0.1u*2. V17 V21
VDD_12 VSS_41
W1
2
VSS_42
A2 S5_3.3V_1 VSS_43 W9
A7 S5_3.3V_2 VSS_44 Y29
F1 S5_3.3V_3 VSS_45 AA11
SCD1U16V2ZY-2GP J5 AA14
1D8V_S5 S5_3.3V_4 VSS_46
J7 S5_3.3V_5 VSS_47 AA18
Vf = 0.38v (@1mA) K1 S5_3.3V_6 VSS_48 AC6
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP At least AC24
1v (@40mA) G4
VSS_49
AD9
0.1u*4. H1
S5_1.8V_1 VSS_50
AD23
S5_1.8V_2 VSS_51
R382 H2 S5_1.8V_3 VSS_52 AE3
1
D29 At least H3 AE27
C258 C281 C280 C257 C273 1D05V_S0 S5_1.8V_4 VSS_53
5V_S0 A K 1 2 AG6
22u*1 A18
VSS_54
AJ1
2
CH751H-40PT-1GP USB_PHY_1.8V_1 VSS_55
1KR2J-1-GP 0.1u*4 A19 USB_PHY_1.8V_2 VSS_56 AJ25
B19 USB_PHY_1.8V_3 VSS_57 AJ29
B20 USB_PHY_1.8V_4
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP At least B21 USB_PHY_1.8V_5
1
C239 D27
D28 V5_VREF SCD1U16V2ZY-2GP 0.1u*1. PCIE_VSS_1
D28
V5_VREF PCIE_VSS_2
3D3V_S0 A K MIN 4.5 AA27 D29
2
CPU_PWR PCIE_VSS_3
At least F26
2 CH751H-40PT-1GP NORMAL 5.0 1D8V_S0
L8
V5_VREF AE11
PCIE_VSS_4
G23
2
1u*1. V5_VREF PCIE_VSS_5
1
C232
MAX 5.5 1D8VAVDDCK_S0 PCIE_VSS_6 G24
1 2 A24 AVDDCK PCIE_VSS_7 G25
Bead: HCB1608KF-181-GP At least System PLL Power H27
2
PCIE_VSS_8
1
SC1U6D3V2ZY-GP 68.00214.051 A22 J23
200ohm, 2.2u*1. NC12 PCIE_VSS_9
SC2D2U10V3ZY-1GP
C290 C289 C282 J26
PCIE_VSS_10
200mA. B22 J28
2
AVSSCK PCIE_VSS_11
PCIE_VSS_12 K27
V29 PCIE_VSS_42 PCIE_VSS_13 L22
SC1U6D3V2ZY-GP SCD1U16V2ZY-2GP V28 L23
PCIE_VSS_41 PCIE_VSS_14
3D3V_S0 must never exceed V5_VREF by more than 0.6V. V27 PCIE_VSS_40 PCIE_VSS_15 L24
V24 PCIE_VSS_37 PCIE_VSS_18 M21
U27 PCIE_VSS_34 PCIE_VSS_21 N27
T29 PCIE_VSS_33 PCIE_VSS_22 N28
3D3V_S5 T28 P22
T27 PCIE_VSS_31 PCIE_VSS_24 P23
1D8V_S5 T24 P24
T21 PCIE_VSS_29 PCIE_VSS_26 P25
3
1D8V_S0 3D3V_S0 P27 P26

D34 D35 PCIE_VSS_28 PCIE_VSS_27
BAV99PT-GP-U
D11 SB460-GP
BAV99PT-GP-U A K
DY
DY <Variant Name>
1
1
3D3V_S5_D CH751H-40PT-1GP 1
DY
Wistron Corporation
1D8V_S0 must never exceed 3D3V_S0 by more than 0.6V. Title
1D8V_S0 must start ramping up within 1ms of 3D3V_S0 starting to ramp p. ATI-SB460 (3 of 5) POWER
A3
Garda-5 SA
A B C D E
A B C D E
USB
Pair Device
RN58 0 USB1
KBC_SLP_WAKE 5 4 U57D 1 BT
GPIO1 6 3
GPIO6 7 2 4 of 4 2 USB2
AMD_CPUPWRGD 8 1
23 ICH_PME# A3 PCI_PME#/GEVENT4# USBCLK A17 CLK48_ICH 3 3 NEW C
RI# B2
SRN10KJ-6-GP 3D3V_S5 PM_SLP_S3# RI#/EXTEVNT0# USB_PCOMP 2 R430
ACPI/WAKE UP EVENTS
4 20,32,33,37,43 PM_SLP_S3# F7 SLP_S3# USB_RCOMP A14 1 4 USB3 4
PM_SLP_S5#
A5 11K8R3F-GP
33,42,43 PM_SLP_S5# SLP_S5#
RN59 PM_PWRBTN#
E3 A11 USB_TE1 5 CCD
33 PM_PWRBTN# PWR_BTN# USB_ATEST1
USB_OC#4 1 10 SB_PWRGD
B5 A10 USB_TE0 TP79 TPAD30
37 SB_PWRGD PWR_GOOD USB_ATEST0
2 9 PM_SUS_STAT#
B3 TP78 TPAD30 6 MINIC1
6,33,35 PM_SUS_STAT# SUS_STAT#
USB_OC#2 3 8 USB_OC#3 F9 H12
USB_OC#0 NC22 NC28
4 7 S3_STATE RN30 1 4 E9 TEST1 NC27 G12 7 NC
3D3V_S5 5 6 USB_OC#1 2 3 G9 TEST0
SRN10KJ-5-GP KA20GATE AF26 E12
33 KA20GATE GA20IN NC20
USB INTERFACE
SRN10KJ-L3-GP KBRCIN# AG26 D12
33 KBRCIN# KBRST# NC19
ECSCI#_KBC D7
33 ECSCI#_KBC LPC_PME#/GEVENT3#
1 R427 2 GPM6# 33 ECSMI#_KBC
ECSMI#_KBC C25 LPC_SMI#/EXTEVNT1# USB_HSDP7+ E14
10KR2J-3-GP ECSWI# 0R2J-2-GP 1 2 R202 S3_STATE D9 D14
SYS_RST# S3_STATE/GEVENT5# USB_HSDM7-
3D3V_S5 DY PCIE_WAKE#
F4 SYS_RESET#/GPM7#
RN60 32 PCIE_WAKE# E7 WAKE#/GEVENT8# USB_HSDP6+ G14 USB_PP6 27
GPM6# C2 H14
BLINK/GPM6# USB_HSDM6- USB_PN6 27
RI# 1 10 PM_THRMTRIP#_SB G7
PM_SUS_STAT# PM_SLP_S5# SMBALERT#/THRMTRIP#/GEVENT2#
2 9 USB_HSDP5+ D16 USB_PP5 13
ICH_PME# 3 8 USB_OC#6 E16
USB_HSDM5- USB_PN5 13
SB_TALERT# 4 7 USB_OC#7 RSMRST# E2 RSMRST#
3D3V_S5 5 6 USB_HSDP4+ D18 USB_PP4 22
1 2 X1_CLK_SB14_1 B23 E18
3 SB_OSCIN 14M_OSC USB_HSDM4- USB_PN4 22
R429 0R0402-PAD
SRN4K7J-9-GP-U1
C28 NC18 USB_HSDP3+ G16 USB_PP3 32
3D3V_S5 3D3V_S0 GPIO1 A26 H16
ROM_CS#/GPIO1 USB_HSDM3- USB_PN3 32
GPIO6 B29
VGATE_PWRGD GHI#/GPIO6
37,39 VGATE_PWRGD A23 VGATE/GPIO7 USB_HSDP2+ G18 USB_PP2 22
RN33 1 4 GPIO4 B27 H18
GPIO4 USB_HSDM2- USB_PN2 22
ACZ_RST# 1 10 2 3 GPIO5 D23
GPIO
3 PCIE_WAKE# PM_PWRBTN# GPIO5 3
2 9 30 ACZ_SPKR B26 SPKR/GPIO2 USB_HSDP1+ D19 USB_PP1 22
ECSCI#_KBC 3 8 SYS_RST# RN32 C27 E19
3,11,27,32 SMB_CLK SCL0/GPOC0# USB_HSDM1- USB_PN1 22
PM_SLP_S3# 4 7 SRN10KJ-5-GP B28
3,11,27,32 SMB_DATA SDA0/GPOC1#
3D3V_S5 5 6 PM_THRMTRIP#_SB C3 G19
NC14 USB_HSDP0+ USB_PP0 22 3D3V_S5
F3 NC21 USB_HSDM0- H19 USB_PN0 22
SRN10KJ-L3-GP DDC1_SCL D26 AVDD_USB
DDC1_SCL/GPIO9 R206
ATI Modify DDC1_SDA C26
AC97_SYNC DDC1_SDA/GPIO8
1 R490 2 TPAD30 TP76
AMD_CPUPWRGD A27 LDT_PG/SSMUXSEL/GPIO0 AVDDTX_0 B9 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 2 1
10KR2J-3-GP A4 B11 At least
AC97_RST# NC11 AVDDTX_1
1 R491 2 B13 0R3-0-U-GP
AVDDTX_2 22u*1,
1
10KR2J-3-GP B16 Bead:
GPIO14 AVDDTX_3
1 R163 2 C6 B18 0.1u*6. C275 C277 C278 C269 C285
10KR2J-3-GP C5
NC16 AVDDTX_4
A9 26ohm,
2
RN28 USB_OC#7 NC15 AVDDRX_0
ATI Modify C4 USB_OC7#/GEVENT7# AVDDRX_1 B10 600mA.
AC_BITCLK ECSWI# 2 USB_OC#6 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
USB OC
5 4 33 ECSWI# 1 B4 USB_OC6#/GEVENT6# AVDDRX_2 B12
ACZ_SDIN2 6 3 0R0402-PAD R201 ACZ_RST# B6 B14
ACZ_SYNC USB_OC#4 USB_OC5#/AZ_RST#/GPM5# AVDDRX_3 3D3V_AVDDC
7 2 22 USB_OC#4 A6 USB_OC4#/GPM4# AVDDRX_4 B17 L29
SB460_DPSLP# 8 1 USB_OC#3 C8
USB_OC#2 USB_OC3#/GPM3# SC1U6D3V2ZY-GP
22 USB_OC#2 C7 USB_OC2#/FANOUT1/LLB#/GPM2# AVDDC A12 2 1
SRN10KJ-6-GP USB_OC#1 B8 At least HCB1608KF-181-GP
USB_OC#0 USB_OC1#/GPM1# 68.00214.051
A8 A13
USB_OC0#/GPM0# AVSSC 2.2u*1,
1
Bead:
30 ACZ_BITCLK_883 R183 1 2 22R2J-2-GP A16 C279 C540 0.1u*2.
22 ACZ_BITCLK_MDC R181 1 2 22R2J-2-GP ACZ_BITCLK N2
AVSS_USB_1
C9 200ohm,
2
AZ_BITCLK AVSS_USB_2
AZALIA
30 ACZ_SDATAOUT_883 R402 1 2 22R2J-2-GP ACZ_SDATAOUT M2 C10 200mA.
R396 22R2J-2-GP AZ_SDOUT AVSS_USB_3
22 ACZ_SDATAOUT_MDC 1 2 K2 NC31 AVSS_USB_4 C11
R415 22R2J-2-GP ACZ_SYNC
USB POWER
30 ACZ_SYNC_883 1 2 L3 AZ_SYNC AVSS_USB_5 C12
22 ACZ_SYNC_MDC R412 1 2 22R2J-2-GP K3 C13 SCD1U16V2ZY-2GP
R188 22R2J-2-GP NC32 AVSS_USB_6
30 ACZ_RST#_883 1 2 AVSS_USB_7 C14
2 R186 22R2J-2-GP ACZ_RST# TPAD30 TP74 AC_BITCLK 2
22 ACZ_RST#_MDC 1 2 L1 AC_BITCLK/GPIO38 AVSS_USB_8 C16
19 AC97_DOUT L2 AC_SDOUT/GPIO39 AVSS_USB_9 C17
AC97
30 ACZ_SDATAIN0 L4 ACZ_SDIN0/GPIO42 AVSS_USB_10 C18
22 ACZ_SDATAIN1 J2 ACZ_SDIN1/GPIO43 AVSS_USB_11 C19
ACZ_SDIN2 J4 C20
3D3V_S0 TPAD30 TP65 AC97_SYNC ACZ_SDIN2/GPIO44 AVSS_USB_12
M3 AC_SYNC/GPIO40 AVSS_USB_13 D11
TPAD30 TP60 AC97_RST# L5 D21
TPAD30 TP64 AC_RST#/GPIO45 AVSS_USB_14
AVSS_USB_15 E11
1 4 SMB_CLK E21
SMB_DATA AVSS_USB_16
2 3 AVSS_USB_17 F11
TPAD30 TP77 KBC_SLP_WAKE E23 F12
RN31 TPAD30 TP73 GPIO31 FANOUT0/GPIO3 AVSS_USB_18
AC21 GPIO31 AVSS_USB_19 F14
SRN2K2J-1-GP TPAD30 TP59 GPIO13 AD7 F16
SB460_DPSLP# AE7 REQ5#/GPIO13 AVSS_USB_20
15 SB460_DPSLP# DPSLP_OD#/GPIO37 AVSS_USB_21 F18
3D3V_S0 GPIO14 AA4 F19
TPAD30 TP57 GNT5#/GPIO14 AVSS_USB_22
20 THRM# 1 R171 2 SB_TALERT# T4 TALERT#/GPIO10 AVSS_USB_23 F21
DY 0R2J-2-GP SB460_H_SLP# D4 G11
DDC1_SCL SLP#/LDT_STP# AVSS_USB_24
1 4 AB19 NC56 AVSS_USB_25 G21
2 3 DDC1_SDA H11
AVSS_USB_26
AVSS_USB_27 H21
RN34 J11
SRN10KJ-5-GP AVSS_USB_28
AVSS_USB_29 J12
AVSS_USB_30 J14
PH 200 ohm at CPU side 3D3V_S5 3D3V_S5 J16
AVSS_USB_31
AVSS_USB_32 J18
AVSS_USB_33 J19
H_CPUSLP# 1 2 SB460_H_SLP# U27D U27E
14
14
4 H_CPUSLP#
R203 0R0402-PAD
1 <Variant Name> 1
9 8 RSMRST#_KBC_1 11 10 RSMRST# SB460-GP
33 RSMRST#_KBC
3D3V_S0
TSLCX14MTCX-1-GP TSLCX14MTCX-1-GP Wistron Corporation
7

1 R166 2 GPIO13
10KR2J-3-GP Title
1 R386 2 GPIO31
10KR2J-3-GP ATI-SB460 (4 of 5) USB GPIO
1 R486 2 ECSMI#_KBC Size Document Number Rev
10KR2J-3-GP ATI Modify A3
Garda-5 SB
A B C D E
5 4 3 2 1
REQUIRED STRAPS 3D3V_S5 3D3V_S0 3D3V_S0 3D3V_S0
3D3V_S0 3D3V_S5 3D3V_S0 3D3V_S0
1
R189 R157 R177 R146
1
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
R405 R190 R165 R187 DY
DY
2
DY
2
D 15 RTC_IRQ# D
18 AC97_DOUT 15 SPDIF_OUT_STRAP
15,20 RTC_CLK 15,23 SB_CLK33_LAN
15,33 SB_CLK33_KBC 15,32 SB_CLK33_MINI
15,35 SB_CLK33_SIO 15,36 SB_CLK33_FWH
15,25 SB_CLK33_PCM 15,33,35,36 LPC_LFRAME#
15,28 SB_CLK33_1394
1
DY
1
R176 R167 R160 C595 R145
R409 R154 R156 R173 R184 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
SC20P50V2JN-1GP
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP DY
2
DY
2
2
2
SB460 SB600
ACPWRON SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK5 LFRAME#
AC_SDOUT RTC_CLK PCI_CLK4 PCI_CLK6 PCI_CLK0 PCI_CLK1 PCI_CLK0 PCI_CLK1
PCI_CLK0 PCM
PULL MANUAL SIO 24MHz 48M XTAL USB PHY PCIE LANE ENABLE
PCI_CLK1 IEEE1394 PULL USE INTERNAL USE INT. CPU IF=K8 ROM TYPE: ROM TYPE: PWR ON MODE POWERDOWN AUTO DETECT THERMTRIP#
HIGH
PCI_CLK2 LAN HIGH DEBUG RTC USB PLL48 NOT DISABLE
H, H = PCI ROM H, H = PCI ROM
C PCI_CLK3 MINI STRAPS DEFAULT SUPPORTED DEFAULT DEFAULT DEFAULT C
DEFAULT H, L = LPC I ROM DEFAULT H, L = SPI ROM
PCI_CLK4 KBC
PCI_CLK5 FWH L, H = LPC II ROM L, H = LPC ROM DEFAULT PULL AUTO SIO 48MHz 48MHZ OSC USB PHY PCIE LANE DISABLE
PCI_CLK6 SIO PULL DISABLE EXTERNAL USE EXT. CPU IF=P4 LOW PWR MODE POWERDOWN FORCING TO THERMTRIP#
LOW DEBUG RTC USB 48MHZ L, L = FWH ROM L, L = FWH ROM
PCI_CLK7 SPDIFOUT ON ENABLE 2 LANES
STRAPS SOURCE DEFAULT NOTE: FOR SB460, PCICLK[8:7] ARE DEFAULT DEFAULT DEBUG ONLY
DEFAULT DEFAULT CONNECTED TO SUBSTRATE
BALLS PCICLK[1:0]
USB wake from S5 supported.

Require upper 12 addr bits set to "1".
3D3V_S0
DEBUG STRAPS
1
R393
10KR2J-3-GP
DY
2
B B
16,21 IDE_PDDACK#
15,23,25,28,32 PCI_AD27
15,23,25,28,32 PCI_AD26
15,23,25,28,32 PCI_AD25
15,23,25,28,32 PCI_AD24
1
R387 R390 R381 R391

DY DY DY DY
2
IDE_DACK# PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
USE BYPASS BYPASS BYPASS IDE USE EEPROM

PULL LONG PCI PLL ACPI PLL PCIE STRAPS
HIGH RESET BCLK
A <Variant Name> A
DEFAULT
USE USE PCI USE ACPI USE IDE USE DEFAULT NOTE: FOR Wistron Corporation
PULL 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SHORT PLL BCLK PLL PCIE STRAPS SB460,
LOW RESET PCI_AD23 IS
DEFAULT DEFAULT DEFAULT DEFAULT RESERVED Title
ATI-SB460 (5 of 5) STRAPPING
SB460 ONLY SB600 ONLY SB600 ONLY Size Document Number Rev
A3
Garda5 SA
5 4 3 2 1
5V_S0
1
FAN1_VCC
R270 FAN1_VCC
*Layout* 15 mil 10KR2J-3-GP
2
1
1
C354 C358 FAN1
SCD1U16V2ZY-2GP SC4D7U6D3V3KX-GP C355 5
D18 SC2200P50V2KX-2GP FAN1_FG1 3
2
2
BAS16-1-GP
1
2
*Layout* 15 mil 4
1
C357 ACES-CON3-GP
SC1KP16V2KX-GP 20.F0714.003
2
5V_S0 2nd source: 20.D0198.103
5V_S0 3D3V_S5 U18
*Layout* 30 mil
R57
1 2 5V_G792_S0 6 1
SC4D7U10V5ZY-3GP
10R3J-3-GP VCC FAN1
20 DVCC FG1 4
1
14 G792_32K
CLK
1
1
C60 C53 16
SDA SMBD_G792 33
1
C47 7 18 SMBC_G792 33
2
R56 R303 SCD1U16V2ZY-2GP DXP1 SCL

9 19
2
33KR2F-GP 10KR2J-3-GP DXP2 NC#19
11 DXP3
SC1U6D3V2ZY-GP DY G792_DXP2 SC2200P50V2KX-2GP SC470P50V3JN-2GP
C
2
5 G792_DXP3
C
2
DGND
1
18 THRM# 1 2 ALERT# 15 17 B Q9
ALERT# DGND
1
R38 0R2J-2-GP C150 CH3904PT-GP
DY 13 THERM# B
Setting T8 as V_DEGREE 3 8 C56 C54 C464 Q22
E
2
THERM_SET SGND1 G792_DXN2 SC470P50V3JN-2GP
2 10
85 Degree
E
2
2
RESET# SGND2
1
12 G792_DXN3 CH3904PT-GP
R55 SGND3
49K9R2F-L-GP 3D3V_AUX_S5 SC2200P50V2KX-2GP
2
V_DEGREE G792SFUF-GP 74.00792.A79 G41 G42
=(((Degree-72)*0.02)+0.34)*VCC
2
3. System Sensor,
GAP-CLOSEGAP-CLOSE 2. T8 Sensor
Put between CPU and NB.
1
1
R302
10KR2J-3-GP
DXP1:108 Degree (CPU) H_THERMDA 4
DXP2:H/W Setting 100(T8)
2
1
Place near chip as close
33,37 PURE_HW_SHUTDOWN# 2 R39 1 T8_HW_SHUT# DXP3:105 Degree (System) as possible C59
0R0402-PAD SC2200P50V2KX-2GP
2
1
H_THERMDC 4
SCD1U16V2ZY-2GP C44
DY R54 1. For CPU Sensor
2
37 G792_PWROK 1 2 G792_RESET#
4K7R2J-2-GP
1
R60
10KR2F-2-GP
2
Digital Output Data Bits

TEMP.
Sign MSB LSB EXT
+127.875 0 111 1111 111
+126.375 0 111 1110 011
32K suspend clock output
+25.5 0 001 1001 100
+1.75 0 000 0001 110 3D3V_S5
+0.5 0 000 0000 100 U28B

14
+0.125 0 000 0000 001 18,32,33,37,43 PM_SLP_S3# 4 R35 100R2J-2-GP

6 32KHZ 1 2 G792_32K
-0.125 1 111 1111 111 15,19 RTC_CLK 5
-1.125 1 111 1110 111 TSLCX08MTCX-GP

7
<Variant Name>
1
-25.5 1 110 0110 100 73.07408.02B

R34
-55.25 1 100 1000 110 240KR3-GP
Wistron Corporation
-65.000 1 011 1111 000 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
Title
Thermal/Fan Controllor G792

Custom
Garda-5 SA
5V_S0
SATA Connector
1
2
RN55
PATA SRN10KJ-5-GP
PWR TRACE 100mil 5V_S0 HDD1
470R2J-2-GP
4
3
42
41
+5V_MOTOR
+5V_LOGIC
KEY
CSEL
PDIAG#
20
28
34
HDD_CSEL
PDIAG
HDDDRV#_5
2
R389
PATA
1 CDROM Connector
1A V33 RESET# 1
TP61 2A 39 HDD_LED# HDD_LED# 13
5V_S0 TPAD30 V33 DASP# INT_IRQ14
3A V33 INTRQ 31
DY 27 IDE_PDIORDY 3D3V_S0
IORDY IDE_PDIOR#
7A 25
K
V5 DIOR# IDE_PDIOW#
8A V5 DIOW# 23
1
1
D10 9A 21 IDE_PDDREQ
V5 DMARQ
SSM22LLPT-GP EC42 C229 C222
DMACK# 29 IDE_PDDACK# 1 PATA10KR2J-3-GP
2
SC10U10V5ZY-1GP13A R388
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CDROM1
2
V12
14A 44 52
A
TP53 V12 RESERVED#44

15A V12 RESERVED#32 32 49 50
TPAD30 11A 47 48 3D3V_S0
RESERVED#11A HDDDRV#_5
16 IDE_PDD8 45 46
IDE_PDD15 18 16 IDE_PDD9 43 44 IDE_PDD7 16
IDE_PDD14 DD15
16 DD14 B+ S6 SATA_RXP0 16 16 IDE_PDD10 41 42 IDE_PDD6 16
IDE_PDD13 14 S5 16 IDE_PDD11 39 40 IDE_PDD5 16
DD13 B- SATA_RXN0 16
4
3
IDE_PDD12 12 16 IDE_PDD12 37 38 IDE_PDD4 16
IDE_PDD11 DD12 RN27
10 DD11 A- S3 SATA_TXN0 16 16 IDE_PDD13 35 36 IDE_PDD3 16
IDE_PDD10 8 S2 16 IDE_PDD14 33 34 IDE_PDD2 16 SRN8K2J-3-GP
IDE_PDD9 DD10 A+ SATA_TXP0 16
6 DD9 16 IDE_PDD15 31 32 IDE_PDD1 16
IDE_PDD8 4 29 30 IDE_PDD0 16
IDE_PDD7 DD8 16 IDE_PDDREQ
3 40 16 IDE_PDIOR# 27 28
1
2
IDE_PDD6 DD7 GND
5 DD6 GND 30 25 26 IDE_PDIOW# 16
IDE_PDD5 7 26 16,19 IDE_PDDACK# 23 24 IDE_PDIORDY 16
IDE_PDD4 DD5 GND
9 DD4 GND 24 21 22 INT_IRQ14 16
IDE_PDD3 11 22 PDIAG 19 20 IDE_PDA1 16
IDE_PDD2 DD3 GND
13 DD2 GND 43 16 IDE_PDA2 17 18 IDE_PDA0 16
IDE_PDD1 15 19 16 IDE_PDCS3# 15 16 IDE_PDCS1# 16
IDE_PDD0 DD1 GND 5V_S0 5V_S0
17 DD0 GND 45 13 14 CDROM_LED# 13
GND 46 11 12
GND 2 9 10
IDE_PDA0 35 S1 7 8
DA0 GND
1
IDE_PDA1 33 S4 5 6
IDE_PDA2 DA1 GND C377 C374 CSEL
36 DA2 GND S7 3 4
IDE_PDCS1# 37 4A SC10U10V5ZY-1GP SCD1U16V2ZY-2GP 1 2
2
CS0# GND
1
IDE_PDCS3# 38 5A 51
CS1# GND R295
GND 6A
NP1 10A SPD-CONN50-4R-19GPU 0R2J-2-GP
NP1 GND
NP2 NP2 GND 12A SATA 1 49
Close to Connector 20.80346.050
2
CON44+15P+S7-1GP
CDROM
20.F0883.001
PATA : 21.E0021.222 GND : Master 2 50
Open: Slave
3D3V_S0 5V_S0
3V to 5V level shift for HDD
4
3
RN61
SRN10KJ-5-GP
1
2
B
15,27,32,33,35,36 PLT_RST1# E C HDDDRV#_5
Q27
CH3904PT-GP
<Variant Name>
Wistron Corporation
Title
SATA/PATA HDD / ODD
A3
Garda-5 SA
5V_S5 U56
5V_USB1_S5
5V_USB5_S5
USB PORT
1 8 5V_USB5_S5
GND OC1# USB_OC#2 18
2 IN OUT1 7 80 mil
3 EN1/EN1# OUT2 6
33 USB_EN# 4 EN2/EN2# OC2# 5 USB_OC#4 18
1
TC13 C468
SC1KP16V2KX-GP
ST220U6D3VDM-LGP C465
1
G546A2P1UF-GP 80.22715.L02 SCD1U10V2KX-4GP
2
74.00546.A7D C477 C476
R372 SCD1U10V2KX-4GP SCD1U10V2KX-4GP KEMET
2
2 100KR2J-1-GP
5V_USB5_S5 USB1
7
5
L23 1
18 USB_PN0 1 2
USB_1- 2
USB_1+ 3
18 USB_PP0 4 3 4
FILTER-79-GP 6
BLUETOOTH MODULE CONNECTOR 69.10084.071
R353 1 DY 2 SKT-USB-105-GP-U
8
0R2J-2-GP
22.10218.J11
R354 1 DY 2
3D3V_S0 0R2J-2-GP
U30
-1 EMI Modify
3D3V_BT_S0 1 5
OUT IN USB2
2 GND
3 4 5V_USB5_S5 7
NC#3 ON/OFF# BLUETOOTH_EN 33
5
1 L24 1
AAT4250IGV-T1-GP C213 1 2
SCD1U10V2KX-4GP 18 USB_PN2
USB_5- 2
2
Place near BT1 74.04250.A3F USB_5+ 3

18 USB_PP2 4 3 4
FILTER-79-GP 6
69.10084.071 8
R356 1 DY 2 SKT-USB-105-GP-U
0R2J-2-GP
BT1
22.10218.J11
6
R3601 DY 2
RN6 SRN0J-6-GP 0R2J-2-GP
4 1 4 USB_PN1 18
3 2 3 USB_PP1 18
2
5V_USB1_S5
1 3D3V_BT_S0 C206 1 2 100 mil
SCD1U16V2ZY-2GP
1
C562
5
SC1KP16V2KX-GP
ACES-CON4-1-GP C563 TC14
20.D0197.104 SCD1U10V2KX-4GP ST100U6D3VDM-5
2
80.10715.591
2nd source: 20.F0760.004 AVX
USB3
5V_USB1_S5 7
5
MDC 1.5 CONN 3D3V_MDC_S5 3D3V_S5
L31
1
1 2 USB_3- 2
G55 18 USB_PN4
USB_3+ 3
2 1 4
MDC1 18 USB_PP4 4 3 6
13 15 FILTER-79-GP 8
GAP-CLOSE-PWR
1
MH1 14 69.10084.071
1 2 C360 SKT-USB-105-GP-U
SC1U6D3V2ZY-GP
22.10218.J11
2
18 ACZ_SDATAOUT_MDC 3 4 1
R445
DY 2
0R2J-2-GP
5 6
18 ACZ_SYNC_MDC 7 8
18 ACZ_SDATAIN1 1 R278 2 ACZ_SDATAIN1_MDC 9 10 1 DY 2
39R2J-L-GP 11 12 R446 0R2J-2-GP
18 ACZ_RST#_MDC ACZ_BITCLK_MDC 18
SC22P50V2JN-4GP
MH2 17
16 18
1
C359
1
AMP-CONN12A-GP
C365 20.F0582.012 DY R273
2
SC22P50V2JN-4GP 100KR2J-1-GP
2nd source: 20.F0604.012 <Variant Name>
2
Wistron Corporation
Title
USB and MDC I/F

A3
Garda-5 -1
A B C D E
15,25,28,32 PCI_C/BE#[3..0]
MDI1+ CLOSE TO
MDI0+
MDI0- MDI1- LAN CHIP
15,19,25,28,32 PCI_AD[31..0]
1
2
1
2
RN35 RN36
SRN49D9F-GP SRN49D9F-GP
C295
LAN_X2 1 2
4
3
4
3
MID0X
MID1X
2
SC12P50V2JN-3GP
4 X6 4
XTAL-25MHZ-67GP
1
82.30020.571 C294
1
C301 C302 LAN_X1 1 2
SCD01U50V3KX-4GP SCD01U50V3KX-4GP
2
SC12P50V2JN-3GP
-1 Modify
3D3V_LAN_S5
U38
DY LAN_EECS_3 1 8
CS VCC
1
LAN_X1 R207 1 2 10KR2J-3-GP LAN_EESK 2 7
3D3V_LAN_S5 SK DC
R205 1 2 3K6R3-GP LAN_EEDI 3 6 C535
3D3V_LAN_S5 DI ORG
LAN_X2 LAN_EEDO
SCD1U16V2ZY-2GP
4 5
2
DO GND
ACT_LED# EEPROM LED OPTION USE '01' AT93C46-10SU-1GP

ACT_LED# 24
LDVDD
RTL_LED1# (DEFINED IN SPEC)
RTL_LED1# 24
=> LED0 : ACT
LAN_EESK => LED1 : LINK
-1 Modify LDVDD (BOTH 10/100 AND GIGA CHIP)
LAN_EEDI
LAN_EEDO
R209
3D3V_LAN_S5
3D3V_LAN_S5
1 2 LAN_EECS_3
5K36R3F-1-GP 3D3V_LAN_S5
PCI_AD0
3 RSET PCI_AD1 3
1
C292
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U39
SCD1U16V2ZY-2GP
2
VSS
VSS
VSS
EESK
EEDI
EECS
LANWAKE
RSET
VSSPST
AVDD18
CTRL18
XTAL2
XTAL1
LED0
VDD18
LED1
LED2
LED3
AVDDH
GND
GND
VDD18
EEDO
VDD33
PCIAD0
PCIAD1
MDI0+ 1 102 PCI_AD2 3D3V_LAN_S5
24 MDI0+ MDI0+ PCIAD2
24 MDI0- MDI0- 2 101
LAVDDL MDI0- VSSPST
3 AVDDL GND 100
3
4 99 LDVDD
MDI1+ VSS VDD18 PCI_AD3 CTRL25 CHP69PT-GP
24 MDI1+ 5 MDI1+ PCIAD3 98 1
24 MDI1- MDI1- 6 97 PCI_AD4 Q13
LAVDDL MDI1- PCIAD4 PCI_AD5
7 96
2
CTRL25 AVDDL PCIAD5 PCI_AD6
8 CTRL25 PCIAD6 95
9 94 LDVDD
VSS VDD33 PCI_AD7
10 AVDDH PCIAD7 93
11 92 PCI_C/BE#0
3D3V_S0 LDVDD HSDAC+ CBEB0
12 HSDAC- VSSPST 91
PCI_AD8
13
14
VSS IDSEL:AD17 PCIAD8 90
89 PCI_AD9
MDI2+ PCIAD9
1
D12
LAVDDL
15 MDI2- INTA-->:INT_PIRQE# M66EN 88
PCI_AD10
C293 C537 C298 C296 C544
16 AVDDL PCIAD10 87
1 R211 GNT:PCI_GNT#2 PCI_AD11
SC10U10V5ZY-1GP
A K 2 17 86
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
1KR2J-1-GP VSS PCIAD11 PCI_AD12
18 85
2 CH751H-40PT-1GP 19
MDI3+
MDI3-
REQ:PCI_REQ#2 PCIAD12
VDD33 84
2
LAVDDL 20 71.08100.D0G 83 PCI_AD13
AVDDL PCIAD13 PCI_AD14
21 VSSPST PCIAD14 82
22 GND VSSPST 81
1 2 ISOLATE# 23 80
R210 15KR2F-GP LDVDD ISOLATE# GND PCI_AD15
24 VDD18 PCIAD15 79
15
INT_PIRQE# 25 78 LDVDD
INTA# VDD18 PCI_C/BE#1
3D3V_LAN_S5 26 VDD33 CBEB1 77
15,25,28,32 PCIRST1# 27 76 PCI_PAR
PCIRST# PAR PCI_PAR 15,25,28,32 3D3V_LAN_S5
15,19 SB_CLK33_LAN 28 75 PCI_SERR#
PCICLK SERR# PCI_SERR# 15,25,28,32
15 PCI_GNT#2 PCI_GNT#2 29 74
PCI_REQ#2 GNT# NC
15 PCI_REQ#2 30 REQ# GND 73
18 ICH_PME# 31 PME# NC 72
1
LDVDD 32 71
PCI_AD31 VDD18 VDD33 PCI_PERR# R212
33 PCIAD31 PERR# 70 PCI_PERR# 15,25,28,32
PCI_AD30 34 69 PCI_STOP# 0R0603-PAD
PCIAD30 STOP# PCI_STOP# 15,25,28,32
35 68 PCI_DEVSEL# LAVDDL
GND DEVSEL# PCI_DEVSEL# 15,25,28,32
PCI_AD29 36 67 PCI_TRDY#
PCI_TRDY# 15,25,28,32
2
PCI_AD28 PCIAD29 TRDY#
37 PCIAD28 VSSPST 66
38 65 PM_CLKRUN#
VSSPST CLKRUN# PM_CLKRUN# 15,25,28,32,33,35
PCIAD27
PCIAD26
PCIAD25
PCIAD24
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD18
PCIAD17
PCIAD16
FRAME#
VSSPST
CBEB3
CBEB2
VDD33
VDD18
VDD18
VDD33
VDD18
1
IRDY#
IDSEL
C297
GND
GND
GND
C299
SC1U6D3V2ZY-GP SCD1U16V2ZY-2GP
2
GIGALAN: RTL8110SBL
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
RTL8100CL-LF-GP
<CHANGE> 10/100 LAN:RTL8100C
1 <Variant Name> 1
PCI_AD27 LDVDD
PCI_AD26 PCI_IRDY#
PCI_IRDY# 15,25,28,32
PCI_FRAME#
3D3V_LAN_S5
PCI_AD25 PCI_C/BE#2
PCI_FRAME# 15,25,28,32
Wistron Corporation
PCI_AD24 PCI_AD16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCI_C/BE#3 PCI_AD17 Taipei Hsien 221, Taiwan, R.O.C.
LDVDD PCI_AD18
R208
LAN_IDSEL G78 Title
PCI_AD23 3D3V_LAN_S5
PCI_AD17 1 2 LAN_IDSEL PCI_AD19 1 2
PCI_AD22
PCI_AD21
LDVDD
3D3V_S5 3D3V_LAN_S5
8100CL
100R2F-L1-GP-U PCI_AD20 GAP-CLOSE-PWR Size Document Number Rev
A3
Garda-5 -1
A B C D E
A B C D E
4 4
LAN Connector
RJ1 LED COLOR
9
CONN_PWR_2 B1
NP1
23 ACT_LED# B2 B2:YELLOW
RJ45_1 RJ45_1
RJ45_2 RJ45_2
RJ45_3 RJ45_3
RJ45_45 RJ45_4
RJ45_5
RJ45_6 RJ45_6
RJ45_78 RJ45_7
RJ45_78 RJ45_8
RJ45_45 A1 A1:Amber
MCT2 CONN_PWR_1 A2
MCT1 RTL_LED1# A3 A3:GREEN
3 23 RTL_LED1# 3
RJ11_1
RJ11_2
8
7
6
5
NP2
RN37 10
SRN75J-1-GP
RJ45-107-GP-U
22.10245.J01
1
2
3
4
LAN Link: Green(A3), behavior is the
EC4 same for 10/100/1000 bits
LAN_TERMINAL 1 2
SC1KP2KV8KX-LGP
LAN Data: Yellow(B2), when LAN is
transfering data.
For Modem Cable from MDC

TRING1
3 1 2 TIP
1 L2 HFB1608VF-102-GP 68.00331.011
2 1 2 RING
4 L1 HFB1608VF-102-GP 68.00331.011
ACES-CON2-GP-U
20.F0714.002 -1 EMI Modify
3D3V_S5 2nd source: 20.D0196.102
2 2
1.route on bottom as differential pairs. AG3-SB

2
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. R16 XF1

3.No vias, No 90 degree bends. 0R2J-2-GP
DY MDI0+ 5 8 RJ45_1
4.pairs must be equal lengths. 23 MDI0+ MDI0- 6
TD+ TX+
7 RJ45_2
1
23 MDI0- TD- TX-

5.6mil trace width,12mil separation.
1 MDI1+
6.36mil between pairs and any other trace. 4
RD+
2 MDI1- MDI1+ 23
MCT1 CT RD- MDI1- 23
7.Must not cross ground moat,except XRF_TDC 9 CT
MCT2 10 12 RJ45_3
RJ-45 moat. XRF_RDC 3
CT RX+
11 RJ45_6
CT RX-
RTL_LED1#
3D3V_S5
RJ11 signal must leave the other signal XFORM-230-GP
1
68.01201.30A ACT_LED#
or power plane 100mil. C11 C10
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
-1 Modify CONN_PWR_1
DOC_TIP,DOC_RING,TIP,RING: 1
R18
2
470R2J-2-GP
W/S : 10/100 @ Surface layers 1 2 CONN_PWR_2
10/20 @ Inner layers R17 470R2J-2-GP
8
7
6
5
1 10/100 LAN Transformer RJ45 PIN <Variant Name> 1
ERC1
SRC100P50V-2-GP
TD+ --> TX+ RJ45-1 77.61012.02L
Wistron Corporation
1
2
3
4
TD- --> TX- RJ45-2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
RD+ --> RX+ RJ45-3 Title
RD- --> RX- RJ45-6 LAN Connector

A3
Garda-5 -1
A B C D E
A B C D E
3D3V_S0 3D3V_S0 CBB_D[0..15] 26

CBB_A[0..25] 26
1
PCMCIA
1
DY R411
C494 C495 C502 4K7R2J-2-GP 3D3V_S0
SC1KP50V2KX-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP RN56
PCMCIA
2
2
PCMCIA CB_MFUNC5 1 8
2
CB1410_GBRST# CB_MFUNC4 2 7
4 INT_SERIRQ 3 6 4
1
SB Modify CB_MFUNC2 4 5
3D3V_S0 C520
3D3V_S0 SC1U10V2KX-GP SRN10KJ-6-GP
2
PCMCIA VCC_ASKT_S0
PCMCIA
PCMCIA 3D3V_S0
1
1
C507
DY
C510 C522
SC1KP50V2KX-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SA Modify
2
1
PCMCIA C532
C514 SCD1U16V2ZY-2GP
4
3
2
1
SC1KP50V2KX-1GP PCMCIA
2
PCMCIA RN57 PCMCIA
114
130
102
122
138
126
U34 SRN47KJ-1-GP
18
30
44
50
22
42
58
78
94
14
66
86
63
90
6
15,19,23,28,32 PCI_AD[31..0]
SA Modify PCI_AD31 3 125 CBB_REG#
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
GND
GND
GND
GND
GND
GND
GND
GND
GRST# CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
AUX_VCC
SOCKET_VCC
SOCKET_VCC
CBB_REG# 26
5
6
7
8
PCI_AD30 AD31 REG#/CCBE3# CBB_A25
4 AD30 A25/CAD19 116 CBB_A25 26
PCI_AD29 5 113 CBB_A24 CBB_A24 26 CBB_RESET
PCI_AD28 AD29 A24/CAD17 CBB_A23 CBB_OE#
7 AD28 A23/CFRAME# 111 CBB_A23 26
PCI_AD27 8 109 CBB_A22 CBB_A22 26 CBB_CE2#
PCI_AD26 AD27 A22/CTRDY# CBB_A21 CBB_CE1#
9 AD26 A21/CDEVSEL# 107 CBB_A21 26
PCI_AD25 10 105 CBB_A20 CBB_A20 26
PCI_AD24 AD25 A20/CSTOP# CBB_A19
11 AD24 A19/CBLOCK# 103 CBB_A19 26
PCI_AD23 15 100 CBB_A18 CBB_A18 26
PCI_AD22 AD23 A18/RFU CBB_A17
16 AD22 A17/CAD16 98 CBB_A17 26
PCI_AD21 17 108 A_CCLKXX R410 1 2 33R2J-2-GP CBB_A16 26
PCI_AD20 AD21 A16/CCLK# CBB_A15
19 AD20 A15/CIRDY# 110 CBB_A15 26 PCMCIA
3 PCI_AD19 23 104 CBB_A14 CBB_A14 26
3
PCI_AD18 AD19 A14/CPERR# CBB_A13
24 AD18 A13/CPAR 101 CBB_A13 26
PCI_AD17 25 112 CBB_A12 CBB_A12 26
PCI_AD16 AD17 A12/CCBE2# CBB_A11
26 AD16 A11/CAD12 95 CBB_A11 26
PCI_AD15 38 PCMCIA 89 CBB_A10 CBB_A10 26
PCI_AD14 AD15 A10/CAD9 CBB_A9
39 AD14 A9/CAD14 97 CBB_A9 26
PCI_AD13 40 99 CBB_A8 CBB_A8 26
PCI_AD12 AD13 A8/CCBE1# CBB_A7
41 AD12 A7/CAD18 115 CBB_A7 26
45 AD10 A5/CAD21 120 CBB_A5 26
47 AD8 A3/CAD23 124 CBB_A3 26
51 AD6 A1/CAD25 128 CBB_A1 26
PCI_AD4 AD5 A0/CAD26 CBB_D15
PCI_AD3
53
54
AD4 IDSEL:AD16 D15/CAD8 87
84 CBB_D14
CBB_D15 26
AD3 D14/RFU CBB_D14 26
PCI_AD2
PCI_AD1
55 AD2 INTA-->:INT_PIRQG,H# D13/CAD6 82 CBB_D13
CBB_D12
CBB_D13 26
56 AD1 D12/CAD4 80 CBB_D12 26
PCI_AD0 57 AD0
GNT:PCI_GNT#0 D11/CAD2 77 CBB_D11 CBB_D11 26
144 CBB_D10 CBB_D10 26
15,23,28,32 PCI_C/BE#[3..0] REQ:PCI_REQ#0 D10/CAD31
PCI_C/BE#3 12 142 CBB_D9 CBB_D9 26
PCI_C/BE#2 C_BE3# D9/CAD30 CBB_D8
27 C_BE2# D8/CAD28 140 CBB_D8 26
PCI_C/BE#1 37 85 CBB_D7 CBB_D7 26
PCI_C/BE#0 C_BE1# D7/CAD7 CBB_D6
48 C_BE0# D6/CAD5 83 CBB_D6 26
28 81 CBB_D5 CBB_D5 26
15,23,28,32 PCI_FRAME# FRAME# D5/CAD3
29 79 CBB_D4 CBB_D4 26 VCC_ASKT_S0
15,23,28,32 PCI_IRDY# IRDY# D4/CAD1
31 76 CBB_D3 CBB_D3 26
15,23,28,32 PCI_TRDY# TRDY# D3/CAD0
15,23,28,32 PCI_STOP# 33 STOP# D2/RFU 143 CBB_D2 26
1
2 PCI_AD16 CARD_IDESL 13 CBB_D1 2
1 2 IDSEL D1/CAD29 141 CBB_D1 26
R385 100R2F-L1-GP-U 32 139 CBB_D0 CBB_D0 26 R392
15,23,28,32 PCI_DEVSEL# DEVSEL# D0/CAD27 10KR2J-3-GP
PCMCIA 34 92 CBB_OE# CBB_OE# 26
15,23,28,32 PCI_PERR# PERR# OE#/CAD11
15,23,28,32 PCI_SERR# 35 SERR# WE#/CGNT# 106
CBB_IORD#
CBB_WE# 26 PCMCIA
15,23,28,32 PCI_PAR 36 93 CBB_IORD# 26
2
PAR IORD#/CAD13 CBB_IOWR#
15,19 SB_CLK33_PCM 21 PCI_CLK IOW#/CAD15 96 CBB_IOWR# 26
15,23,28,32 PCIRST1# 20 RST# WP/IOIS16/CCLKRUN# 136 CBB_WP 26
1
R384 59 123 CBB_INPACK# 26

10R2J-2-GP TP63 RI_OUT#/PME# INPACK#/CREQ#
15 PCI_GNT#0 2 GNT# RDY_IREQ#/CINT# 132 CBB_RDY 26
VCCD0#/SMBDATA/SDATA
DY 15 PCI_REQ#0 1 REQ# WAIT#/CSERR# 133 CBB_WAIT# 26

VCCD1#/SMBCLK/SCLK
CD2/CCD2# 137 CBB_CD2# 26

75 CBB_CD1# 26
CLK33_PCM12
CD1/CCD1# CBB_CE2#
CE2/CAD10 91 CBB_CE2# 26
1
88 CBB_CE1# CBB_CE1# 26
VPPD0/SLATCH
C504 CE1#/CCBE0#
RESET/CRST# 119 CBB_RESET 26
SPKR_OUT#
SC22P50V2JN-4GP 134 CBB_BVD2# 26

2
BVD2/SPKR/LED/AUDIO
SUSPEND
PCMCIA BVD1/STSCHG/RI/CSTSCHG 135 CBB_BVD1# 26

117
O2MF6
O2MF5
O2MF4
O2MF3
O2MF2
O2MF1
O2MF0
VPPD1
VS2/CVS2 CBB_VS2# 26
DY VS1/CVS1 131 CBB_VS1# 26
1
C493
SC10P50V2JN-4GP 71.01410.C0G CB1410QFB0
2
74
73
72
71
CBUS_SUSPEND70
69
68
67
65
64
61
60
62
Reduce start up noise

CB_SPKR 30
26 VCCD1#
26 VCCD0# DY INT_PIRQG# 15
1
1 2 0R2J-2-GP
26 VPPD1 R399 CB_MFUNC2 R407
1 26 VPPD0 47KR2J-2-GP <Variant Name> 1
1 2 R413 1PCMCIA20R2J-2-GP INT_SERIRQ 15,28,32,33,35
3D3V_S0
R421 CB_MFUNC4 PCMCIA
10KR2J-3-GP CB_MFUNC5
PCMCIA PM_CLKRUN# 15,23,28,32,33,35 2 Wistron Corporation
Title
CardBus_ENE CB1410
A3
Garda-5 SA
A B C D E
A B C D E
PCMCIA Socket Cardbus I/F Power switch 3D3V_S0

3D3V_S0
CBB_D[0..15] 25
CBB_A[0..25] 25
2
5V_S0
PCMCIA
C227 C233
CBB_IORD# 25
CN1 SC1U6D3V2ZY-GP SCD1U16V2ZY-2GP 4K7R2J-2-GP
CBB_IOWR# 25
2
R179
NP1 CBB_OE# 25 PCMCIA
1 CBB_WE# 25 PCMCIA PCMCIA
1
U32
35 CBB_REG# 25
1
4 CBB_D3 2 C234 C228 4
CBB_CD1# CBB_RDY 25 SCD1U16V2ZY-2GP SC1U6D3V2ZY-GP 2211_SHDN#
25 CBB_CD1# 36 CBB_WP 25 3 3.3V SHDN# 16
CBB_D4 3 CBB_RESET 25 DY PCMCIA 4
2
CBB_D11 3.3V
37 CBB_WAIT# 25 5 5V AVCC 13 VCC_ASKT_S0
CBB_D5 4 6 12
CBB_D12 CBB_INPACK# 25 5V AVCC
38 9 12V AVCC 11
CBB_D6 5 TP62 TPAD28
CBB_D13 39 CBB_CE1# 25 1 10
CBB_D7 25 VCCD0# VCCD0# AVPP VPP_ASKT_S0
6 CBB_CE2# 25 25 VCCD1# 2 VCCD1#
CBB_D14 40 8
CBB_CE1# CBB_BVD1# 25 OC#
7 CBB_BVD2# 25 25 VPPD0 15 VPPD0
CBB_D15 41 25 VPPD1 14 7
CBB_A10 VPPD1 GND
8
VCC_ASKT_S0 CBB_CE2# 42 CBB_VS1# 25
CBB_OE# 9 TPS2211AIDBR-1GP
CBB_VS2# 25
SA Modify CBB_VS1# 43
CBB_A11 10
CBB_IORD# 44
CBB_A9 11
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SC1KP50V2KX-1GP
CBB_IOWR# 45
1
C274 C530 C529 CBB_A8 12

CBB_A17 46
CBB_A13 13
2
PCMCIA PCMCIA PCMCIA CBB_A18 47

CBB_A14 14
CBB_A19 48
CBB_WE# 15
CBB_A20 49
CBB_RDY 16
3 CBB_A21 50 SKT2 3
17 1 2
VPP_ASKT_S0 51
18
52 3 4
CBB_A16 19
1
C589 C590 CBB_A22 53

SC1U10V2KX-GP
C525 CBB_A15 20 CARD-SKT18-U

SCD1U16V2ZY-2GP CBB_A23 21.H0056.001
SC2D2U6D3V5KX-1GP
54
2
PCMCIA CBB_A12 21
PCMCIA PCMCIA CBB_A24 55 PCMCIA
CBB_A7 22
CBB_A25 56
CBB_A6 23
SB Modify CBB_VS2# 57
CBB_A16 CBB_A5 24
CBB_RESET 58
CBB_A4 25
CBB_WAIT# 59
CBB_A3 26
CBB_INPACK# 60
CBB_A2 27
CBB_REG# 61
Place close to pin 19. CBB_A1 28
1
CBB_BVD2# 62
C523 CBB_A0 29
DUMMY-C2 CBB_BVD1# 63
CBB_D0 30
CBB_D8 64
2 CBB_D1 2
31
2
CBB_D9 65
CBB_D2 32
CBB_D10 66
CBB_WP 33
Clock AC termination 25 CBB_CD2# CBB_CD2# 67
33MHz clock for 32-bit 34
68
Cardbus card I/F NP2
CARDBUS68P-11-GP
62.10024.601
PCMCIA
1
C512
SCD01U16V2KX-3GP
2
PCMCIA
1 <Variant Name> 1
Wistron Corporation
Title
PCMCIA
A3
Garda-5 SB
A B C D E
A B C D E
Mini Card Connector

3D3V_S0 3D3V_S0
3D3V_S5 3D3V_S0 1D5V_NEW_MINI_S0 MINIC MINIC1
3D3V_AUX_S5
6 13 CLK_PCIE_MINI1 3
A
1.5V REFCLK+
1
4
REFCLK- 11 CLK_PCIE_MINI1# 3 4
2
2 LED2 LED1
3.3V R233
PERN0 23 PCIE_RXN2 9 LED-Y-47-GP LED-B-48-GP
28 25 100KR2J-1-GP
+1.5V PERP0 PCIE_RXP2 9 83.00190.L70
48 83.00190.D7A
+1.5V
31 PCIE_TXN2 9
1 K
1
2
PETN0 R228
52 +3.3V PETP0 33 PCIE_TXP2 9
PWRBTN# 1 2 EC_PWRBTN# 33
24 36 USB_PN6 18 470R2J-2-GP -1 Modify R226
+3.3VAUX USB_D-
1
USB_D+ 38 USB_PP6 18 100R2J-2-GP
1
R8
DY C329 100R2J-2-GP
2
3 30 R164 1 20R2J-2-GP SCD1U16V2ZY-2GP
SMB_CLK 3,11,18,32
2
RESERVED#3 SMB_CLK EMAIL_LED#
5 32 1 2 SMB_DATA 3,11,18,32 1 2
2
RESERVED#5 SMB_DATA R158 0R2J-2-GP 33 EMAIL_LED# EC46
8 RESERVED#8 DY SC100P50V2JN-3GP
10 RESERVED#10
12 1 TP80 TPAD30
RESERVED#12 WAKE#
14 7
UIM 16
RESERVED#14
RESERVED#16
CLKREQ#
PERST# 22
CLKREQ_MINI# 3
PLT_RST1# 15,21,32,33,35,36
17 RESERVED#17
19 RESERVED#19
32,33 RF_ON/OFF# 20 RESERVED#20 GND 4
37 RESERVED#37 GND 9
1
39 RESERVED#39 GND 15
R395 41 18
10KR2J-3-GP RESERVED#41 GND
43 21
DY 45
RESERVED#43
RESERVED#45
GND
GND 26 Internal Microphone 3D3V_S5
47 27
2
RESERVED#47 GND MIC1 SRN470J-3-GP

49 RESERVED#49 GND 29 SRN10KJ-6-GP
3 51 34 3 3
RESERVED#51 GND INTERNET#_1
GND 35 1 8 1 4 5 INTERNET# 33
40 7 2 MAIL#_1 3 6 MAIL# 33
TP56 TPAD28 LED_WPAN# GND INT_MICP EBUTTON#_1
1 42 LED_WWAN# GND 50 30 INT_MICP 2 6 3 2 7 EBUTTON# 33
WLAN_LED# 44 53 4 5 4 PROGRAM#_1 1 8 PROGRAM# 33
13 WLAN_LED# LED_WLAN# GND
1 LED_WWAN# 46 LED_WPAN# GND 54
TP55 TPAD28 ACES-CON2-1-GP-U RN39
RN38
1
20.D0197.102
NP1
NP2
4
3
2
1
EC11 2nd source: 20.F0736.002
SCD01U16V2KX-3GP RC1
2
SKT-MINI52P-3-GP 62.10043.231 SRC100P50V-2-GP
NP1
NP2
2nd source: 62.10043.331
5
6
7
8
3D3V_S0 1D5V_NEW_MINI_S0 3D3V_S5
MINIC MINIC MINIC MINIC MINIC

1
C475 C480 C531 C223 C241

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
2
E-Button Internet Button Mail Button Power Button

2
TOP VIEW RIGHT 4 TOP VIEW RIGHT 3 TOP VIEW RIGHT 2 TOP VIEW RIGHT 1 2
EBUTTON#_1 INTERNET#_1 MAIL#_1 PWRBTN#
Place near MINIC1 1 SW5 2 1 SW4 2 1 SW2 2 1 SW1 2
5 5 5 5
3 4 3 4 3 4 3 4
SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1
3D3V_S0 RF_ON/OFF# 62.40009.431 62.40009.431 62.40009.431 62.40009.431
WLAN_LED#
Q24 AG3-SB
2N7002DW-7F-GP
6
4
1
R371
DY 100KR2J-1-GP
Program Button LED V V

2
Button V V V V V
32 80211_ACTIVE TOP VIEW RIGHT 5
PROGRAM#_1
Program Button E-Button Internet Button Mail Button Power Button
1 SW3 2
5
D
1 <Variant Name> 1
3 4
3
SW-TACT-59-GP-U1
Q23 62.40009.431
2N7002PT-U Wistron Corporation
1 84.27002.F31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
33 WLAN_TEST_LED Taipei Hsien 221, Taiwan, R.O.C.
G
2
Title
S
MINI CARD / Launch Button
A3
Garda-5 -1
A B C D E
A B C D E
3D3V_S0 SB
Add 0.01U*4 for TQFP
U33B 3D3V_S0
1
PCI C508
PCI C500
PCI C501
PCI C499 C220 C497
10 VCC_PCI1 VCC_3V 67
DY DY 20 VCC_PCI2
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
27
2
VCC_PCI3
32 VCC_PCI4
1
3D3V_S0 41 VCC_PCI5 C503 C496
128 VCC_PCI6
SCD01U16V2KX-3GP
4 SC10U6D3V5MX-3GP 4
2
61 VCC_RIN DY PCI
16 VCC_ROUT1
R5C832_VCCROUT 34 VCC_ROUT2
1
1
PCI C231 PCI C528 PCI C505 PCI C256 64 VCC_ROUT3
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
114 VCC_ROUT4
1
PCI PCI PCI 120
2
2 C506 C498 C511 C260 VCC_ROUT5

DY
SCD47U10V3ZY-GP
SCD01U16V2KX-3GP
SCD47U10V3ZY-GP
SCD01U16V2KX-3GP
86
2
VCC_MD
GND1 4
GND2 13
PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
PCI_AD21 12 99
PCI_AD20 AD21 AGND1
14 AD20 AGND2 102
PCI_AD19 15 103
PCI_AD18 AD19 AGND3 3D3V_S0
17 AD18 AGND4 107
PCI_AD17 18 111
3 PCI_AD16 AD17 AGND5 3
19 AD16
1
PCI_AD15 36
PCI_AD14 AD15 R419
37 AD14
PCI_AD13 38 10KR2J-3-GP
PCI_AD12 AD13
15,23,25,32 PCI_C/BE#[3..0]
PCI_AD11
39 AD12 PCI
40
2
AD11
PCI / OTHER
PCI_AD10 42 69 GBUS_GRST#_2
PCI_AD9 AD10 HWSPND#
43 AD9
15,19,23,25,32 PCI_AD[31..0] PCI_AD8 44
PCI_AD7 AD8 3D3V_S0
PCI_AD6
46 AD7 MSEN R178 1
PCI
47 AD6 MSEN 58 2 10KR2J-3-GP
PCI_AD5 48
3D3V_S0 PCI_AD4 AD5 XDEN R404 1
49 AD4 XDEN 55 2 10KR2J-3-GP
PCI_AD3 50 PCI
PCI_AD2 AD3
PCI_AD1
51 AD2 UDIO5
PCI
SB Modify 52 AD1 UDIO5 57 1 2
1
PCI_AD0 53 R408 100KR2J-1-GP

R401 AD0
4K7R2J-2-GP
15,23,25,32 PCI_PAR
PCI_C/BE#3
33 PAR UDIO3 R191 1
PCI
7 C/BE3# UDIO3 65 2 10KR2J-3-GP
PCI PCI_C/BE#2 21 59 UDIO4 R414 1 2 10KR2J-3-GP
PCI_C/BE#1 C/BE2# UDIO4
D31 35 PCI
2
PCI_C/BE#0 C/BE1#
DY PCI_AD20
45 C/BE0# UDIO2 56
33 GBUS_GRST# K A 1 PCI 2 R5C834_IDSEL 8 IDSEL
R153 10R2J-2-GP 60 PCI_SPKR 30
UDIO1
1
15 PCI_REQ#3 124 REQ#

CH751H-40PT-1GP C592 15 PCI_GNT#3 123 72
GNT# UDIO0/SRIRQ# INT_SERIRQ 15,25,32,33,35
SC1U10V2KX-GP 15,23,25,32 PCI_FRAME# 23
2
FRAME#
PCI 15,23,25,32 PCI_IRDY# 24 IRDY#
15,23,25,32 PCI_TRDY# 25 TRDY#
2 2
15,23,25,32 PCI_DEVSEL# 26 DEVSEL#
15,23,25,32 PCI_STOP# 29 STOP# INTA# 115 INT_PIRQH# 15,32 1394 : INTA#
PCIRST1#
DY 15,23,25,32 PCI_PERR# 30 PERR#
1
R400
2 15,23,25,32 PCI_SERR# 31 SERR# INTB# 116 INT_PIRQF# 15 6in1 : INTB#(INT_PIRQE#)share
0R2J-2-GP GBUS_GRST#_1 71 GBRST#
SB 15,23,25,32 PCIRST1# 119 PCIRST#
Solve S3 wake up and leakage issue
15,19 SB_CLK33_1394 121 PCICLK TP75
R418 1
PCI CBUS_PME#
PCI R5C832_TEST
3D3V_S0 2 70 PME# TEST 66
1
10KR2J-3-GP
R394 15,23,25,32,33,35 PM_CLKRUN# R397 1 2PM_CLKRUN#_R5C832117
10R2J-2-GP 0R2J-2-GP CLKRUN# TPAD30
PCI
1
2
DY R398 R420
2
1KR2J-1-GP 100KR2J-1-GP
PCLK_R5C832_PL1
DY R5C832-1-GP PCI
2
1
1
C509
SC10P50V2JN-4GP
IDSEL:AD20
2
DY
1394 INTA-->:INT_PIRQH#
1 6IN1 INTB-->:INT_PIRQF# <Variant Name> 1
GNT:PCI_GNT#3
REQ:PCI_REQ#3 Wistron Corporation
Title
R5C832_1394_7IN1(1/2)
A3
Garda5 SB
A B C D E
5 4 3 2 1
U33A U58
CardR 3D3V_S0
3D3V_S0 1394 +3VRUN_PHY +3VRUN_CARD
+3VRUN_PHY 1 5
OUT IN
1 2 2 GND
L28 MLB1608080600A1GP 3 4 MC_PWR_CTRL_0
AVCC_PHY1 98 68.00108.081 20mil NC#3 ON/OFF#
1
AVCC_PHY2 106 CardR
1
110 C516 C518 C524 AAT4250IGV-T1-GP
AVCC_PHY3
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
112 CardR C534 C542
2
AVCC_PHY4 SCD1U10V2KX-4GP
SC1U6D3V2ZY-GP
1394 1394 1394 For SD/MS Card Power
2
D GUARD GND D
1 2 1394_XI 113 TPBIAS0

C270 SC15P50V2JN-2-GP TPBIAS0 Reserve R547,R548,R550,R551 for co-layout
1394
SC 94 XI
2
X4
1394
X-24D576MHZ-46GP
82.30023.351 104 TPB0N
1
TPBN0
1 2 1394_XO 95 105 TPB0P
C271 SC15P50V2JN-2-GP XO TPBP0
1394
GUARD_GND GND
IEEE1394/SD
108 TPA0N
TPAN0
1 2 RICHO_FILO 96 109 TPA0P
C527 SCD01U16V2KX-3GP FIL0 TPAP0
CLOSE TO CHIP CN2
35
1394
1394 1394 31 32
1 2RICHO_REXT 101 REXT
R192 1394 10KR2F-2-GP C283 R195 R199 XD_DATA6 1 2 XD_DATA7
1
SCD01U16V2KX-3GP
C288 XD_DATA4 3 4 XD_DATA5
SCD33U10V3KX-3GP
56R2J-4-GP
56R2J-4-GP
SD/XD/MS_DATA2_1 5 6 SD/XD/MS_DATA3_1
1 2 RICHO_VREF 100 SD/XD/MS_DATA0_1 7 8 SD/XD/MS_DATA1_1
2
C272 SCD01U16V2KX-3GP VREF SD/XD/MS_CLK MS_INS#
C
1394 1394 TPBIAS0 XD_WP#
9 10
SD/XD/MS_CMD C
1394 11 12
2
GUARD_GND TPA0P XD_ALE 13 14 XD_CLE
GUARD GND TPA0N XD_CE# 15 16 SD_WP#(XDR/B#)
TPB0P SD_CD# 17 PCI 18 GND
TPB0N 19 20 GND
87 XD_DATA7 1394 1394 +3VRUN_CARD 21 22 GND
MDIO17
1 2 1 2 R204 +3VRUN_CARD 23 24 GND
92 XD_DATA6 R194 5K11R2F-L1-GP 25 26
MDIO16 56R2J-4-GP 1394_TPB1_R TPA0P TPB0P
27 28
89 XD_DATA5 1 2 1 2 TPA0N 29 30 TPB0N
MDIO15
XD_DATA4 R197
1394 C284
1394
MDIO14 91 33 34
56R2J-4-GP SC270P50V2JN-2GP
90 SD/XD/MS_DATA3_1 AMP-CONN30A-1-GP
36
MDIO13 20.F0099.030
93 SD/XD/MS_DATA2_1 2nd source: 20.F0800.030
MDIO12
G46
81 SD/XD/MS_DATA1_1 1 2
MDIO11
PCI SD/XD/MS_DATA0_1
82 GAP-CLOSE
MDIO10
G47
1 2
75 XD_WP#
MDIO05
GAP-CLOSE
88 SD/XD/MS_CMD
MDIO08 GUARD_GND
83 XD_ALE
MDIO19
85 XD_CLE
B MDIO18 B
78 XD_CE#
MDIO02
77 SD_WP#(XDR/B#)
MDIO03
80 SD_CD#
MDIO00
79 MS_INS#
MDIO01
84 SD/XD/MS_CLK
MDIO09
76 MC_PWR_CTRL_0
MDIO04
74 MS_LED#
MDIO06 TP66
1
97 RSV
73 R417
MDIO07
100KR2J-1-GP
R5C832-1-GP 71.5C832.00G
CardR
2
A <Variant Name> A
Wistron Corporation
Title
R5C832_1394_7IN1(2/2)
A3
Garda-5 SA
5 4 3 2 1
A B C D E
25 CB_SPKR 1 2 C552 CB_SPKR1 R436 1 247KR2J-2-GP
4 SCD47U10V3ZY-GP 4
3D3V_S0 5VA_S0
28 PCI_SPKR 1 2 C547 PCI_SPKR1 R433 1 247KR2J-2-GP "VAUX" Pull high to enable standby mode
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD47U10V3ZY-GP
1
C549 C551 C550 C578 C584
18 ACZ_SPKR 1 2 C557 ACZ_SPKR1 R443 1 247KR2J-2-GP AUDIO_BEEP 1 2AUDIP_PC_BEEP
2
SCD47U10V3ZY-GP SC1U6D3V2ZY-GP
1
C548 AUD_AGND AUD_AGND
33 KBC_BEEP 1 2 C554 KBC_BEEP1 R439 1 247KR2J-2-GP R434 SC100P50V2JN-3GP
1KR2J-1-GP
2
SCD47U10V3ZY-GP ACZ_RST#_883 18
ACZ_SYNC_883 18
2
ACZ_BITCLK_883 ACZ_BITCLK_883 18
2 1
AUD_AGND R472 10KR2J-3-GP
SENSE_A 1 2 MICIN_JD# 31
R4561 220KR2F-L-GP LINEIN_JD# 31
R4511 210KR2F-2-GP LINEOUT_JD# 31
R449 5K1R2F-2-GP
25
38
12
11
10
33
44
43
34
13
U61
1
9
6BIT-CLK
PCBEEP
VAUX
SENSE_B
SENSE_A
LFE-OUT
CEN-OUT
DVDD1
DVDD2
AVDD1
AVDD2
RESET#
SYNC
3 3
31 LINE_IN_L C574 2 1 SC1U6D3V2ZY-GP LINE1_L 23 5 ACZ_SDATAOUT_883 18

C577 2 LINE1-L SDATA-OUT
31 LINE_IN_R 1 SC1U6D3V2ZY-GP LINE1_R 24 LINE1-R SDATA-IN 8 ACZ_SDATAIN0_883 1 2 ACZ_SDATAIN0 18
14 R435 39R2J-L-GP
LINE2-L
15 LINE2-R
SPDIFO 48
29 LINE1-VREFO SPDIFI/EAPD 47
31 LINE2-VREFO R450
C572 SC1U6D3V2ZY-GP 45 1 2
27 INT_MICP 2
R457
1 INT_MICP_R
31
31
1 2
MIC_IN_L
MIC_IN_R
1
1
C575
2
2
MIC1_L
MIC1_R
SC1U6D3V2ZY-GP MIC2_L
21
22
16
MIC1-L
MIC1-R
MIC2-L
ALC 883 SIDESURR-OUT-L
SIDESURR-OUT-R 46
DY
4K7R2J-2-GP
SB Modify
0R2J-2-GP C564 1 2 SC1U6D3V2ZY-GP MIC2_R 17 39 SPKR_OUT_L 31

C568 SC1U6D3V2ZY-GP MIC2-R SURR-OUT-L
SURR-OUT-R 41 SPKR_OUT_R 31
1
RN66 1 4 MIC1-VREFO-R 32
DY DY 2 3 MIC1-VREFO-L 28
MIC1-VREFO-R
C565 R453 SRN4K7J-8-GP MIC1-VREFO-L
R471 30 35 LINE_OUT_L 31
2
SC100P50V2JN-3GP 10KR2J-3-GP MIC2-VREFO FRONT-OUT-L

FRONT-OUT-R 36 LINE_OUT_R 31
MIC2-VREFO
PIN37_VREFO
1 2
2
2
4K7R2J-2-GP
CD-GND
C585
DVSS1
DVSS2
JDREF
AVSS1
AVSS2
GPIO0
GPIO1
VREF
SC4D7U10V5ZY-3GP 3D3V_S0
CD-R
CD-L
1
71.00883.A0G
26
42
4
7
27
40
37
2
3
18
20
19
DY
1
2 R437 2
ALC883-1-GP 10KR2J-3-GP
1
C586
SCD47U10V3KX-3GP
R462
2
20KR2F-L-GP
2
AMP_SHUTDOWN_CODEC 31
AUD_AGND AUD_AGND
1) When GPIO0 is assered, AMP should be muted. *Layout*

2) SPDIFO should be turned off when not used. POWER GENERATE 5VA_S0
20 mil
1
G79
2
GAP-CLOSE
Configuation:
(3 External Jacks, 1 internal Mic, 1 stereo output Speaker Amp. AUD_AGND
1
Pin Symbol Location Re-tasking 1 C587 R474
5V_S0 SC22P50V2JN-4GP 28K7R3F-GP
35/36 FRONT AMP,Jack1 AMP output, line input U63
2
1 5
2
SHDN# SET
39/41 SURR X X 5VA_SETPIN 1 R467 2
10KR2F-2-GP
1 2 GND <Variant Name> 1
1
43/44 CEN/LEFT X SURR-VREFO-L/R C588

3 IN OUT 4
45/46 SIDESURR X SIDESURR-L is MIC2-VREFO-R, SIDESURR-R is LINE2-VREFO-R SC1U6D3V2ZY-GP
Wistron Corporation
2
G923-330T1UF-GP
1
23/24 LINE1 Jack 2 Line input, line output 74.00923.A3F C576 C573
21/22 MIC1 Jack 3 Mic input, line output SC1U6D3V2ZY-GP SC2D2U10V3ZY-1GP
2
Title
14/15 LINE2 X X Azalia codec ALC883
16/17 MIC2 Int. Mic Mic input AUD_AGND AUD_AGND Size
A3
Document Number Rev
Garda-5 SB
A B C D E
A B C D E
5V_S0
I/P signal level
need +5V level
OP+5V
AUDIO OP AMPLIFIER
Internal Speaker
6
1 R440 2 AMP_SHDN_D
0R0603-PAD SPKR_L- 4
1
C583 C580 C561 C560 SPKR_L+ 3
R466 SPKR_R-
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY 0R2J-2-GP
2
TP81 SPKR_R+ 1 SPKR1
4 TPAD28 ACES-CON4-1-GP 4
2
20.D0197.104
5
1
SB Modify
1
2
3
4
R464
U62 100KR2J-1-GP SRC100P50V-2-GP
20
15
13
4
5
ERC2
DY
2
VOL
LVDD
IN1#/IN2
RVDD
SHUTDOWN
8
7
6
5
C581 10KR2J-3-GP 10KR2J-3-GP C558
SC1U10V2KX-GP R470 R452 SC1U10V2KX-GP
1 2 SOUND_L2 1 2 SOUND_L_OP1 1 18 SOUND_R_OP1 2 1 SOUND_R2 2 1 2nd source: 20.F0760.004
30 SPKR_OUT_L LIN1 RIN1 SPKR_OUT_R 30
2 LIN2 RIN2 17
SOUND_L_OP1 1 R465 2 SPKR_L+ 24 19 SPKR_R+ 2 R460 1 SOUND_R_OP1
7K5R2J-GP SPKR_L- LOUT+ ROUT+ SPKR_R- 7K5R2J-GP MIC2
7 LOUT- ROUT- 12
SA Modify SA Modify
1 2
DY 6
8
NC#6
LBYPASS 3
16 RPASS
LPASS
2 1 EXT MIC IN
MICIN_JD#
NP2
NP1
5
C579 23
NC#8
NC#23
RBYPBASS C569 DY 30 MICIN_JD#
4
SC1U10V3ZY-6GP SC1U10V3ZY-6GP 30 MIC_IN_R R458 2 1 0R2J-2-GP MIC_IN_R_1 3
1
GND/HS
GND/HS
GND/HS
GND/HS
6
MUTE
C559 C582 R459 2 1 0R2J-2-GP MIC_IN_L_1 2
GND
GND
30 MIC_IN_L
SC2D2U10V3ZY-1GP
1
DY DY DY
SC2D2U10V3ZY-1GP
2
1
AG1-910-02
SC100P50V3JN-2GP
G1432Q5U-GP EC84 EC85 EC86 PHONE-JK233-GP
11
9
10
21
22
14
25
22.10133.B01
2
SC100P50V3JN-2GP
SC100P50V2JN-3GP
74.01432.013
R461 DY
3
33 AMP_MUTE_KBC 2 1AMP_MUTE 3
1
0R2J-2-GP
R463
100KR2J-1-GP
2
3D3V_S0
R442
2 1
0R2J-2-GP
1 R483 2
1 1KR2J-1-GP
LINE OUT
E
33 AMP_SHUTDOWN_KBC R484 SB Modify

DY D36 3 AMP_SHDN_D 1 B
2
2 100KR2J-1-GP Q29
30 AMP_SHUTDOWN_CODEC CH3906PT-GP
C
2
R432
BAT54WCPT-GP 100KR2J-1-GP HP_AMP_SHDN#
1
R444 LINEOUT_JD=lOW after PLUG-IN

1
3D3V_S0 100KR2J-1-GP SB Modify LOUT1

2
NP2
1
5VA_S0 NP1
L30 LINEOUT_JD# 5
DY 1 FCM1608KF-2-GP-U
30 LINEOUT_JD#
4
68.00217.171 LINE_OUT_R_AMP R447 2 1 33R2J-2-GP LINE_OUT_R_AMP_1 3
2 D37 2
3 6
BAV99PT-GP-U LINE_OUT_L_AMP R448 2 1 33R2J-2-GP LINE_OUT_L_AMP_1 2
2
2 3D3V_S0_A 1
-1 Modify PHONE-JK235-GP
1
3
4
C553 22.10133.B21
1
RN65 C555 C556 EC80
10
19
14
18
11
9
U60
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SC2D2U10V3ZY-1GP SRN1KJ-7-GP
2
SC100P50V2JN-3GP
SVDD
PVDD
SHDNR#
SHDNL#
OUTL
OUTR
2
DY DY DY 2ndsource: 22.10251.321
2
1
AMP_C1N 1 2 AMP_C1P 1 4
C566 C546 SC1U10V3KX-3GP C1P NC#4
3 C1N NC#6 6
SC1U10V2KX-GP 8
NC#8
30 LINE_OUT_L 1 2LINE_OUT_L_1 1 R493 2LINE_OUT_L_R NC#12 12
10KR2J-3-GP 13 16
INL NC#16
30 LINE_OUT_R 1 2LINE_OUT_R_1 1 R494 2LINE_OUT_R_R 15 INR NC#20 20
C567 10KR2J-3-GP
1
SC1U10V2KX-GP
SGND
PGND
PVSS
SVSS
R496 R495 C571 C570 PHONE-JK234-GP

GND
1KR2J-1-GP
1KR2J-1-GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
When has SPDIF

LINE IN
1
NP2
NP1 replace to "22.10205.251".
2
21
17
2
MAX4411ETP-1-GP 74.04411.A13 LINEIN_JD# 5

30 LINEIN_JD#
2
4
R454 2 1 0R2J-2-GP AUD_LINE_R 3
30 LINE_IN_R
6
1 -1 Modify R455 2 1 0R2J-2-GP AUD_LINE_L 2 1
30 LINE_IN_L
1
0.11 * 1.5 =0.165 SB Modify DY DY DY Wistron Corporation
4
3
1
MAX4411_PVSS LIN1
FAE recommend DY EC83 EC82 EC81 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
RN64 22.10133.B11 Taipei Hsien 221, Taiwan, R.O.C.
2
C545 SRN10KJ-5-GP
SC1U10V2KX-GP Title
2
AUDIO AMP AND JACK

1
2

A3
Garda-5 -1
A B C D E
A B C D E
3D3V_S0
5V_S0
15,19,23,25,28 PCI_AD[0..31]
MINIP MINIP DY MINIP DY MINIP
1
MINIP
1
C479 C474 C198 C471 C478 C205
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP
C204
2
SC4D7U10V5ZY-3GP
IDSEL:AD21
2
NEW1
INTA-->:INT_PIRQE# MINI1 26
125 9 PCIE_TXP0 25
GNT:PCI_GNT1# NP1 9 PCIE_TXN0 24 MH2
4 1 2 23 4
REQ:PCI_REQ1# 9 PCIE_RXP0 22
3 4 9 PCIE_RXN0 21
5 6 20
7 8 R425 1 0R2J-2-GP
NEW 20R2J-2-GP 19
PIN 3-16 : LAN RESERVE 3 CLK_PCIE_NEW R426 1
80211_ACTIVE
9 10 3 CLK_PCIE_NEW# NEW CPPE#
2 18
27 80211_ACTIVE 11 12 17 NEW
27,33 RF_ON/OFF# 13 14 3 CLKREQ_NEW# 16
15 16 3D3V_NEW_S0 15
1
INT_PIRQH# 17 18 14
5V_S0
DY R370
10KR2J-3-GP 3D3V_S0 19 20 INT_PIRQH# 15,28 3D3V_NEW_LAN_S5
TPS2231_PERST# 13
21 22 12
23 24 18 PCIE_WAKE# R431 1 DY 2 CONN_WAKE# 11
25 26 0R2J-2-GP 10
1D5V_NEW_S0
2
15,19 SB_CLK33_MINI PCIRST1# 15,23,25,28

1
27 28 RN62 9
3D3V_S0
DY 15 PCI_REQ#1 29 30 PCI_GNT#1 15 3,11,18,27 SMB_DATA 1 4 8
31 32 3,11,18,27 SMB_CLK 2 DY 3 7
R367 PCI_AD31 33 34 SRN33J-5-GP-U CONN_TP1 6
PCLKMINI 100R2J-2-GP PCI_AD29 35 36 SB modify TP67 CONN_TP2 5
2
37 38 PCI_AD30 TP68 CPUTSB# 4

1
PCI_AD27 39 40 R438 1 NEW 2 0R2J-2-GP 3 MH1

C473 PCI_AD25 PCI_AD28 18 USB_PP3 R441 1 NEW 2 0R2J-2-GP
DY SC10P50V2JN-4GP
41 42
PCI_AD26 18 USB_PN3
2
43 44
2
PCI_C/BE#3 45 46 PCI_AD24 MINIP 1

15,23,25,28 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD22
49 50 R373 100R2J-2-GP JAE-CON26-4-GP
PCI_AD21 51 52 PCI_AD22 SKT1 20.F0790.026
PCI_AD19 53 54 PCI_AD20 3 NP1
55 56 PCI_PAR 15,23,25,28 1
3 PCI_AD17 57 58 PCI_AD18 NEW 3
PCI_C/BE#2 59 60 PCI_AD16 2
15,23,25,28 PCI_C/BE#2
15,23,25,28 PCI_IRDY# 61 62
63 64 PCI_FRAME# 15,23,25,28 4
R368 1 DY 2 10KR2J-3-GP MINI_CLKRUN# 65 66 PCI_TRDY# 15,23,25,28
15,23,25,28 PCI_SERR# 67 68 PCI_STOP# 15,23,25,28 CARDBUS-SKT75-GP
69 70
15,23,25,28 PCI_PERR# 71 72 PCI_DEVSEL# 15,23,25,28 21.H0115.001
PCI_C/BE#1 73 74
15,23,25,28 PCI_C/BE#1
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
1 2 PCI_AD12 79 80 PCI_AD11
15,23,25,28,33,35 PM_CLKRUN# R369 MINIP 0R2J-2-GP PCI_AD10 81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0
PCI_C/BE#0 15,23,25,28
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91
93
92
94
PCI_AD4
PCI_AD2 RN29
NEWCARD Connector
PCI_AD3 95 96 PCI_AD0 CPPE# 1 DY 4 3D3V_S5
5V_S0 97 98 CPUTSB# 2 3 Reserve the symbol
PCI_AD1 99 100
101 102
INT_SERIRQ 15,25,28,33,35
SRN100KJ-6-GP for bottom side
103 104 connector
105 106
IDSEL:AD22 107
109
108
110
INTA-->:INT_PIRQG# 111 112
TPS2231_PERST#
113 114 NEW
2
INTB-->:INT_PIRQG# 115 116 33,37 S5_EN 1 2
0R2J-2-GP
PLT_RST1# 15,21,27,33,35,36
2
117 118 R185

GNT:PCI_GNT#1 119 120
20
10
121 122
REQ:PCI_REQ#1
8
9
6
123 124 U36
NP2
SHDN#
PERST#
CPUSB#
CPPE#
SYSRST#
126
PCISLT124-5-GP
62.10043.221 18,20,33,37,43 PM_SLP_S3# 1 STBY# 3.3VIN 2 3D3V_S0

18 RCLKEN 3.3VOUT 3 3D3V_NEW_S0
2nd source: 62.10032.061 19 OC# NEW 1.5VIN 12 1D5V_NEW_MINI_S0
21 THERMAL_PAD 1.5VOUT 11 1D5V_NEW_S0
AUXIN 17 3D3V_S5
AUXOUT 15 3D3V_NEW_LAN_S5
7 GND
NC#16
NC#14
NC#13
NC#5
NC#4
TPS2231RGP-GP
16
14
13
5
4
74.02231.073
3D3V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5

1 <Variant Name> 1
DY NEW NEW NEW NEW NEW Wistron Corporation

1
1
C472 C268 C538 C539 C259 C543 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC1U6D3V2ZY-GP
SCD1U16V2ZY-2GP
SC1U6D3V2ZY-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP Taipei Hsien 221, Taiwan, R.O.C.
2
2
Title
MINI-PCI/NEW Card
Place them Near to Chip Place them Near to Connector Size Document Number Rev
A3
Garda5 SB
A B C D E
A B C D E
3D3V_AUX_S5 KCOL[1..16] 34 5V_S0

KROW[1..8] 34 3D3V_AUX_S5
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP KBC_XO 1 2 C36
3D3V_AUX_S5 SC22P50V2JN-4GP
1
1
L20 5V_S0
1
C387 C43 C382 C379 C370 C375 1 2 3D3V_KBC_AUX_S5 X1
2
1
BLM11P600S 3 4RESO-32D768KHZ-GP
2
3
4
BATA_SDA
KBC_SDA2
SCD1U16V2ZY-2GP
BATA_SCL
KBC_SCL2
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
68.00082.011 82.10026.021 RN43 RN41
2
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SRN10KJ-5-GP SRN10KJ-5-GP
1
C388 KBC_XI 1 2 C40
C386 SC18P50V2JN-1-GP U48 2N7002DW-7F-GP
3
4
4 4
2
1
123
136
157
166
161
153
154
163
164
169
170
160
158
SCD1U16V2ZY-2GP KBC_SCL2
16
34
45
95
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
71
72
73
74
77
78
79
80
20 SMBC_G792 4 3
U17 SMBC_G792
KBC_SCL2 5 2 SMBD_G792
VCCA
XCLKI
VCCBAT
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
SCL1
SDA1
SCL2
SDA2
XCLKO
VCC
VCC
VCC
VCC
VCC
VCC
VCC
KBC_SDA2
KBC_SDA2 6 1 SMBD_G792 20
15,35,36 LPC_LAD[0..3]
LPC_LAD0 15 155
LAD0 GPIO29 KBC_MATRIX1# 34
KB Matrix
LPC_LAD1 14 149 3D3V_AUX_S5
LPC_LAD2 LAD1 GPIO28 KBC_MATRIX0# 34
13 LAD2 GPIO27 148 CCD_ON 13
LPC_LAD3 10 LAD3 LPC GPIO26 119 BT_BTN# 13
2
118 3D3V_AUX_S5
GPIO25 R36
15,19,35,36 LPC_LFRAME# 9 LFRAME# GPIO24 109 AD_OFF 45
18 108 A20 100KR2J-1-GP
15,19 SB_CLK33_KBC LCLK GPIO23
1
7 107 E51TXD TP17 TPAD28 TP19 TPAD28 non 1394
15,25,28,32,35 INT_SERIRQ SERIRQ GPIO22 E51RXD TP16 R481
106
1
GPIO21 E51CS# TP15 10KR2J-3-GP
GPIO20 105
KBCBIOS_RD# 150 86
36 KBCBIOS_RD# KBCBIOS_WE# RD# GPIO19 STDBY_LED# 13
151 85 GBUS_GRST# 28
2
36 KBCBIOS_WE# KBCBIOS_CS# WR# GPIO18 RICOH_DETECT
36 KBCBIOS_CS# 173 MEMCS# GPIO17 75 INTERNET# 27
152 IOCS# GPIO16 70 MAIL# 27
1
TP11 69 PM_SLP_S5# 18,42,43 SB Modify
36 KBC_D[0..7] GPIO15
KBC_D0 138 63 CHG_4S1P TP10 R482
KBC_D1 D0 GPIO14 10KR2J-3-GP
139 D1 GPIO13 62 1 2 PM_SUS_STAT# 6,18,35
KBC_D2 140 D2 GPIO12 55 R30 DY 0R2J-2-GP TP9 1394 Detect Pin 1394
KBC_D3 141 54 CAP_LED# 13 H:non 1394
2
D3 GPIO11
KBC_D4 144 D4 GPIO10 48 PWRLED# 13 L:has 1394
KBC_D5 145 22 RICOH_DETECT TP6
3 KBC_D6 D5 GPIO09 3
36 A[0..19] 146 D6 GPIO08 21 AMP_MUTE_KBC 31
KBC_D7 147 20 PROGRAM# 27
D7 GPIO07
GPIO06 12
X-bus
3D3V_AUX_S5 124 11
36 A0 A0 GPIO05
36
36
A1
A2
125
126
A1
A2
ROM KB3910 GPIO04
GPIO03
8
6 KBCRST#
WIRELESS_BTN# 13
1
RN2
4 KBRCIN# 18
AD_OFF
1
36 A3 127 A3 GPIO02 5 2 3 KA20GATE 18
2
R33 128 4 EBUTTON# 27
36 A4 A4 GPIO01 R37
131 3 BATA_IN# 44,45 SRN1KJ-7-GP
36 A5 A5 GPIO00
DUMMY-R2
36 A6 132 A6 1KR2J-1-GP
36 A7 133 A7 GPIO0F 41
R29
DY
143 28 1 2 ECSMI#_KBC 18
2
1
A1 36 A8 A8 GPIO0E 1KR2J-1-GP
36 A9 142 A9 GPIO0D 27 RF_ON/OFF# 27,32
135 25 3D3V_S5
36 A10 A10 GPIO0C PM_CLKRUN# 15,23,25,28,32,35
1
36 A11 134 A11 GPIO0B 24 BLON_OUT 13

R32 130 23 NUM_LED# 13
10KR2J-3-GP 36 A12 A12 GPIO0A
36 A13 129 A13 SA Rework
36 A14 121 A14 GPIO1F 98 BLUETOOTH_EN 22
1
120 97
K
2
36 A15 A15 GPIO1E DC_BATFULL# 13 R294

36 A16 113 A16 GPIO1D 94 BT_LED# 13
112 93 D23 100KR2J-1-GP
36 A17 A17 GPIO1C WLAN_TEST_LED 27
104 92 CH751H-40PT-1GP DY
36 A18 A18 GPIO1B EMAIL_LED# 27
103 91
2
36 A19 A19 GPIO1A CHRGER_LED# 13
A
168 VCC3VSB
5V_S0 GPIOI2D 3D3V_AUX_S5
34 TDATA 117 PSDAT3 GPIO2F 175 CRT_IN# 14
1
SRN47J-4-GP C381
34 TCLK 116 PSCLK3 GPIO2E 171 AMP_SHUTDOWN_KBC 31
4
3
5
6
115
114
PSDAT2 PS/2 GPIO2C 165
162
PLT_RST1#
BL_ON
15,21,27,32,35,36
8
SC1U6D3V2ZY-GP
2
2 PSCLK2 GPIO2B 2
2 7 111 PSDAT1 GPIO2A 156 PSW_CLR# 34
1 8 110 PSCLK1
RN42
45 BATA_SCL 2 3
RN3 1 4
45 BATA_SDA
BATGND
ECRST#
3D3V_AUX_S5
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7
ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
AGND
SRN8K2J-3-GP
GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
1 2 A5 1 2 EXT_FWH# 36
R308 100KR2J-1-GP 71.03910.C0G KB3910SF-2-GP 3D3V_S5
43
40
39
38
37
36
33
32
2
26
29
30
44
76
172
176
99
100
101
102
1
42
47
174
81
82
83
84
87
88
89
90
19
31
96
159
17
35
46
122
137
167
R307
1KR2J-1-GP 3D3V_AUX_S5
PSW_CLR# 1 2
R478100KR2J-1-GP
RSMRST#_KBC
BL_ON 1 2
K
1
R47910KR2J-3-GP
30 KBC_BEEP TP4 TP8 TP5 TP13
TP12
EC_RST#
R289
TP14
1 R26 2 10KR2J-3-GP D22
3S
18 ECSWI#
1 R28 2 ECSCI#_KBC 18 CH751H-40PT-1GP SB Modify
3S2P_I
S5_EN 1KR2J-1-GP 1KR2J-1-GP 3D3V_AUX_S5
A
2
1
RN44
SC1U10V2KX-GP
R27 TP7 KBC_MATRIX1# 1 4
18 PM_PWRBTN#
1
10KR2J-3-GP C591 C366 KBC_MATRIX0# 2 DY 3
E
18 RSMRST#_KBC
SC10U6D3V5MX-3GP
32,37 S5_EN TP18 B 2 R285 1 PURE_HW_SHUTDOWN# 20,37 SRN10KJ-5-GP
2
2
44 CHG_V_PWM 10KR2J-3-GP
13 BRIGHTNESS DY Q21
C
44 CHG_I_PWM CH3906PT-GP
1 18,20,32,37,43 PM_SLP_S3# <Variant Name> 1
27 EC_PWRBTN# SB Modify
44 AC_IN#
34 LID_CLOSE# Wistron Corporation
44 CHG_4D35V# Taipei Hsien 221, Taiwan, R.O.C.
PLANARID2 34
PLANARID1 34
PLANARID0 34 Title
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable
A4 for DMRP==>High=Disable,Low=Enable KBC KB3910
A5 for EMWB==>High=Enable,Low=Disable 22 USB_EN#
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) A3
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended) Garda-5 SB
A B C D E
Internal KeyBoard Connector
33 KROW[1..8]
G70
1 2 33 KCOL[1..16]
GAP-OPEN
KB1
SW6 ON 26
PSW_CLR# NC#26 KROW1
33 PSW_CLR# 1 5 C01 1
2 6 2 KROW2
C02 KROW3
33 KBC_MATRIX0# 3 7 C03 3
4 DY 8 4 KCOL1
33 KBC_MATRIX1# R01 KCOL2
R02 5
SW-DIP-4-2-U2-GP 6 KCOL3
R03 KROW4
C04 7
8 KCOL4
R04 KCOL5
R05 9
10 KCOL6
R06 KCOL7
R07 11
12 KCOL8
R08
Keyboard matrix ( from vendor ) R09 13 KCOL9
14 KROW5
C05 KCOL10
R10 15
US Eur Jap Ohter C06 16 KROW6
17 KROW7
C07 KCOL11
R11 18
19 KCOL12
R12
MATRIXID0# 1 0 1 0 C08 20 KROW8
21 KCOL13
R13 KCOL14
R14 22
MATRIXID1# 1 1 0 0 R15 23 KCOL15
24 KCOL16
R16
NC#25 25
NC#27 27
ACES-CON25-GP
20.K0197.025
Low Active
COVER SWITCH PSW_CLR# 1 - 5 ON
2nd source: 20.K0198.025
NC 2 - 6 ON
3D3V_AUX_S5
KBC_MATRIX1 3 - 7 ON
1 25
2
KBC_MATRIX2 4 - 8 ON
K/B
R7
100KR2J-1-GP
CVR1
1
NP2 NP1
4 2 1 2
3 1 R6 100R2F-L1-GP-U LID_CLOSE# 33 5V_S0 5V_S0
TOUCH PAD
1
C7
SC1KP16V2KX-GP
2
1
SW-TE-ML-V-T-GP
1
2
EC70 EC69
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
62.40010.161 RN47
2
SRN10KJ-5-GP
TPAD1
4
3
14
12
RN49 11
33 TDATA 1 4 TP_DATA 10
33 TCLK 2 3 TP_CLK 9
SRN33J-5-GP-U 8
7
SCROLL KEY TP_SCROLL_RIGHT
TP_SCROLL_UP
6
5
1
1
EC62 EC63 TP_SCROLL_DOWN 4
SC100P50V2JN-3GP
SC100P50V2JN-3GP
TP_LEFT 3
TP_RIGHT 2
2
2
TP_SCROLL_UP
1 SCRL1 2 TP_SCROLL_LEFT 1
DY DY 13
5
ACES-CON12-GP
3 4 20.K0174.012
1
1
8
7
6
5
SW-TACT-59-GP-U1 EC66 EC65 2nd source: 20.K0185.012
SC100P50V2JN-3GP
SC100P50V2JN-3GP
ERC3
62.40009.431 SRC100P50V-2-GP
2
2
TP_LEFT TP_SCROLL_LEFT TP_SCROLL_RIGHT TP_RIGHT 3D3V_AUX_S5
DY DY DY
1
2
3
4
1 LEFT1 2 1 SCRL2 2 1 SCRL3 2 1 RIGHT1 2
5 5 5 5
1 12
2
T/P
2
2
3 4
SW-TACT-59-GP-U1
3 4
SW-TACT-59-GP-U1
3 4
SW-TACT-59-GP-U1
3 4
SW-TACT-59-GP-U1
R300
100KR2J-1-GP R298 R297
Planar
DY
DY 100KR2J-1-GP 100KR2J-1-GP
ID(2,1,0)
62.40009.431 62.40009.431 62.40009.431 62.40009.431 DY
1
TP_SCROLL_DOWN
SA: 0,0,0 <Variant Name>
1
1 SCRL4 2 33 PLANARID2
PLANARID2 1
5
33 PLANARID1
PLANARID1
PLANARID0
SB: 0,0,1
33 PLANARID0
SC: 0,1,0 Wistron Corporation
2
3 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
100KR2J-1-GP SD: 0,1,1

SW-TACT-59-GP-U1 R301 R299 R296 Taipei Hsien 221, Taiwan, R.O.C.
100KR2J-1-GP 100KR2J-1-GP
62.40009.431 Title
KEYBOARD/TOUCHPAD
1

A3
Garda-5 SA
5 4 3 2 1
D D
LPC_LAD0
LPC_LAD1
LPC_LAD[0..3] 15,33,36
LPC_LAD2
LPC_LAD3
LPC_LDRQ0# 15
PLT_RST1# 15,21,27,32,33,36
INT_SERIRQ 15,25,28,32,33
LPC_LFRAME# 15,19,33,36
3D3V_S0
CLK14_SIO 3
SCD1U16V2ZY-2GP
C190 SB_CLK33_SIO 15,19
SIO C452 SIO C158 SIO
1
SC1U6D3V2ZY-GP
SCD1U16V2ZY-2GP
C C
2
R348 R352
24
35
32
36
38
40
16
27
28
30
43
25
8
U54 DUMMY-R2
LCLK
LAD0
LAD1
LAD2
LAD3
LDRQ#/XOR_OUT
LRESET#
SERIRQ
LFRAME#
VDD
VDD
VDD
CLKIN
DUMMY-R2
2
C445
1 42 C458
CTS1# NC#42 PCLK_SIO_RC
44 DCD1# NC#33 33 2 1
45 37 CLK14_SIO_RC 2 1
DSR1# NC#37
3 RI1# NC#39 39
VCORF
BADRR_STRAP 2
46
10
SIN1
VCORF SIO PC87381 NC#41
NC#4
41
4
DUMMY-C2
DUMMY-C2
IRRX2_IRSL0/GPIO17
DTR1#_BOUT1/BADDR NC#18 18
RESERVED/GPO24
47 26
CLKRUN#/GPIO22
RTS1#/TRIS# NC#26
1 48 29
GPIO21/LPCPD#
SOUT1/TEST# NC#29
1
C463 SIO R355 31

SCD1U16V2ZY-2GP 10KR2J-3-GP NC#31
SIO
2
GPIO00
GPIO01
GPIO02
GPIO03
GPIO04
GPIO20
GPIO23
2
IRRX1
SIO
IRTX
VSS
VSS
VSS
PC87381-VBH-GP
71.87381.A0G
11
12
13
14
15
17
21
19
22
20
5
7
6
9
23
34
Connecting a 10 K external pull-down resistor
makes the base address sample low, setting the
Index-Data pair at 2Eh-2Fh.
B B
IRRX1
IRSL0
IRTX
3D3V_S0 PM_CLKRUN# 15,23,25,28,32,33
1 SIO 2 LPCPD# 1 2 PM_SUS_STAT# 6,18,33

R350 10KR2J-3-GP R351 DUMMY-R2
VISHAY FIR/CIR Module Layout Guide:

(1) FIR_3D3V : 30 mils,
(2) C583, C581 close
Place C581 to U32
,C583 near Pin1
3D3V_S0 U41
and Pin6
1 VCC2/IRED_ANODE
SC10U10V5ZY-1GP
2
SCD1U16V2ZY-2GP
IRED_CATHODE
1
C304 C305 IRTX 3

C306 IRRX1 TXD
A SIO SIO SIO SCD1U16V2ZY-2GP IRSL0
4 RXD <Variant Name> A
5
2
SD
6 VCC1 SIO
7
8
MODE
GND
Wistron Corporation
G49 FIR-TFDU6102-GP 56.15001.051
1 2 Title
IR_GND
GAP-CLOSE SIO 87381 / FIR
IR_GND Size Document Number Rev
A3
Garda-5 SA
5 4 3 2 1
A B C D E
4
GOLDEN FINGER FOR DEBUG BOARD 4
1D05V_S0 3D3V_S0 LPC_LAD[0..3] 15,33,35

5V_S0 5V_S0
U37
A1 A1 B1 B1
4
3
PLT_RST1# A2 B2 PLT_RST1#
RN63 15,21,27,32,33,35 PLT_RST1# LPC_LFRAME# A2 B2 LPC_LFRAME#
15,19,33,35 LPC_LFRAME# A3 A3 B3 B3
SRN10KJ-5-GP A4 A4 B4 B4
SB_CLK33_FWH A5 B5 SB_CLK33_FWH
15,19 SB_CLK33_FWH A5 B5
A6 A6 B6 B6
1
FWH_INIT# A7 B7 FWH_INIT#
1
2
R428 A7 B7
A8 A8 B8 B8
100R2J-2-GP LPC_LAD3 LPC_LAD3
DY LPC_LAD2
A9 A9 B9 B9
LPC_LAD2
A10 B10
B
LPC_LAD1 A10 B10 LPC_LAD1
A11 B11
2
LPC_LAD0 A11 B11 LPC_LAD0
A12 B12
PCLKFWH
FWH_INIT# EXT_FWH# A12 B12 EXT_FWH#
15 SB_FWH_INIT# E C 33 EXT_FWH# A13 A13 B13 B13
1
Q28 A14 A14 B14 B14
DY C533 3D3V_S0 A15 B15
CH3904PT-GP SC10P50V2JN-4GP A15 B15 3D3V_S0
2
FOX-GF30
ZZ.GF030.XXX
3 3
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
3D3V_AUX_S5 All may be left floated
FPET7 Elec. P3-46
U49
37 45 A0
VCC Q15/A-1
Q14 43
A19 16 41
A18 A18 Q13
17 A17 Q12 39
A17 48 36
A16 A16 Q11
1 A15 Q10 34
A15 2 32
33 A[0..19] A14 A14 Q9
3 A13 Q8 30 KBC_D[0..7] 33
A13 4 44 KBC_D7
A12 A12 Q7 KBC_D6
5 A11 Q6 42
A11 6 40 KBC_D5
A10 A10 Q5 KBC_D4
7 38
A9 8
A9 Q4
35 KBC_D3 TOP VIEW
A8 A8 Q3 KBC_D2
18 A7 Q2 33
A7 19 31 KBC_D1
A6 A6 Q1 KBC_D0
20 A5 Q0 29
A5 21
A4 A4
A3
22 A3 A15 (B1)
23 A2 RY/BY# 15
A2 24 A14 (B2)
2 A1 A1 2
25 A0 NC#14 14
NC#13 13
....
10
....
NC#10
33 KBCBIOS_CS# 26 CE# NC#9 9
33 KBCBIOS_RD# 28 OE#
33 KBCBIOS_WE# 11 WE# A2 (B14)
47 BYTE# GND 46
12 RESET# GND 27 A1 (B15)
MX29LV800CBTC-GP
72.29800.0F9
(BOTTOM VIEW)
1 <Variant Name> 1
Wistron Corporation
Title
BIOS ROM
A3
Garda-5 SA
A B C D E
1D05V_S0
1
3D3V_S5
3D3V_S5 R310
U28C 56R2J-4-GP
14
U28D
14
PM_SLP_S3# 13 3D3V_AUX_S5
2
11 VTT_VRM_PG 10 PM_THRMTRIP-I# 4
VGATE_PWRGD 12 8 NB_PWRGD 6,8
E
18,39 VGATE_PWRGD
1
9 R314
TSLCX08MTCX-GP R323 1 2 B CHT2222APT-GP
7
TSLCX08MTCX-GP 100KR2J-1-GP 4,15 H_PWRGD 10KR2J-3-GP Q6
DY
1
73.07408.02B
C
1
C390
2
R365 SCD1U10V2KX-4GP
20 G792_PWROK
2
100KR2J-1-GP SHUTDOWN_S5 1 2S5_EN_3
R322 1KR2J-1-GP
C
D7
2
Q7 B A K PURE_HW_SHUTDOWN# 20,33
1D2V_S0 should not exceed 1D8V_S0 by more than 0.6V. CHT2222APT-GP
E
1D8V_S5 CH751H-40PT-1GP
3D3V_S0 S5_EN_2 1 2 S5_EN 32,33
1
R320 10KR2J-3-GP
1
R13
1
5V_S0 C398
1D8V_S0 470KR2F-GP R9 SCD1U10V2KX-4GP
2
100KR2J-1-GP
B 2
U1D
14
13
2
R10
1 2 E C 12 11 1D2V_EN 42 T(soft)=1.736ms
1KR2J-1-GP TPS51120_EN1_5 TPS51120_EN1_5 41
Q2
1
CHT2222APT-GP D
SCD1U10V2KX-4GP
C8 TSAHCT125PW-GP C348
7
SC4700P50V2KX-1GP
3
2
2
3D3V_S5 3D3V_S5
SHUTDOWN_S5 1 Q19
G 2N7002PT-U
1
U27C U27B 84.27002.F31
14
14
2
270KR2F-GP R267
1MR2J-1-GP S
NB_PWRGD 5 6 NB_PWRGD_N 1 R366 2 3 4 SB_PWRGD 18
2
TSLCX14MTCX-1-GP
7
TSLCX14MTCX-1-GP
1
3D3V_S5 D T(soft)=1.736ms
C469 3D3V_S5
3
SC1U10V2KX-GP TPS51120_EN2_3D3 TPS51120_EN2_3D3 41
2
U28A U27A Q20

14
14
1
2N7002PT-U C353
1 1 84.27002.F31 SC4700P50V2KX-1GP
SB_PWRGD IS 180MS 3 1 R364 2 1 2 SB_PWRGD# 8 G
2
NB_PWRGD 2 330R2J-3-GP
AFTER NB_PWRGD
2
1
TSLCX08MTCX-GP C470 TSLCX14MTCX-1-GP S
7
7
DUMMY-C3
Aux Power
Run Power 5V_S0
U11
5V_S5
SA Rework R286 169KR2F-1-GP

1 S D 8 1 2
C33 2 S D 7 3D3V_AUX_S5
1 S D DCBATOUT
DY 2 3
4 G D
6
5 C373 1 SCD01U16V2KX-3GP
DCBATOUT Q5
TP0610K-T1-GP
SCD1U25V3KX-GP DY2
AO4422-1-GP U47
SCD1U16V2ZY-2GP
84.04422.B37 100mA
1
Z_12V RUN_PWR_CTLR C378 C380
S
1 2 2 3 1 OUTPUT INPUT 8
D
R25 10KR2J-3-GP 2 7
K
SENSE FEEDBACK
1
1
C34 R22 C367
SC2D2U6D3V5KX-1GP
3 6
2
84.00610.C31 R23 D6 SHUTDOWN VO TAP
4
1
GND
MMGZ5242BPT-GP 3D3V_S0
SCD1U25V3KX-GP
200KR3F-GP
47KR2J-2-GP 3D3V_S5 5 SC1U50V5ZY-1-GP

2
2
ERROR# OUTPUT
1
G
U12
2 1 1 S D 8
A
2
R24 330KR2F-L-GP 2 S D 7 74.02951.F31 R284

LP2951CDR2G-GP
1
D 3 S D 6 100KR2F-L1-GP
R21 4 G D 5
2
3
100KR2J-1-GP
AO4422-1-GP
Q4
2
1 2N7002PT-U
1D8V_S0 1D8V_S3 <Variant Name>
G 84.27002.F31
D U55
2
1 S D 8
Wistron Corporation
3
SA Modify S 2 S D 7
Q3 3 S D 6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2N7002PT-U 4 G D 5 Taipei Hsien 221, Taiwan, R.O.C.
1 84.27002.F31
18,20,32,33,43 PM_SLP_S3# IRF7805ZPBF-GP Title
G
84.07805.A37
RUN and AUX POWER
2
S Size Document Number Rev

A3
Garda-5 SA
A B C D E
TPS51124
CPU_CORE
1D8V/1D05V
Intersil ISL6262 1D8V_S5
Input Power Output Power
5V_S5 3D3V_S5
4 VID Setting Output Signal VCC INPUT OUT 1D8V_S5 4
H_VID0 1D8V_S0 (7A)
VID0(I / 1.05V) 6262_PWRGOOD 1D8V (O)
H_VID1 PGOOD(OD / 3.3V)
VID1(I / 1.05V) DCBATOUT_TPS51124 APL5308-18DC-GP
H_VID2 CLK_EN# VIN
VID2(I / 1.05V) CLK_EN#(O) 1D05V_S0 (7A)
H_VID3 1D05V(O)
VID3(I / 1.05V)
H_VID4
VID4(I / 1.05V) Input Signal 1D5V_S0
H_VID5
VID5(I / 1.05V) Output Power TPS51124_EN1
H_VID6 EN1 3D3V_S5 1D5V_CPU_S0
VID6(I / 1.05V) VCC_CORE_S0(Imax=48A) INPUT OUT
VCC_CORE_PWR(O) TPS51124_EN2
Input Signal EN2
PSI#
PSI# (I / 3.3V) APL5312
CPUCORE_ON Output Signal
PGD_IN (I / 3.3V) CPUCORE_ON
PM_DPRSLPVR PGOOD1
DPRSLPVR (I / 3.3V)
H_DPRSTP# CPUCORE_ON
DPRSTP# (I / 3.3V) PGOOD2 1D5V_S0
1D5V_NEW
3D3V_S5 _MINI_S0
3
Voltage Sense INPUT OUT 3
VCC_SENSE
VSEN(I / Vcore)
VSS_SENSE APL5332
RTN(I / Vcore)
CHARGER MAX8725
Input Power 1D05V_S0
DCBATOUT_6262 Input Signal Output Signal
VCC(I) 1D2V_S3 1D05V_S0
CHGON#/OFF BT+SENSE INPUT OUT
ICTL BATT
5V_S0
VCC(I)
BT_TH AC_IN APL5912-KAC-GP
PKPRES ACOK
3D3V_S0
VCC(I)
Input Power Output Power DDR_VREF_S0

AD+ BT+ 5V_S5 DDR_VREF_S0
ACIN VOUT (O) INPUT OUT
2 TPS51120 2
5V/3D3V DCBATOUT
VOUT (O) TPS51100DGQR-GP
Input Signal Output Signal
PGOOD1(OD / 5V) CPUCORE_ON
3D3V_AUX_S5
PGOOD2(OD / 5V) CPUCORE_ON DCBATOUT 3D3V_AUX_S5
INPUT OUT
TPS51120_EN1_5
EN1
Output Power LP2951ACM
TPS51120_EN2_3D3
EN2 Adapter
5V_DC_S5 (6A)
5V(O)
Input Signal Output Signal
AD_OFF AD_IN
(I) (O)
3D3V_DC_S5 (5A)
3D3V(O)
Input Power
1 <Variant Name> 1
Input Power Output Power
DCBATOUT_TPS51120 AD_JK AD+ Wistron Corporation
VIN VCC(I) VCC(O) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5V_AUX_S5 Taipei Hsien 221, Taiwan, R.O.C.
VCC(I) Title
Power Block Diagram
A3
Garda-5 SA
A B C D E
5 4 3 2 1
DCBATOUT 3D3V_S0
5V_S5 5V_S0
1
PGOOD
1
R321
Power good open-drain output.
1
R324 R61 10R2J-2-GP
0R2J-2-GP
DY 10R2J-2-GP R40 Will be pulled up externally by
1K91R3F-GP
a 680. resistor to VCCP or 1.9k. to 3.3V.
2
2
2
1
6262_AGND
C61
1 R42 2 0R0402-PAD VGATE_PWRGD 18,37
D SCD01U50V3KX-4GP D
2
1
C64
22
20
48
1
SC1U10V3KX-3GP
3V3
VCC
VIN
PGOOD
21 35 6262_UGATE1 40
GND UGATE1
49 GND_T BOOT1 36 6262_BOOT1 1 2
1
R64 0R3-0-U-GP
C70
6262_AGND SCD22U25V3ZY-GP
2
34 6262_PHASE1 40
PHASE1
4 PSI# 1 R41 2 0R0402-PAD 6262_PSI# 2 PSI#
32 6262_LGATE1 40
CPUCORE_ON LGATE1
1 R318 2 0R0402-PAD 6262_PGD_IN 3 PGD_IN
33 6262_VSUM 1 R337 2
6262_RBIAS 4 PGND1 3K65R3F-GP
6262_AGND 1 2 RBIAS
R311 147KR2F-GP 24 6262_ISEN1 1 R338 2
ISEN1 6262_ISENP1 40
2
5 10KR2F-2-GP
4 CPU_PROCHOT# VR_TT#
1
5V_S5 C409 R335
R340 1 2 4K02R3F-GP R341 1 2NTC-470K-1-GP 6262_NTC 0R2J-2-GP
C50
6 NTC DY DY
1 2 0R2J-2-GP 5V_S0 SCD22U10V3KX-2GP
2
6262_AGND 1 2 C48 6262_AGND 1 2 6262_SOFT7 R334 1 R333 2 0R0402-PAD 1 2 6262_ISENN1 40
1
SCD01U16V2KX-3GP SCD015U25V3KX-GP SOFT R339 1R2J-GP
C C
470K /0402 size PVCC 31 1 2
Place close to phase 1 chocke H_VID0
R65
1 2
0R0402-PAD
6262_VID0 37 VID0 C69 SC4D7U6D3V3KX-GP
H_VID1 6262_VID1 6262_UGATE2 40
If NTC=330Kohm, R10=8.66K R63
1 2
0R0402-PAD
38 VID1 UGATE2 27
H_VID2 1 2 6262_VID2 39 26 6262_BOOT2 1 2

R62 0R0402-PAD VID2 BOOT2 R67 0R3-0-U-GP
5 H_VID[0..6]
1
H_VID3 1 2 6262_VID3 40
R59 0R0402-PAD VID3 C71
H_VID4 1 2 6262_VID4 41 SCD22U25V3ZY-GP
2
R58 0R0402-PAD VID4 6262_PHASE2 40
PHASE2 28
H_VID5 1 2 6262_VID5 42 3K65R3F-GP
VID5 6262_LGATE2 40 R74
R53 0R0402-PAD 30
H_VID6 6262_VID6 LGATE2 6262_VSUM 1
1 2 43 VID6 2
R52 0R0402-PAD 29
6262_CORE_ON PGND2
41,42,43 CPUCORE_ON 1 2 44 VR_ON
R49 0R0402-PAD 23 6262_ISEN2 1 2
ISEN2 10KR2F-2-GP 6262_ISENP2 40
1 2 6262_DPRSLP 45 R73
4,15 PM_DPRSLPVR DPRSLPVR
2
R48 0R0402-PAD
1
1 2 6262_DPRSTP# 46 C68 R66
4 H_DPRSLP# DPRSTP# 0R2J-2-GP
R46 0R0402-PAD DY
1 2 6262_CLKEN# 47 SCD22U10V3KX-2GP
2
3 CLK_EN# R45 0R0402-PAD CLK_EN# C49 1 2 SC1000P50V3JN-GP 1 2 6262_ISENN2 40
1
NC 25 6262_AGND
R72 1R2J-GP
R313 1 21K82R2F-1-GP
OCSET 8 6262_OCSET R304 1 2 OCP>=50A
1 2 1 2 6262_VDIFF 13 10KR2F-2-GP
R312 1K4R2F-1-GP C51 SC470P50V2KX-3GP VDIFF
B 6262_VSUM B
VSUM 19
1
SCD068U16V3KX-GP
1 DY 2 6262_FB212 R50
2KR2F-3-GP FB2 2K61R3F-GP
SCD22U10V3KX-2GP
R43
1
1
1
6262_FB 11
1 2
FB C58 C57 R51
1 2 1 2 C45 11KR2F-L-GP
2
R306 61K9R2F-GP SCD033U16V3KX-GP R342
2
NTC-10K-9-GP
1 2C52 6262_COMP10
COMP
ISL6262CRZ-T-GPU
SC220P50V2KX-3GP 1 2
2
SA Modify R305 4K42R2F-GP SA Modify
VO 18 6262_VO
Switching Frequency=300KHz
DROOP
6262_VW 9
1 2 VW
1
Place close to phase 1 chocke
VSEN
C46 SC47P50V3JN-GP
RTN
DFB
1
R44 C399
1KR2F-3-GP SCD22U10V3KX-2GP
PL 74.06262.073 U19
15
14
16
17
2
2
1 2 6262_RTN 6262_DFB
5 VSS_SENSE
1
R319 0R2J-2-GP 6262_AGND

C395
6262_DROOP
SCD01U50V3KX-4GP 1 R47 2
2
1 2 6262_VSEN
5 VCC_SENSE 0R2J-2-GP
R316 2K55R3F-GP G43
1
A PH Load Line 1 2 <Variant Name> A

C396 C392
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2 6262_VO GAP-CLOSE-PWR
2
When test without cpu, 6262_AGND

Wistron Corporation
C55 SC180P-GP
R183 & R184 change to 0 ohms 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
If VCC_SENSE and VSS_SENSE pins have pulled 6262_AGND 6262_AGND Taipei Hsien 221, Taiwan, R.O.C.
resistors to VCC_CORE_S0 Title

==> Remove R183/R184 CPU Vcore Power_1
A3
Garda-5 SA
5 4 3 2 1
5 4 3 2 1
DCBATOUT
SB Modify
D D
C593 C163 C81 C79
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY EC33
SCD1U25V3ZY-1GP
2
5
6
7
8
D
D
D
D
U23
IRF7807ZPBF-GP
Panasonic ETQP4LR36WFC
G
S
S
S
10*11.5*4mm
4
3
2
1
0.34uH / 24A Iomax=44A
VCC_CORE_S0
DCR=1.1mohm
39 6262_UGATE1 L21
OCP>=88A
39 6262_PHASE1 1 2
39 6262_LGATE1 L-D36UH-1-GP TC4 TC9 TC5 TC8
1
C76
AG3-SB DYSCD1U25V3ZY-1GP
2
5
6
7
8
5
6
7
8
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
IRF7831TRPBF-GP
IRF7831TRPBF-GP
D
D
D
D
D
D
D
D
C G75 G74 C
U21 U22 GAP-CLOSE-PWR GAP-CLOSE-PWR
Id=30A
1
Qg=8~11nC, Rdson=14.4~18mohm
G
S
S
S
G
S
S
S
4
3
2
1
4
3
2
1
6262_ISENN1 39
6262_ISENP1 39
KEMET
330uF / 3V / V size
ESR=9mohm / Iripple=3.7A
DCBATOUT
C80 C186 C173

1
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY C157
5
6
7
8
SCD1U25V3ZY-1GP
2
2
D
D
D
D
U24
IRF7807ZPBF-GP
B B
Panasonic ETQP4LR36WFC
G
S
S
S
10*11.5*4mm
4
3
2
1
0.34uH / 24A
DCR=1.1mohm
39 6262_UGATE2 L22
39 6262_PHASE2 1 2
39 6262_LGATE2 L-D36UH-1-GP TC7 TC6
1
AG3-SB
2
5
6
7
8
5
6
7
8
SE330U2VDM-L-GP
SE330U2VDM-L-GP
IRF7831TRPBF-GP
IRF7831TRPBF-GP
D
D
D
D
D
D
D
D
Id=46A U25 U26 G76 G77

GAP-CLOSE-PWR GAP-CLOSE-PWR
1
1
Qg=15~21nC, Rdson=6.9~8.6mohm
G
S
S
S
G
S
S
S
4
3
2
1
4
3
2
1
A <Variant Name> A
39 6262_ISENP2 Wistron Corporation

39 6262_ISENN2 Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU Vcore Power_2/2
A3
Garda-5 SB
5 4 3 2 1
A B C D E
DCBATOUT G10
1 2
GAP-CLOSE-PWR
C15 C13 G11
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
5
6
7
8
EC12
D
D
D
D
SCD1U25V3ZY-1GP GAP-CLOSE-PWR
2
G12
Iomax=11A U6 1 2
4
51120_V5FILT AO4422-1-GP 4
Qg=9.8nC, GAP-CLOSE-PWR
G
S
S
S
Rdson=20~25mohm G13
R265 GS 10*10*4 4D7uH 1 2
4
3
2
1
5V_PWR 5V_PWR 5V_S5
L17 DCR=25mohm, Isat=6A 5V Iomax=6A
51120_VREG5 1 2 51120_DRVH1 GAP-CLOSE-PWR
5D1R3F-GP 51120_LL1 1 2 OCP>12A G14
1
IND-4D7UH-84-GP 1 2
C349
5
6
7
8
SC1U10V3KX-3GP GAP-CLOSE-PWR
D
D
D
D
U7 G15
1
AO4406-1-GP 1 2
1
C347 51120_AGND DCBATOUT C339 R244
TP3 51120_LL2 1 251120_VBST2_1 1 2 51120_VBST2 Iomax=11A SC33P50V2JN-3GP 30KR2F-GP TC1 GAP-CLOSE-PWR
2
TPAD30 R260 0R3-0-U-GP ST220U6D3VDM-15GP G16
DY DY
2
Qg=9.8nC,
G
S
S
S
SCD1U50V3ZY-GP NEC 220uF ,V size 1 2
2
1
Rdson=19.6~24mohm
4
3
2
1
3D3V_AUX_S5 C346 C350 51120_VFB1 ESR=25mohm GAP-CLOSE-PWR
51120_LL1 1 2 51120_VBST1_11 2 51120_VBST1 SCD1U50V3ZY-GP SB Modify Iripple=2.2A G17
1
R259 0R3-0-U-GP 1 2
G2 GAP-OPEN-PWR SCD1U50V3ZY-GP 51120_V5FILT 51120_DRVL1 R243
1 2 51120_VREG5 7K5R3F-GP GAP-CLOSE-PWR
SC10U10V5ZY-1GP 51120_VREG3 51120_COMP2 R239 1
DY
1 2 2 0R0402-PAD
2
1
G3 GAP-OPEN-PWR C351 51120_COMP1 R238 1 2 0R0402-PAD
SC10U10V5ZY-1GP
51120_AGND
2
1
C352 3D3V_S0
19
21
28
13
20
22
7
2
3 U45 3
2
VREG3
VREG5
VBST1
VBST2
V5FILT
COMP2
COMP1
VIN
1
G18
R12 1 2
100KR2J-1-GP
37 TPS51120_EN1_5 1 R251 2 0R0402-PAD51120_EN1 29 EN1 LL2 15 51120_LL2 GAP-CLOSE-PWR
37 TPS51120_EN2_3D3 1 R256 2 0R0402-PAD51120_EN2 12 26 51120_LL1 G19
2
TP2 TPAD28 EN2 LL1
10 EN3 1 2
TP1 TPAD28 9 EN5 51120_PGOOD1 1 R250
PGOOD1 30 2 0R0402-PAD CPUCORE_ON 39,42,43
DCBATOUT GAP-CLOSE-PWR
1 R240 2 0R0402-PAD51120_VFB2 6 VFB2 PGOOD2 11 51120_PGOOD2 1 R11 2 0R0402-PAD G20
51120_V5FILT 1 R237 2 0R0402-PAD51120_VFB1 3 VFB1 3D3V_PWR 1 2 3D3V_S5
25 51120_DRVL1
5V_PWR DRVL1 51120_DRVL2 C21 C22 GAP-CLOSE-PWR
1 VO1 DRVL2 16
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
3D3V_PWR 8 G21
VO2
5
6
7
8
27 51120_DRVH1 EC17 1 2
DRVH1
D
D
D
D
51120_VREF2 4 14 51120_DRVH2 SCD1U25V3ZY-1GP
2
VREF2 DRVH2 U2 GAP-CLOSE-PWR
SKIPSEL
TONSEL
G22
PGND1
PGND2
1
Iomax=11A 1 2
GND
GND
CS1
CS2
C336 AO4422-1-GP
SC1000P50V3JN-GP Qg=9.8nC,
G
S
S
S
3D3V Iomax=6A GAP-CLOSE-PWR
2
TPS51120RHBR-GPU1 74.51120.073 Rdson=20~25mohm G23

24
17
5
33
23
18
51120_SKIPSEL 32
31
4
3
2
1
3D3V_PWR OCP>12A 1 2
51120_AGND 51120_DRVH2 L16
51120_LL2 1 2 GAP-CLOSE-PWR
G24
51120_TONSEL 1 R249 2 51120_VREF2 IND-3D3UH-55-GP 1 2
5
6
7
8
51120_V5FILT 0R0402-PAD
D
D
D
D
2 51120_AGND GAP-CLOSE-PWR 2
1 R266 2 51120_CS1 G25
1
U9 1 2
2
15KR2F-GP AO4422-1-GP C342 R247 TC2

1 2 51120_CS2 R246 Iomax=11A SC33P50V2JN-3GP 30K9R3F-GP ST220U6D3VDM-15GP GAP-CLOSE-PWR
2
G
S
S
S
R264 20KR2F-L-GP 0R0402-PAD DY DY
Qg=9.8nC, NEC 220uF ,V size
4
3
2
1
2
Rdson=19.6~24mohm
1
51120_VFB2 ESR=25mohm
51120_DRVL2 Iripple=2.2A
1
51120_AGND
R248
51120_COMP1 13K3R2F-L1-GP
DY
1
2
GND VREF2 FLOAT V5FILT R236
22KR2J-GP
DY
1
DY 51120_AGND G1
AUTOSKIP C337 1 2
Vout=1V*(R1+R2)/R2
1 2
SKIPSEL AUTOSKIP /FAULTS PWM PWM SC390P50V3JN-GP

2
GAP-CLOSE-PWR
OFF
DY C331
SC1KP16V2KX-GP 51120_AGND
CURRENT
2
D-Cap
COMP N/A N/A
MODE MODE
For TPS51120,
51120_AGND
380k/CH1 290k/CH1 220k/CH1 180k/CH1 Vout=5V
TONSEL 590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_COMP2 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
1 <Variant Name> 1
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
1
5V
VFB1 N/A not use ADJ. R235 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
Fixed Output DY 22KR2J-GP
Vout=3.3V
Wistron Corporation
1
3.3V 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

VFB2 N/A not use ADJ. C335 DY 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Taipei Hsien 221, Taiwan, R.O.C.
1 2
Fixed Output SC390P50V3JN-GP

2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
2
Title
EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON DY C333 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. TPS51120_3D3V_5V
SC1KP16V2KX-GP
2

EN3,EN5 LDO OFF not use LDO ON VREG3 on A3 SB
Garda-5
51120_AGND Date: Wednesday, April 26, 2006 Sheet 41 of 46
A B C D E
G26
DCBATOUT DCBATOUT_51124 DCBATOUT_51124 1 2
G27 GAP-CLOSE-PWR
1 2 G33
1
GAP-CLOSE-PWR C38 C37
DY C385
1D8V_PWR 1 2 1D8V_S3
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
G28 GAP-CLOSE-PWR
2
5
6
7
8
1 2 G34
D
D
D
D
U13 1 2
GAP-CLOSE-PWR FDS6612A-1-GP
G29 GAP-CLOSE-PWR
1 2
1D8V Iomax=8A G35
OCP>16A 1 2
G
S
S
S
GAP-CLOSE-PWR
G30 1D8V_PWR GAP-CLOSE-PWR
4
3
2
1
1 2 G36
L19
51124_DRVH1 Voutsetting=1.801V 1 2
GAP-CLOSE-PWR 51124_LL1 1 2
G31 IND-3D3UH-55-GP GAP-CLOSE-PWR
1 2 G37
5
6
7
8
1 2
1
D
D
D
D
SC33P50V3JN-GP
GAP-CLOSE-PWR U15
G32 FDS6690DS-GP R274 TC3 GAP-CLOSE-PWR
1
1 2 42K2R3F-GP C361 DY G38
C363
SE220U2D5VDM-3GP
GAP-CLOSE-PWR
DY SCD1U50V3ZY-GP
1 2
2
G
S
S
S
GAP-CLOSE-PWR
51124_VFB1 G39
4
3
2
1
1 2
1
30K1R3F-GP
51124_DRVL1
R271 GAP-CLOSE-PWR
G40
3D3V_S0 1 2
5V_S5
Already PH at Page41
2
Panasonic 220uF ESR=15mohm GAP-CLOSE-PWR
1
R281 Iripple=2.7A
100KR2J-1-GP 51124_GND
1
SC4D7U10V5ZY-3GP
1 R280 2 0R0402-PAD CPUCORE_ON 39,41,43

C35
R291
51124_PGD1
51124_PGD2
2
1
3D3R3J-L-GP 1D2V_PWR G57

1D8V_PWR 1 R279 2 0R0402-PAD 1 2
51124_VFB2 1D2V_PWRGD 43
2
51124_VFB1 GAP-CLOSE-PWR
G58
1
1D2V_PWR 1 2 1D2V_S0
C376
24
U46
2
5
1
6
7
SC1U6D3V2ZY-GP GAP-CLOSE-PWR
2
G59
VFB1
VFB2
VO1
VO2
PGOOD1
PGOOD2
1 2
51124_GND
R276 GAP-CLOSE-PWR
51124_V5FILT 15 4 51124_TONSEL 1 51124_V5FILT G60
16
V5FILT
V5IN
TONSEL DY 2 DCBATOUT_51124 1 2
2
21 51124_DRVH1 10KR2J-3-GP
DRVH1
18,33,43 PM_SLP_S5# 1 R283 2 0R0402-PAD 51124_EN1_1 23 EN1 DRVH2 10 51124_DRVH2 R277 GAP-CLOSE-PWR
1 R282 2 0R0402-PAD 51124_EN2_1 8 0R2J-2-GP G61
37 1D2V_EN EN2
PGND1 18 DY 1 2
1
51124_LL1 20 13
DY C39
1
LL1 PGND2
1
5
6
7
8
51124_LL2 11 25 C384 C383 GAP-CLOSE-PWR
DY DY C368 LL2 GND
D
D
D
D
SC10U25V6KX-1GP
SC10U25V6KX-1GP
C369 3 U14 SCD1U50V3ZY-GP G62
2
GND
SCD01U16V2KX-3GP
51124_GND AO4422-1-GP 1D2V Iomax=6.5A 1 2

DRVL1
DRVL2
VBST1
VBST2
2
TRIP1
TRIP2
SCD01U16V2KX-3GP
OCP>13A GAP-CLOSE-PWR
G63
G
S
S
S
TPS51124RGER-GPU1 74.51124.073 1 2
17
14
22
9
19
12
51124_GND 51124_GND 51124_GND
4
3
2
1
51124_TRIP1 1D2V_PWR GAP-CLOSE-PWR
1
51124_TRIP2 51124_DRVL2 51124_DRVH2 G64

L18
R292 Voutsetting=1.203V 1 2
1
18KR2F-GP 51124_LL2 1 2
R290 51124_DRVL1 GAP-CLOSE-PWR
SA Modify 18KR2F-GP G65
2
IND-2D2UH-44-GP
5
6
7
8
G56 1 2
D
D
D
D
45K3R2F-L-GP
1 2 U16
2
1
51124_GND AO4422-1-GP C362 R275 TC11 GAP-CLOSE-PWR
1
51124_GND GAP-CLOSE-PWR DY
51124_LL1 1 R288 2 51124_LL1_1 1 2C372 51124_VBST1 SC33P50V3JN-GP DY C364
SE220U2VDM-8GP
SCD1U50V3ZY-GP
2
G
S
S
S
0R3-0-U-GP SCD1U50V3ZY-GP
2
51124_GND 51124_VFB2
4
3
2
1
1
75KR3F-GP
51124_LL2 1 R287 2 51124_LL2_1 1 2 C371 51124_VBST2 51124_DRVL2
R272
0R3-0-U-GP SCD1U50V3ZY-GP
2
Panasonic 220uF ESR=15mohm
51124_GND
Vout=0.75V*(R1+R2)/R2 Iripple=2.7A
<Variant Name>
GND OPEN V5FILT
230k/CH1 283k/CH1 346k/CH1

Vtrip(mV)=Rtrip(Kohm)*10(uA) Wistron Corporation
TONSEL 283k/CH2 346k/CH2 423k/CH2 Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
TPS51124_1D8V_1D2V
A3 SA
Garda-5
A B C D E
1D05V_S0
Iomax=3A
5V_S5 1D2V_S0
4 0D9V 4
5V_S5 Iomax=1A
1
C397 C394 1D8V_S3
C391 SC1U6D3V2ZY-GP SC4D7U10V5ZY-3GP OCP>6A 0D9V_PWR DDR_VREF_S0
SC1U10V2KX-GP
1
C444
SC1U6D3V2ZY-GP C439 1 2
2
SC10U10V5ZY-1GP
2
1 2 G71 GAP-CLOSE-PWR
U50
6
Already PH at Page41 G66 GAP-CLOSE-PWR U52
Vo(cal.)=1.053V 1 2
VCNTL
39,41,42 CPUCORE_ON 7 POK VIN 5 1 2
9 1D05V_PWR 1D05V_S0 DDR_VREF_S3 10 1 G72 GAP-CLOSE-PWR
VIN G67 GAP-CLOSE-PWR VIN VDDQSNS
18,33,42 PM_SLP_S5# 9 S5 VLDOIN 2
42 1D2V_PWRGD 1 R309 2 8 EN VOUT 3 1 2 8 GND VTT 3 1 2
0R0402-PAD 4 7 4
VOUT G68 GAP-CLOSE-PWR 18,20,32,33,37 PM_SLP_S3# S3 PGND G73 GAP-CLOSE-PWR
6 VTTREF VTTSNS 5
1
1
C389 1 2
DY
GND
2 R317 C393
GND
FB
SC330P50V3JN-GP
SCD1U16V2ZY-2GP 1KR2F-3-GP G69 GAP-CLOSE-PWR
2
1
C446 C443 TPS51100DGQR-GP 74.51100.079
11
TC12
SC10U10V5ZY-1GP
APL5912-KAC-GP
1
1
74.05912.A71 SOP-8 ST100U4VBM-11-GP
SCD1U16V2ZY-2GP
DY
2
C437 C438
1
SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2
R315
3K16R3F-1-GP 2nd source: 74.02997.079
3 3
Vo=0.8*(1+(R1/R2))
2
NEC
100uF, 4V, B2 Size
ESR=70mohm
1D8V_S5
2
For New Card/MINI Card solution Iomax=300mA
3D3V_S5 1D8V_S5 2
U59
3D3V_S0 3
3D3V_S0 VIN
2
20060217PM 1D5V VOUT
GND 1
1
1D5V Iomax=120mA OCP>450mA C541 C536
1
APL5308-18AC-GP SC1U10V2KX-GP SC2D2U10V3ZY-1GP
2
1
Iomax=1A C265
C63
SC2D2U10V3ZY-1GP 1D5V_CPU_S0
74.05308.G31
NEW
2
SC10U10V5ZY-1GP U20
OCP>2A
2
U35
1 VIN VOUT 5
8 1 1D5V_PWR 1D5V_NEW_MINI_S0 2
NC#8 VIN GND
7 NC#7 BS 2 Vo(cal.)=1.5093V 3 SHDN# BP 4
6 GND FB 3
5 4 1 2
GND
NC#5 VOUT APL5312-15BITRL-GP

1
1
G44 GAP-CLOSE-PWR 74.05312.A3F
APL5332KAC-TRLGP 74.05332.B31 R196 C62 C75
9
1K33R3F-GP SC4D7U6D3V5KX-3GP
NEW 1 2
2
2
SCD01U50V3KX-4GP
NEW G45 GAP-CLOSE-PWR
2
TC10 1 2
1
1 <Variant Name> 1
R200 ST100U4VBM-11-GP G48 GAP-CLOSE-PWR
2
1K5R3F-GP
Rh/Rl=(Vout/0.8)-1
NEW NEW Wistron Corporation
2

Title
1D5V/0D9V/1D05V/1D8V
A3 SA
Garda-5
A B C D E
5 4 3 2 1
BT+
AD+ DCBATOUT
U43 R257
U3
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
D S S D
SCD1U50V3ZY-GP
7 2 2 7
6 D S 3 3 S D 6
D01R2512F-4-GP
1
5 D G 4 4 G D 5
1
R262 EC10
1
100KR2F-L1-GP AO4433-GP AO4407-1-GP C24
DY
2
C330 SCD1U50V3ZY-GP
2
D D
SCD01U50V3KX-4GP
2
2
MAX8725_ACIN
AC_IN Threshold 2.089V Max. G51 G52
1
Close to GAP-CLOSE GAP-CLOSE
AC_IN > 2.089V --> AC DETECT
1
R258
MAX8725 pin 24
1
13K3R2F-L1-GP C343
ACOK is 17.8V SC1U50V5ZY-1-GP
2
2
D17
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2 AD+_TO_SYS DCBATOUT
AD+
LDO :5.40V (< 5mA)
1
CH521S-30-GP-U
C341 C338 C332
8725_CSSN
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP MAX1909_LDO
2
8725_CSSP
SET Vout MAX VCELL= 4.1998V/CELL
1
Near MAX1909
SC10U35V0ZY-GP
SC10U35V0ZY-GP
VBAT=CELL*VCELL==>VCELL=VBAT/CELL C328
Pin 2
1
=VREF+(VVCTL-1.8) /9.52 =4.1998V
2
C345 C14 C12 -1 Modify
4
3
2
1
1 2
2
MAX8725_DHIV
MAX1909_LDO
G
S
S
S
SC1U10V3KX-3GP U5
1
MAX8725_REF U44
26
25
8725_PDL_G
R218
33R3J-2-GP AO4419-1-GP
CSSP
CSSN
D
D
D
D
C C
5
6
7
8
1
R254 MAX8725_PDS 27 PDS DHIV 22 Near MAX8725
SC1U10V3KX-3GP
R227 39KR2F-GP AD+_TO_SYS
100KR2F-L1-GP MAX8725_DC_IN
24
1
SRC PDL 28
2
Pin 21
DCIN LDO
1
BT+
L15 R268
When V(ICTL)<0.8V or DCIN<7V C325 SB Modify
2
21 MAX8725_DLOV CHG_PWR-2 1 2CHG_PWR-3 1 2
2
-->Charge Disable MAX8725_VCTL 11
DLOV IND-6D8UH-43-GP
R241 1 MAX8725_ICTL VCTL
33 CHG_I_PWM 2 10 ICTL D01R2512F-4-GP
100KR2J-1-GP MAX8725_MODE 7 MODE
1
5
6
7
8
V( MODE ) >=2.8V = 4 Cell 23 MAX8725_DHI
DHI
1
D
D
D
D
R230 C334 U4
SC1U10V3ZY-6GP
V( MODE ) = 1.8V = 3 Cell MAX8725_ACIN

240KR2F-L-GP
3 ACIN
1
2
1
R255 MAX8725_IINP 8 AO4422-1-GP C26 C28 C356 C31
2
IINP
2
20KR2F-L-GP 20 MAX8725_DLO
DLO
1
SC1U10V3ZY-6GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
G
S
S
S
SC10U25V0KX-3GP
SC10U25V0KX-3GP
MAX8725_CLS 9
2
CLS
1
R245 G53 G54

2
4
3
2
1
DY C340 10KR2F-2-GP GAP-CLOSE GAP-CLOSE
33 CHG_V_PWM 2 R220 1 MAX8725_ACOK 6 19
2
1
100KR2J-1-GP ACOK PGND
2
29
SC1U10V3ZY-6GP
PGND
1
C323
DY R14 18
8725_PKRESS CSIP
MAX1909_LDO 1 2 5
2
100KR2J-1-GP PKPRES
1 R15 2 CHG_PWR_CSIP
33,45 BATA_IN# 1KR2J-1-GP
G9
MAX8725_CCV 13 17 CHG_PWR_CSIN
MAX8725_CCI CCV CSIN BT+_SENCE BT+
12 CCI BATT 16 2 1
1
B B
MAX8725_CCS 14 15
CCS GND
REF
R219 GAP-CLOSE
1
1KR2J-1-GP G138 should close BTY CONN Pin7.

R234 C322 MAX8725ETI-GP-U
1 2
3D3V_AUX_S5 78K7R3F-GP C320 74.08725.A73 V_REF :4.2235V (<500uA)

SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
C321
SC1KP50V2KX-1GP
2
1
MAX8725_REF
2
R242 D
100KR2J-1-GP R252
3
31K6R2F-GP
Q17
2
2N7002PT-U
2
SC1U10V3KX-3GP
33 CHG_4D35V# 1 84.27002.F31 MAX8725_CLS G50

G 1 2
1
2
C344 GAP-CLOSE
S R261
2
20KR2F-L-GP MAX1909_SIGNAL_GND
3D3V_AUX_S5
2
1
R263
47KR2J-2-GP
MAX1909_LDO ISOURCE_MAX = (0.075/R950)*(VCLS/VREF)
2
AC_IN# 33
1
A Current limit setting <Variant Name> A

R253 D
100KR2J-1-GP Adapter=65W, Total_Power=58W(58W/20V=2.9A)
3
Q18 Wistron Corporation

2
2N7002PT-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

MAX8725_ACOK 1 Taipei Hsien 221, Taiwan, R.O.C.
84.27002.F31
G
Title
2
S
CHARGER MAX8725
Custom -1
Garda-5
5 4 3 2 1
5 4 3 2 1
ADAPTER IN CIRCUIT
DCIN1 AD+
4 -1 Modify
U42
D 1 AD+_JK 1 S D 8 D
S D
P4SSMJ24PT-GP
2 7
1
3 S D 6
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1
1
2 EC1 EC2 EC47 D4 R1 C313 4 G D 5
SCD47U50V5ZY
200KR3F-GP
AO4433-GP
2
3
2
5 AD+_G
6
MH1
1
DC-JACK115-GP R231
22.10037.C51 Q16 100KR2J-1-GP
R2
E
90W: 22.10037.C61 B
2
R1
C
C
33 AD_OFF B Q1 PDTA144EU-1GPU
CHT2222APT-GP
connect to KBC
E
C C
MAIN BATTERY CONNECTOR KBC_3D3V_AUX

1
2
3D3V_AUX_S5 DY DY
D21 D20 D19
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
3
83.00099.K11
1
BAT1
R269 8
100KR2F-L1-GP 1
RN40 2
2
1 4 BATA_CLK_1 3
33 BATA_SCL
33 BATA_SDA 2 3BATA_DAT_1 4
33,44 BATA_IN# 5
SRN33J-5-GP-U 6
BT+ 7
9
1
EC19 EC20 EC52 SYN-CON7-15-GP

C27 C29 20.80352.007
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
B B
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
2
DY DY DY DY
A <Variant Name> A
Wistron Corporation
Title
AD/BATT CONN
A3 -1
Garda-5
5 4 3 2 1
A B C D E
5V_S0
U1C
EMI CAP
14
10
DCBATOUT AD+
4 9 8 4
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1
1
TSAHCT125PW-GP EC59 EC61 EC8 EC72 EC49 EC23 EC27 EC16 EC22 EC9 EC48
2
DY DY DY DY DY DY DY DY DY DY DY
5V_S0 5V_USB5_S5 5V_S5 BT+
CPU Thermal Module
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1
1
TOP SIDE: EC5 EC45 EC34 EC54 EC64 EC25 EC24 EC38 EC76 EC74 EC77 EC53 EC21
H11 H15 H16
2
K1
1 DY DY DY DY DY DY DY DY DY DY DY DY
SPRING-U3
1
1D8V_S3 3D3V_S0
3
34.4A908.001 34.40U07.001 3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
FOR Daughter BD IO Bracket MDC EC36 EC29 EC68 EC56 EC71 EC58 EC28 EC26 EC18 EC7 EC6
BOTTOM SIDE:
2
H32 H33 H14 H22 H27 H17 H2 H6
DY DY DY DY DY DY DY DY DY DY
1
1
VCC_CORE_S0
34.4A904.001 34.4A903.001 34.4A905.001 34.4A902.001
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
EC75 EC31 EC73 EC60 EC39 EC35 EC30 EC32 EC40 EC41
2
DY DY DY DY DY DY DY DY DY DY
UMA FOR MINIC UNDER HDD
H10 H23 H26

K3 K4 K2 1D2V_S0 1D2V_PWR DDR_VREF_S0
MINIC MINIC 1 1 1
SPRING-23-GP SPRING-9-GP SPRING-9-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
2 EC57 EC55 EC37 2
DY DY
1
2
34.4A906.001 34.4A907.001 34.39S07.002 34.49U23.001 SA Rework DY DY DY
-1 Modify
H1 H3 H4 H5 H7 H8 H9 H12 H13 H18 H19

HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1
H20 H21 H24 H25 H28 H29 H30 H31

1 <Variant Name> 1
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
Wistron Corporation
1
Title
SPRING & BOSS

A3
Garda-5 -1
A B C D E

Garda-5 Block Diagram Project code: 91.4Q201.001 SYSTEM DC/DC Converters and Voltage Outputs

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Garda-5 Block Diagram Project code: 91.4Q201.001 SYSTEM DC/DC Converters and Voltage Outputs

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A B C D E

Garda-5 Block Diagram Project code: 91.4Q201.001

REVISION : 06206-SA 5V_S5

SVIDEO/COMP S APL5312 120mA

35 33 36 CONN. 36 0~1.3V 48A

SCD1U10V2MX-1 0.1uF M/X5R 10V 0402

SC10U6D3V5MX 10uF M/X5R 6.3V 0805

SC2D2U16V5ZY 2.2uF Z/Y5V 16V 0805

Bead: Bead: Bead: 3D3V_S0

SC27P50V2JN-2-GP X2 GEN_XTAL_OUT_R 1 R140 2 CLK_IREF 37 3 3D3V_48MPWR_S0

36 23 CLK_PCIE_NEW_1# RN12 1 4 SRN33J-5-GP-U CLK_PCIE_NEW# 32

CK410# = 0, CK410 MODE 1 DY 2 33R2J-2-GP SEL_CK410#

CLOCK FREQUENCY SELECT TABLE (MHz)

0 0 1 133 100 33 14.31 For Yonah Cerlon-M

RN16 RN10 <Variant Name>

6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[17]# D[49]#

B4 A22 PM_THRMTRIP# H_D#25 P22 AD24 H_D#57

M4 RSVD[05] RSVD[13] D2 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6

R325 220R2J-L2-GP 10KR2J-3-GP

XDP_TCK CH3904PT-GP 470R2J-2-GP

E17 VCC[039] VCCP[05] M6 E24 VSS[043] VSS[124] AB19

VCC[041] VCCP[07] VSS[045] VSS[126]

AA12 C78 68.00230.041 H6 AD11

VCC[056] VID[1] VCC_CORE_S0 VSS[060] VSS[141]

AB9 VCC[060] VID[5] AF2 H_VID5 39 J25 VSS[064] VSS[145] AE1

VCC[064] VCCSENSE VSS[068] VSS[149]

BGA479-SKT6-GPU2 Layout Note: M2 AF3

H_RS#0 E26 B16 H_D#41

RESERVED0 CPU_D45# H_D#46

H20 B13 H_D#57

CPVSS need to connect to GND F15 H_DSTBN#3 H_DSTBN#3 4

C111 CPU_DSTB3N# H_DSTBP#3

dedicated VIA C104 C92 RC410ME-GP

TP33 TPAD30 1989_DXP3

DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

TP29 TPAD30 1989_DXN3 Title

NB_MPVDD 200ohm, 200mA.

Taipei Hsien 221, Taiwan, R.O.C.

RC410ME (2 of 5) Memory I/F

3D3V_S0 Bead: Q30

Bead: C170 B6 TXBOUT2- 13

200mA. C166 C165 C164 C5 TXAOUT1+ 13 R96

L27 1D8V_S0_AVDDQ B8 E6 TXAOUT2- 13 0R3-0-U-GP

J8 1D8V_S0_LPVDD C169 SC1U6D3V2ZY-GP

C193 C142 R120

TPAD30 TP70 TMDS_HPD J2 H8

14 RED 150R2F-1-GP F10 RED LVDS_DIGON

TP69 TPAD30 SC1U6D3V2ZY-GP

R358 10KR2J-3-GP F9 TV_LUMA 14

TPAD30 TP71 SB_OSCIN_1 F1 R100

13 EDID_CLK EDID_CLK D2 I2C_CLK STRP_DATA

RC410ME-GP 3D3V_S0 STRP_DATA:Debug strap

R362 1 2 4K7R2J-2-GP DDC_DATA

"DACSCL" Wistron Corporation

0: mobile CPU Interface(1.4V or below) R123

CH3904PT-GP Size Document Number Rev

32 PCIE_RXP0 AF8 GPP_RX0P GPP_TX0P AJ8 PCIE_LAN_TXP0_1 C460 1 2 SCD1U10V2KX-4GP PCIE_TXP0 32

4K7R2J-2-GP AG6 AE6

27 PCIE_RXP2 AK7 AJ6 PCIE_MC_TXP_2_1 C462 1 2 SCD1U10V2KX-4GP

GPP_RX2P GPP_TX2P PCIE_TXP2 27

3 CLK_NB_ALINK K2 AK13 PCE_TXSET

P15 VDD_CORE#P14 VDD_MEM#AE18 T24 N6 VSSA#L6 VSS#N15 N15

100u1(ESR<=250), 1u6. 71.RC410.D0U