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5 4 3 2 1

Pamirs UMA Block Diagram SYSTEM DC/DC


TPS51120
INPUTS OUTPUTS
Project code : 91.4S401.001 5V_S3
Intel CPU PCB P/N :06228
DCBATOUT
3V_AUX_S5
D
CLK GEN Meron 2M/4M SV SYSTEM DC/DC D

FSB:667 or 800 MHz


Revision : SB MAX8743
ICS9LPRS355AKLFT-GP 4,5,6

3 INPUTS OUTPUTS
RGB CRT CRT 15 1D5V_S0
Host BUS DCBATOUT
1D8V_S3
533/667MHz
LVDS LCD 16 SYSTEM DC/DC
DDRII DDRII 667 Channel A
ISL6269CRZ
Slot 0 Crestline-GM/GML
533/667 13
INPUTS OUTPUTS
AGTL+ CPU I/F DDR I/F SVIDEO TVOUT 15
DDRII INTEGRATED GRAHPICS DCBATOUT 1D05V_S0
Slot 1 DDR II 667 Channel B PCIE x 16
533/667 14
LVDS, CRT I/F 7,8,9,10,11,12
MAXIM CHARGER
MAX8725
C
INPUTS OUTPUTS C
1394 1394 DMI I/F
25 BT+
Ricoh 100MHz
CAMERA32 DCBATOUT 18V 3.0A
R5C832 PCI
5V 100mA
SD/SDIO/MMC
CardReader
MS/MS Pro/xD
25 24,25 INTEL BLUE
TOOTH 32 CPU DC/DC
MAX8736ETL
ICH8-M USB 2.0 USB x 3 23
INPUTS OUTPUTS
10/100 NIC LCI 10 USB 2.0/1.1 ports
RJ45 Marvell 88E8039 27 VCC_CORE
ETHERNET (10/100/1000Mb)
CONN 28 SATA HDD 23
DCBATOUT
0.844~1.3V
High Definition Audio
ATA 66/100 44A

PATA ODD 23
AMOM ACPI 1.1
B
RJ11 HD Audio LPC I/F
PCB LAYER B

MODEM
CONN 29 TPM
CX20548 PCI/PCI BRIDGE LPC Bus L1: Signal 1
18,19,20,21 SLB9635TT
INTERNAL 34 L2: GND
ARRAY MIC
HD AUDIO L3: Signal 2
MIC IN CODEC
PCIE x 1

USB 2.0 x 1
PCIE x 1

PCIE+USB 2.0
L4: Signal 3
CX20549-12Z KBC
29
LINE OUT ENE KB3910SF L5: VCC
Ricoh 31
R5538 L6: Signal 4
SPDIF 28

Flash ROM
1MB 33
OP AMP Thermal
Mini-Card Mini-Card Capacity Touch Int.
APA2031 30 New Card CIR & Fan
A
28 802.11a/b/g26 WWAN26 Button32 Pad 32 KB32 <Core Design> A
G792 22
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2CH DOCK Title
SPEAKER 10/100
CRT MIC IN LINE OUT S/PDIF TVOUT Ethernet CIR Block Diagram
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 1 of 41
5 4 3 2 1
A B C D E

INTEL ICH8-M STRAP PIN 19,21 +RTCVCC +RTCVCC

4,5,6,7,9,10,11,19,21,38,41 1D05V_S0 1D05V_S0

3,7,10,21,38 1D25V_S0 1D25V_S0


Signal Usage/When Sampled Comment XOR Chain Entrance Strap 27 1D2V_LAN_S5 1D2V_LAN_S5
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 ICH_RSVDtp3 AZ_DOUT_ICH Description
28 1D5V_NEW_S0 1D5V_NEW_S0
PCIE Port Config 1 bit1, pulled low at rising edge of PWROK.When TP3 not 0 0 RSVD
4 Rising Edge of PWROK pulled low at rising edge of PWROK,sets bit1 of 0
1
1
0
Enter XOR Chain
Normal Operation(default)
5,10,17,19,20,21,26,28,37,38,41 1D5V_S0 1D5V_S0 4
RPC.PC(Config Registers:offset 224h) 1 1 Set PCIE port cofig bit1
7,10,11,13,14,37,38,41 1D8V_S3 1D8V_S3
HDA_SYNC PCIE Port Config 1 bit0, Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Rising Edge of PWROK. 27,28 2D5V_LAN_S5 2D5V_LAN_S5
GNT2# PCIE Port Config 2 bit0, Sets bit2 of RPC.PC(Config Registers:Offset 224h) 29,30 3D3V_AUD_S0 3D3V_AUD_S0
Rising Edge of PWROK.
19,31,32,33,36,39,40 3D3V_AUX_S5 3D3V_AUX_S5
GPIO20 Reserved Weak Internal PULL-DOWN.NOTE:This signal should 27,28 3D3V_LAN_S5 3D3V_LAN_S5
not be pull HIGH.
3,4,7,9,10,11,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,31,32,33,34,35,36,41 3D3V_S0 3D3V_S0
Sampled low:Top-Block Swap mode(inverts A16 for all A16 swap override strap
GNT3# Top-Block Swap Override. cycles targeting FWH BIOS space). 17,18,20,21,22,26,27,28,29,31,34,36,39,41 3D3V_S5 3D3V_S5
Rising Edge of PWROK. Note: Software will not be able to clear the PCI_GNT#3 low = A16 swap override enable
Top-Swap bit until the system is rebooted high = default 22,29,31,34,36 5V_AUX_S5 5V_AUX_S5
without GNT3# being pulled down. BOOT BIOS Strap 16,23,32,33,34,36,37,38 5V_S3 5V_S3
PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
GNT0# Boot BIOS Destination Controllable via Boot BIOS Destination bit 15,16,17,20,21,22,23,26,29,30,31,32,33,34,35,41 5V_S0 5V_S0
SPI_CS1# Selection. (Config Registers:Offset 3410h:bit 11:10). 0 1 SPI
Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. 1 0 PCI 16,21,34,37,38 5V_S5 5V_S5
1 1 LPC(Default)
Integrated VccSus1_05 17,39,40,41 AD+ AD+
VccSus1_5 and VccCL1_5 Enables integrated VccSus1_05,VccSus1_5 and integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN VRM Enable/Disable.Always VccCL1_5 VRM when sampled high 16,17,34,35,36,37,38,39,41 DCBATOUT DCBATOUT
SM_INTVRMEN High=Enable Low=Disable
sampled.
13,14,38,41 DDR_VREF_S0 DDR_VREF_S0
3 Integrated VccLAN1_05 Enables integrated VccLAN1_05,VccCL1_05 VRM
integrated VccLan1_05VccCL1_05
7,13,14,38 DDR_VREF_S3 DDR_VREF_S3
3
LAN100_SLP VccCL1_05 VRM enable when sampled high LAN100_SLP High=Enable Low=Disable
/Disable. Always sampled. 22,31,33,39 KBC_3D3V_AUX KBC_3D3V_AUX

16 LCDVDD_S0 LCDVDD_S0
SATALED# PCIE LAN REVERSAL.Rising This signal has weak internal pull-up. DEFAULE HIGH
Edge of PWROK. set bit27 of MPC.LR(Device28:Function0:Offset D8) 5,6,35 VCC_CORE_S0 VCC_CORE_S0
If sampled high, the system is strapped to the No Reboot Strap
SPKR No Reboot. "No Reboot" mode(ICH8M will disable the TCO Timer SPKR LOW = Defaule
Rising Edge of PWROK. system reboot feature). The status is readable
via the NO REBOOT bit.(Offset:3410h:bit5)
High=No Reboot

TP3 XOR Chain Entrance. This signal should not be pull low unless using
Rising Edge of PWROK. XOR Chain testing.

GPIO33/
Internal Pull-Up.If sampled low,the Flash Descriptor
Flash Descriptor Security Security will be overidden.if high,the Security
INTEL ICH8-M INTEGRATED
HDA_DOCK_EN# Override Strap
Rising Edge of PWROK.
measures defined in the Flash Descriptor will be in
effect.
This should only be used in manufacturing
8.2K PULL HIGH PULL-UPS and PULL-DOWNS
environments
SIGNAL Resistor Type/Value
HDA_BIT_CLK PULL-DOWN 20K
HDA_RST# NONE
2 HDA_SDIN[3:0] PULL-DOWN 20K 2
HDA_SDOUT PULL-DOWN 20K
HDA_SYNC PULL-DOWN 20K
INTEL CRESTLINE STRAP PIN GNT[3:0] PULL-UP 20K
CFG Strap LOW 0 HIGH 1 GPIO[20] PULL-DOWN 20K
CFG 5 LDA[3:0]#/FHW[3:0]# PULL-UP 20K
DMI X 2 DMI X 4 ★
CFG 8 LAN_RXD[2:0] PULL-UP 20K
Low Power PCI Express Normal★ Low Power mode
CFG 9 LDRQ[0] PULL-UP 20K
PCI Express Graphics Lane Reversal Normal Mode(Lanes★
Lane Reversal number in order) LDRQ[1]/GPIO23 PULL-UP 20K
CFG 16
FSB Dynamic ODT Disabled Enabled ★ PME# PULL-UP 20K
CFG 19
DMI Lane Reserved Normal Operation ★ Reserved Lane PWRBTN# PULL-UP 20K
CFG 20 Only PCIE or SDVO PCIE and SDVO are
Concurrent SDVO/PCIE is operation★ operation simultaneous SATALED# PULL-UP 20K
SDVO_CTRL_DATA NO SDVO Card SDVO Card Present SPI_CS1# PULL-UP 20K
Present ★
SDVO Present SPI_CLK PULL-UP 20K
<Core Design>
CFG 12 XOR/ALL-Z SPI_MOSI PULL-UP 20K
1 CFG 13
LL(00) Reserved
1
SPI_MISO PULL-UP 20K
LH(01) XOR Mode Enabled Wistron Corporation
HL(10) All Z Mode Enabled TACH_[3:0] PULL-UP 20K 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
HH(11) Normal Operation Taipei Hsien 221, Taiwan, R.O.C.
SPKR PULL-DOWN 20K
Title
TP[3] PULL-UP 20K
Table of Content
USB[9:0][P,N] PULL-DOWN 15K Size Document Number Rev
A3
CL_RST# TBD Pamirs -3
Date: Tuesday, May 22, 2007 Sheet 2 of 41

A B C D E
3D3V_S0 5 3D3V_S0_CK505 4 3 2 1
L11
2/12 3D3V_S0_CK505 3D3V_S0_CK505_IO
1 2 2/12
0R0603-PAD
1

1
C484 C195 C448 C439 C442 C475 C440 C445
SC1U10V3KX-3GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
DY DY
X1
CLK_XTAL_IN 1 2 CLK_XTAL_OUT

X-14D31818M-40GP

1
D C186 C185
D
SC27P50V2JN-2-GP SC27P50V2JN-2-GP

2
U21

16

46
62
23

19
27
43
52
33
56
4

9
1D25V_S0
2/12

VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDREF
VDD48

VDDSRC
VDDCPU

VDD96_IO
VDDPCI

VDDPLL3

VDDPLL3_IO
R650
3D3V_S0 1 2 61 CLK_CPU_BCLK1 RN29 1 4 SRN0J-6-GP CLK_CPU_BCLK 4
3D3V_S0_CK505_IO CPUT0 CLK_CPU_BCLK1#
CPUC0 60 2 3 CLK_CPU_BCLK# 4
L36 DUMMY-R3 CLK_XTAL_IN CLK_MCH_BCLK1 RN32
3 X1 CPUT1_F 58 1 4 SRN0J-6-GP CLK_MCH_BCLK 7
1 2 C190 SC4D7P50V2CN-1GP CLK_XTAL_OUT 2 57 CLK_MCH_BCLK1# 2 3 CLK_MCH_BCLK# 7
X2 CPUC1_F
0R0603-PAD 1 2 54 CLK_CPU_XDP1 TP103
CPUT2_ITP/SRCT8
1

1
C212 C441 C466 C459 C465 C200 C206 53 CLK_CPU_XDP1# TP104 2/12
C446 FSA CPUC2_ITP/SRCC8
20 CLK_48M_ICH 1 2 17 USB_48MHZ/FSLA
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
12/12
2

2
SC1U10V3KX-3GP

DY R159 33R2J-2-GP 51 CLK_PCIE_LAN1 RN36 1 4 SRN0J-6-GP CLK_PCIE_LAN 27


SRCT7/CR#_F CLK_PCIE_LAN1#
SRCC7/CR#_E 50 2 3 CLK_PCIE_LAN# 27
20 H_STP_PCI# 45 PCI_STOP#
44 48 CLK_PCIE_MINI1_1 RN44 1 4 SRN0J-6-GP CLK_PCIE_MINI1 26
20 H_STP_CPU# CPU_STOP# SRCT6 CLK_PCIE_MINI1_1#
SRCC6 47 2 3 CLK_PCIE_MINI1# 26
41 CLK_PCIE_NEW1 2 3 CLK_PCIE_NEW 28
SRCT10 CLK_PCIE_NEW1#
13,14,20 ICH_SMBCLK 7 SCLK SRCC10 42 1 4 CLK_PCIE_NEW# 28
6 RN42 SRN0J-6-GP
1 2
13,14,20 ICH_SMBDATA SDATA 3D3V_S0
40 R184 10KR2J-3-GP
SRCT11/CR#_H R183 1 NEWCARD_CLKREQ# 28
20 CK_PWRGD 63 CK_PWRGD/PD# SRCC11/CR#_G 39 2
C SRCT9 37 CLK_PCIE_MINI2_1 2 3
12/18 DY 10KR2J-3-GP
CLK_PCIE_MINI2 26
C
12/18 38 CLK_PCIE_MINI2_1# 1 4 CLK_PCIE_MINI2# 26
SRCC9 RN41 SRN0J-6-GP
20 CLKSATAREQ# 8 PCI0/CR#_A
10 34 CLK_MCH_3GPLL1 2 3 CLK_MCH_3GPLL 7
7 CLKREQ#_B R143 33R2J-2-GP PCI2_TME PCI1/CR#_B SRCT4 CLK_MCH_3GPLL1#
33 PCLK_FWH 1 2 11 PCI2/TME SRCC4 35 1 4 CLK_MCH_3GPLL# 7
R150 1 DY 2 33R2J-2-GP 12 RN40 SRN0J-6-GP
34 CLK_PCI_TCG PCI3
31 PCLK_KBC R151 1 2 33R2J-2-GP 27_SEL 13 31 CLK_PCIE_ICH1 2 3 CLK_PCIE_ICH 20
R153 33R2J-2-GP ITP_EN PCI4/27_SELECT SRCT3/CR#_C CLK_PCIE_ICH1#
18 CLK_PCI_ICH 1 2 14 PCI_F5/ITP_EN SRCC3/CR#_D 32 1 4 CLK_PCIE_ICH# 20
R152 1 2 33R2J-2-GP RN39 SRN0J-6-GP
24 PCLK_PCM
28 CLK_PCIE_SATA1 2 3 CLK_PCIE_SATA 19
SRCT2/SATAT CLK_PCIE_SATA1#
R382 SRCC2/SATAC 29 1 4 CLK_PCIE_SATA# 19
FSB 64 RN38 SRN0J-6-GP
FSC FSLB/TEST_MODE
20 CLK_14M_ICH 1 2 5 REF0/FSLC/TEST_SEL 01/31 10/24
24 MCH_SSCDREFCLK1 2 3 MCH_SSCDREFCLK 7
27MHZ_NONSS/SRCT1/SE1 MCH_SSCDREFCLK1#
33R2J-2-GP 55 NC#55 27MHZ_SS/SRCC1/SE2 25 1 4 MCH_SSCDREFCLK# 7
RN33 SRN0J-6-GP
20 CLK_MCH_DREFCLK1 2 3

GNDSRC
GNDSRC
GNDSRC
GNDCPU
CLK_MCH_DREFCLK 7

GNDREF
SRCT0/DOTT_96

GNDPCI
3D3V_S0_CK505 CLK_MCH_DREFCLK1#
01/31 21 1 4

GND48
SRCC0/DOTC_96 RN31 SRN0J-6-GP CLK_MCH_DREFCLK# 7

GND

GND

GND
1

2 C1721

2 C1741

2 C1731

2 C1711

C457

DY
1

18
15
1

22
30
36
49
59
26

65
R385
10KR2J-3-GP
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

ICS9LPRS355AKLFT-GP
12/20
2

PCI2_TME

B B
1

R386 3D3V_S0_CK505
10KR2J-3-GP
DY
2

1
R141
FS_C FS_B FS_A CPU DY 10KR2J-3-GP

2
3D3V_S0_CK505 1 0 1 100M 27_SEL
0 0 1 133M

1
0 1 0 200M
R142
0 1 1 166M
1

10KR2J-3-GP
R379
10KR2J-3-GP 27_SEL PIN 20 PIN 21 PIN 24 PIN 25

2
ITP_EN Output 1 2 FSC
2

ITP_EN 5 CPU_BSEL2 R381 10KR2J-3-GP 0 DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100


5 CPU_BSEL1 1 2 FSB 1 SRCT0 SRCC0 27M_NSS 27M_SS
0 SRC8
1

R163 0R0402-PAD
R378 1 CPU_ITP 5 CPU_BSEL0 1 2 FSA
10KR2J-3-GP R160 2K2R2J-2-GP
DY
R149 1 2 1KR2J-1-GP MCH_CLKSEL0 7
2

R134 1 2 1KR2J-1-GP MCH_CLKSEL1 7 <Variant Name>


A R377 1 2 1KR2J-1-GP MCH_CLKSEL2 7 A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Design Note: Taipei Hsien 221, Taiwan, R.O.C.

1. All of Input pin didn't have internal pull up resistor. Title


2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock, Size
Clock generator CY28548
Document Number Rev
so put 0 ohm serial resistor in the schematic. A3
Pamirs -3
Date: Monday, May 21, 2007 Sheet 3 of 41

5 4 3 2 1
5 4 3 2 1

7 H_A#[3..35]
U53A 1 OF 4

H_A#3 J4 H1 H_ADS# 1D05V_S0


A3# ADS# H_ADS# 7
H_A#4 L5 E2 H_BNR#
A4# BNR# H_BNR# 7
H_A#5 L4 G5 H_BPRI#
A5# BPRI# H_BPRI# 7

ADDR GROUP 0
H_A#6 K5 A6#

1
H_A#7 M3 H5 H_DEFER#
D H_A#8 N2
A7# DEFER#
F21 H_DRDY#
H_DEFER# 7
R114 D

CONTROL
A8# DRDY# H_DRDY# 7 56R2J-4-GP
H_A#9 J1 E1 H_DBSY#
A9# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A10# H_BR0#
P5 F1 H_BR0# 7

2
H_A#12 A11# BR0#
P2 A12#
H_A#13 L2 D20 H_IERR#
H_A#14 A13# IERR# H_INIT#
P4 A14# INIT# B3 H_INIT# 19
H_A#15 P1
H_A#16 A15# H_LOCK#
R1 A16# LOCK# H4 H_LOCK# 7
H_ADSTB#0 M1
7 H_ADSTB#0 ADSTB0#
C1 H_RESET#
RESET# H_RESET# 7
H_REQ#0 K3 F3 H_RS#0
7 H_REQ#0 REQ0# RS0# H_RS#0 7
H_REQ#1 H2 F4 H_RS#1
7 H_REQ#1 REQ1# RS1# H_RS#1 7
H_REQ#2 K2 G3 H_RS#2
7 H_REQ#2 REQ2# RS2# H_RS#2 7
H_REQ#3 J3 G2 H_TRDY#
7 H_REQ#3 REQ3# TRDY# H_TRDY# 7
H_REQ#4 L1
7 H_REQ#4 REQ4#
G6 H_HIT#
HIT# H_HIT# 7
H_A#17 Y2 E4 H_HITM#
A17# HITM# H_HITM# 7
H_A#18 U5
H_A#19 A18# XDP_BPM#0 TP68
R3 A19# BPM0# AD4
H_A#20 W6 AD3 XDP_BPM#1 TP91
2/12
XDP/ITP SIGNALS
A20# BPM1#
ADDR GROUP 1
H_A#21 U4 AD1 XDP_BPM#2 TP93
H_A#22 A21# BPM2# XDP_BPM#3 TP101
Y5 A22# BPM3# AC4
H_A#23 U1 AC2 XDP_BPM#4 TP102
H_A#24 A23# PRDY# XDP_BPM#5
R4 A24# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK
H_A#26 A25# TCK XDP_TDI
T3 A26# TDI AA6
H_A#27 W2 AB3 XDP_TDO
H_A#28 A27# TDO XDP_TMS
W5 A28# TMS AB5
H_A#29 Y4 AB6 XDP_TRST#
H_A#30 A29# TRST# XDP_DBRESET#
U2 A30# DBR# C20 XDP_DBRESET# 20
H_A#31 V4
H_A#32 A31#
W3 A32# CPU_PROCHOT# 35
H_A#33 AA4 THERMAL
A33#
C H_A#34
H_A#35
AB2
AA3
A34#
A35# PROCHOT# D21
1
R122
2
68R3J-GP
1D05V_S0 C
H_ADSTB#1 V1 A24 H_THERMDA
7 H_ADSTB#1 ADSTB1# THRMDA H_THERMDA 22
B25 H_THERMDC
H_A20M# THRMDC H_THERMDC 22
19 H_A20M# A6 A20M#
H_FERR# A5 C7 H_THERMTRIP#
19 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 7,19
ICH

H_IGNNE# C4 H_THERMDA, H_THERMDC routing together,


19 H_IGNNE# IGNNE#
D5 Trace width / Spacing = 10 / 10 mil
19 H_STPCLK# STPCLK#
C6 HCLK A22 CLK_CPU_BCLK
19 H_INTR LINT0 BCLK0 CLK_CPU_BCLK 3
B4 A21 CLK_CPU_BCLK#
19 H_NMI LINT1 BCLK1 CLK_CPU_BCLK# 3
19 H_SMI# A3 SMI#
TPAD28 TP9 CPU_RSVD01 M4
TPAD28 TP10 CPU_RSVD02 RSVD#M4
N5 RSVD#N5
TPAD28 TP5 CPU_RSVD03 T2
RESERVED

TPAD28 TP7 CPU_RSVD04 RSVD#T2


V3 RSVD#V3
TPAD28 TP3 CPU_RSVD05 B2
TPAD28 TP8 CPU_RSVD06 RSVD#B2
C3 RSVD#C3
TPAD28 TP4 CPU_RSVD07 D2 layout note:Zo =55
TPAD28 TP12 CPU_RSVD08 RSVD#D2
D22 RSVD#D22 ohm , 0.5" MAX for layout note : Change R237 to 649 ohm if using XTP to ITP adapter 3D3V_S0
TPAD28 TP6 CPU_RSVD09 D3
TPAD28 TP11 CPU_RSVD10 RSVD#D3
F6 RSVD#F6 GTLREF
R29
TPAD28 TP2 CPU_RSVD11 B1 KEY_NC XDP_DBRESET# 1 2
BGA479-SKT6-GPU3 DY
1KR2J-1-GP
1D05V_S0
original value:BGA479-SKT6-GPU1
XDP_TDI 1 2
R31 54D9R2F-L1-GP
XDP_TMS 1 2
B XDP_TDO
R30 54D9R2F-L1-GP B
1 2
R33 54D9R2F-L1-GP
XDP_BPM#5 1 2
R55 54D9R2F-L1-GP

XDP_TRST# 1 2
R28 51R2F-2-GP
1D05V_S0 XDP_TCK 1 2
R42 54D9R2F-L1-GP
1

R123
56R2J-4-GP
DY
2
B

CPU_PROCHOT#
DY
E C OCP# 20
Q8

MMBT3904WT1G-GP
<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Meron(1/3)-AGTL+/XDP
Size Document Number Rev
Custom
Pamirs -3
Date: Wednesday, May 23, 2007 Sheet 4 of 41

5 4 3 2 1
5 4 3 2 1

7 H_D#[0..63] VCC_CORE_S0 VCC_CORE_S0


U53B 2 OF 4
U53C 3 OF 4
H_D#0 E22 Y22 H_D#32
H_D#1 D0# D32# H_D#33
F24 D1# D33# AB24 A7 VCC VCC AB20
H_D#2 E26 V24 H_D#34 A9 AB7
H_D#3 D2# D34# H_D#35 VCC VCC
G22 D3# D35# V26 A10 VCC VCC AC7
H_D#4 F23 V23 H_D#36 A12 AC9
D4# D36# VCC VCC
D D

DATA GRP0
H_D#5 H_D#37

DATA GRP2
G25 D5# D37# T22 A13 VCC VCC AC12
H_D#6 E25 U25 H_D#38 A15 AC13
H_D#7 D6# D38# H_D#39 VCC VCC
E23 D7# D39# U23 A17 VCC VCC AC15
H_D#8 K24 Y25 H_D#40 A18 AC17
H_D#9 D8# D40# H_D#41 VCC VCC
G24 D9# D41# W22 A20 VCC VCC AC18
H_D#10 J24 Y23 H_D#42 B7 AD7
H_D#11 D10# D42# H_D#43 VCC VCC
J23 D11# D43# W24 B9 VCC VCC AD9
H_D#12 H22 W25 H_D#44 B10 AD10
H_D#13 D12# D44# H_D#45 VCC VCC
F26 D13# D45# AA23 B12 VCC VCC AD12
H_D#14 K22 AA24 H_D#46 B14 AD14
H_D#15 D14# D46# H_D#47 VCC VCC
H23 D15# D47# AB25 B15 VCC VCC AD15
H_DSTBN#0 J26 Y26 H_DSTBN#2 B17 AD17
7 H_DSTBN#0 DSTBN0# DSTBN2# H_DSTBN#2 7 VCC VCC
H_DSTBP#0 H26 AA26 H_DSTBP#2 B18 AD18
7 H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 7 VCC VCC
H_DINV#0 H25 U22 H_DINV#2 B20 AE9
7 H_DINV#0 DINV0# DINV2# H_DINV#2 7 VCC VCC
C9 VCC VCC AE10
C10 VCC VCC AE12
H_D#16 N22 AE24 H_D#48 C12 AE13
H_D#17 D16# D48# H_D#49 VCC VCC
K25 D17# D49# AD24 C13 VCC VCC AE15
H_D#18 P26 AA21 H_D#50 C15 AE17
H_D#19 D18# D50# H_D#51 VCC VCC
R23 D19# D51# AB22 C17 VCC VCC AE18
H_D#20 L23 AB21 H_D#52 C18 AE20
H_D#21 D20# D52# H_D#53 VCC VCC
M24 D21# D53# AC26 D9 VCC VCC AF9

DATA GRP1
DATA GRP3
H_D#22 L22 AD20 H_D#54 D10 AF10
H_D#23 D22# D54# H_D#55 VCC VCC
M23 D23# D55# AE22 D12 VCC VCC AF12
H_D#24 P25 AF23 H_D#56 D14 AF14
H_D#25 D24# D56# H_D#57 VCC VCC
P23 D25# D57# AC25 D15 VCC VCC AF15
H_D#26 P22 AE21 H_D#58 D17 AF17
H_D#27 D26# D58# H_D#59 VCC VCC
T24 D27# D59# AD21 D18 VCC VCC AF18
H_D#28 R24 AC22 H_D#60 E7 AF20 1D05V_S0
D28# D60# VCC VCC
C H_D#29
H_D#30
L25
T25
D29#
D30#
D61#
D62#
AD23
AF22
H_D#61
H_D#62
E9
E10
VCC
VCC VCCP G21 1 R113 2 0R0402-PAD
C
H_D#31 N25 AC23 H_D#63 E12 V6 1 R100 2 0R0402-PAD
H_DSTBN#1 D31# D63# H_DSTBN#3 VCC VCCP TC15
7 H_DSTBN#1 L26 DSTBN1# DSTBN3# AE25 H_DSTBN#3 7 E13 VCC VCCP J6
H_DSTBP#1 M26 AF24 H_DSTBP#3 E15 K6
7 H_DSTBP#1 DSTBP1# DSTBP3# H_DSTBP#3 7 VCC VCCP

SE330U2VDM-6-GP
H_DINV#1 N24 AC20 H_DINV#3 E17 M6
7 H_DINV#1 DINV1# DINV3# H_DINV#3 7 VCC VCCP
E18 VCC VCCP J21

1
V_CPU_GTLREF AD26 R26 COMP0 1 2 E20 K21 DY
TPAD28 TP13 TEST1 GTLREF COMP0 COMP1 R131 VCC VCCP
C23 TEST1 MISC COMP1 U26 1 2 27D4R2F-L1-GP F7 VCC VCCP M21
TPAD28 TP16 TEST2 D25 AA1 COMP2 R132 1 2 54D9R2F-L1-GP F9 N21

2
SCD1U16V2KX-3GP TPAD28 TP14 TEST3 TEST2 COMP2 COMP3 R84 VCC VCCP
C24 TEST3 COMP3 Y1 1 2 27D4R2F-L1-GP F10 VCC VCCP N6
1 2 C154 TEST4 AF26 R83 54D9R2F-L1-GP F12 R21
TPAD28 TP1 TEST5 TEST4 H_DPRSTP# VCC VCCP
AF1 TEST5 DPRSTP# E5 H_DPRSTP# 7,19 F14 VCC VCCP R6
TPAD28 TP15 TEST6 A26 B5 H_DPSLP# F15 T21
DY TEST6 DPSLP# H_DPWR#
H_DPSLP# 19 VCC VCCP
DPWR# D24 H_DPWR# 7 SB F17 VCC VCCP T6
CPU_BSEL0 B22 D6 F18 V21
3 CPU_BSEL0 BSEL0 PWRGOOD H_PWRGOOD 19 VCC VCCP 1D5V_S0
CPU_BSEL1 B23 D7 H_CPUSLP# F20 W21 layout note:
3 CPU_BSEL1 BSEL1 SLP# H_CPUSLP# 7 VCC VCCP
CPU_BSEL2 C21 AE6 PSI# AA7
3 CPU_BSEL2 BSEL2 PSI# PSI# 35
AA9
VCC
B26 C156 place C3 near
VCC VCCA
AA10 VCC VCCA C26 PIN B26

1
SCD01U16V2KX-3GP
AA12 VCC CPU_VID[0..6] 35
BGA479-SKT6-GPU3 AA13 AD6 CPU_VID0 C161
VCC VID0 CPU_VID1 SC10U10V5ZY-1GP
AA15 AF5

2
VCC VID1 CPU_VID2
PLACE C173 close to the TEST4 PIN, AA17 VCC VID2 AE5
AA18 AF4 CPU_VID3
make sure TEST3,TEST4,TEST5 trace AA20
VCC VID3
AE3 CPU_VID4
VCC VID4 CPU_VID5
routing is reference to GND and AB9 VCC VID5 AF3
AC10 AE2 CPU_VID6
away other noisy signals AB10
VCC VID6
VCC
AB12 Length match within
B Resistor Placed AB14
VCC
VCC VCCSENSE AF7 VCC_SENSE
VCC_SENSE 35 25 mils . The trace
B
AB15
within 0.5" of CPU AB17
VCC
width/space/other is
VCC VSS_SENSE
pin. Trace should AB18 VCC VSSSENSE AE7 VSS_SENSE 35 20/7/25 .
CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0 be at least 25 mils
away from any other
BGA479-SKT6-GPU3 VCC_SENSE 1 2 VCC_CORE_S0
toggling signal . R99 100R2F-L1-GP-U
166 0 1 1
COMP[0,2] trace
VSS_SENSE 1 2
width is 18 mils. R98 100R2F-L1-GP-U
200 0 1 0
COMP[1,3] trace
width is 4 mils .
Close to CPU pin
within 500mils

1D05V_S0
2

Close to CPU
R352
pin AD26 1KR2F-3-GP
<Core Design>
Z0=55 ohm
A with in A
1 1

V_CPU_GTLREF
500mils . Wistron Corporation
R353 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2KR2F-3-GP
Title
2

Meron(2/3)-AGTL+/PWR
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 5 of 41

5 4 3 2 1
5 4 3 2 1

VCC_CORE_S0

3/5

1
C111 C120
DY C127 C130
DY C135 C142 C146
DY C144 C828

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP
U53D 4 OF 4 Place these capacitors on L1

2
A4 P6
(North side ,Secondary Layer)
VSS VSS
D A8
A11
VSS VSS P21
P24
D
VSS VSS
A14 VSS VSS R2
A16 VSS VSS R5
A19 VSS VSS R22
A23 VSS VSS R25
AF2 T1 VCC_CORE_S0
VSS VSS
B6 VSS VSS T4
B8 VSS VSS T23
B11 VSS VSS T26
B13 VSS VSS U3 3/5

1
B16 VSS VSS U6
C139 C131
DY C124
DY C145 C125 C136 C826
DY C117 C827
B19 VSS VSS U21

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP
B21 U24 Place these capacitors on L1

2
VSS VSS
B24 V2
C5
VSS VSS
V5 (North side ,Secondary Layer)
VSS VSS
C8 VSS VSS V22
C11 VSS VSS V25
C14 VSS VSS W1
C16 VSS VSS W4
C19 VSS VSS W23
C2 VSS VSS W26
C22 VSS VSS Y3
C25 VSS VSS Y6
D1 VSS VSS Y21
D4 VSS VSS Y24
D8 VSS VSS AA2
D11 VSS VSS AA5
D13 VSS VSS AA8
C D16
D19
VSS VSS AA11
AA14
C
D23
D26
VSS
VSS
VSS
VSS AA16
AA19
Mid Frequencd
VSS VSS
E3
E6
VSS
VSS
VSS
VSS
AA22
AA25 Decoupling
E8 VSS VSS AB1
E11 VSS VSS AB4
E14 VSS VSS AB8
E16 VSS VSS AB11
E19 VSS VSS AB13
E21 VSS VSS AB16
E24 VSS VSS AB19
F5 VSS VSS AB23
F8 VSS VSS AB26
F11 VSS VSS AC3
F13 VSS VSS AC6
F16 VSS VSS AC8
F19 VSS VSS AC11
F2 VSS VSS AC14
F22 VSS VSS AC16
F25 VSS VSS AC19
G4 VSS VSS AC21
G1 VSS VSS AC24
G23 VSS VSS AD2
G26 VSS VSS AD5
H3 VSS VSS AD8
H6 VSS VSS AD11
H21 VSS VSS AD13
H24 AD16
B J2
VSS
VSS
VSS
VSS AD19
1D05V_S0
B
J5 VSS VSS AD22
J22 VSS VSS AD25
J25 VSS VSS AE1
K1 VSS VSS AE4
K4 VSS VSS AE8
K23 VSS VSS AE11
K26 VSS VSS AE14 Place these
2

2
L3 AE16
L6
VSS VSS
AE19 C107 C109 C108 C150 C149 C148 inside socket
VSS VSS SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
L21 AE23 cavity on L1
1

1
VSS VSS
L24 AE26
M2
VSS VSS
A2
(North side
VSS VSS
M5 VSS VSS AF6 Secondary)
M22 VSS VSS AF8
M25 VSS VSS AF11
N1 VSS VSS AF13
N4 VSS VSS AF16
N23 VSS VSS AF19
N26 VSS VSS AF21
P3 VSS VSS A25
VSS AF25

BGA479-SKT6-GPU3

<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Meron(3/3)-GND&Bypass
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 6 of 41

5 4 3 2 1
U16A 1 OF 10
5 H_D#[0..63]
5 4 H_A#[3..35] 4
3 2 1
H_D#0 E2 J13 H_A#3
H_D#1 H_D#0 H_A#3 H_A#4

SC2D2U10V3ZY-1GP
G2 H_D#1 H_A#4 B11
H_D#2 G7 C11 H_A#5 FOR Calero: 80.6 ohm
H_D#2 H_A#5

SCD01U25V2KX-3GP
H_D#3 M6 M11 H_A#6 U16B 2 OF 10 Crestline: 20 ohm
H_D#4 H_D#3 H_A#6 H_A#7 1D8V_S3
H7 H_D#4 H_A#7 C15
H_D#5 H3 F16 H_A#8 P36 AV29 M_CLK_DDR0
H_D#6 H_D#5 H_A#8 H_A#9 RSVD#P36 SM_CK0 M_CLK_DDR1 M_CLK_DDR0 13
G4 H_D#6 H_A#9 L13 P37 RSVD#P37 SM_CK1 BB23 M_CLK_DDR1 13

1
H_D#7 F3 G17 H_A#10 R35 BA25 M_CLK_DDR2
H_D#7 H_A#10 RSVD#R35 SM_CK3 M_CLK_DDR2 14

C112

C115
H_D#8 N8 C14 H_A#11 R102 N35 AV23 M_CLK_DDR3
H_D#9 H_D#8 H_A#11 H_A#12 1KR2F-3-GP RSVD#N35 SM_CK4 M_CLK_DDR3 14
H2 K16 AR12

2
H_D#10 H_D#9 H_A#12 H_A#13 RSVD#AR12
M10 H_D#10 H_A#13 B13 AR13 RSVD#AR13 SM_CK#0 AW30 M_CLK_DDR#0 M_CLK_DDR#0 13
H_D#11 N12 L16 H_A#14 AM12 BA23 M_CLK_DDR#1

2
H_D#12 H_D#11 H_A#14 H_A#15 SM_RCOMP_VOH RSVD#AM12 SM_CK#1 M_CLK_DDR#1 13
N9 H_D#12 H_A#15 J17 AN13 RSVD#AN13 SM_CK#3 AW25 M_CLK_DDR#2 M_CLK_DDR#2 14
H_D#13 H5 B14 H_A#16 J12 AW23 M_CLK_DDR#3
H_D#13 H_A#16 RSVD#J12 SM_CK#4 M_CLK_DDR#3 14

1
H_D#14 P13 K19 H_A#17 AR37
D H_D#15 K9
H_D#14 H_A#17
P15 H_A#18 R104 AM36
RSVD#AR37
BE29 DDR_CKE0_DIMMA D

DDR MUXING
H_D#16 H_D#15 H_A#18 H_A#19 3K01R2F-3-GP RSVD#AM36 SM_CKE0 DDR_CKE0_DIMMA 13
M2 H_D#16 H_A#19 R17 AL36 RSVD#AL36 SM_CKE1 AY32 DDR_CKE1_DIMMA DDR_CKE1_DIMMA 13
H_D#17 W10 B16 H_A#20 AM37 BD39 DDR_CKE2_DIMMB
H_D#18 H_D#17 H_A#20 H_A#21 RSVD#AM37 SM_CKE3 DDR_CKE2_DIMMB 14
Y8 H20 D20 BG37 DDR_CKE3_DIMMB

2
H_D#19 H_D#18 H_A#21 H_A#22 SM_RCOMP_VOL RSVD#D20 SM_CKE4 DDR_CKE3_DIMMB 14
V4 H_D#19 H_A#22 L19
H_D#20 M3 D17 H_A#23 BG20 DDR_CS0_DIMMA#
H_D#20 H_A#23 SM_CS#0 DDR_CS0_DIMMA# 13

1
SCD01U25V2KX-3GP
H_D#21 J1 M17 H_A#24 BK16 DDR_CS1_DIMMA#
H_D#22 H_D#21 H_A#24 H_A#25 R107 SM_CS#1 DDR_CS1_DIMMA# 13
N5 H_D#22 H_A#25 N16 SM_CS#2 BG16 DDR_CS2_DIMMB# DDR_CS2_DIMMB# 14

2
1KR2F-3-GP

SC2D2U10V3ZY-1GP
H_D#23 N3 J19 H_A#26 H10 BE13 DDR_CS3_DIMMB#
H_D#23 H_A#26 RSVD#H10 SM_CS#3 DDR_CS3_DIMMB# 14

C126

C123
H_D#24 W6 B18 H_A#27 B51
H_D#24 H_A#27 RSVD#B51

RSVD
H_D#25 W9 E19 H_A#28 BJ20 BH18 M_ODT0

2
H_D#26 H_D#25 H_A#28 H_A#29 RSVD#BJ20 SM_ODT0 M_ODT1 M_ODT0 13
N2 H_D#26 H_A#29 B17 BK22 RSVD#BK22 SM_ODT1 BJ15 M_ODT1 13
H_D#27 Y7 B15 H_A#30 BF19 BJ14 M_ODT2
H_D#28 H_D#27 H_A#30 H_A#31 RSVD#BF19 SM_ODT2 M_ODT3 M_ODT2 14
Y9 H_D#28 H_A#31 E17 BH20 RSVD#BH20 SM_ODT3 BE16 M_ODT3 14
H_D#29 P4 C18 H_A#32 BK18
H_D#30 H_D#29 H_A#32 H_A#33 RSVD#BK18 SM_RCOMP_VOH
W3 H_D#30 H_A#33 A19 BJ18 RSVD#BJ18 SM_RCOMP_VOH BK31
H_D#31 N1 B19 H_A#34 BF23 BL31 SM_RCOMP_VOL 1D8V_S3
H_D#32 H_D#31 H_A#34 H_A#35 RSVD#BF23 SM_RCOMP_VOL
AD12 H_D#32 H_A#35 N19 BG23 RSVD#BG23
H_D#33 AE3 BC23 BL15 SM_RCOMP 1 2
H_D#34 H_D#33 H_ADS# RSVD#BC23 SM_RCOMP SM_RCOMP# R111 1
AD9 G12 BD24 BK14 2 20R2F-GP
HOST
H_D#34 H_ADS# H_ADS# 4 RSVD#BD24 SM_RCOMP#
H_D#35 AC9 H17 H_ADSTB#0 DDR_A_MA14 BJ29 R342 20R2F-GP
H_D#35 H_ADSTB#0 H_ADSTB#0 4 13 DDR_A_MA14 RSVD#BJ29
H_D#36 AC7 G20 H_ADSTB#1 DDR_B_MA14 BE24 AR49 DDR_VREF_S3
H_D#36 H_ADSTB#1 H_ADSTB#1 4 14 DDR_B_MA14 RSVD#BE24 SM_VREF#AR49
H_D#37 AC14 C8 H_BNR# BH39 AW4 DDR_VREF_S3
H_D#37 H_BNR# H_BNR# 4 RSVD#BH39 SM_VREF#AW4
H_D#38 AD11 E8 H_BPRI# AW20
H_D#39 H_D#38 H_BPRI# H_BR0# H_BPRI# 4 3D3V_S0 RSVD#AW20
AC11 H_D#39 H_BREQ# F12 H_BR0# 4 BK20 RSVD#BK20
H_D#40 AB2 D6 H_DEFER# C48
H_D#41 H_D#40 H_DEFER# H_DBSY# H_DEFER# 4 PM_EXTTS#0 RSVD#C48 CLK_MCH_DREFCLK
AD7 H_D#41 H_DBSY# C10 H_DBSY# 4 1 2 D47 RSVD#D47 DPLL_REF_CLK B42 CLK_MCH_DREFCLK 3
H_D#42 AB1 AM5 CLK_MCH_BCLK R326 10KR2J-3-GP B44 C42 CLK_MCH_DREFCLK#
H_D#42 HPLL_CLK CLK_MCH_BCLK 3 RSVD#B44 DPLL_REF_CLK# CLK_MCH_DREFCLK# 3
H_D#43 Y3 AM7 CLK_MCH_BCLK# C44 H48 MCH_SSCDREFCLK
H_D#43 HPLL_CLK# CLK_MCH_BCLK# 3 RSVD#C44 DPLL_REF_SSCLK MCH_SSCDREFCLK 3
H_D#44 AC6 H8 H_DPWR# A35 H47 MCH_SSCDREFCLK#
H_D#44 H_DPWR# H_DPWR# 5 RSVD#A35 DPLL_REF_SSCLK# MCH_SSCDREFCLK# 3
H_D#45 AE2 K7 H_DRDY# PM_EXTTS#1 1 2 B37
H_D#45 H_DRDY# H_DRDY# 4 RSVD#B37
H_D#46 AC5 E4 H_HIT# R327 10KR2J-3-GP B36 K44 CLK_MCH_3GPLL
H_D#46 H_HIT# H_HIT# 4 RSVD#B36 PEG_CLK CLK_MCH_3GPLL 3
C H_D#47 AG3 C6 H_HITM# B34 K45 CLK_MCH_3GPLL# C

CLK
H_D#47 H_HITM# H_HITM# 4 RSVD#B34 PEG_CLK# CLK_MCH_3GPLL# 3
H_D#48 AJ9 G10 H_LOCK# C34
H_D#48 H_LOCK# H_LOCK# 4 RSVD#C34
H_D#49 AH8 B7 H_TRDY# CLKREQ#_B 1 2
H_D#50 H_D#49 H_TRDY# H_TRDY# 4 R91 10KR2J-3-GP
AJ14 H_D#50
1D05V_S0 H_D#51 AE9
H_D#52 H_D#51 DMI_TXN0
AE11 H_D#52 DMI_RXN0 AN47 DMI_TXN0 20
H_D#53 AH12 AJ38 DMI_TXN1
H_D#53 DMI_RXN1 DMI_TXN1 20
H_D#54 AJ5 K5 H_DINV#0 MCH_CLKSEL0 P27 AN42 DMI_TXN2
H_D#54 H_DINV#0 H_DINV#0 5 3 MCH_CLKSEL0 CFG0 DMI_RXN2 DMI_TXN2 20
H_D#55 AH5 L2 H_DINV#1 MCH_CLKSEL1 N27 AN46 DMI_TXN3
H_D#55 H_DINV#1 H_DINV#1 5 3 MCH_CLKSEL1 CFG1 DMI_RXN3 DMI_TXN3 20
H_D#56 AJ6 AD13 H_DINV#2 MCH_CLKSEL2 N24
H_D#56 H_DINV#2 H_DINV#2 5 3 MCH_CLKSEL2 CFG2
1

R129 R128 H_D#57 AE7 AE13 H_DINV#3 C21 AM47 DMI_TXP0

DMI
H_D#57 H_DINV#3 H_DINV#3 5 CFG3 DMI_RXP0 DMI_TXP0 20
H_D#58 AJ7 C23 AJ39 DMI_TXP1
H_D#58 CFG4 DMI_RXP1 DMI_TXP1 20
H_D#59 AJ2 M7 H_DSTBN#0 TP43 CFG5 F23 AN41 DMI_TXP2
H_D#59 H_DSTBN#0 H_DSTBN#0 5 CFG5 DMI_RXP2 DMI_TXP2 20
54D9R2F-L1-GP

54D9R2F-L1-GP

H_D#60 AE5 K3 H_DSTBN#1 TP48 CFG6 N23 AN45 DMI_TXP3


H_D#60 H_DSTBN#1 H_DSTBN#1 5 CFG6 DMI_RXP3 DMI_TXP3 20
H_D#61 AJ3 AD2 H_DSTBN#2 CFG[17:3] have internal pull up TP45 CFG7 G23
H_DSTBN#2 5
2

H_D#61 H_DSTBN#2 CFG7

CFG
H_D#62 AH2 AH11 H_DSTBN#3 CFG[19:18] have internal pull down TP49 CFG8 J20 AJ46 DMI_RXN0
H_D#62 H_DSTBN#3 H_DSTBN#3 5 CFG8 DMI_TXN0 DMI_RXN0 20
H_D#63 AH13 TP50 CFG9 C20 AJ41 DMI_RXN1
H_D#63 H_DSTBP#0 CFG10 CFG9 DMI_TXN1 DMI_RXN2 DMI_RXN1 20
H_DSTBP#0 L7 H_DSTBP#0 5 TP42 R24 CFG10 DMI_TXN2 AM40 DMI_RXN2 20
K2 H_DSTBP#1 TP46 CFG11 L23 AM44 DMI_RXN3
H_DSTBP#1 H_DSTBP#1 5 CFG11 DMI_TXN3 DMI_RXN3 20
H_SWNG B3 AC2 H_DSTBP#2 From Astro demo schematic TP44 CFG12 J23
H_SWING H_DSTBP#2 H_DSTBP#2 5 CFG12
H_RCOMP C2 AJ10 H_DSTBP#3 TP51 CFG13 E23 AJ47 DMI_RXP0
H_RCOMP H_DSTBP#3 H_DSTBP#3 5 CFG13 DMI_TXP0 DMI_RXP0 20
E20 AJ42 DMI_RXP1
H_SCOMP H_REQ#0 CFG14 DMI_TXP1 DMI_RXP2 DMI_RXP1 20
W1 H_SCOMP H_REQ#0 M14 H_REQ#0 4 K23 CFG15 DMI_TXP2 AM39 DMI_RXP2 20
H_SCOMP# W2 E13 H_REQ#1 TP47 CFG16 M20 AM43 DMI_RXP3
H_SCOMP# H_REQ#1 H_REQ#1 4 CFG16 DMI_TXP3 DMI_RXP3 20
A11 H_REQ#2 M24
H_REQ#2 H_REQ#2 4 CFG17
H_RESET# B6 H13 H_REQ#3 TP37 CFG18 L32
4 H_RESET# H_CPURST# H_REQ#3 H_REQ#3 4 CFG18
H_CPUSLP# E5 B12 H_REQ#4 TP36 CFG19 N33
5 H_CPUSLP# H_CPUSLP# H_REQ#4 H_REQ#4 4 CFG19
TP39 CFG20 L35

GRAPHICS VID
H_RS#0 CFG20
H_RS#0 E12 H_RS#0 4
H_VREF B9 D7 H_RS#1 E35 DFGT_VID0
H_AVREF H_RS#1 H_RS#1 4 GFX_VID0 TP41
A9 D8 H_RS#2 A39 DFGT_VID1
H_DVREF H_RS#2 H_RS#2 4 GFX_VID1 TP34
PM_BMBUSY# G41 C38 DFGT_VID2
20 PM_BMBUSY# PM_BM_BUSY# GFX_VID2 TP35
H_DPRSTP# DFGT_VID3
B 5,19 H_DPRSTP#
13 PM_EXTTS#0
PM_EXTTS#0
L39
L36
PM_DPRSTP#
PM_EXT_TS#0
GFX_VID3
GFX_VR_EN
B39
E36 DFGT_VR_EN
TP31
TP33 1D25V_S0
B

PM
PM_EXTTS#1 J36
14 PM_EXTTS#1 PM_POK_R PM_EXT_TS#1
layout note : AW49 PWROK
PLT_RST_R# AV20
Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces H_THERMTRIP# N20
RSTIN#
4,19 H_THERMTRIP# DPRSLPVR THERMTRIP#
20,35 DPRSLPVR G36 DPRSLPVR

2
R68 0R2J-2-GP R71
Layout Note : AM49 1KR2F-3-GP
CL_CLK CL_CLK0 20
1 DY 2 PM_POK_R BJ51 AK50
H_RCOMP / H_VREF / H_SWNG 20,22 PM_PWROK NC#BJ51 CL_DATA CL_DATA0 20
BK51 AT43 CLPWROK_MCH 1 R337 2

ME
VGATE_PWRGD 20,35

1
NC#BK51 CL_PWROK 0R0402-PAD
trace width and spacing is 10/20 1D05V_S0 20,35 VGATE_PWRGD 1 2 BK50 NC#BK50 CL_RST# AN49 CL_RST# 20
BL50 AM50 CL_VREF
R70 0R0402-PAD NC#BL50 CL_VREF
BL49 NC#BL49

1
1D05V_S0 BL3 NC#BL3

1
BL2 R72
NC#BL2

NC
BK1 C63 392R2F-GP
NC#BK1
1

BJ1 H35 ICH_SDVO_CLK


TP32

2
NC#BJ1 SDVO_CTRL_CLK

SCD1U16V2KX-3GP
R115 R120 E1 K36 ICH_SDVO_DATA
TP38

2
1KR2F-3-GP 267R2F-1-GP NC#E1 SDVO_CTRL_DATA
R343 A5 NC#A5 CLKREQ# G39 CLKREQ#_B 3
C51 G40 MCH_ICH_SYNC#
PLT_RST_R# NC#C51 ICH_SYNC# MCH_ICH_SYNC# 20
1 2 B50

MISC
2

H_VREF H_RCOMP H_SWNG PLT_RST1# 18,20,26,28,31,33,34 NC#B50


A50 NC#A50
SB 0823 100R2J-2-GP A49 NC#A49 TEST1 A37 TEST1_GMCH 1 2
1

BK2 NC#BK2 TEST2 R32 TEST2_GMCH1 2 R92


1

R116 C151 R127 R332 0R2J-2-GP


SCD1U16V2ZY-2GP

2KR2F-3-GP 24D9R2F-L-GP C153


2

R121 SCD1U16V2ZY-2GP 20KR2J-L2-GP


2

113R2F-GP
2

Layout Note :
A Layout Note : Place C33 near
pin B3 of NB
<Core Design> A
Place C32 within 100 mils of NB 0921 P/N CHANGE TO 71.CREST.M02
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRESTLINE(1/6)-AGTL+/DMI/DDR2
Size Document Number Rev
Custom
Pamirs -3
Date: Friday, May 18, 2007 Sheet 7 of 41

5 4 3 2 1
5 4 3 2 1

DDR_A_D[0..63] 13
DDR_B_D[0..63] 14
DDR_A_BS[0..2] 13
DDR_B_BS[0..2] 14
DDR_A_DM[0..7] 13
D DDR_B_DM[0..7] 14 D
DDR_A_DQS[0..7] 13
DDR_B_DQS[0..7] 14
DDR_A_DQS#[0..7] 13
DDR_B_DQS#[0..7] 14
DDR_A_MA[0..13] 13
DDR_B_MA[0..13] 14

U16D 4 OF 10 U16E 5 OF 10

DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0


DDR_A_D1 SA_DQ0 SA_BS0 DDR_A_BS1 DDR_B_D1 SB_DQ0 SB_BS0 DDR_B_BS1
AW44 SA_DQ1 SA_BS1 BK19 AR51 SB_DQ1 SB_BS1 BG18
DDR_A_D2 BA45 BF29 DDR_A_BS2 DDR_B_D2 AW50 BG36 DDR_B_BS2
DDR_A_D3 SA_DQ2 SA_BS2 DDR_B_D3 SB_DQ2 SB_BS2
AY46 SA_DQ3 AW51 SB_DQ3
DDR_A_D4 AR41 BL17 DDR_A_CAS# DDR_B_D4 AN51 BE17 DDR_B_CAS#
DDR_A_D5 SA_DQ4 SA_CAS# DDR_A_CAS# 13 DDR_B_D5 SB_DQ4 SB_CAS# DDR_B_CAS# 14
AR45 SA_DQ5 AN50 SB_DQ5
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D7 SA_DQ6 SA_DM0 DDR_A_DM1 DDR_B_D7 SB_DQ6 SB_DM0 DDR_B_DM1
AW47 SA_DQ7 SA_DM1 BD44 AV49 SB_DQ7 SB_DM1 BD49
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D8 BA50 BK45 DDR_B_DM2
DDR_A_D9 SA_DQ8 SA_DM2 DDR_A_DM3 DDR_B_D9 SB_DQ8 SB_DM2 DDR_B_DM3
BF48 SA_DQ9 SA_DM3 AW38 BB50 SB_DQ9 SB_DM3 BL39
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D10 BA49 BH12 DDR_B_DM4
DDR_A_D11 SA_DQ10 SA_DM4 DDR_A_DM5 DDR_B_D11 SB_DQ10 SB_DM4 DDR_B_DM5
BJ45 SA_DQ11 SA_DM5 BG8 BE50 SB_DQ11 SB_DM5 BJ7
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D12 BA51 BF3 DDR_B_DM6
DDR_A_D13 SA_DQ12 SA_DM6 DDR_A_DM7 DDR_B_D13 SB_DQ12 SB_DM6 DDR_B_DM7
BG50 SA_DQ13 SA_DM7 AN6 AY49 SB_DQ13 SB_DM7 AW2
DDR_A_D14 BH49 DDR_B_D14 BF50
DDR_A_D15 SA_DQ14 DDR_A_DQS0 DDR_B_D15 SB_DQ14 DDR_B_DQS0
BE45 SA_DQ15 SA_DQS0 AT46 BF49 SB_DQ15 SB_DQS0 AT50
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D16 BJ50 BD50 DDR_B_DQS1
DDR_A_D17 SA_DQ16 SA_DQS1 DDR_A_DQS2 DDR_B_D17 SB_DQ16 SB_DQS1 DDR_B_DQS2
BE44 SA_DQ17 SA_DQS2 BB43 BJ44 SB_DQ17 SB_DQS2 BK46
C DDR_A_D18
DDR_A_D19
BG42
BE40
SA_DQ18
SA_DQ19
SA_DQS3
SA_DQS4
BC37
BB16
DDR_A_DQS3
DDR_A_DQS4
DDR_B_D18
DDR_B_D19
BJ43
BL43
SB_DQ18
SB_DQ19
SB_DQS3
SB_DQS4
BK39
BJ12
DDR_B_DQS3
DDR_B_DQS4 C
DDR_A_D20 BF44 BH6 DDR_A_DQS5 DDR_B_D20 BK47 BL7 DDR_B_DQS5
DDR_A_D21 SA_DQ20 SA_DQS5 DDR_A_DQS6 DDR_B_D21 SB_DQ20 SB_DQS5 DDR_B_DQS6
BH45 SA_DQ21 SA_DQS6 BB2 BK49 SB_DQ21 SB_DQS6 BE2
DDR_A_D22 BG40 AP3 DDR_A_DQS7 DDR_B_D22 BK43 AV2 DDR_B_DQS7
DDR_A_D23 SA_DQ22 SA_DQS7 DDR_A_DQS#0 DDR_B_D23 SB_DQ22 SB_DQS7 DDR_B_DQS#0
BF40 AT47 BK42 AU50
DDR SYSTEM MEMORRY A

DDR_A_D24 SA_DQ23 SA_DQS#0 DDR_A_DQS#1 DDR_B_D24 SB_DQ23 SB_DQS#0 DDR_B_DQS#1

DDR SYSTEM MEMORY B


AR40 SA_DQ24 SA_DQS#1 BD47 BJ41 SB_DQ24 SB_DQS#1 BC50
DDR_A_D25 AW40 BC41 DDR_A_DQS#2 DDR_B_D25 BL41 BL45 DDR_B_DQS#2
DDR_A_D26 SA_DQ25 SA_DQS#2 DDR_A_DQS#3 DDR_B_D26 SB_DQ25 SB_DQS#2 DDR_B_DQS#3
AT39 SA_DQ26 SA_DQS#3 BA37 BJ37 SB_DQ26 SB_DQS#3 BK38
DDR_A_D27 AW36 BA16 DDR_A_DQS#4 DDR_B_D27 BJ36 BK12 DDR_B_DQS#4
DDR_A_D28 SA_DQ27 SA_DQS#4 DDR_A_DQS#5 DDR_B_D28 SB_DQ27 SB_DQS#4 DDR_B_DQS#5
AW41 SA_DQ28 SA_DQS#5 BH7 BK41 SB_DQ28 SB_DQS#5 BK7
DDR_A_D29 AY41 BC1 DDR_A_DQS#6 DDR_B_D29 BJ40 BF2 DDR_B_DQS#6
DDR_A_D30 SA_DQ29 SA_DQS#6 DDR_A_DQS#7 DDR_B_D30 SB_DQ29 SB_DQS#6 DDR_B_DQS#7
AV38 SA_DQ30 SA_DQS#7 AP2 BL35 SB_DQ30 SB_DQS#7 AV3
DDR_A_D31 AT38 DDR_B_D31 BK37
DDR_A_D32 SA_DQ31 DDR_A_MA0 DDR_B_D32 SB_DQ31 DDR_B_MA0
AV13 SA_DQ32 SA_MA0 BJ19 BK13 SB_DQ32 SB_MA0 BC18
DDR_A_D33 AT13 BD20 DDR_A_MA1 DDR_B_D33 BE11 BG28 DDR_B_MA1
DDR_A_D34 SA_DQ33 SA_MA1 DDR_A_MA2 DDR_B_D34 SB_DQ33 SB_MA1 DDR_B_MA2
AW11 SA_DQ34 SA_MA2 BK27 BK11 SB_DQ34 SB_MA2 BG25
DDR_A_D35 AV11 BH28 DDR_A_MA3 DDR_B_D35 BC11 AW17 DDR_B_MA3
DDR_A_D36 SA_DQ35 SA_MA3 DDR_A_MA4 DDR_B_D36 SB_DQ35 SB_MA3 DDR_B_MA4
AU15 SA_DQ36 SA_MA4 BL24 BC13 SB_DQ36 SB_MA4 BF25
DDR_A_D37 AT11 BK28 DDR_A_MA5 DDR_B_D37 BE12 BE25 DDR_B_MA5
DDR_A_D38 SA_DQ37 SA_MA5 DDR_A_MA6 DDR_B_D38 SB_DQ37 SB_MA5 DDR_B_MA6
BA13 SA_DQ38 SA_MA6 BJ27 BC12 SB_DQ38 SB_MA6 BA29
DDR_A_D39 BA11 BJ25 DDR_A_MA7 DDR_B_D39 BG12 BC28 DDR_B_MA7
DDR_A_D40 SA_DQ39 SA_MA7 DDR_A_MA8 DDR_B_D40 SB_DQ39 SB_MA7 DDR_B_MA8
BE10 SA_DQ40 SA_MA8 BL28 BJ10 SB_DQ40 SB_MA8 AY28
DDR_A_D41 BD10 BA28 DDR_A_MA9 DDR_B_D41 BL9 BD37 DDR_B_MA9
DDR_A_D42 SA_DQ41 SA_MA9 DDR_A_MA10 DDR_B_D42 SB_DQ41 SB_MA9 DDR_B_MA10
BD8 SA_DQ42 SA_MA10 BC19 BK5 SB_DQ42 SB_MA10 BG17
DDR_A_D43 AY9 BE28 DDR_A_MA11 DDR_B_D43 BL5 BE37 DDR_B_MA11
DDR_A_D44 SA_DQ43 SA_MA11 DDR_A_MA12 DDR_B_D44 SB_DQ43 SB_MA11 DDR_B_MA12
BG10 SA_DQ44 SA_MA12 BG30 BK9 SB_DQ44 SB_MA12 BA39
DDR_A_D45 AW9 BJ16 DDR_A_MA13 DDR_B_D45 BK10 BG13 DDR_B_MA13
DDR_A_D46 SA_DQ45 SA_MA13 DDR_B_D46 SB_DQ45 SB_MA13
BD7 SA_DQ46 BJ8 SB_DQ46
DDR_A_D47 BB9 DDR_B_D47 BJ6 AV16 DDR_B_RAS#
B DDR_A_D48 BB5
SA_DQ47
SA_DQ48 SA_RAS# BE18 DDR_A_RAS#
DDR_A_RAS# 13
DDR_B_D48 BF4
SB_DQ47
SB_DQ48
SB_RAS#
SB_RCVEN# AY18 SB_RCVEN#
TP53
DDR_B_RAS# 14 B
DDR_A_D49 AY7 AY20 SA_RCVEN# DDR_B_D49 BH5
SA_DQ49 SA_RCVEN# TP52 SB_DQ49
DDR_A_D50 AT5 DDR_B_D50 BG1 BC17 DDR_B_WE#
DDR_A_D51 SA_DQ50 DDR_A_WE# DDR_B_D51 SB_DQ50 SB_WE# DDR_B_WE# 14
AT7 SA_DQ51 SA_WE# BA19 DDR_A_WE# 13 BC2 SB_DQ51
DDR_A_D52 AY6 DDR_B_D52 BK3
DDR_A_D53 SA_DQ52 DDR_B_D53 SB_DQ52
BB7 SA_DQ53 BE4 SB_DQ53
DDR_A_D54 AR5 DDR_B_D54 BD3
DDR_A_D55 SA_DQ54 DDR_B_D55 SB_DQ54
AR8 SA_DQ55 BJ2 SB_DQ55
DDR_A_D56 AR9 DDR_B_D56 BA3
DDR_A_D57 SA_DQ56 DDR_B_D57 SB_DQ56
AN3 SA_DQ57 BB3 SB_DQ57
DDR_A_D58 AM8 DDR_B_D58 AR1
DDR_A_D59 SA_DQ58 DDR_B_D59 SB_DQ58
AN10 SA_DQ59 AT3 SB_DQ59
DDR_A_D60 AT9 DDR_B_D60 AY2
DDR_A_D61 SA_DQ60 DDR_B_D61 SB_DQ60
AN9 SA_DQ61 AY3 SB_DQ61
DDR_A_D62 AM9 DDR_B_D62 AU2
DDR_A_D63 SA_DQ62 DDR_B_D63 SB_DQ62
AN11 SA_DQ63 AT2 SB_DQ63

<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRESTLINE(2/6)-DDR2 A/B CH
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 8 of 41

5 4 3 2 1
5 4 1D05V_S0 3 2 1
For Crestline : 2.4 Kohm 1 2
For Calero : 1.5Kohm U16C 3 OF 10
R325 24D9R2F-L-GP
PEGCOMP trace
Strap Pin Table
J40 N43 PEGCOMP width and spacing 010 = FSB 800MHz
16 LBKLT_CTL RN54 L_BKLT_CTRL PEG_COMPI
31 BLON_IN H39 L_BKLT_EN PEG_COMPO M43 is 20/25 mils. CFG[2:0] FSB Freq select 011 = FSB 667MHz
3D3V_S0 3 2 E39 L_CTRL_CLK Others = Reserved
4 1 E40 L_CTRL_DATA
16 LDDC_CLK DY C37 L_DDC_CLK PEG_RX#0 J51
16 LDDC_DATA SRN10KJ-5-GP D35 L_DDC_DATA PEG_RX#1 L51 CFG5 (DMI select) 0 = DMI x 2
16 LCDVDD_EN K40 L_VDD_EN PEG_RX#2 N47 1 = DMI x 4 *
PEG_RX#3 T45
1 2 LVDS_IBG L41 T50
LVDS_IBG PEG_RX#4
D R321 2K4R2F-GP
TP30 L43
N41
LVDS_VBG PEG_RX#5 U40
Y44
CFG6 Reserved D
LVDS_VREFH PEG_RX#6
N40 LVDS_VREFL PEG_RX#7 Y40
16 VGA_TXACLK- D46 LVDSA_CLK# PEG_RX#8 AB51 0 = Reserved
16 VGA_TXACLK+ C45 LVDSA_CLK PEG_RX#9 W49 CFG7 (CPU Strap) 1 = Mobile CPU *

LVDS
16 VGA_TXBCLK- D44 LVDSB_CLK# PEG_RX#10 AD44
16 VGA_TXBCLK+ E42 LVDSB_CLK PEG_RX#11 AD40
PEG_RX#12 AG46 0 = Normal mode
16 VGA_TXAOUT0- G51 LVDSA_DATA#0 PEG_RX#13 AH49 CFG8 (Low power PCIE) 1 = Low Power mode *
16 VGA_TXAOUT1- E51 LVDSA_DATA#1 PEG_RX#14 AG45
16 VGA_TXAOUT2- F49 LVDSA_DATA#2 PEG_RX#15 AG41
CFG9 0 = Reverse Lane
PEG_RX0 J50 (PCIE Graphics Lane Reversal) 1 = Normal Operation *
16 VGA_TXAOUT0+ G50 LVDSA_DATA0 PEG_RX1 L50
16 VGA_TXAOUT1+ E50 LVDSA_DATA1 PEG_RX2 M47
16 VGA_TXAOUT2+ F48 LVDSA_DATA2 PEG_RX3 U44 CFG[11:10] Reserved
PEG_RX4 T49
PEG_RX5 T41
16 VGA_TXBOUT0- G44 LVDSB_DATA#0 PEG_RX6 W45 00 = Reserved
16 VGA_TXBOUT1- B47 LVDSB_DATA#1 PEG_RX7 W41 01 = XOR Mode Enabled
B45 AB50 CFG[13:12] (XOR/ALLZ) 10 = All Z Mode Enabled

PCI_EXPRESS GRAPHICS
16 VGA_TXBOUT2- LVDSB_DATA#2 PEG_RX8
PEG_RX9 Y48 11 = Normal Operation (Default)*
PEG_RX10 AC45
16 VGA_TXBOUT0+ E44 LVDSB_DATA0 PEG_RX11 AC41
16 VGA_TXBOUT1+ A47 LVDSB_DATA1 PEG_RX12 AH47 CFG[15:14] Reserved
16 VGA_TXBOUT2+ A45 LVDSB_DATA2 PEG_RX13 AG49
PEG_RX14 AH45
M_COMP AG42 0 = Disable
15 M_COMP M_LUMA PEG_RX15
15 M_LUMA CFG16 (FSB Dynamic ODT) 1 = Enable *
C 15 M_CRMA
M_CRMA
E27 TVA_DAC
PEG_TX#0
PEG_TX#1
N45
U39
C
1

G27 TVB_DAC PEG_TX#2 U47 CFG[18:17] Reversed


150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

K27 TVC_DAC PEG_TX#3 N51


R110

R109

R108

PEG_TX#4 R50

TV
F27 TVA_RTN PEG_TX#5 T42 SDVO_CTRLDATA 0 = No SDVO Device Present *
J27 Y43 1 = SDVO Device Present
2

TVB_RTN PEG_TX#6
L27 TVC_RTN PEG_TX#7 W46
PEG_TX#8 W38
M35 TV_DCONSEL0 PEG_TX#9 AD39 0 = Normal Operation *
3D3V_S0 1 2 P33 TV_DCONSEL1 PEG_TX#10 AC46 CFG19(DMI Lane Reversal) (Lane number in Order)
DY PEG_TX#11 AC49
R101 2K2R2J-2-GP AC42 1 = Reverse lane
M_BLUE PEG_TX#12
15 M_BLUE PEG_TX#13 AH39
M_GREEN AE49
15 M_GREEN M_RED PEG_TX#14
15 M_RED PEG_TX#15 AH44 0 = Only PCIE or SDVO is operational *
CFG20(PCIE/SDVO consurrent) 1 = PCIE/SDVO are operating simu.
1

PEG_TX0 M45
1

150R2F-1-GP

150R2F-1-GP

H32 CRT_BLUE PEG_TX1 T38


R106

R103
150R2F-1-GP

G32 CRT_BLUE# PEG_TX2 T46


R105

K29 CRT_GREEN PEG_TX3 N50


J29 R51
2

CRT_GREEN# PEG_TX4
F29 U43
2

CRT_RED PEG_TX5
VGA

E29 CRT_RED# PEG_TX6 W42


PEG_TX7 Y47
PEG_TX8 Y39
15 GMCH_DDCCLK K33 CRT_DDC_CLK PEG_TX9 AC38
RN60 G35 AD47
15 GMCH_DDCDATA CRT_VSYNC CRT_DDC_DATA PEG_TX10
15,17 GMCH_VSYNC 1 4 E33 CRT_VSYNC PEG_TX11 AC50
2 3 C32 AD43
B 15,17 GMCH_HSYNC SRN33J-5-GP-U CRT_HSYNC F33
CRT_TVO_IREF
CRT_HSYNC
PEG_TX12
PEG_TX13 AG39 B
PEG_TX14 AE50
1 2 CRTIREF AH43
R97 1K3R2D-GP PEG_TX15
SB

FOR Calero: 255 ohm


Crestline: 1.3k ohm

<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRESTLINE(3/6)-VGA/LVDS/TV
Size Document Number
Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 9 of 41

5 4 3 2 1
5 3D3V_S0
R334
3D3V_S0_VCCSYNC 4 3 2 1
1 2

1
0R0603-PAD
3D3V_S0_DAC_BG C369
R335 VCCA_TVDAC SCD1U16V2ZY-2GP

2
1D25V_S0_DPLLB 1D25V_S0_AXF
1 2 3/5 R344
1D05V_S0
SCD022U16V2KX-3GP

SCD1U16V2ZY-2GP

DY 0R0603-PAD 1 2 1D25V_S0 1 2 1D25V_S0


1

L5 L-10UH-11-GP
C374

C375

SCD1U16V2ZY-2GP
U16H 8 OF 10 C67
0R0603-PAD

1
ST220U2VBM-3GP
2

U13 C56 C406 C390


VTT
D J32 U12 SC10U10V5KX-2GP SC10U10V5KX-2GP
SC1U16V3ZY-GP
D

2
VCC_SYNC VTT

1
U11 TC16 C364
VTT SC4D7U6D3V5KX-3GP
A33 VCCA_CRT_DAC VTT U9 DY
3D3V_S0_DAC_CRT B33 U8

2
VCCA_CRT_DAC VTT

CRT
VTT U7
3D3V_S0_DAC_CRT 3D3V_S0_TVDAC U5
R329 VTT
3D3V_S0_DAC_BG A30 VCCA_DAC_BG VTT U3
1 2 VTT U2
B32 VSSA_DAC_BG VTT U1
1D25V_S0_DMI 1D8V_S3_SM_CK
SCD022U16V2KX-3GP

SCD1U16V2ZY-2GP

VTT

C359
DY 0R0603-PAD T13
VTT
1

C410

SC2D2U6D3V3MX-1-GP
T11

SCD47U16V3ZY-3GP
VTT

1
C363

C362

T10 C357 1 R67 2 1D25V_S0 1 R73 2 1D8V_S3


VTT 0R0603-PAD

SC4D7U6D3V5KX-3GP
1D25V_S0_DPLLA B49 T9
2

VCCA_DPLLA VTT

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
T7 C62 C3940R0805-PAD

2
VTT

1
1D25V_S0_DPLLB H49 T6 DY C385 C381
VCCA_DPLLB VTT

PLL
T5

SCD22U16V3ZY-GP

SCD22U16V3ZY-GP
VTT
1D25V_S0_HPLL AL2 T3

2
VCCA_HPLL VTT
VTT T2
1D25V_S0_MPLL AM2 VCCA_MPLL VTT R3
VTT R2
R1
1D8V_S0_TXLVDS
POWER

A LVDS
VTT 1D25V_S0_AXD 1D25V_S0
A41 VCCA_LVDS
1

C353
SC1KP50V2KX-1GP B41 AT23 1 R135 2
3D3V_S0 3D3V_S0_PEG_BG VSSA_LVDS VCC_AXD C391
R74 AU28
2

VCC_AXD 0R0805-PAD
VCC_AXD AU24

1
1D25V_S0_PEGPLL 1D5V_S0_TVDAC

SC1U10V3KX-3GP
1 2 K50 AT29

AXD
VCCA_PEG_BG VCC_AXD L7
AT25 C389
VCC_AXD
1

0R0603-PAD K49 AT30 SC10U10V5KX-2GP 1 2 1 R136 2

A PEG
1D25V_S0 1D5V_S0

2
VSSA_PEG_BG VCC_AXD
C C343 0R0805-PAD
C

SCD1U16V2ZY-2GP

SCD022U16V2KX-3GP

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP AR29 C65 C377 C378
2

VCC_AXD_NCTF BLM18PG121SN-1GP

1
1D25V_S0_PEGPLL 20mil U51 C58
VCCA_PEG_PLL SC10U10V5KX-2GP
B23 1D25V_S0_AXF

2
VCC_AXF

AXF
VCC_AXF B21
AW18 VCCA_SM VCC_AXF A21
1D25V_S0 12/12 1D25V_S0_A_SM
AV19 VCCA_SM
R137 AU19 VCCA_SM VCC_DMI AJ50 1D25V_S0_DMI
AU18 VCCA_SM
1 2 AU17 VCCA_SM
VCC_SM_CK BK24 1D8V_S3_SM_CK
1

0R0805-PAD C424 C425 C407 C399 AT22 BK23

A SM

SM CK
TC6 VCCA_SM VCC_SM_CK 1D25V_S0_DPLLA 1D25V_S0_HPLL
SC4D7U6D3V5KX-3GP

DY AT21 BJ24
SCD22U16V3ZY-GP

ST100U4VBM-U VCCA_SM VCC_SM_CK L33


SC1U10V3KX-3GP
ST22U6D3VBM-1GP

AT19 BJ23
2

VCCA_SM VCC_SM_CK
AT18 VCCA_SM 1 2 1D25V_S0 1 2 1D25V_S0
AT17 L4 L-10UH-11-GP
VCCA_SM

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
AR17 C66 C418 BLM18AG121SN-1GP
VCCA_SM_NCTF

1
AR16 VCCA_SM_NCTF VCC_TX_LVDS A43 1D8V_S0_TXLVDS
1D25V_S0_SM_CK C55 C420
R133 3D3V_S0_HV SC10U10V5KX-2GP SC10U10V5KX-2GP

2
1 2 BC29 C40
A CK

VCCA_SM_CK VCC_HV
HV

BB29 VCCA_SM_CK VCC_HV B40


1

1
0R0603-PAD C366 C372 C376 C379
C25 C356
SCD22U16V3ZY-GP

3D3V_S0_TVDACA VCCA_TVA_DAC
SCD1U16V2ZY-2GP
SC1U10V3KX-3GP

SC1U10V3KX-3GP

B25 AD51 1D05V_S0_PEG


2

2
VCCA_TVA_DAC VCC_PEG

SCD1U16V2ZY-2GP
DY DY 3D3V_S0_TVDACB C27 VCCA_TVB_DAC VCC_PEG W50
TV

PEG

B27 VCCA_TVB_DAC VCC_PEG W51


B28 V49 1D05V_S0_PEG
3D3V_S0_TVDACC VCCA_TVC_DAC VCC_PEG R316 1D25V_S0_MPLL
A28 V50
B VCCA_TVC_DAC VCC_PEG
1 2 1D05V_S0
L10 B
DY 0R0805-PAD 1 2 1D25V_S0
M32 AH50
TV/CRT

1D5V_S0_TVDAC VCCD_CRT VCC_RXR_DMI

1
3D3V_S0_TVDACC

SCD1U16V2ZY-2GP
DMI

L29 AH51 TC13 TC14 C155 BLM18AG121SN-1GP


R340 VCCD_TVDAC VCC_RXR_DMI

1
VCCA_TVDAC C336R65

ST220U2VBM-3GP

ST220U2VBM-3GP
SCD022U16V2KX-3GP

20mil SC10U10V5KX-2GP C160


1 2 1D5V_S0_QDAC N28 1 DY 2 1D25V_S0

2
C392 C393 VCCD_QDAC VTTLF1 SC10U10V5KX-2GP
A7
VTTLF

2
VTTLF
1

0R0603-PAD 1D25V_S0_HPLL AN2 F2 VTTLF2 0R5J-5-GP


VCCD_HPLL VTTLF
SCD1U16V2ZY-2GP

VTTLF3
3/5 U48
VTTLF AH1
1D25V_S0_PEGPLL
2

VCCD_PEG_PLL
J41 C157 C159 C158
LVDS

VCCD_LVDS
1

1
1D8V_S0_LVDS H42 VCCD_LVDS D13 1D05V_S0_D 3D3V_S0_HV
SCD47U16V3ZY-3GP

SCD47U16V3ZY-3GP

SCD47U16V3ZY-3GP
R324
R323
2

3D3V_S0_TVDACA A K 2 1 1 2
1D05V_S0
R341 VCCA_TVDAC

1
SCD022U16V2KX-3GP

1 2 SS0530-GP 10R2J-2-GP
1D5V_S0_QDAC 0R0402-PAD
SCD1U16V2ZY-2GP

C352
R112
1

C400 0R0603-PAD SCD1U16V2KX-3GP


3D3V_S0

2
C401

SCD022U16V2KX-3GP

1 2 1D5V_S0
SCD1U16V2ZY-2GP
2

C134
100R2F-L1-GP-U
C133
2

1D8V_S0_TXLVDS
2/14 3/6 3D3V_S0
3D3V_S0_TVDACB R60
R339 40mil <Core Design>
VCCA_TVDAC 1 2 1D8V_S3 R652 0R3-0-U-GP
A 1 2 5V_S0 1 2 VCCA_TVDAC A
1

1
SC1KP50V2KX-1GP

C350 TC1 0R0603-PAD U72 DY Wistron Corporation


1

C383 C384 0R0603-PAD 1D8V_S0_LVDS


R306
ST220U2VBM-3GP
SCD022U16V2KX-3GP

SCD1U16V2ZY-2GP

1 5 3D3V_S0_TVDAC C825 C824 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

SHDN# SET

1
SC47U6D3V6MX-1GP

SC47U6D3V6MX-1GP
1 2 1D8V_S3 DY C822 2 Taipei Hsien 221, Taiwan, R.O.C.
2

GND
1

3 4 1 R651 2
SC1U10V3ZY-6GP

IN OUT
1

1
C338 0R0603-PAD C823 0R0603-PAD Title

2
C334 DY DY
CRESTLINE(4/6)-PWR
2

SC10U10V5KX-2GP G913CF-GP
2

2
SC1U10V3KX-3GP SC10U10V5ZY-1GP Size Document Number Rev
A3
Pamirs -3
Date: Monday, May 21, 2007 Sheet 10 of 41

5 4 3 2 1
5 4 3 2 1
1D05V_S0
1D05V_S0 LIB C
U16F 6 OF 10

AT35 VCC VCC_AXG_NCTF T17


AT34 VCC VCC_AXG_NCTF T18
AH28 VCC VCC_AXG_NCTF T19
AC32 VCC VCC_AXG_NCTF T21
U16G 7 OF 10 AC31 T22
VCC VCC_AXG_NCTF
AK32 VCC VCC_AXG_NCTF T23
1D05V_S0 AB33 AJ31 T25

VCC CORE
VCC_NCTF VCC VCC_AXG_NCTF
AB36 VCC_NCTF AJ28 VCC VCC_AXG_NCTF U15
AB37 VCC_NCTF AH32 VCC VCC_AXG_NCTF U16

C380

C397
D AC33 VCC_NCTF VSS_NCTF T27 AH31 VCC VCC_AXG_NCTF U17 C388
D

1
AC35 VCC_NCTF VSS_NCTF T37 AH29 VCC VCC_AXG_NCTF U19
C419

C373

C387

C386

SCD22U10V2KX-1GP
AC36 VCC_NCTF VSS_NCTF U24 AF32 VCC VCC_AXG_NCTF U20
1

TC5 AD35 U28 U21

2
VCC_NCTF VSS_NCTF VCC_AXG_NCTF

SCD1U16V2ZY-2GP
AD36 VCC_NCTF VSS_NCTF V31 VCC_AXG_NCTF U23
ST220U2VBM-3GP

SC4D7U6D3V5KX-3GP
AF33 V35 R336 U26
2

VCC_NCTF VSS_NCTF VCC_AXG_NCTF


SC22U6D3V5MX-2GP

AF36 VCC_NCTF VSS_NCTF AA19 VCC_AXG_NCTF V16


SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD1U16V2ZY-2GP

AH33 AB17 1 2VCC_GMCH1 R30 V17

VSS NCTF
VCC_NCTF VSS_NCTF VCC VCC_AXG_NCTF
AH35 VCC_NCTF VSS_NCTF AB35 VCC_AXG_NCTF V19
AH36 VCC_NCTF VSS_NCTF AD19 0R0603-PAD VCC_AXG_NCTF V20
AH37 VCC_NCTF VSS_NCTF AD37 VCC_AXG_NCTF V21
AJ33 VCC_NCTF VSS_NCTF AF17 VCC_AXG_NCTF V23
AJ35 VCC_NCTF VSS_NCTF AF35 VCC_AXG_NCTF V24
AK33 VCC_NCTF VSS_NCTF AK17 VCC_AXG_NCTF Y15
AK35 AM17 Y16
AK36
AK37
VCC_NCTF
VCC_NCTF
VCC_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
AM24
AP26
POWER VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
Y17
Y19
AD33 AP28 AU32 Y20

VCC NCTF
VCC_NCTF VSS_NCTF 1D8V_S3 VCC_SM VCC_AXG_NCTF
AJ36 VCC_NCTF VSS_NCTF AR15 AU33 VCC_SM VCC_AXG_NCTF Y21
AM35 VCC_NCTF VSS_NCTF AR19 AU35 VCC_SM VCC_AXG_NCTF Y23
AL33 VCC_NCTF VSS_NCTF AR28 AV33 VCC_SM VCC_AXG_NCTF Y24
AL35 VCC_NCTF AW33 VCC_SM VCC_AXG_NCTF Y26
AA33 VCC_NCTF AW35 VCC_SM VCC_AXG_NCTF Y28

1
C368

C118

C361 SCD01U16V2KX-3GP
AA35 VCC_NCTF AY35 VCC_SM VCC_AXG_NCTF Y29
AA36 TC2 BA32 AA16
VCC_NCTF VCC_SM VCC_AXG_NCTF

ST220U2VBM-3GP
AP35 DY BA33 AA17

2
VCC_NCTF VCC_SM VCC_AXG_NCTF

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
AP36 VCC_NCTF BA35 VCC_SM VCC_AXG_NCTF AB16
AR35 VCC_NCTF BB33 VCC_SM VCC_AXG_NCTF AB19
AR36 VCC_NCTF BC32 VCC_SM VCC_AXG_NCTF AC16
Y32 VCC_NCTF BC33 VCC_SM VCC_AXG_NCTF AC17
Y33 VCC_NCTF BC35 VCC_SM VCC_AXG_NCTF AC19
Y35 BD32 AD15

VCC SM

VCC GFX NCTF


VCC_NCTF VCC_SM VCC_AXG_NCTF
Y36 BD35 AD16

C Y37
T30
VCC_NCTF
VCC_NCTF
VCC_NCTF
POWER BE32
BE33
VCC_SM
VCC_SM
VCC_SM
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
AD17
AF16 C
T34 A3 MCHGND1 1 2 BE35 AF19
VSS SCB

VCC_NCTF VSS_SCB MCHGND2 R1241 VCC_SM VCC_AXG_NCTF


T35 VCC_NCTF VSS_SCB B2 DY 20R0402-PAD BF33 VCC_SM VCC_AXG_NCTF AH15
U29 C1 MCHGND3 R1251 2 0R2J-2-GP BF34 AH16
VCC_NCTF VSS_SCB MCHGND4 R1261 VCC_SM VCC_AXG_NCTF
U31 VCC_NCTF VSS_SCB BL1 DY 20R0402-PAD BG32 VCC_SM VCC_AXG_NCTF AH17
U32 BL51 MCHGND5 R1301 DY 2 0R2J-2-GP BG33 AH19
VCC_NCTF VSS_SCB MCHGND6 R69 1 0R2J-2-GP VCC_SM VCC_AXG_NCTF
U33 VCC_NCTF VSS_SCB A51
R76
DY 2
0R2J-2-GP
BG35 VCC_SM VCC_AXG_NCTF AJ16
U35 VCC_NCTF BH32 VCC_SM VCC_AXG_NCTF AJ17
U36 VCC_NCTF BH34 VCC_SM VCC_AXG_NCTF AJ19
V32 VCC_NCTF BH35 VCC_SM VCC_AXG_NCTF AK16
V33 VCC_NCTF BJ32 VCC_SM VCC_AXG_NCTF AK19
V36 VCC_NCTF BJ33 VCC_SM VCC_AXG_NCTF AL16
V37 VCC_NCTF BJ34 VCC_SM VCC_AXG_NCTF AL17
AT33 BK32 AL19
VSS AXM

VCC_AXM 1D05V_S0 VCC_SM VCC_AXG_NCTF


VCC_AXM AT31 BK33 VCC_SM VCC_AXG_NCTF AL20
VCC_AXM AK29 BK34 VCC_SM VCC_AXG_NCTF AL21
VCC_AXM AK24 BK35 VCC_SM VCC_AXG_NCTF AL23
1D05V_S0 AK23 BL33 AM15
VCC_AXM 1D05V_S0 VCC_SM VCC_AXG_NCTF
VCC_AXM AJ26 AU30 VCC_SM VCC_AXG_NCTF AM16
VCC_AXM AJ23 VCC_AXG_NCTF AM19
AL24 VCC_AXM_NCTF VCC_AXG_NCTF AM20
AL26 VCC_AXM_NCTF VCC_AXG_NCTF AM21
AL28 VCC_AXM_NCTF R20 VCC_AXG VCC_AXG_NCTF AM23
1

AM26 T14 AP15


VSS AXM NCTF

C408 C411 VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF


AM28 VCC_AXM_NCTF W13 VCC_AXG VCC_AXG_NCTF AP16

C402
SC1U10V3KX-3GP C404
SC10U10V5KX-2GP
SC10U10V5KX-2GP AM29 TC18 W14 AP17
2

VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF

1
AM31 VCC_AXM_NCTF Y12 VCC_AXG VCC_AXG_NCTF AP19
AM32 C403 C395 AA20 AP20
VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF

ST220U2VBM-3GP
AM33 SC10U10V5KX-2GP
SC10U10V5KX-2GP AA23 AP21

2
VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF

SCD1U16V2ZY-2GP
AP29 VCC_AXM_NCTF AA26 VCC_AXG VCC_AXG_NCTF AP23
AP31 VCC_AXM_NCTF AA28 VCC_AXG VCC_AXG_NCTF AP24
AP32 VCC_AXM_NCTF AB21 VCC_AXG VCC_AXG_NCTF AR20
AP33 VCC_AXM_NCTF AB24 VCC_AXG VCC_AXG_NCTF AR21
B AL29 AB29 AR23 B

VCC GFX
VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF
AL31 VCC_AXM_NCTF AC20 VCC_AXG VCC_AXG_NCTF AR24
AL32 VCC_AXM_NCTF AC21 VCC_AXG VCC_AXG_NCTF AR26
AR31 VCC_AXM_NCTF AC23 VCC_AXG VCC_AXG_NCTF V26
AR32 VCC_AXM_NCTF AC24 VCC_AXG VCC_AXG_NCTF V28
C371

C367

C370

C365 C396 AR33 AC26 V29


VCC_AXM_NCTF VCC_AXG VCC_AXG_NCTF
1

AC28 VCC_AXG VCC_AXG_NCTF Y31


AC29 VCC_AXG
AD20
2

VCC_AXG
AD23 VCC_AXG
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

AD24 AW45 VCCSM_LF1

VCC SM LF
VCC_AXG VCC_SM_LF VCCSM_LF2
AD28 VCC_AXG VCC_SM_LF BC39
AF21 BE39 VCCSM_LF3
1D05V_S0 3D3V_S0 VCC_AXG VCC_SM_LF VCCSM_LF4
AF26 VCC_AXG VCC_SM_LF BD17
AA31 BD4 VCCSM_LF5
D30 VCC_AXG VCC_SM_LF
R328 AH20 AW8 VCCSM_LF6
VCC_AXG VCC_SM_LF

C413

C412

C421

SCD22U10V2KX-1GP C405

C61

C60

C59
A K 2 1 AH21 AT6 VCCSM_LF7
VCC_AXG VCC_SM_LF
AH23 VCC_AXG

1
10R2J-2-GP AH24
RB751V-40-2-GP VCC_AXG

SC1U10V3KX-3GP
AH26 VCC_AXG

SC1U10V3KX-3GP
SCD22U10V2KX-1GP

SCD47U16V3ZY-3GP
AD31

2
VCC_AXG

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
AJ20 VCC_AXG
AN14 VCC_AXG

A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size
CRESTLINE(5/6)-PWR/GND
Document Number Rev
Custom
Pamirs -3
Date: Friday, May 18, 2007 Sheet 11 of 41
5 4 3 2 1

U16I 9 OF 10 U16J 10 OF 10

A13 VSS VSS AW24 C46 VSS VSS W11


A15 VSS VSS AW29 C50 VSS VSS W39
A17 VSS VSS AW32 C7 VSS VSS W43
A24 VSS VSS AW5 D13 VSS VSS W47
D AA21
AA24
VSS VSS AW7
AY10
D24
D3
VSS VSS W5
W7
D
VSS VSS VSS VSS
AA29 VSS VSS AY24 D32 VSS VSS Y13
AB20 VSS VSS AY37 D39 VSS VSS Y2
AB23 VSS VSS AY42 D45 VSS VSS Y41
AB26 VSS VSS AY43 D49 VSS VSS Y45
AB28 VSS VSS AY45 E10 VSS VSS Y49
AB31 VSS VSS AY47 E16 VSS VSS Y5
AC10 VSS VSS AY50 E24 VSS VSS Y50
AC13 VSS VSS B10 E28 VSS VSS Y11
AC3 VSS VSS B20 E32 VSS VSS P29
AC39 VSS VSS B24 E47 VSS VSS T29
AC43 VSS VSS B29 F19 VSS VSS T31
AC47 VSS VSS B30 F36 VSS VSS T33
AD1 VSS VSS B35 F4 VSS VSS R28
AD21 VSS VSS B38 F40 VSS
AD26 VSS VSS B43 F50 VSS
AD29 VSS VSS B46 G1 VSS
AD3 VSS VSS B5 G13 VSS
AD41 VSS VSS B8 G16 VSS VSS AA32
AD45 VSS VSS BA1 G19 VSS VSS AB32
AD49 VSS VSS BA17 G24 VSS VSS AD32
AD5 VSS VSS BA18 G28 VSS VSS AF28
AD50 VSS VSS BA2 G29 VSS VSS AF29
AD8 VSS VSS BA24 G33 VSS VSS AT27
AE10 VSS VSS BB12 G42 VSS VSS AV25
AE14 VSS VSS BB25 G45 VSS VSS H50
AE6 VSS VSS BB40 G48 VSS
AF20 VSS VSS BB44 G8 VSS
C AF23
AF24
VSS
VSS
VSS
VSS
BB49
BB8
H24
H28
VSS
VSS
C
AF31 VSS VSS BC16 H4 VSS
AG2 BC24 H45
AG38
AG43
VSS
VSS
VSS
VSS BC25
BC36
J11
J16
VSS
VSS VSS
VSS VSS VSS
AG47 VSS VSS BC40 J2 VSS
AG50 VSS VSS BC51 J24 VSS
AH3 VSS VSS BD13 J28 VSS
AH40 BD2 J33
AH41
AH7
VSS
VSS VSS VSS
VSS BD28
BD45
J35
J39
VSS
VSS
VSS VSS VSS
AH9 VSS VSS BD48 K12 VSS
AJ11 VSS VSS BD5 K47 VSS
AJ13 VSS VSS BE1 K8 VSS
AJ21 VSS VSS BE19 L1 VSS
AJ24 VSS VSS BE23 L17 VSS
AJ29 VSS VSS BE30 L20 VSS
AJ32 VSS VSS BE42 L24 VSS
AJ43 VSS VSS BE51 L28 VSS
AJ45 VSS VSS BE8 L3 VSS
AJ49 VSS VSS BF12 L33 VSS
AK20 VSS VSS BF16 L49 VSS
AK21 VSS VSS BF36 M28 VSS
AK26 VSS VSS BG19 M42 VSS
AK28 VSS VSS BG2 M46 VSS
AK31 VSS VSS BG24 M49 VSS
AK51 VSS VSS BG29 M5 VSS
AL1 VSS VSS BG39 M50 VSS
AM11 BG48 M9
B AM13
VSS
VSS
VSS
VSS BG5 N11
VSS
VSS
B
AM3 VSS VSS BG51 N14 VSS
AM4 VSS VSS BH17 N17 VSS
AM41 VSS VSS BH30 N29 VSS
AM45 VSS VSS BH44 N32 VSS
AN1 VSS VSS BH46 N36 VSS
AN38 VSS VSS BH8 N39 VSS
AN39 VSS VSS BJ11 N44 VSS
AN43 VSS VSS BJ13 N49 VSS
AN5 VSS VSS BJ38 N7 VSS
AN7 VSS VSS BJ4 P19 VSS
AP4 VSS VSS BJ42 P2 VSS
AP48 VSS VSS BJ46 P23 VSS
AP50 VSS VSS BK15 P3 VSS
AR11 VSS VSS BK17 P50 VSS
AR2 VSS VSS BK25 R49 VSS
AR39 VSS VSS BK29 T39 VSS
AR44 VSS VSS BK36 T43 VSS
AR47 VSS VSS BK40 T47 VSS
AR7 VSS VSS BK44 U41 VSS
AT10 VSS VSS BK6 U45 VSS
AT14 VSS VSS BK8 U50 VSS
AT41 VSS VSS BL11 V2 VSS
AT49 VSS VSS BL13 V3 VSS
AU1 VSS VSS BL19
AU23 VSS VSS BL22
AU29 VSS VSS BL37
AU3 VSS VSS BL47
AU36 C12 <Core Design>
A AU49
VSS
VSS
VSS
VSS C16 A
AU51 VSS VSS C19
AV39
AV48
VSS
VSS
VSS
VSS
C28
C29 Wistron Corporation
AW1 C33 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS Taipei Hsien 221, Taiwan, R.O.C.
AW12 VSS VSS C36
AW16 VSS VSS C41
Title

CRESTLINE(6/6)-PWR/GND
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 12 of 41

5 4 3 2 1
5 4 3 2 1

M_CLK_DDR0
M_CLK_DDR#0
8 DDR_A_DQS#[0..7] DM2

8 DDR_A_D[0..63] 12/19

1
DDR_A_MA0 102 108 DDR_A_RAS# DDR_A_RAS# 8
DDR_A_MA1 A0 RAS# DDR_A_WE# C817 C818
8 DDR_A_DM[0..7] 101 A1 WE# 109 DDR_A_WE# 8
DDR_A_MA2 100 113 DDR_A_CAS# DUMMY-C2 DUMMY-C2
A2 CAS# DDR_A_CAS# 8
DDR_A_MA3 99
8 DDR_A_DQS[0..7] A3
DDR_A_MA4 98 110 DDR_CS0_DIMMA# DDR_CS0_DIMMA# 7
DDR_A_MA5 A4 CS0# DDR_CS1_DIMMA#
8 DDR_A_MA[0..13] 97 115 DDR_CS1_DIMMA# 7

2
DDR_A_MA6 A5 CS1#
94 A6
DDR_A_MA7 92 79 DDR_CKE0_DIMMA DDR_CKE0_DIMMA 7
DDR_A_MA8 A7 CKE0 DDR_CKE1_DIMMA
D
8 DDR_A_BS[0..2] 93 A8 CKE1 80 DDR_CKE1_DIMMA 7 D
Layout Note: DDR_A_MA9 91
DDR_A_MA10 A9 M_CLK_DDR0
Place near DM1 105 A10/AP CK0 30 M_CLK_DDR0 7 C813 put near connector
DDR_A_MA11 90 32 M_CLK_DDR#0 M_CLK_DDR#0 7
DDR_A_MA12 A11 CK0#
89 A12 1 2
DDR_A_MA13 116 164 M_CLK_DDR1 M_CLK_DDR1 7
DDR_A_MA14 A13 CK1 M_CLK_DDR#1
7 DDR_A_MA14 86 A14 CK1# 166 M_CLK_DDR#1 7 DUMMY-C2
84 A15 C814
DDR_A_BS2 85 10 DDR_A_DM0
A16/BA2 DM0 DDR_A_DM1
DM1 26 1 2
1D8V_S3 DDR_A_BS0 107 52 DDR_A_DM2
DDR_A_BS1 BA0 DM2 DDR_A_DM3
106 BA1 DM3 67 DUMMY-C2
130 DDR_A_DM4
DM4 DDR_A_DM5
DM5 147 12/15
DDR_A_D0 5 170 DDR_A_DM6
C75 C99 C110 C119 C128 C79 C103 C91 C84 TC3 DDR_A_D1 DQ0 DM6 DDR_A_DM7
7 DQ1 DM7 185
1

1
DDR_A_D2 17
DDR_A_D3 DQ2
19 DQ3
SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

ST220U2VBM-3GP
DDR_A_D4 4 195 ICH_SMBDATA
ICH_SMBDATA 3,14,20
2

2
DDR_A_D5 DQ4 SDA ICH_SMBCLK
6 DQ5 SCL 197 ICH_SMBCLK 3,14,20
DY DY DY DDR_A_D6 14
DDR_A_D7 DQ6 SCD1U16V2ZY-2GP
16 DQ7 VDDSPD 199 3D3V_S0
DDR_A_D8 23
DDR_A_D9 DQ8 R346 1
25 DQ9 SA0 198 2 10KR2J-3-GP

1
DDR_A_D10 35 200 R347 1 2 10KR2J-3-GP C416
DDR_A_D11 DQ10 SA1 C414 SC2D2U6D3V3KX-GP
37 DQ11
DDR_A_D12 20 50 PM_EXTTS#0 7

2
DDR_A_D13 DQ12 NC#50
22 DQ13 NC#69 69
DDR_A_D14 36 83
DDR_A_D15 DQ14 NC#83
38 DQ15 NC#120 120
DDR_A_D16 43 163
DDR_A_D17 DQ16 NC#163/TEST
45 DQ17
Layout Note: DDR_A_D18 55 1D8V_S3
DDR_A_D19 DQ18
Place one cap close to every 2 pullup 57 DQ19 VDD 81
DDR_A_D20 44 82
C DQ20 VDD C
resistors terminated to +0.9VS DDR_A_D21 46 87
DDR_A_D22 DQ21 VDD
56 DQ22 VDD 88
DDR_A_D23 58 95
DDR_A_D24 DQ23 VDD
61 DQ24 VDD 96
DDR_A_D25 63 103
DDR_A_D26 DQ25 VDD
73 DQ26 VDD 104
DDR_A_D27 75 111
DDR_VREF_S0 DDR_A_D28 DQ27 VDD
62 DQ28 VDD 112
DDR_A_D29 64 117
DDR_A_D30 DQ29 VDD
74 DQ30 VDD 118
DDR_A_D31 76
DDR_A_D32 DQ31
123 DQ32 VSS 3
C342 C341 C349 C347 C355 C354 C360 C358 C68 C102 C78 C87 C113 DDR_A_D33 125 8
DQ33 VSS
1

DDR_A_D34 135 9
DDR_A_D35 DQ34 VSS
137 DQ35 VSS 12
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DDR_A_D36 124 15
2

DDR_A_D37 DQ36 VSS


DY DDR_A_D38
126 DQ37 VSS 18
DY DY DY DDR_A_D39
134 DQ38 VSS 21
136 DQ39 VSS 24
DDR_A_D40 141 27
DDR_A_D41 DQ40 VSS
143 DQ41 VSS 28
DDR_A_D42 151 33
DDR_A_D43 DQ42 VSS
153 DQ43 VSS 34
DDR_A_D44 140 39
DDR_A_D45 DQ44 VSS
142 DQ45 VSS 40
DDR_A_D46 152 41
DDR_A_D47 DQ46 VSS
154 DQ47 VSS 42
DDR_A_D48 157 47
DDR_A_D49 DQ48 VSS
159 DQ49 VSS 48
DDR_A_D50 173 53
DDR_A_D51 DQ50 VSS
175 DQ51 VSS 54
DDR_A_D52 158 59
DDR_A_D53 DQ52 VSS
160 DQ53 VSS 60
DDR_A_D54 174 65
B DDR_A_D55 DQ54 VSS B
176 DQ55 VSS 66
DDR_A_D56 179 71
DDR_A_D57 DQ56 VSS
181 DQ57 VSS 72
DDR_A_D58 189 77
DDR_A_D59 DQ58 VSS
191 DQ59 VSS 78
DDR_A_D60 180 121
DDR_A_D61 DQ60 VSS
Layout Note: 182 DQ61 VSS 122
DDR_VREF_S0 DDR_A_D62 192 127
Place these resistors DDR_A_D63 DQ62 VSS
194 DQ63 VSS 128
RN12 SRN56J-4-GP RN7 SRN56J-4-GP closely DM1,all 132
DDR_A_MA8 DDR_A_BS2 DDR_A_DQS#0 VSS
1 4 4 1 trace length Max=1.5" 11 DQS0# VSS 133
DDR_A_MA5 2 3 3 2 DDR_CKE0_DIMMA DDR_A_DQS#1 29 138
DDR_A_DQS#2 DQS1# VSS
49 DQS2# VSS 139
RN16 SRN56J-4-GP RN55 SRN56J-4-GP DDR_A_DQS#3 68 144
DDR_A_MA3 DDR_A_MA7 DDR_A_DQS#4 DQS3# VSS
1 4 4 1 129 DQS4# VSS 145
DDR_A_MA1 2 3 3 2 DDR_A_MA6 DDR_A_DQS#5 146 149
DDR_A_DQS#6 DQS5# VSS
167 DQS6# VSS 150
RN58 SRN56J-4-GP RN10 SRN56J-4-GP DDR_A_DQS#7 186 155
DDR_A_RAS# DDR_A_MA12 DQS7# VSS
1 4 4 1 VSS 156
DDR_CS0_DIMMA# 2 3 3 2 DDR_A_MA9 DDR_A_DQS0 13 161
DDR_A_DQS1 DQS0 VSS
31 DQS1 VSS 162
RN19 SRN56J-4-GP RN56 SRN56J-4-GP DDR_A_DQS2 51 165
DDR_A_MA10 DDR_A_MA4 DDR_A_DQS3 DQS2 VSS
1 4 4 1 70 DQS3 VSS 168
DDR_A_BS0 2 3 3 2 DDR_A_MA2 DDR_A_DQS4 131 171
DDR_A_DQS5 DQS4 VSS
148 DQS5 VSS 172
RN22 SRN56J-4-GP RN57 SRN56J-4-GP DDR_A_DQS6 169 177
DDR_A_WE# DDR_A_MA0 DDR_A_DQS7 DQS6 VSS
1 4 4 1 188 DQS7 VSS 178
DDR_CS1_DIMMA# 2 3 3 2 DDR_A_BS1 183
M_ODT0 VSS
7 M_ODT0 114 OTD0 VSS 184
RN25 SRN56J-4-GP RN59 SRN56J-4-GP DDR_VREF_S3 7 M_ODT1 M_ODT1 119 187
M_ODT1 M_ODT0 OTD1 VSS
1 4 4 1 VSS 190
DDR_A_CAS# 2 3 3 2 DDR_A_MA13 DDR_VREF_S3 SC2D2U16V5ZY-2GP 1 193
VREF VSS
2 VSS VSS 196
RN52 SRN56J-4-GP RN53 SRN56J-4-GP
1

A DDR_CKE1_DIMMA 1 4 4 1 DDR_A_MA14 202 201 A


DDR_A_MA11 C21 C23 GND GND
2 3 3 2
MH1 MH2
2

MH1 MH2
SCD1U16V2ZY-2GP
DDR2-200P-20-GP-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDRII-SODIMM SLOT1
Size Document Number Rev
Custom
Pamirs -3
Date: Monday, May 21, 2007 Sheet 13 of 41

5 4 3 2 1
5 4 3 2 1

M_CLK_DDR2

M_CLK_DDR#2

8 DDR_B_DQS#[0..7] 12/19

1
C819 C820
8 DDR_B_D[0..63] DUMMY-C2 DUMMY-C2
DM1
8 DDR_B_DM[0..7]
DDR_B_MA0 102 108 DDR_B_RAS# DDR_B_RAS# 8
8 DDR_B_DQS[0..7]

2
DDR_B_MA1 A0 RAS# DDR_B_WE#
101 A1 WE# 109 DDR_B_WE# 8
DDR_B_MA2 100 113 DDR_B_CAS# DDR_B_CAS# 8
8 DDR_B_MA[0..13] A2 CAS#
DDR_B_MA3 99
DDR_B_MA4 A3 DDR_CS2_DIMMB#
D Layout Note: 8 DDR_B_BS[0..2] 98 A4 CS0# 110 DDR_CS2_DIMMB# 7 D
DDR_B_MA5 97 115 DDR_CS3_DIMMB#
Place near DM2 DDR_B_MA6 A5 CS1# DDR_CS3_DIMMB# 7
94 A6
DDR_B_MA7 92 79 DDR_CKE2_DIMMB DDR_CKE2_DIMMB 7
DDR_B_MA8 A7 CKE0 DDR_CKE3_DIMMB
93 A8 CKE1 80 DDR_CKE3_DIMMB 7
DDR_B_MA9 91 put near connector
DDR_B_MA10 A9 M_CLK_DDR2
105 A10/AP CK0 30 M_CLK_DDR2 7 C815
DDR_B_MA11 90 32 M_CLK_DDR#2 M_CLK_DDR#2 7
DDR_B_MA12 A11 CK0#
89 A12 1 2
1D8V_S3 DDR_B_MA13 116 164 M_CLK_DDR3
A13 CK1 M_CLK_DDR3 7
DDR_B_MA14 86 166 M_CLK_DDR#3 M_CLK_DDR#3 7
7 DDR_B_MA14 A14 CK1# DUMMY-C2
84 A15 C816
DDR_B_BS2 85 10 DDR_B_DM0
A16/BA2 DM0 DDR_B_DM1
DM1 26 1 2
C382 C346 C105 C340 C92 C351 C46 C82 C121 DDR_B_BS0 107 52 DDR_B_DM2
BA0 DM2
1

1
DDR_B_BS1 106 67 DDR_B_DM3
BA1 DM3 DDR_B_DM4 DUMMY-C2
DM4 130
SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
147 DDR_B_DM5 12/15
2

2
DDR_B_D0 DM5 DDR_B_DM6
DY DDR_B_D1
5 DQ0 DM6 170
DDR_B_DM7
DY DDR_B_D2
7 DQ1 DM7 185
17 DQ2
DDR_B_D3 19
DDR_B_D4 DQ3 ICH_SMBDATA
4 DQ4 SDA 195 ICH_SMBDATA 3,13,20
DDR_B_D5 6 197 ICH_SMBCLK
DQ5 SCL ICH_SMBCLK 3,13,20
DDR_B_D6 14
DDR_B_D7 DQ6 SCD1U16V2ZY-2GP
16 DQ7 VDDSPD 199 3D3V_S0
DDR_B_D8 23
DDR_B_D9 DQ8 R350 1
25 DQ9 SA0 198 2 10KR2J-3-GP

1
DDR_B_D10 35 200 R351 1 2 10KR2J-3-GP 3D3V_S0 C422
DDR_B_D11 DQ10 SA1 C423 SC2D2U6D3V3KX-GP
37 DQ11
DDR_B_D12 20 50 PM_EXTTS#1 7

2
DDR_B_D13 DQ12 NC#50
Layout Note: 22 DQ13 NC#69 69
DDR_B_D14 36 83
Place one cap close to every 2 pullup DDR_B_D15 DQ14 NC#83
38 DQ15 NC#120 120
resistors terminated to +0.9VS DDR_B_D16 43 163
DDR_B_D17 DQ16 NC#163/TEST
C 45 DQ17 C
DDR_B_D18 55 1D8V_S3
DDR_B_D19 DQ18
57 DQ19 VDD 81
DDR_B_D20 44 82
DDR_B_D21 DQ20 VDD
46 DQ21 VDD 87
DDR_B_D22 56 88
DDR_VREF_S0 DDR_B_D23 DQ22 VDD
58 DQ23 VDD 95
DDR_B_D24 61 96
DDR_B_D25 DQ24 VDD
63 DQ25 VDD 103
DDR_B_D26 73 104
DDR_B_D27 DQ26 VDD
75 DQ27 VDD 111
C106 C114 C54 C70 C95 C122 C86 C96 C104 C98 C77 C53 C85 DDR_B_D28 62 112
DQ28 VDD
1

DDR_B_D29 64 117
DDR_B_D30 DQ29 VDD
74 DQ30 VDD 118
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DDR_B_D31 76
2

DDR_B_D32 DQ31
DY DY DDR_B_D33
123 DQ32 VSS 3
DY DDR_B_D34
125 DQ33 VSS 8
135 DQ34 VSS 9
DDR_B_D35 137 12
DDR_B_D36 DQ35 VSS
124 DQ36 VSS 15
DDR_B_D37 126 18
DDR_B_D38 DQ37 VSS
134 DQ38 VSS 21
DDR_B_D39 136 24
DDR_B_D40 DQ39 VSS
141 DQ40 VSS 27
DDR_B_D41 143 28
DDR_B_D42 DQ41 VSS
151 DQ42 VSS 33
DDR_B_D43 153 34
DDR_B_D44 DQ43 VSS
140 DQ44 VSS 39
DDR_B_D45 142 40
DDR_B_D46 DQ45 VSS
152 DQ46 VSS 41
DDR_B_D47 154 42
DDR_B_D48 DQ47 VSS
157 DQ48 VSS 47
DDR_B_D49 159 48
DDR_B_D50 DQ49 VSS
173 DQ50 VSS 53
DDR_B_D51 175 54
DDR_B_D52 DQ51 VSS
B 158 DQ52 VSS 59 B
DDR_B_D53 160 60
DDR_B_D54 DQ53 VSS
174 DQ54 VSS 65
DDR_B_D55 176 66
DDR_B_D56 DQ55 VSS
Layout Note: 179 DQ56 VSS 71
DDR_VREF_S0 DDR_B_D57 181 72
Place these resistors DDR_B_D58 DQ57 VSS
189 DQ58 VSS 77
RN17 SRN56J-4-GP RN9 closely DM2,all DDR_B_D59 191 78
DDR_B_MA3 DDR_B_MA12 DDR_B_D60 DQ59 VSS
1 4 4 1 trace length Max=1.5" 180 DQ60 VSS 121
DDR_B_MA1 2 3 3 2 DDR_B_MA9 DDR_B_D61 182 122
DDR_B_D62 DQ61 VSS
192 DQ62 VSS 127
RN20 SRN56J-4-GP RN6 SRN56J-4-GP DDR_B_D63 194 128
DDR_B_MA10 DDR_CKE3_DIMMB DQ63 VSS
1 4 4 1 VSS 132
DDR_B_BS0 2 3 3 2 DDR_B_MA11 DDR_B_DQS#0 11 133
DDR_B_DQS#1 DQS0# VSS
29 DQS1# VSS 138
RN18 SRN56J-4-GP RN13 SRN56J-4-GP DDR_B_DQS#2 49 139
DDR_B_MA0 DDR_B_MA5 DDR_B_DQS#3 DQS2# VSS
1 4 4 1 68 DQS3# VSS 144
DDR_B_BS1 2 3 3 2 DDR_B_MA8 DDR_B_DQS#4 129 145
DDR_B_DQS#5 DQS4# VSS
146 DQS5# VSS 149
RN21 SRN56J-4-GP RN11 SRN56J-4-GP DDR_B_DQS#6 167 150
DDR_CS2_DIMMB# DDR_B_MA7 DDR_B_DQS#7 DQS6# VSS
1 4 4 1 186 DQS7# VSS 155
DDR_B_RAS# 2 3 3 2 DDR_B_MA6 156
DDR_B_DQS0 VSS
13 DQS0 VSS 161
RN23 SRN56J-4-GP RN15 SRN56J-4-GP DDR_B_DQS1 31 162
DDR_B_WE# DDR_B_MA4 DDR_B_DQS2 DQS1 VSS
1 4 4 1 51 DQS2 VSS 165
DDR_B_CAS# 2 3 3 2 DDR_B_MA2 DDR_B_DQS3 70 168
DDR_B_DQS4 DQS3 VSS
131 DQS4 VSS 171
RN26 SRN56J-4-GP RN24 SRN56J-4-GP DDR_B_DQS5 148 172
DDR_CS3_DIMMB# M_ODT2 DDR_B_DQS6 DQS5 VSS
1 4 4 1 169 DQS6 VSS 177
M_ODT3 2 3 3 2 DDR_B_MA13 DDR_B_DQS7 188 178
DQS7 VSS
VSS 183
RN8 SRN56J-4-GP RN5 SRN56J-4-GP 7 M_ODT2 M_ODT2 114 184
DDR_B_MA14 DDR_B_BS2 DDR_VREF_S3 M_ODT3 OTD0 VSS
1 4 4 1 7 M_ODT3 119 OTD1 VSS 187
2 3 3 2 DDR_CKE2_DIMMB 190
DDR_VREF_S3 SC2D2U16V5ZY-2GP VSS
1 VREF VSS 193
A SRN56J-4-GP 2 196 A
VSS VSS
1

202 GND GND 201


C19 C22
MH1 MH2
2

MH1 MH2
SCD1U16V2ZY-2GP
DDR2-200P-21-GP-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDRII-SODIMM SLOT2
Size Document Number Rev
Custom
Pamirs -3
Date: Monday, May 21, 2007 Sheet 14 of 41
5 4 3 2 1
A B C D E

CRT I/F & CONNECTOR


5V_CRT_S0 5V_S0

F1
0721 2 1

A
1
Layout Note: C7
Place these resistors FUSE-1D1A6V-8GP D4
close to the CRT-out RB751V-40-2-GP

2
connector SCD01U16V2KX-3GP
L3
5V_CRT1_S0

K
4 9 M_RED 1 2 CRT_R 4
CRT_R 17

1
2
BLM18BB470SN1-GP RN1
L2
CRT_G CRT1 SRN2K2J-1-GP
9 M_GREEN 1 2 CRT_G 17
17

4
3
BLM18BB470SN1-GP
L1 6
CRT_R 1 11
9 M_BLUE 1 2 CRT_B
CRT_B 17
7

1
C16 C13 C11 C14 C12 C10 CRT_G 2 12 DDC_DATA_CON
R7 R6 R5 BLM18BB470SN1-GP
8

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
CRT_B 3 13 JVGA_HS

2
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP
9
4 14 JVGA_VS
2

2
10
5 15 DDC_CLK_CON

16
Layout Note: 5V_CRT1_S0
D10

1
DY VIDEO-15-57-GP-U1
* Must be a ground return path between this ground and the ground on

1
1
2 5V_CRT1_S0 C8 C9 C6 C5
the VGA connector. 20.20424.015 SC33P50V2JN-3GP SC33P50V2JN-3GP

2
DDC_DATA_CON 3 DY DY DY SC22P50V2JN-4GP SC22P50V2JN-4GP
U2

2
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
1 GMCH_HSYNC 5 4 CRT_G
3 CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. 3
CRT_R 6 3
BAV99-7-F-GP 3D3V_S0
D12
DY 7 2
2
GMCH_VSYNC 8 1 CRT_B
Hsync & Vsync level shift DDC_CLK_CON 3
PACDN009MR-GP-U
1
5V_S0

4
3
BAV99-7-F-GP 3D3V_S0 RN2

1
SRN2K2J-1-GP
C320
SCD1U16V2ZY-2GP

1
2
PR_INSERT 17

14

1
9,17 GMCH_HSYNC 2 3 HSYNC_5

U1
U5A TSAHCT125PW-GP
14

7
4

RN4
1 4 JVGA_HS 4 3 DDC_DATA_CON
9 GMCH_DDCDATA DDC_DATA_CON 17
9,17 GMCH_VSYNC 5 6 VSYNC_5 2 3 JVGA_VS
5 2
2 SRN33J-5-GP-U 2
U5B TSAHCT125PW-GP DDC_CLK_CON 6 1
17 DDC_CLK_CON GMCH_DDCCLK 9
7

2N7002DW-1-GP

TV OUT CONN connector D1


3D3V_S0
L23 5V @ ext. CRT side
2
9 M_CRMA 1 2 TV_CRMA 17

1
TV1 TV_COMP 3
1

C293 C292 C1
BLM18BB470SN1-GP TV_LUMA SCD1U16V2ZY-2GP
4 2 1

2
R271 TV_CRMA LUMA NC#2 DY
6
2

150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP TV_COMP CRMA


7 COMP GND 1 BAV99-7-F-GP
3
2

GND
8
0721 5
GND
9
NC#5 GND D3 3D3V_S0
L24 MINDIN7-18-GP 2

9 M_COMP 1 2 TV_LUMA 3
TV_COMP 17

1
1

C295 C294 22.10021.H31 1 C3


BLM18BB470SN1-GP SCD1U16V2ZY-2GP

2
R1 DY
2

150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP BAV99-7-F-GP


<Core Design>
1 1
2

D2
3D3V_S0 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
L25
2 Taipei Hsien 221, Taiwan, R.O.C.
9 M_LUMA 1 2 TV_LUMA 17

1
TV_CRMA 3 Title
1

C297 C296 C2
BLM18BB470SN1-GP
1 SCD1U16V2ZY-2GP CRT/TV Connector
Place this 2 resistors R2 2 DY Size Document Number Rev
2

close to the TV-out 150R2F-1-GP SC10P50V2JN-4GP SC10P50V2JN-4GP A3


connector BAV99-7-F-GP Pamirs -3
2

Date: Monday, May 21, 2007 Sheet 15 of 41

A B C D E
5V_S5

1
R516
2
I=3.57 mA

1
LED5
2CHG_LED# C
Q31
LED / INVERTER INTERFACE
R1 B CHG_LED 31

5V_S3
255R2F-L-GP
LED-B-27-U-GP E
R2
PDTC124EU-1-GP
LCD/INV CONN
I=3.57 mA
R515
LED4 Q30
1 2 1 2 C
R1 B LCDVDD_S0 5V_S0 3D3V_S0
PWR_LED 31
LED-B-27-U-GP E
255R2F-L-GP R2
33 PWR_LED# PDTC124EU-1-GP
LCD1

1
5V_S0 42
C304 C305 21 20
5V_S0 SC10U10V5ZY-1GP SCD1U16V2ZY-2GP 22 19 VGA_TXACLK- 9

2
I=3.57 mA U59C

14
23 18 VGA_TXACLK+ 9
R95 24 17 VGA_TXAOUT0- 9
LED1 9 25 16 VGA_TXAOUT0+ 9
1 2 1 2 8 26 15 VGA_TXAOUT1- 9
10 CAPS_LED 31 27 14 VGA_TXAOUT1+ 9
LED-B-27-U-GP 9 LDDC_CLK 28 13 VGA_TXAOUT2- 9
255R2F-L-GP
9 LDDC_DATA 29 12 VGA_TXAOUT2+ 9

7
TSAHCT08PWR-1GP 30 11
31 10
R657 0R3-0-U-GP 32 9 VGA_TXBCLK- 9
BRIGHTNESS_CONN1 2 33 8 VGA_TXBCLK+ 9
3D3V_S0 1 2 34 7
31 BLON_OUT VGA_TXBOUT0- 9
DCBATOUT 35 6 VGA_TXBOUT0+ 9
R656 0R3-0-U-GP 36 5 VGA_TXBOUT1- 9
R187
U28 LED2 37 4 VGA_TXBOUT1+ 9
K A 1 2 05/18 38 3 VGA_TXBOUT2- 9

1
C308 C316 C306 39 2 VGA_TXBOUT2+ 9
1 6 LED-O-16-GP
255R2F-L-GP SCD1U16V2ZY-2GP SCD1U25V2ZY-U 40 1

2
5V_S0 2 5 41
R412 TP_LED 31
LED3 SCD1U16V2ZY-2GP
1 2 1 2 3 4 ACES-CONN40C-GP-U
LED-B-27-U-GP
255R2F-L-GP
2N7002DW-1-GP 20.F0813.040
3D3V_S0

5V_S0

1
5V_S0
I=3.57 mA U59A R493
14

10KR2J-3-GP 3D3V_S0 BRIGHTNESS_CONN 1 2


R520 BRIGHTNESS 31
LED6 1 CDROM_LED# 23 R284 0R0402-PAD
1 2 1 2 MEDIA_LED# 3

2
2 SATA_LED# 19
R285
2 DY 1
0R2J-2-GP
LBKLT_CTL 9
LED-B-27-U-GP
255R2F-L-GP 3D3V_AUX_S5
D39
7

4
3

2
TSAHCT08PWR-1GP
RN50 R286 2
SRN2K2J-1-GP 100KR2J-1-GP
5V_S0 DY 3

1
5V_S0 I=3.6 mA 60804 1

1
2
U59B
14

3D3V_AUX_S5
NC

LDDC_DATA LDDC_CLK BAV99W-1-GP


R470 LED7
4
1 2 A K 6 1 2 BLON_OUT
D40
5 MS_LED# 25 C307 SC1000P50V3JN-GP
LED-B-67-GP-U2 1 2 BRIGHTNESS_CONN 2
255R2F-L-GP C314 SCD1U16V2ZY-2GP
7

TSAHCT08PWR-1GP 3

1
05/18
BAV99W-1-GP

Layout 40 mil 3D3V_S0 0707


LCDVDD_S0 5V_S3
U6

2
1 IN#1 GND 9
2 8 R280
OUT IN#8
9 LCDVDD_EN 3 EN IN#7 7 U46 DY 10KR2J-3-GP
4 GND IN#6 6 DY
5

1
IN#5
2

1 6
R12
100KR2J-1-GP LCDVDD_S0 <Core Design>
G5281RC1U-GP LCDVDD_EN 2 5
1

EC8 BC1 1 2 3 4
Wistron Corporation
1

R281 100R2J-2-GP
SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DY
2

Taipei Hsien 221, Taiwan, R.O.C.


2N7002DW-1-GP
Title

LCD/Inverter Connector
Size Document Number Rev
Custom
Pamirs -3
Date: Monday, May 21, 2007 Sheet 16 of 41
A B C D E

5V_S0 5V_S0 5V_S0


Docking Connector
D9 D26 D27
2 2 2
DOCK1
PR_INSERT 3 VOL_UP_DK# 3 VOL_DWN_DK#3 AD+
DY DY DY 46
1 1 1 NP2

1
AD+ 44 43 AD+
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U EC50
4 40 39 SCD1U25V3ZY-1GP 4
15 CRT_R

2
15 CRT_G 38 37 TV_LUMA 15
15 CRT_B 36 35 TV_CRMA 15
15 DDC_DATA_CON 34 33 TV_COMP 15
15 DDC_CLK_CON 32 31
DOCK_HS 30 29 CIR_PR
Hsync & Vsync level shift 5V_S0 DOCK_VS 28 27 PWR_ON
R46
0R0402-PAD
USB_7- 26 25 EAPD#_1 1 2 EAPD# 32
USB_7+ 24 23 1 2 MUTE_LED# 31,32
PWR_BTN# 31 R44 0R2J-2-GP
22 21 JACK_DETECT# 29 DY

1
SA 20 19 VOL_UP_DK# 31
C25 28 RJ45-7 18 17
SCD1U16V2ZY-2GP SPDIF_DOCK VOL_DWN_DK# 31
16 15

2
28 RJ45-4 14 13 AUD_AGND
28 RJ45-6 12 11 DK_SPKR_R_1
DK_SPKR_L_1

14

10
DOCK_IN# 31 28 RJ45-3 10 9
28 RJ45-2 8 7 DK_MIC_R_CN_1
28 RJ45-1 6 5 DK_MIC_L_CN_1
9,15 GMCH_HSYNC 9 8 HSYNC_5_1 4 3 AUD_AGND
DOCK_IN# 2 1 DOCK_PRESENT 1 2
DCBATOUT AUD_AGND
U5C TSAHCT125PW-GP EC44 SCD1U16V2ZY-2GP
14

13

7
RN3 42 41 1 2
1 4 DOCK_HS NP1 EC25 SCD1U16V2ZY-2GP
9,15 GMCH_VSYNC 12 11 VSYNC_5_1 2 3 DOCK_VS 45 EAPD# 1 2
EC18 SCD1U16V2ZY-2GP
SRN33J-5-GP-U
U5D TSAHCT125PW-GP FOX-CONN40-1-GP-U1
7

DOCK_PRESENT 1 2
3 20.B0045.040 EC28 SCD1U16V2ZY-2GP 3
PWR_BTN# 1 2
EC20 SCD1U16V2ZY-2GP
CIR_PR 1 2
R300 0R0402-PAD EC59 SC100P50V2JN-3GP
1 2 1D5V_S0 PWR_ON 1 2
29 CIR EC21 SCD1U16V2ZY-2GP
CIR_PR 1 R298 2 VOL_UP_DK# 1 2
CIR_SENSE 31

1
EC58 SCD1U16V2ZY-2GP
R311 VOL_DWN_DK# 1 2
0R0402-PAD 33R3J-2-GP EC24 SCD1U16V2ZY-2GP

2
1 2
5V_S0 R54 0R0402-PAD
USB_7+ Q21
20 USB20_P7

C
R314 CH3904PT-GP
1

29 SPDIF 1 2 B

3
R287

2
10KR2J-3-GP

E
TR1 330R2J-3-GP R313
2N7002DW-1-GP 220R2J-L2-GP 1 2 SPDIF_DOCK
2

L-63UH-GP L28 BLM18PG600SN-2GP


DOCK_IN# 31
DY DY DY

1
1 6

2
EC63 EC64
DOCK_PRESENT 1 2 2 5 USB_7- SC470P50V2KX-3GP SC470P50V2KX-3GP
20 USB20_N7

2
R289 33R2J-2-GP
3 4 1 2
2

2 R52 0R0402-PAD 2
R290
100KR2J-1-GP U8
5V_S0
L29
1

L6
1 2 DK_SPKR_R_1
29 DK_SPKR_R
1

1 2 DK_MIC_R_CN_1
29 DK_MIC_R_CN

2
R23
0R0603-PAD

2
10KR2J-3-GP EC61 EC26
0R0603-PAD
SC100P50V2JN-3GP

1
15 PR_INSERT SC100P50V2JN-3GP
2

1
L30
3D3V_S5
L8
1 2 DK_SPKR_L_1
3D3V_S5 29 DK_SPKR_L DK_MIC_L_CN_1
29 DK_MIC_L_CN 1 2

2
0R0603-PAD
1

2
5V_S0 EC65
R305 0R0603-PAD
EC27
SC100P50V2JN-3GP

1
22KR2J-GP SC100P50V2JN-3GP

1
U12
E

2
2

1 R304
2 B Place near Dock connector
22KR2J-GP Q18 3 PWR_ON Place near Codec
CH3906PT-GP
C

1 2 1
R294 1KR2J-1-GP
S0 = 4V
D

1 BAS40CW-GP <Core Design> 1


Q20
2N7002-11-GP
R295
10KR2J-3-GP
S3 = 2.5V
20,28,31,36,37,38 PM_SLP_S4# G S5 = 0V Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


S

Taipei Hsien 221, Taiwan, R.O.C.

Title
Board to board conn/ Docking
Size Document Number Rev
A3 -3
Pamirs
Date: Friday, May 18, 2007 Sheet 17 of 41
A B C D E
5 4 3 2 1

PCI_AD[0..31] U25C 3 OF 6
24 PCI_AD[0..31]
PCI_AD0 D20 A4
3D3V_S0 PCI_AD1 E19
AD0
AD1
PCI REQ0#
GNT0# D7
PCI_REQ#0 24
PCI_GNT#0 24
PCI_AD2 D19 E18 PCI_REQ1#
PCI_AD3 AD2 REQ1#/GPIO50 PCI_GNT1#
RN61 A20 C18 TP70
PCI_FRAME# PCI_AD4 AD3 GNT1#/GPIO51 PCI_REQ2#
1 8 D17 AD4 REQ2#/GPIO52 B19
D 2 7 PCI_GNT1# PCI_AD5 A21 F18 PCI_GNT2# D
AD5 GNT2#/GPIO53 TP72
3 6 PCI_REQ1# PCI_AD6 A19 C10 PCI_GNT3#
AD6 GNT3#/GPIO55 TP83
4 5 PCI_REQ2# PCI_AD7 C19 A11 PCI_REQ3#
PCI_AD8 AD7 REQ3#/GPIO54
A18 AD8
SRN8K2J-4-GP PCI_AD9 B16 C17
AD9 C/BE0# PCI_C/BE#0 24
PCI_AD10 A12 E15
AD10 C/BE1# PCI_C/BE#1 24
RN65 PCI_AD11 E16 F16
AD11 C/BE2# PCI_C/BE#2 24
1 8 PCI_GNT3# PCI_AD12 A14 E17
AD12 C/BE3# PCI_C/BE#3 24
2 7 PCI_REQ3# PCI_AD13 G16
PCI_SERR# PCI_AD14 AD13 PCI_IRDY#
3 6 A15 AD14 IRDY# C8 PCI_IRDY# 24
4 5 PCI_PIRQG# PCI_AD15 B6 D9 PCI_PAR
AD15 PAR PCI_PAR 24
PCI_AD16 C11 G6 PCI_PCIRST#
PCI_AD17 AD16 PCIRST# PCI_DEVSEL#
SRN8K2J-4-GP A9 D16 PCI_DEVSEL# 24
PCI_AD18 AD17 DEVSEL# PCI_PERR#
D11 AD18 PERR# A7 PCI_PERR# 24
RN68 PCI_AD19 B12 A17 PCI_FRAME#
AD19 FRAME# PCI_FRAME# 24
1 8 PCI_GNT#0 PCI_AD20 C12 B7 PCI_PLOCK#
PCI_PIRQA# PCI_AD21 AD20 PLOCK# PCI_SERR#
2 7 D10 AD21 SERR# F10 PCI_SERR# 24,31
3 6 PCI_PLOCK# PCI_AD22 C7 C16 PCI_STOP#
AD22 STOP# PCI_STOP# 24
4 5 PCI_PERR# PCI_AD23 F13 C9 PCI_TRDY#
AD23 TRDY# PCI_TRDY# 24
PCI_AD24 E11
PCI_AD25 AD24 PCI_PLTRST#
SRN8K2J-4-GP E13 AG24
PCI_AD26 AD25 PLTRST# CLK_PCI_ICH
RN70 E12 B10 CLK_PCI_ICH 3
AD26 PCICLK
1 8 PCI_PIRQH# PCI_AD27 D8 AD27 PME# G7 ICH_PME# 24
2 7 PCI_PIRQC# PCI_AD28 A6
PCI_PIRQB# PCI_AD29 AD28 R415 8K2R2J-3-GP
3 6 E8 AD29
4 5 PCI_REQ#0 PCI_AD30 D6 AD30 1 2 3D3V_S5
PCI_AD31 A3 AD31
SRN8K2J-4-GP
RN67 Interrupt I/F 12/18
C 1 8 PCI_IRDY# 24 PCI_PIRQA# PCI_PIRQA# F9 F8 PCI_PIRQE# C
PIRQA# PIRQE#/GPIO2
2 7 PCI_TRDY# PCI_PIRQB# B5 PIRQB# PIRQF#/GPIO3 G11 PCI_PIRQF#
3 6 PCI_PIRQE# 24 PCI_PIRQC# PCI_PIRQC# C5 PIRQC# PIRQG#/GPIO4 F12 PCI_PIRQG#
4 5 PCI_PIRQD# PCI_PIRQD# A10 B3 PCI_PIRQH#
PIRQD# PIRQH#/GPIO5
SRN8K2J-4-GP
RN63 ICH8-M-1-GP-U
1 8 PCI_PIRQF#
2 7 PCI_GNT2#
3 6 PCI_DEVSEL#
4 5 PCI_STOP# 0921 P/N CHANGE TO 71.0ICH8.M08
SRN8K2J-4-GP 3D3V_S5

U36A

14
PCI_PCIRST# 1
3 PCIRST1# 24,27
2

1
PCI_GNT3# R214
100KR2J-1-GP
DY SSLVC08APWR-GP

7
1

R192

2
1KR2J-1-GP 2 R212
1
0R2J-2-GP
Boot BIOS Strap
2

DY
B B
PCI_GNT0# SPI_CS#1 Boot BIOS Location
3D3V_S5
0 1 SPI
U36B

14
1 0 PCI PCI_PLTRST#
A16 swap override Strap 4
6 PLT_RST1# PLT_RST1# 7,20,26,28,31,33,34
LPC * 5

1
Low= A16 swap override Enable 1 1 R221
100KR2J-1-GP
PCI_GNT3# DY SSLVC08APWR-GP

7
High= Default *
R217

2
2 1
PCI_GNT#0 3D3V_S5
Place closely pin B10 33R2J-2-GP
1

CLK_PCI_ICH PCI_PLTRST# 23
2

R194
2

R393
R191 DY 1KR2J-1-GP DY 10KR2J-3-GP
10R2J-2-GP
2

DY
1

SPI_CS1#
1 1

20 SPI_CS1#
A
C215 A
<Variant Name>
SC8P250V2CC-GP DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH8(1/4)-PCI/INT
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 18 of 41
5 4 3 2 1
5 4 3 2 1

+RTCVCC 3D3V_S0

1 2 LAN100_SLP
R395 330KR2F-L-GP

1 2 SM_INTRUDER#
R390 1MR2J-1-GP RN64
+RTCVCC KBGA20 1 4
1 2 ICH_INTVRMEN U25A 1 OF 6 KBRST# 2 3
LPC_LAD[0..3] 31,33,34
D R384 330KR2F-L-GP D
ICH_RTCX1 AG25 E5 LPC_LAD0 SRN10KJ-5-GP
ICH_RTCX2 RTCX1 FWH0/LAD0 LPC_LAD1
AF24 RTCX2 FWH1/LAD1 F5
G8 LPC_LAD2
ICH_RTCRST# FWH2/LAD2 LPC_LAD3
1 2 AF23 RTCRST# FWH3/LAD3 F6
R394 20KR2J-L2-GP 1D05V_S0

RTC
2
SM_INTRUDER# AD22 C4 LPC_LFRAME# LPC_LFRAME# 31,33,34
INTRUDER# FWH4/LFRAME#

LPC
ICH_RTCX1 G63 R389
C468 GAP-OPEN ICH_INTVRMEN AF25 G9 LPC_DRQ0# H_FERR# 2 1
INTVRMEN LDRQ0# TP84
1 2 ICH_RTCX2 LAN100_SLP AD21 E6 TP85

2
R157 10MR2J-L-GP SC1U10V3KX-3GP LAN100_SLP LDRQ1#/GPIO23 56R2J-4-GP

1
B24 GLAN_CLK A20GATE AF13 KBGA20 31
AG26 H_A20M# H_A20M# 4
A20M# H_DPRSTP#
D22 LAN_RSTSYNC
X2 AF26 H_DPRSTP# TP56
DPRSTP# H_DPRSTP# 5,7
RESO-32D768KHZ-GP

LAN/GLAN
C21 LAN_RXD0 DPSLP# AE26
B21 H_DPSLP# H_DPSLP# 5
LAN_RXD1
3

C22 AD24 H_FERR# H_FERR# 4


LAN_RXD2 FERR# H_DPSLP#
1 2
SB D21 AG29 H_PWRGOOD TP59
LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD 5
1

E20
4

C187 C191 LAN_TXD1 H_IGNNE#


C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 4
SC15P50V2JN-2-GP SC15P50V2JN-2-GP within 2" from R184
2

AH21 AE24 H_INIT# H_INIT# 4


R383 GLAN_DOCK#/GPIO13 INIT#
INTR AC20 H_INTR 4
1 2 GLAN_COMP D25 AH14 KBRST# 1D05V_S0
1D5V_S0 GLAN_COMPI RCIN# KBRST# 31
SB 24D9R2F-L-GP C25

CPU
GLAN_COMPO

1
AD23 H_NMI H_NMI 4
R525 1 HDA_BITCLK NMI R138
29 HDA_BITCLK_CODEC 2 AJ16 HDA_BIT_CLK SMI# AG28 H_SMI# 4
C
29 HDA_SYNC_CODEC R526 1 2 47R2J-2-GP AJ15 56R2J-4-GP C
33R2J-2-GP HDA_SYNC H_STPCLK#
STPCLK# AA24 H_STPCLK# 4
29 HDA_RST#_CODEC AE14

2
HDA_RST# THRMTRIP_ICH#
THRMTRIP# AE27 1 2 H_THERMTRIP# 4,7
29 HDA_SDIN0 AJ17 R146 24R2J-GP
HDA_SDIN0
AH17 AA23

IHDA
HDA_SDIN1 TP8
AH15 HDA_SDIN2 IDE_PDD[0..15] 23 placed within 2" from ICH8M
AD13 V1 IDE_PDD0
HDA_SDIN3 DD0 IDE_PDD1
1 4 DD1 U2
29 HDA_SDOUT_CODEC 2 3 AE13 V3 IDE_PDD2
RN66 SRN33J-5-GP-U HDA_SDOUT DD2 IDE_PDD3
G66 T1
DD3 IDE_PDD4
1 2 AE10 HDA_DOCK_EN#/GPIO33 DD4 V4
AG14 T5 IDE_PDD5
GAP-OPEN TP76 HDA_DOCK_RST#/GPIO34 DD5 IDE_PDD6
DD6 AB2
16 SATA_LED# AF10 T6 IDE_PDD7
SATALED# DD7 IDE_PDD8
DD8 T3
23 SATA_RXN0_C AF6 R2 IDE_PDD9
SATA0RXN DD9 IDE_PDD10 3D3V_S0
23 SATA_RXP0_C AF5 SATA0RXP DD10 T4
23 SATA_TXN0 C231 1 2SC3900P50V2KX-2GP SATA_TXN0_C AH5 V6 IDE_PDD11
C232 1 SATA0TXN DD11
23 SATA_TXP0 2SC3900P50V2KX-2GP SATA_TXP0_C AH6 SATA0TXP DD12 V5 IDE_PDD12
U1 IDE_PDD13 IDE_PDIORDY 1 2
DD13 IDE_PDD14 R431 4K7R2J-2-GP

IDE
AG3 SATA1RXN DD14 V2
AG4 U6 IDE_PDD15
SATA1RXP DD15 INT_IRQ14
AJ4 1 2

SATA
SATA1TXN R418 8K2R2J-3-GP
AJ3 SATA1TXP DA0 AA4 IDE_PDA0 23
DA1 AA1 IDE_PDA1 23
AF2 SATA2RXN DA2 AB3 IDE_PDA2 23
AF1 SATA2RXP
AE4 SATA2TXN DCS1# Y6 IDE_PDCS1# 23
B B
AE3 SATA2TXP DCS3# Y5 IDE_PDCS3# 23

3 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_PDIOR# 23


3 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_PDIOW# 23
R202 Y2 IDE_PDDACK# 23
DDACK#
1 2 AG1 SATARBIAS# IDEIRQ Y3 INT_IRQ14 23
AG2 SATARBIAS IORDY Y1 IDE_PDIORDY 23
24D9R2F-L-GP W5 IDE_PDDREQ 23
DDREQ
Within 500 mils
ICH8-M-1-GP-U

3D3V_AUX_S5 RTC1
5
SB
+RTCVCC U18 BATT1.1 3
2 2
W=20mils 1
1 2 3 R161
R388 100R2J-2-GP W=20mils
W=20mils 1 1 2 W=20mils 4
1

C469 CH715FPT-GP 1KR2J-1-GP


SC1U10V3ZY-6GP ACES-CON3-1-GP
2

A XOR CHAIN ENTRANCE STRAP : RSVD <Variant Name> A

3D3V_S0
Wistron Corporation
R411 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1KR2J-1-GP
1 2 HDA_SDOUT_CODEC Title

DY ICH8(2/4) LAN,HD,IDE,LPC
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 19 of 41
5 4 3 2 1
5 4 3 2 1

3D3V_S0 3D3V_S5 Place closely pin G5 Place closely pin AG9


RN47
1 8 INT_SERIRQ CLK_48M_ICH CLK_14M_ICH

4
3
2 7 PM_CLKRUN#
3 6 CLKSATAREQ# RN27

1
4 5 THERM_SCI# SRN2K2J-1-GP
R201 R193
SRN10KJ-6-GP U25D 4 OF 6 3D3V_S0 10R2J-2-GP 10R2J-2-GP
RN48
DY DY

1
2
SMB_CLK AJ26 AJ12 SATA0_R0 8 1

1 2

1 2
SMBCLK SATA0GP/GPIO21

GPIO
SMB_DATA AD19 AJ10 SATA0_R1 7 2

SATA
SMBDATA SATA1GP/GPIO19

SMB
SMB_LINK_ALERT# AG21 AF11 SATA0_R2 6 3 C230 C218
NEWCARD_RST# SMLINK0 LINKALERT# SATA2GP/GPIO36 SATA0_R3 SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP
1 2 AC17 SMLINK0 GPIO37 AG11 5 4
10KR2F-2-GP SMLINK1 AE19 DY DY

2
R188 SMLINK1 CLK_14M_ICH SRN10KJ-6-GP3
CLK14 AG9 CLK_14M_ICH
3D3V_S0 ICH_RI# AF17 CLK_48M_ICH

CLOCKS
RI# CLK48 G5 CLK_48M_ICH 3
D D

34 LPC_PD# F4 D3 ICH_SUSCLK
SUS_STAT#/LPCPD# SUSCLK

4
3
4 XDP_DBRESET# XDP_DBRESET# AD15
RN43 SYS_RESET#
SLP_S3# AG23 PM_SLP_S3# 22,27,28,31,34,37,38
SRN2K2J-1-GP 7 PM_BMBUSY# PM_BMBUSY# AG12 AF21 PM_SLP_S4# 17,28,31,36,37,38 3/20
3D3V_S5 BMBUSY#/GPIO0 SLP_S4#
DY OCP# SLP_S5# AD18
4 OCP# AG22 SMBALERT#/GPIO11
AH27 GPIO26 1 DY 2 SB_RSMRST# 31

1
2
H_STP_PCI# S4_STATE#/GPIO26 R148
11/08 3 H_STP_PCI#
H_STP_CPU#
AE20
AG18
STP_PCI#
AE23 PM_PWROK 100R2J-2-GP
3 H_STP_CPU# STP_CPU# PWROK PM_PWROK 7,22
1 2 R147

SYSGPIO
1 2 PCIE_WAKE# 24,31,34 PM_CLKRUN# AH11 AJ14 DPRSLPVR DPRSLPVR 7,35 10KR2J-3-GP
R179 1KR2J-1-GP CLKRUN# DPRSLPVR/GPIO16
AE17 AE21 PM_BATLOW#_R 10KR2J-3-GP

POWER MGT
DY 26,27,28,31 PCIE_WAKE# WAKE# BATLOW#
24,31,34 INT_SERIRQ INT_SERIRQ AF12 1 R144 2
THERM_SCI# SERIRQ
AC13 THRM# PWRBTN# C2 SB_PWR_BTN# 31 PST3529UR-1-GP DY
RN30
1 8 ICH_RI# 7,35 VGATE_PWRGD 1 2 VRMPWRGD AJ20 AH20 1 2 2/9
PM_BATLOW#_R R401 0R2J-2-GP VRMPWRGD LAN_RST# R403 0R0402-PAD
2 7 3 CD VDD 2 3D3V_S5
XDP_DBRESET# SST_CTL EC_RMRST#
3
4
6
5 GPIO26 DY TP62 AJ22 TP7 RSMRST# AG27 4 OUT GND 1
GPIO1 CK_PWRGD_R CK_PWRGD
SRN10KJ-6-GP DY TP902
1 CPPE#1
AJ8
AJ9
TACH1/GPIO1 CK_PWRGD E1 1
R433
2
0R0402-PAD
CK_PWRGD 3 U73
3,28 CPPE# TACH2/GPIO6
RN34 R417 0R2J-2-GP ECSCI# AH9 E3 VGATE_PWRGD
1 8 SMB_LINK_ALERT#
31 ECSCI#
ECSMI# AE16
TACH3/GPIO7 CLPWROK VGATE_PWRGD 7,35 DY

GPIO
31 ECSMI# GPIO8
2 7 OCP# 31 EC_SWI# AC19 AJ25 SLP_M#
GPIO12 SLP_M# TP58
3 6 ECSMI# TP88 GPIO17 AG8
GPIO22 NEWCARD_RST# TACH0/GPIO17 CL_CLK0
4 5 28 NEWCARD_RST# AH12 GPIO18 CL_CLK0 F23 CL_CLK0 7
TP81 GPIO20 AE11 AE18 CL_CLK1
GPIO20 CL_CLK1 TP67
SRN10KJ-6-GP GPIO22 AG10 SCLOCK/GPIO22 CL_DATA0
TP57 AH25 F22 CL_DATA0 7

Controller Link
QRT_STATE0/GPIO27 CL_DATA0 CL_DATA1
TP74 AD16 QRT_STATE1/GPIO28 CL_DATA1 AF19 TP65
3 CLKSATAREQ# CLKSATAREQ# AG13 R398
DPRSLPVR GPIO38 SATACLKREQ#/GPIO35 CL_VREF0_ICH
1 2 TP87 AF9 SLOAD/GPIO38 CL_VREF0 D24 1 2 3D3V_S0
C R410 100KR2J-1-GP GPIO39 CL_VREF1_ICH C
TP80 AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23
ICH_RSVD IDE_RESET# 3K24R2F-GP

SCD1U16V2KX-3GP
1 2 TP82 AD10 SDATAOUT1/GPIO48
R399 DY 1KR2J-1-GP AJ23
CL_RST# CL_RST# 7

1
29 SB_SPKR SB_SPKR AD9 SPKR

1
AJ27 GPIO24 C474 R392
CLGPIO0/GPIO24 TP55 453R2F-1-GP
7 MCH_ICH_SYNC# MCH_ICH_SYNC# AJ13 AJ24 GPIO10

MISC
MCH_SYNC# CLGPIO1/GPIO10 TP60
AF22 GPIO14
TP63

2
ICH_RSVD CLGPIO2/GPIO14 GPIO9
32K suspend clock output AJ21 AG19 TP66

2
TP3 CLGPIO3/GPIO9

Low--> default ICH8-M-1-GP-U R397


3D3V_S0 1 2 3D3V_S5
High--> No boot
3K24R2F-GP

SCD1U16V2KX-3GP

1
3D3V_S5 C478
1

1
R396
R519 453R2F-1-GP
10KR2J-3-GP

2
U61B 10KR2J-3-GP
14

2
3D3V_S0 1 2 SB_SPKR
2

4 R414 DY
6 32KHZ 1 2 G792_CLK 22
ICH_SUSCLK 5 R517 10R2J-2-GP

TSLCX08MTCX-GP 32KHZ 1 2 TPM_32K_CLK 34 U25B 2 OF 6


7

R518 10R2J-2-GP
DY 28 PCIE_RXN1 P27 V27 DMI_RXN0 DMI_RXN0 7
PERN1 DMI0RXN DMI_RXP0 3D3V_S5
28 PCIE_RXP1 P26 PERP1 DMI0RXP V26 DMI_RXP0 7
New Card 28 PCIE_TXN1 2 1C169 PCIE_C_TXN1 N29 PETN1 DMI0TXN U29 DMI_TXN0 DMI_TXN0 7
28 PCIE_TXP1 SCD1U16V2KX-3GP
2 1C170 PCIE_C_TXP1 N28 U28 DMI_TXP0 DMI_TXP0 7 3/20
SCD1U16V2KX-3GP PETP1 DMI0TXP
U61A

14
DMI_RXN1

Direct Media Interface


27 PCIE_RXN2 M27 Y27 DMI_RXN1 7

PCI-Express
PERN2 DMI1RXN DMI_RXP1
27 PCIE_RXP2 M26 PERP2 DMI1RXP Y26 DMI_RXP1 7 1
3D3V_S0 1C167 PCIE_C_TXN2 DMI_TXN1 2EC_RMRST#
B LAN 27 PCIE_TXN2 2
SCD1U16V2KX-3GP
2 1C168 PCIE_C_TXP2
L29
L28
PETN2 DMI1TXN W29
W28 DMI_TXP1
DMI_TXN1 7
2
3 1
R653 B
27 PCIE_TXP2 PETP2 DMI1TXP DMI_TXP1 7
SCD1U16V2KX-3GP 100R2J-2-GP
26 PCIE_RXN3 K27 AB26 DMI_RXN2 DMI_RXN2 7 TSLCX08MTCX-GP

7
PERN3 DMI2RXN DMI_RXP2
26 PCIE_RXP3 K26 PERP3 DMI2RXP AB25 DMI_RXP2 7
4
3

Mini Card 1 26 PCIE_TXN3 2 1C183 PCIE_C_TXN3 J29 PETN3 DMI2TXN AA29 DMI_TXN2 DMI_TXN2 7
RN28 26 PCIE_TXP3 SCD1U16V2KX-3GP
2 1C182 PCIE_C_TXP3 J28 AA28 DMI_TXP2 DMI_TXP2 7
SCD1U16V2KX-3GP PETP3 DMI2TXP
SRN2K2J-1-GP SB_RSMRST#
26 PCIE_RXN4 H27 AD27 DMI_RXN3 DMI_RXN3 7
5V_S0 PERN4 DMI3RXN DMI_RXP3
26 PCIE_RXP4 H26 PERP4 DMI3RXP AD26 DMI_RXP3 7
Mini Card 2 26 PCIE_TXN4 2 1C180 PCIE_C_TXN4 G29 AC29 DMI_TXN3 DMI_TXN3 7
1
2

SCD1U16V2KX-3GP PETN4 DMI3TXN


26 PCIE_TXP4 2 1C181 PCIE_C_TXP4 G28 PETP4 DMI3TXP AC28 DMI_TXP3 DMI_TXP3 7
SCD1U16V2KX-3GP
F27 T26 CLK_PCIE_ICH# CLK_PCIE_ICH# 3
U19 PERN5 DMI_CLKN
F26 T25 CLK_PCIE_ICH CLK_PCIE_ICH 3
PERP5 DMI_CLKP
E29 PETN5
1 6 SMB_DATA E28 Y23 Within 500 mils
3,13,14 ICH_SMBDATA SMB_DATA 26,28 PETP5 DMI_ZCOMP
Y24 DMI_IRCOMP 1 2 1D5V_S0
DMI_IRCOMP R391 24D9R2F-L-GP
2 5 D27 PERN6/GLAN_RXN
D26 G3 3D3V_S0
PERP6/GLAN_RXP USBP0N USB_PN0 23
SMB_CLK
26,28 SMB_CLK 3 4 C29 PETN6/GLAN_TXN USBP0P G2 USB_PP0 23 USB1

2
ICH_SMBCLK 3,13,14 C28 H5
PETP6/GLAN_TXP USBP1N USB_PN1 28
R400
C23
USBP1P H4
H2
USB_PP1 28 New Card 330R2J-3-GP
2N7002DW-1-GP SPI_CLK USBP2N USB_PN2 23
B23 SPI_CS0# USBP2P H1 USB_PP2 23 USB2 R189 1 CK_PWRGD
18 SPI_CS1# E22 J3 USB_PN3 23 DY 2

1
SPI_CS1# USBP3N 0R2J-2-GP
D23 SPI USBP3P J2
K5
USB_PP3 23 USB3 1 2 VRMPWRGD
SPI_MOSI USBP4N USB_PN4 32
F21 K4 CAMERA

D
SPI_MISO USBP4P USB_PP4 32
K2 R402 0R0402-PAD
USBP5N USB_PN5 32
RN46 USB_OC#0 Q11
USB_OC#4 1 8 USB_OC#1
AJ19
AG16
OC0# USBP5P K1
L3
USB_PP5 32 BT 2N7002-11-GP
3D3V_S5 OC1#/GPIO40 USBP6N USB_PN6 26
USB_OC#2 USB_OC#2
USB_OC#1
2
3
7
6 USB_OC#3
AG15
AE15
OC2#/GPIO41 USBP6P L2
M5
USB_PP6 26 MINICARD
35 1 CLK_EN# G

USB_OC#6 4 5 USB_OC#4 AF15


OC3#/GPIO42 USB USBP7N
M4
USB20_N7
USB20_P7
17
17 DOCK

S
A
USB_OC#5 OC4#/GPIO43 USBP7P USB20_N8 A
AG17 OC5#/GPIO29 USBP8N M2 USB20_N8 34
SRN10KJ-6-GP USB_OC#6 USB20_P8
RN45 RN37 USB_OC#7
AD12
AJ18
OC6#/GPIO30 USBP8P M1
N3 USB20_N9
USB20_P8 34 Finger Printer
<Core Design>
OC7#/GPIO31 USBP9N TP94
USB_OC#0 1 8 8 1 SMB_LINK_ALERT# USB_OC#8 AD14 N2 USB20_P9
OC8# USBP9P TP92
USB_OC#9 2 7 7 2 SMLINK0 USB_OC#9 AH18 OC9#
USB_OC#8
USB_OC#7
3
4
6
5
6
5
3
4
SMLINK1
PCIE_WAKE# USBRBIAS# F2
F3
USBRBIAS 1
R200
2
22D6R2F-L1-GP Wistron Corporation
USBRBIAS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SRN10KJ-6-GP SRN10KJ-6-GP Taipei Hsien 221, Taiwan, R.O.C.
ICH8-M-1-GP-U Within 500 mils
USB_OC#3 Title
1 2

USB_OC#5 1
R405
2
10KR2F-2-GP
ICH8(3/4) PM,USB,GPIO
R404 10KR2F-2-GP Size Document Number Rev
Custom
Pamirs -3
Date: Monday, May 21, 2007 Sheet 20 of 41
5 4 3 2 1
5 4 3 2 1

+RTCVCC U25F 6 OF 6
20 mils
A23 VSS VSS K7
A5 VSS VSS L1
C472 C455 AA2 L13
VSS VSS
AA7 VSS VSS L15

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
A25 VSS VSS L26
AB1 VSS VSS L27
AB24 L4

2
VSS VSS
AC11 VSS VSS L5
AC14 VSS VSS M12
1D05V_S0 AC25 M13
U25E 5 OF 6 VSS VSS
AC26 VSS VSS M14
AD25 VCCRTC AC27 VSS VSS M15
VCC1_05 A13 AD17 VSS VSS M16
ICH_V5REF_RUN T7 B13 C458 C509 AD20 M17
D V5REF VCC1_05 VSS VSS D
A16 V5REF VCC1_05 C13 AD28 VSS VSS M23

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
L37 VCC1_05 C14 AD29 VSS VSS M28
ICH_V5REF_SUS G4 D14 AD3 M29
1D5V_A3GP_S0 V5REF_SUS VCC1_05 VSS VSS
1D5V_S0 1 2 E14 AD4 M3

2
VCC1_05 VSS VSS
AA25 VCC1_5_B VCC1_05 F14 AD6 VSS VSS N1
C464 AA26 G14 AE1 N11
BLM18PG121SN-1GP VCC1_5_B VCC1_05 VSS VSS
AA27 L11 AE12 N12

CORE
VCC1_5_B VCC1_05 VSS VSS

1
C166 C179 C177

SC2D2U10V3ZY-1GP
AB27 VCC1_5_B VCC1_05 L12 AE2 VSS VSS N13
AB28 VCC1_5_B VCC1_05 L14 AE22 VSS VSS N14

ST220U2VBM-3GP
2 AB29 L16 AD1 N15

2
VCC1_5_B VCC1_05 VSS VSS

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
D28 VCC1_5_B VCC1_05 L17 AE25 VSS VSS N16
D29 L18 L12 AE5 N17
VCC1_5_B VCC1_05 1D5V_DMIPLL_S0 VSS VSS
E25 VCC1_5_B VCC1_05 M11 1 2 1D5V_S0 AE6 VSS VSS N18
5V_S0 3D3V_S0 E26 M18 IND-1UH-36-GP AE9 N26
VCC1_5_B VCC1_05 VSS VSS
E27 VCC1_5_B VCC1_05 P11 AF14 VSS VSS N27

1
F24 P18 C443 AF16 N4
A

VCC1_5_B VCC1_05 VSS VSS


1

F25 T11 C184 AF18 N5


R190 D16 VCC1_5_B VCC1_05 SCD01U16V2KX-3GP SC10U10V5ZY-1GP VSS VSS
G24 T18 AF3 N6

2
VCC1_5_B VCC1_05 VSS VSS
RB751V-40-2-GP H23 VCC1_5_B VCC1_05 U11 AF4 VSS VSS P12
100R2J-2-GP 20 mils H24 U18 AG5 P13
VCC1_5_B VCC1_05 VSS VSS

VCCA3GP
J23 V11 AG6 P14
K
2

ICH_V5REF_RUN VCC1_5_B VCC1_05 VSS VSS


J24 VCC1_5_B VCC1_05 V12 AH10 VSS VSS P15
K24 VCC1_5_B VCC1_05 V14 1D25V_S0 AH13 VSS VSS P16
1 C492 K25 V16 AH16 P17
VCC1_5_B VCC1_05 VSS VSS
SCD47U16V2ZY-GP 05/17 L23 VCC1_5_B VCC1_05 V17 AH19 VSS VSS P23

1
2 L24 V18 AH2 P28
VCC1_5_B VCC1_05 C175 VSS VSS
L25 VCC1_5_B AF28 VSS VSS P29
M24 R29 SC22U6D3V5MX-2GP AH22 R11

2
VCC1_5_B VCCDMIPLL VSS VSS
M25 VCC1_5_B AH24 VSS VSS R12
N23 VCC1_5_B VCC_DMI AE28 AH26 VSS VSS R13
N24 AE29 1D05V_S0 AH3 R14
VCC1_5_B VCC_DMI VSS VSS
N25 VCC1_5_B AH4 VSS VSS R15
5V_S5 3D3V_S5 P24 AC23 AH8 R16
VCC1_5_B V_CPU_IO VSS VSS
P25 VCC1_5_B V_CPU_IO AC24 AJ5 VSS VSS R17
C C
R24 B11 R18
A

VCC1_5_B VSS VSS


1

1
R25 AF29 SCD1U16V2ZY-2GP 3D3V_S0 C493 C506 C498 B14 R28
R204 D19 VCC1_5_B VCC3_3 VSS VSS

SCD1U16V2ZY-2GP
R26 VCC1_5_B B17 VSS VSS R4

SC4D7U6D3V3KX-GP
RB751V-40-2-GP R27 AD2 SCD1U16V2ZY-2GP 3D3V_S0 (DMI) B2 T12

2
VCC1_5_B VCC3_3 VSS VSS

1
100R2J-2-GP 20 mils T23 C512 SCD1U16V2ZY-2GP B20 T13
VCC1_5_B VSS VSS
T24 AC8 (SATA) B22 T14

VCCP CORE
3D3V_S0
K
2

VCC1_5_B VCC3_3 VSS VSS

1
ICH_V5REF_SUS T27 AD8 C500 B8 T15

2
VCC1_5_B VCC3_3 VSS VSS
T28 VCC1_5_B VCC3_3 AE8 C24 VSS VSS T16
1

C520 T29 AF8 3D3V_S0 C26 T17

2
SCD1U16V2ZY-2GP VCC1_5_B VCC3_3 VSS VSS
U24 VCC1_5_B C27 VSS VSS T2
U25 AA3 C6 U12
2

VCC1_5_B VCC3_3 VSS VSS


V23 VCC1_5_B VCC3_3 U7 D12 VSS VSS U13

1
V24 V7 C524 D15 U14
VCC1_5_B VCC3_3 SCD1U16V2ZY-2GP VSS VSS
V25 VCC1_5_B VCC3_3 W1 D18 VSS VSS U15
W25 W6 D2 U16

IDE

2
VCC1_5_B VCC3_3 3D3V_S0 VSS VSS
L38 Y25 VCC1_5_B VCC3_3 W7 D4 VSS VSS U17
VCC3_3 Y7 E21 VSS VSS U23
1D5V_S0 1 2 SC1U10V3ZY-6GP 1D5V_S0_SATAPLL AJ6 SCD1U16V2ZY-2GP E24 U26
VCCSATAPLL VSS VSS
VCC3_3 A8 E4 VSS VSS U27
1D5V_S0 AE7 VCC1_5_A VCC3_3 B15 E9 VSS VSS U3
1

1
BLM18PG121SN-1GP C516 C228 AF7 B18 C480 F15 U5
VCC1_5_A VCC3_3 C438 C461 SCD1U16V2ZY-2GP VSS VSS
AG7 VCC1_5_A VCC3_3 B4 E23 VSS VSS V13
1

C527
ARX

AH7 PCI B9 F28 V15


2

2
VCC1_5_A VCC3_3 VSS VSS
SC10U10V5ZY-1GP

AJ7 VCC1_5_A VCC3_3 C15 F29 VSS VSS V28


D13 F7 V29
2

SC1U10V3ZY-6GP VCC3_3 SCD1U16V2ZY-2GP VSS VSS


AC1 VCC1_5_A VCC3_3 D5 G1 VSS VSS W2
AC2 VCC1_5_A VCC3_3 E10 E2 VSS VSS W26
ATX

AC3 VCC1_5_A VCC3_3 E7 G10 VSS VSS W27


AC4 VCC1_5_A VCC3_3 F11 G13 VSS VSS Y28
AC5 VCC1_5_A G19 VSS VSS Y29
AC12 SCD1U16V2ZY-2GP 3D3V_S0 G23 Y4
VCCHDA VSS VSS
1D5V_S0 AC10 VCC1_5_A G25 VSS VSS AB4
AC9 AD11 SCD1U16V2ZY-2GP 3D3V_S5 G26 AB23
VCC1_5_A VCCSUSHDA VSS VSS

1
G27 VSS VSS AB5
1

B B
C513 AA5 J6 C521 H25 AB6
VCC1_5_A VCCSUS1_05 TP89 VSS VSS

1
AA6 AF20 TP64 H28 AD5

2
SC1U10V3ZY-6GP VCC1_5_A VCCSUS1_05 C444 VSS VSS
H29 U4
2

VCCSUS1_5_ICH_1 VSS VSS


G12 AC16 TP71 H3 W24

2
VCC1_5_A VCCSUS1_5 VSS VSS
G17 VCC1_5_A H6 VSS
VCCSUS1_5_ICH_2 3D3V_S5 ICHGND1 1
H7 VCC1_5_A VCCSUS1_5 J7 TP86 J1 VSS VSS_NCTF A1
R429
DY 2
0R2J-2-GP
J25 VSS VSS_NCTF A2
AC7 C3 SCD1U16V2ZY-2GP J26 A28
VCC1_5_A VCCSUS3_3 VSS VSS_NCTF ICHGND2 1
AD7 VCC1_5_A J27 VSS VSS_NCTF A29
R380
DY 2
0R2J-2-GP
VCCSUS3_3 AC18 J4 VSS VSS_NCTF AJ28

1
1D5V_S0 D1 AG20 C482 C510 J5 AH1
VCCUSBPLL VCCSUS3_3 VSS VSS_NCTF
VCCPSUS

1D5V_S0 AC21 SCD1U16V2ZY-2GP K23 AH29


VCCSUS3_3 VSS VSS_NCTF ICHGND3 1
F1 AC22 K28 AJ1 DY 2
2

2
VCC1_5_A VCCSUS3_3 VSS VSS_NCTF
1

USB CORE

L6 AH28 K29 AJ2 R428 0R2J-2-GP


C517 C511 VCC1_5_A VCCSUS3_3 VSS VSS_NCTF
L7 VCC1_5_A K3 VSS VSS_NCTF AJ29
3D3V_S5 ICHGND4 1
M6 P6 K6 B1 DY 2
2

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP VCC1_5_A VCCSUS3_3 VSS VSS_NCTF R432 0R2J-2-GP


M7 VCC1_5_A VCCSUS3_3 P7 VSS_NCTF B29
VCCSUS3_3 N7
1D5V_S0 W23 VCC1_5_A VCCSUS3_3 C1
1

P1 C519 ICH8-M-1-GP-U
TP73 VCC_LAN1_05_INT_ICH_1 VCCSUS3_3
F17 VCCLAN1_05 VCCSUS3_3 R1
3D3V_S0
SC4D7U6D3V3KX-GP

TP69 VCC_LAN1_05_INT_ICH_2 G18 P2


2

VCCLAN1_05 VCCSUS3_3
VCCPUSB

VCCSUS3_3 P3
F19 VCCLAN3_3 VCCSUS3_3 R3
L13 G20 VCCLAN3_3 VCCSUS3_3 P4
1

VCCSUS3_3 P5
C522 1D5V_S0 1 2 1D5V_S0_GLANPLL A24 R5
L35 VCCGLANPLL VCCSUS3_3
C463 R6
2

SCD1U16V2ZY-2GP BLM18PG121SN-1GP VCCSUS3_3


1D5V_S0 1 2 A26 VCCGLAN1_5
1

C165 VCCCL1_05_ICH
SC2D2U10V3ZY-1GP

A27 G22
GLAN POWER

VCCGLAN1_5 VCCCL1_05 TP61


1

BLM18PG121SN-1GP B26
C176 VCCGLAN1_5
B27 A22
2

SC4D7U10V5ZY-3GP VCCGLAN1_5 VCCCL1_5


SC10U10V5ZY-1GP

B28
2

VCCGLAN1_5
A VCCCL3_3 F20 3D3V_S0 A
3D3V_S0 B25 VCCGLAN3_3 VCCCL3_3 G21
1

C476 <Variant Name>


ICH8-M-1-GP-U
SC1U10V3ZY-6GP
2

DY Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH8(4/4) POWER&GND
Size Document Number Rev
Custom
Pamirs -3
Date: Friday, May 18, 2007 Sheet 21 of 41
5 4 3 2 1
FAN1_VCC

*Layout* 15 mil
5V_S0

2
C35 C40 D11
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP 1N4148W-7-F-GP

1
R32

1
10KR2J-3-GP
EAN1
5

2
3D3V_S0 RN51
4 1 G792_SCL
3 2 G792_SDA FAN1_FG1 3
2
SRN10KJ-5-GP FAN1_VCC 1

1
*Layout* 15 mil
C34 4
SC1000P50V3JN-GP

2
ACES-CON3-1-GP

20.F0735.003
5V_S0
5V_S0 U14
*Layout* 30 mil
1 R303
2 5V_G792_S0 6 1
200R2F-L-GP VCC FAN1
20 DVCC FG1 4
CLK 14 G792_CLK 20

1
16 G792_SDA
SDA

1
R302 C329 7 18 G792_SCL
C331 10KR2F-2-GP C330 SCD1U16V2ZY-2GP DXP1 SCL
9 19

2
SC1U10V3ZY-6GP SC4D7U10V5ZY-3GP DXP2 NC#19
2 11 DXP3 G792_DXP2

3
DGND 5
31 THRM# THRM# 15 17 1 Q4
ALERT# DGND

1
EC_RST# 1 R435 2 HW_THRM_SHDN# 13 PMBS3904-1-GP
0R0402-PAD V_DEGREE THERM# C57
Setting T8 as 3 8

2
THERM_SET SGND1 G792_DXN2 SC2200P50V2KX-2GP
2 10

2
RESET# SGND2
1
100 Degree SGND3 12
R299
100KR2F-L1-GP

2
V_DEGREE G792SFUF-GP G10
=(((Degree-72)*0.02)+0.34)*VCC 3D3V_S5
2

GAP-CLOSE

1
U61D

14 12 PM_SLP_S3# 20,27,28,31,34,37,38 DXP1:108 Degree H_THERMDA 4

1
7,20 PM_PWROK 11 DXP2:H/W Setting
13 G792_RST# Place near chip as close C49
DXP3:88 Degree as possible SC2200P50V2KX-2GP
H_THERMDC 4

2
1
TSLCX08MTCX-GP
7

R266

100KR2J-1-GP

2
KBC_3D3V_AUX

1
D33
5V_AUX_S5 1N4148W-7-F-GP R434
100KR2J-1-GP
3D3V_S0

2
3D3V_S0 U54
U43
5 1 EC_RST# EC_RST# 31
G792_SDA VCC B
4 3 KBC_SDA1 31,32 A 2 S5_ENABLE 31

1
34,36 PWR_S5_EN# 4 Y GND 3
5 2 C525
SC1U10V3ZY-6GP

2
6 1 G792_SCL 74AHCT1G00GW-GP
31,32 KBC_SCL1

73.01G00.0BG
2N7002DW-1-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor G792


Size Document Number Rev
Custom
Pamirs -3
Date: Monday, May 21, 2007 Sheet 22 of 41
IDE_PDD[0..15] 19

SATA HD Connector
3D3V_S0 CD-ROM CONNECTOR 5V_S0

5V_S0 CDROM_LED# 1 2
R443 4K7R2J-2-GP
3D3V_S0

1
C502 C514 INT_IRQ14 1 2

1
SC10U10V5ZY-1GP R224 8K2R2J-3-GP

2
SCD1U16V2ZY-2GP C501 C213
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP

2
CDROM1
HDD1 51
23 NP1
1 29 CD_AUDR 2 1 CD_AUDL 29
2 SATA_TXP0 19
19 SATA_TXN0 3 4 3 CD_AGND 29
4 IDE_PDD8 6 5 RSTDRV#_5
19 SATA_RXN0_C C526 1 2SATA_RXN0 5 IDE_PDD9 8 7 IDE_PDD7
6 SATA_RXP0 1 2SC3900P50V2KX-2GP SATA_RXP0_C 19 IDE_PDD10 10 9 IDE_PDD6 3D3V_S0
SC3900P50V2KX-2GP 7 IDE_PDD11 12 11 IDE_PDD5
8 C523 IDE_PDD12 14 13 IDE_PDD4

1
9 IDE_PDD13 16 15 IDE_PDD3
10 IDE_PDD14 18 17 IDE_PDD2 R226
11 IDE_PDD15 20 19 IDE_PDD1 4K7R2J-2-GP
12 19 IDE_PDDREQ 22 21 IDE_PDD0
13 19 IDE_PDIOR# 24 23

2
14 26 25 IDE_PDIOW# 19
15 19 IDE_PDDACK# 28 27 IDE_PDIORDY 19
16 30 29 INT_IRQ14 19
17 32 31 IDE_PDA1 IDE_PDA1 19
18 IDE_PDA2 34 33 IDE_PDA0 IDE_PDA0 19
19 IDE_PDA2
19 19 IDE_PDCS3# 36 35 IDE_PDCS1# 19
20 38 37 CDROM_LED# 16
21 40 39
22 5V_S0 42 41 5V_S0
24 44 43

1
DY 46 45
SYN-CONN22A-GP-U2 C528 C529 C530 48 47
SC10U10V5ZY-1GP 50 49

2
20.F0817.022 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP NP2
52 primary channel:low

TYCO-CONN50-4R-GP-U1

20.80353.050

100 mil
USB PORT 5V_S0
5V_S3
5V_USB1_S3 5V_S3 U59D

14
F2 100 mil 5V_USB2_S3
F3
1 2 100 mil 12
RSTDRV#_5
1 2 11
1

18 PCI_PLTRST# 13

1
FUSE-2A8V-3GP C318
SCD1U16V2ZY-2GP FUSE-1D1A6V-8GP C417 C415 TC19
2

7
2 SE100U16VM-L1-GP TSAHCT08PWR-1GP

2
SCD1U16V2ZY-2GP SC1000P50V3JN-GP

High limit under 2.5 mm

5V_USB2_S3

1 2
5V_USB1_S3 R139 0R0402-PAD SKT-USB-131-GP-U
20 USB_PN0 USB_1-
8
6

2
USB1 1
DY
12 L-63UH-GP 2
10 3
9 TR3 4
20 USB_PN3 8 5
20 USB_PP3 7 7

3
20 USB_PN2 6
5 20 USB_PP0 USB_1+
20 USB_PP2 USB2
4
5V_S3 3 1 2
1 2 2 R140 0R0402-PAD
R297 150R2J-L1-GP-U 22.10218.N21
1
Q19 11
C NUMLK_LED#
B R1
31 NUMLK_LED ACES-CON10-5-GP
E
R2
PDTC124EU-1-GP
20.F0735.010
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HD/CDROM/USB
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 23 of 41
5 4 3 2 1

3D3V_S0 3D3V_S0
IC1B

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
1

1
C576 C570 C557 C584 C585 10 67
VCC_PCI1 VCC_3V
D C572
SC10U10V5ZY-1GP
20
27
VCC_PCI2 D

2
VCC_PCI3

SCD01U16V2KX-3GP
32 VCC_PCI4

1
41 C556
3D3V_S0 VCC_PCI5 C588
128 VCC_PCI6 SC10U10V5ZY-1GP

2
61 VCC_RIN
16 VCC_ROUT1
VCC_ROUT 34 VCC_ROUT2
1

64 VCC_ROUT3
C552 C547

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
114

SCD47U16V3ZY-3GP
VCC_ROUT4

1
SC10U10V5ZY-1GP C559 C549 C586 C589 120
2

DY SCD1U16V2ZY-2GP VCC_ROUT5
86

2
VCC_MD
SCD47U16V3ZY-3GP
GND1 4
GND2 13
PCI_AD31 125 22
PCI_AD30 126 AD31 GND3
AD30 GND4 28
PCI_AD29 127 54
PCI_AD28 AD29 GND5
1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 11 AD23
AD22
C PCI_AD21 12
PCI_AD20 14 AD21
AD20
AGND1
AGND2
99
102
C
PCI_AD19 15 103
PCI_AD18 17 AD19 AGND3 3D3V_S0
AD18 AGND4 107
PCI_AD17 18 111
PCI_AD16 19 AD17 AGND5
AD16

1
PCI_AD15 36
PCI_AD14 37 AD15 R504
PCI_AD13 38 AD14 4K7R2J-2-GP
PCI_AD12 39 AD13
PCI_AD11 40 AD12

2
AD11

PCI / OTHER
PCI_AD10 42 69
PCI_AD9 AD10 HWSPND#
43 AD9
PCI_AD8 44
18 PCI_AD[0..31] AD8
PCI_AD7 46
PCI_AD6 AD7 3D3V_S0
47 AD6 MSEN 58
PCI_AD5 48
PCI_AD4 AD5
49 AD4 XDEN 55
PCI_AD3 50 RN76
PCI_AD2 AD3
51 AD2 1 8
PCI_AD1 52 57 1 2 3D3V_S0 2 7 DY
AD1 UDIO5

1
PCI_AD0 53 R513 100KR2J-1-GP 3 6
AD0 EC90
18 PCI_PAR 33 PAR 4 5
PCI_C/BE#3 7 65 SCD1U16V2ZY-2GP
18 PCI_C/BE#3

2
PCI_C/BE#2 C/BE3# UDIO3
18 PCI_C/BE#2 21 59 SRN10KJ-6-GP
PCI_C/BE#1 C/BE2# UDIO4
18 PCI_C/BE#1 35 C/BE1#
3D3V_S0 PCI_C/BE#0 45 56
18 PCI_C/BE#0 C/BE0# UDIO2
PCI_AD25 1 2 R5C834_IDSEL 8
R486 10R2J-2-GP IDSEL
UDIO1 60
1

124
B R495
18
18
PCI_REQ#0
PCI_GNT#0 123
REQ#
GNT# UDIO0/SRIRQ# 72 INT_SERIRQ 20,31,34
B
10KR2J-3-GP 23
18 PCI_FRAME# FRAME#
18 PCI_IRDY# 24 IRDY#
18 PCI_TRDY# 25
1 2

TRDY#
18 PCI_DEVSEL# 26 DEVSEL#
18 PCI_STOP# 29 STOP# INTA# 115 PCI_PIRQA# 18
C565 18 PCI_PERR# 30
SCD1U16V2ZY-2GP PERR#
18,31 PCI_SERR# 31 116 PCI_PIRQC# 18
2

SERR# INTB#
GBRST# 71 GBRST#
18,27 PCIRST1# 119 PCIRST# 1394 : INTA#
3 PCLK_PCM 121 PCICLK 4in1 : INTB#
SHIELD 18 ICH_PME# 2 1 70 PME# TEST 66
GND R508 DY 0R2J-2-GP
20,31,34 PM_CLKRUN# 1 2 117 CLKRUN#
2

R478 0R0402-PAD
R477 R479 R509
10KR2J-3-GP 1KR2J-1-GP 100KR2J-1-GP
DY DY R5C833-GP
1

1
1

C548
SC10P50V2JN-4GP <Core Design>
A A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

R5C832/PCI
Size Document Number Rev
A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 24 of 41

5 4 3 2 1
A B C D E

IC1A

3D3V_PHY

3D3V_S0 3D3V_PHY
AVCC_PHY1 98
AVCC_PHY2 106 1 2
110 L39 MLB-160808-18-GP Reserve R547,R548,R550,R551 for co-layout
AVCC_PHY3
AVCC_PHY4 112
GUARD GND

1
4 C555 SC15P50V2JN-2-GP C551 C550 4
1 2
1 2 1394_XI 113 TPBIAS0 C541 SCD01U16V2KX-3GP R176 0R0402-PAD
TPBIAS0 SC10U10V5ZY-1GP

2
SCD1U16V2ZY-2GP
10/27
1

94 XI
TPA0+ 3L15 4
X6 C544 CLOSE TO CHIP

1
X-24D576MHZ-57GP DY R480 R481
TPA0- 2 1 C542
2

TPB0N 11 DLW21HN900SQ2LGP
104

2
C554 TPBN0 SCD01U16V2KX-3GP
5 VG#5 TPA 4
1 2 1394_XO 95 105 TPB0P 6 3 1 2 TPBIAS0

2
XO TPBP0 VG#6 TPA* TPB0+ R178 0R0402-PAD SCD33U10V3KX-3GP TPA0P
7 VG#7 TPB 2
8 1 TPA0N
SC15P50V2JN-2-GP VG#8 TPB* TPB0P
SKT-1394-4P-13GP-U 1 2 TPB0N
IEEE1394/SD TPAN0 108 TPA0N R182 0R0402-PAD
1 2 1 2 R473
1 2 RICHO_FILO 96 FIL0 TPAP0 109 TPA0P 3L18 4 R483 5K11R2F-L1-GP
C553 SCD01U16V2KX-3GP 1394_TPB1_R
DY 1 2 1 2 C543
TPB0- 2 1 R482
1 2RICHO_REXT 101 REXT
DLW21HN900SQ2LGP SC270P50V2JN-2GP
R474 10KR2F-2-GP
1 2
R186 0R0402-PAD
1 2 RICHO_VREF 100
C546 SCD01U16V2KX-3GP VREF

GUARD GND

87 XD_DATA7 3D3V_CARD
3 MDIO17 3

92 XD_DATA6
MDIO16
89 XD_DATA5 DY DY
MDIO15

1
91 XD_DATA4 C508 C540 C507
MDIO14 C505

SCD1U16V2ZY-2GP
2

2
90 SD/XD/MS_DATA3 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC2D2U10V3ZY-1GP

2
MDIO13
93 SD/XD/MS_DATA2
MDIO12
81 SD/XD/MS_DATA1
MDIO11
82 SD/XD/MS_DATA0
MDIO10 CARD1

75 XD_WP# 31 2 XD_SW#
MDIO05 SD_VCC CD XD_ALE_1
ALE 7
88 SD/XD/MS_CMD SD/XD/MS_DATA1_1 28
MDIO08 MS_VCC SD_WP#(XDR/B#)
38 MS_VCC R/B# 3
83 XD_ALE 4 SD/XD/MS_CLK_1
MDIO19 RE# XD_CE#_1
19 VCC CE# 5
85 XD_CLE 6 XD_CLE_1
MDIO18 CLE SD/XD/MS_CMD_1
WE# 8
78 XD_CE# 9 XD_WP#
MDIO02 SD/XD/MS_CMD_1 WP#
36 SD_CMD
SD/XD/MS_CLK_1 27
SD_WP#(XDR/B#) SD_CLK SD/XD/MS_DATA0_1
MDIO03 77 D0 11
12 SD/XD/MS_DATA1_1
SD_CD# D1 SD/XD/MS_DATA2_1
MDIO00 80 D2 13
SD/XD/MS_DATA0_1 23 14 SD/XD/MS_DATA3_1
SD/XD/MS_DATA1_1 SD_DAT0 D3 XD_DATA4_1
22 SD_DAT1 D4 15
79 XD/MS_CD# SD/XD/MS_DATA2_1 41 16 XD_DATA5_1
MDIO01 SD/XD/MS_DATA3_1 SD_DAT2 D5 XD_DATA6_1
39 SD_DAT3 D6 17
2 XD_DATA7_1 2
D7 18
84 SD/XD/MS_CLK SD_CD# 42
MDIO09 SD_WP#(XDR/B#) SD_CD_DETECT
21 SD_WP_PROTECT
51 SD_CD#
MC_PWR_CTRL_0 SD_CO2
MDIO04 76 R488 SD_CO1 50

74 MS_LED# MS_LED# 16 1 2 SD/XD/MS_CLK_1 RN75 45


MDIO06 XD_DATA4 XD_DATA4_1 SD_WP#(XDR/B#) SD_WP1
8 1 44 SD_WP2 SD_3P 49
1

97 33R2J-2-GP XD_DATA5 7 2 XD_DATA5_1 48


RSV R487 XD_DATA6 XD_DATA6_1 SD_6P SD/XD/MS_DATA0_1
MDIO07 73 6 3 SD_7P 47
100KR2J-1-GP XD_DATA7 5 4 XD_DATA7_1 SD/XD/MS_CMD_1 26 46 SD/XD/MS_DATA1_1
SD/XD/MS_DATA0_1 MS_BS SD_8P
30 MS_SDIO
R5C833-GP SRN47J-5-GP MS_INS# 34
2

SD/XD/MS_CLK_1 MS_INS
37 MS_SCLK MS_VSS 25
RN73
SD/XD/MS_DATA08 1SD/XD/MS_DATA0_1 33
SD/XD/MS_DATA17 SD_VSS
2SD/XD/MS_DATA1_1 TP79
SD/XD/MS_DATA3_1 35 MS_RESERVED#MS_7 SD_VSS 24
SD/XD/MS_DATA26 3SD/XD/MS_DATA2_1 SD/XD/MS_DATA2_1 32
SD/XD/MS_DATA35 MS_RESERVED#MS_5
4SD/XD/MS_DATA3_1 1 29 SD_I/O GND 1
GND 20
SRN47J-5-GP NP1 40
TPAD28 NP1 GND
NP2 NP2 GND 10
3D3V_CARD U56 3D3V_S0 NP3 43
20mil 1 5
C535
1 2 XD_ALE 2
RN77
3 XD_ALE_1
NP4
NP5
NP3
NP4
GND
GND 52
53
OUT IN For SD Card Power NP5 GND
1

2 SD/XD/MS_CMD 1 4 SD/XD/MS_CMD_1 NP6 54


GND NP6 GND
1

R469 C536 3 4 SCD1U16V2ZY-2GP


SET ON#
1

10KR2J-3-GP
SC1U10V3ZY-6GP R471
2

10KR2J-3-GP 3D3V_S0 SRN33J-5-GP-U TAI-CON43-GP-U4


R454 AAT4610AIGV-GP RN78
2

15KR2J-1-GP 20.I0030.001
2

MC_PWR_CTRL_1 XD_SW# XD_CE# 2 3 XD_CE#_1


2

R489 XD_CLE 1 4 XD_CLE_1


100KR2J-1-GP
6

1 1
U57 SRN33J-5-GP-U
RB731U-2-GP <Core Design>
2

2N7002DW-1-GP
MS_INS# 3 4 11/1
Wistron Corporation
2 5 XD/MS_CD# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.


0707 XD_SW#_11 6 SD_CD# Title
D34 R5C832/IEEE1394/SD
Size Document Number Rev
MC_PWR_CTRL_0 Custom
Pamirs -3
Date: Monday, May 21, 2007 Sheet 25 of 41
A B C D E
A B C D E

Mini Card Connector


Mini Card Connector 2(802.11a/b/g)
Mini Card Connector 1(WWAN)
3D3V_S0
3D3V_MINI2_S0 1D5V_S0
L22
3D3V_S0 1D5V_S0 MINI2
4 3D3V_MINI1_S0 2 1 4
L9
MINI1
2 1
DY MLB201209-0600P-GP 6 1.5V REFCLK+ 13
11
CLK_PCIE_MINI1 3
CLK_PCIE_MINI1# 3
REFCLK-
MLB201209-0600P-GP 6 1.5V REFCLK+ 13 CLK_PCIE_MINI2 3 2 3.3V
REFCLK- 11 CLK_PCIE_MINI2# 3 PERN0 23 PCIE_RXN3 20
2 3D3V_S5 28 25
3.3V +1.5V PERP0 PCIE_RXP3 20
PERN0 23 PCIE_RXN4 20 48 +1.5V
28 +1.5V PERP0 25 PCIE_RXP4 20 PETN0 31 PCIE_TXN3 20
3D3V_S5 48 52 33
+1.5V +3.3V PETP0 PCIE_TXP3 20
PETN0 31 PCIE_TXN4 20
52 +3.3V PETP0 33 PCIE_TXP4 20 24 +3.3VAUX USB_D- 36
USB_D+ 38
24 36 USB_PN6 20 DUMMY-R2
+3.3VAUX USB_D- DUMMY-R2
USB_D+ 38 USB_PP6 20
DUMMY-R2 32 WL_PRIORITY 1 2WL_PRIORITY1_1 3 RESERVED#3 SMB_CLK 30 SMB_CLK
32 BT_PRIORITY R528 1 2BT_PRIORITY1_1 5 RESERVED#5 SMB_DATA 32 SMB_DATA
WL_PRIORITY 1 2WL_PRIORITY1 3 30 R529 8
RESERVED#3 SMB_CLK SMB_CLK 20,28 RESERVED#8
BT_PRIORITY R330 1 2BT_PRIORITY1 5 32 10 1 2 PCIE_WAKE#
RESERVED#5 SMB_DATA SMB_DATA 20,28 RESERVED#10
R333 8 12 1 R371 DUMMY-R2
DUMMY-R2 RESERVED#8 RESERVED#12 WAKE# TP40 TPAD30
10 RESERVED#10 1 2 PCIE_WAKE# 20,27,28,31 14 RESERVED#14 CLKREQ# 7 1
2/9 12 1 R331 DUMMY-R2 16 22 PLT_RST1#
RESERVED#12 WAKE# TP54 TPAD30 RESERVED#16 PERST#
14 RESERVED#14 CLKREQ# 7 1 31 E51_RXD 17 RESERVED#17
16 RESERVED#16 PERST# 22 PLT_RST1# 7,18,20,28,31,33,34 31 E51_TXD 19 RESERVED#19
31 E51_RXD 17 RESERVED#17 31 WIFI_RF_EN 20 RESERVED#20 GND 4
31 E51_TXD 19 RESERVED#19 37 RESERVED#37 GND 9
31 M_WXMIT_OFF# M_WXMIT_OFF# 20 4 3D3V_MINI2_S0 39 15
RESERVED#20 GND RESERVED#39 GND
12/11 37 RESERVED#37 GND 9 41 RESERVED#41 GND 18
3D3V_MINI1_S0 39 RESERVED#39 GND 15 43 RESERVED#43 GND 21
3 41 18 45 26 3
RESERVED#41 GND RESERVED#45 GND
SB 43 RESERVED#43 GND 21 47 RESERVED#47 GND 27
45 RESERVED#45 GND 26 49 RESERVED#49 GND 29
47 RESERVED#47 GND 27 5V_AUX_S5 51 RESERVED#51 GND 34
49
51
RESERVED#49 GND 29
34
10/23 GND 35
40
5V_AUX_S5 RESERVED#51 GND GND
GND 35 1 42 LED_WWAN# GND 50
40 33 WLANONLED TPAD30 TP78 44 53
TPAD30 TP75 LED_WWAN# GND LED_WLAN# GND
1 42 LED_WWAN# GND 50 1 46 LED_WPAN# GND 54
WLANONLED 44 53 TPAD30 TP77
TPAD30 TP29 LED_WPAN# LED_WLAN# GND
1 46 54

NP1
NP2
LED_WPAN# GND
NP1
NP2

NP1
NP2
62.10043.341
NP1
NP2

62.10043.341 DY SKT-MINI52P-7-GP

SKT-MINI52P-7-GP

12/11 3D3V_MINI2_S0 1D5V_S0 3D3V_S5


5V_AUX_S5
2 2

DY

1
C591 SCD1U16V2ZY-2GP DY C495
SCD1U16V2ZY-2GP C499 C496 C497 C494 SCD1U16V2ZY-2GP
DY DY

2
3D3V_MINI1_S0 1D5V_S0 3D3V_S5 DY SCD1U16V2ZY-2GP DY
12/11 SC10U10V5ZY-1GP
5V_AUX_S5 SC10U10V5ZY-1GP
12/11
1

C333
1

C592 C810 C325 C89 C326 C332 SCD1U16V2ZY-2GP


SCD1U16V2ZY-2GP DY
SC10U10V5ZY-1GP
2

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
SCD01U16V2KX-3GP
2

SC10U10V5ZY-1GP

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD CONN .


Size Document Number Rev
A3
Pamirs -3
Date: Monday, May 21, 2007 Sheet 26 of 41
A B C D E
A B C D E

R158 DY
1 2
10MR2J-L-GP

X3
2D5V_LAN_S5 3D3V_LAN_S5 LANX2 1 2 LANX1
1D2V_LAN_S5

1
XTAL-25MHZ-74GP
4 Y41.-1 C188 C192 4
SC27P50V2JN-2-GP SC27P50V2JN-2-GP

2
57
52
51
32
28
22
19

40
45
61

64
23

33
39
44
48
58

13
1
8

2
7
U23

AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL

VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL

VDD25
AVDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DY 3D3V_LAN_S5
3D3V_LAN_S5 1 2
R407 0R2J-2-GP 34 6 PCIE_WAKE# 20,26,28,31
LANPWR NC#34 WAKE#
3D3V_S0 1 2 2 1 35 NC#35 PERST# 5 PCIRST1# 18,24
4K7R2J-2-GP R376 55 CLK_PCIE_LAN 3 3D3V_LAN_S5
R406 0R0402-PAD REFCLKP 3D3V_LAN_S5
36 NC#36 REFCLKN 56 CLK_PCIE_LAN# 3
37 NC#37
50 LAN_RXN1 C504 1 2SCD1U10V2KX-4GP PCIE_RXN2 20
PCIE_TXN

1
1

1
49 LAN_RXP1 C503 1 2SCD1U10V2KX-4GP PCIE_RXP2 20 DY
PCIE_TXP R409 R408
4K7R2J-2-GP 4K7R2J-2-GP 0R2J-2-GP
Marvell recommend: PCIE_RXN 53 PCIE_TXN2 20
3D3V_LAN_S5 LOM_DISABLE# 10 54 U24
2K Ohm LOM_DISABLE# PCIE_RXP PCIE_TXP2 20
12 1 8 R174

2
2

2
VAUX_AVLBL A0 VCC
TPAD30 TP18 1LANSC 11 SWITCH_VCC 2 A1 WP 7 EEWP EEWP
LANPWR 47 63 3 6 VPD_CLK
VMAIN_AVLBL LED_LINK# LAN100M_LED# 28 A2 SCL

1
10/26 TPAD30 TP17 1LANSV 9 62 4 5 VPD_DATA
LANRSET SWITCH_VAUX NC#62 GND SDA R185
1 2 16 RSET LED_SPEED# 60
CTRL12 3 59 AT24C08AN-1-GP 0R0402-PAD
R166 1K91R2F-1-GP CTRL25 CTRL12 LED_ACT# ACT_LED# 28
4 CTRL25

PU_VDDO_TTL#42
PU_VDDO_TTL#43

2
TPAD30 TP19 1LANHP 24 15 LANX1
HSDACP XTALI
3 TPAD30 TP20 1LANHN 25 HSDACN XTALO 14 LANX2 3

TESTMODE
VPD_DATA
Pull up for AT24C08 another pull low

VPD_CLK

TSTPT
NC#27
NC#31

NC#26
NC#30

GND
RXN

RXP
TXN

TXP
LOM_DISABLE#

88E8039-A0-GP

18
21
27
31

17
20
26
30

41
38

29
46

42
43

65
1

R647
DUMMY-R2 TP21
2N7002DW-1-GP 28 MDI0- MDI0- 3D3V_LAN_S5
28 MDI1- MDI1- 1 R521
TPAD30 1 2
PM_LAN_ENABLE 6 1 VPD_CLK 4K7R2J-2-GP
2

28 MDI0+ MDI0+ VPD_DATA


PM_SLP_S3# PM_LAN_ENABLE# MDI1+
4,37,38 PM_SLP_S3# 5 2 28 MDI1+ SB
4 3

12/18
U70
3D3V_S5 MDI0+ MDIS0_LAN 2 C456 3D3V_LAN_S5 2D5V_LAN_S5 1D2V_LAN_S5
3D3V_S5
SB 1
R167
2 1
49D9R2F-GP
MDI0- 1 2 SCD01U16V2KX-3GP 1 2 C486 1 2 1 2
2

DY R170 49D9R2F-GP SC1000P50V2JN-GP C473 SCD1U10V2KX-4GP C454 SC1U10V2KX-GP


R524 MDI1+ 1 2 MDIS1_LAN
1 2 C471 1 2 C488 DY 1 2 1 2
U61C R172 49D9R2F-GP SC1000P50V2JN-GP C481 SCD1U10V2KX-4GP C487 SC1U10V2KX-GP
14

10KR2J-3-GP
MDI1- 1 2 SCD01U16V2KX-3GP 1 2 1 2 C467 DY 1 2 C490
9 R175 49D9R2F-GP C462 SC1U10V2KX-GP SC1000P50V2JN-GP SC1000P50V2JN-GP
1

2 PM_LAN_ENABLE# 2
8 1 2 1 2 C477 DY 1 2 C451
AC_IN# 10 DY C452 SC1U10V2KX-GP SC1000P50V2JN-GP SC1000P50V2JN-GP
31,39 AC_IN#
1 2 1 2 1 2
TSLCX08MTCX-GP C453 SC1U10V2KX-GP C479 SC1U10V2KX-GP C489 SC1U10V2KX-GP
7

DY C4831 2 1 2 C450
SC1U10V2KX-GP SC1000P50V2JN-GP
R645
1 2
1 2 C491 SC1U10V2KX-GP
DY 0R3-0-U-GP 1 2 C470
SC1000P50V2JN-GP
Q33
PLACE PNP TO CHIP ACAP
CTRL25 PIN TRACE IS 25MIL PLACE PNP TO CHIP ACAP
3D3V_S5 AO3403-GP 3D3V_LAN_S5 CTRL12 PIN TRACE IS 25MIL
S 3D3V_LAN_S5 3D3V_LAN_S5
1

D
1

1
D
SC22U6D3V5MX-2GP

C436 C447 R643 C449 C205 C203 C201


SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
G

10KR2J-3-GP R358 R165 SC4D7U6D3V5KX-3GP


SC4D7U6D3V5KX-3GP

DY
1

C204 4K7R2J-2-GP 4K7R2J-2-GP SCD1U10V2KX-4GP


2

2
SC22U6D3V5MX-2GP
2

3
2

CTRL25 1 Q27 CTRL12 1 Q10


2SB772PT-1-GP 2SB772PT-1-GP
1D2V_LAN_S5
D

2
2D5V_LAN_S5
Q32
1

1
2N7002EPT-GP C428 C460 C485 C209
PM_LAN_ENABLE G 8053:CTRL25.
8055:CTRL18. 8053:2.5V. <Core Design>
2

2
1
SC10U10V5KX-2GP SCD1U10V2KX-4GP 8055:1.8V. SCD1U10V2KX-4GP SC10U10V5KX-2GP 1
S

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
12/4 Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN MARVELL
Size Document Number Rev
A3
Pamirs -3
Date: Tuesday, May 22, 2007 Sheet 27 of 41

A B C D E
A B C D E

1 R532 2 0R0402-PAD 1.route on bottom as differential pairs. PIN09 : GREEN


2D5V_LAN_S5
10/100M Lan Transformer RJ45-1 RJ45-1_L 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. PIN11 : ORANGE
17 RJ45-1 PIN13 : YELLOW
3.No vias, No 90 degree bends.
XF1 4.pairs must be equal lengths.

1
27 MDI1+ 1 5.6mil trace width,12mil separation.
R522 16 RJ45-3
R523 6.36mil between pairs and any other trace.
0R0402-PAD 0R0402-PAD 7.Must not cross ground moat,except
RJ-45 moat.
2

4 2 4
RJ45-2 RJ45-2_L
17 RJ45-2
2 15 RJ45-6 1 R534 2 0R0402-PAD
27 MDI1- RJ1
XRF_RDC 3 14 XFR_RXC
15
7 10 RJ45-1 27 LAN100M_LED# LAN100M_LED# 9
27 MDI0+
3D3V_LAN_S5 1 2 10
1 R535 2 0R0402-PAD R338 470R2J-2-GP 11
RJ45-1_L 1
RJ45-3 RJ45-3_L
17 RJ45-3
RJ45-7 RJ45-2_L 2
RJ45-4 RJ45-3_L 3
RJ45-4 4
17 RJ45-4
5
8 9 RJ45-2 RJ45-6_L 6
27 MDI0-
6 11 XFR_CMT 7
17 RJ45-7
XRF_TDC 4 12 8
5 13 3D3V_LAN_S5 1 R345 2 12
1

4
3
2
1
DY DY 27 ACT_LED# 470R2J-2-GP 13
C93 C345 XFORM-273-GP RN14 14
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SRN75J-1-GP RJ45-6_L
17 RJ45-6
2

RJ45-112-GP-U
1 R536 2 0R0402-PAD Green : Link up
Blinking : TX/RX activity

5
6
7
8
3 3
LAN_TERMINAL 1 2
C88 SC1500P2KV8KX-3GP

NEW1
NEWCARD Connector 28

Place them Near to Connector 26


20 PCIE_TXP1 25
Place them Near to Chip 20 PCIE_TXN1 24
SKT1 23
3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5 12/12 20 PCIE_RXP1 PCIE_RXP1 22
3D3V_S5 1D5V_S0 1 20 PCIE_RXN1 PCIE_RXN1 21
20
3 CLK_PCIE_NEW 19
NP1 3 CLK_PCIE_NEW# 18
1

C235 17
3,20 CPPE#
1

C243 C236 C233 C229 SCD1U16V2ZY-2GP 2 3 NEWCARD_CLKREQ# NEWCARD_CLKREQ# 16


DY C579 C574 SC10U10V5ZY-1GP
3D3V_NEW_S0 15
2

DY SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP CARDBUS2P-11-GP 14


2

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP PERST# 13


3D3V_NEW_LAN_S5 12
20,26,27,31 PCIE_WAKE# 11
For Newcard socket 1D5V_NEW_S0 10
9
2 SMB_DATA 2
20,26 SMB_DATA 8
SMB_CLK 7
20,26 SMB_CLK
TPAD30 TP24 1CONN_TP2 6
3D3V_NEW_S0 1D5V_NEW_S0
TPAD30 TP22 1CONN_TP3 5
CPUSB# 4
20 USB_PP1 3
20 USB_PN1 2
11
13

1
3
5

U58
27
3.3VOUT
3.3VOUT

1.5VOUT
1.5VOUT

20,22,27,31,34,37,38 PM_SLP_S3#
7 TYCO-CON26-1-GP
GND
1 STBY#
1 2 6 21 3D3V_S0
7,18,20,26,31,33,34 PLT_RST1# SYSRST# THERMAL_PAD 62.10024.681
R500 33R2J-2-GP PERST# 8
CPUSB# PERST# SCD01U16V2KX-3GP SC4D7U10V5ZY-3GP
1 2 9 CPUSB# RCLKEN 18 1 2 NEWCARD_RST# 20
C561 SC22P50V2JN-4GP CPPE# 10 17 R491 DUMMY-R2
CPPE# AUXIN 3D3V_S5

1
TPAD30 TP100 1NEWCARD_OC# 19 OC# AUXOUT 15 3D3V_NEW_LAN_S5
C219
17,20,31,36,37,38 PM_SLP_S4# 20 C573 C288
SHDN#
16

2
3.3VIN
3.3VIN

1.5VIN
1.5VIN

NC#16
DY
SCD1U16V2ZY-2GP
R5538D001-TR-FGP
2
4

12
14

1 3D3V_S0 1D5V_S0 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN connector/NEW CARD/SIM


Size Document Number Rev
A3
Pamirs -3
Date: Monday, May 21, 2007 Sheet 28 of 41
A B C D E

CLOSE TO
TRANSFORMER
A B C D E

11/08 MDC1 5V_S0


1 8 U60 3D3V_LDO_S0
3D3V_LDO_S0 1 R484 2 NP1 11/08
0R0603-PAD 2 7 AMOM_DIPP 1 5
AMOM_DIPN SHDN# SET
3 6 2 GND

1
3D3V_AUD_S0 NP2 3 4
IN OUT
3D3V_S0 2 1 R472 4 5 C558

1
0R3-0-U-GP SC1U10V3ZY-6GP

2
SYN-CONN8E-GPU G913CF-GP C566
DY

SC10U10V5ZY-1GP
2
C539 C534 C533 C545 20.E0077.204
AUD_AGND

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP
2

2
4 4
AUD_AGND

01/02
U41 AMOM_DIPP
DY3D3V_AUD_S0 1 2
1 2 R248 0R0402-PAD MIC_INT_R 1 2
R468 240KR2J-1-GP 41 44 AMOM_DIBP_R EC42 SCD01U16V2KX-3GP
RC_OSC DIBP AMOM_DIBP_N AMOM_DIPN MIC_INT_L
19 HDA_SYNC_CODEC DIBN 43 1 2 1 2
R250 0R0402-PAD EC43 SCD01U16V2KX-3GP
19 HDA_BITCLK_CODEC HP_OUT_L
9 SYNC S/PDIF 48 SPDIF 17 1 2
5 11 AUD_PC_BEEP EC88 SC100P50V2JN-3GP
BIT_CLK PCBEEP

1
HDA_SDOUT_CODEC DK_SPKR_L
19 HDA_SDOUT_CODEC R227 1 2 HDA_SDATAIN0_CODEC
4
7
SDATA_OUT LINE_OUT_L 35
36
AUD_LOL 30
C256
12/4 EC86
1 2
SC100P50V2JN-3GP
19 HDA_SDIN0 SDATA_IN LINE_OUT_R AUD_LOR 30
22R2J-2-GP 10 21 MICL SC470P50V2KX-3GP HP_OUT_R 1 2

2
19 HDA_RST#_CODEC RESET# MIC_L MICR EC87 SC100P50V2JN-3GP
30,31,32 EAPD 47
MIC_R 22
17 CDAUD_L DY DK_SPKR_R 1 2
EAPD CD_L CDAUD_GND EC85 SC100P50V2JN-3GP
CD_GRD 18
1 19 CDAUD_R
RESERVED#1 CD_R SC1U10V3ZY-6GP
3D3V_S5 1 2 2 RESERVED#2
R243 HP_OUT_L
DY47KR2J-2-GP 16 RESERVED#16 PORT-A_L 38
39 HP_OUT_R C266 1 2 DK_MICR_C
AUD_AGND

3D3V_AUD_S0 PORT-A_R DK_MIC_L


20 AVDD PORT-B_L 23
31 24 DK_MIC_R 1 2 DK_MICL_C R462
AVDD PORT-B_R C267
3
SB 37 33 SC1U10V3ZY-6GP
1 2
5K1R2F-2-GP
JACK_DETECT# 17
3
AVDD_HP PORT-A_BIAS_L R461
PORT-A_BIAS_R 34 MICBIAS_L 30
3 14 MICBIAS_R 30 1 2 MIC_IN#
VDD_IO PORT-B_BIAS_L R257 20KR2F-L-GP
PORT-B_BIAS_R 15
3D3V_AUD_S0 8 MICBIAS_L 2 1 MICL_AMP R460
DVDD 3K9R2J-1-GP DK_MIC_IN#
MICBIAS_L 29 1 2
45 30 MICBIAS_R 2 1 MICR_AMP 10KR2F-2-GP 5V_AUX_S5
DVDD_M MICBIAS_R
1

R258 3K9R2J-1-GP R459 1 2


C531 42 13 AUDIO_SENSE 02/07 1 2 3D3V_AUD_S0 EC46 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP VSS_IO SENSE 5K1R2F-2-GP CIR
U67 46 1 2
2

VSS_IO AUDIO_REFA EC89 SC100P50V2JN-3GP


6 DVSS VC_REFA 28
26 AUDIO_VREF_HI
SB JACK_DETECT# 1 DY 2
DK_MIC_IN# VREF_HI AUDIO_VREF_LO
4 3 VREF_LO 27 12/18 EC22 SCD1U16V2ZY-2GP
12 3D3V_S0 1 2
AVSS

1
DK_MIC_IN 5 2 MIC_IN 25 EC45 SCD1U16V2ZY-2GP
AVSS C272 C273 C279 C270 C271 C274
32 AVSS
MIC_IN# SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
6 1 40

2
AVSS_HP

2N7002DW-1-GP CX20549-12Z-GP-U
5V_AUX_S5
AUD_AGND ACES-CON15-3-GP
AUD_AGND AUD_AGND 17
AUD_AGND 15
17 CIR CIR 14
MICBIAS_R 13

2
12
1 2 CDAUDL 1 2 C263 CDAUD_L R505 11
23 CD_AUDL R238 0R0402-PAD SC1U10V3ZY-6GP 30 MICR_AMP
10KR2J-3-GP 30 MIC_INT_R 10
2 2
30 MICL_AMP 9
1 2 CDAUDR 1 2 C265 CDAUD_R 30 MIC_INT_L 8

1
23 CD_AUDR R247 0R0402-PAD SC1U10V3ZY-6GP HP_OUT_L 7
DK_SPKR_L 6
17 DK_SPKR_L

2
1 2 CDAGND 1 2 C264 CDAUD_GND HP_OUT_R 5
23 CD_AGND R245 0R0402-PAD SC1U10V3ZY-6GP R499 DK_SPKR_R
17 DK_SPKR_R 4
1

330KR2F-L-GP JACK_DETECT# 3
R241 R249 R236 3D3V_S0 2
47KR2J-2-GP 47KR2J-2-GP 47KR2J-2-GP U63

1
3D3V_AUD_S0 1
1 5 16
2

IN+ VDD
2 VSS
MICR_C MIC_IN AUD1
3 IN- OUT 4

AUD_AGND 20.K0013.015
10/26 SCD1U16V2ZY-2GP G1214TAUF-GP-U AUD_AGND
R230
C254
1 2 AUD_BEEP 1 2 AUD_PC_BEEP AUD_AGND
20 SB_SPKR R229
7K5R2J-GP 1 2 AUD_AGND 1 2
4K7R2J-2-GP
DYEC108 SCD1U16V2ZY-2GP

02/07
SB G70
1 2 MICR_AMP RN74 CUT MOAT 1 2
C275 R501 0R0402-PAD DK_MIC_R_C 1 4 DK_MICR_C
MICR MICR_C MICR_C 30 DK_MIC_L_C 2 3 DK_MICL_C R512 GAP-CLOSE-PWR
1

10KR2J-3-GP
C276 SC1U10V3KX-4GP SRN10KJ-5-GP
1
MICL MICL_C MICL_C 30 DK_MIC_IN 1 2 DK_MIC_R_CN AUD_AGND 1
<Core Design>
1

SC1U10V3KX-4GP
1

1 2 MICL_AMP R475 R476 R514


R496 0R0402-PAD 1KR2J-1-GP 1KR2J-1-GP 47KR2J-2-GP C587
SCD1U16V2ZY-2GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

C538 Taipei Hsien 221, Taiwan, R.O.C.


2

DK_MIC_R_C1 2 DK_MIC_R_CN DK_MIC_R_CN 17


SC1U10V3ZY-6GP Title
AUD_AGND AUD_AGND
DK_MIC_L_C 1 2 DK_MIC_L_CN DK_MIC_L_CN 17
AUDIO CODEC CX20549-12Z
SC1U10V3ZY-6GP AUD_AGND Put near Codec Size Document Number Rev
C537 A3
Pamirs -3
Date: Friday, May 18, 2007 Sheet 29 of 41
A B C D E
A B C D E

5V_S0 5VA_OP_S0
R494 G37
31 EC_BEEP 2 1 C563 1 2 1 2
SC1U10V3ZY-6GP
47KR2J-2-GP 0303 GAP-CLOSE-PWR
C280
R264
4 29 AUD_LOL 1 2 L_LINE_IN_1 1 2 L_LINE_IN 4

1
1KR2J-1-GP
SCD47U16V3ZY-3GP R259
DUMMY-R2 5V_S0

1
2
R503
100KR2J-1-GP
AUD_AGND
5VA_OP_S0

2
U45

16 VDD SHUTDOWN# 19 KBC_MUTE# 31


0324 10 BYPASS 1 2
C282 BYPASS C289 SC1U10V3ZY-6GP
15 PVDD
6 9 LIN+ 1 2 D
PVDD LIN+
1

SC1U10V3ZY-6GP R502 0R0402-PAD 5 L_LINE_IN C287 SC1U10V3ZY-6GP


LIN-

3
C283 5VA_OP_S0 1 2
SC4D7U10V5ZY-3GP AUD_AGND 1 R490 2 10KR2J-3-GP 2 18 SPKR_R+
2

DY GAIN0 ROUT+ SPKR_R-


5VA_OP_S0 1 2 3 GAIN1 ROUT- 14
R498 DY 0R2J-2-GP AUD_AGND 1
1 2 SPKR_L+ 4 Q29 EAPD 29,31,32
AUD_AGND LOUT+ G
R497 0R0402-PAD SPKR_L- 8 2N7002PT-U DY

2
LOUT-
GND 1
1 2 RIN+ 7 11 S
C286 SC1U10V3ZY-6GP R_LINE_IN RIN+ GND
17 RIN- GND 13
GND 20
3 AUD_AGND 12 21 3
NC#12 GND

G1431F2U-GP AUD_AGND

R492
31 EC_BEEP 2 1 C562 1 2
SC1U10V3ZY-6GP
47KR2J-2-GP 0303
C281
R263
29 AUD_LOR 1 2 R_LINE_IN_1 1 2 R_LINE_IN

1
1KR2J-1-GP
SCD47U16V3ZY-3GP R261
DUMMY-R2

AUD_AGND

EC73
MIC_INT_R 1 2
3D3V_AUD_S0 MIC_INT_L DY
1 SC100P50V2JN-3GP
2
2 EC72 2
29 MICBIAS_R SC100P50V2JN-3GP
DY
2

C578
SC100P50V2JN-3GP C583 AUD_AGND
1

U65 DY SCD1U16V2ZY-2GP
DY RC1
2

DY
1 5 SPKR_R+ 1 8
R510 IN+ VDD
C564 DY AUD_AGND 2 AUD_AGND SPKR_R- 2 7
VSS SPKR_L+
29 MICR_AMP 1 2 1 DY 2 3 IN- OUT 4 MICR_C 29 3 6
SPKR_L- 4 5
1

5
SCD22U16V3ZY-GP 10KR2J-3-GP
1

EC150 G1214TAUF-GP-U MIC1


C569 SRC100P50V-2-GP ACES-CON4-1-GP
SB DY
SB 1
SC100P50V2JN-3GP

1 2
2

DUMMY-C2 C571 SC680P-GP 29 MIC_INT_R MIC_INT_R 2


DY 29 MIC_INT_L MIC_INT_L 3 20.D0197.104
2

12/14 1 2 4
R511 100KR2J-1-GP
AUD_AGND DY
AUD_AGND

6
3D3V_AUD_S0

Speaker

6
29 MICBIAS_L 1 2
R372 0R0402-PAD
2

SPKR_L- 4
1

C575 SPKR_L+ 3
SC100P50V2JN-3GP C580 SPKR_R- 2
1

U64 DY SCD1U16V2ZY-2GP AUD_AGND


DY
2

1 12/18 DY SPKR_R+ 1 1
ACES-CON4-1-GP <Core Design>
R507 1 IN+ VDD 5
C560 2 AUD_AGND SPKR1
AUD_AGND VSS
1 2 1 2 3 4 MICL_C 29
Wistron Corporation

5
29 MICL_AMP IN- OUT 20.D0197.104
1

SCD22U16V3ZY-GP 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DY G1214TAUF-GP-U Taipei Hsien 221, Taiwan, R.O.C.
C567
DY SB Title
SB DUMMY-C2
1
C568
2
SC680P-GP
DY
AUDIO AMP/SPEAKER
2

1 2 Size Document Number Rev


R506 100KR2J-1-GP A3
AUD_AGND DY Pamirs -3
Date: Friday, May 18, 2007 Sheet 30 of 41
A B C D E
KBC_3D3V_AUX
5 4 KCOL[1..16] 32
3 11/08 C259 2
SC15P50V2JN-2-GP KBC_3D3V_AUX 1
KROW[1..8] 32 22,32 KBC_SDA1 1 2
22,32 KBC_SCL1 KBC_XO X4
KBC_3D3V_AUX
40 KBC_SDA0

1
RESO-32D768KHZ-GP
40 KBC_SCL0 Planar
1

1
C261 L19 4 3 R421 R423 R422
10KR2J-3-GP DUMMY-R2 10KR2J-3-GP
2
C518 C245 C249 DY
SCD01U16V2KX-3GP
1
BLM11P600S
23D3V_KBC_AUX_S5 ID(2,1,0)

2
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
SA: 0,0,0

KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

2
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

2
SCD1U16V2ZY-2GP PCB_VER0
SB: 0,0,1

1
1 2 PCB_VER1
C225 C226 KBC_XI PCB_VER2
KBC_3D3V_AUX 3D3V_AUX_S5 SCD1U16V2ZY-2GP C258 SC15P50V2JN-2-GP
SC: 0,1,0
L42

123
136
157
166

161

153
154

163
164
169
170

160
158

1
D SCD1U16V2ZY-2GP
D

16
34
45

95

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

71
72
73
74
77
78
79
80
1 2 U35 R420 R424 R419
-1: 0,1,1
DUMMY-R2 10KR2J-3-GP DUMMY-R2
-2: 1,0,0

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA

VCCBAT

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

SCL1
SDA1
SCL2
SDA2

XCLKO
XCLKI
BLM18RK102SN-GP
-3: 1,0,1

2
05/21

2
19,33,34 LPC_LAD[0..3] KBC_3D3V_AUX
LPC_LAD015 155 KBC_MATRIX1
LPC_LAD114 LAD0 GPIO29 KBC_MATRIX0 TP97
149
LPC_LAD213 LAD1
LAD2
KB Matrix GPIO28
GPIO27 148 TP99 GPIO13 1 R425
2
10KR2J-3-GP
LPC_LAD310 119
LAD3 LPC GPIO26
GPIO25 118
TP_BTN# 32
CHG_ON# 39
19,33,34 LPC_LFRAME# 9 109 E51CS# 1 R437
2
LFRAME# GPIO24 AD_OFF 40 10KR2J-3-GP
3 PCLK_KBC 18 LCLK GPIO23 108 EAPD 29,30,32
20,24,34 INT_SERIRQ 7 107 E51_TXD E51_TXD 26
SERIRQ GPIO22 E51_RXD BT_TH
GPIO21 106 E51_RXD 26 2 1
105 E51CS# R453
DUMMY-R2
5V_AUX_S5 KBCBIOS_RD# 150 GPIO20 TP96 TP_LED 16
33 KBCBIOS_RD# RD# GPIO19 86 Pull-up by devided-resistor to MAX8725_LDO
KBCBIOS_WE# 151 85 PWR_LED 16
33 KBCBIOS_WE# KBCBIOS_CS# 173 WR# GPIO18 3D3V_S5
33 KBCBIOS_CS# MEMCS# GPIO17 75 VOL_DWN_DK# 17
G68 TP98 152 70 VOL_UP_DK# 17
IOCS# GPIO16 SB_PWR_BTN# 2
1 2 33 KBC_D[0..7] GPIO15 69 PM_SLP_S4# 17,20,28,36,37,38 1
GAP-CLOSE-PWR KBC_D0 138 63 R198 DY 10KR2J-3-GP
KBC_D1 139 D0 GPIO14 GPIO13
Add Label "VCC" D1 GPIO13 62
KBC_D2 140 55 ICH7 integrated pull-up
KBC_D3 141 D2 GPIO12
D3 GPIO11 54 CAPS_LED 16
G65 KBC_D4 144 48
D4 GPIO10 CAP_ACK 32
1 2 E51_TXD KBC_D5 145 22 CAP_XPRES 32 S5_ENABLE 1 R199
2
GAP-CLOSE-PWR KBC_D6 146 D5 GPIO09 10KR2J-3-GP
D6 GPIO08 21 CAP_DAT 32
C Add Label "TXD" KBC_D7 147
D7 GPIO07
GPIO06
20
12 FAN3FB C
124 11 FAN3PWM KBC_3D3V_AUX
33 A0 A0 X-bus GPIO05
1
G64

Add Label "RXD"


2 E51_RXD
GAP-CLOSE-PWR
33
33
33
33
A1
A2
A3
A4
125
126
127
128
131
A1
A2
A3
A4
ROM KB3910 GPIO04
GPIO03
GPIO02
GPIO01
8
6
5
4
3
WIRELESS_BTN# 33
KBRST# 19
KBGA20 19
BT_DET# 32
BT_TH 39,40
1
2
RN72
4 KBC_SCL0
3 KBC_SDA0
5V_S0 33 A5 A5 GPIO00 KBC_3D3V_AUX
SRN4K7J-8-GP
33 A6 132 A6
133 41 DOCK_IN# 17 RN71
33 A7 A7 GPIO0F
0126 33 A8 143 A8 GPIO0E 28 ECSMI# 20 1 4 KBC_SCL1
G67
33 A9 142 A9 GPIO0D 27 WIFI_RF_EN 26 2 3 KBC_SDA1
1 2 33 A10 135 A10 GPIO0C 25 PM_CLKRUN# 20,24,34
GAP-CLOSE-PWR 134 24 BLON_OUT 16 SRN10KJ-5-GP
33 A11 A11 GPIO0B
33 A12 130 A12 GPIO0A 23 NUMLK_LED 23
129 3D3V_S5
33 A13 A13
33 A14 121 A14 GPIO1F 98 BLUETOOTH_EN 32
33 A15 120 A15 GPIO1E 97

1
33 A16 113 A16 GPIO1D 94
112 93 MUTE_LED# 17,32 R253
33 A17 A17 GPIO1C WLANONLED_KBC 100KR2J-1-GP.Normal
33 A18 104 A18 GPIO1B 92
103 91 CHG_LED 16 TP23
33 A19 A19 GPIO1A

2
168 SB_RSMPWR
5V_S0 32 TDATA_5 GPIOI2D
117 175 1 2 PCI_SERR# 18,24
RN49 32 TCLK_5 PSDAT3 GPIO2F

1
116 171 R234 0R0402-PAD KBC_MUTE# 30
PSCLK3 GPIO2E C268
4 5 115 165
3 6 114
PSDAT2 PS/2 GPIO2C
162
PLT_RST1# 7,18,20,26,28,33,34
BLON_IN 9
SC1U10V3ZY-6GP

2
PSCLK2 GPIO2B

1
2 7 111 PSDAT1 GPIO2A 156
1 8 110 THRM#_R 1 R464 2 R254
B SRN10KJ-6-GP PSCLK1 0R2J-2-GP
THRM# 22
100KR2F-L1-GP B
DY

2
BATGND
ECRST#
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7

ECSCI#

ECSCI#
3D3V_S0 1 2
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0

AGND
3D3V_AUX_S5 R196 100KR2J-1-GP

GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
3D3V_S0 KBGA20
R456
DY R455 1 DY R447
2
10KR2J-3-GP
1 2 A5 1 2 EXT_FWH# 33 KB3910SF-2-GP RN69
43
40
39
38
37
36
33
32

2
26
29
30
44
76
172
176

99
100
101
102
1
42
47
174

81
82
83
84
87
88
89
90

19
31

96
159

17
35
46
122
137
167
1 4 VOL_UP_DK#
100KR2J-1-GP 1KR2J-1-GP 2 3 VOL_DWN_DK# 1 DY R222
2 KBRST#
10KR2J-3-GP
3D3V_AUX_S5 2 PM_CLKRUN#
DY R208
PM_LAN_ENABLE1

SRN10KJ-5-GP 1
BRIGHTNESS_PWM

2 1 D18 10KR2J-3-GP
KBC_3D3V_AUX R648
1N4148W-7-F-GP ECSCI# 20 12/18
30 EC_BEEP TP95
1

EC_RST# EC_RST# 22 3D3V_S5 1 2 SB_RSMRST#


1

R446 AD_IA AD_IA 39 1 R205


2 PWR_BTN#
10KR2J-3-GP R441 R215 20 EC_SWI# 10KR2J-3-GP
10KR2J-3-GP R213 R210 CHG_ON# DUMMY-R2
20 SB_PWR_BTN# 1 2 Intel checklist suggest no
PCB_VER2 10KR2J-3-GP
DUMMY-R2

DUMMY-R2

20 SB_RSMRST# external resistor needed


2

PCB_VER1 3D3V_S5
2

A5 22 S5_ENABLE PCB_VER0 5V_AUX_S5


1 2
2

A4 16 BRIGHTNESS R197 0R0402-PAD BT_SENSE


AIRLINE_VOLT AIRLINE_VOLT 39 1 R195
2 CIR_SENSE
FAN3PWM 10KR2J-3-GP
FAN3FB 20,22,27,28,34,37,38 PM_SLP_S3# BT+ 3D3V_S5 ECSMI#
17 PWR_BTN# CHG_I_PRE_SEL 39 1 2
33 KBC_PWR_BTN# CHG_I_SEL CHG_I_SEL 39 R203 100KR2J-1-GP
1

CHG_4CELL 39 1 R232
2 BT_DET#
27,39 AC_IN#
1

1
R450 R444 R218 10KR2J-3-GP 1 2 EC_SWI#
33 LID_CLOSE# 4CELL# 39
10KR2J-3-GP R211
DUMMY-R2

17 CIR_SENSE 1 2 PM_LAN_ENABLE 12/4 R426 R430 100KR2J-1-GP


A 10KR2J-3-GP R646 0R0402-PAD 560KR2F-GP <Core Design>
A
DUMMY-R2

32 INSTANT_ON_BTN#
20,26,27,28 PCIE_WAKE# M_WXMIT_OFF# M_WXMIT_OFF# 26
2

Wistron Corporation
2

2
0823 SB add to WWAN 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BT_SENSE 1 2 Taipei Hsien 221, Taiwan, R.O.C.
R427 100KR2F-L1-GP
A4 for DMRP==>High=Disable,Low=Enable Title
A5 for EMWB==>High=Enable,Low=Disable
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) AD_IA 1 2 KBC_ENE K3910SF
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended) C223 SCD1U16V2ZY-2GP Size Document Number Rev
A3
Pamirs -3
Date: Monday, May 21, 2007 Sheet 31 of 41
5 4 3 2 1
CAMERA 3D3V_CAM_S0

KB1
3D3V_S0 3D3V_CAM_S0 11/09 (3.93V) Blue thumb

1
12/4

2
25 R11 R641 BT1
1 KROW2 68KR2F-GP 9
Internal KeyBoard Connector 0R5J-6-GP 5V_S0
2 KROW8 ACES-CON5-1GP DY U71 1
3D3V_BT_S0

2
3 KROW7

1
31 KROW[1..8] 4 KCOL10 7 1 5 2
KROW5 SHDN# SET USB_5+
5 5 2 GND 3

1
31 KCOL[1..16] 6 KROW6 4 C809 3 4 USB_5- 4
IN OUT

1
7 KCOL1 3 33 BT_LED 5

1
8 KROW3 2 USB_4- C335 6

SC1U10V3ZY-6GP
26 WL_PRIORITY

2
1

1
9 KROW4 SCD1U16V2ZY-2GP G913CF-GP C808 26 BT_PRIORITY 7

2
10 KCOL6 1 USB_4+ C337 R642 31 BT_DET# 8

2
11 KCOL2 6 SC4D7U10V5ZY-3GP 31K6R2F-GP

2
12 KROW1 SC10U10V5ZY-1GP 10
13 KCOL3 20.F0772.008

2
14 KCOL5 CAM1
Keyboard matrix ( from vendor ) 15 KCOL8 ACES-CON8-4-GP
16 KCOL9 20.D0197.105
17 KCOL7
US Eur Jap 18 KCOL4 BT_PRIORITY
19 KCOL13 1 2 WL_PRIORITY 3D3V_BT_S0
20 KCOL14 R89 0R0402-PAD BT_LED
21 KCOL15 20 USB_PN4 USB_4-

1
MATRIXID1# 0 1 0 22 KCOL12 EC93 EC94 EC96
23 KCOL11 EC95 DY DY DY

3
24 KCOL16 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
MATRIXID2# 0 0 1 26 DY SCD1U16V2ZY-2GP
TR2
SCD1U16V2ZY-2GP
3D3V_AUX_S5 ACES-CON24-2-GP L-63UH-GP
D31 DY 5V_S3 Close to CN8

2
20.K0220.024 0717Change from S5
2 20 USB_PP4 USB_4+

TDATA_5 3 DY 1 2

1
R90 0R0402-PAD
1 C582
SC1U10V3ZY-6GP MAX 150mA

2
U66
BAV99W-1-GP TouchPad Connector 1
R268
2
0R0402-PAD 31 BLUETOOTH_EN 1 SHDN# SET 5
5V_S3 USB_5- 2
20 USB_PN5 GND
D32 3 4
3D3V_AUX_S5 IN OUT 3D3V_BT_S0
1

3
3D3V_AUX_S5

1
2 C430 C433 D8 G913CF-GP
5V_S3 SCD1U16V2ZY-2GP SC1U10V3ZY-6GP TR4 C581 C577
2

TCLK_5 SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP


3 DY

2
L-63UH-GP
2
1 DY
1

CAP_ACK 3

2
R354 R355 TPAD1
BAV99W-1-GP 10KR2J-3-GP
10KR2J-3-GP USB_5+ 1
20 USB_PP5
5
1 1 2
CAPACITY BUTTON
2

R267 0R0402-PAD BAV99W-1-GP


2 3D3V_AUX_S5 3D3V_AUX_S5
31 TDATA_5
31 TCLK_5 3
4 D17 D6

1
6 3D3V_S0 3D3V_AUX_S5
1

C432 2 EC7
C431 SC33P50V2JN-3GP 2 SCD1U16V2ZY-2GP CAP1
FOX-CON4-12-GP

2
1
SC33P50V2JN-3GP TP_BTN_1# 3 DY 13
2

R14 CAP_DAT 3 1
1 10KR2J-3-GP
1 31 CAP_XPRES
R276
2 DY 1 2
22,31 KBC_SCL1 2 DY 1 0R2J-2-GP
3

2
BAV99W-1-GP EAPD# EAPD# 17 R275 2 DY 1 0R2J-2-GP
4
22,31 KBC_SDA1
BAV99W-1-GP R274 0R2J-2-GP
5
31 CAP_ACK
KROW5 KROW4 KCOL3 KROW2 6
31 CAP_DAT
KROW6 KCOL6 KCOL5 KROW8 31 INSTANT_ON_BTN# 7
KCOL1 KCOL2 KCOL8 KROW7 8

D
KROW3 KROW1 KCOL9 KCOL10 3D3V_S0 1 2 MUTE_LED_1# 9
Q2 R278 0R0402-PAD 10

1
2N7002-11-GP EAPD# 1 R49 2 EC149 11
29,30,31 EAPD G 17,31 MUTE_LED# 10R0402-PAD
2 DY 12
8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

R48 DY 0R2J-2-GP 14

2
RC6 RC2 RC5 RC7 SCD1U16V2ZY-2GP
S

3D3V_S0 12/14
SRC100P50V-2-GP SRC100P50V-2-GP SRC100P50V-2-GP SRC100P50V-2-GP
D7 3/20 ACES-CON12-4-GP
3D3V_AUX_S5 1 2
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

EC49 SCD1U16V2ZY-2GP 20.K0228.012


3D3V_S0 2 CAP_ACK 1 2
CAP_DAT EC10
1 SC100P50V2JN-3GP
2
INSTANT_ON_BTN# 3 INSTANT_ON_BTN# EC13
1 SC100P50V2JN-3GP
2
1 EAPD# EC11
1 SC100P50V2JN-3GP
2
for EMI for EMI R416 1 EC6 SCD1U16V2ZY-2GP
KCOL15 KCOL7 TOUCH-PAD SWITCH 10KR2J-3-GP
2/12
KCOL12 KCOL4 TP_BTN_1#
KCOL11 KCOL13 BAV99W-1-GP
2

KCOL16 KCOL14
SW1
<Core Design>
5

SW-TACT-68-GP-U D5
2 1 1 2 3D3V_AUX_S5
TP_BTN# 31
8
7
6
5

8
7
6
5

Wistron Corporation
1

RC3 RC4 62.40009.451 100R2J-2-GP 2


SRC100P50V-2-GP SRC100P50V-2-GP R413 C515 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4 3 SC1000P50V3JN-GP EAPD# 3 Taipei Hsien 221, Taiwan, R.O.C.
2

DY
1
2
3
4

1
2
3
4

1 Title
6

KeyBoard-CONN
BAV99W-1-GP Size Document Number Rev
A3
for EMI Pamirs -3
Date: Monday, May 21, 2007 Sheet 32 of 41
A B C D E

TOP VIEW

3D3V_AUX_S5 A15 (B1)


U55
A14 (B2)
4 37 VCC Q15/A-1 45 A0 31 4
Q14 43

....
31 A19 16 41

....
A18 Q13
31 A18 17 A17 Q12 39
31 A17 48 A16 Q11 36
31 A16 1 A15 Q10 34 A2 (B14)
31 A15 2 A14 Q9 32
31 A14 3 A13 Q8 30
KBC_D7
KBC_D[0..7] 31 A1 (B15)
31 A13 4 A12 Q7 44
31 A12 5 42 KBC_D6
A11 Q6 KBC_D5
31 A11 6 A10 Q5 40
31 A10 7 38 KBC_D4
A9 Q4 KBC_D3
31 A9 8 A8 Q3 35
KBC_D2
31
31
A8
A7
18
19
A7 Q2 33
31 KBC_D1 (BOTTOM VIEW)
A6 Q1 KBC_D0
31 A6 20 A5 Q0 29
31 A5 21 A4
31 A4 22 A3
31 A3 23 A2 RY/BY# 15 Boot Device must have ID[3:0] = 0000
31 A2 24 A1 Has internal pull-down resistors
31 A1 25 A0 NC#14 14 All may be left floated
NC#13 13
10 FPET7 Elec. P3-46
NC#10 5V_S0
26 9 G75
31 KBCBIOS_CS# CE# NC#9
31 KBCBIOS_RD# 28 OE# 1 2
31 KBCBIOS_WE# 11 WE#
47 46 GAP-CLOSE-PWR
BYTE# GND 5V_S3
12 RESET# GND 27
1 R458
2 LPC_LAD[0..3] 19,31,34 G71
3 3D3V_AUX_S5 10KR2J-3-GP PLT_RST1# 1 2 3
7,18,20,26,28,31,34 PLT_RST1#
1 R440
2 MX29LV800CBTC-GP
10KR2J-3-GP GAP-CLOSE-PWR

G72
19,31,34 LPC_LFRAME# LPC_LFRAME# 1 2
Q1
R2 GAP-CLOSE-PWR
E
KBC_3D3V_AUX B KBC_3D3V_AUX G73
16 PWR_LED#

1
R1
C 1 R8 2 PCLK_FWH 1 2
EC5 3 PCLK_FWH
1

1
COVER SWITCH 02/06 560R2J-3-GP GAP-CLOSE-PWR

2
R272 PDTA124EU-1-GP SCD1U16V2ZY-2GP R3
POWER SWITCH

1
10KR2J-3-GP 10KR2J-3-GP
PWR1 EC3
LID1 5
2

2
3 SCD1U16V2ZY-2GP
1 COVER_SW 1 R273
2 LID_CLOSE# 31 0126
100R2J-2-GP 3 G31
1

2 2 1 R42 KBC_PWR_BTN# 31 LPC_LAD3 1 2


4 C301 1 100R2J-2-GP
1

1
SC1000P50V3JN-GP GAP-CLOSE-PWR
2

1
ACES-CON2-1-GP-U DY C298 C4
SCD22U16V3ZY-GP 4 EC1 SC1000P50V3JN-GP G32
2

2
20.D0197.102 DY LPC_LAD2 1 2

2
SCD1U16V2ZY-2GP
ACES-CON3-1-GP GAP-CLOSE-PWR
20.F0735.003
2 2
G33
3D3V_S0 3D3V_S0 LPC_LAD1 1 2

0119 GAP-CLOSE-PWR
1

R356 G34
100KR2J-1-GP LPC_LAD0 1 2

GAP-CLOSE-PWR
2

R359 G35
WIRELESS SWITCH 100KR2J-1-GP 31 EXT_FWH# EXT_FWH# 1 2
D

Q28 GAP-CLOSE-PWR
2

5V_S0 2N7002-11-GP
G WLANONLED 26 3D3V_S0 G36
1 2
S
1

GAP-CLOSE-PWR
EC34 BT_LED 32
G74
2
5

SCD1U16V2ZY-2GP 1 2
WLAN1 3D3V_S0
ACES-CON4-1-GP 1 R370 GAP-CLOSE-PWR
1KR2J-1-GP Put near board edge
1

2 WLAN2
2

3 WLAN3 R374
4 10KR2J-3-GP
1 <Core Design> 1
2
6

1 2
R375 100R2J-2-GP
WIRELESS_BTN# 31
Wistron Corporation
1

20.D0197.104 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


C437 Taipei Hsien 221, Taiwan, R.O.C.
SC1000P50V3JN-GP
2

DY Title

FWH and Debug


Size Document Number Rev
A3
Pamirs -3
Date: Wednesday, May 23, 2007 Sheet 33 of 41
A B C D E
3D3V_S0
R256
PP 1 DY 2

5V_AUX_S5 TO 5V_S5 TPM 1.2


4K7R2J-2-GP

2
3D3V_S0 3D3V_S5 R255
DY 0R2J-2-GP

1
1

1
C278 C284 C285 DY
DY DY DY C277
SC10P50V2JN-4GP SCD1U16V2KX-3GP 3D3V_S0

2
DY C290 U44
5V_AUX_S5 SI2301BDS-T1-GP 5V_S5

1
TPM_XTALI

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
Q12 2 1
5 6 9636GPIO DY R265
VSB GPIO 9636GPIO21 TP28 4K7R2J-2-GP
10 VDD GPIO2 2

1
S D 19 1 TP27
VDD

1
DY X5 R270 24 9 TESTB1

2
10MR2J-L-GP VDD TESTBI/BADD TEST1_1
4 3 TESTI 8 DY
DY 1 2

G
1

1
C239 TPM_XTALI 13 7 R260 PP 0R2J-2-GP

2
TPM_XTALO XTALI/32K_IN PP R262
14 XTALO CLKRUN# 15
2
SC1U10V3KX-3GP

C237 C234 RESO-32D768KHZ-GP 4K7R2J-2-GP


27 DY
2

SERIRQ PM_CLKRUN# 20,24,31

1
R206 C240
INT_SERIRQ 20,24,31

1
TPM_XTALO

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC4D7U10V5KX-1GP
100KR2J-1-GP 2 1 21 1

2
3 CLK_PCI_TCG LCLK NC#1
DY 28 3

2
20 LPC_PD# LPCPD# NC#3
22 12
1

2
SC10P50V2JN-4GP LFRAME# NC#12
19,31,33 LPC_LFRAME# 16 LRESET#
C291
7,18,20,26,28,31,33 PLT_RST1#
26 LAD0 GND 4
47KR2J-2-GP 23 11
19,31,33 LPC_LAD0 LAD1 GND
R209 19,31,33 LPC_LAD1 20 LAD2 GND 18
19,31,33 LPC_LAD2 17 LAD3 GND 25
1 2 PWR_S5_EN_2 2 1 C246
22,36 PWR_S5_EN# SCD1U16V2KX-3GP 19,31,33 LPC_LAD3

D20
SLB9635TT1D1-GP
DY
2 1 1 DY 2 TPM_XTALI
20 TPM_32K_CLK R269 0R2J-2-GP
1N4148W-7-F-GP
12/18

3D3V_S0 3D3V_S5
Finger Printer
Run Power 5V_S0 5V_S3
12/18

1
U40 R649
DCBATOUT Q14 S D
1 8 FOX-CON4-12-GP DUMMY-R2
TP0610K-T1-GP S D
SB 2
3 S D
7
6 6
Z_12V RUN_PWR_CTLR G D
S

1 2 2 3 4 5 4

2
D

R246 3 USB_8-
1

2
1 C269 AO4422-1-GP 2 USB_8+
SCD22U25V3KX-GP

20KR2J-L2-GP R537
537 DY D21
1

2R

SB 2 R252 RLZ12B-1-GP 3D3V_S0 3D3V_S5 1


330KR2J-L1-GP DY
0R2J-2-GP
G

U39 5
1 2 1 S D 8
2

R244 330KR2J-L1-GP 2 S D 7 CN2


3 S D 6
1
1

4 G D 5 11/2
R251
1KR2J-1-GP AO4422-1-GP

Q15 PM_SLP_S3#_Z12V 1 2
2

C PM_SLP_S3#_Z12V R13 0R0402-PAD


B R1 USB_8-
20,22,27,28,31,37,38 PM_SLP_S3# 20 USB20_N8
E
R2 3D3V_S0
PDTC124EU-1-GP
3

U42
1

2N7002DW-7F-GP
R242
100R5J-3-GP USB_8+
20 USB20_P8
1 2
4

R15 0R0402-PAD

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PWRPLANE&RESETLOGIC
Size Document Number Rev
A3
Pamirs -3
Date: Monday, May 21, 2007 Sheet 34 of 41
5 4 3 2 1

5V_S0 2/14 5V_8736_S0 5V_S0


L40
DCBATOUT
1 2
3/15

1
R82 R79 R77 R66 R61 R59 R57
MLB1608080220P-GP

1
C72

C73

C74

C339

C344

C812
100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
2

2
1
D28
2

2
R40 SSM5818SLPT-GP

10R3J-3-GP

1
CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

CPU_VID6

2
D EC52 D

5
6
7
8

5
6
7
8

1
SCD1U50V3KX-GP

2
1

D
D
D
D

D
D
D
D
C37 C83
C52 C50 SCD1U50V3KX-GP

2
SC1U10V3ZY-6GP SC2D2U10V3ZY-1GP Q5 Q22 36A/44A

2
1

SCD22U16V3KX-2-GP
U13 R56 VCC_CORE_S0

21

30
0R3-0-U-GP

G
S
S
S

G
S
S
S
FDS8880-NL-GP FDS8880-NL-GP

VCC

VDD

4
3
2
1

4
3
2
1
2
L31 3/5
1 2 MAX8736_OSC 14 25 MAX8736_BST1
R19 140KR3F-GP OSC BST1
1 2
1 2 MAX8736_TIME 15
R37 100KR2F-L1-GP TIME MAX8736_DH1 L-D36UH-1-GP
DH1 27
1 2 MAX8736_CCV 17 CCV

5
6
7
8

5
6
7
8

1
C38 SC680P50V2KX-2GP 26 MAX8736_LX1
LX1

2
D
D
D
D

D
D
D
D
1 2 MAX8736_ILIMPK 16 R93 C116 C129 C137 C147 TC4 TC17
R36 360KR3F-GP ILIMPK 2KR3F-L-GP G11
10/24

2
SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
1 2 MAX8736_REF 19 32 MAX8736_DL1 Q6 Q23 GAP-CLOSE-PWR
C36 SCD22U10V2KX-1GP REF DL1

1
1
1 2MAX8736_TRC 18 TRC
DY
R88 R94

G
S
S
S

G
S
S
S
R45 1K47R2F-GP C64
31 SC1000P50V2JN-GP FDS6676AS-GP FDS6676AS-GP 1 2 1 2

4
3
2
1

4
3
2
1
PGND
CPU_VID0 34 33 DRSKP# NTC-10K-9-GP
CPU_VID1 D0 DRSKP# MAX8736_CSP1 3K3R3F-GP
35 D1 CSP1 6
5 CPU_VID[0..6] CPU_VID2 36
CPU_VID3 D2 C47
37 D3 CSN1 5
C CPU_VID4 38 1 2 C
CPU_VID5 D4
39 D5 1 2 C43 Panasonic , 330uF/2V
CPU_VID6 40 SC1000P50V2JN-GP SCD22U10V3KX-2GP
G4 D6 PWM2
1 2 4
PWM2 28 ESR = 9m ohm
36,37,38 CPUCORE_ON SHDN#
GAP-CLOSE-PWR
CSN2 7 MAX8736_CSN2 7.3*4.3*1.9
8 MAX8736_CSP2
R527 CSP2

2
7,20 DPRSLPVR 1 2 3 5V_S0 C42
DPRSLPVR SC1000P50V2JN-GP
29

1
G7 PWM3
470R2J-2-GP DY
5 PSI# 1 2 2 PSI# CSP3 10

GAP-CLOSE-PWR 9
3D3V_S0 R53 1KR2J-1-GP CSN3
SB
1 2MAX8736_IMVPOK
24 IMVPOK R41
R533 1 2 C593 1 2 11 MAX8736_GNDS 1 2
7,20 VGATE_PWRGD GNDS VSS_SENSE 5
33R2J-2-GP SCD47U10V3KX-3GP 1 10R2J-2-GP
3D3V_S0 R309
1 2 MAX8736_CLKEN# 1 CLKEN# C39
10KR2J-3-GP 20 SC1000P50V3JN-GP DCBATOUT
2

GND R39
20 CLK_EN# G52
1 2
GAP-CLOSE-PWR
22 VRHOT#
MAX8736_VPS
3/15
VPS 13 1 2 1 2 VCC_SENSE 5
23 THRM R38 9K53R3F-2-GP

SE100U25VM-7GPUTC20
SE100U25VM-7GPUTC20
C162

C163

C164

C427

C811
4 CPU_PROCHOT# 1 2 MAX8736_PWR 10R2J-2-GP
R50 10R2J-2-GP 12 MAX8736_FBS
FBS

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
C41
DY
GND

2
1

1
DY C29

1
SC1000P50V3JN-GP
SCD1U10V2MX-3GP

R47 C426

2
B 10KR2J-3-GP MAX8736AGTL-GP-U SCD1U50V3KX-GP EC56 B
2

41

5
6
7
8

5
6
7
8
DY

2
D
D
D
D

D
D
D
D
5V_S0 5V_8552_S0 SCD1U50V3KX-GP
L41
2

G51 D14
1 2 2/14 1 2 Q9 Q26
MLB1608080220P-GP A K
GAP-CLOSE-PWR
1

G
S
S
S

G
S
S
S
SS0530-GP FDS8880-NL-GP
C178 R145 C193 FDS8880-NL-GP
0R3-0-U-GP

4
3
2
1

4
3
2
1
SC2D2U10V3ZY-1GP SCD22U16V3KX-2-GP
2

2
R_OSC=143K ohm , Fsw=300K Hz L32
U20
2
1

1 2 DY
R_ILIMPK=402K ohm , Iocp=28/phase C152
VCC

1
4 10 MAX8552_BST L-D36UH-1-GP
GND BST

2
R164 R117

SCD01U16V2KX-3GP
5
6
7
8

5
6
7
8

1
2 1 5 9 MAX8552_DH 2KR3F-L-GP G15
DLY DH

D
D
D
D

D
D
D
D
1KR2F-3-GP
8 MAX8552_LX GAP-CLOSE-PWR

2
LX Q7 Q25
R119 R118
2 MAX8552_DL
MAX8552_AGND DL
1 2 1 2

G
S
S
S

G
S
S
S
PGND 3
1

DRSKP# 7 FDS6676AS-GP FDS6676AS-GP NTC-10K-9-GP

4
3
2
1

4
3
2
1
EN C189 3K3R3F-GP
PWM2 6 SC1000P50V2JN-GP 1 2 MAX8736_CSN2
2

PWM C44 SCD22U10V3KX-2GP


DY MAX8736_CSP2
A MAX8552ETB-1-GP <Core Design> A

G16
1 2
Wistron Corporation
GAP-CLOSE-PWR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

MAX8552_AGND Title

DC-DC VCCCPUCORE
Size Document Number Rev
A3 -3
Pamirs
Date: Friday, May 18, 2007 Sheet 35 of 41
5 4 3 2 1
A
51120_V5FILT
DCBATOUT
PWR_S5_EN_1

1
R207
C251

1
5V_AUX_S5 1 2 SC3900P50V3KX-GP

1
5D1R3F-GP C238 Q13 C220

5
6
7
8
2N7002-11-GP SC10U25V6KX-1GP C222

2
D
D
D
D
SC1U10V3ZY-6GP G U32 SCD1U25V3ZY-1GP
22,34 PWR_S5_EN#

2
AO4468-GP

2
8/10 Iomax=11A

S
R220 DCBATOUT Qg=9.8nC, 10/24
C247 51120_AGND 0707

G
S
S
S
51120_LL2 1 2 51120_VBST2_11 2 51120_VBST2 Rdson=20~25mohm
GS 10*10*4 4D7uH

4
3
2
1
SCD1U25V3ZY-1GP 0R0603-PAD 5V_S3 5V Iomax=5A
DCR=25mohm, Isat=6A

1
51120_DRVH1 L21
R216 OCP>10A
C248 C242 51120_LL1 1 2
51120_LL1 1 2 51120_VBST1_11 2 51120_VBST1 SCD1U25V3ZY-1GP IND-3D3UH-42-GP-U1

2
0R0603-PAD

5
6
7
8
SCD1U25V3ZY-1GP 5V_AUX_S5 51120_V5FILT

D
D
D
D
U31

1
C241 C244 3D3V_AUX_S5 R233 0R0603-PAD AO4422-1-GP

1
SC10U10V5ZY-1GP
51120_COMP2 1 2 C532 R463

1
Iomax=11A SC33P50V2JN-3GP 30KR2F-GP TC10

2 2
SC10U10V5ZY-1GP
DY 51120_COMP1 1 R225 ST220U6D3VDM-15GP
2 DY DY

2
Qg=9.8nC,

G
S
S
S
NEC 220uF ,V size

2
0R0603-PAD Rdson=19.6~24mohm R465

4
3
2
1
3D3V_S0 ESR=25mohm

19
21

28
13

20
22
0R2J-2-GP

7
2
U37 Iripple=2.2A
0707 Change 5V_S5 to 5V_S3 DY

VREG3
VREG5

VBST1
VBST2

V5FILT
VIN

COMP2
COMP1

1
1
0718 Change 3D3V_AUX_S5 to 3D3V_S5 51120_DRVL1 51120_VFB1
R445

1
100KR2J-1-GP
PM_SLP_S4_1# 1 R449 2 0R0402-PAD 51120_EN1 29 15 51120_LL2 R466
EN1 LL2 7K5R3F-GP
1 R452 2 0R0402-PAD 51120_EN2 12 26 51120_LL1

2
PWR_S5_EN_1 TP25 EN2 LL1
1TPAD28 10 EN3 DY
TP26 1TPAD28 9

2
EN5 51120_PGOOD1 1 R442
PGOOD1 30 2 0R0402-PAD CPUCORE_ON 35,37,38
1 R240 2 51120_VFB2 6 11 51120_PGOOD2 1 R457 2 0R0402-PAD
0R0603-PAD 51120_VFB1 VFB2 PGOOD2 51120_AGND
51120_V5FILT 1 2 3 VFB1
R467 0R0603-PAD 25 51120_DRVL1
5V_S3 DRVL1 51120_DRVL2
1 16 G27
3D3V_PWR VO1 DRVL2
8 VO2 1 2
27 51120_DRVH1
51120_VREF2 DRVH1 51120_DRVH2 GAP-CLOSE-PWR
4 VREF2 DRVH2 14
G24

SKIPSEL
TONSEL
1 2
PGND1
PGND2
1

GND
GND

CS1
CS2
C260 DCBATOUT GAP-CLOSE-PWR
SC1000P50V3JN-GP G26
2

TPS51120RHBR-GPU1 74.51120.073 3D3V Iomax=4A 1 2


3D3V_PWR 3D3V_S5
24
17
5
33

23
18

51120_SKIPSEL 32
31
C227
OCP>8A

SC10U25V6KX-1GP
51120_AGND GAP-CLOSE-PWR

1
8/10 R451 10/24 G22

5
6
7
8

1
1 2

D
D
D
D
51120_TONSEL 1 2 51120_VREF2 U33 C221 C224
1 1

2
51120_V5FILT 0R0402-PAD AO4468-GP SC10U25V6KX-1GP
SCD1U25V3ZY-1GP GAP-CLOSE-PWR

2
51120_AGND G23

1
1 2 51120_CS1 Iomax=11A 1 2
R439 18KR3F-GP R448
Qg=9.8nC,
1

G
S
S
S
5V_AUX_S5 0R2J-2-GP GAP-CLOSE-PWR
1 2 51120_CS2 R223 Rdson=20~25mohm GS 10*10*4 4D7uH G29
DY

4
3
2
1
R438 16KR3F-GP 0R0402-PAD 3D3V_PWR 1 2
L20
2
DCR=25mohm, Isat=6A
1

51120_DRVH2
R655 51120_LL2 1 2 GAP-CLOSE-PWR
2

DUMMY-R2 5V_AUX_S5 51120_AGND G28


IND-2D2UH-46-GP-U 1 2
U38
1

5
6
7
8
51120_AGND

D
D
D
D
R219 U34 GAP-CLOSE-PWR
2

1 6 100KR2J-1-GP AO4422-1-GP G25

1
1 2
2 5 PM_SLP_S4_1 C255 R237 TC9
17,20,28,31,37,38 PM_SLP_S4#
1 2

Iomax=11A SC33P50V2JN-3GP 30K9R3F-GP ST220U6D3VDM-15GP GAP-CLOSE-PWR

1 2

2
G
S
S
S
PM_SLP_S4_1# 3 4 DY DY
Qg=9.8nC,
1

R654 NEC 220uF ,V size

4
3
2
1

2
C252 47KR2J-2-GP Rdson=19.6~24mohm R231
SC3900P50V3KX-GP ESR=25mohm
DY 0R2J-2-GP
2

2N7002DW-7F-GP 51120_DRVL2
DY Iripple=2.2A
2

05/18

2
51120_VFB2
51120_COMP1

1
1

R239
GND VREF2 FLOAT V5FILT R228 13K3R2F-L1-GP
22KR2J-GP
DY
1

G30

2
AUTOSKIP C253 DY 1 2
Vout=1V*(R1+R2)/R2
1 2

SKIPSEL AUTOSKIP /FAULTS PWM PWM SC390P50V3JN-GP


2

DY 51120_AGND GAP-CLOSE-PWR
OFF C250 51120_AGND
SC1000P50V3JN-GP
2

CURRENT D-Cap DY
COMP N/A N/A
MODE MODE
For TPS51120,
51120_AGND
380k/CH1 290k/CH1 220k/CH1 180k/CH1 Vout=5V
TONSEL 590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_COMP2 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
2

5V <Core Design>
VFB1 N/A not use ADJ. R235 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
Fixed Output 22KR2J-GP Vout=3.3V
1

3.3V DY
VFB2 N/A not use ADJ. C257 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Wistron Corporation
1 1

Fixed Output SC390P50V3JN-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
2

DY Taipei Hsien 221, Taiwan, R.O.C.


EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON C262 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm.
SC1000P50V3JN-GP Title
2

DY 5V_S3/3D3V_S5
EN3,EN5 LDO OFF not use LDO ON VREG3 on
Size Document Number Rev
51120_AGND A3 -3
Pamirs
Date: Tuesday, May 22, 2007 Sheet 36 of 41

A
Iocp=7.0* 2 = 14A Iocp=7.0*2 = 14A
5V_MAX8743_VCC
Rds,on=17m ohm Rds,on=17m ohm
5V_S5
Vcs1=Iocp*Rds,on=238mV R168 DUMMY-R2
Vcs2=Iocp*Rds,on=28mV
VILIM=Vcs1/0.1=2.38V 1 2 VILIM2=Vcs2/0.1=2.38V
5V_S3
1 R171 2

0R3-0-U-GP 5V_MAX8743_VCC
0721 05/18
DCBATOUT

C198

1
C199

SC1U10V3ZY-6GP

1
SCD1U10V2MX-3GP
C211

2
C207
5V_MAX8743_VCC SC1U25V5ZY-4GP

SCD1U10V2MX-3GP
1D8V / 7.0A

2
R173
OCP>=14A 1 2
8/18

3
1D8V_S3 1D8V_PWR D15 10R3J-3-GP
DCBATOUT
BAW56-7-F-GP
G57
1 2 DCBATOUT MAX8743_BST2

2
GAP-CLOSE-PWR MAX8743_VCC
C216

MAX8743_BST1
G56
1D5V_S0/5A

1
1 2
1

1
SC10U25V6KX-1GP
R369 R362 EC82
GAP-CLOSE-PWR C217 EC77 100KR2F-L1-GP C208 100KR2F-L1-GP C214
OCP>=10A

1
G60 SC10U25V6KX-1GP Iomax=11A SC10U25V6KX-1GP

SC1U10V3ZY-6GP

SCD1U25V3ZY-1GP
2

2
1 2 10/24 1D5V_PWR 1D5V_S0
SCD1U25V3ZY-1GP

2
Qg=9.8nC,
8
7
6
5

2
D
D
D
D
GAP-CLOSE-PWR U26

MAX8743_ILIM2
Rdson=20~25mohm

1
G59 AO4468-GP 10/24 G19
1 2 1 R177 2 R363 R357 R387 1 2

5
6
7
8
90K9R3F-GP 0R0603-PAD

D
D
D
D
GAP-CLOSE-PWR 0R0603-PAD 90K9R3F-GP U30 GAP-CLOSE-PWR G17

22

21
1

1
G58 U22
S
S
S
G
AO4468-GP 1 2

2
1 2 C210 C196 NEC

VCC

VDD
V+
1
2
3
4

NEC Iomax=11A SCD1U25V3ZY-1GP 9 13 SCD1U25V3ZY-1GP GAP-CLOSE-PWR G18

2
GAP-CLOSE-PWR UVP ILIM2 Irms=7.5A(Isat=10.4A) 1 2
Irms=7.5A(Isat=10.4A) Qg=9.8nC,

G
S
S
S
G61 MAX8743_ILIM1 3 19 MAX8743_BST2R DCR=13mohm
ILIM1 BST2 GAP-CLOSE-PWR
1 2 DCR=13mohm Rdson=20~25mohm 12*12*5.5 G21

4
3
2
1
MAX8743_BST1R 25 1 2
GAP-CLOSE-PWR 12*12*5.5 BST1
L16 L17
G55 MAX8743_DH1 26 18 MAX8743_DH2 GAP-CLOSE-PWR G20
MAX8743_LX1 DH1 DH2 MAX8743_LX2
1 2 1 2 27 LX1 LX2 17 1 2 1 2
MAX8743_DL1 24 20 MAX8743_DL2
GAP-CLOSE-PWR DL1 DL2 IND-2D2UH-46-GP-U GAP-CLOSE-PWR
IND-2D2UH-46-GP-U
8
7
6
5

G62 28 16
CS1 CS2
D
D
D
D

1 2 U27 DY
1

5
6
7
8
TC8 C197
SE220U2D5VDM-3GP

FDS6690DS-GP
1

1
D
D
D
D
GAP-CLOSE-PWR 1 15 U29 TC7 C194
OUT1 OUT2

1
SE220U2VDM-8GP
SCD1U25V3ZY-1GP

FDS6690DS-GP
2

DY 2 14
2

2
FB1 FB2 SCD1U25V3ZY-1GP
S
S
S
G

2
MAX8743_ON1 11 12 MAX8743_ON2
1
2
3
4

ON1 ON2

G
S
S
S
Iomax=11A
MAX8743_TON 5 7 MAX8743_PGOOD Panasonic 220uF/2V

4
3
2
1
Qg=9.8nC, TON PGOOD

1
MAX8743_VREF 10 REF ESR=15m ohm
1

Rdson=19.6~24mohm 8 R156

GND
R180 OVP Iripple=2.7 A 5K11R2F-L1-GP
6 SKIP#
8K2R3F-GP
Panasonic 220uF/2D5V
1

ESR=15m ohm MAX8743EEI-1-GP Iomax=11A

23

2
C434 74.08743.A79
2

Iripple=2.7 A SCD47U10V3KX-3GP Qg=9.8nC,


2

1
Rdson=19.6~24mohm
1

DY R162
MAX8743_FB1 C435 10KR3F-L-GP
1

SCD1U25V3ZY-1GP MAX8743_FB2
2

R181 5V_MAX8743_VCC
Voutsetting=1.820V

2
10KR3F-L-GP
Vout=Vfb*(1+(R1/R2)) Voutsetting=1.511V
2

R367 Where Vfb=1.0V,R2=10Kohm


MAX8743_VREF 0R2J-2-GP
8/18
DY
R366 DUMMY-R2
2

R360 1 2
17,20,28,31,36,38 PM_SLP_S4# 1 2 MAX8743_ON1 1 2 CPUCORE_ON 35,36,38
1

5K1R2-GP 0205 0R0402-PAD


R368 R365
R361 DUMMY-R2 R373
20,22,27,28,31,34,38 PM_SLP_S3# 1 2 MAX8743_ON2 PM_SLP_S3#1 2
5K1R2-GP
220KR2J-L2-GP
2

0830 SB DY R364
PM_SLP_S4#1 2 MAX8743_SKIP#
<Core Design>
Ton Frequency (Out1)KHz Frequency (Out2)KHz 220KR2J-L2-GP
1

Wistron Corporation
1

R169
AGND 620 460 C202 0R2J-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC1000P50V3JN-GP Taipei Hsien 221, Taiwan, R.O.C.
REF 485 355 DY
2

Title
OPEN 345 255 1D8V_S3/1D5V_S0
VCC 235 170 Size Document Number Rev
A3 -3
Pamirs
Date: Monday, May 21, 2007 Sheet 37 of 41
A B C D E

Iomax=7A,OCP>14A
5V_S5

1
DCBATOUT G38 DCBATOUT_SC411
1 2 R638 5V_S5 DCBATOUT_SC411 1D05V_PWR G45 1D05V_S0
10R2F-L-GP 1 2
GAP-CLOSE-PWR 12/18

SCD1U25V3KX-GP
GAP-CLOSE-PWR

1 2

1
G39 SC_VCC

1
4 1 2 D38 C20 C302 G44 4
C804 CH521S-30-GP-U1 C309 1 2

5
6
7
8
GAP-CLOSE-PWR SC1U10V3ZY-6GP SC10U25V0KX-3GP

2
D
D
D
D
U48 SC10U25V0KX-3GP GAP-CLOSE-PWR

2
G40 AO4468-GP
1 2 G46
R639 1 2
GAP-CLOSE-PWR C805

G
S
S
S
CPUCORE_ON 1 R10 2 U7 SC411_BST_L
1 2SC411_BST 1 2SC411_LX GAP-CLOSE-PWR
35,36,37 CPUCORE_ON
G41

VCCA

4
3
2
1
1 2 0R0402-PAD 0R0402-PAD 1D05V_PWR G47
5V_S5 SCD1U16V2KX-3GP
GAP-CLOSE-PWR
R20 4 PGD BST 13 11/27 1 2

20,22,27,28,31,34,37 PM_SLP_S3# 1 2SC411_EN_1D05


15 EN/PSV VDDP 9 SC411_DH
L26
GAP-CLOSE-PWR

1
C806
C590 SC1U10V3ZY-6GP C821 SC411_LX 1 2 G48
5K1R2-GP SC1U10V2KX-GP SC411_DH SCD1U16V2KX-3GP
05/14 5 NC#5 12 1 2

2
DH
14 NC#14 IND-1D5UH-23-GP

5
6
7
8
DCBATOUT_SC411 GAP-CLOSE-PWR
R637 12/20 12/21

D
D
D
D
11 SC411_LX U49
LX

1
1 2 SC411_TON 16 AO4406-1-GP G49
TON R640

1
R21 TC12 1 2
1MR2F-GP SC411_LX_L 1 SC411_LX C803 11KR2F-L-GP

ST330U2D5VDM-13GP
ILIM 10 2
C807 1D05V_PWR 1 SC100P50V2JN-3GP GAP-CLOSE-PWR

2
VOUT

G
S
S
S
SC1KP50V2KX-1GP

2
SC411MLTRT-GP 22KR2F-GP
11/27 G50

4
3
2
1
SC411_VFB 3 8 SC411_DL SC411_VFB 1 2
FB DL

PGND

VSSA

GND
SC411_DL GAP-CLOSE-PWR
3 3

17

1
R26
10KR2F-2-GP
Vout Setting:
0.5V/Rlow=(Vout-0.5V)/Rhigh

2
5V_S3 1D5V_S0

1
C319 C323 C317
SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
1D25V_S0

2
DY
Iomax=2A
U50

6
2 2

Vo(cal.)=1.26V
OCP=6A

VCNTL
35,36,37 CPUCORE_ON
R292
2 DY 1
0R2J-2-GP
7 POK VIN 5
1D25V_S0
VIN 9 3/6
PM_SLP_S3# 1 2 8 3
R291 0R0402-PAD EN VOUT
VOUT 4

1
C328
0D9V 2 5912_FB R296 C327

GND
FB 39KR2F-GP SC22U10V6ZY-2GP

SC33P50V2JN-3GP
2

2
5V_S3 Iomax=1A 1D8V_S3 APL5912-KAC-GP

2
0D9V_PWR DDR_VREF_S0 74.05912.A71 SO-8-P
Trace Length=3cm
1

1
Trace Width=5mils
1

C409 G14 R301 KEMET NTD:5.615


SC1U10V3ZY-6GP C398 1 2 68KR2F-GP Trace Resistance>80mohm
2

SC10U10V5ZY-1GP 100uF, 4V, B2 Size


2

GAP-CLOSE-PWR Iripple=1.1A, ESR=70mohm

2
G13 Vo=0.8*(1+(R1/R2))
U17
1 2

10 1 GAP-CLOSE-PWR
VIN VDDQSNS
17,20,28,31,36,37 PM_SLP_S4# 1 2 9 2 G12
R348 0R0402-PAD S5 VLDOIN
8 GND VTT 3 1 2
1 2 7 S3 PGND 4
20,22,27,28,31,34,37 PM_SLP_S3# R349 0R0402-PAD 6 5 GAP-CLOSE-PWR
VTTREF VTTSNS
GND

1 <Core Design> 1
DDR_VREF_S3
1

C138 C143 TPS51100DGQR-GP


Wistron Corporation
11

SC10U10V5ZY-1GP
1

SCD1U16V2ZY-2GP 74.51100.079 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2

C141 C140 Taipei Hsien 221, Taiwan, R.O.C.


SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2

Title
0D9V_LDO/1D25V_LDO/1D05V
Size Document Number Rev
A3 Pamirs -3
Date: Monday, May 21, 2007 Sheet 38 of 41
A B C D E
A B C D E

C310 D22

1 2 2 3D3V_S5
SCD1U25V3ZY-1GP 3
1 2 AIRLINE_VOLT 31
R282 15K4R2F-GP 1

1
AD<=17V, disable
R283
100KR2F-L1-GP charger function BAV99W-1-GP
DCBATOUT
AD+ DY Rx1
12/7

2
U3 R18 U4
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
D S S D BT+
7 2 2 7
6 D S 3 D01R2512F-4-GP 3 S D 6

1
5 D G 4 MAX1909_PDL 4 G D 5
R319
4 100KR2F-L1-GP 4
AO4407-1-GP AO4407-1-GP

1
DY

2
C300

2
G1 G2 SCD1U25V3ZY-1GP

2
1
AC_IN Threshold 2.089V Max. AD+ > 13V
R318 GAP-CLOSE-PWR GAP-CLOSE-PWR
AC_IN > 2.089V --> AC DETECT ACOK is H

1
19K1R2F-GP

1
C94
C101 DCBATOUT
SCD1U25V3ZY-1GP C100AD+_TO_SYS

1
MAX1909_LDO

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
D29 Near MAX8725
A K 2/24 C97
AD+ Pin 2

SC10U25V0KX-3GP

SC10U25V0KX-3GP
SCD1U25V3ZY-1GP
RB521S-30-2-GP
Close to C26

1
MAX1909

C324

C322
C90

SCD1U25V3ZY-1GP
2
pin 24 1 2

4
3
2
1
MAX1909_LDO C348

MAX1909_DHIV

2
1
SC1U10V3ZY-6GP

G
S
S
S
SCD1U25V3ZY-1GP
U15

26

25

1
2

R86 U11

CSSP

CSSN
1

33R2J-2-GP SI4431BDY-E3-GP
R64 R308

D
D
D
D
0R2J-2-GP 100KR2F-L1-GP MAX1909_PDS 27 22

5
6
7
8
DY AD+_TO_SYS 24 PDS DHIV
SRC PDL 28 Near MAX1909
MAX1909_DC_IN 1 2 01/02
Pin 21 Rx2
2

DCIN LDO BT+

1
1122 L27
21 MAX1909_DLOV C81 R51
MAX1909_VCTL DLOV SC1U10V3ZY-6GP CHG_PWR-2
3 11 1 2 CHG_PWR-3 1 2 3

2
MAX1909_ICTL VCTL
10 ICTL
1

MAX1909_MODE 7 D01R2512F-4-GP
MODE IND-10UH-110-GP
1

1
R75 23 MAX1909_DHI DY
R63 DHI EC152
0R2J-2-GP
49K9R2F-L-GP MAX1909_ACIN 3 SCD1U16V2ZY-2GP
DY

2
ACIN

5
6
7
8

SC10U25V0KX-3GP
DY
2

MAX1909_LDO MAX1909_IINP 12/14

D
D
D
D
8
2

IINP

1
C45
D R307 20 MAX1909_DLO EC4
MAX1909_CLS 9 DLO C48
1 2 CLS
3

2
31K6R2F-GP U10 SC10U25V0KX-3GP

SCD1U25V3ZY-1GP
2

2
Q3 SI4800BDY-T1 G9 G8
2N7002PT-U AC_OK 6 19 GAP-CLOSE-PWR GAP-CLOSE-PWR

G
S
S
S
ACOK PGND
1

4
3
2
1

1
31 4CELL#
1

G PGND 29
DY R78
2

49K9R2F-L-GP 18
S BT_TH CSIP
5 PKPRES
2

MAX8725_CSIP
MAX1909_CCV 13 17 MAX8725_CSIN
MAX1909_CCI CCV CSIN
G53 12 16
CCI BATT BT+SENSE 40
1

31 AD_IA 1 2 MAX1909_CCS 14 15
R80 CCS GND
REF

GAP-CLOSE-PWR 10KR2J-3-GP
Detect adaptor
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

input current
2

4
1

C51 MAX8725ETI-GP-U
1

C69

C76

R62
SCD1U25V3ZY-1GP

20KR2F-L-GP
3D3V_AUX_S5
2

C71
MAX1909_REF

V_REF :4.2235V (<500uA)


2

2
1

1
SCD1U25V3ZY-1GP

R85
49K9R2F-L-GP
2

1
ISOURCE_MAX =
2

2 2
MAX1909_CLS R81
(0.075/Rx1)*(VCLS/VREF) = 3.16A
1

C80 100KR2J-1-GP
SC1U10V3ZY-6GP So,Constant Power=18.5*3.16=58.46W (90%)
1
2

2
R87
36K5R3F-2-GP
31,40 BT_TH
2

G54
1 2

GAP-CLOSE-PWR
KBC_3D3V_AUX

1
R322
MAX1909_REF 100KR2J-1-GP

2
27,31 AC_IN#
1
1

R317
R320 100KR2F-L1-GP

D
100KR2J-1-GP
Q24
2

2N7002-11-GP
DY
2

MAX1909_ICTL G AC_OK
10/23
1

S
R315 DY
1

3K65R3F-GP R310 SET CHG OFF :


1

R58 86K6R3F-GP
DY 100KR2F-L1-GP R312 BAT_CHG_I = (0.075/Rx2)*(VICTL/3.6)
2

31 CHG_ON# 31 CHG_4CELL 43K2R2F-L-GP LI BAT :


1 1
CHG_I_SET = H(6cell),
2

Charge current = 3.0A


1

CHG_I_SET = L(12cell),
<Core Design>
Charge current = 5.0A
2N7002DW-7F-GP DY 2N7002DW-7F-GP
U52 U51 Pre-Charge : Wistron Corporation
MAX8725 : CHG_I_PRE_SEL = H, 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
6

Taipei Hsien 221, Taiwan, R.O.C.


Pre-Charge current = 300mA
Title
CHARGER MAX8725ETI
Size Document Number Rev
31 CHG_I_PRE_SEL 31 CHG_I_SEL C
Akita 2.0 -3
Date: Wednesday, May 23, 2007 Sheet 39 of 41
A B C D E
5 4 3 2 1

Adaptor in to generate DCBATOUT

AD+
R293 AD+
DCIN1
1 1 2

2 4K7R2J-2-GP
3 U47
D 4 AD_JK 1 S D 8 D
5 2 S D 7
3 S D 6

1
ACES-CON5-5-GP EC55 AD+_2 4 G D 5
DY

1
EC53 EC9

200KR2J-L1-GP
AO4407-1-GP

SCD1U25V3ZY-1GP
20.80399.005

1
C312 C311

1
R277
SCD1U25V3ZY-1GP SC1000P50V3JN-GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

2
C299 C303
SCD1U25V3ZY-1GP SCD1U25V3ZY-1GP

2
2
C315

1 2

PDTA124EU-1-GP SCD1U25V3ZY-1GP

1
R2
E
AD_OFF# B R288
100KR2J-1-GP
R1
C

Q16 Q17

2
3 OUT
2 R1
31 AD_OFF
IN 1 GND
R2
DTC114EUA-1-GP

C C

BATTERY CONNECTOR

3D3V_AUX_S5 BAT1
3D3V_AUX_S5
3D3V_AUX_S5 7
D25 D24 D23 1

2
2 2 2 3
BT+ 4
31 KBC_SCL0
KBC_SCL0 3 KBC_SDA0 3 BT_TH 3 5
31 KBC_SDA0
31,39 BT_TH 6
1 1 1 8

BAV99W-1-GP BAV99W-1-GP BAV99W-1-GP G3 20.80345.006

1
39 BT+SENSE 1 2
B C15 C321 B

GAP-CLOSE SCD1U25V3ZY-1GP SC1000P50V3JN-GP

2
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
AD/BATT CONN
Size Document Number Rev
A3 -3
Akita 2.0
Date: Friday, May 18, 2007 Sheet 40 of 41
5 4 3 2 1
1
2
3
4
2 1
DY

SCD1U16V2ZY-2GP
2 1

05/17
3D3V_AUX_S5

DY

SCD1U16V2ZY-2GP
2 1

10

A
A

SCD1U16V2ZY-2GP
2 1

H1

H13
H14
1 1 1 7 14
DY
EC135 EC136 EC137 EC138

1 1 3D3V_S5 SCD1U16V2ZY-2GP

SPR1

DY
DY
HOLE HOLE HOLE

SPR2
DY
8

H2

H20
H10
1 1 1 2 1
U36C
5V_S3

1
DY
EC140

DY
1 HOLE HOLE HOLE SCD1U16V2ZY-2GP

SPR9
DY
SPR4
H7

H12
H30
1 1 1
SSLVC08APWR-GP

SPRING-24-GP SPRING-13-GP
HOLE HOLE HOLE
1 1
13
12

DY
DY
SPR5
H4

SPR10
H21
H11
1 1 1 2 1
7 14
3D3V_S5

SCD1U16V2ZY-2GP
3D3V_S5

HOLE HOLE HOLE 2 1

SPRING-13-GP
DY DY

DY

H3
H8

DY
SCD1U16V2ZY-2GP
H23

1 1 1 1 2 1

SPR6
11

SPR11
U36D
DY

HOLE HOLE HOLE SCD1U16V2ZY-2GP


2 1

12/18
DY

34.4F622.001
EC142 EC143 EC144 EC145

SCD1U16V2ZY-2GP

H27
H22

1 1 1
H25

SPR3

B
B

SSLVC08APWR-GP

DY
HOLE 2 1

SPR7
HOLE
DY

H9

1 SCD1U16V2ZY-2GP
2 1
H17

1 1

SPRING-24-GP
SPR8
KBC_3D3V_AUX

HOLE SCD1U16V2ZY-2GP

H26
1 2 1
DY
DY
EC146 EC147 EC148

34.40U07.001 34.40U07.001
SCD1U16V2ZY-2GP
H15

1
HOLE
87.66293.211 87.66383.251

HOLE
H29

1
1 1

DY
SPR13
H24

1
H5

SPR12
HOLE 1

HOLE

34.4F622.001
HOLE
2 1
H6
AD+

H18
H28

1 1 1 1
DY
DY

DY
SPR14
1
SCD1U25V3ZY-1GP
2 1

SPR15
87.66383.251

HOLE HOLE

SPRING-24-GP SPRING-24-GP
SCD1U25V3ZY-1GP
H19
H16

1 1 2 1
DY

12/15
34.40U07.001
HOLE SCD1U25V3ZY-1GP
2 1

C
C

SCD1U25V3ZY-1GP
2 1
87.66383.251
EC48 EC51 EC12 EC16 EC15

3/2

SCD1U25V3ZY-1GP
For SKT2

2 1
2 1
DCBATOUT

SCD1U25V3ZY-1GP
2 1
1D05V_S0

SCD1U16V2ZY-2GP
2 1
SCD1U25V3ZY-1GP
2 1
SCD1U16V2ZY-2GP
2 1
2 1
2 1 2 1 SCD1U25V3ZY-1GP
2 1
DY

SCD1U16V2ZY-2GP
2 1
DY
3D3V_S0

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2 1
EC151

2 1 SCD1U25V3ZY-1GP
2 1
DY

SCD1U16V2ZY-2GP
5V_AUX_S5

2 1
EC107 EC106

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 1 2 1 SCD1U25V3ZY-1GP
2 1
SCD1U16V2ZY-2GP
2 1
DY
DDR_VREF_S0

EC105

SCD1U16V2ZY-2GP
2 1 SCD1U16V2ZY-2GP SCD1U25V3ZY-1GP
2 1
EC33 EC30 EC31 EC68 EC76 EC67

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
DY

2 1
5V_S0

SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
D
D

SCD1U16V2ZY-2GP
2 1 2 1
SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
DY

SCD1U16V2ZY-2GP
2 1 SCD1U16V2ZY-2GP
1D5V_S0

SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
2 1
DY

SCD1U16V2ZY-2GP
2 1
EC66 EC62 EC17 EC60 EC32 EC70 EC14 EC80 EC81 EC36 EC23

SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
EC29 EC39

EC57 EC91 EC47 EC2

SCD1U16V2ZY-2GP 2 1
SCD1U16V2ZY-2GP
2 1
SCD1U16V2ZY-2GP
2 1
DY

SCD1U25V3ZY-1GP
A3

2 1
DY

Title

Size

SCD1U16V2ZY-2GP
2 1
SCD1U16V2ZY-2GP
2 1 2 1
DY

SCD1U25V3ZY-1GP
2 1
DY

SCD1U16V2ZY-2GP
2 1
DY

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
<Core Design>

2 1 2 1
SCD1U25V3ZY-1GP
2 1
DY
DY

SCD1U16V2ZY-2GP
2 1
EC104 EC97

DY
1D8V_S3

SCD1U16V2ZY-2GP
2 1 SCD1U16V2ZY-2GP
DY

2 1 SCD1U25V3ZY-1GP
2 1
DY

MISC

SCD1U16V2ZY-2GP
2 1
DY
DY

Date: Friday, May 18, 2007


Document Number

SCD1U16V2ZY-2GP
2 1
SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
DY

SCD1U16V2ZY-2GP
2 1
DY
DY

SCD1U16V2ZY-2GP
2 1
SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
SCD1U16V2ZY-2GP
2 1
DY

SCD1U16V2ZY-2GP
2 1
DY DY
DY

SCD1U16V2ZY-2GP
2 1 SCD1U25V3ZY-1GP
2 1
SCD1U16V2ZY-2GP
2 1
DY
DY

SCD1U16V2ZY-2GP
2 1
DY

E
E

Pamirs
EC84 EC98 EC99 EC103

SCD1U16V2ZY-2GP SCD1U25V3ZY-1GP
2 1
DY

Sheet

SCD1U16V2ZY-2GP
2 1 2 1
DY

SCD1U16V2ZY-2GP
2 1
DY
DY
EC54 EC109 EC110 EC111EC112 EC113 EC114 EC115 EC116

SCD1U25V3ZY-1GP
41
DY

SCD1U16V2ZY-2GP
2 1 SCD1U16V2ZY-2GP
2 1
DY

SCD1U16V2ZY-2GP
2 1
DY

DY
EC102 EC100

of

SCD1U16V2ZY-2GP
2 1 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC38 EC79 EC69 EC92 EC78 EC40 EC83 EC74 EC71 EC37 EC126 EC127 EC128 EC129 EC130 EC131 EC132 EC133 EC134

Taipei Hsien 221, Taiwan, R.O.C.


DY
EC35 EC75 EC117 EC118 EC119 EC120 EC121 EC122 EC123 EC124 EC125

SCD1U16V2ZY-2GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

41
Rev
Wistron Corporation

-3
1
2
3
4

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