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A B C D E

SYSTEM DC/DC

2O\PSXV%ORFN'LDJUDP
ISL6236 38
Project code: 91.4Y701.001 INPUTS OUTPUTS
PCB P/N : 5V_S5(5A)
DCBATOUT
REVISION : 07242-SB 3D3V_S5(5A)

4 CLK GEN.
Mobile CPU SYSTEM DC/DC 4
ICS 9LPRS502 Penryn G7921 TPS51124 40
07
(RTM875T-605) 3 PCB 8-LAYER STACKUP INPUTS OUTPUTS
71.09502.00W 4, 5 Izqfs!eftjho TOP
DCBATOUT
1D05V_M(11A)
1D5V_S3(10A)
HOST BUS 667/800/1066MHz@1.05V GND

S
TPS51117 39
800/1066MHz UMA CRT 1D8V_S3
DDR3 socket Cantiga 18 S
DCBATOUT (2.5A)
AGTL+ CPU I/F
15 PWR
DDR Memory I/F PCIE*16 LCD 17 TPS51100 39
INTEGRATED GRAHPICS S DDR_VREF_S0

800/1066MHz LVDS, CRT I/F Extended VGA HDMI 1D8V_S3


(1.5A)

DDR3 socket 8,9,10,11,12,13,14 ATI M82s 25 GND DDR_VREF_S3

16 X4 DMI 19,20,21,22,23,24 BOTTOM APL5308 39


3 C-Link0 3
400MHz 3D3V_S0 2D5V_S0
HP/SPDIF (300mA)

Codec Ricoh CHARGER


AZALIA
ALC269 ICH9M PCI BUS R5C833 1394 BQ24750 42
INT.SPKR (include AMP) CONN 33 MS/MS Pro/xD/ INPUTS OUTPUTS
34 6 PCIe ports
PCI/PCI BRIDGE MMC/SD CHG_PWR
Support Dolby HT 5 in 1
ACPI 1.1 Cardreader 33 18V 4.0A
32,33 DCBATOUT
4 SATA UP+5V
12 USB 5V 100mA
MIC In LAN
Boardcom CPU DC/DC
ISL6266A
High Definition Audio RJ45 37
LPC I/F 10 /100M 36
INT MIC ARRAY
2 Serial Peripheral I/F BCM5906 35 INPUTS OUTPUTS 2
DCBATOUT
VCC_CORE_S0
PCIe x1 Mini Card *2 0~1.3V 47A
Kedron a/b/g/n 40

NB DC/DC
MODEM ISL6263A 41
RJ11 MDC Card 26,27,28,29,30 LPC BUS INPUTS OUTPUTS
39
SATA

DCBATOUT GFX_CORE
SATA

USB

MINI USB KBC SPI I/F BIOS LPC


PCI Express Winbond 2M byte DEBUG
New card41 BlueTooth 39 WPC776 51 SC411 48
38 CONN. 31
DCBATOUT 1D5V_S3

1 Power switch Touch INT. BOM1


1
SATA-HDD SATA-CDROM
Pad 51 KB 51 CIR 39
29 31 31 22 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

USB Title

3 Port 42 CAMERA BLOCK DIAGRAM


Size Document Number Rev
17 A3
LT32P SB
Date: W ednesday, December 26, 2007 Sheet 1 of 53

A B C D E
A B C D E

ICH9M Integrated Pull-up Cantiga chipset and ICH9M I/O controller


ICH9M Functional Strap Definitions Hub strapping configuration
ICH9 EDS 642879 Rev.1.5 page 92
and Pull-down Resistors Montevina Platform Design guide 22339 0.5
4 Signal Usage/When Sampled Comment ICH9 EDS 642879 Rev.1.5 page 218 4
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge SIGNAL Resistor Type/Value
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency 000 = FSB1067
Select 011 = FSB667
offset 224h). This signal has weak internal pull-down 010 = FSB800
CL_DATA[1:0] PULL-UP 20K
others = Reserved
HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down. CL_RST0# PULL-UP 20K
Rising Edge of PWROK. Sets bit0 of RPC.PC(Config Registers:Offset 224h) CFG[4:3] Reserved
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG[15:14]
GPIO53 Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) ENERGY_DETECT PULL-UP 20K CFG[18:17]
GPIO20 Reserved This signal should not be pulled high. HDA_BIT_CLK PULL-DOWN 20K
CFG5 DMI x2 Select 0 = DMI x2
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_DOCK_EN#/GPIO33 PULL-UP 20K 1 = DMI x4 (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop CFG6 iTPM Host 0= The iTPM Host Interface is enabled(Note2)
and mobile. HDA_RST# PULL-DOWN 20K Interface 1=The iTPM Host Interface is disalbed(default)

HDA_SDIN[3:0] PULL-DOWN 20K 0 = Transport Layer Security (TLS) cipher


Top-Block Sampled low:Top-Block Swap mode(inverts A16 for CFG7 Intel Management suite with no confidentiality
GNT3#/ Swap Override. all cycles targeting FWH BIOS space). HDA_SDOUT PULL-DOWN 20K engine Crypto strap 1 = TLS cipher suite with
GPIO55 Rising Edge of PWROK. Note: Software will not be able to clear the confidentiality (default)
Top-Swap bit until the system is rebooted HDA_SYNC PULL-DOWN 20K
0 = Reverse Lanes,15->0,14->1 ect..
without GNT3# being pulled down. GLAN_DOCK# The pull-up or pull-down active when configured for native CFG9 PCIE Graphics Lane 1= Normal operation(Default):Lane
GLAN_DOCK# functionality and determined by LAN controller Numbered in order
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K
SPI_CS1#/ Selection 0:1. (Config Registers:Offset 3410h:bit 11:10). 0 = Enable (Note 3)
GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. GPIO[20] PULL-DOWN 20K CFG10 PCIE Loopback enable 1= Disabled (default)
Integrated TPM Enable, Sample low: the Integrated TPM will be disabled. GPIO[49] PULL-UP 20K 00 = Reserve
Rising Edge of CLPWROK Sample high: the MCH TPM enable strap is sampled CFG[13:12] XOR/ALL 10 = XOR mode Enabled
SPI_MOSI low and the TPM Disable bit is clear, the LDA[3:0]#/FHW[3:0]# PULL-UP 20K 01 = ALLZ mode Enabled (Note 3)
11 = Disabled (default)
Integrated TPM will be enable.
LAN_RXD[2:0] PULL-UP 20K
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
3 DMI Termination Voltage, The signal is required to be low for desktop
Rising Edge of PWROK. applications and required to be high for
LDRQ[0] PULL-UP 20K 1 = Dynamic ODT Enabled (Default) 3
GPIO49 mobile applications. LDRQ[1]/GPIO23 PULL-UP 20K 0 = Normal operation(Default):
CFG19 DMI Lane Reversal Lane Numbered in Order
PME# PULL-UP 20K
1 = Reverse Lanes
PCI Express Lane Signal has weak internal pull-up. Sets bit 27 PWRBTN# PULL-UP 20K DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) DMI x2 mode[MCH -> ICH]:(3->0,2->1)
of PWROK. SATALED# PULL-UP 15K
SPKR No Reboot. If sampled high, the system is strapped to the SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K Digital Display Port 0 = Only Digital Display Port
Rising Edge of PWROK. "No Reboot" mode(ICH9 will disable the TCO Timer (SDVO/DP/iHDMI) or PCIE is operational (Default)
system reboot feature). The status is readable SPI_MOSI PULL-DOWN 20K CFG20 Concurrent with PCIe 1 =Digital display Port and PCIe are
via the NO REBOOT bit. operting simulataneously via the PEG port
SPI_MISO PULL-UP 20K
0 =No SDVO Card Present (Default)
TP3 XOR Chain Entrance. This signal should not be pull low unless using SPKR PULL-DOWN 20K SDVO_CTRLDATA SDVO Present
Rising Edge of PWROK. XOR Chain testing. 1 = SDVO Card Present
TACH_[3:0] PULL-UP 20K
0 = LFP Disabled (Default)
GPIO33/ Flash Descriptor Sampled low:the Flash Descriptor Security will be TP[3] PULL-UP 20K Local Flat Panel
HDA_DOCK Security Override Strap overridden. If high,the security measures will be L_DDC_DATA (LFP) Present 1= LFP Card Present; PCIE disabled
_EN# Rising Edge of PWROK in effect.This should only be enabled in manufacturing USB[11:0][P,N] PULL-DOWN 15K
environments using an external pull-up resister. NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

SMBus 17,43,44,46,47,48,49,50,51 DCBATOUT DCBATOUT

7,28,38,39,43,51 3D3V_AUX_S5 3D3V_AUX_S5


SMBC_G792 Thermal
2 40,43,51 5V_AUX_S5 5V_AUX_S5 2
MXM
KBC 13,25,26,27,29,30,31,35,37,38,39,40,41,42,43,48,49,50,51,53 3D3V_S5 3D3V_S5
BAT_SCL
BATTERY
page 17
USB Table 29,42,43,46,47,48,49,50,51,53 5V_S5 5V_S5

PCI Routing USB


IDSEL INT REQ GNT Pair Device
10,12,13,15,16,29,48,50 1D5V_S3 1D5V_S3
G:CARDBUS 0 0 0 Combo(ESATA/USB)
TI7412 AD22 B:1394
F:Flash Media 1 NC 15,16,48 0D75V_S3 0D75V_S3
G:SD Host
2 USB2
SMB_CLK 49,50 1D8V_S3 1D8V_S3
3 USB4 LAN
ICH9M
4 USB3 3,7,10,11,13,15,16,17,18,20,23,24,25,26,27,28,29,30,31,32,33,34,35,38,39,40,41,44,46,50,51,53 3D3V_S0 3D3V_S0
PCIE Routing 5 BLUETOOTH
7,17,18,21,24,25,29,30,31,34,42,44,50,51,53 5V_S0 5V_S0
6 WEBCAM
4,5,6,8,10,11,12,13,28,29,44,46 1D05V_S0 1D05V_S0
LANE2 MiniCard WLAN 7 FT
SMBC_ICH CK505
LANE3 NewCard WLAN 8 MINICARD 3,5,13,26,28,29,34,39,40,41,50,53 1D5V_S0 1D5V_S0

9 NEW1 DDR
17,19,21,22,23,24,50 1D8V_S0 1D8V_S0

20,21,23,48 1D1V_S0 1D1V_S0

1 21,23,24,47 VGA_CORE_S0 VGA_CORE_S0


1
BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reference
Size Document Number Rev
C
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 2 of 53

A B C D E
A B C D E

4 4
3D3V_S0 3D3V_S0_CK505
1D5V_S0
L50
1 2 L22
MLB-160808-18-GP 2 1
1

1
C696 C343 C704 C337 C359 C347 C352 C701 3D3V_S0_CK505 MLB-160808-18-GP

1
C335 C341 C350 C338 C707 C358 C334 C331
SC1U10V3KX-3GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

SC1U10V3KX-3GP
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
2

2
1
X2
X-14D31818M-30GP

2
1

1
SC33P50V2JN-3GP

SC33P50V2JN-3GP
C351 C353 U20

16

43
52
33
56
19
46
62
23

27
4

9
2

VDD48
VDDREF

VDDPLL3

VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDSRC
VDDCPU
VDDPCI

VDD96_IO
VDDPLL3_IO
61 RN25 1 4 SRN0J-6-GP CLK_CPU_BCLK 4
CPUT0
60 2 3 -CLK_CPU_BCLK 4
CPUC0
CLK_XTAL_IN 3 58 RN24 1 4 SRN0J-6-GP CLK_MCH_BCLK 8
C332 SC4D7P50V2CN-1GP CLK_XTAL_OUT X1 CPUT1_F
2 57 2 3 -CLK_MCH_BCLK 8
X2 CPUC1_F
-sb modify
1 2 54 RN23 1 4 SRN0J-6-GP CLK_PCIE_GFX 20
CPUT2_ITP/SRCT8
53 2 3 -CLK_PCIE_GFX 20
FSA CPUC2_ITP/SRCC8
27 CLK48_ICH 1 2 17
USB_48MHZ/FSLA
R186 33R2J-2-GP 51 RN22 1 4 SRN0J-6-GP CLK_PCIE_MINI_1 40,53
SRCT7/CR#_F
50 2 3 -CLK_PCIE_MINI_1 40,53
SRCC7/CR#_E
45
27 -H_STP_PCI PCI_STOP#
44 48 CLK_PCIE_MINI_2 40,53
27 -H_STP_CPU CPU_STOP# SRCT6
3 47 -CLK_PCIE_MINI_2 40,53 3
SRCC6
41 RN19 2 3 SRN0J-6-GP CLK_PCIE_NEW 41,53
SRCT10
7 42 1 4 -CLK_PCIE_NEW 41,53
15,16,30 ICH_SMBCLK SCLK SRCC10 R198 1
15,16,30 ICH_SMBDATA 6 2 10KR2J-3-GP 3D3V_S0
SDATA
40
SRCT11/CR#_H -NEWCARD_CLKREQ 41,53
63 39
27 CK_PWRGD CK_PWRGD/PD# SRCC11/CR#_G R196 1 -LAN_CLKREQ 35
DY 2 10KR2J-3-GP 3D3V_S0
37 CLK_PCIE_LAN 35
SRCT9
38 -CLK_PCIE_LAN 35
R195 33R2J-2-GP SRCC9
1 2 8
27 -CLK_SATA_OE R192 33R2J-2-GP PCI0/CR#_A TP?
1 2 10 34 CLK_MCH_3GPLL 10
10 -CLKREQ_MCH R460 33R2J-2-GP PCI2_TME PCI1/CR#_B SRCT4
1 2 11 35 -CLK_MCH_3GPLL 10
31 PCLK_FWH R190 33R2J-2-GP PCI2/TME SRCC4
32 PCLK_PCM 1 2 12
R189 33R2J-2-GP 27_SEL PCI3 TP? TP?
38 PCLK_KBC 1 2 13 31 CLK_PCIE_ICH 26
R188 33R2J-2-GP ITP_EN PCI4/27_SELECT SRCT3/CR#_C
26 CLK_PCI_ICH 1 2 14 32 -CLK_PCIE_ICH 26
PCI_F5/ITP_EN SRCC3/CR#_D
TP?
28 TP? CLK_PCIE_SATA 28
SRCT2/SATAT
29 -CLK_PCIE_SATA 28
FSB SRCC2/SATAC
64
FSC FSLB/TEST_MODE TP?
27 CLK_ICH14 1 2 5
R197 15R2J-GP REF0/FSLC/TEST_SEL RN10
24 2 3 SRN0J-6-GP DREFCLKSS_100M 10
27MHZ_NONSS/SRCT1/SE1
55 25 1 4 UMA -DREFCLKSS_100M 10
NC#55 27MHZ_SS/SRCC1/SE2
20 RN9 2 3 SRN0J-6-GP

GNDSRC
GNDSRC
GNDSRC
GNDCPU
GNDREF
SRCT0/DOTT_96 DREFCLK_96M 10

GNDPCI
3D3V_S0_CK505 21 1 4 UMA

GND48
SRCC0/DOTC_96 -DREFCLK_96M 10

GND

GND

GND
1

1
C342

C340

C339

C348
1

18
15
1

22
30
36
49
59
26

65
R458 ICS9LPRS355BKLFT-GP
10KR2J-3-GP R445 1 2 100R2F-L1-GP-U VGA_27M 21
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

MAIN SOURCE:71.09355.B03
DY
2

1
PCI2_TME SECOND SOURCE:71.00875.A03
1

120R2F-GP
2 DY R596 2
R193
DY 10KR2J-3-GP

2
Cypress Setting
2

FS_C FS_B FS_A CPU

3D3V_S0_CK505 1 0 1 100M
0 0 1 133M 3D3V_S0_CK505
0 1 0 200M
0 1 1 166M
1

0 0 0 266M

1
R451
10KR2J-3-GP default R456
2K2R2J-2-GP
DY
ITP_EN Output
2

ITP_EN

2
1 2 FSC 27_SEL UMA =0
0 SRC8
1

4,10 CPU_BSEL2 R199 10KR2J-3-GP

1
R184 1 CPU_ITP 1 2 FSB DIS =1
10KR2J-3-GP 4,10 CPU_BSEL1 R202 0R2J-2-GP R453
DY FSA 10KR2J-3-GP
1 2
4,10 CPU_BSEL0 R185 2K2R2J-2-GP
2

27_SEL PIN 20 PIN 21 PIN 24 PIN 25

2
0 DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100
1 SRCT0 SRCC0 27M_NSS 27M_SS

Design Note:
1. All of Input pin didn't have internal pull up resistor.
2. Clock Request (CR) function are enable by registers.
1
3. CY28548 integrated serial resistor of differential clock, 1
so put 0 ohm serial resistor in the schematic.

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Clock Generator
Size Document Number Rev
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 3 of 53
A B C D E
A B C D E

4 4

8 -A[35..3]
U49A 1D05V_S0
-A3 J4 H1 -ADS 8
A[3]# ADS#

ADDR GROUP_0
-A4 L5 E2 -BNR 8
-A5 A[4]# BNR#
L4 G5 -BPRI 8
A[5]# BPRI#

1
-A6 K5
-A7 A[6]#
M3 H5 -DEFER 8
-A8 A[7]# DEFER# R151
N2 F21 -DRDY 8 8 -D[63..0]
-A9 A[8]# DRDY# 56R2J-4-GP
J1 E1 -DBSY 8
-A10 A[9]# DBSY#
N3 8 -DSTBN[3..0]

2
-A11 A[10]#
P5 F1 -BR0 8
-A12 A[11]# BR0#
P2 8 -DSTBP[3..0]
A[12]#
-A13 L2
A[13]# CONTROL IERR#
D20 -IERR
-A14 P4 B3
A[14]# INIT# -INIT 28 8 -DINV[3..0]
-A15 P1
-A16 A[15]#
R1 H4 -HLOCK 8
A[16]# LOCK# U49B
8 -ADSTB0 M1 -CPURST 6,8
ADSTB[0]# -D0 -D32
8 -HREQ[4..0] C1 -RS[2..0] 8 E22 Y22
-HREQ0 RESET# -RS0 -D1 D[0]# D[32]# -D33
3 K3 F3 F24 AB24 3
-HREQ1 REQ[0]# RS[0]# -RS1 -D2 D[1]# D[33]# -D34
H2 F4 E26 V24
REQ[1]# RS[1]# D[2]# D[34]#

DATA GRP 0
-HREQ2 K2 G3 -RS2 -D3 G22 V26 -D35
-HREQ3 REQ[2]# RS[2]# -D4 D[3]# D[35]# -D36

DATA GRP 2
J3 G2 -HTRDY 8 F23 V23
-HREQ4 REQ[3]# TRDY# -D5 D[4]# D[36]# -D37
L1 G25 T22
REQ[4]# 1D05V_S0 -D6 D[5]# D[37]# -D38
G6 -HIT 8 E25 U25
-A17 HIT# -D7 D[6]# D[38]# -D39
Y2 E4 -HITM 8 E23 U23
-A18 A[17]# HITM# -D8 D[7]# D[39]# -D40
U5 -ITP_BPM[3..0] 6 K24 Y25

1
-A19 A[18]# -ITP_BPM0 -D9 D[8]# D[40]# -D41
R3 AD4 G24 W22
A[19]# BPM[0]# D[9]# D[41]#
ADDR GROUP_1

-A20 W6 AD3 -ITP_BPM1 R350 -D10 J24 Y23 -D42


-A21 A[20]# BPM[1]# -ITP_BPM2 54D9R2F-L1-GP -D11 D[10]# D[42]# -D43
U4 AD1 J23 W24
-A22 A[21]# BPM[2]# -ITP_BPM3 -D12 D[11]# D[43]# -D44
Y5 AC4 H22 W25
XDP/ITP SIGNALS

-A23 A[22]# BPM[3]# -D13 D[12]# D[44]# -D45


U1 AC2 -ITP_PRDY 6 F26 AA23

2
-A24 A[23]# PRDY# -D14 D[13]# D[45]# -D46
R4 AC1 -ITP_PREQ 6 ITP_TDI 6 K22 AA24
-A25 A[24]# PREQ# -D15 D[14]# D[46]# -D47
T5 AC5 ITP_TCK 6 H23 AB25
-A26 A[25]# TCK -DSTBN0 D[15]# D[47]# -DSTBN2
T3 AA6 J26 Y26
-A27 A[26]# TDI 1D05V_S0 -DSTBP0 DSTBN[0]# DSTBN[2]# -DSTBP2
W2 AB3 ITP_TDO 6 H26 AA26
-A28 A[27]# TDO -DINV0 DSTBP[0]# DSTBP[2]# -DINV2
W5 AB5 ITP_TMS 6 H25 U22
-A29 A[28]# TMS DINV[0]# DINV[2]#
Y4 AB6 -ITP_TRST 6

1
-A30 A[29]# TRST#
U2 C20 -ITP_DBR 6
-A31 A[30]# DBR# -D16 -D48
V4 N22 AE24
-A32 A[31]# R152 -D17 D[16]# D[48]# -D49
W3 K25 AD24
-A33 A[32]# 68R2-GP -D18 D[17]# D[49]# -D50
AA4
A[33]#
THERMAL P26
D[18]# D[50]#
AA21
-A34 AB2 -D19 R23 AB22 -D51

2
-A35 A[34]# -D20 D[19]# D[51]# -D52
AA3 D21 -PROCHOT 44 L23 AB21
A[35]# PROCHOT# D[20]# D[52]#

DATA GRP 1
V1 A24 THERMDA 7 -D21 M24 AC26 -D53
8 -ADSTB1 ADSTB[1]# THERMDA D[21]# D[53]#
-D22 -D54

DATA GRP 3
B25 THERMDC 7 L22 AD20
THERMDC -D23 D[22]# D[54]# -D55
28 -A20M A6 M23 AE22
A20M# D[23]# D[55]#
ICH

A5 C7 1 2 -D24 P25 AF23 -D56


28 -FERR FERR# THERMTRIP# -THERMTRIP 10,28 -D25 D[24]# D[56]# -D57
28 -IGNNE C4 P23 AC25
IGNNE# R108 -D26 D[25]# D[57]# -D58
P22 AE21
0R2J-2-GP -D27 D[26]# D[58]# -D59
28 -STPCLK D5 T24 AD21
STPCLK# 1D05V_S0 -D28 D[27]# D[59]# -D60
28 INTR C6
LINT0 H CLK R24
D[28]# D[60]#
AC22 Place each resistor
B4 A22 -D29 L25 AD23 -D61
28 NMI LINT1 BCLK[0] CLK_CPU_BCLK 3 D[29]# D[61]# within 0.5" of each pin
28 -SMI A3 A21 -CLK_CPU_BCLK 3 -D30 T25 AF22 -D62
SMI# BCLK[1]
1
D[30]# D[62]#
-D31 N25 AC23 -D63
-DSTBN1 D[31]# D[63]# -DSTBN3
M4 L26 AE25
RSVD[01] R360 -DSTBP1 DSTBN[1]# DSTBN[3]# -DSTBP3
N5 M26 AF24
2 RSVD[02] 1KR2F-3-GP -DINV1 DSTBP[1]# DSTBP[3]# -DINV3 2
T2 N24 AC20
RSVD[03] DINV[1]# DINV[3]#
V3 Trace should be less than 0.5 inch
2

RSVD[04]
GTLREF COMP0 R372 27D4R2F-L1-GP
RESERVED

1 2
B2
D2
RSVD[05] R93 1
DY 2 1KR2J-1-GP
AD26
C23
GTLREF
MISC COMP[0]
R26
U26 COMP1 R371 1 2 54D9R2F-L1-GP
1

RSVD[06] R98 TEST1 COMP[1]


D22 2 1KR2J-1-GP D25 AA1 COMP2 R59 27D4R2F-L1-GP
D3
RSVD[07]
1
DY C24
TEST2 COMP[2]
Y1 COMP3 R62
1
1
2
2 54D9R2F-L1-GP
RSVD[08] TEST3 COMP[3]
F6 R369 AF26
RSVD[09] 2KR2F-3-GP TEST4
AF1 E5 -DPRSTP 10,28,44
TEST5 DPRSTP#
A26 B5
2

TEST6 DPSLP# -DPSLP 28


BGA479-SKT6-GPU3 C3 D24 -DPWR 8
TEST7 DPWR#
3,10 CPU_BSEL0 B22 D6 CPU_PWRGD 28
BSEL[0] PWRGOOD
3,10 CPU_BSEL1 B23 D7 -SLP 8
BSEL[1] SLP#
3,10 CPU_BSEL2 C21 AE6
BSEL[2] PSI# -PSI 44
BGA479-SKT6-GPU3

1 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Penryn CPU(1/2)
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 4 of 53
A B C D E
5 4 3 2 1

D D

U49D
A4 P6
VSS[001] VSS[082]
A8 P21
VSS[002] VSS[083]
A11 P24
VSS[003] VSS[084]
A14 R2
VSS[004] VSS[085]
A16 R5
VSS[005] VSS[086]
A19 R22
VSS[006] VSS[087]
A23 R25
VSS[007] VSS[088]
AF2 T1
VSS[008] VSS[089]
B6 T4
VSS[009] VSS[090]
B8 T23
VCC_CORE VCC_CORE VSS[010] VSS[091]
B11 T26
VSS[011] VSS[092]
B13 U3
VSS[012] VSS[093]
B16 U6
U49C VSS[013] VSS[094]
B19 U21
VSS[014] VSS[095]
A7 AB20 B21 U24
VCC[001] VCC[068] VSS[015] VSS[096]
A9 AB7 B24 V2
VCC[002] VCC[069] VSS[016] VSS[097]
A10 AC7 C5 V5
VCC[003] VCC[070] VSS[017] VSS[098]
A12 AC9 C8 V22
VCC[004] VCC[071] VSS[018] VSS[099]
A13 AC12 C11 V25
VCC[005] VCC[072] VSS[019] VSS[100]
A15 AC13 C14 W1
VCC[006] VCC[073] VSS[020] VSS[101]
A17 AC15 C16 W4
VCC[007] VCC[074] VSS[021] VSS[102]
A18 AC17 C19 W23
VCC[008] VCC[075] VSS[022] VSS[103]
A20 AC18 C2 W26
VCC[009] VCC[076] VSS[023] VSS[104]
B7 AD7 C22 Y3
VCC[010] VCC[077] VSS[024] VSS[105]
B9 AD9 C25 Y6
VCC[011] VCC[078] VSS[025] VSS[106]
B10 AD10 D1 Y21
VCC[012] VCC[079] VSS[026] VSS[107]
B12 AD12 D4 Y24
VCC[013] VCC[080] VSS[027] VSS[108]
B14 AD14 D8 AA2
VCC[014] VCC[081] VSS[028] VSS[109]
B15 AD15 D11 AA5
VCC[015] VCC[082] VSS[029] VSS[110]
B17 AD17 D13 AA8
VCC[016] VCC[083] VSS[030] VSS[111]
B18 AD18 D16 AA11
VCC[017] VCC[084] VSS[031] VSS[112]
B20 AE9 D19 AA14
VCC[018] VCC[085] VSS[032] VSS[113]
C9 AE10 D23 AA16
VCC[019] VCC[086] VSS[033] VSS[114]
C10 AE12 D26 AA19
VCC[020] VCC[087] VSS[034] VSS[115]
C12 AE13 E3 AA22
VCC[021] VCC[088] VSS[035] VSS[116]
C C13 AE15 E6 AA25 C
VCC[022] VCC[089] VSS[036] VSS[117]
C15 AE17 E8 AB1
VCC[023] VCC[090] VSS[037] VSS[118]
C17 AE18 E11 AB4
VCC[024] VCC[091] VSS[038] VSS[119]
C18 AE20 E14 AB8
VCC[025] VCC[092] VSS[039] VSS[120]
D9 AF9 E16 AB11
VCC[026] VCC[093] 1D05V_S0 VSS[040] VSS[121]
D10 AF10 E19 AB13
VCC[027] VCC[094] VSS[041] VSS[122]
D12 AF12 E21 AB16
VCC[028] VCC[095] VSS[042] VSS[123]
D14 AF14 E24 AB19
VCC[029] VCC[096] VSS[043] VSS[124]
D15 AF15 F5 AB23
VCC[030] VCC[097] VSS[044] VSS[125]
D17 AF17 F8 AB26
VCC[031] VCC[098] VSS[045] VSS[126]
D18 AF18 F11 AC3
VCC[032] VCC[099] VSS[046] VSS[127]
E7 AF20 F13 AC6
VCC[033] VCC[100] VSS[047] VSS[128]
E9 F16 AC8
VCC[034] VSS[048] VSS[129]
E10 G21 F19 AC11
VCC[035] VCCP[01] VSS[049] VSS[130]
E12 V6 F2 AC14
VCC[036] VCCP[02] VSS[050] VSS[131]
E13 J6 F22 AC16
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VCC[037] VCCP[03] VSS[051] VSS[132]
E15 K6 F25 AC19
VCC[038] VCCP[04] C559 VSS[052] VSS[133]
E17 M6 1 G4 AC21

1
VCC[039] VCCP[05] VSS[053] VSS[134]
E18 J21 G1 AC24
VCC[040] VCCP[06] C129 C157 C169 C113 C132 C102 VSS[054] VSS[135]
E20 K21 G23 AD2
VCC[041] VCCP[07] VSS[055] VSS[136]

ST220U4VDM-23GP
F7 M21 G26 AD5
2

2
VCC[042] VCCP[08] 1D5V_S0 VSS[056] VSS[137]
F9 N21 H3 AD8
VCC[043] VCCP[09] VSS[057] VSS[138]
F10 N6 H6 AD11
VCC[044] VCCP[10] VSS[058] VSS[139]
F12 R21 H21 AD13
VCC[045] VCCP[11] VSS[059] VSS[140]
F14 R6 H24 AD16
VCC[046] VCCP[12] VSS[060] VSS[141]
F15 T21 J2 AD19
VCC[047] VCCP[13] VSS[061] VSS[142]
F17 T6 J5 AD22
VCC[048] VCCP[14] VSS[062] VSS[143]
F18 V21 J22 AD25
VCC[049] VCCP[15] VSS[063] VSS[144]
F20 W21 J25 AE1
VCC[050] VCCP[16] VSS[064] VSS[145]
AA7 K1 AE4
VCC[051] VSS[065] VSS[146]
AA9 B26 K4 AE8
VCC[052] VCCA[01] VSS[066] VSS[147]
AA10
VCC[053] VCCA[02]
C26 PLACE 0.01uF NEAR VCCA PIN.B26 K23
VSS[067] VSS[148]
AE11
AA12 VID[6..0] 44 K26 AE14
SCD01U16V2KX-3GP

VCC[054] VID0 VSS[068] VSS[149]


AA13 AD6 L3 AE16
VCC[055] VID[0] VSS[069] VSS[150]
SC10U6D3V3MX-GP

AA15 AF5 VID1 L6 AE19


VCC[056] VID[1]
1

VSS[070] VSS[151]
AA17 AE5 VID2 C614 VCC_CORE L21 AE23
VCC[057] VID[2] VID3 C617 VSS[071] VSS[152]
AA18 AF4 L24 AE26
1
VCC[058] VID[3] VID4 VSS[072] VSS[153]
AA20 AE3 M2 A2
2

B VCC[059] VID[4] VID5 VSS[073] VSS[154] B


AB9 AF3 M5 AF6
VCC[060] VID[5] VID6 VSS[074] VSS[155]
AC10 AE2 R46 M22 AF8
VCC[061] VID[6] 100R2F-L1-GP-U VSS[075] VSS[156]
AB10 M25 AF11
VCC[062] VSS[076] VSS[157]
AB12 N1 AF13
2

VCC[063] VSS[077] VSS[158]


AB14 AF7 VCORE_VCCSENCE 44 N4 AF16
VCC[064] VCCSENSE VSS[078] VSS[159]
AB15 N23 AF19
VCC[065] VSS[079] VSS[160]
AB17 N26 AF21
VCC[066] VSS[080] VSS[161]
AB18 AE7 VCORE_VSSSENCE 44 P3 A25
VCC[067] VSSSENSE VSS[081] VSS[162]
B1 AF25
1

BGA479-SKT6-GPU3 VSS VSS[163]


. BGA479-SKT6-GPU3
R52 .
100R2F-L1-GP-U
2

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Penryn CPU(2/2)
Size Document Number Rev
C SA
Olympus
Date: Wednesday, December 26, 2007 Sheet 5 of 53
5 4 3 2 1
5 4 3 2 1

D D

1D05V_S0

1
DY DY
R356 R348 R354
51R2F-2-GP 54D9R2F-L1-GP 54D9R2F-L1-GP
1 TDI

2
2 TMS
4 ITP_TDI TP73 3 TRST#
TPAD30 4 NC
4 ITP_TMS TP72 5 TCK
4 -ITP_TRST TPAD30 TP67 6 NC
TPAD30 7 TDO
4 ITP_TCK TP66 8 BCLK#
C TPAD30 9 BCLK C
4 ITP_TDO TP71 10 GND
TPAD30
11 FBO
12 RESET#
TP237 13 BPM5#
4 ITP_TCK 14 GND
4,8 -CPURST R3571 2 1KR2F-3-GP TPAD30 TP238
TPAD30 TP69 15 BPM4#
4 -ITP_PREQ 16 GND
TPAD30
TP70 17 BPM3#
4 -ITP_PRDY 18 GND
TPAD30
-ITP_BPM3 TP68 19 BPM2#
TPAD30 20 GND
4 -ITP_BPM[3..0]
-ITP_BPM2 TP64 21 BPM1#
TPAD30 22 GND
-ITP_BPM1 TP65 23 BPM0#
1D05V_S0 TPAD30 24 DBA#
-ITP_BPM0 TP63 25 DBR#
TPAD30 26 VTAP
TP99 27 VTT
4 -ITP_DBR TPAD30 TP74 28 VTT
TPAD30
1

1
DY

1
R343 R353
54D9R2F-L1-GP 54D9R2F-L1-GP C517
SCD1U10V2KX-4GP

2
2

B
Ref Des For ITP-XDP B

(*1) TCK SIGNAL IS BRANCHED AT CPU's PIN J1 NO_ASM-->ASM


C157 NO_ASM-->ASM
R140 NO_ASM-->1K 5% ASM

(*2) CPURST# SIGNAL IS BRANCHED AT GMCH's PIN R144 ASM (No Change)
R136 ASM-->NO_ASM
R145 ASM (No Change)
R141 ASM-->54.9 1% ASM
R143 ASM-->54.9 1% ASM

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP CONN
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 6 of 53
5 4 3 2 1
FAN1_VCC
5V_S0

1
R306
10KR2J-3-GP
CN11
5

2
FAN1_FG1 3
53 FAN1_FG1
2
1

*Layout* 20 mil 4

1
SC1KP50V2KX-1GP C466
ETY-CON3-4-GP

2
20.F0984.003

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
5V_S0
5V_S0 U10 C465 C464
*Layout* 30 mil

1
1 R74 2 100R2F-L1-GP-U 5V_G792_S0 6 1
VCC FAN1
20 4

2
DVCC FG1
14 G792_CLK 27
CLK
1

1
16 G792_SDA
1

C114 R73 C81 C87 SDA G792_SCL


7 18
43KR2F-GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP DXP1 SCL
9 19

2
SCD1U16V2ZY-2GP DXP2 NC#19
11 THERMDA 4
2

1
DXP3
2

27 -THRM C229
5
15
DGND
17 SC2200P50V2KX-2GP
CPU

2
HW_THRM_SHDN# THERM# ALERT# DGND
1 2 13
R54 0R2J-2-GP V_DEGREE THERM#
Setting T8 as 3
THERM_SET SGND1
8 THERMDC 4
2 10
100 Degree RESET# SGND2
1

12
R72 SGND3
100KR2F-L1-GP
V_DEGREE G7921SF1U-GP
3D3V_S0
=(((Degree-72)*0.02)+0.34)*VCC
2

G792_DXP2

3
1 Q1

1
PMBS3904-1-GP
U11 C107
DX PORT2

2
6 1 DXP1:108 Degree SC2200P50V2KX-2GP
-PM_SLP_S3_1 38,46,50

2
VCC B
5 2 G792_RST# DXP2:H/W Setting G792_DXN2
NC#5 A DXP3:88 Degree

2
27,50 PM_PWROK 4 3 G19
Y GND R71 Place near chip as close
74LVC1G08GM-GP as possible
100KR2J-1-GP
GAP-CLOSE

1
220ms delay time after Power-on

ATI_VGA_G792_P 21

1
C248
0R2J-2-GP
2200P in DIS
VGA

2
ATI_VGA_G792_N 21

3D3V_S0 RN1 Please close to the GPU


4 1 G792_SCL
3 2 G792_SDA 3D3V_AUX_S5

SRN10KJ-5-GP

1
R48
10KR2J-3-GP R43
100KR2J-1-GP
3D3V_S0

2
3D3V_S0 D4
U48
50 HW_THRM_SHDN# 1

4 3 THER_SDA 17,38,51,53 3 PWR_S5_EN 50


38 S5_ENABLE 2
5 2

1
CHP222PT-U
17,38,51,53 THER_SCL 6 1
C76
SCD1U10V2KX-4GP

2
2N7002DW-7F-GP DY

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor G792


Size Document Number Rev
C
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 7 of 53
A B C D E

-A[35..3] 4
U52A 1 OF 10
4 -D[63..0]
A14 -A3
-D0 H_A#_3 -A4
F2 H_D#_0 H_A#_4 C15
4 -D1 G8 F16 -A5 4
-D2 H_D#_1 H_A#_5 -A6
F8 H_D#_2 H_A#_6 H13
-D3 E6 C18 -A7
-D4 H_D#_3 H_A#_7 -A8
G2 H_D#_4 H_A#_8 M16
-D5 H6 J13 -A9
-D6 H_D#_5 H_A#_9 -A10
H2 H_D#_6 H_A#_10 P16
-D7 F6 R16 -A11
-D8 H_D#_7 H_A#_11 -A12
D4 H_D#_8 H_A#_12 N17
-D9 H3 M13 -A13
-D10 H_D#_9 H_A#_13 -A14
M9 H_D#_10 H_A#_14 E17
-D11 M11 P17 -A15
-D12 H_D#_11 H_A#_15 -A16
J1 H_D#_12 H_A#_16 F17
-D13 J2 G20 -A17
-D14 H_D#_13 H_A#_17 -A18
N12 H_D#_14 H_A#_18 B19
-D15 J6 J16 -A19
-D16 H_D#_15 H_A#_19 -A20
P2 H_D#_16 H_A#_20 E20
-D17 L2 H16 -A21
-D18 H_D#_17 H_A#_21 -A22
R2 H_D#_18 H_A#_22 J20
-D19 N9 L17 -A23
-D20 H_D#_19 H_A#_23 -A24
L6 H_D#_20 H_A#_24 A17
-D21 M5 B17 -A25
-D22 H_D#_21 H_A#_25 -A26
J3 H_D#_22 H_A#_26 L16
-D23 N2 C21 -A27
-D24 H_D#_23 H_A#_27 -A28
R1 H_D#_24 H_A#_28 J17
-D25 N5 H20 -A29
-D26 H_D#_25 H_A#_29 -A30
N6 H_D#_26 H_A#_30 B18
-D27 P13 K17 -A31
-D28 H_D#_27 H_A#_31 -A32
N8 H_D#_28 H_A#_32 B20
-D29 L7 F21 -A33
3 -D30 H_D#_29 H_A#_33 -A34 3
N10 H_D#_30 H_A#_34 K21
-D31 M3 L20 -A35
-D32 H_D#_31 H_A#_35
Y3 H_D#_32
-D33 AD14 H12 -ADS 4
-D34 H_D#_33 H_ADS#
Y6 H_D#_34 H_ADSTB#_0
B16 -ADSTB0 4
-D35 Y10 G17 -ADSTB1 4
-D36 H_D#_35 H_ADSTB#_1
Y12 H_D#_36 H_BNR# A9 -BNR 4
-D37 Y14 F11
-D38 H_D#_37 H_BPRI# -BPRI 4
Y7 G12

HOST
H_D#_38 H_BREQ# -BR0 4
-D39 W2 E9
-D40 H_D#_39 H_DEFER# -DEFER 4
AA8 B10 -DBSY 4
-D41 H_D#_40 H_DBSY#
Y9 AH7 CLK_MCH_BCLK 3
-D42 H_D#_41 HPLL_CLK
AA13 AH6 -CLK_MCH_BCLK 3
1D05V_S0 -D43 H_D#_42 HPLL_CLK#
AA9 J11 -DPW R 4
-D44 H_D#_43 H_DPWR#
AA11 F9 -DRDY 4
-D45 H_D#_44 H_DRDY#
AD11 H9 -HIT 4
H_D#_45 H_HIT#
1

-D46 AD10 E12 -HITM 4


R437 -D47 H_D#_46 H_HITM#
AD13 H11 -HLOCK 4
221R2F-2-GP -D48 H_D#_47 H_LOCK#
AE12 C9 -HTRDY 4
-D49 H_D#_48 H_TRDY#
AE9
-D50 H_D#_49
AA2
2

H_SW ING -D51 H_D#_50


AD8
-D52 H_D#_51
AA3 -DINV[3..0] 4
1

-D53 H_D#_52 -DINV0


AD3 J8
H_D#_53 H_DINV#_0
1

R428 -D54 AD7 L3 -DINV1


100R1F-GP C680 -D55 H_D#_54 H_DINV#_1 -DINV2
AE14 Y13
SCD1U10V2KX-4GP -D56 H_D#_55 H_DINV#_2 -DINV3
AF3 Y1
2

-D57 H_D#_56 H_DINV#_3


AC1 -DSTBN[3..0] 4
2

-D58 H_D#_57 -DSTBN0


AE3 L10
2 -D59 H_D#_58 H_DSTBN#_0 -DSTBN1 2
AC3 M7
-D60 H_D#_59 H_DSTBN#_1 -DSTBN2
AE11 AA5
-D61 H_D#_60 H_DSTBN#_2 -DSTBN3
AE8 AE6
-D62 H_D#_61 H_DSTBN#_3
AG2 -DSTBP[3..0] 4
-D63 H_D#_62 -DSTBP0
AD6 L9
H_D#_63 H_DSTBP#_0 -DSTBP1
M8
H_DSTBP#_1 -DSTBP2
AA6
H_DSTBP#_2 -DSTBP3
AE5
H_DSTBP#_3
1D05V_S0 -HREQ[4..0] 4
B15 -HREQ0
H_REQ#_0 -HREQ1
C5 K13
R429 H_SWING H_REQ#_1 -HREQ2
1 2 24D9R1F-GP E3 F13
H_RCOMP H_REQ#_2
1

B13 -HREQ3
R427 H_REQ#_3 -HREQ4
4,6 -CPURST C12 B14
1KR1F-GP H_CPURST# H_REQ#_4
4 -SLP E11 -RS[2..0] 4
H_CPUSLP# -RS0
B6
H_RS#_0 -RS1
F12
2

H_RS#_1 -RS2
A11 C8
H_AVREF H_RS#_2
B11
1

H_DVREF
1

R159
2KR1F-GP C678 CANTIGA-GM-GP-U-NF
SCD1U10V2KX-4GP
2
2

1
BOM1 1

Route H_XSWING & H_YSWING Route H_XRCOMP &


10 mil wide / 20 mil spacing H_YRCOMP 10 mil wide / Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
20 mil spacing Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga(1/7):HOST I/F
Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 8 of 53
A B C D E
A B C D E

4 4

U52D 4 OF 10 U52E 5 OF 10
15 M_A_DQ[63..0] 16 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_B_DQ0 AK47 BC16 M_B_BS0
M_A_DQ1 SA_DQ_0 SA_BS_0 M_A_BS0 15 M_B_DQ1 SB_DQ_0 SB_BS_0 M_B_BS1 M_B_BS0 16
AJ41 BG18 AH46 BB17
M_A_DQ2 SA_DQ_1 SA_BS_1 M_A_BS1 15 M_B_DQ2 SB_DQ_1 SB_BS_1 M_B_BS2 M_B_BS1 16
AN38 AT25 AP47 BB33
M_A_DQ3 SA_DQ_2 SA_BS_2 M_A_BS2 15 M_B_DQ3 SB_DQ_2 SB_BS_2 M_B_BS2 16
AM38 AP46
M_A_DQ4 SA_DQ_3 M_B_DQ4 SB_DQ_3
AJ36 BB20 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# -M_A_RAS 15 M_B_DQ5 SB_DQ_4
AJ40 BD20 AJ48 AU17
M_A_DQ6 SA_DQ_5 SA_CAS# -M_A_CAS 15 M_B_DQ6 SB_DQ_5 SB_RAS# -M_B_RAS 16
AM44 AY20 AM48 BG16
M_A_DQ7 SA_DQ_6 SA_WE# -M_A_WE 15 M_B_DQ7 SB_DQ_6 SB_CAS# -M_B_CAS 16
AM42 AP48 BF14
M_A_DQ8 SA_DQ_7 M_B_DQ8 SB_DQ_7 SB_WE# -M_B_WE 16
AN43 AU47
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 AU46
M_A_DQ10 SA_DQ_9 M_B_DQ10 SB_DQ_9
AU40 BA48
M_A_DQ11 SA_DQ_10 M_A_DM0 M_A_DM[7..0] 15 M_B_DQ11 SB_DQ_10
AT38 AM37 AY48
M_A_DQ12 SA_DQ_11 SA_DM_0 M_A_DM1 M_B_DQ12 SB_DQ_11 M_B_DM0 M_B_DM[7..0] 16
AN41 AT41 AT47 AM47
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 AY41 AR47 AY47
M_A_DQ14 SA_DQ_13 SA_DM_2 M_A_DM3 M_B_DQ14 SB_DQ_13 SB_DM_1 M_B_DM2
AU44 AU39 BA47 BD40
M_A_DQ15 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AU42 BB12 BC47 BF35
M_A_DQ16 SA_DQ_15 SA_DM_4 M_A_DM5 M_B_DQ16 SB_DQ_15 SB_DM_3 M_B_DM4
AV39 AY6 BC46 BG11
M_A_DQ17 SA_DQ_16 SA_DM_5 M_A_DM6 M_B_DQ17 SB_DQ_16 SB_DM_4 M_B_DM5
AY44 AT7 BC44 BA3
M_A_DQ18 SA_DQ_17 SA_DM_6 M_A_DM7 M_B_DQ18 SB_DQ_17 SB_DM_5 M_B_DM6
BA40 A AJ5 BG43 AP1

B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 M_A_DQS[7..0] 15 BF43 AK2
M_A_DQ20 SA_DQ_19 M_A_DQS0 M_B_DQ20 SB_DQ_19 SB_DM_7
AV41 AJ44 BE45 M_B_DQS[7..0] 16
M_A_DQ21 SA_DQ_20 SA_DQS_0 M_A_DQS1 M_B_DQ21 SB_DQ_20 M_B_DQS0
AY43 AT44 BC41 AL47
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
3 BB41 BA43 BF40 AV48 3
SA_DQ_22 SA_DQS_2 SB_DQ_22 SB_DQS_1
MEMORY
M_A_DQ23 BC40 BC37 M_A_DQS3 M_B_DQ23 BF41 BG41 M_B_DQS2

MEMORY
M_A_DQ24 SA_DQ_23 SA_DQS_3 M_A_DQS4 M_B_DQ24 SB_DQ_23 SB_DQS_2 M_B_DQS3
AY37 AW12 BG38 BG37
M_A_DQ25 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4
BD38 BC8 BF38 BH9
M_A_DQ26 SA_DQ_25 SA_DQS_5 M_A_DQS6 M_B_DQ26 SB_DQ_25 SB_DQS_4 M_B_DQS5
AV37 AU8 BH35 BB2
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 AM7 -M_A_DQS[7..0] 15 BG35 AU1
M_A_DQ28 SA_DQ_27 SA_DQS_7 -M_A_DQS0 M_B_DQ28 SB_DQ_27 SB_DQS_6 M_B_DQS7
AY38 AJ43 BH40 AN6 -M_B_DQS[7..0] 16
M_A_DQ29 SA_DQ_28 SA_DQS#_0 -M_A_DQS1 M_B_DQ29 SB_DQ_28 SB_DQS_7 -M_B_DQS0
BB38 AT43 BG39 AL46
M_A_DQ30 SA_DQ_29 SA_DQS#_1 -M_A_DQS2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 -M_B_DQS1
AV36 BA44 BG34 AV47
M_A_DQ31 SA_DQ_30 SA_DQS#_2 -M_A_DQS3 M_B_DQ31 SB_DQ_30 SB_DQS#_1 -M_B_DQS2
AW36 BD37 BH34 BH41
M_A_DQ32 SA_DQ_31 SA_DQS#_3 -M_A_DQS4 M_B_DQ32 SB_DQ_31 SB_DQS#_2 -M_B_DQS3
BD13 AY12 BH14 BH37
M_A_DQ33 SA_DQ_32 SA_DQS#_4 -M_A_DQS5 M_B_DQ33 SB_DQ_32 SB_DQS#_3 -M_B_DQS4
AU11 BD8 BG12 BG9
M_A_DQ34 SA_DQ_33 SA_DQS#_5 -M_A_DQS6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 -M_B_DQS5
BC11 AU9 BH11 BC2
M_A_DQ35 SA_DQ_34 SA_DQS#_6 -M_A_DQS7 M_B_DQ35 SB_DQ_34 SB_DQS#_5 -M_B_DQS6
BA12 AM8 BG8 AT2
SYSTEM

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ36 SB_DQ_35 SB_DQS#_6 -M_B_DQS7


AU13 BH12 AN5

SYSTEM
M_A_DQ37 SA_DQ_36 M_A_A0 M_A_A[14..0] 15 M_B_DQ37 SB_DQ_36 SB_DQS#_7
AV13 BA21 BF11
M_A_DQ38 SA_DQ_37 SA_MA_0 M_A_A1 M_B_DQ38 SB_DQ_37 M_B_A0 M_B_A[14..0] 16
BD12 BC24 BF8 AV17
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 BG24 BG7 BA25
M_A_DQ40 SA_DQ_39 SA_MA_2 M_A_A3 M_B_DQ40 SB_DQ_39 SB_MA_1 M_B_A2
BB9 BH24 BC5 BC25
M_A_DQ41 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
BA9 BG25 BC6 AU25
M_A_DQ42 SA_DQ_41 SA_MA_4 M_A_A5 M_B_DQ42 SB_DQ_41 SB_MA_3 M_B_A4
AU10 BA24 AY3 AW25
M_A_DQ43 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
AV9 BD24 AY1 BB28
M_A_DQ44 SA_DQ_43 SA_MA_6 M_A_A7 M_B_DQ44 SB_DQ_43 SB_MA_5 M_B_A6
BA11 BG27 BF6 AU28
M_A_DQ45 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
BD9 BF25 BF5 AW28
M_A_DQ46 SA_DQ_45 SA_MA_8 M_A_A9 M_B_DQ46 SB_DQ_45 SB_MA_7 M_B_A8
AY8 AW24 BA1 AT33
M_A_DQ47 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
BA6 BC21 BD3 BD33
M_A_DQ48 SA_DQ_47 SA_MA_10 M_A_A11 M_B_DQ48 SB_DQ_47 SB_MA_9 M_B_A10
DDR

AV5 BG26 AV2 BB16


SA_DQ_48 SA_MA_11 SB_DQ_48 SB_MA_10

DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW33 M_B_A11
M_A_DQ50 SA_DQ_49 SA_MA_12 M_A_A13 M_B_DQ50 SB_DQ_49 SB_MA_11 M_B_A12
AT9 BH17 AR3 AY33
M_A_DQ51 SA_DQ_50 SA_MA_13 M_A_A14 M_B_DQ51 SB_DQ_50 SB_MA_12 M_B_A13
AN8 AY25 AN2 BH15
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 AY2 AU33
M_A_DQ53 SA_DQ_52 M_B_DQ53 SB_DQ_52 SB_MA_14
AU6 AV1
M_A_DQ54 SA_DQ_53 M_B_DQ54 SB_DQ_53
AT5 AP3
M_A_DQ55 SA_DQ_54 M_B_DQ55 SB_DQ_54
AN10 AR1
SA_DQ_55 SB_DQ_55
M_A_DQ56 AM11 M_B_DQ56 AL1
SA_DQ_56 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
M_A_DQ58 SA_DQ_57 M_B_DQ58 SB_DQ_57
AJ9 AJ1
M_A_DQ59 SA_DQ_58 M_B_DQ59 SB_DQ_58
AJ8 AH1
2
M_A_DQ60 SA_DQ_59 M_B_DQ60 SB_DQ_59 2
AN12 AM2
M_A_DQ61 SA_DQ_60 M_B_DQ61 SB_DQ_60
AM13 AM3
SA_DQ_61 SB_DQ_61
M_A_DQ62 AJ11 M_B_DQ62 AH3
M_A_DQ63 SA_DQ_62 M_B_DQ63 SB_DQ_62
AJ12 AJ3
SA_DQ_63 SB_DQ_63

CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF

1 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga(2/7):DDR3
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 9 of 53
A B C D E
A B C D E

ME DEBUG PORT PIN OUT TABLE

RESERVED#AL34 ME_JTAG_TCK

RESERVED#AK34 ME_JTAG_TDI

RESERVED#AN35 ME_JTAG_TDO

RESERVED#AM35 ME_JTAG_TMS

U52B 2 OF 10
4 4

M36
RESERVED#M36

DDR CLK/ CONTROL/COMPENSATION


N36 AP24
RESERVED#N36 SA_CK_0 DDRCLK0_533M 15 1D5V_S3
R33 AT21
RESERVED#R33 SA_CK_1 DDRCLK1_533M 15
T33 AV24
RESERVED#T33 SB_CK_0 DDRCLK2_533M 16
AH9 AU20
RESERVED#AH9 SB_CK_1 DDRCLK3_533M 16
AH10
RESERVED#AH10

1
AH12 AR24
RESERVED#AH12 SA_CK#_0 -DDRCLK0_533M 15 R366
AH13 AR21
RESERVED#AH13 SA_CK#_1 -DDRCLK1_533M 15 1KR1F-GP
K12 AU24
TP82 TPAD30 RESERVED#K12 SB_CK#_0 -DDRCLK2_533M 16
AL34 AV20
TP83 TPAD30 RESERVED#AL34 SB_CK#_1 -DDRCLK3_533M 16
AK34

2
SC2D2U6D3V3MX-1-GP
TP79 TPAD30 RESERVED#AK34
AN35 BC28

SCD01U16V2KX-3GP
TP80 TPAD30 RESERVED#AN35 SA_CKE_0 M_CKE0 15
AM35 AY28
RESERVED#AM35 SA_CKE_1 M_CKE1 15
T24 AY36
RESERVED#T24 SB_CKE_0 M_CKE2 16
BB36

1
SB_CKE_1 M_CKE3 16

RSVD

C533

C529
B31
RESERVED#B31 R367
B2 BA17
RESERVED#B2 SA_CS#_0 -M_CS0 15 3K01R1F-GP
M1 AY16

2
RESERVED#M1 SA_CS#_1 -M_CS1 15
AV16
SB_CS#_0 -M_CS2 16
AR13

2
SB_CS#_1 -M_CS3 16
AY21
RESERVED#AY21
BD17

SC2D2U6D3V3MX-1-GP
SA_ODT_0 M_ODT0 15
AY17

SCD01U16V2KX-3GP
SA_ODT_1 M_ODT1 15
BF15

1
SB_ODT_0 M_ODT2 16 1D5V_S3
BG23 AY13
CFG5 : DMIx2 BF23
RESERVED#BG23 SB_ODT_1 M_ODT3 16 R368

1
RESERVED#BF23 M_RCOMPP R3631 1KR1F-GP
2 80D6R1F-GP

C534

C530
CFG6 : iTPM BH18
BF18
RESERVED#BH18 SM_RCOMP
BG22
BH21 M_RCOMPN R3641 2 80D6R1F-GP
RESERVED#BF18 SM_RCOMP#
CFG7 : ME Crypto

2
BF28 DDR3_VREF_S3
SM_RCOMP_VOH
CFG9: PCIE STD& REV SM_RCOMP_VOL
BH28

CFG16 : FSB Dynamic ODT SM_VREF


AV42
SMPWRG
1 2
AR36

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

1
SM_PWROK
CFG19 : DMI Lane reversal SM_REXT
BF17 R365 1 2 499R1F-GP
C112
R68
C116 0R3-0-U-GP
BC36 -DRAMRST 15,16
SM_DRAMRST#
3 CFG20 : DP concurrent 3

2
B38 DREFCLK_96M 3
CFG[17:3]:internal pullup DPLL_REF_CLK
DPLL_REF_CLK#
A38 -DREFCLK_96M 3
E41
CFG[20:18]:internal pulldown DPLL_REF_SSCLK
DPLL_REF_SSCLK#
F41
DREFCLKSS_100M
-DREFCLKSS_100M
3
3
RN2
F43 DREFCLKSS_100M 1 8
PEG_CLK CLK_MCH_3GPLL 3
-DREFCLKSS_100M

CLK
E43 -CLK_MCH_3GPLL 3 2 7
PEG_CLK# DREFCLK_96M 3 6
-DREFCLK_96M 4 5
R64
AE41 DMI_TXN0 SMPWRG 1 2 SRN0J-7-GP
DMI_RXN_0 DMI_TXN0 26 M_PROK 48,49
AE37 DMI_TXN1
DMI_RXN_1 DMI_TXN1 26
AE47 DMI_TXN2 12K1R2F-L1-GP
DMI_TXN2 26

1
DMI_RXN_2 DMI_TXN3
AH39 DMI_TXN3 26
DMI_RXN_3 R63
AE40 DMI_TXP0 10KR2J-3-GP
DMI_RXP_0 DMI_TXP0 26
3,4 CPU_BSEL0 R109 1 2 1KR1J-GP T25 AE38 DMI_TXP1
CFG_0 DMI_RXP_1 DMI_TXP1 26
3,4 CPU_BSEL1 R115 1 2 1KR1J-GP R25 AE48 DMI_TXP2

2
CFG_1 DMI_RXP_2 DMI_TXP2 26
3,4 CPU_BSEL2 R119 1 2 1KR1J-GP P25 AH40 DMI_TXP3
CFG_2 DMI_RXP_3 DMI_TXP3 26
TP100 TPAD30 P20
CFG_3

DMI
TP108 TPAD30 P24 AE35 DMI_RXN0
DY
R154 1 2 2K2R1J-GP C25
CFG_4 DMI_TXN_0
AE43 DMI_RXN1 DMI_RXN0 26
DY
R127 1 2 2K2R1J-GP N24
CFG_5 DMI_TXN_1
AE46 DMI_RXN2 DMI_RXN1 26
R132 1 CFG_6 DMI_TXN_2 DMI_RXN3 DMI_RXN2 26
2 2K2R1J-GP M24 AH42
DY CFG_7 DMI_TXN_3 DMI_RXN3 26
CFG

TP123 TPAD30 E21


R155 1 CFG_8 DMI_RXP0
2 2K2R1J-GP C23 AD35
R153 1DY 2 2K2R1J-GP
CFG_9 DMI_TXP_0 DMI_RXP1 DMI_RXP0 26
DY TP109 TPAD30
C24
N21
CFG_10 DMI_TXP_1
AE44
AF46 DMI_RXP2 DMI_RXP1 26
R121 1 CFG_11 DMI_TXP_2 DMI_RXP3 DMI_RXP2 26
2 2K2R1J-GP P21 AH43
R110 1DY 2 2K2R1J-GP T21
CFG_12 DMI_TXP_3 DMI_RXP3 26
DY TP96 TPAD30 R20
CFG_13
TP114 TPAD30 CFG_14
M20
R139 1DY
CFG_15
2 2K2R1J-GP L21
CFG_16
GRAPHICS VID

TP120 TPAD30 H21


3D3V_S0 CFG_17
TP107 TPAD30
R118 1 DY 2 4K02R1F-GP
P29
R28
CFG_18
R114 1 DY 2 4K02R1F-GP T28
CFG_19
B33 GFXVID0 TPAD30 TP129
2 CFG_20 GFX_VID_0 GFXVID1 2
B32 TPAD30 TP128
GFX_VID_1 GFXVID2
G33 TPAD30 TP119
GFX_VID_2
F33 GFXVID3 TPAD30 TP124
GFX_VID_3 GFXVID4 TPAD30 TP125
27 -PM_SYNC R29 E33
PM_SYNC# GFX_VID_4
4,28,44 -DPRSTP B7
PM_DPRSTP#
N33
3D3V_S0 PM_EXT_TS#_0
P32
PM_EXT_TS#_1
PM

AT40 C34 TPAD30 TP126


PWROK GFX_VR_EN
AT11
RSTIN#
T20
1

THERMTRIP#
R32
10KR1J-GP

10KR1J-GP

R117 R116 DPRSLPVR


AH37 CL_CLK_MCH 27
CL_CLK 1D05V_S0
AH36 CL_DATA_MCH 27
CL_DATA
BG48 AN36
ME

CL_PWROK 27,50
2

NC#BG48 CL_PWROK
15 -MEM_TS0 BF48 AJ35 -CL_RST_MCH 27
NC#BF48 CL_RST# R88
BD48
NC#BD48 CL_VREF
AH34 1 2 1KR1F-GP
BC48 SCD1U10V2KX-4GP

1
NC#BC48
BH47

1
NC#BH47 R89
BG47
NC#BG47 C177
16 -MEM_TS1 BE47 N28 499R1F-GP
NC#BE47 DDPC_CTRLCLK
BH46 M28

2
NC#BH46 DDPC_CTRLDATA
BF46 G36

2
NC#BF46 SDVO_CTRLCLK
NC

BG45 E36 R166 1 2 10KR1J-GP 3D3V_S0


MISC

NC#BG45 SDVO_CTRLDATA
BH44 K36 R167 1 2 475R1F-GP -CLKREQ_MCH 3
NC#BH44 CLKREQ# 1D05V_S0
0201 SIZE BH43
NC#BH43 ICH_SYNC#
H36 -MCH_ICH_SYNC 27
BH6
NC#BH6

27,44 -VGAET_PWRG
R77 1
DY 2 0R1J-GP
BH5
BG4
NC#BH5
B12 R426 1 2 56R1J-GP
NC#BG4 TSATN#
44 VR_PWRG BH3
NC#BH3
BF3
NC#BF3
BH2
NC#BH2
BG2 B28 ACZ_BITCLK_MCH R436 1 2 33R1J-GP
NC#BG2 HDA_BCLK ACZ_BITCLK 28
R79 1 2 100R1J-GP BE2 B30 -ACZ_RST_MCH R432 1 2 33R1J-GP
20,26,31,40,41,53 -PLT_RST NC#BE2 HDA_RST# -ACZ_RST 28
4,28 -THERMTRIP BG1 B29 ACZ_SDIN_MCH R434 1 2 33R1J-GP
NC#BG1 HDA_SDI ACZ_SDOUT_MCH ACZ_SDIN 28
27,44 PM_DPRSLPVR BF1 C29 R433 1 2 33R1J-GP
NC#BF1 HDA_SDO ACZ_SDOUT 28
HDA

BD1 A28 ACZ_SYNC_MCH R435 1 2 33R1J-GP


NC#BD1 HDA_SYNC ACZ_SYNC 28
1 BC1 1
NC#BC1
F1
NC#F1
A47
NC#A47
CANTIGA-GM-GP-U-NF
BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Cantiga(3/7):DMI/PM/CFG/GF
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 10 of 53
A B C D E
5 4 3 2 1

R149
100KR1J-GP

1 2
3D3V_S0

1D05V_S0

DY DY

1
R143 R138 R126 R131 R111
2K2R1J-GP 2K2R1J-GP 10KR1J-GP 10KR1J-GP U52C 3 OF 10 49D9R1F-GP
D D

2
L32
17 UMA_BKLT L_BKLT_CTRL PEG_COMP
G32 T37
38 UMA_BLON_IN L_BKLT_EN PEG_COMPI
M32 T36
L_CTRL_CLK PEG_COMPO
M33 PEG_RXN[15..0] 20
L_CTRL_DATA PEG_RXN0
K33 H44
17 GM_EDID_CLK L_DDC_CLK PEG_RX#_0 PEG_RXN1
17 GM_EDID_DATA J33 J46
R129 1 L_DDC_DATA PEG_RX#_1 PEG_RXN2
2 100KR1J-GP L44
PEG_RX#_2 PEG_RXN3
L40
PEG_RX#_3 PEG_RXN4
M29 N41
17 PANEL_POWER_ON LIBG L_VDD_EN PEG_RX#_4 PEG_RXN5
1 2 C44 P48
R430 2K4R2F-GP LVDS_IBG PEG_RX#_5 PEG_RXN6
B43 N44
LVDS_VBG PEG_RX#_6 PEG_RXN7
E37 T43
LVDS_VREFH PEG_RX#_7 PEG_RXN8
E38 U43
LVDS_VREFL PEG_RX#_8 PEG_RXN9
17 GMCH_TXACLK- C41 Y43
LVDSA_CLK# PEG_RX#_9 PEG_RXN10
17 GMCH_TXACLK+ C40 Y48
LVDSA_CLK PEG_RX#_10 PEG_RXN11
B37 Y36
LVDSB_CLK# PEG_RX#_11 PEG_RXN12
A37 AA43
LVDSB_CLK PEG_RX#_12

LVDS
AD37 PEG_RXN13
PEG_RX#_13 PEG_RXN14
17 GMCH_TXAOUT0- H47 AC47
LVDSA_DATA#_0 PEG_RX#_14 PEG_RXN15
17 GMCH_TXAOUT1- E46 AD39
LVDSA_DATA#_1 PEG_RX#_15
17 GMCH_TXAOUT2- G40 PEG_RXP[15..0] 20
LVDSA_DATA#_2 PEG_RXP0
A40 H43
LVDSA_DATA#_3 PEG_RX_0

GRAPHICS
J44 PEG_RXP1
PEG_RX_1 PEG_RXP2
17 GMCH_TXAOUT0+ H48 L43
LVDSA_DATA_0 PEG_RX_2 PEG_RXP3
17 GMCH_TXAOUT1+ D45 L41
LVDSA_DATA_1 PEG_RX_3 PEG_RXP4
17 GMCH_TXAOUT2+ F40 N40
LVDSA_DATA_2 PEG_RX_4 PEG_RXP5
B40 P47
LVDSA_DATA_3 PEG_RX_5 PEG_RXP6
N43
PEG_RX_6 PEG_RXP7
A41 T42
LVDSB_DATA#_0 PEG_RX_7 PEG_RXP8
H38 U42
LVDSB_DATA#_1 PEG_RX_8 PEG_RXP9
G37 Y42
LVDSB_DATA#_2 PEG_RX_9 PEG_RXP10
J37 W47
LVDSB_DATA#_3 PEG_RX_10 PEG_RXP11
Y37
PEG_RX_11 PEG_RXP12
C B42 AA42 C
LVDSB_DATA_0 PEG_RX_12 PEG_RXP13
G38 AD36
LVDSB_DATA_1 PEG_RX_13 PEG_RXP14
F37 AC48 PEG_TXN[15..0] 20
LVDSB_DATA_2 PEG_RX_14 PEG_RXP15

PCI-EXPRESS
K37 AD40
LVDSB_DATA_3 PEG_RX_15
J41 GTXN0 1 2 C661SCD1U6D3V1KX-GP PEG_TXN0
PEG_TX#_0
M46 GTXN1 1 2 C638SCD1U6D3V1KX-GP PEG_TXN1
PEG_TX#_1
F25 M47 GTXN2 1 DIS22 C639SCD1U6D3V1KX-GP PEG_TXN2
TVA_DAC PEG_TX#_2
H25 M40 GTXN3 1 DIS2 C633SCD1U6D3V1KX-GP PEG_TXN3
TVB_DAC PEG_TX#_3
K25 M42 GTXN4 1 DIS2 C628SCD1U6D3V1KX-GP PEG_TXN4
TVC_DAC PEG_TX#_4
R48 GTXN5 1 DIS2 C201SCD1U6D3V1KX-GP PEG_TXN5
H24
TV_RTN
PEG_TX#_5
PEG_TX#_6
N38 GTXN6 1 DIS2 C631SCD1U6D3V1KX-GP PEG_TXN6
DIS

TV
T40 GTXN7 1 DIS2 C610SCD1U6D3V1KX-GP PEG_TXN7
PEG_TX#_7
U37 GTXN8 1 DIS2 C603SCD1U6D3V1KX-GP PEG_TXN8
PEG_TX#_8
U40 GTXN9 1 DIS2 C178SCD1U6D3V1KX-GP PEG_TXN9
PEG_TX#_9
C31 Y40 GTXN10 1 DIS2 C598SCD1U6D3V1KX-GP PEG_TXN10
TV_DCONSEL_0 PEG_TX#_10
E32 AA46 GTXN11 1 DIS2 C591SCD1U6D3V1KX-GP PEG_TXN11
TV_DCONSEL_1 PEG_TX#_11
ZO=50 OHM ZO=37.5 OHM AA37 GTXN12 1 DIS2 C584SCD1U6D3V1KX-GP PEG_TXN12
PEG_TX#_12
AA40 GTXN13 1 DIS2 C154SCD1U6D3V1KX-GP PEG_TXN13
PEG_TX#_13
AD43 GTXN14 1 DIS2 C579SCD1U6D3V1KX-GP PEG_TXN14
PEG_TX#_14
AC46 GTXN15 1 DIS C569SCD1U6D3V1KX-GP PEG_TXN15
PEG_TX#_15
E28 J42 GTXP0 1
DIS2 C666SCD1U6D3V1KX-GP PEG_TXP0
PEG_TXP[15..0] 20
18 BLUE_GMCH CRT_BLUE PEG_TX_0
L46 GTXP1 1
DIS2 C640SCD1U6D3V1KX-GP PEG_TXP1
PEG_TX_1
G28 M48 GTXP2 1 2 C642SCD1U6D3V1KX-GP PEG_TXP2
18 GREEN_GMCH CRT_GREEN PEG_TX_2
M39 GTXP3 1 2 C634SCD1U6D3V1KX-GP PEG_TXP3
PEG_TX_3
J28 M43 GTXP4 1 2 C630SCD1U6D3V1KX-GP PEG_TXP4
18 RED_GMCH CRT_RED PEG_TX_4
R47 GTXP5 1 2 C211SCD1U6D3V1KX-GP PEG_TXP5
PEG_TX_5

VGA
G29 N37 GTXP6 1 2 C632SCD1U6D3V1KX-GP PEG_TXP6
SC8P50V2DN-1GP

SC8P50V2DN-1GP

SC8P50V2DN-1GP

CRT_IRTN PEG_TX_6
T39 GTXP7 1 2 C611SCD1U6D3V1KX-GP PEG_TXP7
DIS
150R1F-GP

150R1F-GP

150R1F-GP
1

PEG_TX_7
H32 U36 GTXP8 1 2 C607SCD1U6D3V1KX-GP PEG_TXP8
CRT_DDC_CLK PEG_TX_8
C285 C281 C275 R150 R146 R144 J32 U39 GTXP9 1 2 C184SCD1U6D3V1KX-GP PEG_TXP9
CRT_DDC_DATA PEG_TX_9
J29 Y39 GTXP10 1 2 C599SCD1U6D3V1KX-GP PEG_TXP10
2

CRT_HSYNC PEG_TX_10
E29 Y46 GTXP11 1 2 C593SCD1U6D3V1KX-GP PEG_TXP11
2

CRT_TVO_IREF PEG_TX_11
L29 AA36 GTXP12 1 2 C588SCD1U6D3V1KX-GP PEG_TXP12
CRT_IREF

CRT_VSYNC PEG_TX_12
AA39 GTXP13 1 2 C162SCD1U6D3V1KX-GP PEG_TXP13
PEG_TX_13
AD42 GTXP14 1 2 C581SCD1U6D3V1KX-GP PEG_TXP14
PEG_TX_14
UMA UMA UMA UMA UMA UMA AD46 GTXP15 1 2 C573SCD1U6D3V1KX-GP PEG_TXP15
B PEG_TX_15 B

DIS R254,R246,R239,248,RN45 CANTIGA-GM-GP-U-NF


4
3

CHANGE TO 0 OHM
SRN0J-6-GP

R156
1K02R2D-GP
RN32
2
1
2

DIS PEG Interface


Port B --> System ( Not Use )
Port C --> Slice
18 DDCCLK_ID3 Port D --> ( Not Use )
18 DDCDATA_ID1

R140 1 2 30D1R1F-GP HSYNC_R


18 HSYNC_GMCH
R134 1 2 30D1R1F-GP VSYNC_R
18 VSYNC_GMCH

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CANTIGA(5/7)-VGA/LVDS
Size Document Number Rev
C
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 11 of 53
5 4 3 2 1
A B C D E

4 4

1D5V_S3 U52G 7 OF 10 1D05V_S0

AP33 W28
VCC_SM VCC_AXG_NCTF
AN33 V28
VCC_SM VCC_AXG_NCTF
BH32 W26
VCC_SM VCC_AXG_NCTF 1D05V_S0
BG32 V26
VCC_SM VCC_AXG_NCTF
BF32 W25
VCC_SM VCC_AXG_NCTF
BD32 V25
VCC_SM VCC_AXG_NCTF
BC32 W24

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD47U6D3V2KX-GP

VCC_SM VCC_AXG_NCTF
BB32 V24
1

1
1 VCC_SM VCC_AXG_NCTF U52F 6 OF 10
BA32 W23
C137 C536 C115 C131 C93 C142 VCC_SM VCC_AXG_NCTF
AY32 V23
2 VCC_SM VCC_AXG_NCTF
AW32 AM21
2

2
VCC_SM VCC_AXG_NCTF
AV32 AL21
VCC_SM VCC_AXG_NCTF
AU32 AK21 AG34
VCC_SM VCC_AXG_NCTF VCC
AT32 W21 AC34

SC22U6D3V5MX-2GP

SCD01U16V2KX-3GP
VCC_SM VCC_AXG_NCTF VCC
AR32 V21 AB34

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP
VCC_SM VCC_AXG_NCTF VCC
AP32 U21 AA34

POWER

1
VCC_SM VCC_AXG_NCTF VCC
AN32 AM20 Y34
VCC_SM VCC_AXG_NCTF C220 C183 C89 C166 VCC
BH31 AK20 V34
VCC_SM VCC_AXG_NCTF VCC
BG31 W20 U34
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

2
VCC_SM VCC_AXG_NCTF VCC
BF31 U20 AM33
1

VCC_SM VCC_AXG_NCTF VCC


BG30 AM19 AK33
C118 C125 C105 C130 TC2 VCC_SM VCC_AXG_NCTF VCC
BH29 AL19 AJ33
ST220U2D5VBM-4GP VCC_SM VCC_AXG_NCTF VCC
BG29 AK19 AG33
2

VCC_SM VCC_AXG_NCTF VCC


BF29 AJ19 AF33

SC1U10V2KX-1GP
SC22U6D3V5MX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD47U6D3V2KX-GP
VCC_SM VCC_AXG_NCTF VCC
BD29 AH19
VCC_SM VCC_AXG_NCTF

SC10U6D3V3MX-GP
VCC SM
BC29 AG19 AE33

1
VCC_SM VCC_AXG_NCTF VCC

VCC CORE
BB29 AF19 1 C226 AC33
VCC_SM VCC_AXG_NCTF C159 C200 C221 C164 C204 VCC
BA29 AE19 AA33
VCC_SM VCC_AXG_NCTF 2 VCC
AY29 AB19 Y33

2
VCC_SM VCC_AXG_NCTF VCC
AW29 AA19 W33
VCC_SM VCC_AXG_NCTF VCC
AV29 Y19 V33
VCC_SM VCC_AXG_NCTF VCC
3 AU29 W19 U33 3
VCC_SM VCC_AXG_NCTF VCC
AT29 V19 AH28
VCC_SM VCC_AXG_NCTF VCC
AR29 U19 AF28
VCC_SM VCC_AXG_NCTF VCC
AP29 AM17 AC28
VCC_SM VCC_AXG_NCTF VCC
VCC_AXG_NCTF
AK17 0805 10U AA28
VCC
BA36 AH17 AJ26
VCC_SM/NC VCC_AXG_NCTF VCC
BB24 AG17 AG26
VCC_SM/NC VCC_AXG_NCTF VCC
BD16 AF17 AE26

VCC GFX NCTF


VCC_SM/NC VCC_AXG_NCTF VCC
BB21 AE17 AC26
VCC_SM/NC VCC_AXG_NCTF VCC
AW16 AC17 AH25
VCC_SM/NC VCC_AXG_NCTF VCC
AW13 AB17 AG25
VCC_SM/NC VCC_AXG_NCTF VCC
AT13 Y17 AF25
VCC_SM/NC VCC_AXG_NCTF C191 C215 C179 C192 C202 C214 VCC
W17 AG24

1
VCC_AXG_NCTF VCC

POWER
1D05V_S0 V17 AJ23 1D05V_S0
VCC_AXG_NCTF VCC
AM16 AH23
VCC_AXG_NCTF VCC
Y26 AL16 AF23

2
VCC_AXG VCC_AXG_NCTF VCC
AE25 AK16 AM32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AB25 AJ16 T32 AL32

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
VCC_AXG VCC_AXG_NCTF VCC VCC_NCTF
AA25 AH16 AK32
VCC_AXG VCC_AXG_NCTF VCC_NCTF

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
AE24
VCC_AXG VCC_AXG_NCTF
AG16 0603 0402 VCC_NCTF
AJ32
AC24 AF16 AH32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA24 AE16 AG32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
Y24 AC16 AE32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE23 AB16 AC32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AC23 AA16 AA32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AB23 Y16 Y32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA23 W16 W32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AJ21 V16 U32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AG21 U16 AM30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE21 AL30
VCC_AXG VCC_NCTF
AC21 AK30
VCC_AXG VCC_NCTF
AA21 AH30
VCC_AXG VCC_NCTF
Y21 AG30
VCC_AXG VCC_NCTF
AH20 AF30
VCC_AXG VCC_NCTF
AF20 AE30
VCC_AXG VCC_NCTF
AE20 AC30
VCC_AXG VCC_NCTF
AC20 AB30
VCC_AXG VCC_NCTF
AB20 AA30
2 VCC_AXG VCC_NCTF 2
AA20 Y30
VCC_AXG VCC_NCTF
T17 W30
VCC_AXG VCC_NCTF

VCC NCTF
T16 V30
VCC_AXG VCC_NCTF
AM15 U30
VCC_AXG VCC_NCTF
AL15 AL29
VCC_AXG VCC_NCTF
AE15 AK29
VCC_AXG VCC_NCTF
AJ15 AJ29
VCC_AXG VCC_NCTF
AH15 AH29
VCC_AXG VCC_NCTF
AG15 AG29
VCC_AXG VCC_NCTF
AF15 AE29
VCC_AXG VCC_NCTF
AB15 AC29
VCC_AXG VCC_NCTF
AA15 AA29
VCC_AXG VCC_NCTF
VCC GFX

Y15 Y29
VCC_AXG VCC_NCTF
V15 W29
VCC_AXG VCC_NCTF
U15 V29
VCC_AXG VCC_NCTF
AN14 AL28
VCC_AXG VCC_NCTF
AM14 AK28
VCC_AXG VCC_NCTF
U14 AV44 AL26
VCC_AXG VCC_SM_LF VCC_NCTF
VCC SM LF

T14 BA37 AK26


VCC_AXG VCC_SM_LF VCC_NCTF
AM40 AK25
2

VCC_SM_LF VCC_NCTF
AV21 AK24
R87 VCC_SM_LF VCC_NCTF
AY5 AK23
VCC_SM_LF VCC_NCTF
0R2J-2-GP AM10
VCC_SM_LF
BB13
SCD47U6D3V2KX-GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

VCC_SM_LF
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

CANTIGA-GM-GP-U-NF
SC1U10V2KX-1GP

SC1U10V2KX-1GP

AJ14
1

VCC_AXG_SENSE 1
AH14
VSS_AXG_SENSE C111 C149 C127 C150 C148 C110 C103
2
2

CANTIGA-GM-GP-U-NF

1 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga(5/7):VCC
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 12 of 53
A B C D E
A B C D E

3D3V_S5 1D8V_S3_GM

1D05V_S0 3D3V_DAC
U14

SC10U6D3V5MX-3GP
L47 1 2 IND-10UH-106-GP 1 5
R168 VIN VOUT

1
2 R141

SC22U6D3V5MX-2GP

1
4
L20 1 GND 4
2 IND-10UH-106-GP C688 1 2 3 4

0R2J-2-GP
SC1U10V2KX-1GP
27,38,41,48,49 -PM_SLP_S5

1
C324 EN NC#4

1
C670

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
0R2J-2-GP G9091-180TO1U-GP

2
1

BLM18PG181SN-3GP
L46

2
1
C684 C673 C654 C641
1 2 VCCA_CRT

2
L49 BLM18PG181SN-3GP
1D05V_S0

2
VCCA_DAC

1D05V_S0

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SCD01U16V2KX-3GP
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1
U52H 8 OF 10

1
L37 C315 C303

SC2D2U6D3V3MX-1-GP
1 2 C685 C674 C681 C306 U13

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD47U6D3V2KX-GP
VTT
T13

2
1
BLM15EG121SN1D-GP VTT
B27 U12
1

1
R394 VCCA_CRT_DAC VTT 1 TC19
A26 T12
SCD1U10V2KX-4GP

ST220U6D3VDM-17GP
SC4D7U10V5KX-1GP

C590 D51R3F-2-GP VCCA_CRT_DAC VTT C619 C620 C233 C621


U11
SCD1U10V2KX-4GP VTT 2
T11
2

2
1

1
VTT
A25 U10

CRT
2

C604 C609 C601 VCCA_DAC_BG VTT


B25 T10
SCD1U10V2KX-4GP VSSA_DAC_BG VTT
U9
2

2
1

VTT
T9
C589 VTT
U8
SC2D2U6D3V5KX-1GP VCCA_DPLLA VTT
F47 T8
2

VCCA_DPLLA VTT
U7

VTT
VCCA_DPLLB VTT
L48 T7
VCCA_DPLLB VTT
U6
VCCA_HPLL VTT 3D3V_DAC 3D3V_S0
AD1 T6

PLL
VCCA_HPLL VTT 5D5V_S0
U5
VCCA_MPLL VTT
AE1 T5 U15 R173
VCCA_MPLL VTT
V3
1D8V_S3_GM VTT
3 U3 2 1 2 3
VTT VOUT
J48 V2 3
VCCA_LVDS VTT VIN
U2 1

A LVDS
1D05V_S0 C258 VTT GND 0R3-0-U-GP
J47 T2 DY

SC1U10V2KX-1GP

SC22U6D3V5MX-1GP
1

1
SC1KP50V2KX-1GP VSSA_LVDS VTT
V1

1
1D5V_S0 VTT C323
U1 APL5308-33AC-TRL-GP
VTT C328

2
AD48

2
DY

1
C602 VCCA_PEG_BG

SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
ST100U6D3VBM-10GP

1D05V_S0 SCD1U10V2KX-4GP
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

A PEG
2
1

1
TC5 C525 C538 C145 C136
AA48
VCCA_PEG_PLL 1D05V_S0
2

2
L48
AR20
VCCA_SM
AP20 1 2

1
VCCA_SM
AN20
C605 AR17
VCCA_SM
POWER IND-D1UH-17-GP

SC1U10V2KX-1GP
VCCA_SM

SC10U6D3V3MX-GP
AP17 DY

1
SCD1U10V2KX-4GP VCCA_SM
AN17
1D05V_S0 VCCA_SM C682 C307
AT16
VCCA_SM
AR16

VCC_AXF_MCH
A SM

2
VCCA_SM
AP16
VCCA_SM 1D5V_S3
SCD1U10V2KX-4GP
SC2D2U6D3V2MX-GP
SC22U6D3V5MX-2GP

L31
DY
1

1 VCC_SM_CK_MCH 1 2
C74 C153 C144

1
2 AP28 COIL-1UH-31-GP
2

VCCA_SM_CK
AN28 B22

SCD1U10V2KX-4GP
VCCA_SM_CK VCC_AXF R361
AP25 B21

AXF

1
VCCA_SM_CK VCC_AXF 1R2F-GP
AN25 A21
VCCA_SM_CK VCC_AXF 1D8V_S3_GM
AN24 C540

1 2
VCCA_SM_CK

SC10U6D3V3MX-GP
AM28 C524

2
VCCA_SM_CK_NCTF
AM26

A CK
VCCA_SM_CK_NCTF
AM25
2 VCCA_SM_CK_NCTF 2
AL25 BF21

2
VCCA_SM_CK_NCTF VCC_SM_CK
AM24 BH20
SCD1U10V2MX-3GP

SM CK
SCD01U16V2KX-3GP

VCCA_SM_CK_NCTF VCC_SM_CK
AL24 BG20
VCCA_SM_CK_NCTF VCC_SM_CK
AM23 BF20
1

VCCA_SM_CK_NCTF VCC_SM_CK
AL23
VCCA_DAC VCCA_SM_CK_NCTF
C320 C319
2

K47
1D5V_S0 VCCA_DAC VCC_TX_LVDS
B24
VCCA_TV_DAC 3D3V_S0 1D5V_S0
A24 C35

TV
VCCA_TV_DAC VCC_HV D16
B35 R431

HV
VCC_HV
A35 1 2 K A
VCC_HV
A32 10R2J-2-GP RB521S-30TE61-GP

SCD1U10V2KX-4GP
SC22U6D3V6KX-1GP
SC4D7U6D3V3KX-GP
VCC_HDA
HDA V48

1
VCC_PEG
U48

1
VCC_PEG C304
V47

PEG
VCC_PEG C625 C600
U47

2
1 2 M25
D TV/CRT VCC_PEG
U46 1D05V_S0

2
VCCD_TVDAC VCC_PEG
L21 VCCD_QDAC_MCH L28
BLM18PG181SN-3GP 1D05V_S0 VCCD_QDAC L35
AH48
1D05V_S0 VCC_DMI VCC_DMIPEG_MCH
AF1 AF48 1 2
SCD1U10V2MX-3GP

DMI
SCD022U16V2KX-3GP

VCCD_HPLL VCC_DMI IND-91NH-1-GP


AH47
VCC_DMI
AA47 AG47
1

VCCD_PEG_PLL VCC_DMI
C322 C321 1D8V_S3_GM

SCD1U10V2KX-4GP

ST220U2D5VBM-4GP
M38
VTTLF
2

SCD1U10V2KX-4GP

1
VCCD_LVDS
LVDS

L37 A8 TC18
1

VCCD_LVDS VTTLF C608


L1
C606 VTTLF
AB2

2
VTTLF
2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP
1

2 0R2J-2-GP

R125
1

CANTIGA-GM-GP-U-NF 1 1 1
DY C270 C613 C662 C679
SC1U10V2KX-1GP 2 2 2
2

1
DIS 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga(6/7):VCC
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 13 of 53
A B C D E
A B C D E

U52I 9 OF 10 U52J 10 OF 10
BG21 AH8
VSS VSS
AU48 VSS VSS AM36 L12 VSS VSS Y8
AR48 VSS VSS AE36 AW21 VSS VSS L8
AL48 VSS VSS P36 AU21 VSS VSS E8
BB47 VSS VSS L36 AP21 VSS VSS B8
AW47 VSS VSS J36 AN21 VSS VSS AY7
AN47 VSS VSS F36 AH21 VSS VSS AU7
AJ47 VSS VSS B36 AF21 VSS VSS AN7
AF47 VSS VSS AH35 AB21 VSS VSS AJ7
AD47 VSS VSS AA35 R21 VSS VSS AE7
4 AB47 VSS VSS Y35 M21 VSS VSS AA7 4
Y47 VSS VSS U35 J21 VSS VSS N7
T47 VSS VSS T35 G21 VSS VSS J7
N47 VSS VSS BF34 BC20 VSS VSS BG6
L47 VSS VSS AM34 BA20 VSS VSS BD6
G47 VSS VSS AJ34 AW20 VSS VSS AV6
BD46 VSS VSS AF34 AT20 VSS VSS AT6
BA46 VSS VSS AE34 AJ20 VSS VSS AM6
AY46 VSS VSS W34 AG20 VSS VSS M6
AV46 VSS VSS B34 Y20 VSS VSS C6
AR46 VSS VSS A34 N20 VSS VSS BA5
AM46 VSS VSS BG33 K20 VSS VSS AH5
V46 VSS VSS BC33 F20 VSS VSS AD5
R46 VSS VSS BA33 C20 VSS VSS Y5
P46 VSS VSS AV33 A20 VSS VSS L5
H46 VSS VSS AR33 BG19 VSS VSS J5
F46 VSS VSS AL33 A18 VSS VSS H5
BF44 VSS VSS AH33 BG17 VSS VSS F5
AH44 VSS VSS AB33 BC17 VSS VSS BE4
AD44 VSS VSS P33 AW17 VSS
AA44 L33 AT17 BC3
Y44
U44
VSS
VSS
VSS
VSS
VSS
VSS
H33
N32
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
BC43 VSS VSS A31 BA16 VSS VSS BA2
AV43 VSS VSS AN29 VSS AW2
AU43 VSS VSS T29 AU16 VSS VSS AU2
3 AM43 N29 AN16 AR2 3
VSS VSS VSS VSS
J43 VSS VSS K29 N16 VSS VSS AP2
C43 VSS VSS H29 K16 VSS VSS AJ2
BG42 VSS VSS F29 G16 VSS VSS AH2
AY42 VSS VSS A29 E16 VSS VSS AF2
AT42 VSS VSS BG28 BG15 VSS VSS AE2
AN42 VSS VSS BD28 AC15 VSS VSS AD2
AJ42 VSS VSS BA28 W15 VSS VSS AC2
AE42 VSS VSS AV28 A15 VSS VSS Y2
N42 AT28 BG14 M2
VSS VSS VSS VSS
L42 AR28 AA14 K2
VSS VSS VSS VSS
BD41 AJ28 C14 AM1
VSS VSS VSS VSS
AU41 AG28 BG13 AA1
VSS VSS VSS VSS
AM41 AE28 BC13 P1
VSS VSS VSS VSS
AH41 AB28 BA13 H1
VSS VSS VSS VSS
AD41 Y28
VSS VSS
AA41 P28 U24
VSS VSS VSS
Y41 K28 AN13 U28
VSS VSS VSS VSS
U41 H28 AJ13 U25
VSS VSS VSS VSS
T41 F28 AE13 U29
VSS VSS VSS VSS
M41 C28 N13
VSS VSS VSS
G41 BF26 L13
VSS VSS VSS
B41 AH26 G13 AF32
VSS VSS VSS VSS_NCTF
BG40 AF26 E13 AB32
VSS VSS VSS VSS_NCTF
BB40 AB26 BF12 V32
VSS VSS VSS VSS_NCTF
AV40 AA26 AV12 AJ30
VSS VSS VSS VSS_NCTF
AN40 C26 AT12 AM29
VSS VSS VSS VSS_NCTF
H40 B26 AM12 AF29
VSS VSS VSS VSS_NCTF
E40 BH25 AA12 AB29

VSS NCTF
2 VSS VSS VSS VSS_NCTF 2
AT39 BD25 J12 U26
VSS VSS VSS VSS_NCTF
AM39 BB25 A12 U23
VSS VSS VSS VSS_NCTF
AJ39 AV25 BD11 AL20
VSS VSS VSS VSS_NCTF
AE39 AR25 BB11 V20
VSS VSS VSS VSS_NCTF
N39 AJ25 AY11 AC19
VSS VSS VSS VSS_NCTF
L39 AC25 AN11 AL17
VSS VSS VSS VSS_NCTF
B39 Y25 AH11 AJ17
VSS VSS VSS VSS_NCTF
BH38 N25 AA17
VSS VSS VSS_NCTF
BC38 L25 Y11 U17
VSS VSS VSS VSS_NCTF
BA38 J25 N11
VSS VSS VSS
AU38 G25 G11
VSS VSS VSS TPAD34 TP239
AH38 E25 C11 BH48

VSS SCB
VSS VSS VSS VSS_SCB TPAD34 TP240
AD38 BF24 BG10 BH1
VSS VSS VSS VSS_SCB TPAD34 TP247
AA38 AD12 AV10 A48
VSS VSS VSS VSS_SCB TPAD34 TP246
Y38 AY24 AT10 C1
VSS VSS VSS VSS_SCB TPAD34 TP345
U38 AT24 AJ10 A3
VSS VSS VSS VSS_SCB
T38 AJ24 AE10
VSS VSS VSS
J38 AH24 AA10 E1
VSS VSS VSS NC#E1
F38 AF24 M10 D2
VSS VSS VSS NC#D2
C38 AB24 BF9 C3
VSS VSS VSS NC#C3
BF37 R24 BC9 B4
VSS VSS VSS NC#B4
BB37 L24 AN9 A5
VSS VSS VSS NC#A5
AW37 K24 AM9 A6
VSS VSS VSS NC#A6
AT37 J24 AD9 A43
VSS VSS VSS NC#A43
AN37 G24 G9 A44
VSS VSS VSS NC#A44
AJ37 F24 B9 B45
NC
VSS VSS VSS NC#B45
H37 E24 BH8 C46
VSS VSS VSS NC#C46
C37 BH23 BB8 D47
VSS VSS VSS NC#D47 BOM1
1 BG36 AG23 AV8 B47 1
VSS VSS VSS NC#B47
BD36 Y23 AT8 A46
VSS VSS VSS NC#A46
AK15 B23 F48
VSS VSS NC#F48
AU36
VSS VSS
A23
AJ6
NC#E48
E48
C48
Wistron Corporation
VSS NC#C48 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
B48 Taipei Hsien 221, Taiwan, R.O.C.
NC#B48
CANTIGA-GM-GP-U-NF
Title
CANTIGA-GM-GP-U-NF
Cantiga(8/7):GND
Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 14 of 53
A B C D E
A B C D E

DM1
9 M_A_A[14..0]
M_A_A0 98 110
A0 RAS# -M_A_RAS 9
M_A_A1 97 113
A1 WE# -M_A_WE 9
M_A_A2 96 115
A2 CAS# -M_A_CAS 9
M_A_A3 95
M_A_A4 A3
92 114 -M_CS0 10
M_A_A5 A4 S0#
91 121 -M_CS1 10
4
M_A_A6 A5 S1# 4
90
M_A_A7 A6
86 73 M_CKE0 10
M_A_A8 A7 CKE0
89 74 M_CKE1 10
M_A_A9 A8 CKE1
85
M_A_A10 A9
107 101 DDRCLK0_533M 10
M_A_A11 A10/AP CK0
84 103 -DDRCLK0_533M 10
M_A_A12 A11 CK0#
83
M_A_A13 A12/BC#
119 102 DDRCLK1_533M 10
M_A_A14 A13 CK1
80 104 -DDRCLK1_533M 10
A14 CK1#
78 M_A_DM[7..0] 9
A15 M_A_DM0
9 M_A_BS2 79 11
BA2 DM0 M_A_DM1
28
DM1 M_A_DM2
9 M_A_BS0 109 46
BA0 DM2 M_A_DM3
9 M_A_BS1 108 63
BA1 DM3 M_A_DM4 3D3V_S0
136
M_A_DQ0 DM4 M_A_DM5
5 153
M_A_DQ1 DQ0 DM5 M_A_DM6
9 M_A_DQ[63..0] 7 170
DQ1 DM6

1
M_A_DQ2 15 187 M_A_DM7
M_A_DQ3 DQ2 DM7 R3
17
M_A_DQ4 DQ3 0R3-0-U-GP
4
M_A_DQ5 DQ4
6 200 ICH_SMBDATA 3,16,30
M_A_DQ6 DQ5 SDA
16 202

2
M_A_DQ7 DQ6 SCL ICH_SMBCLK 3,16,30
18
M_A_DQ8 DQ7 VDDSPD_DIMM1
21 199
M_A_DQ9 DQ8 VDDSPD
23

1
M_A_DQ10 DQ9
33 197
M_A_DQ11 DQ10 SA0 C19 C20
35 201
M_A_DQ12 DQ11 SA1 SC2D2U10V3KX-1GP SCD1U10V2KX-4GP
22

2
M_A_DQ13 DQ12 1D5V_S3
24 198 -MEM_TS0 10
M_A_DQ14 DQ13 EVENT#
34 30 -DRAMRST 10,16
M_A_DQ15 DQ14 RESET#
36 125
M_A_DQ16 DQ15 TEST
39
M_A_DQ17 DQ16
41
M_A_DQ18 DQ17
51
M_A_DQ19 DQ18
53 75
M_A_DQ20 DQ19 VDD
40 76
M_A_DQ21 DQ20 VDD
42 81
M_A_DQ22 DQ21 VDD
3
M_A_DQ23
50
DQ22 VDD
82 Place one cap to each power pin and as close as possible 3
52 87

NORMAL TYPE
M_A_DQ24 DQ23 VDD
57 88
M_A_DQ25 DQ24 VDD
59 93

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
M_A_DQ26 DQ25 VDD
67 94
M_A_DQ27 DQ26 VDD
69 99

1
M_A_DQ28 DQ27 VDD
56 100
M_A_DQ29 DQ28 VDD C5 C24 C6 C26 C27 C28 C29 C25 C7 C12 C8 C4 C21 C22 C10 C9
58 105
M_A_DQ30 DQ29 VDD
68 106

2
M_A_DQ31 DQ30 VDD
70 111
M_A_DQ32 DQ31 VDD
129 112
M_A_DQ33 DQ32 VDD
131 117
M_A_DQ34 DQ33 VDD
141 118
M_A_DQ35 DQ34 VDD
143 123
M_A_DQ36 DQ35 VDD
130 124
M_A_DQ37 DQ36 VDD
132
M_A_DQ38 DQ37
140 3
M_A_DQ39 DQ38 VSS
142 8
M_A_DQ40 DQ39 VSS
147 9
M_A_DQ41 DQ40 VSS
149 13
M_A_DQ42 DQ41 VSS
157 14
M_A_DQ43 DQ42 VSS
159 19
M_A_DQ44 DQ43 VSS
146 20
M_A_DQ45 DQ44 VSS
148 25
M_A_DQ46 DQ45 VSS
158 26
M_A_DQ47 DQ46 VSS
160 31
M_A_DQ48 DQ47 VSS
163 32
M_A_DQ49 DQ48 VSS
165 37
M_A_DQ50 DQ49 VSS
175 38
M_A_DQ51 DQ50 VSS
177 43
M_A_DQ52 DQ51 VSS
164 44
M_A_DQ53 DQ52 VSS
166 48
M_A_DQ54 DQ53 VSS
174 49
M_A_DQ55 DQ54 VSS
176 54
DQ55 VSS
M_A_DQ56 181 55
DQ56 VSS
M_A_DQ57 183 60
M_A_DQ58 DQ57 VSS
191 61
M_A_DQ59 DQ58 VSS
193 65
2
M_A_DQ60 DQ59 VSS 2
180 66
M_A_DQ61 DQ60 VSS
182 71
DQ61 VSS
M_A_DQ62 192 72
M_A_DQ63 DQ62 VSS
194 127
DQ63 VSS
128
-M_A_DQS0 VSS
10 133
-M_A_DQS1 DQS0# VSS
9 -M_A_DQS[7..0] 27 134
DQS1# VSS
-M_A_DQS2 45 138
-M_A_DQS3 DQS2# VSS
62 139
-M_A_DQS4 DQS3# VSS
135 144
-M_A_DQS5 DQS4# VSS
152 145
-M_A_DQS6 DQS5# VSS
169 150
-M_A_DQS7 DQS6# VSS
186 151
DQS7# VSS
155
M_A_DQS0 VSS
12 156
M_A_DQS1 DQS0 VSS
9 M_A_DQS[7..0] 29 161
M_A_DQS2 DQS1 VSS
47 162
DDR3_VREF_S3 M_A_DQS3 DQS2 VSS
64 167
M_A_DQS4 DQS3 VSS
137 168
M_A_DQS5 DQS4 VSS 0D75V_S3
154 172
1

M_A_DQS6 DQS5 VSS


171 173
R4 M_A_DQS7 DQS6 VSS
188 178
0R3-0-U-GP DQS7 VSS
179
VSS
10 M_ODT0 116 184
ODT0 VSS
10 M_ODT1 120 185
2

ODT1 VSS
189
VREF_DIMM1 VSS
1 190
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VREFDQ VSS
126 195
1

VREFCA VSS C18 C16 C15 C14


2 196
C30 C23 VSS VSS
77 203
SC2D2U6D3V3MX-1-GP SCD1U10V2KX-4GP NC VTT
122 204
2

NC VTT
206 205
GND GND
NP1 NP2
NP1 NP2
Place caps close to pin1 as possible
DDR3-204P-6-GP-U1

1 1

62.10017.F91
H= 9.2 BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 SODIMM-A (NORMAL TYPE)


Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 15 of 53
A B C D E
A B C D E

DM2
9 M_B_A[14..0]
M_B_A0 98 110 -M_B_RAS 9
M_B_A1 A0 RAS#
97 113 -M_B_WE 9
M_B_A2 A1 WE#
96 115 -M_B_CAS 9
M_B_A3 A2 CAS#
95
M_B_A4 A3
92 114 -M_CS2 10
M_B_A5 A4 S0#
91 121 -M_CS3 10
M_B_A6 A5 S1#
90
M_B_A7 A6
86 73 M_CKE2 10
M_B_A8 A7 CKE0
89 74 M_CKE3 10
M_B_A9 A8 CKE1
85
M_B_A10 A9
107 101 DDRCLK2_533M 10
M_B_A11 A10/AP CK0
84 103 -DDRCLK2_533M 10
M_B_A12 A11 CK0#
83
M_B_A13 A12/BC#
119 102 DDRCLK3_533M 10
4
M_B_A14 A13 CK1 4
80 104 -DDRCLK3_533M 10
A14 CK1#
78 M_B_DM[7..0] 9
A15 M_B_DM0
9 M_B_BS2 79 11
BA2 DM0 M_B_DM1
28
DM1 M_B_DM2
9 M_B_BS0 109 46
BA0 DM2 M_B_DM3
9 M_B_BS1 108 63
BA1 DM3 M_B_DM4 3D3V_S0
9 M_B_DQ[63..0] 136
M_B_DQ0 DM4 M_B_DM5
5 153
M_B_DQ1 DQ0 DM5 M_B_DM6
7 170

1
M_B_DQ2 DQ1 DM6 M_B_DM7
15 187
M_B_DQ3 DQ2 DM7 R5
17
M_B_DQ4 DQ3 0R3-0-U-GP
4
M_B_DQ5 DQ4
6 200 ICH_SMBDATA 3,15,30
M_B_DQ6 DQ5 SDA
16 202

2
M_B_DQ7 DQ6 SCL ICH_SMBCLK 3,15,30
18
M_B_DQ8 DQ7 VDDSPD_DIMM2
21 199
M_B_DQ9 DQ8 VDDSPD
23
DQ9

1
M_B_DQ10 33 197
M_B_DQ11 DQ10 SA0 R6
35 201 1 2 10KR2J-3-GP C31 C32
M_B_DQ12 DQ11 SA1 SC2D2U10V3KX-1GP SCD1U10V2KX-4GP
22

2
M_B_DQ13 DQ12
24 198 -MEM_TS1 10
M_B_DQ14 DQ13 EVENT# 1D5V_S3
34 30 -DRAMRST 10,15
M_B_DQ15 DQ14 RESET#
36 125
M_B_DQ16 DQ15 TEST
39
M_B_DQ17 DQ16
41
M_B_DQ18 DQ17
51
M_B_DQ19 DQ18
53 75
M_B_DQ20 DQ19 VDD
40 76

REVERSE TYPE
M_B_DQ21 DQ20 VDD
42 81
M_B_DQ22 DQ21 VDD
50
DQ22 VDD
82 Place one cap to each power pin and as close as possible
M_B_DQ23 52 87
M_B_DQ24 DQ23 VDD
57 88
M_B_DQ25 DQ24 VDD
59 93

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
M_B_DQ26 DQ25 VDD
67 94
M_B_DQ27 DQ26 VDD
69 99

1
M_B_DQ28 DQ27 VDD
56 100
M_B_DQ29 DQ28 VDD C33 C476 C35 C36 C37 C38 C34 C477 C478 C479 C480 C475 C474 C473 C40 C39
58 105
M_B_DQ30 DQ29 VDD
3 68 106 3

2
M_B_DQ31 DQ30 VDD
70 111
M_B_DQ32 DQ31 VDD
129 112
M_B_DQ33 DQ32 VDD
131 117
M_B_DQ34 DQ33 VDD
141 118
M_B_DQ35 DQ34 VDD
143 123
M_B_DQ36 DQ35 VDD
130 124
M_B_DQ37 DQ36 VDD
132
M_B_DQ38 DQ37
140 3
M_B_DQ39 DQ38 VSS
142 8
M_B_DQ40 DQ39 VSS
147 9
M_B_DQ41 DQ40 VSS
149 13
M_B_DQ42 DQ41 VSS
157 14
M_B_DQ43 DQ42 VSS
159 19
M_B_DQ44 DQ43 VSS
146 20
M_B_DQ45 DQ44 VSS
148 25
M_B_DQ46 DQ45 VSS
158 26
M_B_DQ47 DQ46 VSS
160 31
M_B_DQ48 DQ47 VSS
163 32
M_B_DQ49 DQ48 VSS
165 37
M_B_DQ50 DQ49 VSS
175 38
M_B_DQ51 DQ50 VSS
177 43
M_B_DQ52 DQ51 VSS
164 44
M_B_DQ53 DQ52 VSS
166 48
M_B_DQ54 DQ53 VSS
174 49
M_B_DQ55 DQ54 VSS
176 54
M_B_DQ56 DQ55 VSS
181 55
M_B_DQ57 DQ56 VSS
183 60
M_B_DQ58 DQ57 VSS
191 61
M_B_DQ59 DQ58 VSS
193 65
M_B_DQ60 DQ59 VSS
180 66
M_B_DQ61 DQ60 VSS
182 71
M_B_DQ62 DQ61 VSS
192 72
M_B_DQ63 DQ62 VSS
194 127
DQ63 VSS
9 -M_B_DQS[7..0] 128
VSS
-M_B_DQS0 10 133
-M_B_DQS1 DQS0# VSS
27 134
-M_B_DQS2 DQS1# VSS 0D75V_S3
45 138
2
-M_B_DQS3 DQS2# VSS 2
62 139
-M_B_DQS4 DQS3# VSS
135 144
DQS4# VSS
-M_B_DQS5 152 145
-M_B_DQS6 DQS5# VSS
169 150
-M_B_DQS7 DQS6# VSS
186 151
DQS7# VSS
155

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
9 M_B_DQS[7..0] VSS
M_B_DQS0 12 156

1
DDR3_VREF_S3 DQS0 VSS
M_B_DQS1 29 161 C470 C469 C468 C471
M_B_DQS2 DQS1 VSS
47 162
M_B_DQS3 DQS2 VSS
64 167

2
1

M_B_DQS4 DQS3 VSS


137 168
R307 M_B_DQS5 DQS4 VSS
154 172
0R3-0-U-GP M_B_DQS6 DQS5 VSS
171 173
DQS6 VSS
M_B_DQS7 188 178
DQS7 VSS
179
2

VSS
10 M_ODT2 116 184
ODT0 VSS
10 M_ODT3 120 185
1

ODT1 VSS
C467 189
VSS
C472 SCD1U10V2KX-4GP 1 190
SC2D2U6D3V3MX-1-GP VREF_DIMM2 VREFDQ VSS
126 195
2

VREFCA VSS
2 196
VSS VSS
77 203
NC VTT
122 204
NC VTT
Place caps close to pin1 as possible 206
GND GND
205
NP1 NP2
NP1 NP2

DDR3-204P-7-GP-U1

1 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 SODIMM-B (REVERSE TYPE)


Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 16 of 53
A B C D E
LCD/INVERTER CONN
LCDVDD

3D3V_S0
Brighness Control

1
LCD1 C100 C84 C85
31 SC10U10V5ZY-1GP DY
NP1 SCD1U25V3KX-GP SCD1U25V3KX-GP

2
1 U?

R?
DY
2 2 1 4 3
0R2J-2-GP A B0 UMA_BKLT 11
3 5 2
VCC GND
4 6 1 BRIGHTNESS 38
BRIGHTNESS_CN R386 2 S B1
5 1 BRIGHTNESS 38
6 LCD_BLON_ON 0R2J-2-GP 2 1 BLON_OUT 38
7 DY 0R2J-2-GP
LCD_EDID_CLK R? NC7SB3157P6X-1GP
8 LCD_EDID_DATA

SC100P50V2JN-3GP

SC100P50V2JN-3GP
1

1
10KR2J-3-GP
9 R389 2 1
C582 C592 0R2J-2-GP DIS_BLON_IN 24,38
33 10 L =>B0 -UMA
11 3D3V_S0 DY R?

2
12 H =>B1 -ATI
3D3V_S0 13

2
14
15 LCD_TXACLK+
16 LCD_TXACLK-
17 LCD_TXAOUT2+ DCBATOUT
18 LCD_TXAOUT2-
34 19 LCD_TXAOUT0+
20 LCD_TXAOUT0-
U? 21 LCD_TXAOUT1+ 3D3V_S0
22 LCD_TXAOUT1-
3 4 PANEL_POWER_ON_I 23 F3
11 PANEL_POWER_ON B0 A
2 5 24 2 1 U?
GND VCC FUSE-3A32V-8-GP
24 PANEL_POWER_ON_D 1 6 25
B1 S DISCRETE_ENABLE 18,25,26,38 69.43001.111
26 4 3

1
C583 LCD_EDID_CLK A B0 GM_EDID_CLK 11
27 5 2
VCC GND

SCD1U50V3ZY-GP
L =>B0 -UMA 28 THER_SDA 7,38,51,53 C574 6 1
NC7SB3157P6X-1GP S B1 ATI_EDID_CLK 21
29

2
H =>B1 -ATI THER_SCL 7,38,51,53

SC10U35V0ZY-GP
30 DY
NP2
NC7SB3157P6X-1GP
32

IPEX-CON30-2-GP U?

4 3
LCDVDD LCD_EDID_DATA A B0 GM_EDID_DATA 11
5 2
3D3V_S0 VCC GND
6 1 ATI_EDID_DATA 21
S B1
U8
NC7SB3157P6X-1GP
1 9
IN#1 GND
2 8
OUT IN#8

SC1U16V3ZY-GP
3 7

1
EN IN#7
SC1U16V3ZY-GP

4 6
1

GND IN#6 C80


5
IN#5
SCD1U16V2ZY-2GP

C83 C78

2
2

G5281RC1U-GP
DISCRETE_ENABLE 18,25,26,38

L =>B0 -UMA
H =>B1 -ATI

CCD_PWR 5V_S0

F1 FUSE-1A6V-2-GP
1 2

L => A channel 1D8V_S0


U6 C58
SC4D7U10V5ZY-3GP H =>B channel
1
OUT DY IN
5 1 2 For Hybird

1
2 DY
1

GND
C68 C67 3 4 CCD_ON 38 R1016
NC#3 EN 0R3-0-U-GP
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP U105
2

G5240B1T1U-GP 11 GMCH_TXAOUT2+ 38 2

2
1

ATMDS2+ VDD
37 8

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
11 GMCH_TXAOUT2- ATMDS2- VDD
DY C60 36 16

SC1KP50V2KX-1GP
11 GMCH_TXAOUT0+

1
SCD1U10V2KX-4GP ATMDS1+ VDD
35 18

SC1KP50V2KX-1GP
2

11 GMCH_TXAOUT0- ATMDS1- VDD


34 20 C1003 C1000 C1001 C1002
11 GMCH_TXACLK+ ATMDS0+ VDD
33 30

2
11 GMCH_TXACLK- ATMDS0- VDD
11 GMCH_TXAOUT1+ 32 40
3D3V_S0 SWAP FOR LAYOUT ATMDSCLK+ VDD
31 42
CAMERA & DIG-MIC 11 GMCH_TXAOUT1-

24 ATI_TXAOUT2+ 29
ATMDSCLK-

BTMDS2+
VDD

24 ATI_TXAOUT2- 28 3 LCD_TXAOUT2+
BTMDS2- TMDS2+ LCD_TXAOUT2-
24 ATI_TXAOUT0+ 27 4
CCD_PWR BTMDS1+ TMDS2- LCD_TXAOUT0+
24 ATI_TXAOUT0- 26 6
1

BTMDS1- TMDS1+ LCD_TXAOUT0-


24 ATI_TXACLK+ 25 7
BTMDS0+ TMDS1- LCD_TXACLK+
R? 24 11
24 ATI_TXACLK- BTMDS0- TMDS0+
L => UMA 470R2J-2-GP 23 12 LCD_TXACLK-
24 ATI_TXAOUT1+ BTMDSCLK+ TMDS0-
22 14 LCD_TXAOUT1+
24 ATI_TXAOUT1-
1

H =>ATI BTMDSCLK- TMDSCLK+


15 LCD_TXAOUT1-
2

CCD_PWR_RES R1017 TMDSCLK- SWAP FOR LAYOUT


R24 D?
0R3-0-U-GP K A 1 2 9
18,25,26,38 DISCRETE_ENABLE SEL
1
VSS
CAMERA1 CH521S-30PT-GP-U 8K2R2J-3-GP 5
2

VSS
7 10
1

VSS
1 13
R1018 VSS
17
10KR2F-2-GP VSS
2 USB_PN8_CCD 26,53 19
BLM18BA750SN-GP VSS
3 USB_PP8_CCD 26,53 21
33R2J-2-GP VSS
4 39
2

VSS
5 AUD_DMIC_CLK_G_R 2 1 R30 1 2 41
GND

AUD_DMIC_CLK_G 34 VSS
6 AUD_DMIC_IN0_R 2 1 R32 L1 1 2
33R2J-2-GP L2 BLM18BA750SN-GP AUD_DMIC_IN0 34
8
TS3DV421RUAR-GP
43

MLX-CON6-14-GP

20.F0711.006
53 AUD_DMIC_CLK_G_R BOM1
53 AUD_DMIC_IN0_R
MAIN SOURCE:20.F0711.006
SECOND SOURCE:20.F0693.006 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD CONN & CAMERA & DIG-MIC


Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 17 of 53
A B C D E

R1019
1 2

U102
0R3-0-U-GP
3 4 CRT_RED

1
B0 A
2 5
GND VCC R28
1 6
B1 S 10KR2J-3-GP

2
CRT1
F?

2
NC7SB3157P6X-1GP CRT_R
9 1
5V_CRT R CRT_G
2
G CRT_B FUSE-1D5A6V-10GP
U103 3

1
CRT_DAT_DDC B
12
4
CRT_GREEN CRT_CLK_DDC DATA 4
3 4 15
B0 A C92 CLK
2 5
GND VCC
1 6 5

1
B1 S CRT_HSYNC1 GND 5V_CRT
13 6

1
HSYNC GND

SC100P50V2JN-3GP
R1020 CRT_VSYNC1 14 7
10KR2F-2-GP VSYNC GND
8

1
NC7SB3157P6X-1GP GND C63
10

2
GND

1
C91 C82 4 16

2
C79 NC#4 GND
U104 11 17

SCD01U16V2KX-3GP
2
1
NC#11 GND

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP
2

2
3 4 CRT_BLUE

SC100P50V2JN-3GP
B0 A VIDEO-15-72-GP
2 5 Q?

2
GND VCC
1 6
B1 S
1
R1 IN 20.20713.015
R2
3
NC7SB3157P6X-1GP OUT
2 GND

CHDTC124EU-1GP

L29
CRT_RED CRT_R
U46 DY
1 2
CRT_HSYNC1 5 4 CRT_G
BLM15BB220SN-2GP
CRT_R 6 3
L33
CRT_GREEN 1 2 CRT_G 7 2

BLM15BB220SN-2GP CRT_VSYNC1 8 1 CRT_B


3 3
L30
PACDN009MR-GP-U
1 CRT_BLUE 1 2 CRT_B

1
R352 R370 R358 C520 C542 C527 BLM15BB220SN-2GP C522 C543 C532
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

SC2D2P50V2CC-GP

SC2D2P50V2CC-GP

SC2D2P50V2CC-GP
2

2
SC2D2P50V2CC-GP

SC2D2P50V2CC-GP

SC2D2P50V2CC-GP
2

2
CH751H-40PT
D5

1
1
2

1
2
RN31 R65 RN30
10KR2J-3-GP
SRN2K2J-1-GP SRN2K2J-1-GP

2
U?

4
3

4
3
Q11
3 4
B0 A
2 5
GND VCC
1 6 4 3 CRT_DAT_DDC
B1 S
5 2
2 NC7SB3157P6X-1GP 2
6 1
U?

3 4 2N7002DW-1-GP
B0 A CRT_CLK_DDC
2 5
GND VCC
1 6
B1 S

NC7SB3157P6X-1GP

U16

1 8
1OE# VCC
2 7
1A 2OE#
3 6
2Y 1Y
4 5
GND 2A

SSLVC2G125DP-1GP

R?
R?
CRT_VSYNC1 1 2
CRT_HSYNC_OT 1 2 CRT_HSYNC1
0R2J-2-GP
0R2J-2-GP

U?
1 8
1OE VCC
2 7
CRT_VSYNC_OT 1A 2OE
1 3 6 1
2Y 1Y
4 5
GND 2A

SSHCT2G126DP-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT/TV Connector
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 18 of 53
A B C D E
5 4 3 2 1

U47 U9
LAB1 GDDR3 16MX32 MEMORY
MDA10 T3 A1 MDA34 T3 A1 1D8V_S0
MDA15 DQ31 VDDQ MDA33 DQ31 VDDQ
T2 A12 T2 A12
MDA14 DQ30 VDDQ MDA35 DQ30 VDDQ
R3 DQ29 VDDQ C1 R3 DQ29 VDDQ C1
MDA11 R2 C4 MDA32 R2 C4
LAB2 GDDR3 32MX32 MEMORY MDA9 M3
DQ28
DQ27
VDDQ
VDDQ C9 MDA38 M3
DQ28
DQ27
VDDQ
VDDQ C9
MDA13 N2 C12 MDA36 N2 C12
MDA8 DQ26 VDDQ MDA39 DQ26 VDDQ
L3 DQ25 VDDQ E1 L3 DQ25 VDDQ E1
MDA12 M2 E4 MDA37 M2 E4
MDA23 DQ24 VDDQ MDA41 DQ24 VDDQ
T10 DQ23 VDDQ E9 T10 DQ23 VDDQ E9
MDA21 T11 E12 MDA42 T11 E12
MDA18 DQ22 VDDQ MDA40 DQ22 VDDQ
72.41032.B0U SAMSUNG R10 DQ21 VDDQ J4 R10 DQ21 VDDQ J4
D MDA19 R11 J9 MDA43 R11 J9 BA0 D
DQ20 VDDQ DQ20 VDDQ 22 BA0
72.18512.I0U QIMONDA MDA17 M10 N1 MDA44 M10 N1 BA1
DQ19 VDDQ DQ19 VDDQ 22 BA1
MDA22 N11 N4 MDA45 N11 N4 BA2
DQ18 VDDQ DQ18 VDDQ 22 BA2
MDA16 L10 N9 MDA46 L10 N9
MDA20 DQ17 VDDQ MDA47 DQ17 VDDQ
M11 DQ16 VDDQ N12 1D8V_S0 M11 DQ16 VDDQ N12
MDA4 G10 R1 MDA57 G10 R1 MAA[11..0]
DQ15 VDDQ DQ15 VDDQ 22 MAA[11..0]
MDA5 F11 R4 MDA58 F11 R4
MDA7 DQ14 VDDQ MDA59 DQ14 VDDQ W DQSA[7..0]
F10 DQ13 VDDQ R9 F10 DQ13 VDDQ R9 22 W DQSA[7..0]
MDA6 E11 R12 MDA61 E11 R12
MDA3 DQ12 VDDQ MDA62 DQ12 VDDQ RDQSA[7..0]
C10 DQ11 VDDQ V1 C10 DQ11 VDDQ V1 22 RDQSA[7..0]
MDA0 C11 V12 MDA56 C11 V12
MDA1 DQ10 VDDQ MDA63 DQ10 VDDQ DQMA#[7..0]
B10 DQ9 B10 DQ9 22 DQMA#[7..0]
MDA2 B11 A2 MDA60 B11 A2
MDA29 DQ8 VDD MDA52 DQ8 VDD MDA[63..0]
G3 DQ7 VDD A11 G3 DQ7 VDD A11 22 MDA[63..0]
MDA24 F2 F1 MDA54 F2 F1
MDA30 DQ6 VDD MDA53 DQ6 VDD
F3 DQ5 VDD F12 F3 DQ5 VDD F12
MDA28 E2 M1 MDA55 E2 M1
MDA27 DQ4 VDD MDA49 DQ4 VDD MEM_RST
C3 DQ3 VDD M12 C3 DQ3 VDD M12 22 MEM_RST
MDA31 C2 V2 MDA50 C2 V2
MDA26 DQ2 VDD MDA51 DQ2 VDD
B3 DQ1 VDD V11 B3 DQ1 VDD V11
MDA25 B2 MDA48 B2
DQ0 DQ0 MAA12
VSSQ B1 VSSQ B1 22 MAA12
VSSQ B4 VSSQ B4
BA2 H10 B9 RASA1# H10 B9
BA1 BA2 VSSQ BA0 BA2 VSSQ
G9 BA1 VSSQ B12 G9 BA1 VSSQ B12
BA0 G4 D1 BA1 G4 D1
BA0 VSSQ BA0 VSSQ
VSSQ D4 VSSQ D4
MAA11 L4 D9 MAA7 L4 D9
MAA10 A11 VSSQ MAA8 A11 VSSQ
K2 A10 VSSQ D12 K2 A10 VSSQ D12
C MAA9 M9 G2 MAA3 M9 G2 C
MAA8 A9 VSSQ MAA10 A9 VSSQ
K11 G11 K11 G11
MAA7 A8/AP VSSQ MAA11 A8/AP VSSQ
L9 A7 VSSQ L2 L9 A7 VSSQ L2
MAA6 K10 L11 MAA2 K10 L11
MAA5 A6 VSSQ MAA1 A6 VSSQ
H11 A5 VSSQ P1 H11 A5 VSSQ P1
MAA4 K9 P4 MAA0 K9 P4
MAA3 A4 VSSQ MAA9 A4 VSSQ
M4 A3 VSSQ P9 M4 A3 VSSQ P9
MAA2 K3 P12 MAA6 K3 P12
MAA1 A2 VSSQ MAA5 A2 VSSQ
H2 A1 VSSQ T1 H2 A1 VSSQ T1
MAA0 K4 T4 MAA4 K4 T4
A0 VSSQ A0 VSSQ
T9 T9
CSA0_0# VSSQ CASA1# VSSQ
F9 T12 F9 T12
CS# VSSQ CS# VSSQ
A3 A3
W EA0# VSS CKEA1 VSS
H9 A10 H9 A10
WE# VSS WE# VSS
G1 G1
RASA0# VSS BA2 VSS 1D8V_S0
H3 RAS# VSS
G12 H3 RAS# VSS
G12
L1 L1
CASA0# VSS CSA1_0# VSS
F4 L12 F4 L12
CAS# VSS CAS# VSS
V3 V3
CKEA0 VSS W EA1# VSS
H4 V10 H4 V10
CKE VSS L3 BLM15BD121SN1D-GP CKE VSS
CLKA0# J10 CLKA1# J10
CK# L32 CK#
CLKA0 J11 K1 1 2 CLKA1 J11 K1 L28 1 2
CK VDD CK VDD L5 RASA0#
VDD
K12 1 2 VDD
K12 1 2 22 RASA0# 1 R58 2 121R2F-GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
RDQSA1 P3 BLM15BD121SN1D-GP RDQSA4 P3 BLM15BD121SN1D-GP RASA1# 1 R362 2 121R2F-GP
22 RASA1#
1

1
1D8V_S0 RDQSA2 RDQS3 C526 C86 RDQSA5 RDQS3 C108 C511BLM15BD121SN1D-GP
P10 P10
RDQSA0 RDQS2 RDQSA7 RDQS2 CASA0#
D10
RDQS1
D10
RDQS1 22 CASA0# 1 R50 2 121R2F-GP
RDQSA3 D3 1D8V_S0 RDQSA6 D3 CASA1# 1 R375 2 121R2F-GP
22 CASA1#
2

2
RDQS0 RDQS0
1

B R332 W DQSA1 W DQSA4 W EA0# B


P2 P2 22 W EA0# 1 R51 2 121R2F-GP
1
2K37R2F-GP W DQSA2 WDQS3 W DQSA5 WDQS3 W EA1#
P11 WDQS2 VSS
J12 P11 WDQS2 VSS
J12 22 W EA1# 1 R379 2 121R2F-GP
W DQSA0 D11 J1 R339 W DQSA7 D11 J1
W DQSA3 WDQS1 VSS 2K37R2F-GP W DQSA6 WDQS1 VSS CSA0_0# 1 R42
D2 D2 22 CSA0_0# 2 121R2F-GP
2

WDQS0 WDQS0 CSA0_1# 1 R213


22 CSA0_1# 2 121R2F-GP
DQMA#1 N3 J3 CSA0_1# DQMA#4 N3 J3 CSA1_1#
2

DQMA#2 DM3 RFU#J3 DQMA#5 DM3 RFU#J3 CSA1_0# 1 R380


N10 N10 22 CSA1_0# 2 121R2F-GP
1D8V_S0 DQMA#0 DM2 MAA12 1D8V_S0 DQMA#7 DM2 MAA12 CSA1_1# 1 R217
E10
DM1 NC#J2
J2 E10
DM1 NC#J2
J2 22 CSA1_1# 2 121R2F-GP
1

DQMA#3 SCD1U10V2KX-4GP DQMA#6


E3 E3
DM0 DM0
1

R333 C507 V4 R347 1 C508 V4 22 CKEA0


CKEA0 1 R55 2 121R2F-GP
SEN SEN
SCD1U10V2KX-4GP

5K49R2F-GP MEM_RST V9 5K49R2F-GP MEM_RST V9 CKEA1 1 R359 2 121R2F-GP


22 CKEA1
1

RES RES
2

R349 R329 1 2 A4 R70 R355 1 2 A4 CLKA0 1 R53 2 60D4R2F-GP


22 CLKA0
2

2K37R2F-GP ZQ 2K37R2F-GP ZQ
243R2F-2-GP 243R2F-2-GP CLKA0# 1 R57 2 60D4R2F-GP
22 CLKA0#
H1 H1
2

VREF VREF
A9 A9 1D8V_S0
MF MF CLKA1
H12 H12 22 CLKA1 1 R376 2 60D4R2F-GP
VREF VREF
VREF = .72*VDDQ VREF = .72*VDDQ This A9 PIN Mirror Function CLKA1# 1 R377 2 60D4R2F-GP
22 CLKA1#
1

1
1

R351 C523 HY5RS123235BFP-14-GP R69 C109 HY5RS123235BFP-14-GP


5K49R2F-GP SCD1U10V2KX-4GP 5K49R2F-GP SCD1U10V2KX-4GP DDR3 MEMORY CONTROL SIGNAL PULLUP RESISTOR VALUES
MAY CHANGE BETWEEN M62S,M64S,M71S AND M72S.
2

SEE DATA BOOK FOR LATESTINFORMATION


2

A BOM1 A
PLACE VREF DIVIDER COMPONENTS
1D8V_S0 1D8V_S0
AS CLOSE TO MEMORY AS POSSIBLE
Wistron Corporation
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

1
C498 C502 C544 C506 C101 C123 C96 C98 C94 C99 C539 C515 C519 C513 C516 C512 C549 C541 C518 C528 C537 C521 C548 C550 Taipei Hsien 221, Taiwan, R.O.C.

Title
ATI M82-S VRAM(1,2)
2

2
Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 19 of 53
5 4 3 2 1
5 4 3 2 1

U53A 1 OF 6
D D
PART 1 OF 6
PEG_TXP0 PEG_1_RXP0
DIS
C2971 PEG_RXP0
AC30
PCIE_RX0P PCIE_TX0P
AA28 2SCD1U6D3V1KX-GP
PEG_TXN0 AC31 AA27 PEG_1_RXN0 C296 1 2 SCD1U6D3V1KX-GP PEG_RXN0
PCIE_RX0N PCIE_TX0N
DIS
PEG_TXP1 AC29
PCIE_RX1P
P PCIE_TX1P
AA25 PEG_1_RXP1 C309 1 2 SCD1U6D3V1KX-GP PEG_RXP1
PEG_TXN1 AB29 AA24 PEG_1_RXN1 C305 1 2 SCD1U6D3V1KX-GP PEG_RXN1 PEG_TXP[15..0]
PCIE_RX1N C PCIE_TX1N PEG_TXP[15..0] 11
I
PEG_TXP2 AB31 Y28 PEG_1_RXP2 C283 1 2 SCD1U6D3V1KX-GP PEG_RXP2 PEG_TXN[15..0]
PEG_TXN2 PCIE_RX2P - PCIE_TX2P PEG_1_RXN2 C284 1 SCD1U6D3V1KX-GP PEG_RXN2
PEG_TXN[15..0] 11
AB30 Y27 2
PCIE_RX2N E PCIE_TX2N
PEG_RXP[15..0]
PEG_TXP3
X PEG_1_RXP3 PEG_RXP[15..0] 11
AA31 Y25 C288 1 2 SCD1U6D3V1KX-GP PEG_RXP3
PEG_TXN3 PCIE_RX3P P PCIE_TX3P PEG_1_RXN3 C295 1 SCD1U6D3V1KX-GP PEG_RXN3
AA30 Y24 2
PCIE_RX3N PCIE_TX3N PEG_RXN[15..0]
R PEG_RXN[15..0] 11
PEG_TXP4 W30
E V28 PEG_1_RXP4 C257 1 2 SCD1U6D3V1KX-GP PEG_RXP4
PCIE_RX4P PCIE_TX4P
PEG_TXN4 W31 PCIE_RX4N
S PCIE_TX4N V27 PEG_1_RXN4 C265 1 2 SCD1U6D3V1KX-GP PEG_RXN4
S
PEG_TXP5 W29 V25 PEG_1_RXP5 C278 1 2 SCD1U6D3V1KX-GP PEG_RXP5
PEG_TXN5 PCIE_RX5P PCIE_TX5P PEG_1_RXN5 C272 1 SCD1U6D3V1KX-GP PEG_RXN5
V29 I V24 2
PCIE_RX5N PCIE_TX5N
N
PEG_TXP6 V31 T T28 PEG_1_RXP6 C266 1 2 SCD1U6D3V1KX-GP PEG_RXP6
PEG_TXN6 PCIE_RX6P PCIE_TX6P PEG_1_RXN6 C268 1 SCD1U6D3V1KX-GP PEG_RXN6
V30 T27 2
PCIE_RX6N E PCIE_TX6N
C R C
PEG_TXP7 U31 T25 PEG_1_RXP7 C243 1 2 SCD1U6D3V1KX-GP PEG_RXP7
PEG_TXN7 U30
PCIE_RX7P F PCIE_TX7P
T24 PEG_1_RXN7 C240 1 2 SCD1U6D3V1KX-GP PEG_RXN7
PCIE_RX7N A PCIE_TX7N

PEG_TXP8
C PEG_1_RXP8 C231 1 SCD1U6D3V1KX-GP PEG_RXP8
P30 PCIE_RX8P PCIE_TX8P P28 2
PEG_TXN8 P31 E P27 PEG_1_RXN8 C228 1 2 SCD1U6D3V1KX-GP PEG_RXN8
PCIE_RX8N PCIE_TX8N

PEG_TXP9 P29 P25 PEG_1_RXP9 C181 1 2 SCD1U6D3V1KX-GP PEG_RXP9


PEG_TXN9 PCIE_RX9P PCIE_TX9P PEG_1_RXN9 C176 1 SCD1U6D3V1KX-GP PEG_RXN9
N29 PCIE_RX9N PCIE_TX9N P24 2

PEG_TXP10 N31 M28 PEG_1_RXP10 C227 1 2 SCD1U6D3V1KX-GP PEG_RXP10


PEG_TXN10 PCIE_RX10P PCIE_TX10P PEG_1_RXN10 C219 1 SCD1U6D3V1KX-GP PEG_RXN10
N30 M27 2
PCIE_RX10N PCIE_TX10N

PEG_TXP11 M31 M25 PEG_1_RXP11 C217 1 2 SCD1U6D3V1KX-GP PEG_RXP11


PEG_TXN11 PCIE_RX11P PCIE_TX11P PEG_1_RXN11 C213 1 SCD1U6D3V1KX-GP PEG_RXN11
M30 M24 2
PCIE_RX11N PCIE_TX11N

PEG_TXP12 K30 L28 PEG_1_RXP12 C167 1 2 SCD1U6D3V1KX-GP PEG_RXP12


PEG_TXN12 PCIE_RX12P PCIE_TX12P PEG_1_RXN12 C163 1 SCD1U6D3V1KX-GP PEG_RXN12
K31 L27 2
PCIE_RX12N PCIE_TX12N

PEG_TXP13 K29 L25 PEG_1_RXP13 C189 1 2 SCD1U6D3V1KX-GP PEG_RXP13


PEG_TXN13 PCIE_RX13P PCIE_TX13P PEG_1_RXN13 C194 1 SCD1U6D3V1KX-GP PEG_RXN13
J29 L24 2
PCIE_RX13N PCIE_TX13N

B PEG_TXP14 PEG_1_RXP14 C152 1 SCD1U6D3V1KX-GP PEG_RXP14 B


J31 J28 2
PEG_TXN14 PCIE_RX14P PCIE_TX14P PEG_1_RXN14 C146 1 SCD1U6D3V1KX-GP PEG_RXN14
J30 PCIE_RX14N PCIE_TX14N J27 2

PEG_TXP15 H31 G28 PEG_1_RXP15 C143 1 2 SCD1U6D3V1KX-GP PEG_RXP15


PEG_TXN15 PCIE_RX15P PCIE_TX15P PEG_1_RXN15 C139 1 SCD1U6D3V1KX-GP PEG_RXN15
H30 G27 2
PCIE_RX15N PCIE_TX15N

Clock Calibration
3 CLK_PCIE_GFX AD29
PCIE_REFCLKP PCIE_CALRN R1241 2KR2-GP
3 -CLK_PCIE_GFX AD30 AF25 2 1D1V_S0
PCIE_REFCLKN PCIE_CALRN
SM BUS AE25 PCIE_CALRP R1301 2
PCIE_CALRP 1K27R2F-L-GP
AC28
NC_SMBCLK
AC27
For Hybird 3D3V_S0 NC_SMBDATA
NC#AE23
AE23
AG25 AH30
PERST# NC#AH30

M82-S-GP
2

R?
10KR2J-3-GP

D?
1

27 GPIO_ATI_RST 2
A 3 BOM1 A

10,26,31,40,41,53 -PLT_RST 1

CHP222PT-U Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ATI M82-S(1/6):PCIE Interface


Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 20 of 53
5 4 3 2 1
5 4 3 2 1

U53B 2 OF 6
PART 2 OF 6
C276 1 2 SCD1U6D3V1KX-GP AJ4 AK9
25 HDMI_TX#C_ATI C277 SCD1U6D3V1KX-GP TXCM_DPA0P INTEGRATED TXCM_DPB0P
1 2 AJ5 AL9
25 HDMI_TXC_ATI TXCP_DPA0N TMDS/DP PORT TXCP_DPB0N
C292 1 2 SCD1U6D3V1KX-GP AL5 AJ9
25 HDMI_TXD#0_ATI C291 SCD1U6D3V1KX-GP TX0M_DPA1P TX0M_DPB1P
1 2 AK5 AJ10
25 HDMI_TXD0_ATI TX0P_DPA1N TX0P_DPB1N
C294 1 2 SCD1U6D3V1KX-GP AL6 AL10
25 HDMI_TXD#1_ATI C293 SCD1U6D3V1KX-GP TX1M_DPA2P TX1M_DPB2P
1 2 AK6 AK10
25 HDMI_TXD1_ATI TX1P_DPA2N TX1P_DPB2N
C289 1 2 SCD1U6D3V1KX-GP AK8 AL11
25 HDMI_TXD#2_ATI C290 SCD1U6D3V1KX-GP TX2M_DPA3P TX2M_DPB3P L15
1 2 AL8 AK11 R191
VDDR3 25 HDMI_TXD2_ATI TX2P_DPA3N TX2P_DPB3N

VDDR3 DY AL7 TPVDD 1 2 1D8V_S0 HDMI_HPD1 1 2 ATI_HDMI_HPD 25


DPA_PVDD

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

SC10U6D3V3MX-GP
2 10KR2J-3-GP PSYNC

SCD1U6D3V1KX-GP
1 AD9 AK7
DVALID DPA_PVSS

1
R122 C280 C254 BLM15BD121SN1D-GP 20KR2J-L2-GP

3
R403 1 2 10KR2J-3-GP GPIO_0 2 10KR2J-3-GP DVALID C279
D DY 1
R123
AE7
PSYNC_NEW DPB_PVDD
AE11 SCD01U10V1KX-1GP
R194 D8
D
AF11

2
R401 1 DPB_PVSS
DY 2 10KR2J-3-GP GPIO_1 R161 DY
AK4 AJ12 DPA_VDDR 100KR2J-1-GP MMBZ5222BPT-GP
DVPCNTL_MVP_0 DPA_VDDR
GPIO2 instand of TP AL3 AJ13

2
DVPCNTL_MVP_1 DPA_VDDR R416 L39

2
DY R105 1 2 10KR2J-3-GP GPIO_3 R148 R164 R162 V2 AK13 2 1
DVPCNTL_0 DPB_VDDR
V1 AL13 1 2 1D1V_S0
DVPCNTL_1 DPB_VDDR

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD01U25V2KX-3GP
DY R400 1 2 10KR2J-3-GP GPIO_4 W3 0R2J-2-GP
DVPCNTL_2

1
R147 R165 R163 R160 5V_S0 AL12 C663 C659 C282 BLM15BD121SN1D-GP

D
R397 1 GPIO_5 DPB_VSSR DPB_VDDR
DY 2 10KR2J-3-GP W1 AK12
Q13 DVPCLK DPB_VSSR
AJ11

2
2N7002-11-GP DPB_VSSR
Y1 AH9
DVPDATA_0 DPB_VSSR
GPIO6 instand of TP

SCD1U6D3V1KX-GP
G Y2 AH11
DVPDATA_1 DPB_VSSR R133 L40
Y3
DVPDATA_2
AA2 AJ8 2 1

1
R404 1 GPIO_8 DVPDATA_3 DPA_VSSR
2 10KR2J-3-GP AA3 AF7 1 2 1D1V_S0
DVPDATA_4 DPA_VSSR

SC10U6D3V3MX-GP
R439 AB1 AG7 0R2J-2-GP
DVPDATA_5 DPA_VSSR

1
R405 1 2 10KR2J-3-GP GPIO_9 100KR2J-1-GP C664 C657 BLM15BD121SN1D-GP
DY AB2
DVPDATA_6 DPA_VSSR
AJ7
AB3 AH7 SCD01U10V1KX-1GP
R396 1 GPIO_11 DVPDATA_7 DPA_VSSR IF HOT PLUG DETECT IS NOT REQUIRED C656
2 10KR2J-3-GP AC1 R128

2
DVPDATA_8 REMOVE ALL THIS LOGIC EXCEPT
AC3 AG11 1 2 150R2F-1-GP
R91 DVPDATA_9 DP_CALR FOR 100K PULL DOWN
DY 1 2 10KR2J-3-GP GPIO_12 AD1
DVPDATA_10 HDMI_HPD1
AD2 AA8
R395 1 GPIO_13 DVPDATA_11 EXT TMDS HPD1
2 10KR2J-3-GP AD3
DY For VGA_CORE_POWER strapping: AF3
DVPDATA_12 DVO
AL28 ATI_CRT_RED ATI_CRT_RED 18
VGA_ALERT# DVPDATA_13 R
1 2 AG3 AK28
R94 2K2R2J-2-GP DVPDATA_14 RB
AH3
R90 1 PWRCNTL_0 DVPDATA_15 ATI_CRT_GREEN
2 10KR2J-3-GP AG1 AL27
DY -SB modify AH2
DVPDATA_16 G
AK27 CLOSE TO PIN AK29
ATI_CRT_GREEN 18
R86 PWRCNTL_1 DVPDATA_17 GB
1 2 10KR2J-3-GP AH1
DY AJ3
DVPDATA_18
AL26
(ATI_CRT_HSYNC)
ATI_CRT_BLUE ATI_CRT_BLUE 18
DVPDATA_19 B
AJ1 AK26

1
R? MEM_ID2 MEM_ID2 DVPDATA_20 BB
1 2 10KR2J-3-GP Vout PWRCNTL_0 PWR_1 TP? TPAD30 AJ2 DAC1 / CRT R421 1 2 10KR2J-3-GP VDDR3
TP244 TPAD30 MEM_ID0 DVPDATA_21 R419 R418 R417
AK2 AK29 ATI_CRT_HSYNC 18
R414 1 MEM_ID0 MEM_ID1 DVPDATA_22 HSYNC
2 10KR2J-3-GP 0.9 1 1 TP245 TPAD30 AK3 AK30 ATI_CRT_VSYNC 18 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
DVPDATA_23 VSYNC 499R2F-2-GP
VDDR4 DIS DIS DIS
R415 1 2 10KR2J-3-GP MEM_ID1 1.0 1 0 AJ28 R145 1 2 50 ohm trace to filter

2
GPIO_0 RSET
Y4
GPIO_0
37.5 ohm trace to 150R resistor
R97 1 2 10KR2J-3-GP GPIO_19 0.9 0 1 GPIO_1 V3
GPIO_1 AVDD
AL29 L44
TP? TPAD30 GPIO_2 V4 CLOSE TO M82-S
C 1.1 0 0 GPIO_3 V5
GPIO_2
GPIO_3
GENERAL
AVSSQ
AH28 1 2 1D8V_S0 C

SC10U6D3V3MX-GP

SCD1U6D3V1KX-GP
GPIO_4 U3 PURPOSE
GPIO_4

1
GPIO_5 I/O C677 C655 C660 BLM15BD121SN1D-GP
U2 AJ27
TP? TPAD30 GPIO_6 GPIO_5 VDD1DI
For MEM strapping, Please use below table: T4
GPIO_6 SCD01U10V1KX-1GP
TPAD30
TP102 T5 AJ26

2
GPIO_8 GPIO_7_BLON VSS1DI
T7
TP93TPAD30 GPIO_9 GPIO_8_ROMSO
MEM_ID[0.1] Config FBS Vendor T8
GPIO_9_ROMSI R2
AL17
TP89TPAD30 GPIO_10 R1 AK17
00 16Mx32DDR3 64-bit Hynix GPIO_11 R2
GPIO_10_ROMSCK R2B L16
GPIO_11
01 16Mx32DDR3 64-bit Qimonda GPIO_12 R3
GPIO_12 G2
AL15
GPIO_13 P1 AK15 1 2
10 32Mx32GDDR3 Qimonda GPIO_13 G2B 1D8V_S0

SC10U6D3V3MX-GP

SCD1U6D3V1KX-GP
TP87TPAD30 GPIO_14_HPD2 P3

1
11 32Mx32GDDR3 SAMAUNG GPIO_14_HPD2 C300 C301 BLM15BD121SN1D-GP
N1 AL14
47 PWRCNTL_0 TP85 TPAD30 OSC_SPREAD GPIO_15_PWRCNTL0 DAC2 (TV/CRT2) B2 C302
N2 AK14 SCD01U10V1KX-1GP
1D8V_S0 VGA_ALERT# GPIO_16_SSIN B2B
P4

2
GPIO_17_THERMAL_INT L14
P7 AJ17
TP90TPAD30 GPIO_19 GPIO_18_HPD3 C
P8
1

GPIO_19_CTF

SC10U6D3V3MX-GP
P5 AJ15 DAC2_A2VDD 1 2 VDDR3
47 PWRCNTL_1 GPIO_20_PWRCNTL1 Y

SCD1U6D3V1KX-GP
R158 V7 C274 C298

1
24 BB_ENA GPIO_21_BB_EN

SC1000P50V2KX-1
499R2F-2-GP TPAD30 SCS# N3 AJ14 C287 BLM15BD121SN1D-GP
TP86 GPIO_22_ROMCSB COMP
Y5 1D8V_S0
GPIO_24_TRST GPIO_23_CLKREQB
Place Vref divider M4 AE16
2

2
TP84TPAD30 GPIO_25_TDI GPIO_24_JMODE V2SYNC
and cap close to asic M5 AF16
1

GPIO_25_TDI H2SYNC

SCD1U6D3V1KX-GP

SCD1U6D3V1KX-GP
TP88TPAD30 GPIO_26_TCK M7 C161 C273

1
R85 TP91TPAD30 GPIO_27_TMS GPIO_26_TCK C262 C245
M8 AH14

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
GPIO_27_TMS A2VDD
1

C238 L8
R157 1KR2J-1-GP GPIO_28_TDO
AH16

2
249R2F-GP SCD1U10V2KX-4GP TP97TPAD30 GENERICA A2VDDQ
Y8
2

TP95TPAD30 GENERICB GEN_A


Y7 AG16
GEN_B A2VSSQ VDDR3
V8
2

GEN_C
AH6 AF18 CLOSE TO M82S
GEN_D_HPD4 VDD2DI
AG6
GEN_E
AE18 R112 R120
MEM_VREFG VSS2DI
AC11

1
L17 VREFG DAC2_R2SETR169 1
AG14 2 715R3-GP
R2SET
SCD1U6D3V1KX-GP SCD1U6D3V1KX-GP

SC10U6D3V3MX-GP

4K7R2J-2-GP

4K7R2J-2-GP
SCD01U10V1KX-1GP SCD01U10V1KX-1GP

1 2 DPLL_PVDD AH12
1D8V_S0 DPLL_PVDD
AG12 AA5
1

BLM15BD121SN1D-GP C267 C308 C310 DPLL_PVSS SCL


AA4

2
PCIE_PVDD SDA
AH31
PCIE_PVDD SERIAL AJ29 ATI_DDC_DATA 18
2

B BUSES DDC1DATA AH29 B


PLL & DDC1CLK ATI_DDC_CLK 18
1 2 L4 MPVDD A9
VGA_CORE_S0 MPVDD XTAL
L18 BLM15BD121SN1D-GP B9 AC5
MPVSS DDC2DATA ATI_EDID_DATA 17
AC4 ATI_EDID_CLK 17
DPLL_VDDC DDC2CLK
1D8V_S0 1 2 AE12
DPLL_VDDC
SC10U6D3V3MX-GP

AF4 ATI_HDMI_SDATA 25
DDC3DATA_DP3_AUXN
1

BLM15BD121SN1D-GP C311 C312 C313 AJ31 AH4 ATI_HDMI_SCLK 25


3 VGA_27M XTALIN DDC3CLK_DP3_AUXP
AJ30 AF9
2

XTALOUT DDC4DATA_DP4_AUXN
AG9
DDC4CLK_DP4_AUXP
AE14
TEST TS_FDO
AH26
TESTEN THERMAL
L38 AE5
DPLUS ATI_VGA_G792_P 7
SCD1U6D3V1KX-GP

AD12 AE4 ATI_VGA_G792_N 7


1

PLLTEST DMINUS
SCD01U10V1KX-1GP

1D8V_S0 1 2
SC10U6D3V3MX-GP
1

BLM15BD121SN1D-GP C242 C635 C637 R142 M82-S-GP

1KR2J-1-GP
2

R?
1 2

1MR2J-1-GP

X? P1819B
3 2
SRS: 0: -1.25% down spread
1: -1.75% down spread
4 1

XTAL-27MHZ-27-GPU
SC1D5P50V2CN-1GP
1

A A
SC1D5P50V2CN-1GP

C? C?
2

MPVDD
SC1U10V2KX-1GP

BOM1
SCD1U6D3V1KX-GP
1

C121 C126

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
ATI M82-S(2/6):CRT/HDMI
Size Document Number Rev
Pls place these capacitors as close to as U14 MPVDD Pin. A2 Olympus SB
Date: Wednesday, December 26, 2007 Sheet 21 of 53
5 4 3 2 1
5 4 3 2 1

U53C 3 OF 6

Part 3 of 6
RASA0#
19 RASA0# RASA1# MDA0 MAA0
19 RASA1# E29 DQ_0 MA_0 B14
MDA1 E30 A14 MAA1
CASA0# MDA2 DQ_1 MA_1 MAA2
D
19 CASA0# E31 DQ_2 MA_2 B13 D
CASA1# MDA3 D31 E14 MAA3
19 CASA1# MDA4 DQ_3 MA_3 MAA4
C29 B17
W EA0# MDA5 B29
DQ_4 MEMORY MA_4
A17 MAA5
19 W EA0# W EA1# MDA6 DQ_5 MA_5 MAA6
19 W EA1# MDA7
B30
A29
DQ_6 INTERFACE MA_6 C15
G16 MAA7
CKEA0 MDA8 DQ_7 MA_7 MAA8
19 CKEA0 E26 DQ_8 MA_8 E16
CKEA1 MDA9 D26 C14 MAA9
19 CKEA1 MDA10 DQ_9 MA_9 MAA10
E25 DQ_10 MA_10
A12
CSA0_0# MDA11 D25 B12 MAA11
19 CSA0_0# CSA1_0# MDA12 DQ_11 MA_11 BA0
19 CSA1_0# G23 DQ_12 MA_BA0
C12
CSA0_1# MDA13 G21 D14 BA1
19 CSA0_1# CSA1_1# MDA14 DQ_13 MA_BA1 MAA12
19 CSA1_1# E21 DQ_14 MA_A12
B15
MDA15 D21 G14 BA2
MDA16 DQ_15 MA_BA2
C28 DQ_16
MDA17 B28 D30 DQMA#0
CLKA0 MDA18 DQ_17 DQMB_0 DQMA#1
19 CLKA0 B27 DQ_18 DQMB_1 G25
CLKA0# MDA19 A27 C26 DQMA#2
19 CLKA0# MDA20 DQ_19 DQMB_2 DQMA#3
C25 DQ_20 DQMB_3 C21
CLKA1 MDA21 A25 C5 DQMA#4
19 CLKA1 CLKA1# MDA22 DQ_21 DQMB_4 DQMA#5
19 CLKA1# C24 DQ_22 DQMB_5 D6
MDA23 B24 D2 DQMA#6
W DQSA[7..0] MDA24 DQ_23 DQMB_6 DQMA#7
19 W DQSA[7..0] C23 DQ_24 DQMB_7 K3
MDA25 B23
RDQSA[7..0] MDA26 DQ_25 RDQSA0
19 RDQSA[7..0]
A23 DQ_26 QS_0 C30
MDA27 B22 D23 RDQSA1
DQMA#[7..0] MDA28 DQ_27 QS_1 RDQSA2
19 DQMA#[7..0] C20 DQ_28 QS_2 B26
MDA29 B20 B21 RDQSA3
MDA[63..0] MDA30 DQ_29 QS_3 RDQSA4
19 MDA[63..0] A20 DQ_30 QS_4 B6

read strobe
C MDA31 C19 E7 RDQSA5 C
MAA[11..0] MDA32 DQ_31 QS_5 RDQSA6
19 MAA[11..0] C8 DQ_32 QS_6 E2
MDA33 C7 J2 RDQSA7
MDA34 DQ_33 QS_7
B7 DQ_34
MDA35 A7 C31 W DQSA0
BA0 MDA36 DQ_35 QS_0# W DQSA1
19 BA0 A5 DQ_36 QS_1# E23
BA1 MDA37 C4 A26 W DQSA2

write strobe
19 BA1 DQ_37 QS_2#
BA2 MDA38 B4 A21 W DQSA3
19 BA2 DQ_38 QS_3#
MAA12 MDA39 A3 A6 W DQSA4
19 MAA12 DQ_39 QS_4#
MDA40 G9 D7 W DQSA5
MDA41 DQ_40 QS_5# W DQSA6
E9 E1
MDA42 DQ_41 QS_6# W DQSA7
D9 J1
MDA43 DQ_42 QS_7#
G7
MDA44 DQ_43 ODTA0
G5 E20
1D8V_S0 MDA45 DQ_44 ODT0 ODTA1 TP76 TPAD30
F5 C11
MDA46 DQ_45 ODT1 TP77 TPAD30
G4
MDA47 DQ_46 CLKA0
F4 A18
DQ_47 CLK0
1

MDA48 B3 A11 CLKA1


R381 MDA49 DQ_48 CLK1
B2
40D2R2F-GP MDA50 DQ_49 CLKA0#
C2 B18
MDA51 DQ_50 CLK0# CLKA1#
C1 B11
MDA52 DQ_51 CLK1#
E3
2

MDA53 DQ_52 RASA0# FOR DUAL RANK CONNECTIONS


F3 G20
MDA54 DQ_53 RAS0# RASA1# USE THE CSxB_1 CHIP SELECT PINS
F2 D12
MVREFD MDA55 DQ_54 RAS1#
F1
1D8V_S0 MDA56 DQ_55 CASA0#
PLACE MVREF DIVIDERS G2
DQ_56 CAS0#
D20
1

R383 MDA57 G1 E12 CASA1#


DQ_57 CAS1#
1

AND CAPS CLOSE TO ASIC C564 MDA58 H3


100R2F-L1-GP-U SCD1U10V2KX-4GP MDA59 DQ_58 CSA0_0#
H2 E18
DQ_59 CS0B_0
1

B MDA60 CSA0_1# B
K2 G18
2

R374 MDA61 DQ_60 CS0B_1


DIVIDER RESISTORS DDR2 DDR3 L3
2

40D2R2F-GP MDA62 DQ_61 CSA1_0#


L2 G11
MDA63 DQ_62 CS1B_0 CSA1_1#
L1 E11
DQ_63 CS1B_1
MVREF TO 1.8V 100R 40.2R
2

F30 D18 CKEA0


MVREFS MVREFD CKE0 CKEA1
F31 G12
MVREFS CKE1
MVREF TO GND 100R 100R W EA0#
D16
WE0#
1

R378 TEST_MCLK L5 C10 W EA1#


TEST_MCLK WE1#
1

C555 TEST_YCLK L7
100R2F-L1-GP-U SCD1U10V2KX-4GP MEMTEST TEST_YCLK
J7 MEMTEST DRAM_RST# J5
MEM_RST 19
2
2

M82-S-GP R82 1 2 4K7R2F-GP 1D8V_S0


R84 R83 R80
4K7R2F-GP

4K7R2F-GP

243R3F-GP
2

A BOM1 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ATI M82-S(3/6):Memory Interface
Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 22 of 53
5 4 3 2 1
5 4 3 2 1

U53E 5 OF 6 1D8V_S0
Part 5 of 6 1D8V_S0

B25
VSS

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
AA26 J8
PCIE_VSS VSS
AA29 B5
PCIE_VSS VSS

SC10U6D3V3MX-GP

SC1U6D3V2ZY-GP
AC26 D11 C119 C531 C260 C133 U53D 4 OF 6

SCD1U6D3V1KX-GP
PCIE_VSS VSS C160 C271 C259 C546 1D8V_S0
AD31 PCIE_VSS VSS C17

1
AE29 C22 PART 4 OF 6 C510 C514

2
PCIE_VSS VSS C269
AE30 C27
PCIE_VSS VSS
AE31 D29 A15 AF30

2
PCIE_VSS VSS VDDR1 PCIE_VDDR
F28 C3 A22 AF31
PCIE_VSS VSS VDDR1 PCIE_VDDR
G26 C6 A28 AF29
PCIE_VSS VSS VDDR1 PCIE_VDDR
D G29 D3 A4 AF27 D
PCIE_VSS VSS VDDR1 PCIE_VDDR

PCI-Express GND
G30 D28 A8 AF28
PCIE_VSS VSS VDDR1 PCIE_VDDR
G31 F29 B8 AG29
PCIE_VSS VSS VDDR1 PCIE_VDDR
H29 D4 C9 AG30
PCIE_VSS VSS VDDR1 PCIE_VDDR

Memory I/O
J25 F11 D1 AG31 1D1V_S0
PCIE_VSS VSS VDDR1 PCIE_VDDR
J26 F12 H1
PCIE_VSS VSS VDDR1

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
L26 F14 H11 AA23
PCIE_VSS VSS VDDR1 PCIE_VDDC
L29 F16 H12 AC24
PCIE_VSS VSS VDDR1 PCIE_VDDC

1
L30 F18 H14 AC25
PCIE_VSS VSS VDDR1 PCIE_VDDC

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
L31 F20 C545 C124 C554 C120 C97 C547 C535 C77 H16 AE26

SCD1U6D3V1KX-GP
PCIE_VSS VSS VDDR1 PCIE_VDDC C241
M26 F21 H18 AE27

2
PCIE_VSS VSS VDDR1 PCIE_VDDC

1
M29 F23 H20 AE28 C218 C247 C180 C207
PCIE_VSS VSS VDDR1 PCIE_VDDC
P26 F25 H21 L23

PCI-Express
PCIE_VSS VSS VDDR1 PCIE_VDDC
R29 F7 B31 M23

2
PCIE_VSS VSS VDDR1 PCIE_VDDC VGA_CORE_S0
R30 PCIE_VSS VSS F9 M1 VDDR1 PCIE_VDDC P23
R31 G3 T23
PCIE_VSS VSS PCIE_VDDC
T26 PCIE_VSS VSS G6 AA9 VDD_CT PCIE_VDDC V23
U29 H23 Y9 Y23
PCIE_VSS VSS VDD_CT PCIE_VDDC

SC10U6D3V3MX-GP
V26 J3 V9
PCIE_VSS VSS VDD_CT

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
Y26 J4 L11 T9
PCIE_VSS VSS VDD_CT VDD_CT
Y29 J6 1D8V_S0 1 2 J11 L11
PCIE_VSS VSS VDD_CT VDDC

SCD1U10V2KX-4GP

SC10U6D3V3MX-GP

SC1000P50V2KX-1
Y30 K1 C151 J20 L14

1
PCIE_VSS VSS BLM15BD121SN1D-GP C223 C225 VDD_CT VDDC C193 C199 C203
Y31 L12 J21 L17
PCIE_VSS VSS VDD_CT VDDC

1
VSS L15 L9 VDD_CT VDDC L20
L18 M12

2
VSS VDDC
L21 M15

2
VSS VDDC
VSS L6 AC18 VDDR3 VDDC M18

I/O Internal
A13 VSS VSS M11 AC16 VDDR3 VDDC M21

SC10U6D3V3MX-GP SC10U6D3V3MX-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
A2 VSS VSS M14 AC14 VDDR3 VDDC AC20
C C18 M17 VDDR3 AC12 P14 C
VSS VSS VDDR3 VDDC
A24 VSS VSS M20 VDDC P17

1
A30 M6 AF1 P20 C216 C170 C156 C185
AA1
VSS VSS
P12 AF2
VDDR4 P VDDC
R12
VSS VSS VDDR4 VDDR4 VDDC
AA11 P15 L54 O R15

2
VSS VSS VDDC

Core
AA14 P18 1D8V_S0 1 2 VDDR4 C629 AE1 R18
VSS VSS VDDR5 VDDC
W

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC10U6D3V5MX-3GP
AA17 P21 C246 AE2 R21

SCD1U6D3V1KX-GP
VSS VSS VDDR5 VDDC

1
AA20 P6 BLM15BD121SN1D-GP C256 C624 C627 AD20
VSS VSS E VDDC

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
AA6 AC21 U14

SCD1U6D3V1KX-GP SCD1U6D3V1KX-GP
VSS VSS VDDC
AC2 R14 U17
R

1
VSS VSS VDDC C210 C186 C165 C239
AC7 R17 M2 U20
VSS VSS RSVD#M2 VDDC
AE3 R20 M3 V12
VSS VSS RSVD#M3 VDDC
AL4 T6 L4 V15

2
VSS VSS RSVD#L4 VDDC
AD14 U1 AD11 V18
VSS VSS RSVD#AD11 VDDC
AF12 U12 V21
VSS VSS L6 C106 VDDC
AF14 U15 Y11
VSS VSS VDDC

SC10U6D3V3MX-GP
AD16 U18 1D8V_S0 1 2 A10 Y14
VSS VSS VDDRH VDDC
SC1U6D3V2ZY-GP

AD18 U21 A19 Y17

SCD1U6D3V1KX-GP
VSS VSS
1

1
VDDRH VDDC

Clock
I/O
Memory

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
AE6 AE20 BLM15BD121SN1D-GP C104 C122 Y20
VSS VSS VDDC

1
AG2 V14 AA12 C697 C187 C171 C173
VSS VSS VDDC
AE9 V17 B10 AA15
2

2
VSS VSS VSSRH VDDC
AH25 V20 B19 AA18

2
VSS VSS VSSRH VDDC
AK1 P2 AA21
VSS VSS VDDC
AK31 V6 P9
VSS VSS VDDC
AJ6 W2
VSS VSS
AL2 Y12 VSSBBN V11
VSS VSS BBN

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP

SC1U6D3V2ZY-GP
Back Bias
AL30 Y15 C197 C205 U11 J12
VSS VSS BBN VDDCI
1

1
B1 Y18 SC1U6D3V2ZY-GP SC1U6D3V2ZY-GP J14 C222 C234 C224 C235
VSS VSS VDDCI
C13 Y21 J16
B VSS VSS VDDCI B
Y6 R11 J18
2

2
VSS BBP VDDCI
M9 P11
VSS BBP
VCCBBP
C190 C174
CORE GND
1

1
SC1U6D3V2ZY-GP SC1U6D3V2ZY-GP M82-S-GP
M82-S-GP
2

SC1U6D3V2ZY-GP
3D3V_S0
VDDR3
Q3

1
C155

2
D S
1

R171
G

FDN304P-1-GP 100KR2J-1-GP
2

RUNPW ROK_3V3
D

A
Q4 BOM1 A
R172 2N7002-NL-1-GP
50 ATI_PROK 1 2 RUNPW ROK_1 G

51KR2-GP Wistron Corporation


S
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


C326 Taipei Hsien 221, Taiwan, R.O.C.
SCD1U10V2KX-4GP
2

Title

ATI M82-S(4-5/6):VCC/GND
Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 23 of 53
5 4 3 2 1
5 4 3 2 1

1D8V_S0

2
L43
BLM15BD121SN1D-GP

1
LVDDR

SCD1U6D3V1KX-GP

SCD1U6D3V1KX-GP

SC10U6D3V3MX-GP
D D
C671
671 C249
249 10KR2J-3-GP 2 1 R595

1
2C

2C
1D8V_S0 C676
U53F 6 OF 6

2
PART 6 OF 6
2

L19 AF20 AA7


BLM15BD121SN1D-GP LVDDR VARY_BL DIS_BLON_IN 17,38
AG20
LVDDR Control AC6
DIGON PANEL_POWER_ON_D 17
LVDDC AJ18 LVDS channel
1

LVDDC
AH20 AD21
LVDDC TXCLK_UP
AE21
SCD1U6D3V1KX-GP

SCD1U6D3V1KX-GP

TXCLK_UN
SC10U6D3V3MX-GP AJ24
C261
261 C316
316 TXOUT_U0P
AJ23
TXOUT_U0N
1
2C

2C

C317 AF23 AK24


LVSSR TXOUT_U1P
AF21 AL24
LVSSR TXOUT_U1N
AL18 AG21
1

LVSSR TXOUT_U2P
AJ22 AH21
LVSSR TXOUT_U2N
AJ25 AG23
LVSSR TXOUT_U3P
AK18 AH23
1D8V_S0 LVSSR TXOUT_U3N
AK23
LVSSR
AK25 AL19
LVSSR TXCLK_LP ATI_TXACLK+ 17
2

AJ21 AK19
L41 LVSSR TXCLK_LN ATI_TXACLK- 17
AL23 AJ20
BLM15BD121SN1D-GP LVSSR TXOUT_L0P ATI_TXAOUT0+ 17
AL25 AJ19
LVSSR TXOUT_L0N ATI_TXAOUT0- 17
AK20
TXOUT_L1P ATI_TXAOUT1+ 17
AL20
TXOUT_L1N ATI_TXAOUT1- 17
C AK21 C
1

TXOUT_L2P ATI_TXAOUT2+ 17
AL21
LPVDD TXOUT_L2N ATI_TXAOUT2- 17
AG18 AK22
LPVDD TXOUT_L3P
SCD1U6D3V1KX-GP

C669 AH18 AL22


SC10U6D3V3MX-GP

LPVSS TXOUT_L3N
SCD01U10V1KX-1GP
1

C253
C665 M82-S-GP
2

1D8V_S0
VCCBBP L51 VGA_CORE_S0
1

1 2
R449 BLM15BD121SN1D-GP
1

21R3F-GP
DY Q16 C702 Q15
FDN304P-1-GP SC1U6D3V2KX-GP FDN359BN-GP
R454DY R450
2

2 1APL431 2 1 APL431_1V8 S D D S

1KR2F-3-GP 221R2F-2-GP DY
G

G
1

DY
B 3 2 B
DY
D7
APL431LBAC-1-GP 5V_S0 1 2 MAX1673_5V
DY R448 100KR2J-1-GP
DY
D

Q14 R443
2SK3019-N-2GP 1MR2J-1-GP
G DY DY
2

3D3V_S0
S
SC10U6D3V3MX-GP

C694
R444
100KR2F-L1-GP VSSBBN
DY
2

BB_ENA MAX1673_CAP+ DY
21 BB_ENA R440
DY
2
1

MAX1673_FB 1 2
C329 U17
SC2D2U16V3KX-GP 17K4R2F-GP
2

1 8
LIN/SKIP# IN
2 7
CAP+ GND
MAX1673_CAP- 3 6
CAP- FB
A 4 5 BOM1 A
SHDN# OUT
1

C691
R442 MAX1673ESA-T-GP R441
DY 10KR2J-3-GP 0R2J-2-GP Wistron Corporation
SC10U6D3V3MX-GP
2

DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DY Taipei Hsien 221, Taiwan, R.O.C.
2

Title
ATI M82-S(6/6):LVDS
Size Document Number Rev
Custom SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 24 of 53
5 4 3 2 1
5 4 3 2 1

3D3V_S0
L =>B0 -UMA
D
H =>B1 -ATI 5V_HDMI_S0 5V_S0 D

U117 D17

21 ATI_HDMI_HPD 1 B1 S 6 1 2
2 GND VCC 5
27 UMA_HDMI_HPD 3 4 HDMI_HPD
B0 A CH751H-40PT
R182R181
NC7SB3157P6X-1GP

2K2R2J-2-GP

2K2R2J-2-GP
1

1
2

2
17,18,26,38 DISCRETE_ENABLE HDMI_SCLK_C 1 DIS 2 ATI_HDMI_SCLK 21
R452 0R2J-2-GP

HDMI_SDATA_C 1 DIS 2 ATI_HDMI_SDATA 21


R455 0R2J-2-GP

C C

21 HDMI_TXD0_ATI HDMI_TXD0_M 53

RN54 EMI SOLUTION


1 4
2 3

SRN0J-6-GP 3D3V_S0
3D3V_S0 3D3V_S5 3D3V_LAN_S5

C356 C730

1
21 HDMI_TXD#0_ATI HDMI_TXD#0_M 53 C318 C325
C90 C354 C735 C43 C13 C117

SC100P50V2JN-3GP

SC100P50V2JN-3GP
2

2
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
21 HDMI_TXD1_ATI HDMI_TXD1_M 53
5V_HDMI_S0
RN55 EMI SOLUTION
1 4
2 3 DY DY DY DY DY DY DY DY DY DY
-SB ADD
SRN0J-6-GP

SC100P50V2JN-3GP
SCD1U10V2KX-4GP
1

1
C1010 C327
B B

HDMI CONN
2

2
21 HDMI_TXD#1_ATI HDMI_TXD#1_M 53

HDMI1

21 HDMI_TXD2_ATI HDMI_TXD2_M 53 18 15
+5V_POWER SCL HDMI_SCLK_C 53
16 HDMI_SDATA_C 53
SDA
RN?
1 4 7
TMDS_DATA0+
2 3 53 HDMI_TXD0_M 9 13 HDMI_CEC TPAD34 TP111
53 HDMI_TXD#0_M TMDS_DATA0- CEC
4 17
53 HDMI_TXD1_M TMDS_DATA1+ DDC/CEC_GROUNG
SRN0J-6-GP 6 19 HDMI_HPD 38,53
53 HDMI_TXD#1_M TMDS_DATA1- HOT_PLUG_DETECT
1
53 HDMI_TXD2_M TMDS_DATA2+ HDMI_CNC TPAD34 TP115
3 14
53 HDMI_TXD#2_M TMDS_DATA2- RESERVED#14
8
TMDS_DATA0_SHIELD
5
21 HDMI_TXD#2_ATI HDMI_TXD#2_M 53 TMDS_DATA1_SHIELD
2
TMDS_DATA2_SHIELD
20
GND
11 21
TMDS_CLOCK_SHIELD GND
10 22
53 HDMI_TXC_M TMDS_CLOCK+ GND
12 23
21 HDMI_TXC_ATI HDMI_TXC_M 53 53 HDMI_TX#C_M TMDS_CLOCK- GND

SKT-HDMI19P-20-GP 22.10296.051
RN?
A 1 4 BOM1 A
2 3

SRN0J-6-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21 HDMI_TX#C_ATI HDMI_TX#C_M 53 Title

HDMI CONN
Size Document Number Rev
A3 Olympus
SB
Date: W ednesday, December 26, 2007 Sheet 25 of 53
5 4 3 2 1
5 4 3 2 1

3D3V_S0

1
2 OF 6
32 PCI_AD[0..31]

10KR2J-3-GP
U24B R?
PCI_AD0 D11
AD0 REQ0#
F1 PCI_REQ#0 32 HYPER-DIS
For Hybird
PCI_AD1 C8
PCI_AD2 D9
AD1 PCI GNT0#
G4
B6 PCI_REQ#1
PCI_GNT#0 32

2
PCI_AD3 AD2 REQ1#/GPIO50 PCI_GNT#1 TP211
E12 A7
3D3V_S0 PCI_AD4 AD3 GNT1#/GPIO51 PCI_REQ#2
E9 F13 2 1 DISCRETE_ENABLE 17,18,25,38
PCI_AD5 AD4 REQ2#/GPIO52 PCI_GNT#2 R1008 0R2J-2-GP
C9 F12
PCI_AD6 AD5 GNT2#/GPIO53 PCI_REQ#3 TP287
E10 E6
PCI_AD7 B7
AD6 REQ3#/GPIO54
F6 PCI_GNT#3 TP312 DY
PCI_AD8 AD7 GNT3#/GPIO55 TP285
RN44 C7
AD8

1
1 8 PCI_LOCK# PCI_AD9 C5 D8 PCI_C/BE#0 32 R?
D AD9 C/BE0# D

10KR2J-3-GP
2 7 PCI_IRDY# PCI_AD10 G11 B4 PCI_C/BE#1 32 DIS ENABLE ->H
PCI_AD11 AD10 C/BE1#
3 6 F8 D6 PCI_C/BE#2 32
AD11 C/BE2#
4 5 PM_CLKRUN# PM_CLKRUN# 27,32,38 PCI_AD12
PCI_AD13
F11
AD12 C/BE3#
A5 PCI_C/BE#3 32 HYPER-UMA UMA ENABLE ->L
E7

2
PCI_AD14 AD13
SRN8K2J-4-GP A3 D3 PCI_IRDY# 32
PCI_AD15 AD14 IRDY#
D2 E3 PCI_PAR 32
PCI_AD16 AD15 PAR PCIRST#
RN29 F10 R1
INT_PIRQB# PCI_AD17 AD16 PCIRST#
1 8 D5 C6 PCI_DEVSEL# 32
INT_PIRQG# PCI_AD18 AD17 DEVSEL#
2 7 D10 E4 PCI_PERR# 32
PCI_REQ#0 PCI_AD19 AD18 PERR# PCI_LOCK#
3 6 B3 C2
INT_PIRQH# PCI_AD20 AD19 PLOCK#
4 5 F7 J4 PCI_SERR# 32
PCI_AD21 AD20 SERR#
C3 A4 PCI_STOP# 32
SRN8K2J-4-GP PCI_AD22 AD21 STOP#
F3 F5 PCI_TRDY# 32
PCI_AD23 AD22 TRDY#
RN45 F4 D7 PCI_FRAME# 32
PCI_AD24 AD23 FRAME#
1 8 C1
PCI_REQ#3 PCI_AD25 AD24 PLTRST#
2 7 G7 C14
PCI_DEVSEL# PCI_AD26 AD25 PLTRST#
3 6 H7 D4 CLK_PCI_ICH 3
PCI_REQ#1 PCI_AD27 AD26 PCICLK
4 5 D1 R2 ICH_PME# 32
PCI_AD28 AD27 PME#
G5
PCI_AD29 AD28
SRN8K2J-4-GP H6
PCI_AD30 AD29
G1
PCI_AD31 AD30
RN46 H3
INT_PIRQC# AD31
1 8
PCI_FRAME#
2
3
7
6 PCI_PIRQC# INT_PIRQA# J5
Interrupt I/F H4 PCI_PIRQA#
PIRQA# PIRQE#/GPIO2 PCI_PIRQA# 32
4 5 PCI_REQ#2 INT_PIRQB# E1 K6 PCI_PIRQC# PCI_PIRQC# 32
INT_PIRQC# PIRQB# PIRQF#/GPIO3 INT_PIRQG# 3D3V_S0
J6 F2
INT_PIRQD# PIRQC# PIRQG#/GPIO4 INT_PIRQH#
SRN8K2J-4-GP C4
PIRQD# PIRQH#/GPIO5
G2 -SB verify
RN50 ICH9M-GP-NF
1 8 PCI_PERR#
2 7 PCI_TRDY# U100
3 6 PCI_STOP# PCIRST# 1 6
INT_PIRQD# B VCC
4 5
2 5
A NC#5
SRN8K2J-4-GP
RN49 3 4 -PCI_RST 32,35,38,51,53
GND Y
C 1 8 PCI_SERR# C
2 7 PCI_PIRQA# 74LVC1G08GM-GP
3 6 INT_PIRQA#
4 5

SRN8K2J-4-GP
U101
PLTRST# 1 6
B VCC
2 5
A NC#5
3 4 -PLT_RST 10,20,31,40,41,53
GND Y
74LVC1G08GM-GP

Close to ICH9M 4 OF 6
3D3V_S5 U24D
35 GLAN_RXN N29 V27 DMI_RXN0 10
PERN1 DMI0RXN

Direct Media Interface


35 GLAN_RXP N28 V26 DMI_RXP0 10
C399 SCD1U16V2KX-3GP2 GLAN_TXN_C PERP1 DMI0RXP
1 P27 U29
LAN 35
35
GLAN_TXN
GLAN_TXP C394 SCD1U16V2KX-3GP2 1 GLAN_TXP_C P26
PETN1 DMI0TXN
U28
DMI_TXN0 10
DMI_TXP0 10
4
3

PETP1 DMI0TXP
RN26 40,53 PCIE_RXN2 L29 Y27 DMI_RXN1 10
PERN2 DMI1RXN
SRN10KJ-5-GP L28 Y26
MINI I/O II 40,53 PCIE_RXP2
40,53 PCIE_TXN2 C387 SCD1U10V2KX-5GP 2 1 TXN2 M27
PERP2
PETN2
DMI1RXP
DMI1TXN
W29
DMI_RXP1 10
DMI_TXN1 10
40,53 PCIE_TXP2 C386 SCD1U10V2KX-5GP 2 1 TXP2 M26 W28 DMI_TXP1 10
PETP2 DMI1TXP
1
2

J29 AB27 3D3V_S5


B 3D3V_S5 40,53 PCIE_RXN1 PERN3 DMI2RXN DMI_RXN2 10 B
ICH_SPI_HOLD# ICH_SPI_WP# J28 AB26 SRN10KJ-6-GP
MINI I/O I

PCI-Express
ICH_SPI_WP# 38 40,53 PCIE_RXP1 PERP3 DMI2RXP DMI_RXP2 10 RN28
C384 SCD1U10V2KX-5GP 2 1 TXN1 K27 AA29
40,53 PCIE_TXN1 PETN3 DMI2TXN DMI_TXN2 10
40,53 PCIE_TXP1 C385 SCD1U10V2KX-5GP 2 1 TXP1 K26 AA28 DMI_TXP2 10 USB_OC#8 8 1
PETP3 DMI2TXP USB_OC#4
U23 7 2
G29 AD27 USB_OC#5 6 3
41,53 PCIE_RXN3 PERN4 DMI3RXN DMI_RXN3 10 1D5V_S0
ICH_SPI_CS0# 1 8 150R2J-L1-GP-U 41,53 PCIE_RXP3 G28 AD26 DMI_RXP3 10 USB_OC#9 5 4
ICH_SPI_MISO CS# VCC ICH_SPI_HOLD# TXN3 PERP4 DMI3RXP
1 2 2 7 C388 SCD1U10V2KX-5GP 2 1 H27 AC29
ER2 15R2J-GP ICH_SPI_WP# 3
DO HOLD#
6 1 2 NEW COARD
ICH_SPI_CLK
41,53 PCIE_TXN3
41,53 PCIE_TXP3 C389 SCD1U10V2KX-5GP 2 1 TXP3 H26
PETN4 DMI3TXN
AC28
DMI_TXN3 10
DMI_TXP3 10

1
WP# CLK ER1 ICH_SPI_MOSI PETP4 DMI3TXP
4 5
GND DIO R219
DY E29 T26 -CLK_PCIE_ICH 3
1

PERN5 DMI_CLKN
SC47P50V2JN-3GP

EC3 E28 T25 24D9R2F-L-GP


PERP5 DMI_CLKP CLK_PCIE_ICH 3
W25X16VSSIG-GP DY F27
1

EC2 EC1 PETN5 USB_OC#10


F26 AF29 1 8
2

2
PETP5 DMI_ZCOMP
AF28 DMI_IRCOMP_R USB_OC#3 2 7
DMI_IRCOMP
SC4D7P50V2CN-1GP

SC47P50V2JN-3GP

C29 USB_OC#11 3 6
2

PERN6/GLAN_RXN USB_OC#6
MAIN SOURCE:72.25X16.001 C28
PERP6/GLAN_RXP USBP0N
AC5 USB_PN0 42,53 4 5
SECOND SOURCE:72.25165.001
D27
PETN6/GLAN_TXN USBP0P
AC4 USB_PP0 42,53 USB JACK0
D26 AD3
PETP6/GLAN_TXP USBP1N
AD2 SRN10KJ-6-GP RN27
ICH_SPI_CLK R560 1 USBP1P
2 15R2J-GP D23 AC1 USB_PN2 42,53
ICH_SPI_CS0# R574 1 SPI_CLK USBP2N
2 15R2J-GP D24 AC2 USB_PP2 42,53 USB JACK2
ICH_SPI_CS#1 R557 1 SPI_CS0# USBP2P
2 15R2J-GP F23 AA5 R228
SPI_CS1#/GPIO58/CLGPIO6 USBP3N USB_OC#7
DY USBP3P
AA4 2 1
ICH_SPI_MOSI R210 1 2 15R2J-GP SPI_MOSI_R D25 AB2 10KR2J-3-GP
SPI_MOSI USBP4N

SPI
ICH_SPI_MISO SPI_MISO E23 AB3 R1007
SPI_MISO USBP4P USB_OC#1
AA1 USB_PN5_BT 39,53 2 1
USBP5N 10KR2J-3-GP
42 USB_OC#0 N4
OC0#/GPIO59 USBP5P
AA2 USB_PP5_BT 39,53 BT
USB_OC#1 N5 W5
OC1#/GPIO40 USBP6N
BOOT BIOS Strap 42 USB_OC#2 N6
OC2#/GPIO41 USB USBP6P
W4
USB_OC#3 P6 Y3
OC3#/GPIO42 USBP7N USB_PN7_MINI 40,53
PCI_GNT#0 SPI_CS#1 BOOT BIOS Location USB_OC#4 M1 Y2 USB_PP7_MINI 40,53 MINI Port1
OC4#/GPIO43 USBP7P
USB_OC#5 N2 W1 USB_PN8_CCD 17,53
OC5#/GPIO29 USBP8N
0 1 SPI USB_OC#6 M4 W2 USB_PP8_CCD 17,53 CAMERA
USB_OC#7 OC6#/GPIO30 USBP8P
1 0 PCI M3
OC7#/GPIO31 USBP9N
V2 USB_PN9_NEWCARD 41,53
1 1 LPC(Default) USB_OC#8 N3 V3 NEWCARD
OC8#/GPIO44 USBP9P USB_PP9_NEWCARD 41,53
A16 swap override strap USB_OC#9 N1 U5
USB_OC#10 OC9#/GPIO45 USBP10N
P5 U4
USB_OC#11 OC10#/GPIO46 USBP10P
A low = A16 swap override enable P3 U1 A
OC11#/GPIO47 USBP11N
PCI_GNT#3 high = default R211 USBP11P
U2
USB_RBIAS_PN AG2
PCI_GNT#0 USBRBIAS
1 DY1KR2J-1-GP
2 2 1 AG1
USBRBIAS#
R223 22D6R2F-L1-GP
BOM1
ICH_SPI_CS#11 1KR2J-1-GP
2 ICH9M-GP-NF
R558 DY
1KR2J-1-GP R573
PCI_GNT#3 1 2
R270 DY 3D3V_S5 1 DY 2 SPI_MOSI_R Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1KR2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (1 of 4)
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 26 of 53
5 4 3 2 1
5 4 3 2 1

3 OF 6
U24C 3D3V_S0
G16 AH23 SATA0GP R4821 43KR2J-GP
2
30,35,40,41,53 SMB_CLK SMBCLK SATA0GP/GPIO21 R4901 43KR2J-GP
A13 AF19 SATA1GP 2
30,35,40,41,53 SMB_DATA SMBDATA SATA1GP/GPIO19
-SMB_LINK_ALERT E17 AE21 ICH_GPIO36 RN36

SATA
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36

GPIO
SMB
3D3V_S5 1 2 SMLINK0 C17 AD20 ICH_GPIO37 1 4
R268 SMLINK0 SATA5GP/GPIO37
1 210KR2J-3-GP SMLINK1 B18 2 3
R249 10KR2J-3-GP SMLINK1
H1 CLK_ICH14 3
3D3V_S5 -PM_RI CLK14 SRN10KJ-5-GP
F19 AF3 CLK48_ICH 3

Clocks
RI# CLK48
-PM_SUS_STAT R4 P1 PM_SUS_CLK
SUS_STAT#/LPCPD# SUSCLK

1
R253 R564 TP274 -DBRESET G19
D SYS_RESET# D

10KR2J-3-GP

10KR2J-3-GP
TP277 C16 -PM_SLP_S3 48,50
DY DY SLP_S3#
10 -PM_SYNC M6 E16 -PM_SLP_S5 13,38,41,48,49
PMSYNC#/GPIO0 SLP_S4# -SLPS5
G17
-SMB_ALERT SLP_S5# TP281
A17

2
SMBALERT#/GPIO11 GPIO26
C10
S4_STATE#/GPIO26
3 -H_STP_PCI A14
STP_PCI# R232

SYS GPIO
3 -H_STP_CPU E19 G20 PM_PWROK 7,50
STP_CPU# PWROK 100R2J-2-GP
L4 M2 PM_DPRSLPVR_R 2 1 PM_DPRSLPVR 10,44
26,32,38 PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16 R233 1 2
3D3V_S5 3D3V_S0

Power MGT
35,40,53 PCIE_WAKE# E20 B13 -PM_BATLOW_R 100KR2J-1-GP
WAKE# BATLOW#
32,38 INT_SERIRQ M5
SERIRQ DY
7 -THRM 1 2 -THRM_ICH AJ23 R3 PWRBTN#_ICH 1 D10
R204 0R2J-2-GP THRM# PWRBTN#
3D3V_S5 VRMPWRGD PM_LAN_ENABLE
DY D21
VRMPWRGD LAN_RST#
D20 3 SB_PWR_BTN# 38
DY_RTL BAS16-1-GP

2
RN53 R559 1 DY 2 ICH_TP7 A20 D22 -SB_RSMRST 2
SST RSMRST#

10KR2J-3-GP
1 8 -PM_RI R467 R597 R478 R265 0R2J-2-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
2 7 GPIO10 25 UMA_HDMI_HPD AG19 R1052
1 DY 20R1J-GP R5 CK_PWRGD 3 -SB modify
-SMB_ALERT CLK_SEL TACH1/GPIO1 CK_PWRGD 3D3V_S0
3 6
-EC_SWI
DIS AH21
TACH2/GPIO6
4 5 38 -EC_SCI AG21 R6 CL_PWROK 10,50
2

1
TACH3/GPIO7 CLPWROK
38 -EC_SWI A21
LAN_PHYPC GPIO8
SRN10KJ-6-GP C12 B16

1
LAN_PHY_PWR_CTRL/GPIO12 SLP_M#
C21
PSW_CLR# ENERGY_DETECT/GPIO13 R575
RN52 AE18 F24 CL_CLK_MCH 10
TACH0/GPIO17 CL_CLK0
1 8 -PM_BATLOW_R GPIO18 K1 B19 TP298 3K24R2F-GP
GPIO18 CL_CLK1
2 7 -DBRESET TP280 G68
41 -NEWCARD_RST AF8
2

2
GPIO20
3 6-SMB_LINK_ALERT R550 R479 SCLOCK AJ22 F22
GAP-OPEN

2
SCLOCK/GPIO22 CL_DATA0 CL_DATA_MCH 10
5 PCIE_WAKE# R? 1 DY 0R1J-GP

Controller Link
4 2 A9 C19

GPIO
20 GPIO_ATI_RST GPIO27 CL_DATA1 TP294

10KR2J-3-GP

10KR2J-3-GP
50 GPIO_ATI_PWR_ON R? 1 DY 0R1J-GP
2 D19
GPIO28 CL_VREF0_ICH
SRN10KJ-6-GP UMA ICS 3 -CLK_SATA_OE L1
SATACLKREQ#/GPIO35 CL_VREF0
C25
AE19 A19 CL_VREF1_ICH
1

1
TP269 SLOAD/GPIO38 CL_VREF1
AG22
TP262 SDATAOUT1 AF21 SDATAOUT0/GPIO39 3D3V_S5 R576
RN51
GPIO26
DY
R203 2 ICH9_GPIO49 AH24 SDATAOUT1/GPIO48 CL_RST0#
F21 -CL_RST_MCH 10
453R2F-1-GP
1 8 1 D18 TP291

SCD1U10V2KX-4GP
1
LAN_PHYPC ICH9_GPIO57 GPIO49 CL_RST1#

C806
2 7 1KR2J-1-GP A8

1
-THRM_ICH GPIO57/CLGPIO5
3D3V_S0 3 6 A16 LAN_DISABLE 35

2
GPIO24/MEM_LED GPIO10 R266
C 4 5 GPIO49 should be pulled down to 34 ACZ_SPKR M7 C18 C

2
SPKR GPIO10/SUS_PWR_ACK 3K24R2F-GP
GND only when using Teenah. When 10 -MCH_ICH_SYNC AJ24 C11
ICH_TP3 MCH_SYNC# GPIO14/AC_PRESENT
SRN10KJ-6-GP using Cantiga, this ball should B21 C20
TP3 GPIO9/WOL_EN

MISC
TP297 AH20 TP319

2
be left as No Connect. PWM0
AJ20
PWM1
AJ21

1
PWM2

SCD1U10V2KX-4GP
1

1
R250

C434
R267

10KR2J-3-GP
ICH9M-GP-NF R585 453R2F-1-GP

100KR2J-1-GP

2
2

2
3D3V_S5 3D3V_S5

3D3V_S0
3D3V_S5 3D3V_S5
1

3D3V_S0
R593
1

10KR2J-3-GP R251 No Reboot Strap

1
10KR2J-3-GP

10KR2J-3-GP
SPKR LOW = Defaule
DY High=No Reboot R272
2

1 2 VRMPWRGD
R592 0R2J-2-GP
2

ICH9_GPIO57 3D3V_S0 3D3V_S5


D

2
U31
1

100KR2J-1-GP

Q9 R252 ACZ_SPKR 1 DY 2 1 6

1
2N7002-11-GP R236 1KR2J-1-GP B VCC
1 DY 2
10,44 -VGAET_PWRG G DY SDATAOUT1 1 DY 2 R561 0R2J-2-GP R563 PM_SUS_CLK 2 5
A NC#5

10KR2J-3-GP
R480 10KR2J-3-GP
3 4 32KHZ 1 2
2
S

GND Y G792_CLK 7
SCLOCK 1 2 D22 R271 10R2J-2-GP

2
R481 10KR2J-3-GP 1 -SB_RSMRST 74LVC1G08GM-GP

PM_PWROK 1 2 2
38 -RSMRST_KBC

1
B B
R565 10KR2J-3-GP R562
PM_LAN_ENABLE 1 2 3
R586 0R2J-2-GP 100KR2J-1-GP
BAT54-7-F-GP
DY

2
A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (2 of 4)
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 27 of 53
5 4 3 2 1
5 4 3 2 1

C428
1 2 SC12P50V2JN-3GP RTC_X1 KDS: RESO 32.768KHZ / 12P

RESO-32D768KHZ-GP

1
3D3V_AUX_S5 D18 4 3 R244
2 RTC_AUX_S5 10MR2J-L-GP
D X4 D

2
SC1U16V3ZY-GP
3

2
1
MAIN SOURCE:20.F0714.003 1D05V_S0
1 C703
SECOND SOURCE:20.D0246.103 C427

RTC_BAT_R

1
1 OF 6 LPC_LAD[0..3]
U24A LPC_LAD[0..3] 31,38
BAS40CW-GP 1 2 SC12P50V2JN-3GP
C23 K5 LPC_LAD0 DY R493
RTC_X2 RTCX1 FW H0/LAD0 LPC_LAD1 56R2J-4-GP
CN13 C24 K4
RTCX2 FW H1/LAD1 LPC_LAD2
4 L6

2
RTC_BAT R583 1 RTC_RST# FW H2/LAD2 LPC_LAD3 -DPSLP
1 1 2 2 20KR2J-L2-GP A25 RTCRST# FW H3/LAD3 K2

RTC
LPC
1KR2J-1-GP R582 1 2 20KR2J-L2-GP SRTC_RST# F20
R466 INTRUDER# SRTCRST#
2 1 2 C22 INTRUDER# FW H4/LFRAME# K3 -LPC_FRAME 31,38
3 R581 1MR2J-1-GP
1

1
5 C709 C811 C812 INTVRMEN B22 J3
INTVRMEN LDRQ0#

SC1U16V3ZY-GP

SC1U16V3ZY-GP
SCD1U16V2ZY-2GP LAN100_SLP A22 J1 3D3V_LDRQ1_S0 TP282
LAN100_SLP LDRQ1#/GPIO23 TP178 1D05V_S0
ACES-CON3-GP-U DY
2

2
E25 GLAN_CLK A20GATE N7 KA20GATE_SB 38

1
AJ27 -A20M 4
20.F0714.003 GLAN_COMP place within 500 mil of ICH9M 1D5V_S0 C13
A20M#
LAN_RSTSYNC H_DPRSTP# R483
DPRSTP# AJ25 -DPRSTP 4,10,44

LAN / GLAN
10 ACZ_SDIN F14 AE23 -DPSLP 4 56R2J-4-GP
LAN_RXD0 DPSLP#
10 ACZ_SDOUT G13

2
LAN_RXD1 H_FERR#_R
10 ACZ_SYNC D14 LAN_RXD2 FERR# AJ26 1 2 -FERR 4

2
10 -ACZ_RST R484 56R2J-4-GP
10 ACZ_BITCLK R260 D13 AD22 CPU_PWRGD 4
LAN_TXD0 CPUPW RGD R494 1D05V_S0
24D9R2F-L-GP D12 LAN_TXD1
E13 AF25 -IGNNE 4 200R2F-L-GP
LAN_TXD2 IGNNE#

CPU
SC12P50V2JN-3GP1 2C710 CPU_PWRGD 1 2
DY

1
C B10 GLAN_DOCK#/GPIO56 INIT# AE22 -INIT 4 C
SC12P50V2JN-3GP1 2C708 AG25 INTR 4
GLAN_COMP INTR
-SB modify B28 GLAN_COMPI RCIN# L3 -KBRST 38
DY B27 GLAN_COMPO
39,53 ACZ_BITCLK_MDC R474 1 2 22R2J-2-GP AF23 NMI 4
R473 22R2J-2-GP NMI H_SMI#_R 1D05V_S0
34 ACZ_BITCLK_RTL 1 2 AF6 HDA_BIT_CLK SMI# AF24 1 2 -SMI 4
34 ACZ_SYNC_RTL R208 1 2 33R2J-2-GP AH4 R488 0R2J-2-GP
R209 33R2J-2-GP HDA_SYNC
39,53 ACZ_SYNC_MDC 1 2 STPCLK# AH27 -STPCLK 4 1 2
39,53 -ACZ_RST_MDC R477 1 2 33R2J-2-GP AE7 R486 56R2J-4-GP
R476 33R2J-2-GP HDA_RST# H_THERMTRIP_R
34 -ACZ_RST_RTL 1 2 THRMTRIP# AG26 1 2 -THERMTRIP 4,10
AF4 R485 54D9R2F-L1-GP
HDA_SDIN0 ICH_TP8 TP263 Layout note: R373 needs to placed
34 ACZ_SDATAIN_RTL AG4 HDA_SDIN1 PECI AG27
within 2" of ICH9, R379 must be

IHDA
39,53 ACZ_SDATAIN_MDC AH3 HDA_SDIN2
AE5 placed within 2" of R373 w/o stub
R471 HDA_SDIN3
39,53 ACZ_SDATA_OUT_MDC 1 2 33R2J-2-GP TP268
SATA4RXN AH11
34 ACZ_SDATA_OUT_RTL R472 1 2 33R2J-2-GP AG5 AJ11
HDA_SDOUT SATA4RXP
SATA4TXN AG12
R475 1 DY 2 HDA_DOCK_EN# AG7 AF12
3D3V_S0 HDA_DOCK_EN#/GPIO33 SATA4TXP
TP265 8K2R2J-3-GP HDA_DOCK_RST# AE8 HDA_DOCK_RST#/GPIO34
SATA5RXN AH9
51 SATA_LED# AG8 SATALED# SATA5RXP AJ9
SATA5TXN AE10
31,53 SATA_RXN0 C363 1 2SCD01U25V2KX-3GP SATA_RXN0_C AJ16 AF10
C362 SATA_RXP0_C SATA0RXN SATA5TXP
1 2SCD01U25V2KX-3GP AH16

SATA
31,53 SATA_RXP0 SATA0RXP
C726 1 2SCD01U25V2KX-3GP SATA_TXN0_C AF17 AH18
31,53 SATA_TXN0 SATA0TXN SATA_CLKN -CLK_PCIE_SATA 3
31,53 SATA_TXP0 C723 1 2SCD01U25V2KX-3GP SATA_TXP0_C AG17 AJ18 CLK_PCIE_SATA 3
SATA0TXP SATA_CLKP
C361 1 2SCD01U25V2KX-3GP SATA_RXN1_C AH13 AJ7 SATARBIAS
31,53 SATA_RXN1 SATA1RXN SATARBIAS#
31,53 SATA_RXP1 C360 1 2SCD01U25V2KX-3GP SATA_RXP1_C AJ13 AH7 2 1
C699 SATA_TXN1_C SATA1RXP SATARBIAS 24D9R2F-L-GP
B 31,53 SATA_TXN1 1 2SCD01U25V2KX-3GP AG14 SATA1TXN
R205
B
C700 1 2SCD01U25V2KX-3GP SATA_TXP1_C AF14
31,53 SATA_TXP1 SATA1TXP
Place within 500 mils of
ICH9 ball
ICH9M-GP-NF

RTC_AUX_S5 RTC_AUX_S5
1

R247 R246
330KR2F-L-GP 330KR2F-L-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
2

INTVRMEN LAN100_SLP INTVRMEN High=Enable Low=Disable


1

integrated VccLan1_05VccCL1_05 BOM1


R248 R245
A
DY 0R2J-2-GP DY 0R2J-2-GP LAN100_SLP High=Enable Low=Disable
A

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (1 of 4)
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 28 of 53

5 4 3 2 1
5 4 3 2 1
6 OF 6
RTC_AUX_S5 U24F
6uA in G3 A23 A15
VCCRTC VCC1_05
VCC1_05
B15 1.634A
V5REF_S0 A6 C15 Layout Note: Place near ICH9M 1D05V_S0
V5REF VCC1_05

1
C431 C432 D15
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V5REF_S5 AE1 E15
V5REF_SUS VCC1_05

1
F15 C717 C367 C716

2
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AA24 VCC1_5_B VCC1_05 L11 DY
AA25 L12

2
VCC1_5_B VCC1_05
AB24 L14
646mA AB25
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05 L16
1D5V_S0 AC24 L17
VCC1_5_B VCC1_05
AC25 VCC1_5_B VCC1_05 L18
AD24 VCC1_5_B VCC1_05 M11
D AD25 M18 D
TC13 VCC1_5_B VCC1_05
AE25 VCC1_5_B VCC1_05 P11

1
ST22U6D3VBM-1GP
TC14 AE26 P18

ST220U6D3VDM-17GP
VCC1_5_B VCC1_05
AE27 T11
AE28
VCC1_5_B VCC1_05
T18 23mA 1D5V_S0

2
VCC1_5_B VCC1_05
AE29 VCC1_5_B VCC1_05 U11
F25 U18

CORE
VCC1_5_B VCC1_05
G25 VCC1_5_B VCC1_05 V11
H24 VCC1_5_B VCC1_05 V12
H25 VCC1_5_B VCC1_05 V14
J24 VCC1_5_B VCC1_05 V16
J25 VCC1_5_B VCC1_05 V17
K24 V18 1D05V_S0
VCC1_5_B VCC1_05
K25 VCC1_5_B 1 R492 2

1
SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SC4D7U6D3V3MX-2GP
L23 R29 C731 C371 C727 0R3-0-U-GP
VCC1_5_B VCCDMIPLL
*Within a given well, 5VREF needs to be up before the L24 DY
corresponding 3.3V rail L25
VCC1_5_B
W23 1D05V_DMI_ICH_S0 48mA

2
VCC1_5_B VCCDMI
M24 VCC1_5_B VCCDMI
Y23
M25 1D05V_S0
N23
VCC1_5_B
AB23 2mA
47mA N24
VCC1_5_B
VCC1_5_B
V_CPU_IO
V_CPU_IO AC23
3D3V_S0 5V_S0 1D5V_S0 1D5V_APLL_S0 N25 3D3V_S0
L23 VCC1_5_B

1
P24 AG29 C719 C426
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP
1 2 P25 C721 C722
VCC1_5_B
2

VCCA3GP
IND-1D2UH-5-GP R24 AJ6 SCD1U10V2KX-4GP SC4D7U6D3V3MX-2GP

2
VCC1_5_B VCC3_3

1
R269 R25 SCD1U10V2KX-4GP

2
CH751H-40PT 100R2J-2-GP C355 C357 VCC1_5_B
R26 AC10
2mA VCC1_5_B VCC3_3 VCC3_3=308mA

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP
D12 R27

2
VCC1_5_B R487 3D3V_S0
T24 AD19
1

V5REF_S0 VCC1_5_B VCC3_3 3D3V_VCCPCORE_ICH_S0


T27 VCC1_5_B VCC3_3 AF20 1 2

1
C T28 AG24 C718 0R3-0-U-GP 3D3V_S0 C
1

VCC1_5_B VCC3_3 3D3V_S0


T29 AC20

VCCP_CORE
C435 VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
U24 2 1 R206

2
SC1U10V2KX-1GP VCC1_5_B 0R2J-2-GP 1D5V_S0
U25 B9
2

VCC1_5_B VCC3_3

1
V24 F9 C408 C405 C422 C423
VCC1_5_B VCC3_3 11mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V25 G3 DY 3.3V_1.5V_HDA 2 DY 1 R207
VCC1_5_B VCC3_3

1
U23 G6 C364 0R2J-2-GP

2
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP
Layout Note: 3D3V_S5 5V_S5 W24 J2
Place near ICH9 VCC1_5_B VCC3_3
W25 J7

2
VCC1_5_B VCC3_3 3D3V_S5
K23 K7

PCI
VCC1_5_B VCC3_3
2

Y24
R218 VCC1_5_B 3.3V_1.5V_HDA
Y25 AJ4 2 1 R470
CH751H-40PT 100R2J-2-GP 1D5V_S0 1.342A VCC1_5_B VCCHDA 0R2J-2-GP 1D5V_S3
2mA D9 AJ19 VCCSATAPLL VCCSUSHDA
AJ3 3.3V_1.5V_SUS_HDA 11mA

1
C711 3.3V_1.5V_SUS_HDA 2 1 R469
1

SCD1U10V2KX-4GP
V5REF_S5 AC16 AC8 VccSus1_05[1] TP270 TPAD28 0R2J-2-GP
1

VCC1_5_A VCCSUS1_05
AD15 F17 VccSus1_05[2] TP284 TPAD28
DY

2
VCC1_5_A VCCSUS1_05
1

C714 C715 AD16


VCC1_5_A
SC1U10V2KX-1GP

SC1U10V2KX-1GP

ARX
C372 AE15 AD8 VccSus1_5[1] TP267 TPAD28
2

SC1U10V2KX-1GP VCC1_5_A VCCSUS1_5


AF15
2

VCC1_5_A VccSus1_5[2]
AG15 F18
VCC1_5_A VCCSUS1_5

1
AH15 C794
VCC1_5_A SCD1U10V2KX-4GP
AJ15
VCC1_5_A 3D3V_S5
A18

2
VCCSUS3_3
AC11 D16
VCC1_5_A VCCSUS3_3
AD11 D17

VCCPSUS
VCC1_5_A VCCSUS3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AE11 E22
VCC1_5_A VCCSUS3_3

1
ATX
AF11 C438 C437 C444
VCC1_5_A

SCD1U10V2KX-4GP
AG10
VCC1_5_A DY DY
AG11 AF1
212mA

2
VCC1_5_A VCCSUS3_3
B AH10 B
VCC1_5_A
1

C724 C720 AJ10 T1


VCC1_5_A VCCSUS3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

T2
VCCSUS3_3 3D3V_S5
AC9 T3
2

VCC1_5_A VCCSUS3_3
T4
VCCSUS3_3
AC18 T5
VCC1_5_A VCCSUS3_3

SCD1U10V2KX-4GP
AC19 T6
VCC1_5_A VCCSUS3_3

1
U6 C383 C376 C374
VCCSUS3_3

SCD022U16V2KX-3GP

SCD022U16V2KX-3GP
AC21 U7
VCC1_5_A VCCSUS3_3
V6
VCCPUSB

2
VCCSUS3_3
G10 V7
VCC1_5_A VCCSUS3_3
G9 W6
VCC1_5_A VCCSUS3_3
W7
VCCSUS3_3
AC12 Y6
VCC1_5_A VCCSUS3_3
AC13 Y7
1D5V_S0 VCC1_5_A VCCSUS3_3
AC14 T7
USBPLL=11mA VCC1_5_A VCCSUS3_3
AJ5 G22 VccSus1_05[3]

1
VCCUSBPLL VCCCL1_05 C792
1

SCD1U10V2KX-4GP
C729 C728 AA7 G23 VccSus1_5[3]
VCC1_5_A VCCCL1_5

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

USB CORE

AB6 C793

2
VCC1_5_A 3D3V_S0

SCD1U10V2KX-4GP
AB7 A24 DY
2

VCC1_5_A VCCCL3_3
AC6 B24

2
3D3V_S0 VCC1_5_A VCCCL3_3
AC7
19mA in S0;78mA in S3/S4/S5 VCC1_5_A 19mA
VccLan1D05 A10
1

C421 VCCLAN1_05
A11
VCCLAN1_05
1

C419 C420 SCD1U10V2KX-4GP


DY1D5V_S0
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

A12
2

VCCLAN3_3
B12
23mA
2

VCCLAN3_3
A A
A27
VCCGLANPLL
1

1
SC10U6D3V5MX-3GP

GLAN POWER

C418 D28
SC2D2U10V3KX-1GP

C430 VCCGLAN1_5
D29
E26
VCCGLAN1_5 Wistron Corporation
2

1D5V_S0 VCCGLAN1_5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


E27
80mA VCCGLAN1_5 Taipei Hsien 221, Taiwan, R.O.C.
SCD1U10V2KX-4GP

A26
C712 3D3V_S0 VCCGLAN3_3 Title
1mA
1

DY
C713 ICH9M-GP-NF
ICH9-M (3 of 4)
SC4D7U6D3V3KX-GP Size Document Number Rev
2

Olympus SB
Date: W ednesday, December 26, 2007 Sheet 29 of 53
5 4 3 2 1
A B C D E

5 OF 6
U24E
AA26 H5
VSS VSS
AA27 J23
VSS VSS
AA3 VSS VSS J26
AA6 VSS VSS J27
AB1 VSS VSS AC22
AA23 VSS VSS K28
AB28 VSS VSS K29
AB29 VSS VSS L13
AB4 VSS VSS L15
AB5 VSS VSS L2
AC17 VSS VSS L26
4 AC26 VSS VSS L27 4
AC27 VSS VSS L5
AC3 VSS VSS L7
AD1 VSS VSS M12
AD10 VSS VSS M13
AD12 VSS VSS M14
AD13 VSS VSS M15
AD14 VSS VSS M16
AD17 VSS VSS M17
AD18 VSS VSS M23
AD21 VSS VSS M28
AD28 VSS VSS M29
AD29 VSS VSS N11
AD4 VSS VSS N12
AD5 VSS VSS N13
AD6 VSS VSS N14
AD7 VSS VSS N15
AD9 VSS VSS N16
AE12 VSS VSS N17
AE13 VSS VSS N18
AE14 VSS VSS N26
AE16 VSS VSS N27
AE17 VSS VSS P12
AE2 VSS VSS P13
AE20 VSS VSS P14
AE24 VSS VSS P15
AE3 VSS VSS P16
AE4 VSS VSS P17
AE6 VSS VSS P2
3 AE9 P23 3
VSS VSS
AF13 VSS VSS P28
AF16 P29 3D3V_S5 3D3V_S0
VSS VSS
AF18 VSS VSS P4
AF22 VSS VSS P7
AH26 VSS VSS R11
AF26 VSS VSS R12
AF27 VSS VSS R13

8
7
6
5
SRN4K7J-10-GP
AF5 VSS VSS R14
AF7 R15 RN35
VSS VSS
AF9 R16
VSS VSS
AG13 R17
VSS VSS
AG16 R18
VSS VSS
AG18 R28

1
2
3
4
VSS VSS
AG20 T12
VSS VSS
AG23 T13
VSS VSS
AG3 T14
VSS VSS 5V_S0
AG6 T15
VSS VSS
AG9 T16
VSS VSS
AH12 T17
VSS VSS
AH14 T23
VSS VSS
AH17 B26
VSS VSS
AH19 U12
VSS VSS
AH2 U13 Q18
VSS VSS
AH22 U14
VSS VSS
AH25 U15
VSS VSS
AH28 U16 27,35,40,41,53 SMB_CLK 3 4 ICH_SMBCLK 3,15,16
VSS VSS
AH5 U17
VSS VSS
AH8 AD23 2 5
2 VSS VSS 2
AJ12 U26
VSS VSS
AJ14
VSS VSS
U27 1 6 2N7002DW -1-GP
AJ17 U3
VSS VSS
AJ8 V1
VSS VSS
B11 V13 27,35,40,41,53 SMB_DATA
VSS VSS
B14 V15 ICH_SMBDATA 3,15,16
VSS VSS
B17 V23
VSS VSS
B2 V28
VSS VSS
B20 V29
VSS VSS
B23
VSS VSS
V4 Q13 & Q14 connect SMLINK and
B5 V5 SMBUS in S) for SMBus 2.0
VSS VSS
B8 W26
VSS VSS compliance
C26 W27
C27
VSS
VSS
VSS
VSS
W3 SMBUS
E11 Y1
VSS VSS
E14 Y28
VSS VSS
E18 Y29
VSS VSS
E2 Y4
VSS VSS
E21 Y5
VSS VSS
E24 AG28
VSS VSS
E5 AH6
VSS VSS
E8 AF2
VSS VSS
F16 B25
VSS VSS
F28
VSS TPAD34 TP206
F29 A1
VSS VSS TPAD34 TP212
G12 A2
VSS VSS TPAD34 TP210
G14 A28
VSS VSS TPAD34 TP209
G18 A29
VSS VSS TPAD34 TP154
1 G21 AH1 1
VSS VSS TPAD34 TP155
G24 AH29
VSS VSS TPAD34 TP146
G26 AJ1
VSS VSS TPAD34 TP152
G27
G8
VSS
VSS
VSS
VSS
AJ2
AJ28 TPAD34 TP151 Wistron Corporation
H2 AJ29 TPAD34 TP153 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS VSS TPAD34 TP196 Taipei Hsien 221, Taiwan, R.O.C.
H23 VSS VSS B1
H28 B29 TPAD34 TP192
VSS VSS Title
H29 VSS
ICH9M-GP-NF ICH9-M (4 of 4)
Size Document Number Rev

Olympus SB
Date: W ednesday, December 26, 2007 Sheet 30 of 53
A B C D E
SATA HD Connector
22.10300.081

23
SATA1 ODD Connector
NP1
1

28,53 SATA_TXP0 2
28,53 SATA_TXN0 3 ODD1
4 8
28,53 SATA_RXN0 5
28,53 SATA_RXP0 6 S1
7
28,53 SATA_TXP1 S2
28,53 SATA_TXN1 S3
8 S4
9 28,53 SATA_RXN1 S5 Olympus LED's Location and Sequence
10 28,53 SATA_RXP1 S6
11 S7
5V_S0 12 5V_S0
13 TP133 TPAD34 ODD_DP P1 Right side
14 P2 Left side
15 P3
16 TP130 TPAD34 ODD_MD P4 TouchPad-MUTE POWER Battery WLAN
K

K
1

1
TC23 17 P5
D11 C760 18 D6 C314 TC10 P6 LED3 LED4 LED6

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SSM24PT-GP

SSM24PT-GP
19 LED1 LED8 LED5 LED7
2

2
DY 20 DY R170 9

10KR2J-3-GP
21
A

A
22 SKT-SATA7P+6P-9-GP
NP2

2
24
62.10065.221
SKT-SATA22P-11-GP

MAIN SOURCE:22.10300.081 Q23 CHDTC124EU-1GP


SECOND SOURCE:20.80919.022 1->3 BLUE
1 CHG_LED1 38
2->4 Amber R1 IN
3D3V_S5 BLUE / AMBER 3
R2

TOP VIEW GOLDEN FINGER FOR DEBUG BOARD 83.00195.G70


OUT
1 2 LED1 2 GND
R587 100R2F-L1-GP-U 2 4
28,38 LPC_LAD[0..3]
5V_S0 1 CHG_LED2 38
U34 R1 IN
1 2 1 3 R2
A15 (B1) TOP BOTTOM R588 100R2F-L1-GP-U OUT 3
A1 B15 3D3V_S0 LED-BO-4-GP
A1 B15
A14 (B2) 10,20,26,40,41,53 -PLT_RST A2
A2 B14
B14
EXT_FWH#
LED-OB-3-GP 2 GND
28,38 -LPC_FRAME A3 B13
A3 B13 LPC_LAD0 ORANGE Q8 CHDTC124EU-1GP
A4 B12

1
A4 B12

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
PCLK_FWH LPC_LAD1
....

A5 B11 1
....

3 PCLK_FWH A5 B11 LPC_LAD2 EC5 EC8


A6 B10
A6 B10 LPC_LAD3
A7 B9 1 2 3

2
A7 B9 R602 100R2F-L1-GP-U BLUE
A2 (B14) A8
A8 B8
B8
LPC_LAD3 A9 B7 2
LPC_LAD2 A9 B7
A1 (B15) A10
A10 B6
B6
LPC_LAD1 A11 B5 PCLK_FWH
LPC_LAD0 A11 B5 5V_S0
A12 B4 LED6
EXT_FWH# A12 B4 -LPC_FRAME
EXT_FWH# A13 B3
A13 B3 -PLT_RST
A14
A14 B2
B2
BLUE / AMBER 83.01220.I70
3D3V_S0 A15 B1 CHDTC124EU-1GP
A15 B1 3D3V_S0
(BOTTOM VIEW) GF-15P-GP-U 1 IN BLUETOOTH_LED 39,53
LED2 83.00195.G70
R1
R2
1 2 2 4 OUT 3
R287 100R2F-L1-GP-U Q22
Boot Device must have ID[3:0] = 0000 2 GND
Has internal pull-down resistors 1 2 1 3
R589 100R2F-L1-GP-U D23
All may be left floated
LED-BO-4-GP 2 WLAN_LED 40,53
FPET7 Elec. P3-46 LED-OB-3-GP 3

ORANGE 1
1
CHP222PT-U
1 2 3
R607 100R2F-L1-GP-U BLUE Q24
2 1 WLAN_LED_DET 38

1
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
R1 IN
R2
EC9 EC7 OUT 3
LED5

2
83.01220.I70 2 GND

CHDTC124EU-1GP

3D3V_S5

BLUE
LED4
1 2 1 2 POWER ON_B 38
R594 100R2F-L1-GP-U
LED-B-27-U-GP
83.00190.P70 POWER ON_B
LED7
A K

LED-B-77-GP-U2

1
SC1KP50V2KX-1GP
83.01221.I70 EC6

2
3D3V_S0
BLUE
LED3
1 2 1 2 TP_MUTE 38
R290 100R2F-L1-GP-U
LED-B-27-U-GP
83.00190.P70

1
SC1KP50V2KX-1GP
EC4

2
BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD/CDROM/DEBUG / LEDS
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 31 of 53
5 4 3 2 1

U26B 2 OF 2
3D3V_S0 3D3V_S0

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
1

1
C415 C390 C412 C738 C409 10 67
VCC_PCI3V VCC_3V
D C402
SC10U10V5ZY-1GP
20
27
VCC_PCI3V D

2
VCC_PCI3V
DY 32

1
VCC_PCI3V
41 VCC_PCI3V
3D3V_S0 128 C756 C772
VCC_PCI3V SCD01U16V2KX-3GP SC10U10V5ZY-1GP

2
61 VCC_RIN
16 VCC_ROUT
VCC_ROUT 34 VCC_ROUT
1

64 VCC_ROUT
C425 C776 114 VCC_ROUT

1
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP C416 C775 C377 C392 120
2

VCC_ROUT

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
DY
86

SCD47U16V3ZY-3GP

SCD47U16V3ZY-3GP
2

2
VCC_MD

GND 4
GND 13
PCI_AD31 125 22
PCI_AD30 AD31 GND
126 28
PCI_AD29 AD30 GND
127 AD29 GND 54
PCI_AD28 1 62
PCI_AD27 AD28 GND
2 63
PCI_AD26 AD27 GND
3 AD26 GND 68
PCI_AD25 5 118
PCI_AD24 AD25 GND
ver-sc change size 6 AD24 GND 122
PCI_AD23 9
PCI_AD22 AD23
11
AD22
C PCI_AD21
PCI_AD20
12
14
AD21 AGND 99
102
C
PCI_AD19 AD20 AGND
15 AD19 AGND 103
PCI_AD18 17 107 3D3V_S0
PCI_AD17 AD18 AGND
18 111
PCI_AD16 AD17 AGND
19 AD16

1
PCI_AD15 36
PCI_AD14 AD15 R524
37 AD14
PCI_AD13 38 4K7R2J-2-GP
PCI_AD12 AD13
39
PCI_AD11 AD12
40

2
PCI_AD10 AD11 HW SPND#
42 69
PCI_AD9 AD10 HWSPND#
43
PCI_AD8 AD9
26 PCI_AD[0..31] 44
PCI_AD7 AD8
46
PCI_AD6 AD7 R5C833_MSEN 3D3V_S0
47 58
PCI_AD5 AD6 MSEN
48
PCI_AD4 AD5 R5C833_XDEN
49 55
PCI_AD3 AD4 XDEN
50 RN41
PCI_AD2 AD3
51 1 8
PCI_AD1 AD2 R5C833_UDIO5 DY
52 57 1 2 3D3V_S0 2 7
AD1 UDIO5

1
PCI_AD0 53 R538 100KR2J-1-GP 3 6
AD0 C380
26 PCI_PAR 33 4 5
PCI_C/BE#3 PAR R5C833_UDIO3 SCD1U16V2ZY-2GP
26 PCI_C/BE#3 7 65

2
PCI_C/BE#2 C/BE3# UDIO3 R5C833_UDIO4
26 PCI_C/BE#2 21 59 SRN10KJ-6-GP
PCI_C/BE#1 C/BE2# UDIO4
26 PCI_C/BE#1 35
3D3V_S0 PCI_C/BE#0 C/BE1#
26 PCI_C/BE#0 45 56
PCI_AD25 C/BE0# UDIO2
1 2 R5C833_IDSEL 8
R227 100R2J-2-GP IDSEL
60 PCI_SPKR 34
UDIO1
1

124
B R523
26 PCI_REQ#0
26 PCI_GNT#0 123
REQ#
GNT# UDIO0/SRIRQ# 72 INT_SERIRQ 27,38
B
10KR2J-3-GP 23
26 PCI_FRAME# FRAME#
26 PCI_IRDY# 24 IRDY#
26 PCI_TRDY# 25
1 2

TRDY#
26 PCI_DEVSEL# 26
DEVSEL#
26 PCI_STOP# 29 115 PCI_PIRQA# 26
C766 STOP# INTA#
26 PCI_PERR# 30
SCD1U16V2ZY-2GP PERR#
26 PCI_SERR# 31 116 PCI_PIRQC# 26
2

SERR# INTB#
GBRST# 71
GBRST#
26,35,38,51,53 -PCI_RST 119 PCIRST# 1394 : INTA#
3 PCLK_PCM 121 4in1 : INTB#
PCICLK
SHIELD 26 ICH_PME# 2 1 R5C833_PME# 70 66 R5C833_TEST
R522 PME# TEST
GND DY 0R2J-2-GP
26,27,38 PM_CLKRUN# 117
CLKRUN#
2

R224 R527
10KR2J-3-GP R5C833-GP 100KR2J-1-GP
DY
1

1
1

C373
SC10P50V2JN-4GP
A BOM1
A
2

DY
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

R5C832/PCI
Size Document Number Rev
A3
Olympus SB
Date: W ednesday, December 26, 2007 Sheet 32 of 53

5 4 3 2 1
A B C D E

OSC 82.30023.371 1 OF 2
U26A

3D3V_S0

98
AVCC_PHY3V
106
4 AVCC_PHY3V 4
110
AVCC_PHY3V
112
AVCC_PHY3V

1
GUARD GND C378 C739 C748

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD01U16V2KX-3GP
C755

2
1 2 1394_XI 113 TPBIAS0
TPBIAS0

SC15P50V2JN-2-GP
M Mode
1

94
X6 XI
X-24D576MHZ-70GP
TPB0N
DY R1003 1 2 0R1J-GP TPA0P-1 42
104 DY R1004 1 2 0R1J-GP TPA0N-1 42
2

C754 TPBN0
1394_XO TPB0P
DY R1006 1 2 0R1J-GP TPB0P-1 42
1 2 95
XO TPBP0
105 DY R1005 1 2 0R1J-GP TPB0N-1 42
SC22P50V2JN-4GP

108 TPA0N
TPAN0 TPA0P R261 0R1J-GP
DY 1 2 TPA0P-2 42,53
1 2 RICHO_FILO 96 109 TPA0P TPA0N R262 1 2 0R1J-GP TPA0N-2 42,53
C381 SCD01U16V2KX-3GP FIL0 TPAP0 TPB0P R263 0R1J-GP
1 2 TPB0P-2 42,53
TPB0N R264 1 2 0R1J-GP TPB0N-2 42,53
1 2RICHO_REXT 101 P Mode
R509 10KR2F-2-GP REXT

1
R510 R511 R222 R221 near chip side

56R2J-4-GP

56R2J-4-GP

56R2J-4-GP

56R2J-4-GP
1 2 RICHO_VREF 100
C744 SCD01U16V2KX-3GP VREF

2
GUARD GND 1394_TPB1_R

1
87 XD_DATA7

1
MDIO17 R220 C379
CARD READER

5K11R2F-L1-GP

SC270P50V2JN-2GP
3 92 XD_DATA6 C745 C746 3
MDIO16

SCD33U6V2KX-N2GP

SCD01U16V2KX-3GP
2

2
89 XD_DATA5

2
MDIO15 SD/XD/MS_DATA1_1
91 XD_DATA4
MDIO14 3D3V_CARD
90 SD/XD/MS_DATA3
MDIO13 SD/XD/MS_CMD_1 53
MS_INS# 53
93 SD/XD/MS_DATA2 RN37 SD/XD/MS_CMD_1
MDIO12 XD_DATA4 XD_DATA4_1 SD_WP#(XDR/B#)
8 1

1
81 SD/XD/MS_DATA1 XD_DATA5 7 2 XD_DATA5_1 C804 C790
MDIO11 XD_DATA6 XD_DATA6_1 SD/XD/MS_CLK_1 SD_CD# 53
6 3
82 SD/XD/MS_DATA0 XD_DATA7 5 4 XD_DATA7_1 SC2D2U10V3ZY-1GP

2
MDIO10 SCD1U16V2ZY-2GP
SRN33J-4-GP CARD1
XD_WP#

18

24

28
16
30

17
21

29
75

3
2
4
MDIO05
88 SD/XD/MS_CMD RN40

VCC/DATA_1

B6
WP1
CD1
VCC
VCC

CMD
INS

SCLK
VCC/CDD

CLK
MDIO08 SD/XD/MS_DATA0 8 1SD/XD/MS_DATA0_1
83 XD_ALE SD/XD/MS_DATA1 7 2SD/XD/MS_DATA1_1
MDIO19 SD/XD/MS_DATA2 6 3SD/XD/MS_DATA2_1
85 XD_CLE SD/XD/MS_DATA3 5 4SD/XD/MS_DATA3_1
MDIO18
78 XD_CE# SRN33J-4-GP
MDIO02 SD/XD/MS_DATA0_1 19 40 XD_CD# 53
SD/XD/MS_CMD D0 CD
2 1 SD/XD/MS_CMD_1 SD/XD/MS_DATA1_1 15 39 SD_WP#(XDR/B#) 53
SD_WP#(XDR/B#) 33R2J-2-GP R521 SD/XD/MS_DATA2_1 D1 R/B#
77 12 38 SD/XD/MS_CLK_1 53
MDIO03 SD/XD/MS_DATA3_1 D2 RE#
11 37 XD_CE# 53
SD_CD# D3 CE#
80 53 XD_DATA4_1 9 36 XD_CLE 53
MDIO00 D4 CLE
53 XD_DATA5_1 7 34 XD_ALE 53
D5 ALE SD/XD/MS_CMD_1
53 XD_DATA6_1 6 31
MS_INS# D6 WE#
79 R525 53 XD_DATA7_1 5 27 XD_WP# 53
MDIO01 D7 WP#
84 SD/XD/MS_CLK 1 2 SD/XD/MS_CLK_1
MDIO09
33 SD/XD/MS_DATA3_1 53
33R2J-2-GP DAT3
76 MC_PWR_CTRL_0 SD/XD/MS_DATA3_1 26 35
MDIO04 RESERVED_2/DATA_3 DAT2 SD/XD/MS_DATA2_1 53
SD/XD/MS_DATA0_1 20 8
SBIO/DATA_0 DAT1 SD/XD/MS_DATA1_1 53
74 MS_LED# SD/XD/MS_DATA2_1 22 10
2 MDIO06 DATA_2 DAT0 SD/XD/MS_DATA0_1 53 2
TP286

RESERVED/GND
97 73
RSV MDIO07

CD2/WP2_GND
D19
R526

GND/VSS_2
1

100KR2J-1-GP SD_CD# 6 1

VSS_1

GND
GND
GND
VSS
VSS
R5C833-GP MS_INS# 5 2 XD_CD#
2

1
23

14
32
25
13

43
42
41
4 3
SKT-SD+MMC41P-2-GP

CH731UPT-GP

U66 3D3V_S0
3D3V_CARD
1 5 SC33P50V2JN-3GP 1 C796 XD_DATA4_1
20mil 2
3
OUT
GND
IN
4 MC_PWR_CTRL_0
SC33P50V2JN-3GP
SC33P50V2JN-3GP
2
2
2
1 C797
1 C798
XD_DATA5_1
XD_DATA6_1
NC#3 EN

SC1U10V3ZY-6GP
SC33P50V2JN-3GP 2 1 C799 XD_DATA7_1

1
G5240B1T1U-GP SC33P50V2JN-3GP 2 1 C800 SD/XD/MS_DATA0_1
C805 C784 SC33P50V2JN-3GP 2 1 C801 SD/XD/MS_DATA1_1
SCD1U10V2KX-4GP SC33P50V2JN-3GP 2 DY11 C802 SD/XD/MS_DATA2_1

2
SC33P50V2JN-3GP 2
DY C803 SD/XD/MS_DATA3_1
DY
For SD/MS Card Power DY

1 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

R5C832/IEEE1394/SD/BT
Size Document Number Rev
C
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 33 of 53
A B C D E
5 4 3 2 1

3D3V_S0 AUD_3VD 5V_S0 AUD_5VD

2
R530

0R3-0-U-GP
1 2
R237

0R3-0-U-GP
1
1
R257
2
Speaker
0R0603-PAD
R554

6
C769 C404 AUD_AGND
C768 C400 1 2
SC10U10V5ZY-1GP SCD1U10V2KX-4GP SC10U10V5ZY-1GP SCD1U10V2KX-4GP R? 2 0R3-0-U-GP
1 4
53 SPKR_L-

2
D D
0R0603-PAD R? 2 0R3-0-U-GP
1 3
53 SPKR_L+
R? 2 0R3-0-U-GP
1 2
53 SPKR_R-
R? 2 0R3-0-U-GP
1 1
53 SPKR_R+ MLX-CON4-16-GP
CN1
cap close to pin39, pin46

5
C? C? C? C?

1
AUD_5VA
-SB modify

SC22P50V2JN-4GP

SC22P50V2JN-4GP
5V_S0 AUD_5VA

SC22P50V2JN-4GP

SC22P50V2JN-4GP
1D5V_S0 AUD_3VD
20.F0711.004

2
R238 AUD_5VD
2 1 MAIN SOURCE:20.F0711.004
SECOND SOURCE:20.F0848.004

SC2D2U10V3ZY-1GP
0R3-0-U-GP
R? R? C411
DY DY DY DY

0R3-0-U-GP

0R3-0-U-GP
1

C407

1
C403

2
SC10U10V5ZY-1GP SCD1U10V2KX-4GP C780 SC4D7U6D3V3KX-GP
2

MIC_IN_R 1 2 MIC_IN_JACK_R

2
MIC_IN_L 1 2 MIC_IN_JACK_L
DY AUD_AGND C779 SC4D7U6D3V3KX-GP

25
38

39
46
34

22

21
-SB modify

9
1
AUD_AGND U28
EXT MIC

AVDD1
AVDD2

PVDD1
PVDD2

MIC1_L
MIC1_R
DVDD_IO
DVDD

CPVEE
17
MIC2_R
HP_OUT_R R273 1 2 75R2J-1-GP 33 16
HP_OUT_L R259 1 HP-OUT_R MIC2_L ARRAY_MIC_VREF_R TP344
2 75R2J-1-GP 32 R608 1 2 4K7R2J-2-GP
HP-OUT_L TP330 TPAD34
15
LINE2-R ARRAY_MIC_VREF_L R611 1 TPAD34
14 2 4K7R2J-2-GP
LINE2-L CN9
C SPDIF_HDMI 48 1 C
SPDIFO MIC_IN_JACK_L R609 1 2 1KR2J-1-GP 2
30 ARRAY_MIC_VREF_R TP199 6
MIC1_VREFO_R ARRAY_MIC_VREF_L TP205 MIC_IN_JACK_R R610
28 1 2 1KR2J-1-GP 3
SENSE_A MIC1_VREFO_L
13 29 4
SENSE_A MIC2_VREFO -MIC_IN 5
-MIC_IN 2 1 SENSEB 18 7
MIC_JD 20KR2F-L-GP R545 SENSE_B
Alnalog signal LINEOUT1-R
24 8
23 NP1

1
LINEOUT1-L C429 NP2
TP329
AUD_DMIC_CLK TPAD34 AUDIO-JK112-GP
2 1 3 DY

2
17 AUD_DMIC_CLK_G GPIO1/DMIC-CLK

SC100P50V3JN-2GP
R529 0R2J-2-GP 2 41 SPKR_L-
17 AUD_DMIC_IN0 GPIO0/DMIC_DATA SPKL-
Digital signal 40 SPKR_L+
SPKL+ SPKR_R-
44 22.10088.E91
SPKR- SPKR_R+
47 45
SPDIFO2/EAPD SPKR+

36
CBP
SDATA_OUT

MONO-OUT
1

SDATA_IN

35 AUD_AGND AUD_AGND
CPVREF

CBN
SC2D2U10V3ZY-1GP

RESET#
BIT-CLK

C410

AVSS1
AVSS2

PVSS1
PVSS2
JDREF
SYNC

DVSS
BEEP

VREF

GND
2

PD#

ALC269Q-GR-GP-U1
12

10
6
11
5
8

31
4
20
19

27

26
37

7
49

42
43
5V_S0

AUD_PC_BEEP
1

28 ACZ_SYNC_RTL C414 HP_OUT/ LINE_OUT

1
SC10U10V5KX-2GP
28 ACZ_BITCLK_RTL
2

28 -ACZ_RST_RTL R?
10KR2F-2-GP
28 ACZ_SDATA_OUT_RTL

2
1

B B
28 ACZ_SDATAIN_RTL R241 1 2

1
R543 AUD_AGND
22R2J-2-GP 20KR2F-L-GP SPDIF_ON# R?
10KR2F-2-GP
SENSE_A D
2

2
3
Q?
AUD_AGND 2N7002PT-U
TP309 5V_SPDIF_S0
MONO_JD 2 1
R531 1
G
10KR2F-2-GP R544 2 1 AUD_SD# -SB modify HP/SPDIF1

2
38 KBC_MUTE#
TPAD30 S 1
0R2J-2-GP A_GND
53 HP_OUT_L 2
-HP_JACK_DET SPRK_L
2 1 53 HP_OUT_R 3
39K2R2F-L-GP R546 SPRK_R
4
GND
5
HP_JD 53 -HP_JACK_DET
53 SPDIF_HDMI 6
HP_IN#
VIN
7
VCC
8
C786 C783 D_GND
9

1
GND
10

SC22P50V2JN-4GP

SC22P50V2JN-4GP
1
GND
C782 MH1
MH1
MH2

2
MH2

2
SPDIF PWR SKT-JACK-122-GP

SC1KP50V2KX-1GP
5V_S0 5V_SPDIF_S0 22.10271.041
1 2 C7731 2 AUD_PC_BEEP AUD_AGND
27 ACZ_SPKR
R539 1KR2J-1-GP R584 AUD_AGND
DY
SCD1U10V2KX-5GP 2 1 -SB modify
0R3-0-U-GP
1 2
2

38 EC_BEEP R535
A 1KR2J-1-GP C807 C810 A
R536 SCD1U16V3KX-3GP U67 SCD1U16V3KX-3GP
1KR2J-1-GP
2

32 PCI_SPKR 1 2 5 1
IN OUT
R533 1KR2J-1-GP 2
1

GND BOM1
SPDIF_ON# 4 3
EN# NC#3

G5240B2T1U-GP-U Wistron Corporation


AUD_AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ALC269
Size Document Number Rev

LT32M SB
Date: Wednesday, December 26, 2007 Sheet 34 of 53
5 4 3 2 1
5 4 3 2 1

2D5V_LAN_S5 3D3V_LAN_S5
1D2V_LAN_S5 2D5V_LAN_S5 3D3V_LAN_S5 2D5V_LAN_S5
L36
2 1
BLM15AG601SN1D-1GP

1
D 2 1 D
1

1
C570 SCD1U10V2KX-4GP L13 C264 C182 C208 C251

SC4D7U25V5KX-GP
C616 C168 C250 C255 C195 C232 C252 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
2 1

2
SC4D7U25V5KX-GP

1D2V_LAN_S5 BLM15AG601SN1D-1GP
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
2

2
2 1
C196 SCD1U10V2KX-4GP L8

15
19
56
61

17
68
2 1

6
U12 BLM15AG601SN1D-1GP
SCD01U16V2KX-3GP 2 1

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

VDDP
VDDP
5 36 C571 SCD1U10V2KX-4GP
SCD01U16V2KX-3GP VDDC BIASVDD
13 VDDC
20 VDDC XTALVDD
23 2 1
34 C134 SCD1U10V2KX-4GP
VDDC
55 VDDC
60 VDDC DC#38 38
1D2V_LAN_S5 45 MDI1- 1 2 C128 1 2 SCD1U16V2KX-3GP
L10 DC#45 R78 49D9R2F-GP
1 2 39 52 MDI1+ 1 2
BLM15AG601SN1D-1GP AVDDL DC#52 R81 49D9R2F-GP
44 DC#44
2 1C135 46 DC#46
MDI0- 1 2 C597 1 2 SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP 2 1 51 49 R392 49D9R2F-GP
L7 SCD1U10V2KX-4GP C141 DC#51 DC#49 MDI0+
DC#50 50 1 2
1 2 R391 49D9R2F-GP
BLM15AG601SN1D-1GP 35 48
DC#35 DC#48
2 1C138 47
L12 SC4D7U6D3V3KX-GP DC#47
2 1 30 PCIE_PLLVDD
1 2 SCD1U10V2KX-4GP C140 42 MDI1- MDI1- 36 5906 5787
BLM15AG601SN1D-1GP TDN MDI1+
TDP 43 MDI1+ 36
C 2 1C172 27 C
SC4D7U6D3V3KX-GP PCIE_VDD MDI0- R665 ASM DY
2 1 33
PCIE_VDD RDN 41 MDI0- 36
L9 SCD1U10V2KX-4GP C175 40 MDI0+ MDI0+ 36
RDP R666 ASM DY
1 2
BLM15AG601SN1D-1GP 24
SC4D7U6D3V3KX-GP VSS
2 1C147 LINK_LED# 2 R667 ASM DY
SCD1U10V2KX-4GP LAN_LINKLED# 36
2 1 C158 1 LAN_SPD100LED# 36
SCD1U10V2KX-4GP SPD100_LED#
26 GLAN_RXN 2 1 C188 PCIE_C_RXN4 26 PCIE_TXD_P TRAFFIC_LED# 66 LAN_TRAFFICLED# 36
R668 ASM DY
26 GLAN_RXP SCD1U10V2KX-4GP 2 1 C198 PCIE_C_RXP4 25
PCIE_TXD_N TP98 TPAD30 C889 ASM DY
26 GLAN_TXN 31 67
PCIE_RXD_P SERIAL_DI TP94 TPAD30
26 GLAN_TXP 32 PCIE_RXD_N SERIAL_DO 62
12 R99 1 DY 2 4K7R2J-2-GP C891 ASM DY
27,40,53 PCIE_W AKE# WAKE
26,32,38,51,53 -PCI_RST 10
PERST# TP243 TPAD30 3D3V_LAN_S5
3 CLK_PCIE_LAN 29 8
PCIE_REFCLK_P GPIO_2 TP241 TPAD30
3 -CLK_PCIE_LAN 28 4
3D3V_LAN_S5 PCIE_REFCLK_N GPIO_0
3D3V_S0 7 EEW P R137 2 1 4K7R2J-2-GP
R399 1 GPIO_1
2 1KR2J-1-GP 54
R398 1 VAUX_PRSNT
2 1KR2J-1-GP 53
R135 1 VMAIN_PRSNT
27 LAN_DISABLE DY 2 0R2J-2-GP 3 65 VPD_CLK
LOW_PWR SCLK
R136 2 1 4K7R2J-2-GP 64 VPD_DATA R107 2 1 4K7R2J-2-GP
SO

1
TP242
R96 1 DY 2 0R2J-2-GP 58 9 TPAD30 R113
27,30,40,41,53 SMB_CLK DC#58 UART_MODE
R92 1 DY 2 0R2J-2-GP 57 4K7R2J-2-GP
27,30,40,41,53 SMB_DATA DC#57 2D5V_LANREG
18
R104 1 REGCTL25
2 200R2F-L-GP 22

2
XTALO
21
XTALI NC#63
63 1 DY 2
B R101 4K7R2J-2-GP B
X1
37 14 1D2V_LANREG
RDAC REGCTL12
1

3 2 3D3V_LAN_S5
11 16 U56
CLKREQ# VSS
1

3 -LAN_CLKREQ TP346 59 1 8
C206 R385 TPAD30 ENERGY_DET A0 VCC EEW P
69 2 7
SC12P50V2JN-3GP 1KR2F-3-GP GND A1 WP VPD_CLK
4 1 3 6
2

A2 SCL VPD_DATA
4 5
GND SDA
1

BCM5906MKMLG-GP
C236 AT24C02BN-SH-T-GP
XTAL-25MHZ-64GP SC12P50V2JN-3GP
2

3D3V_LAN_S5
L42 DY 3D3V_LAN_S5
3D3V_S5 1 2
MLB-201209-8-GP
1

1
3D3V_LAN_S5 C687 C683
SCD01U16V2KX-3GP SC2D2U10V3ZY-1GP C672 C690
E

4
E
U57 SCD01U16V2KX-3GP SC2D2U10V3ZY-1GP

2
1D2V_LANREG B 2D5V_LANREG 3 Q12
5 1 Q2 B
IN OUT MMJT9435T1G-GPU
C C C C
MBT35200MT1G-GP
2
C
1

GND C658
38 LAN_PW R_ON 10R2J-2-GP 2 4 3

1
2
5
6
EN NC#3 C644 1D2V_LAN_S5
R438 SCD1U10V2KX-4GP 2D5V_LAN_S5
SC22U6D3V5MX-2GP

A BOM1 A
2

G5240B1T1U-GP
1

C686 C689
1

Wistron Corporation

1
C299 C286
SCD1U10V2KX-4GP

SC22U6D3V5MX-2GP
2

SCD01U16V2KX-3GP SC10U6D3V5KX-1GP C675 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

SC4D7U6D3V3KX-GP Taipei Hsien 221, Taiwan, R.O.C.

2
Title

LAN BCM5906M
Size Document Number Rev
A3
Olympus SB
Date: W ednesday, December 26, 2007 Sheet 35 of 53
5 4 3 2 1
A B C D E

2D5V_LAN_S5 10/100M Lan Transformer

1
U50
0R3-0-U-GP RJ45-1
1.route on bottom as differential pairs. R382 35 MDI0+ 7 TD+ TX+ 10
RJ45-2
35 MDI0- 8 TD- TX- 9
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

2
3.No vias, No 90 degree bends. RD+ 1 MDI1+ 35 PIN12 : GREEN
XRF_RDC 6 2 PIN14 : ORANGE
4.pairs must be equal lengths. CT RD- MDI1- 35
XFR_RXC 14 RJ1
XFR_CMT CT RJ45-3
4 5.6mil trace width,12mil separation. 11 CT RX+ 16 15 4
XRF_TDC 3 15 RJ45-6 35 LAN_LINKLED# 14
6.36mil between pairs and any other trace. CT RX- 3D3V_LAN_S5_CN
3D3V_LAN_S5 1 2 13
R76 270R2J-L 12
7.Must not cross ground moat,except XFORM-238-GP
35 LAN_SPD100LED#
RJ-45 moat.
RJ45-1 1

RJ45-2 2
RJ45-3 3
4
5
RJ45-6 6
7
LAN_LINKLED# 8
35 LAN_TRAFFICLED# 11
LAN_SPD100LED# 10
3D3V_LAN_S5 1 2 3D3V_LAN_S5_RES 9
R373 470R2J-2-GP 16
LAN_TRAFFICLED#
RJ45-151-GP
C? C? C?

1
1

1
R95 R75

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
22.10245.S21
1

75R2F-2-GP
C563 C572

75R2F-2-GP

2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

C209

2
2
LAN_TERMINAL 1 2
3 3
SC1500P2KV8KX-3GP

2 2

1 BOM1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN connector/NEW CARD/SIM


Size Document Number Rev
A3
Olympus SB
Date: W ednesday, December 26, 2007 Sheet 36 of 53
A B C D E

CLOSE TO
TRANSFORMER
A B C D E

4 4

R280
1 2

0R0603-PAD
3D3V_S5
R276
ANALOG_AGND
1 2

VCC3M_Q34 R286 1 2 10R3F-GP VCC3_ACC 0R0603-PAD

SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
C
E
Q7

1
PDTA114EE-3-GP-U
C441 C440

R2

R1

2
Place close to H8

B
38 -GSENSE_ON
DY

1
3 3
R275
100KR1J-GP GSENSE_Y_R R274 1 2 56KR1J-GP GSENSE_Y 38

1
2
C439 C436

14

15
U32 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
VDD

RES
2 ST YOUT
10
38 GSENSE_TST 3 ANALOG_AGND
GND GSENSE_X_R
XOUT 12
R285 1 2 56KR1J-GP GSENSE_X 38
5
1

1
GND

1
6
R288 R289 GND C443 C442
7
GND SCD1U10V2KX-4GP SCD1U10V2KX-4GP
100KR1J-GP 0R1J-GP

2
1
NC#1
11
2

NC#11 ANALOG_AGND
4
NC#4
13
ANALOG_AGND NC#13
8
NC#8
9 16
NC#9 NC#16

LIS244ALTR-GP-U1

2 2
Primary : STMicro LIS244AL
2nd: ADI ADXL322
Width = 6 mil & Spacing = 10 mil
for three Output traces
ADXL322
LIS244AL No Accel

Layout Comment :
R545 NO_ASM ASM
(1) Place C148, C149, Q18, R116, R121,
R547 ASM ASM C126, C130, R107, R106 close to U18.
(2) Avoid routing under DCDC switching area.
All other ASM NO_ASM

1 BOM1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

G-SENSOR
Size Document Number Rev
A3 SB
Olympus
Date: W ednesday, December 26, 2007 Sheet 37 of 53
A B C D E
5 4 3 2 1

3D3V_AUX_S5 3D3V_S0
RN39 RN38
BAT_SDA 4 1 THER_SDA 4 1
BAT_SCL 3 2 THER_SCL 3 2
3D3V_S5 3D3V_AUX_S5
RN42 RN43
SRN10KJ-5-GP SRN10KJ-5-GP S5_ENABLE 8 1 ACDC_ID 8 1
KBC_MUTE# 7 2 RN47 -CHARGER_ON 7 2
BLUETOOTH_EN 6 3 ACLIM_90W 4 1 LID_CLOSE# 6 3
PCLK_KBC 5 4 CHG_I_PRE_SEL 3 2 EC_PWRBTN# 5 4
3D3V_S0 3D3V_AUX_S5

R282 SRN10KJ-6-GP SRN10KJ-5-GP SRN10KJ-6-GP


1 2

0R2J-2-GP 3D3V_AUX_S5
3D3V_S0
D 26,32,35,51,53 -PCI_RST 51 BAT_IN# R571 D

1
RN48 BAT_IN# 1 2
C777 C808 C433 C396 -EC_SCI 4 1

115
102

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP INT_SERIRQ 470KR2J-2-GP

19
46
76
88
80
3 2

2
4
1 OF 2 U29A

VDD

VCC
VCC
VCC
VCC
VCC
VBAT

AVCC
SRN10KJ-5-GP
28,31 LPC_LAD[0..3]

51,53 AV_INT# 124 104


LPCPD#/GPIO10/HGPIO00 VREF
7
LRESET#
3 PCLK_KBC
2
3
LCLK A/D AD0/GPI90
97
98
INPUT CURRENT MONITOR 51
28,31 -LPC_FRAME R279 LFRAME# AD1/GPI91 TP311 TPAD28
LPC_LAD0 1 233R2J-2-GP 126 99 TP228 TPAD28
R281 LAD0 AD2/GPI92
LPC_LAD1 1 233R2J-2-GP 127 100
R278 LAD1 AD3/GPI93 ACDC_ID
LPC_LAD2 1 233R2J-2-GP 128 108
R277 LAD2 AD4/GPIO05 GSENSE_X 37
LPC_LAD3 1 233R2J-2-GP 1 LPC 96
LAD3 AD5/GPIO04 GSENSE_Y 37
27,32 INT_SERIRQ 125
SERIRQ
26,27,32 PM_CLKRUN# 8
-KBRCIN CLKRUN#/GPIO11/HGPIO02
122 51,53 KCOL[0..15]
KA20GATE KBRST# PCB_VER0
121 101 51,53 KROW[0..7]
-ECSCI_KBC GA20 DA0/GPI94 PCB_VER1
29 105
ECSCI# DA1/GPI95 PCB_VER2
BLON_IN BLON_IN 9
123
SMI# D/A DA2/GPI96
106
107
27 -EC_SWI PWUREQ# DA3/GPI97 -CRT_IN 18

U29B 2 OF 2
7,17,51,53 THER_SDA 68 64 -PM_SLP_S3_1 7,46,50
SDA2 GPIO01
7,17,51,53 THER_SCL
67
69
SCL2 SMB GPIO03
95
93
EC_PWRBTN# 51,53
32KX1 77 53 KCOL0
51 BAT_SDA SDA1 GPIO06/HGPIO06 -AC_IN 51 32KX1/32KCLKIN KBSOUT0/JENK# TP190 TPAD28
70 94 LID_CLOSE# 51 52 KCOL1 TP185 TPAD28
51 BAT_SCL SCL1 GPIO07/HGPIO07 KBSOUT1/TCK KCOL2
119 SCROLL_LED 51,53 51 TP189 TPAD28
GPIO23 KBSOUT2/TMS KCOL3
6 CHG_I_PRE_SEL 51 50 TP182 TPAD28
LDRQ#/GPIO24/HGPIO01 32KX2 KBSOUT3/TDI KCOL4
109 TP_MUTE 31 79 49
GPIO30 32KX2 KBSOUT4 KCOL5
51,53 NUM_LED 81
SWD/GPIO66 SP GPIO31
120
65
LAN_PWR_ON 35 STBY function on
34 KBC_MUTE# 30
CLKOUT/GPIO55 KBSOUT5/TDO
48
47 KCOL6
TP183 TPAD28
GPIO32 PWR_LED 51,53 KBSOUT6/RDY# TP188 TPAD28
66 POWER ON_B 31
PWR_LED pin
39 CIR_RX 1 2 R614 63 43 KCOL7
GPIO33 0R2J-2-GP TB1/GPIO14/HGPIO04 KBSOUT7 KCOL8
C
84
GPIO40
16
17
CAP_LED 51,53 27 SB_PWR_BTN# 117
31
TA2/GPIO20 KBC KBSOUT8
42
41 KCOL9
C
39 BLUETOOTH_EN SPI_DI/GPIO77 GPIO42/TCK AD_OFF 51 51 -CHARGER_ON
DY TA1/GPIO56 KBSOUT9
GPIO_76 KCOL10
83
SPI_DO/GPIO76/SHBM SPI GPIO43/TMS
20 -RSMRST_KBC 27 34 EC_BEEP
32
A_PWM0 KBSOUT10
40
KCOL11
40,53 WIFI_RF_EN 82
91
SPI_SCK/GPIO75 GPIO GPIO44/TDI
21
22 R615
-PM_SLP_S5 13,27,41,48,49 51 BAT_PWM_OUT 118
62
A_PWM1/GPIO21 KBSOUT11
39
38 KCOL12
31 WLAN_LED_DET GPIO81 GPIO45 CHG_LED1 31 17 BRIGHTNESS B_PWM0/GPIO13 KBSOUT12/GPIO64 KCOL13
GPIO46/TRST#
23
24
2 1
0R2J-2-GP
CIR_RX 39 BRIGHTNESS KBSOUT13/GPIO63
37
36 KCOL14 Reserve for Customer design
GPIO47/JEN0# ICH_SPI_WP# 26 KBSOUT14/GPIO62 KCOL15
25 AV_INT1# 51,53 35
GPIO50/TDO KBSOUT15/GPIO61/XOR_OUT
40,53 PCIE_DEBUG_Tx 111 26 CHG_LED2 31 BLON_OUT ACLIM_90W 13 34 1 2 R? HDMI_HPD 25,53
SOUT_CR/GPIO83/BADDR1 GPIO51 PSDAT3/GPIO12 KBSOUT16/GPIO60 0R2J-2-GPGSENSE_TST
40 PCIE_DEBUG_Rx 113 27 BLON_OUT 17 51 CHG_3S3P 12 33 37
SIN_CR/CIRRX/GPIO87 GPIO52/RDY# PSCLK3/GPIO25 KBSOUT17/GPIO57/HGPIO03
TPAD28 TP317 112 28 CCD_ON 17 51 CHG_3S2P 11
GPIO84/HGPIO01/BADDR0 GPIO53 CONFIG ID_003 PSDAT2/GPIO27
73 42 -USB_EN 10
IRRX2_IRSL0/GPIO70 CONFIG ID_002 PSCLK2/GPIO26 KROW0
51,53 ACCESS_LENOVO 114 74 51,53 TP_DATA 71 54
CIRTX/GPIO16/HGPIO04 IRTX/GPIO71 CONFIG ID_001 PSDAT1 KBSIN0 KROW1
39,53 WIRLESS_DISABLE# 14 75 72 PS/2 55
GPIO34/CIRRX2 IRRX1/GPIO72 51,53 TP_CLK PSCLK1 KBSIN1 KROW2 3D3V_AUX_S5
15 110 -GSENSE_ON 37 56
7 S5_ENABLE GPIO36 GPIO82/HGPIO00/TRIS# KBSIN2 KROW3
SER/IR KBSIN3
57
58 KROW4

1
KBSIN4 KROW5
51 SPI_MISO 86 59
3D3V_S0 F_SDI KBSIN5 KROW6 R258
44 51 SPI_MOSI 87 60
VCORF F_SDO KBSIN6 KROW7 10KR2J-3-GP
51 -SPI_CS0 90 FIU 61
1

F_CS0# KBSIN7
DY U?
51 SPI_CLK
1 2 92
F_SCK
AGND

C397 R549
GND
GND
GND
GND
GND
GND

2
3 4 SC1U10V2KX-1GP 85 VCC_POR#
BLON_IN
2

1
11 UMA_BLON_IN B0 A C785 22R2J-2-GP VCC_POR#
2 5
GND VCC
1 6
103

5
18
45
78
89
116

17,24 DIS_BLON_IN B1 S WPC8765LDG-1-GP

2
SC4D7P50V2CN-1GP
WPC8765LDG-1-GP
NC7SB3157P6X-1GP

17,18,25,26 DISCRETE_ENABLE

L =>B0 -UMA 3D3V_AUX_S5


H =>B1 -ATI
R243 R579
B B
GPIO_76 1 2 PCIE_DEBUG_Tx
1 2

R532 1 2 10KR2J-3-GP CONFIG ID_003


4K7R2F-GP 10KR2J-3-GP
DIS CONFIG ID_002
R577 1 2 100KR2J-1-GP

3D3V_S0 R580 1 2 10KR2J-3-GP CONFIG ID_001

R605 1 2 10KR2J-3-GP LT32P


1

R606 1 2 10KR2J-3-GP R572 R578 R534


10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

DY 3D3V_AUX_S5 32KX1
D13
2

R234
-KBRCIN
DY UMA 32KX2
28 -KBRST 6 1 1 2
1

R283 R567 R570

1
KA20GATE 100KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP 20MR3-GP
28 KA20GATE_SB 5 2 DY R235
33KR2J-3-GP
2

4 3 -ECSCI_KBC PCB_VER0
27 -EC_SCI PCB_VER1 X3

2
3
PCB_VER2
CH731UPT-GP 1 2
1

1
R284 R568 R569

4
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP C393 C395

RESO-32D768KHZ-GP
SC15P50V2JN-2-GP SC15P50V2JN-2-GP
DY DY

2
2

A A

PID_LAB1 = 000b ; Lab1


CONFIG_ID PIN 0 1
PID_LAB2 = 001b ; Lab2 BOM1

001 GPIO34 LT32M(DDR2) LT32P(DDR3)


PID_ENG = 010b ; ENG Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
002 GPIO55 UMA DIS Taipei Hsien 221, Taiwan, R.O.C.
PID_PD = 011b ; PD
Title
003 GPIO70 OLympus KBC WPC8765L
Size Document Number Rev
C SA
LT32M
Date: Wednesday, December 26, 2007 Sheet 38 of 53
5 4 3 2 1
5 4 3 2 1

3D3V_S0

DY
1
R239
2
3D3V_BT
BT CONNECTOR 3D3V_AUX_S5
CIR
0R3-0-U-GP
CN7 3D3V_BT

2
U27 9
R591
5 1 1 10KR2J-3-GP
IN OUT 3D3V_S0
2

SC22U6D3V5MX-2GP

SCD1U10V2KX-4GP
1

1
GND C406 C401 U33
4 3 2 USB_PP5_BT 26,53

1
38 BLUETOOTH_EN EN NC#3
D
3 USB_PN5_BT 26,53 D
4

2
BLUETOOTH_LED 31,53
G5240B1T1U-GP 5 WIFI_BUSY 40,53 38 CIR_RX 4
CIR VS OUT
6 1 2 3
BT_BUSY 40,53 R590 100R2F-L1-GP-U VS
7 2
GND
8 1
C813 C809 GND

SB

1
10

SCD1U16V2ZY-2GP
ACES-CON8-4-GP-U TSOP36136-GP

2
SC4D7U10V5ZY-3GP
20.F0772.008 75.36136.010
MAIN SOURCE:20.F0772.008
SECOND SOURCE:20.F0983.008

C
MDC 1.5 CONN C

1D5V_S0
3D3V_MDC 3D3V_S5

MDC1 1 2
WIRELESS SWITCH

SC4D7U10V5ZY-3GP
R212 0R3-0-U-GP

SC4D7U10V5ZY-3GP
NP1 C366 3D3V_S0

1
14 C368
13 15 C1009
1 2 SC1U10V3ZY-6GP
2

1
28,53 ACZ_SDATA_OUT_MDC 3 4
5 6 R242
28,53 ACZ_SYNC_MDC 7 8 CN17 100KR2J-1-GP
28,53 ACZ_SDATAIN_MDC 9 10
11 12 4

2
28,53 -ACZ_RST_MDC ACZ_BITCLK_MDC 28,53
16 18 1
1

17
1

C365 NP2 2 WIRLESS_DISABLE# 38,53


SC22P50V2JN-4GP R468 3
2

5
100KR2J-1-GP

1
TYCO-CONN12A-4-GP
C417
2

SW-SLIDE43-GP-U SCD1U16V2ZY-2GP

2
DY

MAIN SOURCE:20.F0677.012 62.40018.211


SECOND SOURCE:20.F0676.012

B B

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Module_Blue Tooth/Modem/CIR
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 39 of 53
5 4 3 2 1
A B C D E

Mini PCI-E Connector Mini PCI-E Connector


Only port-1 support USB
For Robson
4
Port-1 High Port-2 low
4

53 5V_DEBUG
3D3V_S0
1D5V_S0 3D3V_S0
1D5V_S0
CN12
CN16
6 13 CLK_PCIE_MINI_1 3,53
1.5V REFCLK+
11 -CLK_PCIE_MINI_1 3,53 6 13 CLK_PCIE_MINI_2 3,53
REFCLK- 1.5V REFCLK+
2 11 -CLK_PCIE_MINI_2 3,53
3.3V REFCLK-
23 PCIE_RXN1 26,53 2
PERN0 3.3V
28 25 PCIE_RXP1 26,53 23 PCIE_RXN2 26,53
+1.5V PERP0 PERN0
48 28 25 PCIE_RXP2 26,53
3D3V_S5 +1.5V +1.5V PERP0
31 PCIE_TXN1 26,53 48
PETN0 3D3V_S5 +1.5V
52 33 PCIE_TXP1 26,53 31 PCIE_TXN2 26,53
+3.3V PETP0 PETN0
52 33 PCIE_TXP2 26,53
+3.3V PETP0
24 36 USB_PN7_MINI 26,53
+3.3VAUX USB_D-
38 USB_PP7_MINI 26,53 24 36
USB_D+ +3.3VAUX USB_D-
38
RN34 SMB_CLK USB_D+
3 30 1 4 SMB_CLK 27,30,35,41,53
RESERVED#3 SMB_CLK SRN0J-6-GP SMB_DATA
5 32 2 3 SMB_DATA 27,30,35,41,53 39,53 BT_BUSY 3 30
RESERVED#5 SMB_DATA RESERVED#3 SMB_CLK
8 5 32
RESERVED#8 39,53 WIFI_BUSY RESERVED#5 SMB_DATA
10 8
RESERVED#10 PCIE_WAKE# RESERVED#8
12 1 10
RESERVED#12 WAKE# RESERVED#10
14 7 12 1 PCIE_WAKE# 27,35,53
RESERVED#14 CLKREQ# RESERVED#12 WAKE#
16 22 -PLT_RST 10,20,26,31,41,53 14 7
RESERVED#16 PERST# RESERVED#14 CLKREQ#
17 16 22 -PLT_RST 10,20,26,31,41,53
RESERVED#17 RESERVED#16 PERST#
19 38 PCIE_DEBUG_Rx 17
RESERVED#19 RESERVED#17
20 4 38,53 PCIE_DEBUG_Tx 19
RESERVED#20 GND RESERVED#19
37 9 38,53 WIFI_RF_EN 20 4
RESERVED#37 GND RESERVED#20 GND
39 15 37 9
RESERVED#39 GND RESERVED#37 GND
3 41 18 39 15 3
RESERVED#41 GND RESERVED#39 GND
43 21 41 18
RESERVED#43 GND RESERVED#41 GND
45 26 43 21
RESERVED#45 GND 5V_AUX_S5 RESERVED#43 GND
47 27 45 26
RESERVED#47 GND RESERVED#45 GND
49 29 47 27
RESERVED#49 GND R507 RESERVED#47 GND
51 34 49 29
RESERVED#51 GND 5V_DEBUG RESERVED#49 GND
35 1 2 51 34
GND RESERVED#51 GND
GND
40
0R2J-2-GP
DY GND
35
42 50 40
LED_WWAN# GND GND
44 53 42 50
LED_WLAN# GND LED_WWAN# GND
46 54 31,53 WLAN_LED 44 53
NP1
NP2

LED_WPAN# GND LED_WLAN# GND


46 54

NP1
NP2
LED_WPAN# GND

SKT-MINI52P-5-GP
NP1
NP2

SKT-MINI52P-9-GP

NP1
NP2
20.F0832.052
62.10043.411
MAIN SOURCE:20.F0832.052
SECOND SOURCE:20.F1107.052 MAIN SOURCE:62.10043.411
SECOND SOURCE:20.F1084.052

3D3V_S0 1D5V_S0 3D3V_S5 3D3V_S0 1D5V_S0 3D3V_S5


1

1
C705 C398
C370 C695 C698 SCD1U16V2ZY-2GP C795 C375 C391 SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
2

2
2 2

1 1

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD CONN .


Size Document Number Rev
C
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 40 of 53
A B C D E
5 4 3 2 1

NEWCARD
Connector -CPPE

-PERST
-CPPE 53

-PERST 53
D -CPUSB D
-CPUSB 53

NP2
26
Place them Near to Chip Place them Near to Connector 26,53 PCIE_TXP3 25
26,53 PCIE_TXN3 24
23
26,53 PCIE_RXP3 22
3D3V_S5 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5 26,53 PCIE_RXN3 21
20
3,53 CLK_PCIE_NEW 19
3,53 -CLK_PCIE_NEW 18
-CPPE 17
1

1
3,53 -NEWCARD_CLKREQ 16
C771 C761 C763 C770 C767 C764 15
3D3V_NEW_S0
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
14
SCD1U16V2ZY-2GP
2

2
DY -PERST 13
3D3V_NEW_LAN_S5 12
11
1D5V_NEW_S0 10
C 9 C
27,30,35,40,53 SMB_DATA 8
27,30,35,40,53 SMB_CLK 7
TP204 TPAD34 CONN_TP2 6
TP203 TPAD34 CONN_TP3 5
-CPUSB 4
3D3V_NEW_S0 1D5V_NEW_S0 26,53 USB_PP9_NEWCARD 3
26,53 USB_PN9_NEWCARD 2

1
NP1

11
13
3
5
U64
CN15

3.3VOUT
3.3VOUT

1.5VOUT
1.5VOUT
50 -PM_SLP_S3_2

7 CARDBUS26P-14GP
GND
1
10,20,26,31,40,53 -PLT_RST 1 2 6
STBY#
21 62.10024.A01
R491 33R2J-2-GP -PERST SYSRST# THERMAL_PAD
8 PERST#
-CPUSB 9 18 1 2 -NEWCARD_RST 27
-CPPE CPUSB# RCLKEN R528 DUMMY-R2
10 CPPE# AUXIN 17 3D3V_S5
TP293 -NEWCARD_OC 19 15
OC# AUXOUT 3D3V_NEW_LAN_S5
13,27,38,48,49 -PM_SLP_S5 TPAD28 20 SHDN#
16
3.3VIN
3.3VIN

1.5VIN
1.5VIN

NC#16
B B
2

C725
SC22P50V2JN-4GP R5538D001-TR-FGP
2
4

12
14
1

3D3V_S0 1D5V_S0
1

1
C765 C762 C774 C778
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP
2

BOM1

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number


Module_NewCard Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 41 of 53
5 4 3 2 1
5 4 3 2 1

USB * 2 PORT
D D

Low -End USB BOARD

1394 ACES-CON5-GP

5
33 TPA0P-1 4
33 TPA0N-1 3
33 TPB0P-1 2

33 TPB0N-1 1

6
C CN5 C

MAIN SOURCE:20.k0196.005
SECOND SOURCE:20.K0212.008

5V_S5 3D3V_S5

5V_USB1_S5 5V_USB2_S5 USB*2 + 1394


2

R255 R256
SCD1U16V2ZY-2GP

B 5V_S0 B
C413 10KR2J-3-GP 10KR2J-3-GP
1

U30
5V_USB2_S5 CN8
2

1 GND OC1# 8 USB_OC#2 26 17


2 7 5V_USB1_S5
IN OUT1
3 EN1/EN1# OUT2 6 1
4 EN2/EN2# OC2# 5 USB_OC#0 26
33,53 TPA0P-2 2
33,53 TPA0N-2 3
G546B1P81U-GP 33,53 TPB0P-2 4
33,53 TPB0N-2 5
2

6
R240 7
0R2J-2-GP 8
9
26,53 USB_PN0 10
1

26,53 USB_PP0 11
12
26,53 USB_PN2 13
26,53 USB_PP2 14 BOM1
15
16
A A
-USB_EN 38
18 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ETY-CON16-1-GP Taipei Hsien 221, Taiwan, R.O.C.
20.K0222.016 Title

USB I/O & 1394 CNN


Size Document Number Rev
B
Olympus SB
Date: Wednesday, December 26, 2007 Sheet 42 of 53
5 4 3 2 1
5 4 3 2 1

3D3V_AUX_S5

1
2N7002SPT 29,42,46,47,48,49,50,51,53 5V_S5 5V_S5
R603
10KR2J-3-GP
1 6 13,25,26,27,29,30,31,35,37,38,39,40,41,42,48,49,50,51,53 3D3V_S5 3D3V_S5
0R2J-2-GP

2
50 5V_S5_EN 2 1 2 5

1
C740
R499 51125_ENTIP1 3 4
DY

1
SCD1U25V3ZY-1GP
C736

SC18P50V2JN-1-GP
R495 Q5
DY

130KR2F-GP

2
2
D 3D3V_AUX_S5 D

1
3D3V_PWR 3D3V_S5 2N7002SPT DCBATOUT_5D5V DCBATOUT 5V_PWR 5V_S5
R517 G79
G87 10KR2J-3-GP 1 2
1 2 1 6 G71
0R2J-2-GP 1 2 GAP-OPEN-PWR

2
GAP-OPEN-PWR 2 1 2 5 G80
50 3D3V_S5_EN

1
G86 GAP-OPEN-PWR 1 2
1 2 R500 51125_ENTIP2 3 4 G73
DY 1 2 GAP-OPEN-PWR

1
SCD1U25V3ZY-1GP
GAP-OPEN-PWR C814 C757 G77

SC18P50V2JN-1-GP
G85 R515 Q6 GAP-OPEN-PWR 1 2
1 2 G74

130KR2F-GP
DY 1 2 GAP-OPEN-PWR

2
GAP-OPEN-PWR G76

2
G84 GAP-OPEN-PWR 1 2
1 2 G75
1 2 GAP-OPEN-PWR
GAP-OPEN-PWR G78
G81 GAP-OPEN-PWR 1 2
1 2 G72
1 2 GAP-OPEN-PWR
GAP-OPEN-PWR G70
DCBATOUT DCBATOUT_3D3V G82 GAP-OPEN-PWR 1 2
G89 1 2
1 2 GAP-OPEN-PWR
GAP-OPEN-PWR G69
GAP-OPEN-PWR G83 1 2
G90 1 2
1 2 GAP-OPEN-PWR
GAP-OPEN-PWR DCBATOUT_5D5V DCBATOUT_5D5V
GAP-OPEN-PWR
G91 DCBATOUT_3D3V
1 2 C750 C749

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
C C733 C732 C

1
GAP-OPEN-PWR C752 C751
1

SC10U25V6KX-1GP

SC10U25V6KX-1GP
C734
SC10U25V6KX-1GP

SC10U25V6KX-1GP

C753
5V

2
SCD1U25V3ZY-1GP
3.3V D DU58 DY
2

8
7
6
5

5
6
7
8
SCD1U25V3ZY-1GP

DY Design Current =6.3A

D
D
D
D
D
D
D
D

Design Current =6A U63


MAX current =8.8

FDS8884-GP
16
MAX current =
FDS8884-GP

U62
OCP design = 8.5A

VIN
OCP design = A

G
S
S
S
SCD1U25V3KX-GP
S
S
S
G

C758 C737
G S
1
2
3
4

4
3
2
1
S G 2 151125_VBST2+ 51125_VBST2 9 22 51125_VBST1 51125_VBST1+ 1 2
VBST2 VBST1
3D3V_PWR SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 5V_PWR
L53 DRVH2 DRVH1 L52
1 2 51125_LL2 11 20 51125_LL1 1 2
IND-3D3UH-57GP LL2 LL1
51125_DRVL2 12 51125_DRVL1
D 19
1

TC22 DRVL2 DRVL1 IND-2D2UH-46-GP-U


D
1

8
7
6
5

5
6
7
8

1
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP

D
D
D
D
ST220U6D3VDM-20GP

FDS6690DS-GP
D
D
D
D

C817 U61 51125_VO2 7 24 51125_VO1 U59 C816


2

1
VO2 VO1
FDS6690DS-GP

G33 TC21
2

2
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
51125_FB2 5 2 51125_FB1
DY VFB2 VFB1 DY

ST220U6D3VDM-20GP
2
1

G34

2
G
S
S
S
S
S
S
G

1 2 13 23
R514 820KR2F-GP EN0 PGOOD
G S
1
2
3
4

4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2

+51120_VREF ENTRIP2 ENTRIP1


3 15
VREF GND
1
SCD22U6D3V2KX-1GP

C747 51125_TONSEL 4 25 1 2
TONSEL GND
G88

1
GAP-OPEN-PWR
2
1

51125_SKIPSEL 14 18 3D3V_PWR R502


1

1
SKIPSEL VCLK

100KR2J-1-GP
0R2J-2-GP DY

1
B B
DYR513 R496 R504
VREG3

VREG5

R512 0R2J-2-GP 30KR2F-GP

1 2
6K65R2F-GP
1 2
2

2
C743 TPS51125RGER-GP C742 DY
8

17

2
DYSC18P50V2JN-1-GP SC18P50V2JN-1-GP

2
3D3V_AUX_S5 5V_AUX_S5
DY
2

1
1

CPUCORE_ON 44,46,47,48,50
1

SC10U10V5KX-2GP

R508 C759 C741 R503


10KR2F-2-GP 20KR2F-L-GP
SC10U10V5KX-2GP
2

2
2

5V_AUX_S5 2 1
0R2J-2-GP R506
3D3V_AUX_S5 2 DY 1
0R2J-2-GP R505
+51120_VREF 2 DY 1
0R2J-2-GP R497
2 DY 1
0R2J-2-GP R498

3D3V_AUX_S5 2 1
0R2J-2-GP R519
+51120_VREF 2 DY 1
0R2J-2-GP R520
2 DY 1
0R2J-2-GP R518

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DCDC 5V/3D3V (TPS51125)
Size Document Number Rev

Olympus SA
Date: Wednesday, December 26, 2007 Sheet 43 of 53
5 4 3 2 1
5 4 3 2 1

5,45 VCC_CORE VCC_CORE

10,27 PM_DPRSLPVR

D 4,10,28 -DPRSTP D

DCBATOUT DCBATOUT_6266A 10,27 -VGAET_PWRG


DCBATOUT_6266A
G11
1 2
3D3V_S0

C481
GAP-OPEN-PWR C46 C54 C44 C489 C41 C42
CPUCORE_ON 43,46,47,48,50

5
6
7
8

1
G12

10R3F-GP

D
D
D
D
1 2 U40
VID[6..0] 5

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
NTMFS4841NT1G-GP

2
GAP-OPEN-PWR

SCD1U25V3ZY-1GP
G13

VID6

VID5

VID4

VID3

VID2

VID1

VID0
1 2

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

G
S
S
S
R44
DY DY DY

499R3F-GP
2
GAP-OPEN-PWR

4
3
2
1
G10
1 2

2
VCC_CORE

1
GAP-OPEN-PWR C73
G7 6266A_UGATE1

SCD1U10V2KX-4GP
1 2

R335

R337

R336

R342

R341

R340

R344

R338

R346

R345
Iomax: 38A

6266A_DPRSLPVR
6266A_CLK_EN# 1

6266A_DPRSTP#1

1
R45
GAP-OPEN-PWR L27
G8 6266A_PHASE1 1 2

6266A_VRON
1 2 IND-D36UH-9-GP

6266A_3V3

6266A_D6

6266A_D5

6266A_D4

6266A_D3

6266A_D2

6266A_D1

6266A_D0
68.R3610.20C

1
GAP-OPEN-PWR

5
6
7
8

5
6
7
8
G9 3D3V_S0 TC3 TC1 TC8

D
D
D
D

D
D
D
D

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
1 2 U42 U7 U43 DY

2
NTMFS4835NT1G-GP NTMFS4835NT1G-GP

1
GAP-OPEN-PWR

48

44
49

45

43

42

41

40

39

38

37
47

46

2
R29
1D05V_S0 1K91R2F-1-GP G16 G18

3V3

VR_ON
DPRSLPVR

VID6

VID5

VID4

VID3

VID2

VID1

VID0
GND

DPRSTP#
CLK_EN#

G
S
S
S

G
S
S
S
GAP-CLOSE GAP-CLOSE
Place close to

4
3
2
1

4
3
2
1

1
C 1st phase choke 1 36 R334 1 2 1R3F-GP 6266A_ LGATE1 C
1

1
10 VR_PWRG R38 PGOOD BOOT1

C503
4 -PSI 1 26266A_PSI# 2 35 6266A_UGATE1 -SB modify
R31 0R2J-2-GP PSI# UGATE1

2
499R2F-2-GP SCD1U25V3KX-GP 1 2 6266A_PMON 3 34 6266A_PHASE1
C75 R39 4K99R2F-L-GP PMON PHASE1 SCD22U50V3ZY-1GP
2

1 2 1 26266A_RBIAS 4 33
R33 147KR2F-GP RBIAS PGND1
5V_S0
5 32 6266A_ LGATE1 6266A_VSUM 1 R312 2 3K65R3F-GP
4 -PROCHOT VR_TT# LGATE1
1 2 1 R328 2 6266A_NTC 6 31 1 2C497 6266A_ISEN1 1 R313 2 10KR2F-2-GP
R327 4K02R2F-GP NTC PVCC
C72 C71 1 26266A_SOFT 7 30 6266A_LGATE2 SC2D2U16V3KX-GP
NTC-10K-9-GP SCD015U50V3KX-GP SOFT ISL6266AHRZ-GP LGATE2 6266A_VO
1 2 1 R316 2 1R2F-GP
6266A_VO 1 R25 26266A_OCSET8 74.06266.073 29
OCSET PGND2 6266A_ISEN2
SCD01U25V2KX-3GP 12K7R3F-GP 1 R317 2 10KR2F-2-GP
C66 1 2SC1000P50V3JN-GP 6266A_VW 9 28 6266A_PHASE2

1
VW PHASE2 DCBATOUT_6266A
1 R23 2 6266A_COMP10 27 6266A_UGATE2 C64
8K25R2F-1-GP COMP UGATE2 SCD22U50V3ZY-1GP

2
C56 6266A_FB 11 26 6266A_BOOT2
1 2
FB BOOT2

C492
1 2 R21 1R3F-GP C504 C509 C501 C496

1
6266A_FB2 12 25 C47

5
6
7
8
FB2 NC#25

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SC100P50V2JN-3GP SE100U25VM-14GP

D
D
D
D

SC10U25V6KX-1GP
DROOP

C61 U38
DY DY

2
VSUM

ISEN2

ISEN1
VDIFF

VSEN

1 R20 2 1 2 NTMFS4841NT1G-GP

GND

VDD
RTN

DFB
1

VIN

SCD1U25V3ZY-1GP
97K6R2F-GP VO
SC270P50V2KX-1GP R323
1KR2F-3-GP
13

14

15

16

17

18

19

20

21

22

6266A_ISEN2 23

24

G
S
S
S
SCD22U10V2KX-1GP
C487 C491
2

4
3
2
1
6266A_DROOP

1 R19 2 1 2 6266A_ISEN1 1 2
6266A_VDIFF

6266A_VSUM
6266A_RTN

6266A_VIN
6266A_DFB
6266A_VSEN

6266A_VDD
100R2F-L1-GP-U
6266A_VO

SC2200P50V2KX-2GP
R309

VCC_CORE
6266A_UGATE2
1

1 2 6266A_VO
1KR2F-3-GP
1

B B
DCBATOUT_6266A 6266A_PHASE2 1 2
R14
R322

C490 SCD22U10V2KX-1GP
13K3R2F-2-GP

1 2 5V_S0 L26 IND-D36UH-9-GP


2

5
6
7
8

5
6
7
8

1
1KR2F-3-GP 68.R3610.20C TC9 TC7 TC6
10R3F-GP

D
D
D
D

D
D
D
D
R13

U39 U5
2

SE330U2VDM-L-GP
SE330U2VDM-L-GP

ST470U2D5VDM-5GP
1 2 NTMFS4835NT1G-GP NTMFS4835NT1G-GP
SC330P50V2KX-3GP

2
R12 10R3F-GP
1

C486 C51
1

2
G17
G
S
S
S

G
S
S
S
2

C52 C50 G15

4
3
2
1

4
3
2
1
SC180P50V2JN-1GP

SC1U16V3KX-2GP GAP-CLOSE
2

2
SCD01U50V2ZY-1GP

GAP-CLOSE
1

1
1 R10
2 C485 6266A_LGATE2
5 VCORE_VCCSENCE 0R2J-2-GP
SCD22U10V2KX-1GP
2
1
SC330P50V2KX-3GP

C53
2

1 R11
2 6266A_VSUM 1 R311 2 3K65R3F-GP
5 VCORE_VSSSENCE 0R2J-2-GP
1 2 6266A_ISEN2 1 R318 2 10KR2F-2-GP
1

R15 0R0402-PAD
C49
6266A_VO 1 R315 2 1R2F-GP
2

6266A_VSUM SCD01U25V2KX-3GP
6266AGND 6266A_ISEN1 1 R314 2 10KR2F-2-GP
1

C483 C484 R305


2

2K61R2F-1-GP
SCD22U10V3KX-2GP

SCD022U50V3KX-GP

R308
11KR2F-L-GP
1

1 2

Place close to 1st Choke


2

R331
NTC-10K-9-GP

A A
2

6266A_VO

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ISL6266A_CPU_CORE
Size Document Number Rev

LT32M SA
Date: Wednesday, December 26, 2007 Sheet 44 of 53
5 4 3 2 1
D

SA
Wistron Corporation

Rev

53
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

VCCCPUCORE DECOUPLING
Taipei Hsien 221, Taiwan, R.O.C.

of
45
Sheet
LT32M
1

1
Date: Wednesday, December 26, 2007
Document Number
Custom
BOM1

Size
Title

SC10U6D3V5MX-3GP
C651
1 2
SC10U6D3V5MX-3GP
C586
1 2
2

2
SC10U6D3V5MX-3GP
C560
1 2
SC10U6D3V5MX-3GP
C648
1 2
SC10U6D3V5MX-3GP
C646
1 2
C561

SC10U6D3V5MX-3GP
VCC_CORE

C636
1 2 1 2
10UF 6.3V X5R 2125 1/16W X16 PCS

SC10U6D3V5MX-3GP
C557

1 2
SC10U6D3V5MX-3GP
C578
3

3
1 2
SC10U6D3V5MX-3GP
C567

10UF 6.3V X5R 2125 1/16W X16 PCS


SC10U6D3V5MX-3GP 1 2
C577
1 2 SC10U6D3V5MX-3GP
C587

C652
SC10U6D3V5MX-3GP
C556 1 2 1 2
1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
C566

C643
SC10U6D3V5MX-3GP
C645
1 2 1 2 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
C558

C653
SC10U6D3V5MX-3GP
C647
1 2 1 2 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
C596

C595
SC10U6D3V5MX-3GP
C594
1 2 1 2 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
4

4
C562

C650
SC10U6D3V5MX-3GP
C552
1 2 1 2 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP

C553

C649
SC10U6D3V5MX-3GP
VCC_CORE

VCC_CORE

VCC_CORE
C551
1 2 1 2 1 2
SC10U6D3V5MX-3GP SC10U6D3V5MX-3GP
5

5
D

A
5 4 3 2 1

DCBATOUT DCBATOUT_SC412A_1
1 2
G59 GAP-OPEN-PW R

5V_S5 G58
1 2
5V_S5

1
GAP-OPEN-PW R
R406 DCBATOUT_SC412A_1
10R3F-GP G57
1 2

1
D 3D3V_S0 C618 D

1 2
D15 GAP-OPEN-PW R

1
CH521S-30-GP-U1 C622 C612 C626

5
6
7
8
C623

SC10U25V6KX-1GP

SC10U25V6KX-1GP
1

D
D
D
D

SCD1U25V3ZY-1GP

SC2200P50V2KX-2GP
SC1U16V3KX-2GP U55

2
R384 NTMFS4841NT1G-GP
10KR2F-2-GP U51
C615 Design Current =15A

3
DY
1 2 SC412A_LX_1 MAX current =22

VCC
2

G
S
S
S
R388
OCP design =

4
3
2
1
1D05V_PW RGD SCD1U16V2KX-3GP
43,44,47,48,50 CPUCORE_ON 1 2 11 2
PGOOD BST SC412A_DH_1
1D05V_PW R
0R2J-2-GP L45
16 SC412A_DH_1
DH
1 2
SC412A_LX_1 COIL-1UH-33-GP

SC18P50V2JN-1-GP
1
1 SC412A_LX_1
LX

C580
SC412A_DL_1 R390

5
6
7
8

5
6
7
8

1
R387 18K2R3F-GP
DY

D
D
D
D

D
D
D
D
7,38,50 -PM_SLP_S3_1 1 2 1KR2F-3-GP 12 13 RILIM_1 1 2 SC412A_LX_1 U54 U13 TC11 TC20 1D05V_PW R 1D05V_S0

2
EN ILIM
1

SE330U2VDM-L-GP

SE330U2VDM-L-GP
R402 4K02R2F-GP

2
NTMFS4835NT1G-GP
C575 SC412A_VFB_1 1 2

NTMFS4835NT1G-GP
SCD1U25V3ZY-1GP 7 4 SC412A_DL_1 -SB modify G61 GAP-OPEN-PW R
2

NC#7 DL

1
1 2

G
S
S
S

G
S
S
S
8 R393 G27 GAP-OPEN-PW R
NC#8 SC412A_VFB_1 45K3R2F-L-GP
9 1 2

4
3
2
1

4
3
2
1
FB G60 GAP-OPEN-PW R
14 NC#14
1 2

2
C 15 10 1D05V_PW R G26 GAP-OPEN-PW R C
NC#15 VOUT
1 2
G62 GAP-OPEN-PW R
GND
PAD

RTN
1 2

1
G63 GAP-OPEN-PW R
SC412AMLTRT-GP C568 1 2
17

G64 GAP-OPEN-PW R

2
SCD01U16V2KX-3GP 1 2
G25 GAP-OPEN-PW R
1 2
G24 GAP-OPEN-PW R
1 2
G23 GAP-OPEN-PW R
1 2
G22 GAP-OPEN-PW R
1 2
G67 GAP-OPEN-PW R
1 2
G66 GAP-OPEN-PW R
1 2
G65 GAP-OPEN-PW R
1 2
G20 GAP-OPEN-PW R
1 2
G21 GAP-OPEN-PW R

B B

A BOM1 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SC412A +1.05VM
Size Document Number Rev
A3
LT32M SA
Date: W ednesday, December 26, 2007 Sheet 46 of 53
5 4 3 2 1
5 4 3 2 1

D D

G50 1 2 GAP-OPEN-PWR
DCBATOUT DCBATOUT_SC471
G53 1 2 GAP-OPEN-PWR
5V_S5 5V_S5
G52 1 2 GAP-OPEN-PWR
DCBATOUT_SC471
DIS

1
G51 1 2 GAP-OPEN-PWR
R27
0R3-0-U-GP
DIS

1
1
D3 C69

2
SC471_VCC SC1U10V3ZY-6GP
DIS DIS DIS

2
DIS DIS DIS

1
CH521S-30-GP-U1 C499 C493 C495
C70 C500

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SC2200P50V2KX-2GP
SC1U10V3ZY-6GP SCD1U25V3ZY-1GP

2
5
6
7
8
D
D
D
D
U45
U41 NTMFS4841NT1G-GP

3
DIS

VCC
R321
DIS

G
S
S
S
0R2J-2-GP
1 2 1D5V_PGOOD 11 2 471_BST C494

4
3
2
1
43,44,46,48,50 CPUCORE_ON PGOOD BST
SCD1U16V2KX-3GP

1
16 SC471_DH
50 VCCGFXCORE_EN 12
DH DIS VGA_CORE_S0
EN L34
C 1 SC471_LX 1 2 C
LX COIL-1UH-33-GP

13 1 2 -SB modify C59

1
ILIM R326 8K66R2F-GP
DIS

1
14 R16 C55
DY

5
6
7
8

1
G0 10KR2F-2-GP TC17
4

2
DL

D
D
D
D

SCD1U50V3ZY-GP
U44 ST470U2D5VDM-5GP
DY

SC47P50V2JN-3GP
21 PWRCNTL_0

2
9 SC471_FB
FB

NTMFS4835NT1G-GP
DIS
2

VGA_CORE_S0
-SB modify 15
G1

G
S
S
S
10

1
R324 VOUT
DIS

4
3
2
1
1

1
100KR2F-L1-GP R18 -SB modify
DIS
GND
PAD

RTN
C488 SC471_DL R310 41K2R2F-GP
Vout G1 G0

D1

D0
1

33KR2J-3-GP
DIS

1
0.9 1 1 SCD01U16V2KX-3GP
17

2
SC471AMLTRT-GP
R17

2
1.0 1 0 49K9R2F-L-GP
VGA_AGND 33KR2J-3-GP DIS
0.9 0 1 21 PWRCNTL_1 R320 1 2 DIS Design Current = 15A

2
1.1 0 0 DIS
2

1
R325
VGA_AGND C57
C62
OCP design = 24A
DIS 100KR2F-L1-GP 1 2 SC1500P50V2KX-2GP SC1KP50V2KX-1GP

2
R319 41K2R2F-GP
1

DIS DIS

VGA_AGND
-SB modify 21,23,24 VGA_CORE_S0 VGA_CORE_S0

close to IC
B B

G14

2 1

GAP-CLOSE
VGA_AGND

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SC471A_VGA CORE
Size Document Number Rev
C
LT32M SA
Date: Wednesday, December 26, 2007 Sheet 47 of 53
5 4 3 2 1
5 4 3 2 1

5V_S5
DIS: R791 10K
5V_S5
R792 10K

1
R294 1.5V_PW R 1D5V_S3
10R3F-GP
UMA: R791 42.2K 1 2

1
3D3V_S5 G39 GAP-OPEN-PW R
R792 30K

1 2
D14 1 2
CH521S-30-GP-U1 DCBATOUT G40 GAP-OPEN-PW R
C456 1 2

1
SC1U16V3KX-2GP G5 GAP-OPEN-PW R

2
D R297 1 2 D
10KR2F-2-GP U1 G41 GAP-OPEN-PW R
C448

1
C2 C451 1 2

5
6
7
8

1
1 2 SC412A_LX_2 G43 GAP-OPEN-PW R

VCC

SC10U25V6KX-1GP

SC10U25V6KX-1GP
2

D
D
D
D
U2 C450 1 2

2
NTMFS4841NT1G-GP SCD1U25V3ZY-1GP G1 GAP-OPEN-PW R

2
SCD1U16V2KX-3GP
10,49 M_PROK 11 PGOOD BST 2 1 2
G42 GAP-OPEN-PW R
1 2

G
S
S
S
16 SC412A_DH_2 G2 GAP-OPEN-PW R
DH
1 2

4
3
2
1
G4 GAP-OPEN-PW R
1 SC412A_LX_2 SC412A_DH_2 1 2
LX 1.5V_PW R G3 GAP-OPEN-PW R
R291 L24

13,27,38,41,49 -PM_SLP_S5 1 R295


2 12 13 RILIM_2 1 2 SC412A_LX_2 SC412A_LX_2 1 2
EN ILIM
1

1KR2F-3-GP COIL-1UH-34-GP

SCD1U10V2KX-4GP
SC18P50V2JN-1-GP
1
C452 -SB modify
SC412A_DL_27K68R2F-GP

C3
C455
SCD1U25V3ZY-1GP 7 4 SC412A_DL_2 R293
2

NC#7 DL

5
6
7
8

1
DY

D
D
D
D
U4 10KR2F-2-GP TC15
8
DY

2
NC#8 SC412A_VFB_2 SE330U2VDM-L-GP
9 NTMFS4835NT1G-GP

2
FB SC412A_VFB_2
14 NC#14

1
15 10 1.5V_PW R
NC#15 VOUT

G
S
S
S
GND R296
PAD

RTN

4
3
2
1
10KR2F-2-GP

2
C SC412AMLTRT-GP C453 C
17

2
SCD01U16V2KX-3GP 1D5V_AGND

1D5V_AGND

1D5V_AGND
Design Current =12A
MAX current =
OCP design =
G38

2 1

GAP-CLOSE
1D5V_AGND

1D5V_S3
5V_S5

1
C345
1D1V_S0

SC10U10V5ZY-1GP
C346 C349
SCD1U50V5KX-1GP

2
SCD1U10V2KX-4GP
Iomax=3A

2
U18

6
B R1009 B

DY 0R2J-2-GP

VCNTL
2 1 5912_POK_7_1 7 5
43,44,46,47,50 CPUCORE_ON POK VIN
9 1D1V_PW R 1D1V_S0
VIN
50 1D1V_SO_EN 8 3 1 2
EN VOUT G28 GAP-OPEN-PW R
4
VOUT

1
1 2

1
R187 C336 TC12 C344 G29 GAP-OPEN-PW R

DUMMY = DY
SC56P50V2JN-2GP

ST100U4VBM-L-GP

SC22U6D3V5MX-2GP
2 30KR2F-GP 1 2

GND
FB G30 GAP-OPEN-PW R

2
DDR3_VREF_S3 5V_S5 1D5V_S3 1 2

2
APL5912-KAC-GP 5915_FB_1 G31 GAP-OPEN-PW R

1
74.05912.A71 modify 0606

1
1

R183
1

C1 C449 C445 75KR2F-GP


C454 SC10U10V5KX-2GP SCD1U10V2KX-4GP +0.75V_P 0D75V_S3
2

SCD1U10V2KX-4GP SC1U10V2KX-1GP
2

2
1 2
G35 GAP-OPEN-PW R
R292 U3
Vo=0.8*(1+(R1/R2))
2 1 1 2 -SB modify
0R2J-2-GP 10 1 G36 GAP-OPEN-PW R
VIN VDDQSNS
13,27,38,41,49 -PM_SLP_S5 2 1 9 2
R298 0R2J-2-GP S5 VLDOIN
8 3 1 2
GND VTT G37 GAP-OPEN-PW R
27,50 -PM_SLP_S3 2 1 7 4
R299 0R2J-2-GP S3 PGND
6 5
VTTREF VTTSNS
GND

A BOM1 A
DY
1

TPS51100DGQR-GP C447 C446


Wistron Corporation
11

SC10U10V5KX-2GP SC10U10V5KX-2GP
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

SC412A_1.5V/1.1V/0.75V
Size Document Number Rev

Olympus SA
Date: W ednesday, December 26, 2007 Sheet Sheet 48 of 53
5 4 3 2 1
5 4 3 2 1

D D

5V_S5 DCBATOUT DCBATOUT_SC412A_3


1 2
5V_S5 G46 GAP-OPEN-PWR

1 R302 1.8V_PWR 1D8V_S3


10R3F-GP G45
1 2 1 2

1
3D3V_S5 G48 GAP-OPEN-PWR
1 2

D2 GAP-OPEN-PWR 1 2
CH521S-30-GP-U1 DCBATOUT_SC412A_3 G49 GAP-OPEN-PWR
C459 G44 1 2
1

SC1U16V3KX-2GP 1 2 G54 GAP-OPEN-PWR


2

2
R1 1 2
C 10KR2F-2-GP U35 GAP-OPEN-PWR G47 GAP-OPEN-PWR C
C17
3

1
C461 C460 1 2
DY

5
6
7
8

1
1 2 SC412A_LX_3 U36 G55 GAP-OPEN-PWR
VCC
2

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP
C462 1 2

2
R1010

FDS8884-GP
SCD1U25V3ZY-1GP G56 GAP-OPEN-PWR

2
SCD1U16V2KX-3GP
2 1 11 2
10,48 M_PROK PGOOD BST

0R2J-2-GP

G
S
S
S
16 SC412A_DH_3
DH
DY Design Current =6A

4
3
2
1
LX
1 SC412A_LX_3 SC412A_DH_3 MAX current =
1.8V_PWR
R303 L25 OCP design = A
1 R22 12 13 RILIM_3 1 2 SC412A_LX_3 SC412A_LX_3 1 2
1KR2F-3-GP EN ILIM IND-3D3UH-57GP

SCD1U10V2KX-4GP
SC18P50V2JN-1-GP
1

1
1

1
SC412A_DL_3 8K66R2F-GP

C457

C482
7 4 -SB modify SC412A_DL_3 TC16

5
6
7
8
NC#7 DL R300 SE220U2VDM-8GP
DY

2
1

D
D
D
D
8 42K2R2F-L-GP
DY

2
C11 NC#8 SC412A_VFB_3
9

2
FB

FDS6690DS-GP
SCD1U25V2ZY-1GP 14 SC412A_VFB_3
2

NC#14

1
15 10 1.8V_PWR
NC#15 VOUT

G
S
S
S
U37 R301
30KR2F-GP
GND
PAD

RTN

4
3
2
1
1

2
SC412AMLTRT-GP C458
17

SCD01U16V2KX-3GP 1D8V_AGND

1D5V_AGND
1D8V_AGND

1D8V_EN
B B
2

3D3V_S5
R1011 G6
For Hybird 0R2J-2-GP
2 1
1

GAP-CLOSE
U107
13,27,38,41,48 -PM_SLP_S5 1 6 1D8V_AGND
B VCC

50 ATI_PWR_ON 2 5 R?
A NC#5
3 4 1 2
GND Y
74LVC1G08GM-GP
0R2J-2-GP
DY

A A

BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SC412A_1.8V
Size Document Number Rev

LT32M Sheet SA
Date: Wednesday, December 26, 2007 Sheet 49 of 53

5 4 3 2 1
5 4 3 2 1

5V_S0 3D3V_S0

R556

1
1 20R2J-2-GP
23 ATI_PROK R1001 R1002
470R2J-2-GP 470R2J-2-GP
Reserve For Power dischager
R555

2
1 20R2J-2-GP PM_PWROK 7,27
10,27 CL_PWROK

DY DY

D100 D101
D D
RUN_PWR_CTLR K A K A

CH521S-30PT-GP-U DY CH521S-30PT-GP-U DY
R216
7 PWR_S5_EN 1 2 5V_S5_EN 43
0R2J-2-GP

R214
1 2 3D3V_S5_EN 43
0R2J-2-GP

3D3V_S5

U65
27,48 -PM_SLP_S3 1 8
1A VCC
2 7 -PM_SLP_S3_1 7,38,46
-PM_SLP_S3_2 1B 1Y
41 -PM_SLP_S3_2 3 6
2Y 2B -PM_SLP_S3
4 5
GND 2A
SSLVC2G08DC-GP

3D3V_S0 R552 1 2 0R2J-2-GP VCCGFXCORE_EN 47

1
DIS
C787

1
SCD01U25V2KX-3GP

2
C R542 DY C
4K7R2J-2-GP
D21
49 ATI_PWR_ON R553 1 2 1D1V_SO_EN 48
7 HW_THRM_SHDN# 1 0R2J-2-GP

1
DIS C788
3 CPUCORE_ON 43,44,46,47,48
-PM_SLP_S3_2 2 SCD01U25V2KX-3GP

2
DY

1
CHP222PT-U
C781
SCD1U10V2KX-4GP

Run Power 5V_S5 5V_S0


1D8V_S3 1D8V_S0

U22 Q10
8 D S 1 Io MAX= 11.6 A
7 D S 2 1 6
6 D S 3
5 D G 4
DCBATOUT Q20
2 5
TP0610T-T1-E3-GP AO4468-GP
R540
R330
S

1 2 Z_12V 2 3 RUN_PWR_CTLR 1 2 10KR2J-3-GP 3 4


D

DIS
1

C791
15KR2J-1-GP D20 FDC655BN-GP
1

B 3D3V_S0 1D5V_S3 B
R551 3D3V_S5 1D5V_S0 1 C505
RLZ12B-1-GP DIS
SCD1U25V3KX-GP
2
G

330KR2J-L1-GP SCD47U6D3V2KX-GP
1 2 DY DY 2
2

R541 330KR2J-L1-GP DIS Io MAX= 6 A


U60 U21
1

8 D S 1 8 D S 1
R548 7 D S 2 7 D S 2
1KR2J-1-GP 6 D S 3 6 D S 3
5 D G 4 5 D G 4
2

AO4468-GP AO4468-GP
Q19
41 -PM_SLP_S3_2 IN 1
R1 D
R2
3 PM_SLP_S3#_Z12V
3

OUT
2 Q21
2N7002PT-U
GND
CHDTC124EU-1GP 1 For Hybird
G
2

S
Q101
TP0610T-T1-E3-GP
3D3V_S0 R1012
S

1 2 2 3
D

0R2J-2-GP
1

R1015 R1013 C1004


For Hybird DIS
G

1 2
1 2
SCD1U25V3KX-GP
2

0R2J-2-GP 330KR2J-L1-GP
1

U108 DIS
A 41 -PM_SLP_S3_2 1 6 R1014 A
B VCC DIS 1KR2J-1-GP
27 GPIO_ATI_PWR_ON 2 5 R?
A NC#5
2

3 4 1 2 ATI_PWR_ON 49 BOM1
GND Y Q100
74LVC1G08GM-GP 0R2J-2-GP 49 ATI_PWR_ON IN 1 DIS DIS
R1
R2
3 OUT
Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND 2 Taipei Hsien 221, Taiwan, R.O.C.

CHDTC124EU-1GP Title

PWRPLANE&RESET LOGIC
DIS Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 50 of 53
5 4 3 2 1
5 4 3 2 1

3D3V_AUX_S5 3D3V_AUX_S5
3D3V_AUX_S5

POWER BOTTOM BOARD

1
R215 R8
10KR2J-3-GP 5V_S5

10KR2J-3-GP
CN3

1
U25 7

2
R226
38 -SPI_CS0 1 8 1
R229 CS# VCC
38 SPI_MISO 1 2 15R2J-GP 2 7 1 2
DO HOLD#
38 SPI_CLK 3 6 38,53 EC_PWRBTN# 2
R231 WP# CLK ACCESS_SYS#
38 SPI_MOSI 1 2 47R2J-2-GP 4 5 10KR2J-3-GP 38,53 ACCESS_LENOVO 1 2 3
GND DIO R7 470R2J-2-GP
D 38,53 PWR_LED 4 D
5

1
W25X16VSSIG-GP 38 LID_CLOSE# 6

1
SCD1U10V2KX-4GP C45

2
C369 8

SCD1U16V2ZY-2GP
C382

2
MAIN SOURCE:72.25X16.001 SCD1U10V2KX-4GP

1
SECOND SOURCE:72.25165.001 ACES-CON6-5GP-U

SPI FLASH
20.K0246.024
38,53 KROW[0..7]
ACES-CON24-3-GP
38,53 KCOL[0..15]
26
KROW1 24 FOX-CONN40D-1-GP
KROW7 23 42
KROW6 22 NP2
KCOL9 21 40 39
KROW4 20 38 37
KROW5 19 36 35
KCOL0 18 3D3V_S5 3D3V_AUX_S5 34 33
KROW2 17 32 31
KROW3 16 30 29
KCOL5 15 28 27
38 BAT_PWM_OUT
KCOL1 14 26 25
KROW0 13 24 23
38 INPUT CURRENT MONITOR
KCOL2 12 22 21
KCOL4 11 20 19 DCBATOUT
KCOL7 38 -AC_IN
C 10 18 17 C
KCOL8 38 -CHARGER_ON
9 38 CHG_3S3P 16 15
KCOL6 8 38 CHG_I_PRE_SEL 14 13
KCOL3 7 12 11
38 CHG_3S2P
KCOL12 6 5V_AUX_S5 10 9
KCOL13 5 8 7
38 BAT_SCL
KCOL14 4 6 5
38 BAT_SDA
KCOL11 3 38 AD_OFF 4 3
KCOL10 2
2 1
KCOL15 38 BAT_IN#
1 NP1
25 41
CN4 CN10

20.F1019.040
MAIN SOURCE:20.K0220.024
SECOND SOURCE:20.K0201.024

KEYBORD CONNECTOR CHARGER CONNECTOR

B B

TouchPad Connector
5V_S0 5V_S0

AV Panel

1
R103 R106
CN6

10KR2J-3-GP

10KR2J-3-GP
5V_S0 5
1

2
CN2 38,53 TP_DATA 2
13 3
1 4
3D3V_S0 38,53 TP_CLK 6
2
1

7,17,38,53 THER_SCL 3 FOX-CON4-12-GP

1
TP6
7,17,38,53 THER_SDA 4
10KR2J-3-GP TPAD34 C212 C237
38,53 AV_INT# 5

SC33P50V2JN-3GP

SC33P50V2JN-3GP
R489 6
38,53 AV_INT1#

2
D1 26,32,35,38,53 -PCI_RST 1 R? 20R2J-2-GP 7 20.K0179.004
2

K A MEDIA_LED# 8
28 SATA_LED#
38,53 NUM_LED 9
RB521S-30TE61-GP 38,53 CAP_LED 10

1
38,53 SCROLL_LED 11
A 12 C263 C244 A

SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP
14

2
ACES-CON12-GP
BOM1
20.K0174.012
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MAIN SOURCE:20.K0174.012 Taipei Hsien 221, Taiwan, R.O.C.
SECOND SOURCE:20.K0210.012 Title

KB/TP/SPI/AV/Charger
Size Document Number Rev

Olympus SB
Date: Wednesday, December 26, 2007 Sheet 51 of 53
5 4 3 2 1
A B C D E

4 K2 K1 K5 K6 K3 K4 4
SPRING-24-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP SPRING-24-GP

1
H19 H21 H17 H4 H1 H14 H24 H11 H12 H23 H2 H3 H25 H18 H22 H? H?
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1

1
3 3

H6 H20 H8 H15 H5 H10 H13 H7 H16


HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1

1
2 2

1 1
BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PTH FOR SCREW HOLES
Size Document Number Rev
Custom SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 52 of 53
A B C D E
5 4 3 2 1

Near CN13 KB Near CN6 MINI PORT-1 Near HP/SPDIF1 Near CN9 NewCard
1D5V_S0 TPAD34 TP254 26,41 PCIE_TXP3 TPAD34 TP166
38,51 KROW[0..7] KCOL0 TPAD34 TP42 5V_SPDIF_S0 TPAD34 TP218 26,41 PCIE_TXN3 TPAD34 TP168
KCOL1 TPAD34 TP22 3D3V_S0 TPAD34 TP248 TPAD34 TP215
34 SPDIF_HDMI
38,51 KCOL[0..15] KCOL2 TPAD34 TP27 TPAD34 TP216 26,41 PCIE_RXP3 TPAD34 TP339
34 HP_OUT_L
KCOL3 TPAD34 TP37 3D3V_S5 TPAD34 TP257 TPAD34 TP331 26,41 PCIE_RXN3 TPAD34 TP340
34 HP_OUT_R
KCOL4 TPAD34 TP44 AUD_AGND TPAD34 TP220
KCOL5 TPAD34 TP35 3,40 CLK_PCIE_MINI_1 TPAD34 TP150 TPAD34 TP219 3,41 CLK_PCIE_NEW TPAD34 TP170
KROW0 TPAD34 TP46 KCOL6 TPAD34 TP29 TPAD34 TP144 34 -HP_JACK_DET TPAD34 TP234 TPAD34 TP172
3,40 -CLK_PCIE_MINI_1 3,41 -CLK_PCIE_NEW
KROW1 TPAD34 TP45 KCOL7 TPAD34 TP26 TPAD34 TP276
41 -CPPE
KROW2 TPAD34 TP19 KCOL8 TPAD34 TP40 26,40 PCIE_RXN1 TPAD34 TP113 3,41 -NEWCARD_CLKREQ TPAD34 TP174
KROW3 TPAD34 TP24 KCOL9 TPAD34 TP28 26,40 PCIE_RXP1 TPAD34 TP116 TPAD34 TP186
3D3V_NEW_S0
KROW4 TPAD34 TP43 KCOL10 TPAD34 TP30
D D
KROW5 TPAD34 TP25 KCOL11 TPAD34 TP38 26,40 PCIE_TXN1 TPAD34 TP110 TPAD34 TP187
41 -PERST
KROW6 TPAD34 TP47 KCOL12 TPAD34 TP31 26,40 PCIE_TXP1 TPAD34 TP112 TPAD34 TP341
3D3V_NEW_LAN_S5
KROW7 TPAD34 TP33 KCOL13 TPAD34 TP41
KCOL14 TPAD34 TP32 TPAD34 TP255 TPAD34 TP301
KCOL15 TPAD34 TP39
26,40 USB_PN7_MINI
26,40 USB_PP7_MINI TPAD34 TP256 Near CARD1 1D5V_NEW_S0
TPAD34 TP191
27,30,35,40,41 SMB_DATA
SMB_CLK TPAD34 TP252 3D3V_CARD TPAD34 TP313 TPAD34 TP300
27,30,35,40,41 SMB_CLK 27,30,35,40,41 SMB_CLK
SMB_DATA TPAD34 TP253
27,30,35,40,41 SMB_DATA
27,35,40 PCIE_WAKE# TPAD34 TP271 TPAD34 TP302
33 SD/XD/MS_DATA1_1
10,20,26,31,40,41 -PLT_RST TPAD34 TP141 TPAD34 TP305 TPAD34 TP214
33 SD/XD/MS_DATA0_1 41 -CPUSB
TPAD34 TP250 TPAD34 TP316 TPAD34 TP304
Near CN24 POWER BOOTOM BOARD 33
33
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1
TPAD34 TP307
26,41 USB_PP9_NEWCARD
26,41 USB_PN9_NEWCARD
TPAD34 TP308
TPAD34 TP315 TPAD34 TP169
33 XD_DATA4_1
5V_S5 TPAD34 TP36 TPAD34 TP296
33 XD_DATA5_1
38,51 EC_PWRBTN# TPAD34 TP34 TPAD34 TP314
33 XD_DATA6_1
38,51 ACCESS_LENOVO TPAD34 TP20 TPAD34 TP310
33 XD_DATA7_1
38,51 PWR_LED TPAD34 TP21 TPAD34 TP157
33 XD_CD#
TPAD34 TP49 TPAD34 TP162
Near CN7 MINI PORT-2 33 SD_WP#(XDR/B#)
33 SD/XD/MS_CLK_1
TPAD34 TP158
TPAD34 TP292
33 XD_CE#
1D5V_S0 TPAD34 TP306 TPAD34 TP156
33 XD_CLE
TPAD34 TP161
33 XD_ALE
3D3V_S0 TPAD34 TP295 TPAD34 TP163
33 SD/XD/MS_CMD_1
TPAD34 TP159
Near 5V_S0
CN18 AV PANEL 3D3V_S5 TPAD34 TP342
33
33
MS_INS#
SD_CD#
TPAD34 TP167
TPAD34 TP160
33 XD_WP#
TPAD34 TP14 TPAD34 TP318
7,17,38,51 THER_SCL TPAD34 TP17 TPAD34 TP303
TPAD34 TP13 39,40 WIFI_BUSY
7,17,38,51 THER_SDA
38,51 AV_INT# TPAD34 TP11
38,51 AV_INT1# TPAD34 TP12 38,40 PCIE_DEBUG_Tx TPAD34 TP289
26,32,35,38,51 -PCI_RST TPAD34 TP10 38,40 WIFI_RF_EN TPAD34 TP323
38,51 NUM_LED TPAD34 TP7 40 5V_DEBUG TPAD34 TP273
TPAD34 TP50
38,51 CAP_LED
38,51 SCROLL_LED TPAD34 TP51 31,40 WLAN_LED TPAD34 TP324 Near SATA1
TPAD34 TP5
3,40 CLK_PCIE_MINI_2 TPAD34 TP325
C 3,40 -CLK_PCIE_MINI_2 TPAD34 TP194 C
5V_S0 TPAD34 TP275
26,40 PCIE_RXN2 TPAD34 TP326 28,31 SATA_TXP0 TPAD34 TP260
TPAD34 TP327 TPAD34 TP266
Near CN20 TP 26,40 PCIE_RXP2
TPAD34 TP176
28,31 SATA_TXN0
TPAD34 TP332
26,40 PCIE_TXN2 28,31 SATA_RXN0
26,40 PCIE_TXP2 TPAD34 TP173 28,31 SATA_RXP0 TPAD34 TP333
5V_S0 TPAD34 TP118 27,35,40 PCIE_WAKE# TPAD34 TP272
38,51 TP_DATA TPAD34 TP127 10,20,26,31,40,41 -PLT_RST TPAD34 TP283
38,51 TP_CLK TPAD34 TP131
TPAD34 TP92

Near ODD1
Near CN12 BT 5V_S0 TPAD34 TP132
TPAD34 TP251
Near CN17 USB&1394 28,31 SATA_TXP1
28,31 SATA_TXN1 TPAD34 TP249
3D3V_BT TPAD34 TP177
33,42 TPA0P-2 TPAD34 TP52 28,31 SATA_RXN1 TPAD34 TP136
33,42 TPA0N-2 TPAD34 TP53 TPAD34 TP180 28,31 SATA_RXP1 TPAD34 TP135
26,39 USB_PP5_BT
33,42 TPB0P-2 TPAD34 TP56 TPAD34 TP171
26,39 USB_PN5_BT
33,42 TPB0N-2 TPAD34 TP101 TPAD34 TP184 TPAD34 TP134
TPAD34 TP104 31,39 BLUETOOTH_LED TPAD34 TP175
5V_USB2_S5 39,40 WIFI_BUSY
TPAD34 TP105 TPAD34 TP181
TPAD34 TP106 39,40 BT_BUSY TPAD34 TP179
26,42 USB_PN0
26,42 USB_PP0 TPAD34 TP103

26,42 USB_PN2 TPAD34 TP227


26,42 USB_PP2 TPAD34 TP223
TPAD34 TP217
5V_USB1_S5
Near MDC1 MDC Near HDMI1
TPAD34 TP264
3D3V_S5
TPAD34 TP208
5V_HDMI_S0
28,39 ACZ_SDATA_OUT_MDC TPAD34 TP259 TPAD34 TP213
B 25 HDMI_TXD0_M B
TPAD34 TP221
TPAD34 TP258 25 HDMI_TXD#0_M TPAD34 TP334
28,39 ACZ_SYNC_MDC
TPAD34 TP145 25 HDMI_TXD1_M TPAD34 TP335
28,39 ACZ_SDATAIN_MDC 25 HDMI_TXD#1_M
TPAD34 TP142 TPAD34 TP336
28,39 -ACZ_RST_MDC TPAD34 TP149 25 HDMI_TXD2_M TPAD34 TP337
28,39 ACZ_BITCLK_MDC 25 HDMI_TXD#2_M
TPAD34 TP143 TPAD34 TP338
25 HDMI_TXC_M TPAD34 TP117
25 HDMI_TX#C_M TPAD34 TP201
25 HDMI_SCLK_C
TPAD34 TP207
25 HDMI_SDATA_C
TPAD34 TP200
25,38 HDMI_HPD
TPAD34 TP202

Near CN26 WLAN SW


38,39 WIRLESS_DISABLE# TPAD34 TP328

TPAD34 TP233

Near CN1
TPAD34 TP16
FAN1_VCC
TPAD34 TP23
Near CN25 SPEAKER 5V_S0
TPAD34 TP18
7 FAN1_FG1
TPAD34 TP15
SPKR_L- TPAD34 TP1
34 SPKR_L-
SPKR_L+ TPAD34 TP2
Near CAMERA1 34
34
SPKR_L+
SPKR_R-
SPKR_R- TPAD34 TP3
34 SPKR_R+ TPAD34 TP4
SPKR_R+
CCD_PWR_RES TPAD34 TP48

17,26 USB_PN8_CCD TPAD34 TP57


17,26 USB_PP8_CCD TPAD34 TP59

A TPAD34 TP58 A
17 AUD_DMIC_CLK_G_R TPAD34 TP61
17 AUD_DMIC_IN0_R
TPAD34 TP62
BOM1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TTEST_PAD
Size Document Number Rev
C SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 53 of 53
5 4 3 2 1
5 4 3 2 1

LCD
(1)PANEL_3V_ON (5) LVDS signal

PANEL_POWER_ON_D GM_LVDS
PANEL_3V_POWER_ON LCD_LVDS
D PANEL_POWER_ON_U RGB_LVDS D

SW SW
(2)BRIGHTNESS PWM

UMA_BKLT

BRIGHTNESS_KBC
KBC LCD
OR SW
BRIGHTNESS_KBC
All the switch control by SB_GPIO52
and define
(3)BACKLIGHT_ON
L => -UMA channel
BLON_OUT H => -ATI channel
UMA_BLON_IN

DIS_BLON_IN
KBC LCD
C C
OR SW
DIS_BLON_IN

(4)EDID DATA/CLK

GM_EDID_CLK/DATA
LCD_EDID_CLK/DATA
LCD_EDID_CLK/DATA
SW

CRT
B B
(1)DDC DATA/CLK

GM_DDC_CLK/DATA
CRT_DDC_CLK/DATA
LCD_DDC_CLK/DATA
SW
(2) RGB signal

GM_RGB
CRT_RGB
ATI_RGB BOM1

SW
Wistron Corporation
(2) Hsynv & Vsync 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
GM_Hsynv /Vsync
CRT_Hsynv /Vsync Title
ATI_Hsynv /Vsync TTEST_PAD
Buffer
Size Document Number Rev
A SB
Olympus
Date: Wednesday, December 26, 2007 Sheet 54 of 53
5 4 3 2 1

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