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5 4 3 2 1

Project code: 91.4FX01.001 SYSTEM DC/DC


PCB P/N : 48.4FX01.01M ISL62392 42
INPUTS OUTPUTS
REVISION : 09924 -1
JV71-MV DDR3 Madison Block PCB STACKUP
DCBATOUT
5V_S5(6A)
3D3V_S5(7A)
5V_AUX_S5
3D3V_AUX_S5

D
Diagram CLK GEN. Mobile CPU
Penryn
SMSC
ICS9LPRS365B
EMC2102
34
TOP

GND

S
L1

L2

L3
SYSTEM DC/DC
TPS51124 43
D

INPUTS OUTPUTS
3 S L4
1D05V_S0(9A)
DCBATOUT
4, 5 GND L5 1D5V_S3(12A)
VRAM
HOST BUS 667/800/1066MHz@1.05V BOTTOM L6 RT9026 44
64MbX16X8 1024M

DDR3 Cantiga 1D5V_S3


DDR_VREF_S3
(1.2A)
1066 MHz PCIex16 VGA HDMI
16,17 AGTL+ CPU I/F 20
Madison / M96 52~57 RT9018 44
DDR Memory I/F
DDR3 INTEGRATED GRAHPICS LCD 1D5V_S3 1D1V_S0(2A)

LVDS, CRT I/F


18
1066 MHz 16,17 6,7,8,9,10,11 TPS51117 45
CRT
X4 DMI 19 DCBATOUT FBVDD(4A)
C-Link0
400MHz
MS/MS Pro/xD CHARGER
USB CardBus ISL88731A 47
RTS5159 /MMC/SD
31 INPUTS OUTPUTS
C C

DCBATOUT BT+
ICH9M
6 PCIe ports
LINE IN PCI/PCI BRIDGE LAN CPU DC/DC
Giga LAN TXFM RJ45 ISL6266A
ACPI 2.0 26 26 41
29 BCM5784 25
4 SATA
INPUTS OUTPUTS
12 USB 2.0/1.1 ports
Int MIC ETHERNET (10/100/1000MbE)
High Definition Audio DCBATOUT VCC_CORE

18 Codec AZALIA LPC I/F


38A

ALC888S Serial Peripheral I/F VGA_CORE


27 Matrix Storage Technology(DO) RT8202A
Active Managemnet Technology(DO)
47
MIC In
PCIe Mini 1 Card INPUTS OUTPUTS
29 Wire LAN 33
DCBATOUT VGA_CORE
12,13,14,15 13A
INT.SPKR
1.5W OP AMP GFXCORE
MAX9789A ISL6263A
B B
29 30 46
LPC BUS INPUTS OUTPUTS
LINE OUT DCBATOUT VCC_GFXCORE

29
USB SPI BIOS LPC (7A)
SATA KBC (2MB)
Mini USB
Winbond 36 DEBUG
MODEM
HDD SATA Blue Tooth
23
Camera WPCE773 CONN.36
21
RJ11 MDC Card 35
MEDIA
30 SATA USB KEY
Finger 38
ODD SATA
Printer 4 Port 24
37
22 Touch INT.
Pad 37 KB 35

A A

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM
Size Document Number Rev
A2
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 1 of 62
5 4 3 2 1
A B C D E
ICH9M Integrated Pull-up Cantiga chipset and ICH9M I/O controller
ICH9M Functional Strap Definitions page 92 Hub strapping configuration
ICH9 EDS 642879 Rev.1.5
and Pull-down Resistors Montevina Platform Design guide 22339
page 218
0.5
Signal Usage/When Sampled Comment ICH9 EDS 642879 Rev.1.5
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 Pin Name Strap Description Configuration
PCIE Port Config1 bit1, pulled low.When TP3 not pulled low at rising edge SIGNAL Resistor Type/Value
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency 000 = FSB1067
offset 224h). This signal has weak internal pull-down Select 011 = FSB667
CL_DATA[1:0] PULL-UP 20K 010 = FSB800
others = Reserved
4 HDA_SYNC PCIE config1 bit0,
Rising Edge of PWROK.
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
CL_RST0# PULL-UP 20K
CFG[4:3] Reserved
4
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG[15:14]
GPIO53 Rising Edge of PWROK. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) ENERGY_DETECT PULL-UP 20K CFG[18:17]
GPIO20 Reserved This signal should not be pulled high. HDA_BIT_CLK PULL-DOWN 20K
CFG5 DMI x2 Select 0 = DMI x2
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_DOCK_EN#/GPIO33 PULL-UP 20K 1 = DMI x4 (Default)
GPIO51 Rising Edge of PWROK This signal should not be pulled low for desttop CFG6 iTPM Host 0= The iTPM Host Interface is enabled(Note2)
and mobile. HDA_RST# PULL-DOWN 20K Interface 1=The iTPM Host Interface is disalbed(default)
HDA_SDIN[3:0] PULL-DOWN 20K 0 = Transport Layer Security (TLS) cipher
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for CFG7 Intel Management suite with no confidentiality
GNT3#/ Swap Override. all cycles targeting FWH BIOS space). HDA_SDOUT PULL-DOWN 20K engine Crypto strap 1 = TLS cipher suite with
GPIO55 Rising Edge of PWROK. Note: Software will not be able to clear the confidentiality (default)
Top-Swap bit until the system is rebooted HDA_SYNC PULL-DOWN 20K
0 = Reverse Lanes,15->0,14->1 ect..
without GNT3# being pulled down. GLAN_DOCK# The pull-up or pull-down active when configured for native CFG9 PCIE Graphics Lane 1= Normal operation(Default):Lane
GLAN_DOCK# functionality and determined by LAN controller
Numbered in order
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K
SPI_CS1#/ Selection 0:1. (Config Registers:Offset 3410h:bit 11:10). 0 = Enable (Note 3)
GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC. GPIO[20] PULL-DOWN 20K CFG10 PCIE Loopback enable 1= Disabled (default)
Integrated TPM Enable, Sample low: the Integrated TPM will be disabled. GPIO[49] PULL-UP 20K 00 = Reserve
Rising Edge of CLPWROK Sample high: the MCH TPM enable strap is sampled CFG[13:12] XOR/ALL 10 = XOR mode Enabled
SPI_MOSI low and the TPM Disable bit is clear, the LDA[3:0]#/FHW[3:0]# PULL-UP 20K 01 = ALLZ mode Enabled (Note 3)
Integrated TPM will be enable. 11 = Disabled (default)
LAN_RXD[2:0] PULL-UP 20K
3 DMI Termination Voltage, The signal is required to be low for desktop LDRQ[0] PULL-UP 20K
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default) 3
Rising Edge of PWROK. applications and required to be high for
GPIO49 mobile applications. LDRQ[1]/GPIO23 PULL-UP 20K 0 = Normal operation(Default):
CFG19 DMI Lane Reversal Lane Numbered in Order
PME# PULL-UP 20K
1 = Reverse Lanes
PCI Express Lane Signal has weak internal pull-up. Sets bit 27 PWRBTN# PULL-UP 20K DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
SATALED# Reversal. Rising Edge of MPC.LR(Device 28:Function 0:Offset D8) DMI x2 mode[MCH -> ICH]:(3->0,2->1)
of PWROK. SATALED# PULL-UP 15K
SPKR No Reboot. If sampled high, the system is strapped to the SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K Digital Display Port 0 = Only Digital Display Port
Rising Edge of PWROK. "No Reboot" mode(ICH9 will disable the TCO Timer (SDVO/DP/iHDMI) or PCIE is operational (Default)
system reboot feature). The status is readable SPI_MOSI PULL-DOWN 20K CFG20 Concurrent with PCIe 1 =Digital display Port and PCIe are
via the NO REBOOT bit. operting simulataneously via the PEG port
SPI_MISO PULL-UP 20K
0 =No SDVO Card Present (Default)
TP3 XOR Chain Entrance. This signal should not be pull low unless using SPKR PULL-DOWN 20K SDVO_CTRLDATA SDVO Present
Rising Edge of PWROK. XOR Chain testing. 1 = SDVO Card Present
TACH_[3:0] PULL-UP 20K
0 = LFP Disabled (Default)
GPIO33/ Flash Descriptor Sampled low:the Flash Descriptor Security will be TP[3] PULL-UP 20K Local Flat Panel
HDA_DOCK Security Override Strap overridden. If high,the security measures will be L_DDC_DATA (LFP) Present 1= LFP Card Present; PCIE disabled
_EN# Rising Edge of PWROK in effect.This should only be enabled in manufacturing USB[11:0][P,N] PULL-DOWN 15K
environments using an external pull-up resister.
NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
2 Flash-decriptor section of the Firmware. This 'Soft-Strap' is 2
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

1 JV71-MV DDR3 Madison


1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reference
Size Document Number Rev
A3
JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 2 of 62
A B C D E

3D3V_S0
3D3V_S0 1D05V_S0

1 R554 2 3D3V_VDD48_S0
0R0603-PAD

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C456 C457 C455 C450 C417 C435 C444 C436 C416 C430 C419 C445 C448 C454 C418

SC4D7U6D3V3KX-GP

SC1U16V3ZY-GP
DY DY DY DY

2
DY

4 4

3D3V_S0 3D3V_VDD48_S0 1D05V_S0

3D3V_S0
CL=20pF±0.2pF
U24

16

46
62
23

19
27
43
52
33
56
1

9
C453
R260 SC33P50V2JN-3GP

VDD48

VDDPLL3

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDSRC
VDDCPU
VDDPCI
VDDREF
10KR2J-3-GP 1 2 GEN_XTAL_OUT
DIS

2
X5 61 CLK_CPU_BCLK 4 CPU
2

PCLKCLK4 X-14D31818M-35GP CPUT0


CPUC0 60 CLK_CPU_BCLK# 4
82.30005.891
1

C452 2nd = 82.30005.951 3 58 CLK_MCH_BCLK 6 NB

1
R254 GEN_XTAL_IN X1 CPUT1_F
1 2 2 X2 CPUC1_F 57 CLK_MCH_BCLK# 6
10KR2J-3-GP
UMA SC27P50V2JN-2-GP CPUT2_ITP/SRCT8 54 CLK_PCIE_ICH 13 SB DMI
53 CLK_PCIE_ICH# 13
2

R2512 CPUC2_ITP/SRCC8
4,7 CPU_SEL0 1 2K2R2J-2-GP CLK48 17 USB_48MHZ/FSLA
31 CLK48_5158E CLK48_5158E R253 2 1 33R2J-2-GP
SRCT7/CR#_F 51 NEWCARD
SRCC7/CR#_E 50
13 PM_STPPCI# 45 PCI_STOP#
3D3V_S0 44 48
RN48 13 PM_STPCPU# CPU_STOP# SRCT6
47
CLK_PCIE_PEG 52 GPU
SRCC6 CLK_PCIE_PEG# 52
5 4 PCLKCLK2 modify by RF
3 6 3 CPU_SEL2_R 41 3
4,7 CPU_SEL2
7 2 7
SRCT10
42
CLK_PCIE_LAN 25 LAN
15,16,17 SMBC_ICH SCLK SRCC10 CLK_PCIE_LAN# 25
8 1 PCLKCLK5 6
15,16,17 SMBD_ICH SDATA
40 CR#_H
3D3V_S0 SRCT11/CR#_H CR#_G
SRN10KJ-6-GP 13 CLK_PW RGD 63 CK_PWRGD/PD# SRCC11/CR#_G 39
C451 DY
RN46 2 1 10KR2J-3-GP 2R249 1 37
1 8 CPU_SEL2_R
SRCT9
38
CLK_PCIE_MINI1 32 WLAN
13 CLK_ICH14 SRCC9 CLK_PCIE_MINI1# 32
13 CLK48_ICH 2 7 CLK48 SC47P50V2JN-3GP PCLKCLK0 DY 8 PCI0/CR#_A
34 PCLK_KBC 3 6 PCLKCLK4 PCLKCLK1 10 PCI1/CR#_B SRCT4 34 CLK_MCH_3GPLL 7 NB CLK
13 PCLK_ICH 4 5 PCLKCLK5 35 PCLK_FW H R255 2 1 33R2J-2-GP PCLKCLK2 11 PCI2/TME SRCC4 35 CLK_MCH_3GPLL# 7
1PCLKCLK3 12 PCI3
SRN33J-7-GP TPAD14-GP TP158 PCLKCLK4 13 31
PCLKCLK5 PCI4/27_SELECT SRCT3/CR#_C
14 PCI_F5/ITP_EN SRCC3/CR#_D 32

CLK48_5158E 1 2 SB 1008
EC46 SC33P50V2JN-3GP 28
CLK_ICH14 1
SRCT2/SATAT CLK_PCIE_SATA 12 SB SATA
EC25 DY 2 SC33P50V2JN-3GP SRCC2/SATAC 29
1 R694
CLK_PCIE_SATA# 12
4,7 CPU_SEL1 64 FSLB/TEST_MODE ATI-ES 2 JTAG_TCK 53
PCLK_FW H 1 CPU_SEL2_R UMA 0R2J-2-GP
EC24 DY 2 SC33P50V2JN-3GP 5 REF0/FSLC/TEST_SEL
24 DREFSSCLK_1 1 4 RN76
PCLK_ICH 1
27MHZ_NONSS/SRCT1/SE1 DREFSSCLK_1# 3 SRN0J-6-GP
DREFSSCLK 7 NB
EC23 DY 2 SC33P50V2JN-3GP 55 NC#55 27MHZ_SS/SRCC1/SE2 25 2 DREFSSCLK# 7
PCLK_KBC 1 DREFCLK_1 1 RN44
DY 2 SC33P50V2JN-3GP 20 4 NB

GNDSRC
GNDSRC
GNDSRC
GNDCPU
DREFCLK 7

GNDREF
SRCT0/DOTT_96

GNDPCI
EC39 21 DREFCLK_1# 3 2 SRN0J-6-GP

GND48
SRCC0/DOTC_96 DREFCLK# 7
CLK48_ICH 1 DY 2 SC33P50V2JN-3GP

GND

GND

GND
EC48 UMA
3D3V_S0
DY ICS9LPRS365BKLFT-GP-U

18
15
1

22
30
36
49
59
26

65
2 2
71.09365.A03
EMI capacitor for Antenna team suggestion

4
3
2
1
2nd = 71.09365.A03 71.08513.003
RN47
SRN10KJ-6-GP
ICS9LPRS365YGLFT setting table DY

PIN NAME DESCRIPTION

5
6
7
8
RN45
13 SATACLKREQ# 1 8 PCLKCLK0
Byte 5, bit 7 2 7 PCLKCLK1
7 CLK_MCH_OE#
0 = PCI0 enabled (default) 3 6 CR#_H
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
25 LAN_CLKREQ#
4 5 CR#_G SEL2 SEL1 SEL0
PCI0/CR#_A Byte 5, bit 6 32 W LAN_CLKREQ# CPU FSB
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
DY FSC FSB FSA
SRN470J-3-GP

Byte 5, bit 5 PIN NAME DESCRIPTION 1 0 1 100M X


0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 1 0 0 1 133M 533M
PCI1/CR#_B Byte 5, bit 4 0 = SRC3 enabled (default)
166M 667M
0 = CR#_B controls SRC1 pair (default) 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair 0 1 1
1= CR#_B controls SRC4 pair SRCC3/CR#_D Byte 5, bit 0
200M 800M
0 = CR#_D controls SRC1 pair (default) 0 1 0
0 = Overclocking of CPU and SRC Allowed 1= CR#_D controls SRC4 pair
PCI2/TME 1 = Overclocking of CPU and SRC NOT allowed 0 0 0 266M 1067M
Byte 6, bit 7
0 = SRC7# enabled (default)
1
PCI3 SRCC7/CR#_E 1= CR#_F controls SRC6
JV71-MV DDR3 Madison 1

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# Byte 6, bit 6
PCI4/27M_SEL 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0# 0 = SRC7 enabled (default)
SRCT7/CR#_F 1= CR#_F controls SRC8 Wistron Corporation
0 =SRC8/SRC8# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
PCI_F5/ITP_EN 1 = ITP/ITP# Byte 6, bit 5 Taipei Hsien 221, Taiwan, R.O.C.
0 = SRC11# enabled (default)
Byte 5, bit 3 SRCC11/CR#_G 1= CR#_G controls SRC9 Title
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 6, bit 4 Clock Generator
SRCT3/CR#_C Byte 5, bit 2 0 = SRC11 enabled (default) Size Document Number Rev
0 = CR#_C controls SRC0 pair (default), SRCT11/CR#_H 1= CR#_H controls SRC10
-1
1= CR#_C controls SRC2 pair
Date:
JV71-MV DDR3Sheet
W ednesday, October 28, 2009
Madison
3 of 62
A B C D E
A B C D E

H_A#[35..3]
6 H_A#[35..3]
H_DINV#[3..0]
H_DINV#[3..0] 6
CPU1A 1 OF 4 1 TP74 TPAD14-GP H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
H_A#3 J4 H1 1D05V_S0 H_DSTBP#[3..0]
A3# ADS# H_ADS# 6 H_DSTBP#[3..0] 6
H_A#4 L5 E2 H_BNR# 6
H_A#5 A4# BNR# Place testpoint on H_D#[63..0]
4 L4 A5# BPRI# G5 H_BPRI# 6 H_D#[63..0] 6 4

ADDR GROUP 0
H_A#6 K5 H_IERR# with a GND
A6#

1
H_A#7 M3 H5 0.1" away
A7# DEFER# H_DEFER# 6
H_A#8 N2 F21 R88

CONTROL
A8# DRDY# H_DRDY# 6
H_A#9 J1 E1 56R2J-4-GP
A9# DBSY# H_DBSY# 6
H_A#10 N3
H_A#11 A10#
P5 F1 H_BREQ#0 6

2
H_A#12 A11# BR0# C104
P2 A12# DY
H_A#13 L2 D20 H_IERR# 1 2
H_A#14 A13# IERR#
P4 A14# INIT# B3 H_INIT# 12
H_A#15 P1 SC47P50V2JN-3GP
H_A#16 A15#
R1 A16# LOCK# H4 H_LOCK# 6
M1 CPU1B 2 OF 4
6 H_ADSTB#0 ADSTB0# H_CPURST# 6,50
6 H_REQ#[4..0] RESET# C1 H_RS#[2..0] 6 modify by RF
H_REQ#0 K3 F3 H_RS#0 H_D#0 E22 Y22 H_D#32
H_REQ#1 REQ0# RS0# H_RS#1 H_D#1 D0# D32# H_D#33
H2 REQ1# RS1# F4 F24 D1# D33# AB24
H_REQ#2 K2 G3 H_RS#2 H_D#2 E26 V24 H_D#34
H_REQ#3 REQ2# RS2# H_D#3 D2# D34# H_D#35
J3 REQ3# TRDY# G2 H_TRDY# 6 G22 D3# D35# V26
H_REQ#4 L1 H_D#4 F23 V23 H_D#36
REQ4# D4# D36#

DATA GRP0
H_THERMDA H_D#5 H_D#37

DATA GRP2
HIT# G6 H_HIT# 6 G25 D5# D37# T22
H_A#17 Y2 E4 H_HITM# 6 H_D#6 E25 U25 H_D#38
A17# HITM# D6# D38#

1
H_A#18 U5 H_D#7 E23 U23 H_D#39
H_A#19 A18# XDP_BPM#0 TP28 TPAD14-GP C116 H_D#8 D7# D39# H_D#40
R3 A19# BPM0# AD4 1 K24 D8# D40# Y25
H_A#20 W6 XDP/ITP SIGNALS AD3 XDP_BPM#1 1 TP27 TPAD14-GP SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41

2
A20# BPM1# D9# D41#
ADDR GROUP 1

H_A#21 U4 AD1 XDP_BPM#2 1 TP26 TPAD14-GP H_THERMDC DY H_D#10 J24 Y23 H_D#42
H_A#22 A21# BPM2# XDP_BPM#3 TP32 TPAD14-GP 1D05V_S0 H_D#11 D10# D42# H_D#43
Y5 A22# BPM3# AC4 1 J23 D11# D43# W24
H_A#23 U1 AC2 XDP_BPM#4 1 TP29 TPAD14-GP H_D#12 H22 W25 H_D#44
H_A#24 R4
A23# PRDY#
AC1 XDP_BPM#5 1 TP30 TPAD14-GP Close to CPU H_D#13 F26
D12# D44#
AA23 H_D#45
H_A#25 A24# PREQ# XDP_TCK TP34 TPAD14-GP H_D#14 D13# D45# H_D#46
T5 A25# TCK AC5 1 K22 D14# D46# AA24

1
3 H_A#26 T3 AA6 XDP_TDI 1 TP50 TPAD14-GP H_D#15 H23 AB25 H_D#47 3
H_A#27 A26# TDI XDP_TDO TP31 TPAD14-GP R89 D15# D47#
W2 A27# TDO AB3 1 6 H_DSTBN#0 J26 DSTBN0# DSTBN2# Y26 H_DSTBN#2 6
H_A#28 W5 AB5 XDP_TMS 1 TP49 TPAD14-GP 68R2-GP H26 AA26
A28# TMS 6 H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 6
H_A#29 Y4 AB6 XDP_TRST# 1 TP33 TPAD14-GP H25 U22 H_DINV#2 6
A29# TRST# 6 H_DINV#0 DINV0# DINV2#
H_A#30 U2 C20 XDP_DBRESET#1 TP88 TPAD14-GP

2
H_A#31 A30# DBR#
V4 A31# 1 R97 2DY CPU_PROCHOT#_R 40
H_A#32 W3 0R2J-2-GP H_D#16 N22 AE24 H_D#48
H_A#33 A32# H_D#17 D16# D48# H_D#49
AA4 A33# THERMAL K25 D17# D49# AD24
H_A#34 AB2 C90 SC47P50V2JN-3GP H_D#18 P26 AA21 H_D#50
H_A#35 A34# CPU_PROCHOT#_1 H_D#19 D18# D50# H_D#51
AA3 A35# PROCHOT# D21 1 2 R23 D19# D51# AB22
V1 A24 H_THERMDA 33 DY modify by RF H_D#20 L23 AB21 H_D#52
6 H_ADSTB#1 ADSTB1# THRMDA D20# D52#
B25 H_THERMDC 33 H_D#21 M24 AC26 H_D#53
THRMDC D21# D53#

DATA GRP1
DATA GRP3
12 H_A20M# A6 H_D#22 L22 AD20 H_D#54
A20M# H_D#23 D22# D54# H_D#55
12 H_FERR# A5 FERR# THERMTRIP# C7 PM_THRMTRIP-A# 7,12,38 M23 D23# D55# AE22
ICH

12 H_IGNNE# C4 H_D#24 P25 AF23 H_D#56


IGNNE# PM_THRMTRIP# should connect to H_D#25 D24# D56# H_D#57
P23 D25# D57# AC25
D5 ICH9 and MCH without T-ing H_D#26 P22 AE21 H_D#58
12 H_STPCLK# STPCLK# D26# D58#
C6 HCLK A22 PH @ page48 H_D#27 T24 AD21 H_D#59
12 H_INTR LINT0 BCLK0 CLK_CPU_BCLK 3 D27# D59#
12 H_NMI B4 A21 CLK_CPU_BCLK# 3 H_D#28 R24 AC22 H_D#60
LINT1 BCLK1 H_D#29 D28# D60# H_D#61
12 H_SMI# A3 SMI# L25 D29# D61# AD23
1D05V_S0 H_D#30 T25 AF22 H_D#62
H_D#31 D30# D62# H_D#63
M4 RSVD#M4 N25 D31# D63# AC23

2
N5 RSVD#N5 6 H_DSTBN#1 L26 DSTBN1# DSTBN3# AE25 H_DSTBN#3 6
T2 6 H_DSTBP#1 M26 AF24 H_DSTBP#3 6
RESERVED

RSVD#T2 Layout Note: 1KR2F-3-GP DSTBP1# DSTBP3#


V3 RSVD#V3 6 H_DINV#1 N24 DINV1# DINV3# AC20 H_DINV#3 6
B2 "CPU_GTLREF0" R312
RSVD#B2 0.5" max length. CPU_GTLREF0 COMP0 R71 1 27D4R2F-L1-GP
C3 AD26 R26 2

1 1
RSVD#C3 TEST1 GTLREF COMP0 COMP1 R67 1 54D9R2F-L1-GP
D2 RSVD#D2 C23 TEST1 MISC COMP1 U26 2

1
D22 DY TEST2 D25 AA1 COMP2 R57 1 2 27D4R2F-L1-GP

SC1KP50V2KX-1GP
2 RSVD#D22 R309 C526TPAD14-GP TP87 RSVD_CPU_12 TEST2 COMP2 COMP3 R60 1 54D9R2F-L1-GP 2
D3 RSVD#D3 1 C24 TEST3 COMP3 Y1 2
F6 2KR2F-3-GP TEST4 AF26

2
RSVD#F6 TPAD14-GP TP25 TEST4
1RSVD_CPU_13 AF1 TEST5 DPRSTP# E5 H_DPRSTP# 7,12,40
TPAD14-GP TP97 1 RSVD_CPU_11 B1 TPAD14-GP TP180 1RSVD_CPU_14 A26 B5 H_DPSLP# 12

2
KEY_NC TEST6 DPSLP#
DPWR# D24 H_DPW R# 6
BGA479-SKT6-GPU7 H_CPURST# 1 2 3,7 CPU_SEL0 B22 D6 H_PW RGD 12,50
EC75 SC33P50V2JN-3GP BSEL0 PWRGOOD
62.10079.001 3,7 CPU_SEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 6
2nd = 62.10053.401 DY 3,7 CPU_SEL2 C21 BSEL2 PSI# AE6 H_PSI# 40

1
C102
EMI capacitor BGA479-SKT6-GPU7

SC100P50V2JN-3GP
DY

2
Layout Note:
1D05V_S0 1 DY 2 TEST1 Comp0, 2 connect with Zo=27.4 ohm, make
R119 1KR2J-1-GP trace length shorter than 0.5" .
Net "TEST4" as short as possible, Comp1, 3 connect with Zo=55 ohm, make
1 DY 2 TEST2 trace length shorter than 0.5" .
XDP_TMS R54 1 2 54D9R2F-L1-GP R114 1KR2J-1-GP make sure "TEST4" routing is
C525
reference to GND and away other
XDP_TDI R55 1 2 54D9R2F-L1-GP 2DY 1 TEST4
SCD1U10V2KX-4GP
noisy signals
XDP_BPM#5 R46 1 2 54D9R2F-L1-GP

XDP_TDO R47 1 2 54D9R2F-L1-GP


DY
H_CPURST# R113 1 2 51R2F-2-GP
DY
3D3V_S0 H_DPRSTP# 1 TP76 TPAD14-GP
1 JV71-MV DDR3 Madison 1
H_DPSLP# 1 TP95 TPAD14-GP
H_DPW R# 1 TP114 TPAD14-GP
XDP_DBRESET# R105 1 2 1KR2J-1-GP H_PW RGD TP81 TPAD14-GP
DY H_CPUSLP#
1
1 TP78 TPAD14-GP Wistron Corporation
H_INIT# 1 TP92 TPAD14-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
H_CPURST# 1 TP86 TPAD14-GP Taipei Hsien 221, Taiwan, R.O.C.
XDP_TCK R32 1 2 54D9R2F-L1-GP
Place these TP on button-side, Title
XDP_TRST# R33 2 54D9R2F-L1-GP
1
easy to measure. CPU (1 of 2)
All place within 2" to CPU Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 4 of 62
A B C D E
A B C D E

VCC_CORE VCC_CORE

1
C86 C56 C85 C55 C87 C89 C88 C53 C50 C51 C52 C553 C538 C552 C539 C548 C547 C536 C537

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
2

2
DY DY
VCC_CORE
CPU1D 4 OF 4
VCC_CORE
4 A4 VSS VSS P6 4
CPU1C 3 OF 4 A8 P21
VSS VSS
A11 VSS VSS P24
A7 VCC VCC AB20 A14 VSS VSS R2
A9 VCC VCC AB7 A16 VSS VSS R5
A10 AC7 DY DY DY DY DY A19 R22
VCC VCC VSS VSS
A12 VCC VCC AC9 A23 VSS VSS R25
A13 AC12 TPAD14-GP TP23 1 TP_AF2_CPU
AF2 T1
VCC VCC VSS VSS
A15 VCC VCC AC13 B6 VSS VSS T4
A17 VCC VCC AC15 B8 VSS VSS T23
A18 VCC VCC AC17 B11 VSS VSS T26
A20 VCC VCC AC18 B13 VSS VSS U3
B7 VCC VCC AD7 B16 VSS VSS U6
B9 VCC VCC AD9 B19 VSS VSS U21
B10 VCC VCC AD10 B21 VSS VSS U24
B12 VCC VCC AD12 B24 VSS VSS V2
B14 VCC VCC AD14 C5 VSS VSS V5
B15 VCC VCC AD15 C8 VSS VSS V22
B17 VCC VCC AD17 C11 VSS VSS V25
B18 VCC VCC AD18 C14 VSS VSS W1
B20 VCC VCC AE9 C16 VSS VSS W4
C9 VCC VCC AE10 C19 VSS VSS W23
C10 VCC VCC AE12 C2 VSS VSS W26
C12 VCC VCC AE13 C22 VSS VSS Y3
C13 VCC VCC AE15 C25 VSS VSS Y6
C15 VCC VCC AE17 D1 VSS VSS Y21
C17 VCC VCC AE18 D4 VSS VSS Y24
C18 AE20 1D05V_S0 D8 AA2
VCC VCC VSS VSS
D9 VCC VCC AF9 D11 VSS VSS AA5
3 D10 AF10 D13 AA8 3
VCC VCC VSS VSS
D12 VCC VCC AF12 D16 VSS VSS AA11
D14 VCC VCC AF14 D19 VSS VSS AA14
D15 VCC VCC AF15 D23 VSS VSS AA16

1
D17 AF17 C67 C75 C79 C80 C83 D26 AA19
VCC VCC 1D05V_S0_CPU VSS VSS

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP
D18 AF18 C84 E3 AA22
VCC VCC 1D05V_S0 VSS VSS
E7 AF20 E6 AA25

SCD1U50V3KX-GP
2

2
VCC VCC G2 VSS VSS
E9 VCC E8 VSS VSS AB1
E10 VCC VCCP G21 1 2 E11 VSS VSS AB4
E12 VCC VCCP V6 DY E14 VSS VSS AB8
E13 J6 GAP-CLOSE-PW R E16 AB11
VCC VCCP VSS VSS
E15 VCC VCCP K6 E19 VSS VSS AB13
E17 VCC VCCP M6 E21 VSS VSS AB16
E18 J21 C57 C58 E24 AB19
VCC VCCP VSS VSS
1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

E20 VCC VCCP K21 F5 VSS VSS AB23


F7 VCC VCCP M21 layout note: "1D5V_VCCA_S0" F8 VSS VSS AB26
F9 N21 as short as possible F11 AC3
2

VCC VCCP VSS VSS


F10 VCC VCCP N6 F13 VSS VSS AC6
F12 VCC VCCP R21 F16 VSS VSS AC8
F14 VCC VCCP R6 F19 VSS VSS AC11
F15 VCC VCCP T21 F2 VSS VSS AC14
F17 VCC VCCP T6 F22 VSS VSS AC16
F18 V21 1D5V_S0 F25 AC19
VCC VCCP 1D5V_VCCA_S0 VSS VSS
F20 VCC VCCP W21 G4 VSS VSS AC21
AA7 FCM1608KF-1-GP G1 AC24
VCC VSS VSS
AA9 VCC VCCA B26 1 2 G23 VSS VSS AD2
AA10 C26 L18 68.00217.161 G26 AD5
VCC VCCA VSS VSS
1

AA12 H_VID[6..0] 40 C603 C6062nd = 68.00248.061 H3 AD8


VCC H_VID0 VSS VSS
AA13 AD6 H6 AD11
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP

2 VCC VID0 H_VID1 VCC_CORE VSS VSS 2


AA15 AF5 H21 AD13
2

VCC VID1 H_VID2 VSS VSS


AA17 VCC VID2 AE5 H24 VSS VSS AD16
AA18 AF4 H_VID3 J2 AD19
VCC VID3 VSS VSS
1

AA20 AE3 H_VID4 J5 AD22


VCC VID4 H_VID5 R25 VSS VSS
AB9 VCC VID5 AF3 J22 VSS VSS AD25
AC10 AE2 H_VID6 J25 AE1
100R2F-L1-GP-U

VCC VID6 VSS VSS


AB10 VCC K1 VSS VSS AE4
AB12 K4 AE8
2

VCC VSS VSS


AB14 VCC VCCSENSE AF7 VCC_SENSE 40 K23 VSS VSS AE11
AB15 VCC K26 VSS VSS AE14
AB17 VCC L3 VSS VSS AE16
AB18 VCC VSSSENSE AE7 VSS_SENSE 40 L6 VSS VSS AE19
L21 VSS VSS AE23
1

Layout Note: L24 AE26 TP_AE26_CPU 1 TP174 TPAD14-GP


R24 VSS VSS TP_A2_CPU TP98 TPAD14-GP
M2 VSS VSS A2 1
BGA479-SKT6-GPU7 VCCSENSE and VSSSENSE lines M5 AF6
100R2F-L1-GP-U

should be of equal length. VSS VSS


M22 VSS VSS AF8
M25 AF11
2

VSS VSS
N1 VSS VSS AF13
Layout Note: N4 AF16
Provide a test point (with VSS VSS
N23 VSS VSS AF19
no stub) to connect a N26 AF21
differential probe VSS VSS
P3 VSS VSS A25 TP_A25_CPU 1 TP181 TPAD14-GP
between VCCSENSE and AF25
VSSSENSE at the location VSS
where the two 54.9ohm
resistors terminate the BGA479-SKT6-GPU7
55 ohm transmission line.
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (2 of 2)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 5 of 62
A B C D E
5 4 3 2 1

NB1A 1 OF 10
H_A#[35..3]
H_A#[35..3] 4
H_D#[63..0] A14 H_A#3
4 H_D#[63..0] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G8 H_D#_1 H_A#_5 F16
H_D#2 F8 H13 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
E6 H_D#_3 H_A#_7 C18
1D05V_S0 H_D#4 G2 M16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
D H_SWING routing Trace width and H6 H_D#_5 H_A#_9 J13 D
H_D#6 H2 P16 H_A#10
Spacing use 10 / 20 mil H_D#_6 H_A#_10

1
H_D#7 F6 R16 H_A#11
R381 H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
221R2F-2-GP H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
H_SWING Resistors and M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15
Capacitors close MCH

2
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 H_D#_12 H_A#_16 F17
500 mil ( MAX ) H_SW ING H_D#13 J2 H_D#_13 H_A#_17 G20 H_A#17
H_D#14 N12 B19 H_A#18
H_D#_14 H_A#_18

1
H_D#15 J6 J16 H_A#19

SCD1U10V2KX-4GP
H_D#_15 H_A#_19
1

C619
R382 H_D#16 P2 E20 H_A#20
100R2F-L1-GP-U H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H_D#_17 H_A#_21 H16
H_D#18 R2 J20 H_A#22
2

H_D#19 H_D#_18 H_A#_22 H_A#23


N9 L17

2
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3 H_D#_32
H_D#33 AD14 H12 H_ADS# 4
C H_D#34 H_D#_33 H_ADS# C
Y6 H_D#_34 H_ADSTB#_0 B16 H_ADSTB#0 4
H_D#35 Y10 G17 H_ADSTB#1 4
H_D#36 H_D#_35 H_ADSTB#_1
Y12 H_D#_36 H_BNR# A9 H_BNR# 4
H_D#37 Y14 F11 H_BPRI# 4
H_D#38 H_D#_37 H_BPRI#
Y7 G12

HOST
H_D#_38 H_BREQ# H_BREQ#0 4
H_D#39 W2 E9 H_DEFER# 4
H_D#40 H_D#_39 H_DEFER#
AA8 H_D#_40 H_DBSY# B10 H_DBSY# 4
H_D#41 Y9 AH7 CLK_MCH_BCLK 3
H_D#42 H_D#_41 HPLL_CLK
AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# 3
H_D#43 AA9 J11 H_DPW R# 4
H_D#44 H_D#_43 H_DPWR#
AA11 H_D#_44 H_DRDY# F9 H_DRDY# 4
H_RCOMP routing Trace width and H_D#45 AD11 H9 H_HIT# 4
H_D#46 H_D#_45 H_HIT#
AD10 E12 H_HITM# 4
Spacing use 10 / 20 mil H_D#47 AD13
H_D#_46 H_HITM#
H11
H_D#_47 H_LOCK# H_LOCK# 4
H_D#48 AE12 C9 H_TRDY# 4
H_D#49 H_D#_48 H_TRDY#
AE9 H_D#_49
1 2 H_RCOMP H_D#50 AA2 H_D#_50
R380 24D9R2F-L-GP H_D#51 AD8
H_D#52 H_D#_51 H_DINV#[3..0]
AA3 H_D#_52 H_DINV#[3..0] 4
H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 H_D#_54 H_DINV#_1 L3
H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
Place them near to the chip ( < 0.5") H_D#57
AF3
AC1
H_D#_56 H_DINV#_3 Y1
H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0] 4
H_D#58 AE3 L10 H_DSTBN#0
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
H_D#60 AE11 AA5 H_DSTBN#2
H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 H_D#_61 H_DSTBN#_3 AE6
H_D#62 AG2 H_DSTBP#[3..0]
B H_D#_62 H_DSTBP#[3..0] 4 B
H_CPURST# 1 2 H_D#63 AD6 L9 H_DSTBP#0
EC76 SC33P50V2JN-3GP H_D#_63 H_DSTBP#_0 H_DSTBP#1
H_DSTBP#_1 M8
AA6 H_DSTBP#2
DY H_DSTBP#_2 H_DSTBP#3
H_DSTBP#_3 AE5
H_REQ#[4..0] 4
EMI capacitor 1D05V_S0 B15 H_REQ#0
H_SW ING H_REQ#_0 H_REQ#1
C5 H_SWING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2
2

B13 H_REQ#3
R370 H_REQ#_3 H_REQ#4
4,50 H_CPURST# C12 H_CPURST# H_REQ#_4 B14
1KR2F-3-GP E11
4 H_CPUSLP# H_CPUSLP# H_RS#[2..0] 4
B6 H_RS#0
H_RS#_0 H_RS#1
F12
1

H_AVREF H_RS#_1 H_RS#2


A11 H_AVREF H_RS#_2 C8
B11 H_DVREF
SCD1U16V2ZY-2GP
1

C614 CANTIGA-GM-GP-U-NF
R389 71.CNTIG.00U
2KR2F-3-GP
2
2

A JV71-MV DDR3 Madison A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (1 of 6)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 6 of 62
5 4 3 2 1
5 4 3 2 1

1D05V_S0

NB1B 2 OF 10 2 1
NB1C 3 OF 10 R196 49D9R2F-GP Close to GMCH as 500 mils.
M36

DDR CLK/ CONTROL/COMPENSATION


RESERVED#M36 C270 SC47P50V2JN-3GP
N36 AP24 M_CLK_DDR0 16 18 L_BKLTCTL L32
RESERVED#N36 SA_CK_0 L_BKLT_CTRL PEG_CMP
R33 AT21 M_CLK_DDR1 16 34 GMCH_BL_ON G32 T37 2 1
RESERVED#R33 SA_CK_1 LCTLA_CLK L_BKLT_EN PEG_COMPI
T33 AV24 M_CLK_DDR2 17 M32 T36 DY modify by RF
RESERVED#T33 SB_CK_0 L_CTRL_CLK PEG_COMPO
AH9 AU20 M_CLK_DDR3 17
RESERVED#AH9 SB_CK_1 LCTLB_DATA
AH10 M33 PEG_RXN[15..0] 52
RESERVED#AH10 CLK_DDC_EDID L_CTRL_DATA PEG_RXN0
AH12 AR24 M_CLK_DDR#0 16 18 CLK_DDC_EDID K33 H44
RESERVED#AH12 SA_CK#_0 DAT_DDC_EDID L_DDC_CLK PEG_RX#_0 PEG_RXN1
AH13 AR21 M_CLK_DDR#1 16 18 DAT_DDC_EDID J33 J46
RESERVED#AH13 SA_CK#_1 L_DDC_DATA PEG_RX#_1 PEG_RXN2
K12 AU24 M_CLK_DDR#2 17 L44
RESERVED#K12 SB_CK#_0 PEG_RX#_2 PEG_RXN3
AL34 AV20 M_CLK_DDR#3 17 L40
RESERVED#AL34 SB_CK#_1 GMCH_LCDVDD_ON M29 PEG_RX#_3 PEG_RXN4
AK34 18 GMCH_LCDVDD_ON N41
RESERVED#AK34 LIBG L_VDD_EN PEG_RX#_4 PEG_RXN5
AN35 BC28 M_CKE0 16 C44 P48
RESERVED#AN35 SA_CKE_0 LVDS_IBG PEG_RX#_5
AM35 AY28 M_CKE1 16 TPAD14-GP TP189 1 L_LVBG B43 N44 PEG_RXN6
RESERVED#AM35 SA_CKE_1 R183 1 LVDS_VREF LVDS_VBG PEG_RX#_6 PEG_RXN7
T24 AY36 M_CKE2 17 2 E37 T43
RESERVED#T24 SB_CKE_0 0R0402-PAD LVDS_VREFH PEG_RX#_7 PEG_RXN8
D BB36 M_CKE3 17 E38 U43 D
SB_CKE_1 LVDS_VREFL PEG_RX#_8

RSVD
B31 18 GMCH_TXACLK- C41 Y43 PEG_RXN9
RESERVED#B31 LVDSA_CLK# PEG_RX#_9 PEG_RXN10
B2 BA17 M_CS0# 16 18 GMCH_TXACLK+ C40 Y48
RESERVED#B2 SA_CS#_0 LVDSA_CLK PEG_RX#_10 PEG_RXN11
M1 AY16 M_CS1# 16 18 GMCH_TXBCLK- B37 Y36
RESERVED#M1 SA_CS#_1 LVDSB_CLK# PEG_RX#_11 PEG_RXN12
AV16 M_CS2# 17 18 GMCH_TXBCLK+ A37 AA43
SB_CS#_0 LVDSB_CLK PEG_RX#_12

LVDS
AR13 AD37 PEG_RXN13
SB_CS#_1 M_CS3# 17 PEG_RX#_13
AY21 18 GMCH_TXAOUT0- H47 AC47 PEG_RXN14
RESERVED#AY21 LVDSA_DATA#_0 PEG_RX#_14 PEG_RXN15
BD17 M_ODT0 16 18 GMCH_TXAOUT1- E46 AD39
SA_ODT_0 LVDSA_DATA#_1 PEG_RX#_15
AY17 M_ODT1 16 18 GMCH_TXAOUT2- G40 PEG_RXP[15..0] 52
SA_ODT_1 LVDSA_DATA#_2 PEG_RXP0
BF15 M_ODT2 17 A40 H43
SB_ODT_0 LVDSA_DATA#_3 PEG_RX_0

GRAPHICS
BG23 AY13 J44 PEG_RXP1
RESERVED#BG23 SB_ODT_1 M_ODT3 17 PEG_RX_1
BF23 H48 L43 PEG_RXP2
RESERVED#BF23 SM_PWROK 38 18 GMCH_TXAOUT0+ LVDSA_DATA_0 PEG_RX_2
BH18 BG22 M_RCOMPP D45 L41 PEG_RXP3
RESERVED#BH18 SM_RCOMP 18 GMCH_TXAOUT1+ LVDSA_DATA_1 PEG_RX_3
BF18 BH21 M_RCOMPN 18 GMCH_TXAOUT2+ F40 N40 PEG_RXP4
RESERVED#BF18 SM_RCOMP# LVDSA_DATA_2 PEG_RX_4 PEG_RXP5
B40 P47
SM_RCOMP_VOH LVDSA_DATA_3 PEG_RX_5 PEG_RXP6
BF28 N43
SM_RCOMP_VOH SM_RCOMP_VOL DDR_VREF_S3_1 PEG_RX_6 PEG_RXP7
BH28 18 GMCH_TXBOUT0- A41 T42
SM_RCOMP_VOL LVDSB_DATA#_0 PEG_RX_7 PEG_RXP8
0.75V 18 GMCH_TXBOUT1- H38
LVDSB_DATA#_1 PEG_RX_8
U42
AV42 G37 Y42 PEG_RXP9
SM_VREF 18 GMCH_TXBOUT2- LVDSB_DATA#_2 PEG_RX_9
AR36 DDR2 : connect to GND J37 W47 PEG_RXP10
SM_PWROK SM_REXT R4441 499R2F-2-GP LVDSB_DATA#_3 PEG_RX_10 PEG_RXP11
BF17 2 Y37

1
SM_REXT DDR3_DRAMRST# C335 PEG_RX_11 PEG_RXP12
BC36 DDR3_DRAMRST# 16,17 18 GMCH_TXBOUT0+ B42 AA42
SM_DRAMRST# LVDSB_DATA_0 PEG_RX_12

SCD1U10V2KX-4GP
G38 AD36 PEG_RXP13
18 GMCH_TXBOUT1+ LVDSB_DATA_1 PEG_RX_13
B38 18 GMCH_TXBOUT2+ F37 AC48 PEG_RXP14

2
DPLL_REF_CLK DREFCLK 3 LVDSB_DATA_2 PEG_RX_14 PEG_RXP15

PCI-EXPRESS
A38 K37 AD40
DPLL_REF_CLK# DREFCLK# 3 LVDSB_DATA_3 PEG_RX_15
E41 PEG_TXN[15..0] 52
DPLL_REF_SSCLK DREFSSCLK 3 PEG_TXN0_L C220 SCD1U10V2KX-5GP PEG_TXN0
DPLL_REF_SSCLK#
F41
DREFSSCLK# 3 PEG_TX#_0
J41 DIS 1 2
M46 PEG_TXN1_L DIS 1 2 C648 SCD1U10V2KX-5GP PEG_TXN1
TV_DACA PEG_TX#_1 PEG_TXN2_L C654 SCD1U10V2KX-5GP PEG_TXN2
F43 F25 M47 DIS 1 2

CLK
PEG_CLK CLK_MCH_3GPLL 3 TVA_DAC PEG_TX#_2
E43 TV_DACB H25 M40 PEG_TXN3_L DIS 1 2 C228 SCD1U10V2KX-5GP PEG_TXN3
PEG_CLK# CLK_MCH_3GPLL# 3 TVB_DAC PEG_TX#_3
TV_DACC K25 M42 PEG_TXN4_L DIS 1 2 C233 SCD1U10V2KX-5GP PEG_TXN4
TVC_DAC PEG_TX#_4 PEG_TXN5_L C658 SCD1U10V2KX-5GP PEG_TXN5
PEG_TX#_5
R48 DIS 1 2
H24 N38 PEG_TXN6_L DIS 1 2 C237 SCD1U10V2KX-5GP PEG_TXN6
TV_RTN PEG_TX#_6

TV
AE41 T40 PEG_TXN7_L DIS 1 2 C239 SCD1U10V2KX-5GP PEG_TXN7
DMI_RXN_0 DMI_TXN0 13 PEG_TX#_7 PEG_TXN8_L C265 SCD1U10V2KX-5GP PEG_TXN8
DMI_RXN_1
AE37
DMI_TXN1 13 PEG_TX#_8
U37 DIS 1 2
AE47 U40 PEG_TXN9_L DIS 1 2 C264 SCD1U10V2KX-5GP PEG_TXN9
DMI_RXN_2 DMI_TXN2 13 PEG_TX#_9 PEG_TXN10_L C269 SCD1U10V2KX-5GP PEG_TXN10
DMI_RXN_3
AH39
DMI_TXN3 13
C31
TV_DCONSEL_0 PEG_TX#_10
Y40 DIS 1 2
E32 AA46 PEG_TXN11_L DIS 1 2 C660 SCD1U10V2KX-5GP PEG_TXN11
TV_DCONSEL_1 PEG_TX#_11 PEG_TXN12_L C671 SCD1U10V2KX-5GP PEG_TXN12
DMI_RXP_0
AE40
DMI_TXP0 13 PEG_TX#_12
AA37 DIS 1 2
T25 AE38 AA40 PEG_TXN13_L DIS 1 2 C666 SCD1U10V2KX-5GP PEG_TXN13
3,4 CPU_SEL0 CFG_0 DMI_RXP_1 DMI_TXP1 13 PEG_TX#_13
R25 AE48 AD43 PEG_TXN14_L DIS 1 2 C680 SCD1U10V2KX-5GP PEG_TXN14
3,4 CPU_SEL1 CFG_1 DMI_RXP_2 DMI_TXP2 13 PEG_TX#_14
C P25 AH40 AC46 PEG_TXN15_L DIS 1 2 C679 SCD1U10V2KX-5GP PEG_TXN15 C
3,4 CPU_SEL2 CFG_2 DMI_RXP_3 DMI_TXP3 13 PEG_TX#_15
P20 PEG_TXP[15..0] 52
CFG_3 GMCH_BLUE PEG_TXP0_L C213 SCD1U10V2KX-5GP PEG_TXP0
P24
CFG_4 DMI_TXN_0
AE35
DMI_RXN0 13 19 GMCH_BLUE E28
CRT_BLUE PEG_TX_0
J42 DIS 1 2

DMI
C25 AE43 L46 PEG_TXP1_L DIS 1 2 C647 SCD1U10V2KX-5GP PEG_TXP1
CFG_5 DMI_TXN_1 DMI_RXN1 13 GMCH_GREEN PEG_TX_1 PEG_TXP2_L C651 SCD1U10V2KX-5GP PEG_TXP2
N24
CFG_6 DMI_TXN_2
AE46
DMI_RXN2 13 19 GMCH_GREEN G28
CRT_GREEN PEG_TX_2
M48 DIS 1 2
1D5V_S3 M24 AH42 M39 PEG_TXP3_L DIS 1 2 C222 SCD1U10V2KX-5GP PEG_TXP3
CFG_7 DMI_TXN_3 DMI_RXN3 13 PEG_TX_3

CFG
E21 GMCH_RED J28 M43 PEG_TXP4_L DIS 1 2 C229 SCD1U10V2KX-5GP PEG_TXP4
CFG_8 19 GMCH_RED CRT_RED PEG_TX_4
CFG9 C23 AD35 R47 PEG_TXP5_L DIS 1 2 C663 SCD1U10V2KX-5GP PEG_TXP5
CFG_9 DMI_TXP_0 DMI_RXP0 13 PEG_TX_5

VGA
C24 AE44 G29 N37 PEG_TXP6_L DIS 1 2 C234 SCD1U10V2KX-5GP PEG_TXP6
1

CFG_10 DMI_TXP_1 DMI_RXP1 13 CRT_IRTN PEG_TX_6 PEG_TXP7_L C245 SCD1U10V2KX-5GP PEG_TXP7


N21
CFG_11 DMI_TXP_2
AF46
DMI_RXP2 13 PEG_TX_7
T39 DIS 1 2
R443 P21 AH43 GMCH_DDCCLK H32 U36 PEG_TXP8_L DIS 1 2 C259 SCD1U10V2KX-5GP PEG_TXP8
CFG_12 DMI_TXP_3 DMI_RXP3 13 19 GMCH_DDCCLK CRT_DDC_CLK PEG_TX_8
3D3V_S0 80D6R2F-L-GP T21 GMCH_DDCDATA J32 U39 PEG_TXP9_L DIS 1 2 C253 SCD1U10V2KX-5GP PEG_TXP9
CFG_13 19 GMCH_DDCDATA CRT_DDC_DATA PEG_TX_9
R20 19 GMCH_HSYNC 1 R189 2 GMCH_HS J29 Y39 PEG_TXP10_L DIS 1 2 C266 SCD1U10V2KX-5GP PEG_TXP10
CFG_14 0R0402-PAD CRT_HSYNC PEG_TX_10 PEG_TXP11_L C657 SCD1U10V2KX-5GP PEG_TXP11
M20 E29 Y46 DIS 1 2
2

M_RCOMPP CFG16 CFG_15 CRT_TVO_IREF PEG_TX_11


L21 19 GMCH_VSYNC 1 R188 2GMCH_VS L29 AA36 PEG_TXP12_L DIS 1 2 C667 SCD1U10V2KX-5GP PEG_TXP12
CFG_16 CRT_VSYNC PEG_TX_12

GRAPHICS VID
H21 0R0402-PAD AA39 PEG_TXP13_L DIS 1 2 C664 SCD1U10V2KX-5GP PEG_TXP13
CFG_17 PEG_TX_13 PEG_TXP14_L C672 SCD1U10V2KX-5GP PEG_TXP14
P29
CFG_18 GFX_VID[4..0] 45 PEG_TX_14
AD42 DIS 1 2
R193 1 DY 2 4K02R2F-GP CFG20 M_RCOMPN R28 1 UMA 2 CRT_IREF AD46 PEG_TXP15_L DIS 1 2 C686 SCD1U10V2KX-5GP PEG_TXP15
CFG20 CFG_19 GFX_VID0 R161 1K02R2F-1-GP PEG_TX_15
T28 B33
1

CFG_20 GFX_VID_0 GFX_VID1


B32
R442 GFX_VID_1 GFX_VID2 CANTIGA-GM-GP-U-NF
G33
R385 1 CFG9 GFX_VID_2 GFX_VID3
DY 2 2K21R2F-GP 80D6R2F-L-GP F33 71.CNTIG.00U
GFX_VID_3 GFX_VID4 FOR Cantiga: 1.02k_1% ohm
13 PM_SYNC# R29 E33
PM_SYNC# GFX_VID_4
4,12,40 H_DPRSTP# B7 Teenah: 1.3k ohm
2

R556 1 CFG16 PM_EXTTS#0 PM_DPRSTP#


DY 2 2K21R2F-GP 16,17 PM_EXTTS#0 N33
PM_EXTTS#1 PM_EXT_TS#_0
P32
PM_EXT_TS#_1 CRT_IREF routing Trace
PM

AT40 C34 GFXVR_EN


13,33 PWROK
RSTIN# AT11
PWROK GFX_VR_EN 1D05V_S0 width use 20 mil PEG_TXN0_L UMA 1 2 C600 SCD1U10V2KX-5GP PEG_TXN0_L_1 UMA 1 4 RN82
RSTIN# HDMI_DATA2- 20,53
NB_THERMTRIP# T20 PEG_TXP0_L UMA 1 2 C605 SCD1U10V2KX-5GP PEG_TXP0_L_1 2 3 SRN0J-10-GP-U HDMI_DATA2+ 20,53

2
PM_DPRSLPVR_MCH R32 THERMTRIP#
13,25,31,32,34,35,52 PLT_RST1# 2 1
100R2J-2-GP R203 DPRSLPVR R201
AH37 1KR2F-3-GP PEG_TXN1_L UMA 1 2 C596 SCD1U10V2KX-5GP PEG_TXN1_L_1 UMA 1 4 RN83
CL_CLK0 13 HDMI_DATA1- 20,53
1

C324 CL_CLK PEG_TXP1_L PEG_TXP1_L_1


AH36 CL_DATA0 13 UMA 1 2 C598 SCD1U10V2KX-5GP 2 3 SRN0J-10-GP-U HDMI_DATA1+ 20,53
SC100P50V2JN-3GP CL_DATA
BG48 AN36
ME

PWROK 13,33

1
NC#BG48 CL_PWROK
DY BF48 AJ35
2

NC#BF48 CL_RST# MCH_CLVREF CL_RST#0 13 PEG_TXN2_L PEG_TXN2_L_1


BD48 AH34 UMA 1 2 C589 SCD1U10V2KX-5GP UMA 1 4 RN84 HDMI_DATA0- 20,53
NC#BD48 CL_VREF PEG_TXP2_L PEG_TXP2_L_1
BC48 UMA 1 2 C592 SCD1U10V2KX-5GP 2 3 SRN0J-10-GP-U HDMI_DATA0+ 20,53

1
NC#BC48
BH47

1
NC#BH47
4,12,38 PM_THRMTRIP-A# 1 R192 2 BG47 for HDMI port C C288 R200
0R0402-PAD NC#BG47 499R2F-2-GP PEG_TXN3_L PEG_TXN3_L_1
BE47 N28 UMA 1 2 C568 SCD1U10V2KX-5GP UMA 1 4

SCD1U10V2KX-4GP
NC#BE47 DDPC_CTRLCLK HDMI_CLK- 20,53
BH46 M28 PEG_TXP3_L UMA 1 2 C561 SCD1U10V2KX-5GP PEG_TXP3_L_1 2 3 SRN0J-10-GP-U HDMI_CLK+ 20,53

2
B NC#BH46 DDPC_CTRLDATA RN85 B
BF46 G36

2
NC#BF46 SDVO_CTRLCLK GMCH_HDMI_CLK 20
NC

1 R195 2 PM_DPRSLPVR_MCH BG45 E36


13,40 PM_DPRSLPVR GMCH_HDMI_DATA 20
MISC

NC#BG45 SDVO_CTRLDATA
0R0402-PAD BH44 K36 CLK_MCH_OE# CLK_MCH_OE# 3
NC#BH44 CLKREQ#
BH43 H36 MCH_ICH_SYNC# 13
NC#BH43 ICH_SYNC#
BH6 FOR Cantiga:500 ohm
NC#BH6 R555 R61
BH5 Teenah: 392 ohm
NC#BH5
PWROK 1 2 BG4 B12 MCH_TSATN# PEG_RXP3 1 2UMA HDMI_DETECT#_L 1 2UMA
EC77 SC33P50V2JN-3GP NC#BG4 TSATN# HDMI_DETECT# 20
BH3
NC#BH3 0R2J-2-GP 0R2J-2-GP
BF3
DY BH2
NC#BF3
NC#BH2 HDA_BCLK
BG2 B28 R419
NC#BG2 HDA_BCLK HDA_RST#
EMI capacitor BE2
NC#BE2 HDA_RST#
B30
BG1 B29 HDA_SDI 1 2 UMA ACZ_SDIN3
NC#BG1 HDA_SDI ACZ_SDIN3 12
BF1 C29 HDA_SDO
NC#BF1 HDA_SDO HDA_SYNC 33R2J-2-GP
BD1 A28
NC#BD1 HDA_SYNC
HDA

BC1
NC#BC1 RN36 RN30
F1
NC#F1 HDA_BCLK ACZ_BIT_CLK GMCH_RED
A47 1 8 ACZ_BIT_CLK 12 1 8
NC#A47 HDA_SYNC ACZ_SYNC_R GMCH_GREEN
2 7 ACZ_SYNC_R 12 2 7
HDA_RST# 3 6 ACZ_RST#_R GMCH_BLUE 3 6
ACZ_RST#_R 12
CANTIGA-GM-GP-U-NF HDA_SDO 4 5 ACZ_SDATAOUT_R 4 5
ACZ_SDATAOUT_R 12
71.CNTIG.00U
UMA
SRN33J-4-GP SRN0J-7-GP
FOR UMA,change to 150 ohm RN32
1D05V_S0 1D5V_S3 1 2 ACZ_BIT_CLK (66.15156.08L) GMCH_BL_ON 2 3
R445 1KR2F-3-GP EC79 DY SC12P50V2JN-3GP GMCH_LCDVDD_ON 1 4
2 1 FOR Discrete change RN to 0 ohm UMA
1

1 2 ACZ_RST#_R (66.R0036.A8L) SRN100KJ-6-GP


R387 SM_RCOMP_VOH EC78 DY SC12P50V2JN-3GP
56R2J-4-GP UMA
1

C756 C759 1 2 HDA_BCLK LIBG 1 2


R441 EC21 DY SC12P50V2JN-3GP R384 2K37R2F-GP
2

MCH_TSATN# 3K01R2F-3-GP SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP RN31


2

5 4 DIS
6 3 TV_DACC CRT_IREF 1 2
2

SM_RCOMP_VOL 7 2 TV_DACB R162 0R2J-2-GP


8 1 TV_DACA
2

C757 C760 RN33


R446 SRN0J-7-GP GMCH_VS 2 3
GFXVR_EN 1KR2F-3-GP SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP GMCH_HS 1 4
GFXVR_EN 45
2

A A
DIS
FOR UMA,change to 75 ohm SRN0J-10-GP-U
1
2

(66.75036.08L)
R178
DY 100KR2F-L1-GP
3D3V_S0 layout take note Remove RN88 & RN89
1

RN34 UMA
LCTLA_CLK 4 1 Wistron Corporation
LCTLB_DATA 3 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SRN10KJ-5-GP
RN35 Title
PM_EXTTS#0 4 1
PM_EXTTS#1 3 2 Cantiga (2 of 6)
Size Document Number Rev
SRN10KJ-5-GP
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 7 of 62
5 4 3 2 1
5 4 3 2 1

NB1D 4 OF 10 NB1E 5 OF 10
M_A_DQ[63..0] M_B_DQ[63..0]
16 M_A_DQ[63..0] 17 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_A_BS#0 16 M_B_DQ0 AK47 BC16 M_B_BS#0 17
M_A_DQ1 SA_DQ_0 SA_BS_0 M_B_DQ1 SB_DQ_0 SB_BS_0
AJ41 SA_DQ_1 SA_BS_1 BG18 M_A_BS#1 16 AH46 SB_DQ_1 SB_BS_1 BB17 M_B_BS#1 17
M_A_DQ2 AN38 AT25 M_A_BS#2 16 M_B_DQ2 AP47 BB33 M_B_BS#2 17
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# 16 M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# 16 AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS# 17
M_A_DQ6 AM44 AY20 M_A_W E# 16 M_B_DQ6 AM48 BG16 M_B_CAS# 17
M_A_DQ7 SA_DQ_6 SA_WE# M_B_DQ7 SB_DQ_6 SB_CAS#
AM42 SA_DQ_7 AP48 SB_DQ_7 SB_WE# BF14 M_B_W E# 17
D M_A_DQ8 AN43 M_B_DQ8 AU47 D
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_A_DM[7..0] M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7..0] 16 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0] 17
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ15 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
M_A_DQ17 SA_DQ_16 SA_DM_5 M_A_DM6 M_B_DQ17 SB_DQ_16 SB_DM_4 M_B_DM5
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3

A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6

B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7..0] 16 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45 M_B_DQS[7..0]
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7..0] 17
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 BA43 BF40 AV48

MEMORY
M_A_DQ23 SA_DQ_22 SA_DQS_2 M_A_DQS3 M_B_DQ23 SB_DQ_22 SB_DQS_1 M_B_DQS2

MEMORY
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
M_A_DQ25 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7..0] 16 BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0] 17
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
M_A_DQ32 SA_DQ_31 SA_DQS#_3 M_A_DQS#4 M_B_DQ32 SB_DQ_31 SB_DQS#_2 M_B_DQS#3
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

SYSTEM
AU13 SA_DQ_36 M_A_A[14..0] 16 BH12 SB_DQ_36 SB_DQS#_7 AN5
C M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11 M_B_A[14..0] C
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14..0] 17
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ41 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
M_A_DQ43 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
M_A_DQ45 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ47 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR

AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16

DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW33 M_B_A11
M_A_DQ50 SA_DQ_49 SA_MA_12 M_A_A13 M_B_DQ50 SB_DQ_49 SB_MA_11 M_B_A12
AT9 SA_DQ_50 SA_MA_13 BH17 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 SA_DQ_52 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ53 AU6 M_B_DQ53 AV1
M_A_DQ54 SA_DQ_53 M_B_DQ54 SB_DQ_53
AT5 SA_DQ_54 AP3 SB_DQ_54
M_A_DQ55 AN10 M_B_DQ55 AR1
M_A_DQ56 SA_DQ_55 M_B_DQ56 SB_DQ_55
AM11 SA_DQ_56 AL1 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
M_A_DQ58 SA_DQ_57 M_B_DQ58 SB_DQ_57
AJ9 SA_DQ_58 AJ1 SB_DQ_58
M_A_DQ59 AJ8 M_B_DQ59 AH1
M_A_DQ60 SA_DQ_59 M_B_DQ60 SB_DQ_59
AN12 SA_DQ_60 AM2 SB_DQ_60
M_A_DQ61 AM13 M_B_DQ61 AM3
M_A_DQ62 SA_DQ_61 M_B_DQ62 SB_DQ_61
AJ11 SA_DQ_62 AH3 SB_DQ_62
M_A_DQ63 AJ12 M_B_DQ63 AJ3
SA_DQ_63 SB_DQ_63

B CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF B

71.CNTIG.00U 71.CNTIG.00U

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (3 of 6)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 8 of 62
5 4 3 2 1
5 4 3 2 1

7 OF 10 VCC_GFXCORE
1D5V_S3 NB1G

AP33 W28
VCC_SM VCC_AXG_NCTF
AN33 V28
VCC_SM VCC_AXG_NCTF 1D05V_S0 NB1F 6 OF 10
BH32 W26 R438 FOR VCC CORE
VCC_SM VCC_AXG_NCTF
BG32 V26
VCC_SM VCC_AXG_NCTF
BF32
VCC_SM VCC_AXG_NCTF
W25 1 2 DIS
BD32 V25 0R5J-6-GP AG34
VCC_SM VCC_AXG_NCTF VCC
BC32 W24 AC34
VCC_SM VCC_AXG_NCTF VCC
BB32 V24 1 R439 2 AB34
VCC_SM VCC_AXG_NCTF 0R5J-6-GP VCC
BA32 W23 AA34

1
VCC_SM VCC_AXG_NCTF VCC

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
AY32 V23 C291 C287 C274 C249 C281 C280 C284 Y34
VCC_SM VCC_AXG_NCTF VCC
AW32
VCC_SM VCC_AXG_NCTF
AM21 DIS V34
VCC

SCD22U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AV32 AL21 U34

2
VCC_SM VCC_AXG_NCTF VCC
AU32 AK21 AM33
VCC_SM VCC_AXG_NCTF VCC
D AT32 W21 AK33 D
VCC_SM VCC_AXG_NCTF VCC
AR32 V21 AJ33
VCC_SM VCC_AXG_NCTF VCC

POWER
AP32 U21 AG33
VCC_SM VCC_AXG_NCTF VCC
AN32 AM20 AF33
VCC_SM VCC_AXG_NCTF VCC
BH31 AK20
VCC_SM VCC_AXG_NCTF Coupling CAP 370 mils from the Edge
BG31 W20 AE33
VCC_SM VCC_AXG_NCTF VCC

VCC CORE
BF31 U20 AC33
VCC_SM VCC_AXG_NCTF DY VCC
BG30 AM19 AA33
VCC_SM VCC_AXG_NCTF VCC
BH29
VCC_SM VCC_AXG_NCTF
AL19 DY Y33
VCC
BG29 AK19 W33
VCC_SM VCC_AXG_NCTF VCC
BF29 AJ19 V33
VCC_SM VCC_AXG_NCTF VCC
BD29 AH19 U33
VCC_SM VCC_AXG_NCTF VCC

VCC SM
BC29 AG19 AH28
VCC_SM VCC_AXG_NCTF VCC_GFXCORE VCC
BB29 AF19 AF28
VCC_SM VCC_AXG_NCTF VCC
BA29 AE19 AC28

1
VCC_SM VCC_AXG_NCTF C612 C289 VCC
AY29 AB19 AA28
VCC_SM VCC_AXG_NCTF VCC
AW29 AA19 AJ26
VCC_SM VCC_AXG_NCTF VCC

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP
AV29 Y19 AG26

2
VCC_SM VCC_AXG_NCTF VCC
AU29 W19 AE26

SCD47U6D3V2KX-GP
1

1
VCC_SM VCC_AXG_NCTF VCC

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
AT29 V19 TC18 C292 C277 C273 C276 C282 C302 C285 C275 1 C286 C271 C279 C278 AC26
VCC_SM VCC_AXG_NCTF VCC

SC1U10V3ZY-6GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AR29 U19 AH25
VCC_SM VCC_AXG_NCTF VCC

ST220U2D5VBM-2GP
AP29 AM17 2 AG25

2
VCC_SM VCC_AXG_NCTF VCC
AK17 AF25
VCC_AXG_NCTF VCC
BA36 AH17 AG24

POWER
VCC_SM/NC VCC_AXG_NCTF VCC
BB24
VCC_SM/NC VCC_AXG_NCTF
AG17 Coupling CAP AJ23
VCC
BD16 AF17 DY UMA DY UMA DY UMA UMA UMA DY UMA UMA DY UMA AH23 1D05V_S0
VCC GFX NCTF

VCC_SM/NC VCC_AXG_NCTF VCC


BB21 AE17 AF23
VCC_SM/NC VCC_AXG_NCTF VCC
AW16 AC17 AM32
VCC_SM/NC VCC_AXG_NCTF VCC_NCTF
AW13 AB17 T32 AL32
VCC_SM/NC VCC_AXG_NCTF VCC VCC_NCTF
AT13
VCC_SM/NC VCC_AXG_NCTF
Y17 Place on the Edge Coupling CAP VCC_NCTF
AK32
W17 AJ32
VCC_GFXCORE VCC_AXG_NCTF VCC_NCTF
V17 AH32
VCC_AXG_NCTF VCC_NCTF
AM16 AG32
VCC_AXG_NCTF VCC_NCTF
Y26 AL16 AE32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE25 AK16 AC32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AB25 AJ16 AA32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA25 AH16 Y32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE24 AG16 W32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AC24 AF16 U32
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA24 AE16 AM30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
Y24 AC16 AL30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
C AE23 AB16 AK30 C
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AC23 AA16 AH30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AB23 Y16 AG30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AA23 W16 AF30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AJ21 V16 AE30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AG21 U16 AC30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE21 AB30
VCC_AXG VCC_NCTF
AC21 AA30
VCC_AXG VCC_NCTF
AA21 Y30
VCC_AXG VCC_NCTF
Y21 W30
VCC_AXG VCC_NCTF

VCC NCTF
AH20
AF20
VCC_AXG FOR VCC SM VCC_NCTF
V30
U30
VCC_AXG 1D5V_S3 VCC_NCTF
AE20 AL29
VCC_AXG VCC_NCTF
AC20 AK29
VCC_AXG VCC_NCTF
AB20 AJ29
VCC_AXG VCC_NCTF

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AA20 C361 C367 C359 AH29

1
VCC_AXG VCC_NCTF

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
T17 C349 C323 C308 C348 AG29
VCC_AXG TC22 VCC_NCTF
T16 AE29
VCC_AXG VCC_NCTF
AM15 AC29

ST330U2D5VBM-GP
2

2
VCC_AXG DY VCC_NCTF
AL15
VCC_AXG DY VCC_NCTF
AA29
AE15 Y29
VCC_AXG VCC_NCTF
AJ15 W29
VCC_AXG VCC_NCTF
AH15 V29
VCC_AXG VCC_NCTF
AG15 AL28
VCC_AXG VCC_NCTF
AF15
VCC_AXG 80.3371V.12L Place on the Edge VCC_NCTF
AK28
AB15 AL26
VCC_AXG VCC_NCTF
AA15 AK26
VCC_AXG VCC_NCTF
VCC GFX

Y15 AK25
VCC_AXG VCC_NCTF
V15 AK24
VCC_AXG VCC_NCTF
U15 AK23
VCC_AXG VCC_NCTF
AN14
VCC_AXG
AM14
VCC_AXG
U14 AV44 SM_LF1_GMCH CANTIGA-GM-GP-U-NF
VCC_AXG VCC_SM_LF
VCC SM LF

T14 BA37 SM_LF2_GMCH 71.CNTIG.00U


VCC_AXG VCC_SM_LF
AM40 SM_LF3_GMCH
VCC_SM_LF
AV21 SM_LF4_GMCH
VCC_SM_LF
AY5 SM_LF5_GMCH
VCC_SM_LF
AM10 SM_LF6_GMCH
VCC_SM_LF
BB13 SM_LF7_GMCH
VCC_SM_LF
SCD47U16V3ZY-3GP
C298

C340

C320
SC1U10V3KX-3GP

SC1U10V3KX-3GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1

1
C350

C290

C347 C329
B VCC_AXG_SENSE AJ14 B
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

45 VCC_AXG_SENSE VSS_AXG_SENSE VCC_AXG_SENSE


AH14
2

45 VSS_AXG_SENSE VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF
71.CNTIG.00U
U60(ISL6263ACRZ-T-GP) place near Cantiga

place near Cantiga

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (4 of 6)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: Wednesday, October 28, 2009 Sheet 9 of 62
5 4 3 2 1
5 4 3 2 1

5V_S0 Imax = 300 mA 3D3V_S0_DAC 1D05V_S0


UMA 3D3V_S0_DAC
U13 2 R378 1 73mA 3D3V_CRTDAC_S0 NB1H 8 OF 10 852mA

SC2D2U6D3V3MX-1-GP
1
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP
0R0603-PAD C206 C617

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD47U6D3V2KX-GP
1

1
1

C250

C267

C662

C670

C268

C263
1 5 R379 U13
VIN VOUT VTT
2 GND UMA UMA 0R2J-2-GP VTT T13

1
3 4 C141 B27 U12 2
DY

2
EN NC#4 VCCA_CRT_DAC VTT

SC22U6D3V5MX-2GP
BC1 A26 T12

2
VCCA_CRT_DAC VTT
SC1U16V3ZY-GP

SC1U16V3ZY-GP
UMA U11

2
VTT
1

1
G9091-330T11U-GP T11
BC2 M_VCCA_DAC_BG VTT
74.09091.J3F A25 U10

CRT
3D3V_S0_DAC VCCA_DAC_BG VTT
UMA DY B25 T10
2

2
VSSA_DAC_BG VTT
U9
D
2nd = 74.09198.Q7F 1 R374 2 5mA VTT
T9
D

SCD1U10V2KX-4GP
0R0603-PADC625 C207 VTT 1D05V_S0
VTT U8

1
UMA UMA R168 M_VCCA_DPLLA F47 T8 D5

SCD01U16V2KX-3GP
1D05V_S0 0R2J-2-GP VCCA_DPLLA VTT 3D3V_S0 3D3V_HV_S0
U7 1

VTT
M_VCCA_DPLLB VTT
DY L48 T7

2
VCCA_DPLLB VTT 1D05V_HV_S0 2
U6 3 1 1 R376 2
65mA

SCD1U10V2KX-4GP
VTT
2 R371 1 M_VCCA_DPLLA M_VCCA_HPLL AD1 T6 R106 0R0603-PAD

PLL
2
VCCA_HPLL VTT

C621
0R0603-PAD U5 2 10R2J-2-GP
VTT
1

1
SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

C622 C624 R390 M_VCCA_MPLL AE1 T5 BAT54-5-GP


0R2J-2-GP 1D8V_TXLVDS_S0 VCCA_MPLL VTT
V3 83.BAT54.D81

2
VTT
DY U3 2nd = 83.BAT54.X81
2

VTT

1
UMA DY 13.2mA J48 VCCA_LVDS VTT V2
C636 U2

A LVDS
2

SC27P50V2JN-2-GP VTT
J47 T2

2
VSSA_LVDS VTT
VTT V1
1D5V_S0 U1
2 R399 1 65mA M_VCCA_DPLLB VTT
0R0603-PAD 1 R421 2 VCCA_PEG_BG AD48 VCCA_PEG_BG
1

1
SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

C642 C644 R400 0R0603-PAD

1
0R2J-2-GP C704
DY SCD1U10V2KX-4GP I=1A

A PEG
2

UMA U66
DY 50mAAA48

2
1D05V_RUN_PEGPLL 3 3D3V_S0
2

1D05V_S0 VCCA_PEG_PLL VIN


VOUT 2 1D8V_NB_S0
1D05V_S0 1
GND

2
1D05V_S0 2 R447 1 1D05V_SM AR20
0R0603-PAD AP20
VCCA_SM
VCCA_SM
322mA C876 C877

C309

SC1U10V3KX-3GP

C305

SC1U10V3KX-3GP

SC1U10V2ZY-GP

SC1U10V2ZY-GP
C306 AN20 G1117-18T63UF-GP
480mA POWER

1
VCCA_SM
1

1
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
C C755 C753 C754 C752 AR17 74.G1117.B3C C
VCCA_SM

1
SC1U10V3KX-3GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
R430 AP17 C616 C251 C272 UMA
VCCA_SM
0R0603-PAD DY AN17 UMA UMA
2

2
1D05V_SUS_MCH_PLL2 VCCA_SM
AT16

2
VCCA_SM
DY AR16

A SM
2

VCCA_SM
AP16 VCCA_SM DY DY
FCM1608KF-1-GP 24mA
1 2 M_VCCA_HPLL
1D05V_S0
SC4D7U6D3V3KX-GP

L22
1

68.00217.161 C687 C692


SCD1U10V2KX-4GP 2 R202 1D05V_SM_CK 1D5V_SUS_SM_CK 1D5V_S3
2nd = 68.00248.061 1
0R0603-PAD AP28
200mA
2

VCCA_SM_CK
1

1
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP
C294 C295 C313 C293 AN28 B22 2 R448 1
24mA AP25
VCCA_SM_CK VCC_AXF
B21 0R0603-PAD

AXF
VCCA_SM_CK VCC_AXF

SCD1U10V2KX-4GP
FCM1608KF-1-GP AN25 A21
139.2mA
2

2
VCCA_SM_CK VCC_AXF

1
C750

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
1 2 M_VCCA_MPLL AN24 C751 C758
VCCA_SM_CK
SC10U6D3V5MX-3GP

L21 DY DY AM28 DY
VCCA_SM_CK_NCTF
1

120ohm 100MHz C694 C697 AM26

A CK

2
SCD1U10V2KX-4GP VCCA_SM_CK_NCTF
68.00217.161 DY AM25 VCCA_SM_CK_NCTF
2nd = 68.00248.061 AL25 BF21
2

VCCA_SM_CK_NCTF VCC_SM_CK
AM24 BH20

SM CK
VCCA_SM_CK_NCTF VCC_SM_CK
AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
3D3V_S0_DAC AM23 BF20 1D8V_TXLVDS_S0 1D8V_NB_S0
VCCA_SM_CK_NCTF VCC_SM_CK
AL23
1D05V_S0 1 R377 2
VCCA_SM_CK_NCTF 119mA 2 R396 1
0R0603-PAD 0R0603-PAD

1
3D3V_HV_S0

C635
SC1KP50V2KX-1GP

C634
SC1U10V3KX-3GP
K47 R398
L20 VCC_TX_LVDS
2 R386 1 3D3V_S0_DAC_1 B24 UMA UMA 0R2J-2-GP
B
1 2 1D05V_RUN_PEGPLL 0R2J-2-GP DY A24
VCCA_TV_DAC
C35 106mA DY
B

TV

2
FCM1608CF-221T02-GP VCCA_TV_DAC VCC_HV
B35

HV
1D5V_S0 VCC_HV
68.00217.521 A35

2
VCC_HV
1

220ohm 100MHz C691


2nd = 68.00119.111 SCD1U10V2KX-4GP 1 R375 2 VCC_HDA A32 1D05V_S0
VCC_HDA

HDA
0R0603-PAD V48
1782mA
2

VCC_PEG
1

VCC_PEG U48
1

SC4D7U6D3V3KX-GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP
C205 R383 V47

PEG
VCC_PEG

1
SCD1U10V2KX-4GP

0R2J-2-GP

C678
DY U47 C283 C739 C675

D TV/CRT
1D5VRUN_TVDAC VCC_PEG
UMA M25 U46
2

VCCD_TVDAC VCC_PEG
2

2
1D5V_S0 1D05V_SUS_MCH_PLL2 1D5VRUN_QDAC L28 VCCD_QDAC
VCC_DMI AH48
AF1 AF48 DY DY 1D05V_S0

DMI
VCCD_HPLL VCC_DMI
SCD1U10V2KX-4GP

AH47
1 R156 2 1D5VRUN_TVDAC 58.7mA 157.2mA 1D05V_RUN_PEGPLL AA47 VCCD_PEG_PLL
VCC_DMI
VCC_DMI AG47 456mA
1

0R0603-PAD C715
1

1
SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
C243 C174 C690 C712 C732 C722
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY 50mA M38

VTTLF
2

VCCD_LVDS
LVDS

L37 A8 VTTLF1 DY
2

2
VCCD_LVDS VTTLF VTTLF2
VTTLF L1
AB2 VTTLF3
VTTLF

CANTIGA-GM-GP-U-NF

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP
1D8V_NB_S0 1 1 1

C676

C650

C620
L6 71.CNTIG.00U
UMA
1 2 1D5VRUN_QDAC 1 R153 2 1D8V_SUS_DLVDS SB 1202 2 2 2
1

A PBY160808T-181Y-GP 0R0603-PAD A
1

68.00206.041 R159 C235 C175 C186 R167


60.3mA
1

0R2J-2-GP

SCD1U10V2KX-4GP

C247 C188 UMA 0R2J-2-GP


SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
SCD01U16V2KX-3GP

SCD1U10V2KX-4GP

2nd = 68.00214.101
Wistron Corporation
2

2
2

180ohm 100MHz 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

UMA UMA Taipei Hsien 221, Taiwan, R.O.C.


UMA UMA
DY Title
DIS
Cantiga (5 of 6)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 10 of 62
5 4 3 2 1
5 4 3 2 1

NB1I 9 OF 10 NB1J 10 OF 10
BG21 VSS VSS AH8
AU48 VSS VSS AM36 L12 VSS VSS Y8
AR48 VSS VSS AE36 AW21 VSS VSS L8
AL48 VSS VSS P36 AU21 VSS VSS E8
BB47 VSS VSS L36 AP21 VSS VSS B8
AW47 VSS VSS J36 AN21 VSS VSS AY7
AN47 VSS VSS F36 AH21 VSS VSS AU7
AJ47 VSS VSS B36 AF21 VSS VSS AN7
AF47 VSS VSS AH35 AB21 VSS VSS AJ7
AD47 VSS VSS AA35 R21 VSS VSS AE7
AB47 VSS VSS Y35 M21 VSS VSS AA7
D Y47 VSS VSS U35 J21 VSS VSS N7 D
T47 VSS VSS T35 G21 VSS VSS J7
N47 VSS VSS BF34 BC20 VSS VSS BG6
L47 VSS VSS AM34 BA20 VSS VSS BD6
G47 VSS VSS AJ34 AW20 VSS VSS AV6
BD46 VSS VSS AF34 AT20 VSS VSS AT6
BA46 VSS VSS AE34 AJ20 VSS VSS AM6
AY46 VSS VSS W34 AG20 VSS VSS M6
AV46 VSS VSS B34 Y20 VSS VSS C6
AR46 VSS VSS A34 N20 VSS VSS BA5
AM46 VSS VSS BG33 K20 VSS VSS AH5
V46 VSS VSS BC33 F20 VSS VSS AD5
R46 VSS VSS BA33 C20 VSS VSS Y5
P46 VSS VSS AV33 A20 VSS VSS L5
H46 VSS VSS AR33 BG19 VSS VSS J5
F46 VSS VSS AL33 A18 VSS VSS H5
BF44 VSS VSS AH33 BG17 VSS VSS F5
AH44 VSS VSS AB33 BC17 VSS VSS BE4
AD44 VSS VSS P33 AW17 VSS
AA44 L33 AT17 BC3
Y44
U44
VSS
VSS
VSS
VSS
VSS
VSS
H33
N32
R17
M17
VSS
VSS
VSS
VSS VSS
VSS
VSS
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
BC43 VSS VSS A31 BA16 VSS VSS BA2
AV43 VSS VSS AN29 VSS AW2
AU43 VSS VSS T29 AU16 VSS VSS AU2
AM43 VSS VSS N29 AN16 VSS VSS AR2
C J43 K29 N16 AP2 C
VSS VSS VSS VSS
C43 VSS VSS H29 K16 VSS VSS AJ2
BG42 VSS VSS F29 G16 VSS VSS AH2
AY42 VSS VSS A29 E16 VSS VSS AF2
AT42 VSS VSS BG28 BG15 VSS VSS AE2
AN42 VSS VSS BD28 AC15 VSS VSS AD2
AJ42 VSS VSS BA28 W15 VSS VSS AC2
AE42 VSS VSS AV28 A15 VSS VSS Y2
N42 VSS VSS AT28 BG14 VSS VSS M2
L42 VSS VSS AR28 AA14 VSS VSS K2
BD41 VSS VSS AJ28 C14 VSS VSS AM1
AU41 VSS VSS AG28 BG13 VSS VSS AA1
AM41 VSS VSS AE28 BC13 VSS VSS P1
AH41 VSS VSS AB28 BA13 VSS VSS H1
AD41 VSS VSS Y28
AA41 VSS VSS P28 VSS U24
Y41 VSS VSS K28 AN13 VSS VSS U28
U41 VSS VSS H28 AJ13 VSS VSS U25
T41 VSS VSS F28 AE13 VSS VSS U29
M41 VSS VSS C28 N13 VSS
G41 VSS VSS BF26 L13 VSS
B41 VSS VSS AH26 G13 VSS VSS_NCTF AF32
BG40 VSS VSS AF26 E13 VSS VSS_NCTF AB32
BB40 VSS VSS AB26 BF12 VSS VSS_NCTF V32
AV40 VSS VSS AA26 AV12 VSS VSS_NCTF AJ30
AN40 VSS VSS C26 AT12 VSS VSS_NCTF AM29
H40 VSS VSS B26 AM12 VSS VSS_NCTF AF29
E40 BH25 AA12 AB29

VSS NCTF
VSS VSS VSS VSS_NCTF
AT39 VSS VSS BD25 J12 VSS VSS_NCTF U26
B B
AM39 VSS VSS BB25 A12 VSS VSS_NCTF U23
AJ39 VSS VSS AV25 BD11 VSS VSS_NCTF AL20
AE39 VSS VSS AR25 BB11 VSS VSS_NCTF V20
N39 VSS VSS AJ25 AY11 VSS VSS_NCTF AC19
L39 VSS VSS AC25 AN11 VSS VSS_NCTF AL17
B39 VSS VSS Y25 AH11 VSS VSS_NCTF AJ17
BH38 VSS VSS N25 VSS_NCTF AA17
BC38 VSS VSS L25 Y11 VSS VSS_NCTF U17
BA38 VSS VSS J25 N11 VSS
AU38 G25 G11

A3,C1,A48,BH1,BH48
VSS VSS VSS
AH38 VSS VSS E25 C11 VSS NCTF_VSS_SCB#BH48 BH48 NCTF_VSS_SCB#BH48 1 TP201 TPAD14-GP
AD38 BF24 BG10 BH1 NCTF_VSS_SCB#BH1 1 TP202 TPAD14-GP

NCTF TEST PIN:


VSS SCB
VSS VSS VSS NCTF_VSS_SCB#BH1
AA38 VSS VSS AD12 AV10 VSS NCTF_VSS_SCB#A48 A48 NCTF_VSS_SCB#A48 1 TP188 TPAD14-GP
Y38 VSS VSS AY24 AT10 VSS NCTF_VSS_SCB#C1 C1 NCTF_VSS_SCB#C1 1 TP190 TPAD14-GP
U38 AT24 AJ10 A3 NCTF_VSS_SCB#A3 1 TP187 TPAD14-GP
VSS VSS VSS NCTF_VSS_SCB#A3
T38 VSS VSS AJ24 AE10 VSS
J38 VSS VSS AH24 AA10 VSS NC#E1 E1
F38 VSS VSS AF24 M10 VSS NC#D2 D2
C38 VSS VSS AB24 BF9 VSS NC#C3 C3
BF37 VSS VSS R24 BC9 VSS NC#B4 B4
BB37 VSS VSS L24 AN9 VSS NC#A5 A5
AW37 VSS VSS K24 AM9 VSS NC#A6 A6
AT37 VSS VSS J24 AD9 VSS NC#A43 A43
AN37 VSS VSS G24 G9 VSS NC#A44 A44
AJ37 F24 B9 B45

NC
VSS VSS VSS NC#B45
H37 VSS VSS E24 BH8 VSS NC#C46 C46
C37 VSS VSS BH23 BB8 VSS NC#D47 D47
BG36 VSS VSS AG23 AV8 VSS NC#B47 B47
A BD36 VSS VSS Y23 AT8 VSS NC#A46 A46 A
AK15 VSS VSS B23 NC#F48 F48
AU36 VSS VSS A23 NC#E48 E48
VSS AJ6 NC#C48
NC#B48
C48
B48 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
CANTIGA-GM-GP-U-NF Taipei Hsien 221, Taiwan, R.O.C.
71.CNTIG.00U CANTIGA-GM-GP-U-NF
Title
71.CNTIG.00U
Cantiga (6 of 6)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 11 of 62
5 4 3 2 1
5 4 3 2 1

C386
1 2 RTC_X1

SC7P50V2DN-2GP

4
82.30001.661

1
X4 2nd = 82.30001.B21
3D3V_AUX_S5 D12 X-32D768KHZ-34GPU R215
2 RTC_AUX_S5 10MR2J-L-GP

SC1U16V3ZY-GP
3

2
1
D D
1 C402

2
RTC_BAT_R
BAS40CW -GP C385 SB1A 1 OF 6
2nd = 83.00040.M81 1 2
83.00040.E81 C23 RTCX1 FWH0/LAD0 K5 LPC_LAD0 34,35
RTC1 RN39 SC7P50V2DN-2GP RTC_X2 C24 K4
RTCX2 FWH1/LAD1 LPC_LAD1 34,35
SRN20KJ-GP-U L6
FWH2/LAD2 LPC_LAD2 34,35 1D05V_S0 1D05V_S0
1 RTC_BAT 1 2 2 3 RTC_RST# A25 K2
PWR RTCRST# FWH3/LAD3 LPC_LAD3 34,35

RTC
LPC
2 R228 1KR2J-1-GP 1 4 SRTC_RST# F20
GND SRTCRST#

1
NP1 1 2 INTRUDER# C22 K3 LPC_LFRAME# 34,35
NP1 INTRUDER# FWH4/LFRAME#
NP2 NP2

1
G17 R230 C397 C396 INTVRMEN B22 J3 LDRQ0# 1 TP200 TPAD14-GP R413 R424
INTVRMEN LDRQ0#

SC1U16V3ZY-GP

SC1U16V3ZY-GP
1MR2J-1-GP LAN100_SLP A22 J1 3D3V_LDRQ1_S0 1 TP144 TPAD14-GP 56R2J-4-GP 56R2J-4-GP
BAT-CON2-1-GP-U LAN100_SLP LDRQ1#/GPIO23
DY DY

GAP-OPEN

2
62.70001.011 E25 GLAN_CLK A20GATE N7 KA20GATE 34
2nd = AJ27 1D05V_S0 H_DPRSTP#
H_A20M# 4
1

TPAD14-GP TP204 A20M#


1TP_LAN_RSTSYNC C13 LAN_RSTSYNC
H_PW RGD
AJ25 H_DPRSTP# H_DPRSTP# 4,7,40
DPRSTP#

LAN / GLAN
F14 AE23 H_DPSLP# 4 RN71
LAN_RXD0 DPSLP#

1
G13 LAN_RXD1 1 4
D14 AJ26 H_FERR#_R 2 3 H_FERR# 4 C683 C706
LAN_RXD2 FERR#

SC47P50V2JN-3GP

SC47P50V2JN-3GP
2

2
GLAN_COMP place D13 AD22 H_PW RGD H_PW RGD 4,50 SRN56J-4-GP
LAN_TXD0 CPUPWRGD DY DY
within 500 mil of ICH9M D12 LAN_TXD1
close to SB1 E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 4

CPU
1D5V_S0 HDMI_EN B10 AE22
GLAN_DOCK#/GPIO56 INIT# H_INIT# 4
INTR AG25 H_INTR 4 modify by RF
C modify by RF 1 2 GLAN_COMP B28 GLAN_COMPI RCIN# L3 KBRCIN# 34
C
R213 24D9R2F-L-GP B27 GLAN_COMPO
1

C381 DY AF23 H_NMI 4 1D05V_S0


ACZ_BIT_CLK NMI R411
7 ACZ_BIT_CLK AF6 HDA_BIT_CLK SMI# AF24 H_SMI# 4
SC47P50V2JN-3GP 7 ACZ_SYNC_R ACZ_SYNC_R AH4 1 2
2

HDA_SYNC 56R2J-4-GP
STPCLK# AH27 H_STPCLK# 4
7 ACZ_RST#_R ACZ_RST#_R AE7 HDA_RST# H_THERMTRIP_R
THRMTRIP# AG26 1 2 PM_THRMTRIP-A# 4,7,38
27 ACZ_SDATAIN0 ACZ_SDATAIN0 AF4 R410 54D9R2F-L1-GP
ACZ_SDATAIN1 HDA_SDIN0 ICH_TP8 TP195 TPAD14-GP Layout note: R373 needs to placed
30 ACZ_SDATAIN1 AG4 HDA_SDIN1 PECI AG27 1 DY
within 2" of ICH9, R379 must be

IHDA
AH3 HDA_SDIN2

1
ACZ_SDIN3 AE5 placed within 2" of R373 w/o stub
7 ACZ_SDIN3 HDA_SDIN3
AH11 C673
SATA4RXN

SC47P50V2JN-3GP
7 ACZ_SDATAOUT_R ACZ_SDATAOUT_R AG5 AJ11

2
HDA_SDOUT SATA4RXP
SATA4TXN AG12 DY
AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12
TPAD14-GP TP197 1HDA_DOCK_RST# AE8 HDA_DOCK_RST#/GPIO34
SATA5RXN AH9
37 MEDIA_LED# AG8 SATALED# SATA5RXP AJ9 modify by RF
SATA5TXN AE10
21 SATA_RXN0 AJ16 SATA0RXN SATA5TXP AF10
3D3V_S5 AH16
21 SATA_RXP0
HDD

SATA
SATA0RXP
21 SATA_TXN0 AF17 SATA0TXN SATA_CLKN AH18 CLK_PCIE_SATA# 3
21 SATA_TXP0 AG17 SATA0TXP SATA_CLKP AJ18 CLK_PCIE_SATA 3
1

R218 22 SATA_RXN1 AH13 AJ7 SATARBIAS


SATA1RXN SATARBIAS#
10KR2J-3-GP 22 SATA_RXP1 AJ13 AH7 2 1
ODD 22
22
SATA_TXN1
SATA_TXP1
AG14
AF14
SATA1RXP
SATA1TXN
SATARBIAS 24D9R2F-L-GP R194
2

B SATA1TXP B
HDMI_EN Place within 500 mils of
ICH9 ball 1D05V_S0 3D3V_S0
1

ICH9M-GP-NF
R217 71.ICH9M.00U

2
1
10KR2J-3-GP
DY DY
RN70
2

SRN10KJ-5-GP

3
4
H_INIT#_G
RN37
R414 30 ACZ_BTCLK_MDC 1 8 ACZ_BIT_CLK
3D3V_S0 1 2 MEDIA_LED# 30 ACZ_SYNC_MDC 2 7 ACZ_SYNC_R

B
30 ACZ_RST#_MDC 3 6 ACZ_RST#_R DY
10KR2J-3-GP 1 2 ACZ_BTCLK_MDC 30 ACZ_SDATAOUT_MDC 4 5 ACZ_SDATAOUT_R
EC22DY SC12P50V2JN-3GP H_INIT# E C FW H_INIT# 1 TP116 TPAD14-GP
1 2 ACZ_BITCLK_AUDIO Q14
EC45DY SC22P50V3JN-GP SRN33J-4-GP
RN68 MMBT3904-4-GP
RTC_AUX_S5 RTC_AUX_S5 27 ACZ_BITCLK_AUDIO 1 8 ACZ_BIT_CLK 84.T3904.C11
27 ACZ_SYNC_AUDIO 2 7 ACZ_SYNC_R
27 ACZ_RST#_AUDIO 3 6 ACZ_RST#_R
1

27 ACZ_SDATAOUT_AUDIO 4 5 ACZ_SDATAOUT_R
R265 R229
330KR2F-L-GP JV71-MV DDR3 Madison
SRN33J-4-GP
330KR2F-L-GP

A A
2

INTVRMEN
Wistron Corporation
LAN100_SLP integrated VccSus1_05,VccSus1_5,VccCL1_5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
INTVRMEN High=Enable Low=Disable
Title
integrated VccLan1_05VccCL1_05
ICH9-M (1 of 4)
LAN100_SLP High=Enable Low=Disable Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 12 of 62

5 4 3 2 1
5 4 3 2 1
SB1C 3 OF 6
RN72
SB1B 2 OF 6 G16 AH23 SATA0GP 5 4
15,25,32 SMB_CLK SMBCLK SATA0GP/GPIO21 SATA1GP
15,25,32 SMB_DATA A13 AF19 6 3
PCI_REQ#0 SMB_LINK_ALERT# E17 SMBDATA SATA1GP/GPIO19 ICH_GPIO36
D11 F1 AE21 7 2

SATA
AD0 REQ0# LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36

GPIO
SMB
C8 G4 C17 AD20 ICH_GPIO37 8 1
D9
AD1 PCI GNT0#
B6 PCI_REQ#1 B18
SMLINK0 SATA5GP/GPIO37
AD2 REQ1#/GPIO50 SMLINK1 SRN10KJ-6-GP
E12 A7 H1 CLK_ICH14 3
AD3 GNT1#/GPIO51 PCI_REQ#2 PM_RI# CLK14
E9 F13 F19 AF3

Clocks
AD4 REQ2#/GPIO52 RI# CLK48 CLK48_ICH 3
C9 F12
AD5 GNT2#/GPIO53 PCI_REQ#3
E10 E6 TPAD14-GP TP199 1PM_SUS_STAT# R4 P1 PM_SUS_CLK 33
AD6 REQ3#/GPIO54 DBRESET# SUS_STAT#/LPCPD# SUSCLK
B7 F6 G19
AD7 GNT3#/GPIO55 SYS_RESET#
C7 C16 PM_SLP_S3# 27,33,34,38,43,45,48,51
AD8 SLP_S3#
C5 D8 7 PM_SYNC# M6 E16 PM_SLP_S4# 34,38,42,44
AD9 C/BE0# PMSYNC#/GPIO0 SLP_S4#
PCI_GNT#0 and SPI_CS1# G11 B4 G17 PM_SLP_S5#
1
AD10 C/BE1# SMB_ALERT# A17 SLP_S5# TP203 TPAD14-GP
have weak internal Pull up F8 D6
AD11 C/BE2# SMBALERT#/GPIO11
F11 A5 C10 S4_STATE#1
AD12 C/BE3# S4_STATE#/GPIO26 TP207 TPAD14-GP
E7 3 PM_STPPCI# A14
AD13 PCI_IRDY# STP_PCI#

SYS GPIO
A3 D3 3 PM_STPCPU# E19 G20 PWROK 7,33
AD14 IRDY# STP_CPU# PWROK
D2 E3
AD15 PAR PM_DPRSLPVR_1 R211 2 100R2J-2-GP
D F10 R1 34 PM_CLKRUN# L4 M2 1 PM_DPRSLPVR 7,40 D
AD16 PCIRST# PCI_DEVSEL# CLKRUN# DPRSLPVR/GPIO16 R212 1
D5 C6 2DY
AD17 DEVSEL#

Power MGT
D10 E4 PCI_PERR# E20 B13 PM_BATLOW#_R 100KR2J-1-GP
AD18 PERR# 25 PCIE_WAKE# WAKE# BATLOW#
B3 C2 PCI_LOCK# M5 D8
AD19 PLOCK# PCI_SERR# 34 INT_SERIRQ SERIRQ PWRBTN#_ICH
F7 J4 33 THRM# AJ23 R3 1 BAS16-1-GP PM_PWRBTN# 34,50
AD20 SERR# PCI_STOP# THRM# PWRBTN#
C3 A4
AD21 STOP# PCI_TRDY#
F3 F5 33,40 VGATE_PWRGD D21 D20 3
AD22 TRDY# PCI_FRAME# VRMPWRGD LAN_RST#
F4
AD23 FRAME#
D7 83.00016.B11 2nd = 83.00016.F11
C1 3D3V_S0 1 DY 2 ICH_TP7 A20 D22 RSMRST#_SB 2
AD24 PLT_RST#_R 1 R216 R221 0R2J-2-GP SST RSMRST#
G7 C14 2 PLT_RST1# 7,25,31,32,34,35,52
AD25 PLTRST#
H7 D4 0R0402-PAD TPAD14-GP TP193 1FP_ID AG19 R5 CLK_PWRGD 3

1
AD26 PCICLK TACH1/GPIO1 CK_PWRGD

10KR2J-3-GP
D1 R2 R404 AH21 3D3V_S0
AD27 PME# 34 EC_TMR TACH2/GPIO6
G5 1 2 34 ECSCI#_1 AG21 R6 PWROK 7,33
AD28 C388 SC100P50V2JN-3GP TACH3/GPIO7 CLPWROK
H6 34 ECSWI# A21
AD29 GPIO8
G1 PCLK_ICH 3 DY C12 B16 PM_SLP_M# 1 TP148 TPAD14-GP

1
AD30 LAN_PHY_PWR_CTRL/GPIO12 SLP_M#
H3 C21

2
AD31 PSW_CLR# ENERGY_DETECT/GPIO13 R226
AE18 F24 CL_CLK0 7
TACH0/GPIO17 CL_CLK0 3K24R2F-GP
Interrupt I/F K1 B19

2
GPIO18 CL_CLK1

GAP-OPEN
INT_PIRQA# J5 H4 INT_PIRQE# G78 TPAD14-GP TP196 1ICH9_GPIO20 AF8
INT_PIRQB# PIRQA# PIRQE#/GPIO2 INT_PIRQF# GPIO20
E1 K6 TPAD14-GP TP122 1CLK_SEL1 AJ22 F22 CL_DATA0 7

2
INT_PIRQC# PIRQB# PIRQF#/GPIO3 INT_PIRQG# SCLOCK/GPIO22 CL_DATA0

Controller Link
J6 F2 A9 C19

GPIO
INT_PIRQD# PIRQC# PIRQG#/GPIO4 INT_PIRQH# GPIO27 CL_DATA1
C4 G2 D19
PIRQD# PIRQH#/GPIO5 SATACLKREQ# GPIO28 CL_VREF0_ICH
3 SATACLKREQ# L1 C25

1
SATACLKREQ#/GPIO35 CL_VREF0
1PCB_VER0_SB AE19 A19

1
SLOAD/GPIO38 CL_VREF1
ICH9M-GP-NF TPAD14-GP TP198 1PCB_VER1_SB AG22
TPAD14-GP TP194 MIC_SEL_1 SDATAOUT0/GPIO39 R227
71.ICH9M.00U AF21
SDATAOUT1/GPIO48 CL_RST0#
F21 CL_RST#0 7
AH24 D18 453R2F-1-GP

SCD1U10V2KX-4GP
1
GPIO49 CL_RST1#

C409
NO_iTPM A8
GPIO57/CLGPIO5
A16 ICH_GPIO24 1 TP153 TPAD14-GP

2
GPIO24/MEM_LED
27 ACZ_SPKR M7 C18 SUSPWRACK

2
SPKR GPIO10/SUS_PWR_ACK
7 MCH_ICH_SYNC# AJ24 C11 AC_PRESENT
MCH_SYNC# GPIO14/AC_PRESENT
1ICH_TP3 B21 C20 ICH_GPIO91 TP206 TPAD14-GP
TPAD14-GP TP205 TP3 GPIO9/WOL_EN

MISC
AH20

1
PWM0

100KR2J-1-GP
GPIO49 should be pulled down to AJ20 R220
PWM1
GND only when using Teenah. When AJ21
PWM2
using Cantiga, this ball should 3D3V_S5
be left as No Connect. ICH9M-GP-NF

2
71.ICH9M.00U RN73
USB_OC#0 8 1
3D3V_S5 USB_OC#1 7 2
C SB1D 4 OF 6 USB_OC#3 6 3 C
1 2 VGATE_PWRGD RP1 5 4
N29 V27 EC81 DY SC12P50V2JN-3GP PM_RI# 1 10
25 PCIE_RXN1 PERN1 DMI0RXN DMI_RXN0 7 3D3V_S5
PM_BATLOW#_R 9 DBRESET# SRN10KJ-6-GP
Direct Media Interface

25 PCIE_RXP1 N28 V26 DMI_RXP0 7 2


TXN1 PERP1 DMI0RXP
25 PCIE_TXN1 C363 SCD1U10V2KX-5GP 2 1 P27 U29 DMI_TXN0 7 1 2 CLK_PWRGD ECSWI# 3 8 SMB_LINK_ALERT#
TXP1 PETN1 DMI0TXN PCIE_WAKE#
25 PCIE_TXP1 C360 SCD1U10V2KX-5GP 2 1 P26 U28 DMI_TXP0 7 EC80 DY SC12P50V2JN-3GP 4 7 SUSPWRACK
PETP1 DMI0TXP
LAN 3D3V_S5 5 6 SMB_ALERT# RP5
L29 Y27 EMI capacitor USB_OC#4 1 10
32 PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 7 3D3V_S5
32 PCIE_RXP2 L28 Y26 DMI_RXP1 7 SRN10KJ-L3-GP USB_OC#9 2 9 USB_OC#7
C369 SCD1U10V2KX-5GP 2 TXN2 PERP2 DMI1RXP RP3 USB_OC#5 USB_OC#6
32 PCIE_TXN2 1 M27 W29 DMI_TXN1 7 3 8
C365 SCD1U10V2KX-5GP 2 TXP2 PETN2 DMI1TXN PCI_TRDY# USB_OC#8 USB_OC#10
32 PCIE_TXP2 1 M26 W28 DMI_TXP1 7 1 10 3D3V_S0 4 7
PETP2 DMI1TXP INT_PIRQG#
MINICARD1 2 9 INT_PIRQB# 3D3V_S5 5 6 USB_OC#11
J29 AB27 PCI_REQ#0 3 8 PCI_PERR#
PERN3 DMI2RXN DMI_RXN2 7
J28 AB26 INT_PIRQH# 4 7 PCI_REQ#3 SRN10KJ-L3-GP
PCI-Express

PERP3 DMI2RXP DMI_RXP2 7


K27 AA29 DMI_TXN2 7 3D3V_S0 5 6 PCI_IRDY#
PETN3 DMI2TXN
K26 AA28 DMI_TXP2 7
PETP3 DMI2TXP SRN8K2J-2-GP-U
G29 AD27 DMI_RXN3 7 RP4
PERN4 DMI3RXN 1D5V_S0 INT_PIRQD#
G28 AD26 DMI_RXP3 7 1 10 3D3V_S0 3D3V_S5
PERP4 DMI3RXP PCI_LOCK#
H27 AC29 DMI_TXN3 7 2 9 PCI_REQ#2

1
PETN4 DMI3TXN 3D3V_S5
H26 AC28 DMI_TXP3 7 3 8 PCI_DEVSEL#
1

PETP4 DMI3TXP PCI_FRAME# 4 7 PCI_REQ#1 R702

1
E29 T26 CLK_PCIE_ICH# 3 R417
3D3V_S0 5 6 PCI_STOP# 10KR2J-3-GP
PERN5 DMI_CLKN 24D9R2F-L-GP
E28 T25 CLK_PCIE_ICH 3 1 R222 2 R701
PERP5 DMI_CLKP SRN8K2J-2-GP-U 1KR2F-3-GP
F27 10KR2J-3-GP

2
PETN5 RP2
F26 AF29
2

PETP5 DMI_ZCOMP DMI_IRCOMP_R INT_PIRQC# AC_PRESENT


AF28 1 10 DY

2
DMI_IRCOMP 3D3V_S0
C29 INT_PIRQF# 2 9 PCI_SERR# D11
PERN6/GLAN_RXN INT_SERIRQ
C28 AC5 USBPN0 24 USB 3 8 INT_PIRQA# 1 RSMRST#_SB RSMRST#_SB
PERP6/GLAN_RXP USBP0N PM_CLKRUN#
D27 AC4 USBPP0 24 4 7 INT_PIRQE#

1
PETN6/GLAN_TXN USBP0P
D26 AD3 USBPN1 24 Pair Device 3D3V_S0 5 6 ECSCI#_1 34 RSMRST#_KBC 3 DY
PETP6/GLAN_TXP USBP1N R224
AD2 USBPP1 24
USBP1P SRN8K2J-2-GP-U 100KR2J-1-GP
D23
SPI_CLK USBP2N
AC1 USBPN2 24 0 USB2 2
D24 AC2 BAT54-5-GP
SPI_ICH_CS1# SPI_CS0# USBP2P USBPP2 24
F23 AA5 1 USB3 83.BAT54.D81

2
SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBPN3 32
USBP3P
AA4 USBPP3 32 2nd = 83.BAT54.X81
D25
SPI_MOSI USBP4N
AB2 USBPN4 18 2 USB4
SPI

E23 AB3 USBPP4 18


SPI_MISO USBP4P No Reboot Strap BOOT BIOS Strap
USBP5N
AA1 3 MINI1 3D3V_AUX_S5
USB_OC#0 N4 AA2 SPKR LOW = Defaule
24 USB_OC#0 OC0#/GPIO59 USBP5P
24 USB_OC#1 USB_OC#1 N5 W5 USBPN6 36 4 CCD High=No Reboot PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
B OC1#/GPIO40 USBP6N B
N6 USB W4 USBPP6 36
USB_OC#3 OC2#/GPIO41 USBP6P
P6
OC3#/GPIO42 USBP7N
Y3 USBPN7 23 5 NC 0 1 SPI
USB_OC#4 M1 Y2 1 0 PCI
USBPP7 23

1
USB_OC#5 OC4#/GPIO43 USBP7P 3D3V_S0
These R need close SB N2
OC5#/GPIO29 USBP8N
W1 6 Finger Print 1 1 LPC(Default)
within 600 mils USB_OC#6 M4 W2 DY A16 swap override strap R699

1
USB_OC#7 OC6#/GPIO30 USBP8P MIC_SEL_1
M3
OC7#/GPIO31 USBP9N
V2 USBPN9 24 7 Blue Tooth 1 2 10KR2J-3-GP
USB_OC#8 N3 V3 USBPP9 24 R405 10KR2J-3-GP low = A16 swap override enable R700
OC8#/GPIO44 USBP9P Q43
24 USB_OC#9 USB_OC#9 N1 U5 8 NC ACZ_SPKR 1 2 PCI_GNT#3 high = default 100KR2J-1-GP

2
USB_OC#10 OC9#/GPIO45 USBP10N R434 1KR2J-1-GP RSMRST#_SB
P5
OC10#/GPIO46 USBP10P
U4 DY 4 3
USB_OC#11 P3 U1 9 USB1
USBPN11 31

2
OC11#/GPIO47 USBP11N RN38
U2 USBPP11 31 5 2 3V/5V_PWRGD 41
USB_RBIAS_PN AG2 USBP11P NO_iTPM
USBRBIAS 10 NC 1 4
DY
2 1 AG1 PWROK 2 3 SPI_ICH_CS1# 1 2 Q43_6 6 1
R415 22D6R2F-L1-GP USBRBIAS# R225 1KR2J-1-GP
11 Cardreader
2N7002KDW-GP SB 1007
ICH9M-GP-NF SRN10KJ-5-GP
71.ICH9M.00U

A A

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (2 of 4)
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: Wednesday, October 28, 2009 Sheet 13 of 62
5 4 3 2 1
5 4 3 2 1
SB1F 6 OF 6
RTC_AUX_S5
6uA in G3 A23
VCCRTC VCC1_05
A15 Layout Note:Place near ICH9M
B15 1D05V_S0
V5REF_S0 A6 V5REF
VCC1_05
VCC1_05 C15 1.16A

1
C412 C413 D15
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY V5REF_S5 AE1 E15
V5REF_SUS VCC1_05

1
F15 C736 C744 C735 C384 C745 C746 C391

2
VCC1_05

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AA24 VCC1_5_B VCC1_05 L11
AA25 L12 DY

2
VCC1_5_B VCC1_05
AB24 VCC1_5_B VCC1_05 L14
AB25 VCC1_5_B VCC1_05 L16
1D5V_S0 AC24 L17
VCC1_5_B VCC1_05
AC25 L18
646mA AD24
VCC1_5_B
VCC1_5_B
VCC1_05
VCC1_05 M11
D AD25 M18 D
VCC1_5_B VCC1_05
1

1
C737 C742 C252 C382 C724 C703 C733 AE25 P11
VCC1_5_B VCC1_05 23mA 1D5V_S0
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC2D2U10V3KX-1GP
DY DY DY DY AE26 P18 L9
VCC1_5_B VCC1_05 1D5V_DMIPLL_ICH_S0
AE27 T11 1 2
2

2
VCC1_5_B VCC1_05 IND-1D2UH-10-GP
AE28 VCC1_5_B VCC1_05 T18

1
AE29 U11 C713 C707 68.1R220.10D
VCC1_5_B VCC1_05 C723 SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP
F25 U18

CORE
VCC1_5_B VCC1_05 SCD01U16V2KX-3GP
G25 V11 DY 2nd = 68.1R220.10B

2
VCC1_5_B VCC1_05
H24 VCC1_5_B VCC1_05 V12
H25 V14
VCC1_5_B VCC1_05 1D05V_S0
J24 VCC1_5_B VCC1_05 V16
J25 V17 1D05V_DMI_ICH_S0 2 R433 1
VCC1_5_B VCC1_05

SCD1U10V2KX-4GP
K24 V18 0R0603-PAD
K25
VCC1_5_B
VCC1_5_B
VCC1_05 41mA

1
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
L23 R29 C731 C256 C728 C729
VCC1_5_B VCCDMIPLL

SC4D7U6D3V3KX-GP
*Within a given well, 5VREF needs to be up before the L24
VCC1_5_B DY
corresponding 3.3V rail L25 W23

2
VCC1_5_B VCCDMI 1D05V_S0
M24
VCC1_5_B VCCDMI
Y23 DY DY
M25
N23
VCC1_5_B
AB23 2mA
47mA N24
VCC1_5_B
VCC1_5_B
V_CPU_IO
V_CPU_IO
AC23
3D3V_S0 5V_S0 1D5V_S0 1D5V_APLL_S0 N25 3D3V_S0
VCC1_5_B

1
P24 AG29 C716 C717 C738
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP
1L8 2 P25 C677 C688 DY
A

VCC1_5_B
1

VCCA3GP
IND-1D2UH-10-GP R24 AJ6 SCD1U10V2KX-4GP

2
VCC1_5_B VCC3_3

1
D10 R223 68.1R220.10D C242 C241 R25 SCD1U10V2KX-4GP

2
VCC1_5_B

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
100R2J-2-GP C261 R26 AC10
2mA RB751V-40-2-GP VCC1_5_B VCC3_3

SC1U16V3ZY-GP
2nd = 68.1R220.10B DY R27 3D3V_S0
83.R2004.B8F
2

2
VCC1_5_B
T24 AD19
VCC3_3=308mA
K

V5REF_S0 VCC1_5_B VCC3_3


2nd = 83.R0304.A8F T27
VCC1_5_B VCC3_3
AF20

1
C T28 AG24 C698 C
VCC1_5_B VCC3_3
1

C387 T29 AC20 3D3V_S0


SCD1U16V2ZY-2GP VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
U24 DIS

VCCP_CORE

2
VCC1_5_B
U25 B9 1R403 2 0R2J-2-GP 3D3V_S0
2

VCC1_5_B VCC3_3

1
V24 F9 C395 C721 C374
VCC1_5_B VCC3_3 32mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V25 VCC1_5_B VCC3_3 G3 1R402 2 0R2J-2-GP 1D5V_S0

1
Layout Note: U23 G6 C661 UMA

2
VCC1_5_B VCC3_3

SCD1U10V2KX-4GP
Place near ICH9 3D3V_S5 5V_S5 W24 J2
VCC1_5_B VCC3_3
W25 J7

2
VCC1_5_B VCC3_3
K23 K7
A

VCC1_5_B VCC3_3
1

Y24 DIS

PCI
D7 R423 VCC1_5_B VCCHDA_ICH
Y25 AJ4 1R408 2 0R2J-2-GP 3D3V_S5
100R2J-2-GP VCC1_5_B VCCHDA
2mA RB751V-40-2-GP
1D5V_S0 AJ19 AJ3 VCCSUSHDA_ICH 32mA 1R409 2 0R2J-2-GP
83.R2004.B8F 1.64A VCCSATAPLL VCCSUSHDA 1D5V_S0

1
C669 UMA
K

SCD1U10V2KX-4GP
V5REF_S5 2nd = 83.R0304.A8F AC16 AC8 TP_VCCSUS1D05V_ICH_1
VCC1_5_A VCCSUS1_05
AD15 F17

2
VCC1_5_A VCCSUS1_05
1

C699 C689 AD16


VCC1_5_A

1
SC4D7U6D3V3KX-GP

ARX
SCD1U16V2ZY-2GP C693 C674 C383 AE15 AD8 VCCSUS1D5V_INT_ICH C408
VCC1_5_A VCCSUS1_5
SC1U16V3ZY-GP

SC1U16V3ZY-GP

SCD1U50V3KX-GP

AF15 SCD1U10V2KX-4GP
2

VCC1_5_A
AG15 F18

2
VCC1_5_A VCCSUS1_5

1
DY AH15 C407
VCC1_5_A SCD1U10V2KX-4GP
AJ15
VCC1_5_A 3D3V_S5
A18

2
VCCSUS3_3
AC11 VCC1_5_A VCCSUS3_3 D16
AD11 VCC1_5_A VCCSUS3_3 D17

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
VCCPSUS
AE11 E22
VCC1_5_A VCCSUS3_3

1
ATX
AF11 C743 C734 C726
VCC1_5_A

SCD1U10V2KX-4GP
AG10
VCC1_5_A DY
AG11 AF1

2
VCC1_5_A VCCSUS3_3
B AH10 B
VCC1_5_A
1

C681 C705 AJ10 T1


VCC1_5_A VCCSUS3_3
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

T2
AC9
VCCSUS3_3
T3 212mA3D3V_S5
2

VCC1_5_A VCCSUS3_3
DY VCCSUS3_3 T4
AC18 T5
VCC1_5_A VCCSUS3_3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AC19 T6
VCC1_5_A VCCSUS3_3

1
U6 C730 C398 C327
VCCSUS3_3
AC21 U7
VCC1_5_A VCCSUS3_3
V6

2
VCCSUS3_3
G10 V7 DY
VCCPUSB

VCC1_5_A VCCSUS3_3
G9 VCC1_5_A VCCSUS3_3 W6
VCCSUS3_3 W7
AC12 Y6
VCC1_5_A VCCSUS3_3
AC13 Y7
1D5V_S0 VCC1_5_A VCCSUS3_3
AC14 VCC1_5_A VCCSUS3_3 T7
USBPLL=11mA

SCD1U10V2KX-4GP
AJ5 G22 VCCCL1D05V_INT_ICH
VCCUSBPLL VCCCL1_05

1
C406
1

C720 C700 C682 AA7 G23 VCCCL1D5V_INT_ICH


VCC1_5_A VCCCL1_5
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

USB CORE

AB6

2
VCC1_5_A

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AB7 A24
2

VCC1_5_A VCCCL3_3

1
AC6 B24 C404 C405
3D3V_S0 VCC1_5_A VCCCL3_3 3D3V_S0
AC7
VCC1_5_A DY
19mA in S0;78mA in S3/S4/S5 19mA

2
VCCLAN_1D05V_INT_ICHA10
VCCLAN1_05
1

C390 A11 DY DY
VCCLAN1_05
1

C389 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

A12
2

1D5V_S0 VCCLAN3_3
B12
2

VCCLAN3_3
A
1 R219 2 23mA 1D5VGLANPLL_ICH A27
VCCGLANPLL
A

0R0603-PAD
1

GLAN POWER

C394 C393 D28


VCCGLAN1_5
SC1U16V3ZY-GP

SC4D7U6D3V3KX-GP

C392
DY D29
VCCGLAN1_5 Wistron Corporation
SCD1U50V3KX-GP

E26
2

1D5V_S0 VCCGLAN1_5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


E27
VCCGLAN1_5
SCD1U10V2KX-4GP

Taipei Hsien 221, Taiwan, R.O.C.


80mA 3D3V_S0 A26
VCCGLAN3_3
C719 Title
1

C718
1mA ICH9M-GP-NF ICH9-M (3 of 4)
SC4D7U6D3V3KX-GP 71.ICH9M.00U Size Document Number Rev
2

JV71-MV DDR3 Madison -1


Date: Wednesday, October 28, 2009 Sheet 14 of 62
5 4 3 2 1
A B C D E

SB1E 5 OF 6

AA26 VSS VSS H5


AA27 VSS VSS J23
AA3 VSS VSS J26
AA6 VSS VSS J27
AB1 VSS VSS AC22
AA23 VSS VSS K28
AB28 VSS VSS K29
AB29 VSS VSS L13
AB4 VSS VSS L15
AB5 VSS VSS L2
AC17 VSS VSS L26
4 AC26 VSS VSS L27 4
AC27 VSS VSS L5
AC3 VSS VSS L7
AD1 VSS VSS M12
AD10 VSS VSS M13
AD12 VSS VSS M14
AD13 VSS VSS M15
AD14 VSS VSS M16
AD17 VSS VSS M17
AD18 VSS VSS M23
AD21 VSS VSS M28
AD28 VSS VSS M29
AD29 VSS VSS N11
AD4 VSS VSS N12
AD5 VSS VSS N13
AD6 VSS VSS N14
AD7 VSS VSS N15
AD9 VSS VSS N16
AE12 VSS VSS N17
AE13 VSS VSS N18
AE14 VSS VSS N26
AE16 VSS VSS N27
AE17 VSS VSS P12
AE2 VSS VSS P13
AE20 VSS VSS P14
AE24 VSS VSS P15
AE3 VSS VSS P16
AE4 VSS VSS P17
AE6 VSS VSS P2
3 AE9 P23 3
VSS VSS
AF13 VSS VSS P28
AF16 P29 3D3V_S5 3D3V_S0
VSS VSS
AF18 VSS VSS P4
AF22 VSS VSS P7
AH26 VSS VSS R11
AF26 VSS VSS R12
AF27 VSS VSS R13

8
7
6
5
SRN4K7J-10-GP
AF5 VSS VSS R14
AF7 R15 RN41
VSS VSS
AF9 VSS VSS R16
AG13 VSS VSS R17
AG16 VSS VSS R18
AG18 R28

1
2
3
4
VSS VSS
AG20 VSS VSS T12
AG23 VSS VSS T13
AG3 VSS VSS T14
AG6 VSS VSS T15
AG9 T16 3D3V_S0
VSS VSS
AH12 VSS VSS T17
AH14 VSS VSS T23
AH17 VSS VSS B26
AH19 VSS VSS U12
AH2 VSS VSS U13
AH22 VSS VSS U14 Q15
AH25 VSS VSS U15
AH28 VSS VSS U16 13,25,32 SMB_CLK 3 4 SMBC_ICH 3,16,17
AH5 VSS VSS U17
AH8 VSS VSS AD23 2 5
2 2
AJ12 VSS VSS U26
AJ14 VSS VSS U27 1 6
AJ17 VSS VSS U3
AJ8 VSS VSS V1 2N7002KDW -GP
B11 VSS VSS V13 13,25,32 SMB_DATA
B14 V15 84.2N702.A3F SMBD_ICH 3,16,17
VSS VSS
B17 VSS VSS V23
B2 VSS VSS V28
B20 V29
B23
VSS
VSS
VSS
VSS V4 SMBUS
B5 VSS VSS V5
B8 VSS VSS W26
C26 VSS VSS W27
C27 VSS VSS W3
E11 VSS VSS Y1
E14 VSS VSS Y28
E18 VSS VSS Y29
E2 VSS VSS Y4
E21 VSS VSS Y5
E24 VSS VSS AG28
E5 VSS VSS AH6
E8 VSS VSS AF2
F16 VSS VSS B25
F28 VSS
AH1,AJ1,AJ2,AH29,AJ28,AJ29

F29 A1 TP_A1 1 TP152 TPAD14-GP


VSS NCTF_VSS#A1 TP_A2 TP151 TPAD14-GP
G12 VSS NCTF_VSS#A2 A2 1
G14 B1 TP_B1 1 TP147 TPAD14-GP
A1,A2,B1,A28,A29,B29

VSS NCTF_VSS#B1 TP_A29 TP149 TPAD14-GP


G18 VSS NCTF_VSS#A29 A29 1
G21 A28 TP_A28 1 TP150 TPAD14-GP
NCTF TEST PIN:

1 VSS NCTF_VSS#A28 1
G24 B29 TP_B29 1 TP146 TPAD14-GP
VSS NCTF_VSS#B29 TP_AJ1 TP120 TPAD14-GP
G26 VSS NCTF_VSS#AJ1 AJ1 1
TP_AJ2 TP121 TPAD14-GP
G27
G8
VSS
VSS
NCTF_VSS#AJ2
NCTF_VSS#AH1
AJ2
AH1 TP_AH1
1
1 TP130 TPAD14-GP Wistron Corporation
H2 AJ28 TP_AJ28 1 TP119 TPAD14-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS NCTF_VSS#AJ28 TP_AJ29 TP118 TPAD14-GP Taipei Hsien 221, Taiwan, R.O.C.
H23 VSS NCTF_VSS#AJ29 AJ29 1
H28 AH29 TP_AH29 1 TP129 TPAD14-GP
VSS NCTF_VSS#AH29 Title
H29 VSS
ICH9-M (4 of 4)
ICH9M-GP-NF Size Document Number Rev
71.ICH9M.00U -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 15 of 62
A B C D E
A B C D E

DDR3 SOCKET_1
DM1
8 M_A_A[14..0] M_A_A0 98 NP1
M_A_A1 A0 NP1
4 97 NP2 4
M_A_A2 A1 NP2
96
M_A_A3 A2
95 110 M_A_RAS# 8
M_A_A4 A3 RAS#
92 113 M_A_WE# 8
M_A_A5 A4 WE#
91 115 M_A_CAS# 8
M_A_A6 A5 CAS#
90
M_A_A7 A6
86 114 M_CS0# 7
M_A_A8 A7 CS0#
89 121 M_CS1# 7
M_A_A9 A8 CS1#
85
M_A_A10 A9
107 73 M_CKE0 7
M_A_A11 A10/AP CKE0
84 74 M_CKE1 7
M_A_A12 A11 CKE1
83
M_A_A13 A12
119 101 M_CLK_DDR0 7
M_A_A14 A13 CK0
80 103 M_CLK_DDR#0 7
TPAD14-GP TP154 M_A_A15 A14 CK0#
1 78
A15
8 M_A_BS#2 79 102 M_CLK_DDR1 7
A16/BA2 CK1
104 M_CLK_DDR#1 7
CK1#
8 M_A_BS#0 109 M_A_DM[7..0] 8
BA0 M_A_DM0
8 M_A_BS#1 108 11
BA1 DM0 M_A_DM1
28
M_A_DQ0 DM1 M_A_DM2
5 46
M_A_DQ1 DQ0 DM2 M_A_DM3
8 M_A_DQ[63..0] 7 63
M_A_DQ2 DQ1 DM3 M_A_DM4
15 136
M_A_DQ3 DQ2 DM4 M_A_DM5
17 153
M_A_DQ4 DQ3 DM5 M_A_DM6
4 170
M_A_DQ5 DQ4 DM6 M_A_DM7
6 187
M_A_DQ6 DQ5 DM7
16
M_A_DQ7 DQ6
18 200 SMBD_ICH 3,15,17
M_A_DQ8 DQ7 SDA
21 202 SMBC_ICH 3,15,17
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9
33 198 PM_EXTTS#0 7,17
M_A_DQ11 DQ10 EVENT#
35
M_A_DQ12 DQ11
22 199 3D3V_S0
M_A_DQ13 DQ12 VDDSPD 10KR2J-3-GP
24
M_A_DQ14 DQ13 DDRA_SA0 R748 2
34 197 1

1
M_A_DQ15 DQ14 SA0 DDRA_SA1 C433 C434
36 201 2 1
DQ15 SA1

SC2D2U6D3V2MX-GP
M_A_DQ16 39 R749 10KR2J-3-GP
DQ16

SCD1U16V2ZY-2GP
M_A_DQ17 41 77

2
M_A_DQ18 DQ17 NC#1
51 122
M_A_DQ19 DQ18 NC#2 1D5V_S3
53 125
M_A_DQ20 DQ19 NC#/TEST
40
M_A_DQ21 DQ20
3 42
DQ21 VDD1
75 DY 3
M_A_DQ22 50 76
DQ22 VDD2

NORMAL TYPE
M_A_DQ23 52 81
M_A_DQ24 DQ23 VDD3
57 82
M_A_DQ25 DQ24 VDD4
59 87
M_A_DQ26 DQ25 VDD5
67 88
M_A_DQ27 DQ26 VDD6
69 93
M_A_DQ28 DQ27 VDD7
56 94
M_A_DQ29 DQ28 VDD8
58 99
M_A_DQ30 DQ29 VDD9
68 100
M_A_DQ31 DQ30 VDD10
70 105
M_A_DQ32 DQ31 VDD11
129 106
M_A_DQ33 DQ32 VDD12
131 111
M_A_DQ34 DQ33 VDD13
141 112
M_A_DQ35 DQ34 VDD14
143 117
M_A_DQ36 DQ35 VDD15
130 118
M_A_DQ37 DQ36 VDD16
132 123
M_A_DQ38 DQ37 VDD17
140 124
M_A_DQ39 DQ38 VDD18
142
M_A_DQ40 DQ39 1D5V_S3
147 2
M_A_DQ41 DQ40 VSS
149 3
M_A_DQ42 DQ41 VSS
157 8
M_A_DQ43 DQ42 VSS
159 9

1
M_A_DQ44 DQ43 VSS C441 C442 C440 C463 C465 C464 TC8
146 13
DQ44 VSS

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
M_A_DQ45 148 14
DQ45 VSS

ST330U6VDM-2-GP
2nd = 77.23371.12L
M_A_DQ46 158 19

2
M_A_DQ47 DQ46 VSS
160 20
M_A_DQ48 DQ47 VSS
163
DQ48 VSS
25 DY
M_A_DQ49 165 26 DY DY
M_A_DQ50 DQ49 VSS
175 31
M_A_DQ51 DQ50 VSS
177 32
M_A_DQ52 DQ51 VSS
164 37
M_A_DQ53 DQ52 VSS
166 38
M_A_DQ54 DQ53 VSS
174 43
M_A_DQ55 DQ54 VSS
176 44
M_A_DQ56 DQ55 VSS
181 48
M_A_DQ57 DQ56 VSS
183 49

1
DQ57 VSS

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
M_A_DQ58 191 54 C437 C439 C458 C466
M_A_DQ59 DQ58 VSS
193 55
M_A_DQ60 DQ59 VSS
180 60

2
M_A_DQ61 DQ60 VSS
182 61
2 M_A_DQ62 DQ61 VSS 2
0818 delete pull-up resistor(RN88~RN94),C400,C426 192
DQ62 VSS
65
M_A_DQ63 194 66
DQ63 VSS
71
M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
8 M_A_DQS#[7..0] 27
DQS1# VSS
127 DY
M_A_DQS#2 45 128
M_A_DQS#3 DQS2# VSS
62 133
M_A_DQS#4 DQS3# VSS
135 134
M_A_DQS#5 DQS4# VSS
152 138
M_A_DQS#6 DQS5# VSS
169 139
Decoupling Capacitor M_A_DQS#7

M_A_DQS0
186
DQS6#
DQS7#
VSS
VSS
VSS
144
145
12 150
M_A_DQS1 DQS0 VSS
8 M_A_DQS[7..0] 29 151
DQS1 VSS
:Near Pin 126
Layout Note: M_A_DQS2
M_A_DQS3
47
64
DQS2 VSS
155
156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
DDR_VREF_S3_1 M_A_DQS6 DQS5 VSS
171 167
M_A_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
VSS
7 M_ODT0 116 173
ODT0 VSS
7 M_ODT1 120 178
1

C878 ODT1 VSS


179
VSS
SC2D2U6D3V3MX-1-GP

C879 DDR_VREF_S3_1 126 184


SCD1U16V2ZY-2GP DDR_VREF_S3_1 VREF_CA VSS
1 185
2

DDR_VREF_S3 VREF_DQ VSS


189
VSS
7,17 DDR3_DRAMRST# 30 190
RESET# VSS
195
VSS
196
VSS
203 205
VTT1 VSS
204 206
1

C880 C881 VTT2 VSS


SC10U6D3V5MX-3GP

SCD1U16V2ZY-2GP
2

:Near Pin 1
Layout Note: DDR3-204P-45-GP

62.10017.P01
DDR_VREF_S3_1
High 9.2mm
1 1
1

C468 0818 add the net(DDR3_DRAMRST#)


SC2D2U6D3V3MX-1-GP

C461
SCD1U16V2ZY-2GP 0818 modify the net(DDR_VREF_S3_1)
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 Socket
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: Wednesday, October 28, 2009 Sheet 16 of 62

A B C D E
A B C D E

DDR3 SOCKET_2
DM2
8 M_B_A[14..0] M_B_A0 98 NP1
M_B_A1 A0 NP1
4 97 NP2 4
M_B_A2 A1 NP2
96
M_B_A3 A2
95 110 M_B_RAS# 8
M_B_A4 A3 RAS#
92 113 M_B_WE# 8
M_B_A5 A4 WE#
91 115 M_B_CAS# 8
M_B_A6 A5 CAS#
90
M_B_A7 A6
86 114 M_CS2# 7
M_B_A8 A7 CS0#
89 121 M_CS3# 7
M_B_A9 A8 CS1#
85
M_B_A10 A9
107 73 M_CKE2 7
M_B_A11 A10/AP CKE0
84 74 M_CKE3 7
M_B_A12 A11 CKE1
83
M_B_A13 A12
119 101 M_CLK_DDR2 7
M_B_A14 A13 CK0
80 103 M_CLK_DDR#2 7
TPAD14-GP TP157 M_B_A15 A14 CK0#
1 78
A15
8 M_B_BS#2 79 102 M_CLK_DDR3 7
A16/BA2 CK1
104 M_CLK_DDR#3 7
CK1#
8 M_B_BS#0 109 M_B_DM[7..0] 8
BA0 M_B_DM0
8 M_B_BS#1 108 11
BA1 DM0 M_B_DM1
28
M_B_DQ0 DM1 M_B_DM2
5 46
M_B_DQ1 DQ0 DM2 M_B_DM3
8 M_B_DQ[63..0] 7 63
M_B_DQ2 DQ1 DM3 M_B_DM4
15 136
M_B_DQ3 DQ2 DM4 M_B_DM5
17 153
M_B_DQ4 DQ3 DM5 M_B_DM6
4 170
M_B_DQ5 DQ4 DM6 M_B_DM7
6 187
M_B_DQ6 DQ5 DM7
16
M_B_DQ7 DQ6
18
DQ7 SDA
200 SMBD_ICH 3,15,16 0818 add the net(PM_EXTTS#0)
M_B_DQ8 21 202 SMBC_ICH 3,15,16
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9 3D3V_S0
33 198 PM_EXTTS#0 7,16
M_B_DQ11 DQ10 EVENT#
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD 10KR2J-3-GP
24
M_B_DQ14 DQ13 DDRB_SA0 R750 2
34 197 1

1
DQ14 SA0

NORMAL TYPE
M_B_DQ15 36 201 DDRB_SA1 2 1 C399 C400
DQ15 SA1

SCD1U16V2ZY-2GP

SC2D2U6D3V2MX-GP
M_B_DQ16 39 R751 10KR2J-3-GP
M_B_DQ17 DQ16
41 77

2
M_B_DQ18 DQ17 NC#1
51
DQ18 NC#2
122 0818 add R642 DY
M_B_DQ19 53 125 1D5V_S3
M_B_DQ20 DQ19 NC#/TEST
40
M_B_DQ21 DQ20
3 42 75 3
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
52 81
M_B_DQ24 DQ23 VDD3
57 82
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ28 DQ27 VDD7
56 94
M_B_DQ29 DQ28 VDD8
58 99
M_B_DQ30 DQ29 VDD9
68 100
M_B_DQ31 DQ30 VDD10 1D5V_S3
70 105
M_B_DQ32 DQ31 VDD11
129 106
M_B_DQ33 DQ32 VDD12
131 111
M_B_DQ34 DQ33 VDD13
141 112

1
M_B_DQ35 DQ34 VDD14 C766 C763 C767 C426 C428 C429 TC10
143 117
DQ35 VDD15

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

2nd = 77.23371.12L
M_B_DQ36 130 118
DQ36 VDD16

ST330U6VDM-2-GP
M_B_DQ37 132 123

2
M_B_DQ38 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18
142
DQ39 DY
M_B_DQ40 147 2 DY
M_B_DQ41 DQ40 VSS
149 3
M_B_DQ42 DQ41 VSS
157 8
M_B_DQ43 DQ42 VSS
159 9
M_B_DQ44 DQ43 VSS
146 13
M_B_DQ45 DQ44 VSS
148 14
M_B_DQ46 DQ45 VSS
158 19
DQ46 VSS
:Near Pin 126
Layout Note: M_B_DQ47 160 20

1
DQ47 VSS

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
M_B_DQ48 163 25 C768 C769 C421 C422
M_B_DQ49 DQ48 VSS
165 26
M_B_DQ50 DQ49 VSS
175 31

2
DDR_VREF_S3_1 M_B_DQ51 DQ50 VSS
177 32
M_B_DQ52 DQ51 VSS
164 37
M_B_DQ53 DQ52 VSS
166
DQ53 VSS
38 DY
M_B_DQ54 174 43
M_B_DQ55 DQ54 VSS
176 44
1

C882 M_B_DQ56 DQ55 VSS


181 48
DQ56 VSS
SC2D2U6D3V3MX-1-GP

C883 M_B_DQ57 183 49


SCD1U16V2ZY-2GP M_B_DQ58 DQ57 VSS
191 54
2

M_B_DQ59 DQ58 VSS


193 55
M_B_DQ60 DQ59 VSS
180 60
M_B_DQ61 DQ60 VSS
182 61
2 M_B_DQ62 DQ61 VSS 2
192 65
M_B_DQ63 DQ62 VSS
194 66
DQ63 VSS
71
M_B_DQS#0 VSS
10 72
M_B_DQS#1 DQS0# VSS
8 M_B_DQS#[7..0] 27 127
M_B_DQS#2 DQS1# VSS
45 128
M_B_DQS#3 DQS2# VSS
62 133
M_B_DQS#4 DQS3# VSS
135 134
M_B_DQS#5 DQS4# VSS
152 138
DQS5# VSS
:Near Pin 1
Layout Note: M_B_DQS#6
M_B_DQS#7
169
186
DQS6# VSS
139
144
DQS7# VSS
145
DDR_VREF_S3_1 M_B_DQS0 VSS
12 150
M_B_DQS1 DQS0 VSS
8 M_B_DQS[7..0] 29 151
M_B_DQS2 DQS1 VSS
47 155
M_B_DQS3 DQS2 VSS
64 156
M_B_DQS4 DQS3 VSS
137 161
1

C423 M_B_DQS5 DQS4 VSS


154 162
DQS5 VSS
SC2D2U6D3V3MX-1-GP

C424 M_B_DQS6 171 167


SCD1U16V2ZY-2GP M_B_DQS7 DQS6 VSS
188 168
2

DQS7 VSS
172
VSS
7 M_ODT2 116 173
ODT0 VSS
7 M_ODT3 120 178
ODT1 VSS
179
DDR_VREF_S3_1 VSS
126 184
DDR_VREF_S3_1 VREF_CA VSS
1 185
VREF_DQ VSS
189
VSS
7,16 DDR3_DRAMRST# 30 190
RESET# VSS
195
DDR_VREF_S3 VSS
196
VSS
203 205
VTT1 VSS
204 206
1

C771 C770 VTT2 VSS


SC10U6D3V5MX-3GP

SCD1U16V2ZY-2GP
2

DDR3-204P-46-GP

62.10017.P11

1 High 5.2mm 1

0818 add the net(DDR3_DRAMRST#)


0818 modify the net(DDR_VREF_S3_1)
0824 modify DM2 pin 203,204 to (DDR_VREF_S3)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 Socket2
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: Wednesday, October 28, 2009 Sheet 17 of 62
A B C D E
LCD/INVERTER/CCD CONN LCDVDD RN61

SCD1U16V2ZY-2GP
LCD_TXAOUT1- 1 8 GMCH_TXAOUT1- 7
LCD_TXAOUT1+ 2 7 GMCH_TXAOUT1+ 7
LCD_TXAOUT2- 3 6 GMCH_TXAOUT2- 7

1
LCD1 C1 LCD_TXAOUT2+ 4 5 GMCH_TXAOUT2+ 7
41 UMA
34 LCD_CB_SEL 40 1 SRN0J-7-GP

2
RN60
USBPN4 1 2 EC27 DY 13 USBPP4 39 2 LCD_TXACLK- 1 8 GMCH_TXACLK- 7
SC22P50V2JN-4GP 38 3 LCD_TXACLK+ 2 7
13 USBPN4 GMCH_TXACLK+ 7
USBPP4 1 2 EC26 DY 37 4 CCD_PWR LCD_TXAOUT0- 3 6 GMCH_TXAOUT0- 7
SC22P50V2JN-4GP 36 5 LCD_TXBCLK+ LCD_TXAOUT0+ 4 5 GMCH_TXAOUT0+ 7
34 DBC_EN 35 6 LCD_TXBCLK- UMA
34 7 LCD_TXBOUT2+ SRN0J-7-GP
3D3V_S0
LCD_EDID_CLK 33 8 LCD_TXBOUT2-
LCD_EDID_DAT 32 9 LCD_TXBOUT1+ RN18
31 10 LCD_TXBOUT1- LCD_TXBOUT1- 1 8 GMCH_TXBOUT1- 7
30 11 LCD_TXBOUT0+ LCD_TXBOUT1+ 2 7 GMCH_TXBOUT1+ 7
29 12 LCD_TXBOUT0- LCD_TXBOUT2- 3 6 GMCH_TXBOUT2- 7
BRIGHTNESS_CN 28 13 LCD_TXACLK+ LCD_TXBOUT2+ 4 5 GMCH_TXBOUT2+ 7
BLON_OUT_1 27 14 LCD_TXACLK- UMA
26 15 LCD_TXAOUT2+ SRN0J-7-GP
25 16 LCD_TXAOUT2-
24 17 LCD_TXAOUT1+ RN15
DCBATOUT 23 18 LCD_TXAOUT1- LCD_TXBCLK- 1 8 GMCH_TXBCLK- 7
LCD: DCBATOUT 2 pins F1 22 19 LCD_TXAOUT0+ LCD_TXBCLK+ 2 7 GMCH_TXBCLK+ 7
1 2 DCBATOUT_LCD1 21 20 LCD_TXAOUT0- LCD_TXBOUT0- 3 6
LED: DCBATOUT 3 pins GMCH_TXBOUT0- 7
C2 42 LCD_TXBOUT0+ 4 5 GMCH_TXBOUT0+ 7

1
UMA

SC10U35V0ZY-GP
POLYSW-1D1A24V-GP ACES-CONN40C-4-GP SRN0J-7-GP
69.50007.A31 20.F1296.040

2
2nd = 69.50007.A41 RN24
DY R752 LCD_TXAOUT1- 1 8
2nd = 20.F1557.040 GPU_TXAOUT1- 53
2 1 33R2J-2-GP LCD_TXAOUT1+ 2 7
ATI_BRIGHTNESS 53 GPU_TXAOUT1+ 53
LCD_TXAOUT2- 3 6 GPU_TXAOUT2- 53
LCD_TXAOUT2+ 4 5 GPU_TXAOUT2+ 53
UMA R3 DIS
2 1 33R2J-2-GP L_BKLTCTL 7 SRN0J-7-GP
DIS R1 RN22
BRIGHTNESS_CN 2 1 33R2J-2-GP BRIGHTNESS 34 LCD_TXACLK- 1 8 GPU_TXACLK- 53
LCD_TXACLK+ 2 7 GPU_TXACLK+ 53

SC100P50V2JN-3GP

SC100P50V2JN-3GP
BLON_OUT_1 1 2 LCD_TXAOUT0- 3 6
BLON_OUT 34 GPU_TXAOUT0- 53
1KR2F-3-GP LCD_TXAOUT0+ 4 5 GPU_TXAOUT0+ 53

1
C6 C4 R4 DIS
R2 SRN0J-7-GP
10KR2J-3-GP

2
RN59
LCD_TXBOUT1- 1 8 GPU_TXBOUT1- 53

2
LCD_TXBOUT1+ 2 7 GPU_TXBOUT1+ 53
LCD_TXBOUT2- 3 6 GPU_TXBOUT2- 53
LCD_TXBOUT2+ 4 5 GPU_TXBOUT2+ 53
3D3V_S0 DIS
SRN0J-7-GP

UMA LCDVDD RN58


1 2 LCD_TXBCLK- 1 8
7 GMCH_LCDVDD_ON GPU_TXBCLK- 53
R6 0R2J-2-GP LCD_TXBCLK+ 2 7 GPU_TXBCLK+ 53
U1 LCD_TXBOUT0- 3 6 GPU_TXBOUT0- 53
Layout 40 mil LCD_TXBOUT0+ 4 5 GPU_TXBOUT0+ 53
53 ATI_LCDVDD_ON 1
EN IN#5
5 DIS
2 SRN0J-7-GP
GND
3 4
OUT IN#4
1

1
DIS C5

SC4D7U6D3V3KX-GP
R5 C7 C3S G5285T11U-GP
10KR2J-3-GP DY 74.05285.07F

C4D7U6D3V3KX-GP

2
SCD1U16V2ZY-2GP
2

2
2

2nd = 74.09724.09F need confirm with VGA co-layout

3D3V_VGA 3D3V_S0
CCD_PWR
F2
CCD_PWR 1 2 3D3V_S0

2
1

2
1
DIS UMA
1

C498 C499 FUSE-1A6V-2-GP


SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

DY 69.50007.721 RN88 RN2


SRN2K2J-1-GP SRN2K2J-1-GP
2

2nd = 69.50007.981

3
4

3
4
Internal Mic 53 LCD_EDID_CLK
53 LCD_EDID_DAT
LCD_EDID_CLK
LCD_EDID_DAT

AMIC1
SRN0J-10-GP-U
4
INT_MIC1_1 2
UMA
27 INT_MIC1 1 2 7 CLK_DDC_EDID 1 4
R580 0R2J-2-GP 7 DAT_DDC_EDID 2 3
1
1

L35 3 RN1

ACES-CON2-17-GP
MLVS0603M04-1-GP

2nd 20.F1561.002
2

DY

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD CONN
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: Wednesday, October 28, 2009 Sheet 18 of 62
A B C D E

Layout Note:
Place these resistors UMA RN26
close to the CRT-out
Close to MXM card
1 8 GMCH_RED 7
connector 2 7 GMCH_GREEN 7
3 6 GMCH_BLUE 7
4 5

SRN0J-7-GP L5 Ferrite bead impedance: 10 ohm@100MHz


Hsync & Vsync level shift
5V_S0
1 2 CRT_R
53 CRT_RED FCB1608CF-GP
68.00230.021

1
L4 2nd =
4 C107 4
1 2 CRT_G SCD1U16V2ZY-2GP

2
53 CRT_GREEN FCB1608CF-GP
68.00230.021
L3 2nd =

14

1
DIS
1 2 CRT_B
53 CRT_BLUE FCB1608CF-GP HSYNC_1 CRT_HSYNC1_1
2 3 2 3 1 R558 2 CRT_HSYNC1

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP
53,56 CRT_HSYNC

1
C158 C137 C109 68.00230.021 C165 C151 C108 1 4 0R0402-PAD
53,56 CRT_VSYNC U18A
2nd =
8
7
6
5

SC2D2P50V2CC-GP

SC2D2P50V2CC-GP

SC2D2P50V2CC-GP
RN63

14
2

7
4
RN25 SRN0J-10-GP-U TSAHCT125PW -GP
SRN150F-1-GP DY DY DY 73.74125.L13
VSYNC_1 5 6 CRT_VSYNC1_1 1 R559 2 CRT_VSYNC1
UMA 2nd = 73.74125.L12 0R0402-PAD
U18B
1
2
3
4

1 4

7
7 GMCH_HSYNC TSAHCT125PW -GP 5V_S0 5V_S0
7 GMCH_VSYNC 2 3

RN62 73.74125.L13
Layout Note: SRN0J-10-GP-U 2nd = 73.74125.L12

14

10

14

13
1

1
SC47P50V2JN-3GP

SC47P50V2JN-3GP
C632 C633
* Must be a ground return path between this ground and the ground on
the VGA connector. 9 8 12 11

2
DY DY
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT U18C U18D

7
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. TSAHCT125PW -GP TSAHCT125PW -GP

3 73.74125.L13 73.74125.L13 3
2nd = 73.74125.L12 2nd = 73.74125.L12
DDC_CLK & DATA level shift
5V_CRT_S0

5V_S0 5V_S0 5V_S0

1
D24 D23 D22
1 1 1 F3 5V_S0
FUSE-1D1A6V-4GP-U 3D3V_S0
CRT_R 3 DY CRT_G 3 DY CRT_B 3 DY 69.50007.691

1
2nd = 69.50007.771

2
2 2 2 D4
CH551H-30PT-GP
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U 3D3V_VGA 3D3V_S0
83.R5003.C8F

2
500mA
5V_CRT_DDC 2nd = 83.R5003.H8H

CRT I/F & CONNECTOR

8
7
6
5
3
4

4
3
RN20
RN112 RN66 SRN10KJ-6-GP
SRN2K2J-1-GP
DIS UMA SRN2K2J-1-GP

1
2
3
4
2 2

2
1

1
2
CRT1 CRT_IN#_R
16 84.2N702.A3F
DIS 2N7002KDW -GP
CRT_R 1 6
DAT_DDC1_5 11 2 3 DAT_DDC1_5_Q 4 3 DAT_DDC1_5
53 CRT_DDCDATA
53 CRT_DDCCLK 1 4
1

SC100P50V2JN-3GP C128 CRT_HSYNC1 CRT_G 2 7 5 2


DAT_DDC1_5 5V_CRT_S0 RN57
DY 12
1

C115 CRT_VSYNC1 CRT_B 3 8 SRN0J-10-GP-U 6 1


2

13 CRT_HSYNC1 UMA
1

C105 CLK_DDC1_5 4 9 U42


2

14 CRT_VSYNC1 1 4
7 GMCH_DDCDATA
1

C93 10 C602 2 3 CLK_DDC1_5_Q


7 GMCH_DDCCLK
2

SC18P50V2JN-1-GP DY CRT_IN#_R 5 15 CLK_DDC1_5


SCD01U16V2KX-3GP RN53 CLK_DDC1_5
2

SC18P50V2JN-1-GP 17 SRN0J-10-GP-U

SC100P50V2JN-3GP VIDEO-15-47-GP-U
20.20392.015
2nd = 20.20764.015

6
1
1 7 R93 JV71-MV DDR3 Madison 1

2 2 1 CRT_IN#_R
34 CRT_DEC# 5V_S0
8 Wistron Corporation
1

470R2J-2-GP C98 D21 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3 SC100P50V2JN-3GP 1 Taipei Hsien 221, Taiwan, R.O.C.
9
2

CRT_IN#_R 3 DY Title
4 CRT CONN
2
10 Size Document Number Rev
BAV99PT-GP-U -1
5 JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 19 of 62
A B C D E
5 4 3 2 1

5V_S0
D3
2
HDMI1
RN10 3 5V_S0 Need confirm with VGA co-layout
18 15 TDMS_A_CLK 3 2 TDMS_A_CLK_R
+5V_POWER SCL TDMS_A_DAT TDMS_A_DAT_R 3D3V_VGA
SDA 16 4 1 1

HDMI_TX0+ 7 SRN1K5J-GP
HDMI_TX0- TMDS_DATA0+ HDMI_A_CEC TP20 TPAD14-GP BAW 56-2-GP
9 TMDS_DATA0- CEC 13 1 66.15236.04L

3
4
HDMI_TX1+ 4 17 DIS
TMDS_DATA1+ DDC/CEC_GROUNG

1
HDMI_TX1- 6 19 HDMI_A_HPD_CN 2 1 ATI_HDMI_DETECT 53 DY DY add D25 by NV RN86
D HDMI_TX2+ 1
TMDS_DATA1-
TMDS_DATA2+
HOT_PLUG_DETECT EC14 EC13 SRN1K5J-GP
Close HDMI1 D

1
HDMI_TX2- 3 14 R313 DIS

2
TMDS_DATA2- RESERVED#14

SC220P50V2JN-3GP

SC220P50V2JN-3GP
DIS 10KR2J-3-GP 83.00056.G11 66.15236.04L
8 R314 2ND = 83.00056.Q11
SA 4.15

2
1
TMDS_DATA0_SHIELD 100KR2J-1-GP
5 TMDS_DATA1_SHIELD
2

2
TMDS_DATA2_SHIELD
GND 20
11 21 U11
HDMI_TXC+ TMDS_CLOCK_SHIELD GND
10 TMDS_CLOCK+ GND 22
HDMI_TXC- 12 23 1 8 5V_S0
TMDS_CLOCK- GND 5V_S0 1OE# VCC
53 ATI_HDMI_CLK 2 1A 2OE# 7
TDMS_A_CLK 3 6 TDMS_A_DAT
SKT-HDMI19P-11-GP-U2 1B 2B
D17 4 5 ATI_HDMI_DAT 53
GND 2A
62.10078.171 1
2nd = 62.10078.121 HDMI_A_HPD_CN 3 DY SN74CBTD3306CPW R-GP
2
DIS
BAV99PT-GP-U
73.03306.D0B 3D3V_S0

2ND =
3D3V_S0 3D3V_S0

4
3
1 2 HDMI_TX0- RN14

R96 4K7R2J-2-GP

4K7R2J-2-GP
7,53 HDMI_DATA0-
7,53 HDMI_DATA0+ DIS C5931 2 SCD1U10V2KX-5GP HDMI_TX0+ SRN1K5J-GP

2
C DIS C591 SCD1U10V2KX-5GP UMA C

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1 2 HDMI_TX1- C77 C82 C91 C99 66.15236.04L
7,53 HDMI_DATA1-
DIS C5871 2 SCD1U10V2KX-5GP HDMI_TX1+ UMA UMA UMA UMA

1
2
7,53 HDMI_DATA1+

2
R95 2
DIS C583 SCD1U10V2KX-5GP
1 2 HDMI_TX2-
7,53 HDMI_DATA2-
7,53 HDMI_DATA2+ DIS C5591 2 SCD1U10V2KX-5GP HDMI_TX2+ DY UMA 7 GMCH_HDMI_CLK
DIS C554 SCD1U10V2KX-5GP 7 GMCH_HDMI_DATA
1 2 HDMI_TXC-

1
1
7,53 HDMI_CLK-
7,53 HDMI_CLK+ DIS C5511 2 SCD1U10V2KX-5GP HDMI_TXC+

NC#35
NC#34
DIS C546 SCD1U10V2KX-5GP
From VGA on board

11
15
21
26
33
40
46

35
34
2
U8

NC#35
NC#34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
38 23 HDMI_TXC- 3D3V_S0
7,53 HDMI_CLK- IN_D1- OUT_D1-
7,53 HDMI_CLK+ 39 22 HDMI_TXC+
IN_D1+ OUT_D1+

1
7,53 HDMI_DATA0- 41 20 HDMI_TX0-
IN_D2- OUT_D2- HDMI_TX0+
7,53 HDMI_DATA0+ 42 IN_D2+ OUT_D2+ 19 UMA
R64
44 17 HDMI_TX1- 20KR2J-L2-GP
7,53 HDMI_DATA1- IN_D3- OUT_D3-
7,53 HDMI_DATA1+ 45 16 HDMI_TX1+

2
IN_D3+ OUT_D3+
HDMI_TX2- HDMI_DETECT# 7
7,53 HDMI_DATA2- 47 IN_D4- OUT_D4- 14
7,53 HDMI_DATA2+ 48 13 HDMI_TX2+
IN_D4+ OUT_D4+

1
B Recommended Equalization: [PC1,PC0]=01, 4dB B

D
From NB UMA
3D3V_S0 R76 UMA 2 4K7R2J-2-GP
1 PC0 3 8 GMCH_HDMI_DATA Q10 R63
R75 4K7R2J-2-GP PC1 PC0 SDA GMCH_HDMI_CLK 7K5R2F-1-GP
DY 2 1 4 PC1 SCL 9 UMA 2N7002-11-GP
7 HPD 2 1 HDMI_DETECT_R G UMA

2
HDMI_TX0- HPD
1 2 HDMI_TX R129 DY 2 4K7R2J-2-GP
1 84.27002.W31

1
HDMI_TX0+ DIS R90 1 2 499R2F-2-GP REXT_HDMI 6 R73

S
REXT
DIS R86 499R2F-2-GP PS8101_RT_EN# 10 RT_EN# HPD_SINK 30 HDMI_A_HPD_CN 1KR2J-1-GP R72
HDMI_TX1- 1 2 PS8101_OE# 25 29 TDMS_A_DAT 20KR2J-L2-GP 2ND = 84.27002.N31
HDMI_TX1+ OE# SDA_SINK
DIS R85 1 2 499R2F-2-GP DDC_EN_PS8101 32 DDC_EN SCL_SINK 28 TDMS_A_CLK DY
DIS R84 499R2F-2-GP

2
1

HDMI_TX2- 1 2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HDMI_TX2+ DIS R83 1 2 499R2F-2-GP R695 HDMI HPD control PS8101 OE#
DIS R80 499R2F-2-GP 0R2J-2-GP
HDMI_TXC- 1 2 PS8101-GP 71.P8101.003
UMA
1
5
12
18
24
27
31
36
37
43
HDMI_TXC+ DIS R79 1 2 499R2F-2-GP Need check power use 3.3V or 5V UMA 49
2

DIS R77 499R2F-2-GP 3D3V_S0


D

1
3D3V_S0
DIS R451
Q24 20KR2J-L2-GP
DY
2N7002-11-GP G
REXT_HDMI PS8101_RT_EN# 3D3V_S0

2
1

84.27002.W31 1 R450 2 PS8101_OE#


S

DIS 0R0402-PAD
2

2ND = 84.27002.N31 R13 R74 R458


100KR2J-1-GP 499R2F-2-GP 1KR2J-1-GP R94

D
A UMA DY 4K7R2J-2-GP JV71-MV DDR3 Madison A
2

Q37
UMA
1

2N7002-11-GP
1

DDC_EN_PS8101 HDMI_A_HPD_CN G
Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

S
R497 84.27002.W31 Taipei Hsien 221, Taiwan, R.O.C.
DY
100KR2J-1-GP
DY 2ND = 84.27002.N31
Title
HDMI CONNECTOR
2

Size Document Number Rev


A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 20 of 62
5 4 3 2 1
SATA Connector
SKT-SATA22P-33-GP-U
24
NP2
22
C566 1 SCD01U50V2KX-1GP
2 SATA_TXP0_C 21
12 SATA_TXP0 C565 SCD01U50V2KX-1GP SATA_TXN0_C
12 SATA_TXN0 1 2 20
19
C255 1 SCD01U50V2KX-1GP
2 SATA_RXN0_C 18
12 SATA_RXN0 C254 SCD01U50V2KX-1GP SATA_RXP0_C
12 SATA_RXP0 1 2 17
16

15
14
13
12
5V_S0 11
PWR TRACE 100mil 10
9
8
7
K

1 6
D19 TC6 C577 5
SC10U10V5ZY-1GP

SCD1U25V3ZY-1GP
SSM24PT-GP

DY 4
2

3
2
A

1
NP1
23

SATA1
62.10065.551
2nd = 62.10065.471

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD CONN
Size Document Number Rev
-1
JV71-MV DDR3Sheet
Madison
Date: Wednesday, October 28, 200921 of 62
5 4 3 2 1

D
ODD Connector D

ODD1
8
NP1
S1

12 SATA_TXP1 C410 1 2 SCD01U50V2KX-1GP SATA_TXP1_C S2


12 SATA_TXN1 C403 1 2 SCD01U50V2KX-1GP SATA_TXN1_C S3
S4
12 SATA_RXN1 C258 1 2 SCD01U50V2KX-1GP SATA_RXN1_C S5
12 SATA_RXP1 C257 1 2 SCD01U50V2KX-1GP SATA_RXP1_C S6
R214 DY S7
5V_S0 10KR2J-3-GP
1 2ODD_DP P1
C P2 C
P3
1ODD_MD P4

1
P5
D9 C379 TC13 TP145 P6

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
TPAD14-GP

SSM24PT-GP
NP2

2
DY 9

A
SKT-SATA7P+6P-46-GP
62.10065.631
2nd =

B B

JV71-MV DDR3 Madison

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ODD
Size Document Number Rev
-1
JV71-MV DDR3
Date: Wednesday, October 28, 2009
Madison
Sheet 22 of 62
5 4 3 2 1
5 4 3 2 1

D D

BLUETOOTH MODULE

3D3V_BT_S0
U65 3D3V_S0 C862
SC4D7U10V5ZY-3GP
3D3V_BT_S0 1 5 1 2
OUT IN
2 GND
C 3 4 C
NC#3 EN
1

EC59 DY BLUETOOTH_EN 34
SCD1U16V2ZY-2GP
G5240B1T1U-GP
2

2nd = 74.09711.A7F
74.05240.A7F

EC20 put near


6
BT1
BLUE1 / all
USB put one 4 USBPN7 13
choke near 3 USBPP7 13
2
connector by
1 3D3V_BT_S0
EMI request
ACES-CON4-1-GP-U2
5

20.D0197.104
B B
2nd = 20.F0984.004

JV71-MV DDR3 Madison

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BLUETOOTH
Size Document Number Rev
-1
JV71-MV DDR3Sheet
Madison
Date: Wednesday, October 28, 2009 23 of 62
5 4 3 2 1
5 4 3 2 1

EC50
D
5V_USB2_S0 1 2 D
DY
5V_S5 U47 SCD1U16V2ZY-2GP
USB3 5V_USB1_S0
USB_PW R_EN# 4 5 100 mil
EN/EN# OC# USB_OC#0 13
5 3 IN#3 OUT#6 6
1 2 IN#2 OUT#7 7

1
1 8 TC21 DY EC47 DY EC49
GND OUT#8

SE220U6D3VM-7GP

SCD1U16V2ZY-2GP

SC1000P50V3JN-GP-U
13 USBPN9 2
3 C764
13 USBPP9

2
4 G547F2P81U-GP

SC4D7U16V5ZY-GP
2
6 74.00547.A79 79.22710.6AL
2nd = 77.92271.021
SKT-USB-198-GP
2nd = 74.09711.079

22.10218.W51

EC72
1 2
DY
5V_S5 U56 SCD1U16V2ZY-2GP
C 5V_USB2_S0 C
USB_PW R_EN# 4 5 100 mil
EN/EN# OC# USB_OC#9 13
3 IN#3 OUT#6 6
2 IN#2 OUT#7 7

1
1 8 TC31 DY EC71 DY EC70
GND OUT#8

SE220U6D3VM-7GP

SCD1U16V2ZY-2GP

SC1000P50V3JN-GP-U
C809

2
G547F2P81U-GP 79.22710.6AL

SC4D7U16V5ZY-GP
2
5V_USB1_S0 74.00547.A79 2nd = 77.92271.021

USB1 2nd = 74.09711.079

5
1 5V_USB2_S0

13 USBPN0 2
13 USBPP0 3 USB2
4
6 5
1
SKT-USB-198-GP
13 USBPN2 2
13 USBPP2 3
22.10218.W51 4
6

SKT-USB-198-GP
B B

22.10218.W51
3D3V_S0

C761
1 2 MLX-CON12-18-GP
SC1U16V3ZY-GP 14
12 PW R_CON_BTN#_1 EC36 2 DY
1 SC220P50V2JN-3GP
37 PW R_CON_BTN#_1 PW R_CON_BTN#_1 11 PW R_CON_LED# EC35 2 DY
1 SC220P50V2JN-3GP
37 PW R_CON_LED# PW R_CON_LED# 10 USB_OC#1 EC34 2 DY
1 SC220P50V2JN-3GP
9 USB_PW R_EN# EC33 2 DY
1 SC220P50V2JN-3GP
13 USB_OC#1 8
7
13 USBPN1 6
13 USBPP1 5
4
34 USB_PW R_EN# 3
5V_S5 2
SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

1
1

EC60 C871 13
DY
USBCN1
2

JV71-MV DDR3 Madison


A 20.F1352.012 A

2nd = 20.F0702.012 Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB CONN
Size Document Number Rev
JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 24 of 62
5 4 3 2 1
5 4 3 2 1

1D2V_LAN_S5 3D3V_S5 3D3V_LAN_S5 DC#38 1 TP221 TPAD14-GP 3D3V_LAN_S5


DC#52 1 TP222 TPAD14-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP 2 R39 1 DC#68 1 TP223 TPAD14-GP
0R0603-PAD
1

1
C45 C18 C37 C43

56
61
15
19

38
52
68
6
U3 3D3V_LAN_S5
2

DC#38
DC#52
DC#68
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
1D2V_LAN_S5
2 R53 1XTALVDD_G

1
0R0603-PAD

1
2D5V_1D2V_LAN R70 C48
36 BIASVDD_G 10KR2J-3-GP
D BIASVDDH SCD1U10V2KX-4GP D
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
5

2
VDDC_IO 3D3V_LAN_S5
55

2
VDDC_IO U5
13
VDDC
1

C59 C32 C70 20 23 XTALVDD_G 1 8 2 R21 1 BIASVDD_G


VDDC XTALVDDH A0 VCC EE_WP 0R0603-PAD
34 VDDC 2 A1 WP 7

1
60 3 6 SCLK C26
2

VDDC A2 SCL SO C69


4 GND SDA 5
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
AT24C02BN-SH-T-GP
72.24C02.R01
48 LAN_AVDD
AVDDH LAN_AVDD
AVDDH 42 2nd = 72.24C02.M01
2 R31 1 LAN_AVDD
0R0603-PAD

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AVDDL_G 39
AVDDL

1
AVDDL_G 45 C21 C22
AVDDL_G AVDDL
51
AVDDL

2
3D3V_LAN_S0
3D3V_S0 49
TRD3_N MDI3- 26
50 MDI3+ 26
GPHY_PLLVDD TRD3_P
2 R45 1 35
GPHY_PLLVDDL
0R0603-PAD 47 MDI2- 26 Place PLLVDD/AVDDL
TRD2_N
SCD1U10V2KX-4GP

46 MDI2+ 26 CKT as close to chip as


TRD2_P
1

C34 possible
TRD1_N 43 MDI1- 26
44 MDI1+ 26
2

PCIE_PLLVDD TRD1_P 3D3V_AUX_S5


30 PCIE_PLLVDDL
27 PCIE_PLLVDDL TRD0_N 41 MDI0- 26
40 MDI0+ 26
TRD0_P

1
10KR2J-3-GP
2 3D3V_LAN_S5 DY R51
PCIE_SDSVDD LINKLED#
33 1 10M/100M/1G_LED# 26
PCIE_VDDL SPD100LED#
24 67

2
PCIE_VDDL SPD1000LED#
1

66 LAN_ACT_LED# 26 ENERGY_DET
C C31 TRAFFICLED# C

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP

1
SCD1U10V2KX-4GP
2

8 GPIO2 1 TP71 TPAD14-GP 10KR2J-3-GP


GPIO_2

1
C47 C60 C61 C17 C73 DY R52

2
9 UART_MODE1 TP72 TPAD14-GP
UART_MODE EE_WP
GPIO_1/SERIAL_DI 7
SCD1U10V2KX-5GP 2 1 C39 PCIE_RXDP 26 4 GPIO0 1 TP73 TPAD14-GP 1D2V_LAN_S5
13 PCIE_RXP1 PCIE_TXD_P GPIO_0/SERIAL_DO
SCD1U10V2KX-5GP 2 1 C41 PCIE_RXDN 25
13 PCIE_RXN1 PCIE_TXD_N
13 PCIE_TXP1 31
PCIE_RXD_P
13 PCIE_TXN1 32 PCIE_RXD_N 2 R22 1 AVDDL_G
0R0603-PAD C25 SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP
13 PCIE_WAKE# 12
WAKE#

1
7,13,31,32,34,35 PLT_RST1# 2 R78 1 LAN_RST 10 RN87 2D5V_1D2V_LAN
PERST# SCLK C20
3 CLK_PCIE_LAN 29 PCIE_REFCLK_P SCLK/EECLK 65 5 4
1

28 63 SI 6 3
3 CLK_PCIE_LAN#

2
100R2J-2-GP PCIE_REFCLK_N SI SO
64 7 2
C78 SO/EEDATA CS#

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
62 8 1
2

SC33P50V2JN-3GP CS#
2 R19 1GPHY_PLLVDD
SRN4K7J-10-GP C19 SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP
1

1
C72 C66
FCM1608K-601T03GP
RN13 59 ENERGY_DET 34 2nd = 68.00248.011 C27

2
SRN1K5J-GP ENERGY_DET
68.00217.241
2 3 2 R35 1 PCIE_PLLVDD
3D3V_LAN_S5 VAUX_PRESENT54 0R0603-PAD C38 SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP
3D3V_LAN_S0 1 4 VAUX_PRSNT

1
VMAINPRSNT 53
LOW_PWR VMAIN_PRSNT C35
34 LOW_PWR 3 LOW_PWR
2 R69 DY1

2
0R2J-2-GP 2D5V_1D2V_LAN
R49 DY 1 2 0R2J-2-GP LAN_SMB_CLK 58 17
13,15,32 SMB_CLK SMB_CLK VDDC_IO 3D3V_LAN_S5
R44 DY 1 2 0R2J-2-GP LAN_SMB_DATA57 2 R28 1 PCIE_SDSVDD
13,15,32 SMB_DATA -1 SMB_DATA 0R0603-PAD C30 SC4D7U6D3V3KX-GP

1
LAN_XO_R 2 R65 1LAN_X0
X1 200R2J-L1-GP 22 18 C74
XTALO REGOUT12_IO

1
B B
1 2LAN_XI 21

2
XTALI

1
R40 C71

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
R23
XTAL-25MHZ-102-GP 0R0603-PAD
1

82.30020.851 1 2RDAC 37

2
C49 C68 RDAC
R349 change to Bead
SC15P50V2JN-2-GP

2
2nd = 82.30020.851 82.30020.791 Q9
SC15P50V2JN-2-GP
2

1K2R2F-1-GP E 3 3D3V_LAN_S5_1 for Transmitter Distortion


14 REGCTL12 1
REGCTL12 B
C 4
C 2

DCP69A-13-GP
84.DCP69.01B 1D2V_LAN_S5
2nd = 84.00069.A1B
SCD1U10V2KX-4GP

C24 C36
3 LAN_CLKREQ# LAN_CLKREQ# 11
CLKREQ#
1

C44
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
2

16
SUPER_IDDQ
GND

BCM5784MKMLG-GP
69

2nd = 71.05784.M03

A A

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BCM5764
Size Document Number Rev
Custom -1
JV71-MV DDR3 Madison
Date: Wednesday, October 28, 2009 Sheet 25 of 62
5 4 3 2 1
A B C D E

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
LAN Connector LAN Connector
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
4 4

SB 0520
GIGA Lan Transformer
RJ45
XF1 14 LED COLOR
25 10M/100M/1G_LED# 9
25 MDI1- 1 12 RJ45_6 CONN_PW R 10 A2(+) A1(-)::GREEN
11 A2(+) A3(-):ORANGE
XRF_TDC1 3 10 MCT1 RJ45_1 1
RJ45_2 2
25 MDI1+ 2 11 RJ45_3 RJ45_3 3
RJ45_4 4
25 MDI0+ 5 8 RJ45_1 RJ45_5 5
RJ45_6 6
XRF_TDC2 4 9 MCT2 RJ45_7 7
RJ45_8 8
25 MDI0- 6 7 RJ45_2 CONN_PW R2 12
3 B1(+) B2(-):YELLOW 3
DY DY 25 LAN_ACT_LED# 13
1

C11 C12 XFORM-271-GP 15 Green(A3), behavior is the


SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

same for 10/100/1000 bits


RJ45-13P-3-GP
2

68.HD081.301 22.10177.B51 Yellow(B2), when LAN is


帶68.HD081.30B 2ND = 68.HD081.30B 68.68160.30B 2ND = 22.10177.B81 transfering data.

XF2

25 MDI2+ 1 12 RJ45_4

XRF_TDC3 3 10 MCT3

25 MDI2- 2 11 RJ45_5

25 MDI3+ 5 8 RJ45_7

XRF_TDC4 4 9 MCT4

25 MDI3- 6 7 RJ45_8 RN50


3D3V_S5 1 4 CONN_PW R2
DY DY 2 3 CONN_PW R
1

C14 C16 XFORM-271-GP


SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SRN470J-4-GP-U

2
2

帶68.HD081.30B 68.HD081.301 EC7 EC29


2ND = 68.HD081.30B 68.68160.30B

1
SC100P50V2JN-3GP

SC100P50V2JN-3GP
2
DY 2
DY

MCT1
MCT2
MCT3
MCT4

8
7
6
5
RN11
SRN75J-1-GP

LAN_ACT_LED#

1
2
3
4
10M/100M/1G_LED# MCT_R

2
C527
SC1KP2KV8KX-GP

1
C8 C502
SC1KP50V2KX-1GP SC1KP50V2KX-1GP
1 JV71-MV DDR3 Madison 1

DY DY Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN CONN
Size Document Number Rev
A3 JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 26 of 62
A B C D E
5 4 3 2 1

EMI DVDD_IO
G129 UMA
DVDD_IO 0R3J-0-U-GP 2 1 R519 1D5V_S0

2
1 2 0R3J-0-U-GP 2 1 R516 3D3V_S0 near R549
3D3V_S0 DIS C835
SCD1U50V3KX-GP

1
GAP-CLOSE
DY

1
AUD_AGND C843
SC10U10V5ZY-1GP

2
D D

C849 5VA_S0
2 1 "VAUX" Pull high to enable standby mode
AUD_AGND AUD_AGND
SCD1U50V3KX-GP
1

1
C859 C858 DY C855
SCD1U50V3KX-GP SCD1U50V3KX-GP AUD_AGND SC10U10V5ZY-1GP C825
2

3D3V_S0 SCD1U10V2KX-4GP
DY DY

2
AUD_AGND AUD_AGND

RN80 C831

1
KBC_BEEP_1 1 4 AUDIO_BEEP 1 2 AUDIP_PC_BEEP
2 3 C844
SC1U10V3KX-3GP

2
SRN47K-2-GP-U C832

1
1 2DY
R514 C829 SCD1U10V2KX-4GP
1K91R2F-1-GP SC100P50V2JN-3GP SC22P50V2JN-4GP

2
RESET# 1 R515 2 ACZ_RST#_AUDIO 12
0R0402-PAD ACZ_SYNC_AUDIO 12 R512

2
BCLK 1 R517 2 ACZ_BITCLK_AUDIO 12 1 2 LINEOUT_JD# 29
34 KBC_BEEP 1 2 0R0402-PAD 39K2R2F-L-GP

DVDD_IO
SCD47U16V3ZY-3GP C830 1 2
C C837 DY R511 C

13 ACZ_SPKR 1 2 SPKR_SB_1 SC22P50V2JN-4GP ALC268_SENSE 1 2 LINEIN_JD# 29


SCD47U16V3ZY-3GP C827 10KR2F-2-GP
C833
2DY R510

25
38

12
11
10

33

44
43

34
13
1

1
9

6
U57 1 2 MIC_JD# 29
SC22P50V2JN-4GP 20KR2F-L-GP

AVDD1
AVDD2

RESET#
DVDD_IO

AGPIO
DVDD

SYNC

CENTER
BEEP

BCLK

LFE

SENSE_B
SENSE_A
Sense resistors need close codec

29 LINE_IN_L SC4D7U10V3KX-GP 2 1 C818 ALC861_LINE_IN_L 23 5 ACZ_SDATAOUT_AUDIO 12


29 LINE_IN_R SC4D7U10V3KX-GP 2 LINE1_L SDATA_OUT
1 C824 ALC861_LINE_IN_R 24 LINE1_R SDATA_IN 8 AC97_DATIN 1 2 ACZ_SDATAIN0 12
14 R518 39R2J-L-GP
LINE2_L
15 LINE2_R
48 AUD_SPDIF_OUT
SPDIFO1 ALC_EAPD AUD_SPDIF_OUT 29
29 LINE1_VREFO SPDIFI/EAPD 47
31

18
29
INT_MIC1
AUD_MICIN_L
1
2
RN77
8
7
INT_MIC1_R
AUD_MIC_L SC4D7U10V3KX-GP 2 1 C821 MIC1-L_PORT-B 21
LINE2_VREFO

MIC1_L
ALC888S SIDESURR_L
SIDESURR_R
45
46
29 AUD_MICIN_R 3 6 AUD_MIC_R SC4D7U10V3KX-GP 2 1 C820 MIC1-R_PORT-B 22
SC4D7U10V3KX-GP C823 MIC2-L_PORT-B MIC1_R
4 5 2 1 16

GPIO0/DMIC_CLK/SPDIFO2
SC4D7U10V3KX-GP C822 MIC2-R_PORT-B MIC2_L
2 1 17 MIC2_R SURR_L 39 AUD_HP1_OUT_L 28
SRN75J-1-GP SURR_R 41 AUD_HP1_OUT_R 28
RN79

GPIO1/DMIC_DATA
1 8 MIC1V_R 32
MIC1V_L MIC1_VREFO_R
2 7 28 MIC1_VREFO_L FRONT_L 35 AUD_LINE_OUT_L 28
MIC2V

PIN37_VREFO
3 6 30 MIC2_VREFO FRONT_R 36 AUD_LINE_OUT_R 28
B B
4 5

CD_GND
2

C840 C834
AVSS1
AVSS2

JDREF
DVSS
DVSS
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

CD_R
VREF

CD_L
SRN2K2J-2-GP
1

ALC888S-VC2-GR-GP
26
42
4
7

27

40
37

2
3

18
20
19
71.00888.D0G ALC_EAPD
PM_SLP_S3# 13,33,34,38,43,45,48,51

AMP_SHUTDOW N# 34
AUD_AGND AUD_AGND DMIC_CLK 1 TP211 TPAD14-GP
JDREF

SPDIF_GPU 1 TP227 TPAD14-GP

1
1DMIC_DAT MONO-OUT
1

1
TPAD14-GP TP212 VREF TP216 TPAD14-GP D32 D34
1

R523 BAW 56-3-GP

BAW56-3-GP
1

0R2J-2-GP
1

C826 C828 R524


DY SC10U10V5ZY-1GP SCD47U16V3ZY-3GP 20KR2F-L-GP DY DY
2

3
R527
2

SA 4.10 28 MAX9789A_SHDN# 83.00056.K11 83.00056.K11 1 2 3D3V_S0


AUD_AGND
2ND = 83.00056.E11 2ND = 83.00056.E11 10KR2J-3-GP
AUD_AGND
DY

1
R557
A 10KR2J-3-GP JV71-MV DDR3 Madison A

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Azalia codec ALC888
Size Document Number Rev
A3
JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 27 of 62
5 4 3 2 1
A B C D E

5V_S0 +5V_SPK_AMP
Close to U53.8 Close to U53.18 +5V_SPK_AMP
+5V_SPK_AMP

2 R509 1 +5V_SPK_AMP
0R0603-PAD SB 1202

SC1U10V3KX-3GP
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
1

1
C819

C795

C793

1
C810

C792
SCD1U10V2KX-4GP
60ohm 100MHz C797

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
2

2
4 DY DY DY SC1U6D3V2KX-GP 4
3000mA 0.05ohm DC

2
1

1
C800

C790

C811
DY

2
Close to Pin9
AGND

18

17

30
8

9
U53
4K99R2F-L-GP SB 1202 -1

PVDD

PVDD

CPVDD

HPVDD

VDD
R480
SPKR_L+ 6 2 AUD_LIN_R 2 1 AUD_LIN_R_1 1 2 C788 SC1U10V3KX-4GP
29 SPKR_L+ OUTL+ SPKR_INR AUD_LINE_OUT_R 27
SPKR_L- 7 3 AUD_LIN_L 2 1 AUD_LIN_L_1 1 2 C787 SC1U10V3KX-4GP
29 SPKR_L- OUTL- SPKR_INL AUD_LINE_OUT_L 27
SPKR_R- 19
29 SPKR_R- SPKR_R+ OUTR- R479
29 SPKR_R+ 20 OUTR+ 10KR2F-2-GP

SPKR_R+1 15 23 AUD_SPK_ENABLE#
29 SPKR_R+1 SPKR_L+1 HPR SPKR_EN# AMP_MUTE#_R
29 SPKR_L+1 16 HPL MUTE# 25
22 R478
HP_EN AMP_REGEN
REGEN 4 2 1 5V_S0
AUD_AMP_GAIN1 31 10 AMP_C1P C799 1 2 SC1U10V3KX-3GP
AUD_AMP_GAIN2 GAIN1 C1P AMP_C1N 100KR2J-1-GP
32 GAIN2 C1N 12
SC1U25V3KX-1-GP 2K2R2J-2-GP 29 5VA_S0
C807 R496 VOUT AUD_BIAS
24

SC4D7U10V3KX-GP
BIAS
1 2 AUD_HP1_OUT_R1 1 2 AUD_HP1_OUT_R2 26 1 AUD_SET

SC1U10V3KX-3GP
27 AUD_HP1_OUT_R HP_INR SET

CPGND
1 2 AUD_HP1_OUT_L1 1 2 AUD_HP1_OUT_L2 27

CPVSS
27 AUD_HP1_OUT_L HP_INL

1
PGND
PGND

PVSS
GND
GND

1
C812

C801
C804 R495 R481
3 SC1U25V3KX-1-GP 2K2R2J-2-GP 0R0402-PAD 3
MAX9789A-GP

21
5

28
33

11

13

14

2
74.09789.013
Signal inverter for speaker shutdown

2
+5V_SPK_AMP
C805 AGND AGND
2 1AUD_CPVSS

1
AGND
SC1U10V3KX-3GP R504
100KR2J-1-GP

2
AUD_SPK_ENABLE#
AMP_MUTE#_R 2 R526 1
MAX9789A_SHDN# 27
0R0402-PAD

SC1U6D3V2KX-GP

D
1

C802
U55
2N7002-11-GP
DY AMP_MUTE#_R G

2
84.27002.W31

S
2ND = 84.27002.N31
GAIN SETTING
+5V_SPK_AMP
2 2
1

R482 R474
100KR2J-1-GP 100KR2J-1-GP
DY
2

AUD_AMP_GAIN1 AUD_AMP_GAIN2
G110
1

R483 R475 1 2
100KR2J-1-GP 100KR2J-1-GP
DY GAP-CLOSE
G111
2

1 2

AGND AGND GAP-CLOSE


G113
GAIN1 GAIN2 GAIN 1 2

0 0 6dB GAP-CLOSE
G112
0 1 10dB
1 2
1 0 15.6dB
1 GAP-CLOSE JV71-MV DDR3 Madison 1
1 1 21.6dB
AGND

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO AMP
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 28 of 62
A B C D E
5 4 3 2 1

LINE IN Internal Speaker -1 0617

SPKR_R1
ECN99306_20090703 4
SPKR_R+ 2
AUDIO-JK175-GP
G117 NP2 28 SPKR_L- SPKR_L- SPKR_R- 1
GAP-CLOSE NP1 28 SPKR_L+ SPKR_L+ 3
27 LINEIN_JD# 1 2 LINEIN_JD#_R 5 28 SPKR_R- SPKR_R-
RN78 4 28 SPKR_R+ SPKR_R+ ACES-CON2-17-GP

METAL
D 2 3 LINE_IN_R_CONN 3 2nd 20.F1561.002 D
27 LINE_IN_R
27 LINE_IN_L 1 4 6

EC12
EC11
EC1
EC2
LINE_IN_L_CONN 2

1
1
1
1
SRN75J-2-GP-U 1 SPKR_L1
4

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SPKR_L+ 2

2
2
2
2
1
1
LIN1

R505
R506
DY DY DY DY
22.10265.211 SPKR_L- 1
3
DYDY 10KR2J-3-GP
10KR2J-3-GP ACES-CON2-17-GP
2
2

2nd 20.F1561.002

3D3V_S0 3D3V_S0

D30 D29
1 1

LINE_IN_R_CONN 3 DY LINE_IN_L_CONN 3 DY
2 2

BAV99PT-GP-U BAV99PT-GP-U

C C

LINE_IN_R_CONN

LINE OUT LINE_IN_L_CONN

1
L29 L30
PHONE-JK382-GP-U
NP2
U48 NP1
TX
LINEOUT_JD# 4 3 C
EN# NC#3 27 AUD_SPDIF_OUT
5V_SPDIF_S0
IC
GND 2 B
5V_SPDIF_S0 MLVS0603M04-1-GP MLVS0603M04-1-GP
DRIVE
5V_S0 5 1 A

2
IN OUT LED
1

27 LINEOUT_JD# 5
1

C772 G5240B2T1U-GP-U C773 RN75 4

METAL
74.05240.B7F SCD1U16V2ZY-2GP 2 3 LOUT_L+1 3
2

SCD1U16V2ZY-2GP 28 SPKR_L+1 LOUT_R+1 LOUT_L+1


2nd = 74.09711.07F DY 1 4 2
2

28 SPKR_R+1
DY 2 1
R452 2 DY 1 1 SRN75J-2-GP-U 7 LOUT_R+1

1
0R2J-2-GP 6 L31 L32
RN74 DY
SRN1KJ-7-GP LOUT1

2nd =
3
4

22.10133.K21 MLVS0603M04-1-GP MLVS0603M04-1-GP

2
B B

AUD_MICIN_R

AUD_MICIN_L

1
L33 L34

MIC IN ECN99306_20090703 MLVS0603M04-1-GP MLVS0603M04-1-GP

2
PHONE-JK387-GP
NP2
NP1
27 MIC_JD# 5
4
METAL

27 AUD_MICIN_R 3
6
27 AUD_MICIN_L 2
1
1
1

MICIN1
R468
R472

22.10265.201 JV71-MV DDR3 Madison


A A
3D3V_S0 3D3V_S0
10KR2J-3-GP
10KR2J-3-GP

Wistron Corporation
2
2

D27 D26
1 1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DYDY Taipei Hsien 221, Taiwan, R.O.C.
AUD_MICIN_R 3 DY AUD_MICIN_L 3 DY
Title
2 2
AUDIO jack
BAV99PT-GP-U BAV99PT-GP-U Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 29 of 62

5 4 3 2 1
MDC 1.5 CONN 1
DIS
2 3D3V_S5
R263 0R2J-2-GP
MDC1 1 2 1D5V_S5
R266 UMA 0R2J-2-GP
NP1
14
13 15 C482
1 2 1D5V_S5_3D3V_S5_MDC 1 2
DY
12 ACZ_SDATAOUT_MDC 1 2 ACZ_SDATAOUT_A 3 4 SCD1U10V2KX-4GP
R278 39R2J-L-GP 5 6 3D3V_S5
12 ACZ_SYNC_MDC 1 2 ACZ_SYNC_A 7 8
12 ACZ_SDATAIN1 R2741 2 39R2J-L-GP ACZ_SDATAIN1_A 9 10
12 ACZ_RST#_MDC R2711 2 39R2J-L-GP ACZ_RST#_A 11 12 ACZ_BTCLK_MDC_A 1 R267 2
R270 100R2F-L1-GP-U 0R0402-PAD ACZ_BTCLK_MDC 12
16 18

1
17

1
DY DY DY DY NP2 DY DY
1

1
C494 C491 C490 C485 C480 R262 C481 C483

100KR2J-1-GP
SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC33P50V2JN-3GP

SC22P50V2JN-4GP
SC4D7U10V5ZY-3GP

DUMMY-C2
TYCO-CONN12A-4-GP
2

2
20.F1074.012 1 11
2nd =

2
13 16
14 17
15 18
2 12

3D3V_S5
U16 UMA 1D5V_S5

1 VIN VOUT 5
2 GND

SC1U16V3ZY-GP
3 EN NC#4 4

1
DY
BC3 C196
SC1U16V3ZY-GP

G9091-150T11U-GP UMA SC22U6D3V6KX-1GP

2
1

74.09091.I3F
BC4
UMA
2

2nd = 74.09198.B7F

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MDC
Size Document Number Rev
-1
JV71-MV DDR3Sheet
Date: Wednesday, October 28, 2009
Madison
30 of 62
5 4 3 2 1

3D3V_S0 3D3V_D_S0

SD_CLK/XD_D1/MS_CLK
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2

SD_DAT6/XD_D7/MS_D3
1 R463 2
0R0603-PAD

SD_DAT4/XD_WP#

SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
SD_DAT1/XD_D4

SD_DAT5/XD_D0
XD_D5/MS_BS
XD_D3/MS_D1

MS_INS#

XD_R/B#
XD_CD#

SD_CD#

XD_CE#
XD_CLE
XD_ALE
CARD_3D3V_S0

SD_WP
2
C785
D DY SC1U10V3KX-3GP D

1
U51

19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
RTS5159-GR-GP

SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
2
C786

2
SC1U10V3KX-3GP C784
SCD1U16V2ZY-2GP 9 24

1
CARD_3V3 MS_D5
22

1
VREG MS_D4
2 R464 1 AV_PLL 1 AV_PLL
0R0402-PAD
VREG 10 VREG
NC#30 30
3D3V_S0 2 R471 1 3V_VBUS_S0 8 3V3_IN NC#7 7
0R0603-PAD 3
NC#3
3D3V_D_S0 33 D3V3
1

2
C789 C783 -1 11 D3V3

1
SC4D7U6D3V3KX-GP SCD1U16V2ZY-2GP C774
DY C782 SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP

2
MODE_SEL 45
SD_CMD MODE_SEL
36 SD_CMD GND 6
TPAD14-GP TP208 1VBUS_LED 14 12
GPIO0 GND
2 RREF GND 32

XTAL_CTR
R465 1 2 RREF 44 46
6K19R2F-GP RST# GND

EEDO
EECS
EESK
XTLO
RST# 1 R455 2RST#_R

EEDI
XTLI
3D3V_D_S0

DM
0R0402-PAD

DP
C C
71.05159.00G

5
4

13

47
48

17
16

15
18
1

MODE_SEL
DY
R453 1
1

100KR2J-1-GP R456 2 R467 1 USB_11+

XDAL_CTR
C779 13 USBPP11 0R0402-PAD
0R0402-PAD
2

2 R454 1RST# SC47P50V2JN-3GP 2 R466 1 USB_11-

12M_XO
7,13,25,32,34,35,52 PLT_RST1#
2

0R0402-PAD 13 USBPN11 0R0402-PAD


DY
2
1

C775
SC1U10V3KX-3GP
DY
2

3D3V_D_S0 2 R460 1
0R0402-PAD

3 CLK48_5158E 2 R459 1 12M_XO


0R0402-PAD

CARD_3D3V_S0

5 IN1 CARD-READER (SD/MMC/MS/XD/MS PRO)


1

C796 C798
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP
B B
DY
2

CARD1

CARD_3D3V_S0 23 25 SD_DAT0/XD_D6/MS_D0_1 2 R486 10R0402-PAD SD_DAT0/XD_D6/MS_D0


SD_VCC SD_DAT0 SD_DAT1/XD_D4_1 R485
14 MS_VCC SD_DAT1 29 2 10R0402-PAD SD_DAT1/XD_D4
33 10 SD_DAT2/XD_RE#_1 2 R488 10R0402-PAD SD_DAT2/XD_RE#
XD_VCC SD_DAT2 SD_DAT3/XD_W E#_1 R489
SD_DAT3 11 2 10R0402-PAD SD_DAT3/XD_W E#

SD_DAT5/XD_D0 1 R494 2 SD_DAT5/XD_D0_1 8 12 SD_CMD_1 2 R490 10R0402-PAD SD_CMD


0R0402-PAD SD_CLK/XD_D1/MS_CLK XD_D0 SD_CMD SD_CLK/XD_D1/MS_CLK
9 XD_D1 SD_CLK 24
SD_DAT7/XD_D2/MS_D2_1 26 36 SD_CD#
XD_D3/MS_D1 XD_D2 SD_CD_SW
1 R484 2 XD_D3/MS_D1_1 27 XD_D3 SD_WP_SW 35 SD_W P
0R0402-PAD SD_DAT1/XD_D4_1 28
XD_D5/MS_BS_1 XD_D4
30 XD_D5
SD_DAT0/XD_D6/MS_D0_1 31 19 SD_DAT0/XD_D6/MS_D0_1
SD_DAT6/XD_D7/MS_D3_1 XD_D6 MS_DATA0 XD_D3/MS_D1_1
32 XD_D7 MS_DATA1 20
18 SD_DAT7/XD_D2/MS_D2_1 2 R492 10R0402-PAD SD_DAT7/XD_D2/MS_D2
XD_R/B# MS_DATA2 SD_DAT6/XD_D7/MS_D3_1
1 XD_R/B MS_DATA3 16 2 R491 10R0402-PAD SD_DAT6/XD_D7/MS_D3
SD_DAT2/XD_RE#_1 2
XD_CE# XD_RE XD_D5/MS_BS_1
3 XD_CE MS_BS 21 2 R487 10R0402-PAD XD_D5/MS_BS
XD_CLE 4 17 MS_INS#
XD_ALE XD_CLE MS_INS SD_CLK/XD_D1/MS_CLK
5 XD_ALE MS_SCLK 15
SD_DAT3/XD_W E#_1 6
SD_DAT4/XD_W P# XD_WE
1 R493 2 SD_DAT4/XD_W P#_1 7 XD_WP
0R0402-PAD XD_CD# 34 13
XD_CD_SW 4IN1_GND
4IN1_GND 22 JV71-MV DDR3 Madison
A NP1 NP1 4IN1_GND 38 A
SD_DAT0/XD_D6/MS_D0 1 2 NP2 37
SD_DAT1/XD_D4 EC51 NP2 4IN1_GND
1 2 SC22P50V2JN-4GP
SD_DAT2/XD_RE# EC55 1 SC22P50V2JN-4GP
DY 2 SC22P50V2JN-4GP
Wistron Corporation
SD_DAT3/XD_W E# EC52 1 CARD-PUSH-36P-5-GP-U 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
EC57 DY 2 SC22P50V2JN-4GP Taipei Hsien 221, Taiwan, R.O.C.
DY 20.I0081.011
SD_W P 1
DY 2 Title
SD_CD# DY EC54 1 2 SCD1U25V2ZY-1GP 2nd = 20.I0109.001
SD_CMD DY EC53 1 2 SCD1U25V2ZY-1GP Cardreader RTS5159
SD_CLK/XD_D1/MS_CLK DY EC58 1 2 SCD1U25V2ZY-1GP Size Document Number Rev
DY EC56 SCD1U25V2ZY-1GP
JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 31 of 62

5 4 3 2 1
5 4 3 2 1

Mini Card Connector(WLAN)


Mini Card Connector
Support debug-card
D D
3D3V_S0 3D3V_S5

1D5V_S0

1
3D3V_S0
R29 R27
0R0603-PAD 0R3J-0-U-GP

MINI1 DY

2
53
NP1
1 2 MINI1_PW R

3 4
5 6
3 W LAN_CLKREQ# 7 8
9 10
3 CLK_PCIE_MINI1# 11 12

2
3 CLK_PCIE_MINI1 13 14 DY
15 16 C33 10KR2J-3-GP
SC100P50V2JN-3GP 1 DY 2

1
17 18 R42
34 E51_RxD
34 E51_TxD 19 20 W IRELESS_EN 34
21 22 PLT_RST1#_MINI1 1 R34 2
0R0402-PAD PLT_RST1# 7,13,25,31,34,35,52
13 PCIE_RXN2 23 24
13 PCIE_RXP2 25 26
27 28
29 30 SMB_CLK_MINI1 1 2 SMB_CLK 13,15,25
13 PCIE_TXN2 31 32 SMB_DATA_MINI1 R26 1DY 0R2J-2-GP
2 SMB_DATA 13,15,25
C
13 PCIE_TXP2 33 34 R20 DY 0R2J-2-GP C
35 36 USBPN3 13
37 38 USBPP3 13
3D3V_S0 39 40
41 42 LED_W W AN# 1 TP22 TPAD14-GP
43 44 W LAN_LED# 37
45 46
47 48
49 50
5V_S5 1 R15 2 5V_S5_MIN1 51 52
0R0402-PAD NP2
54

SKT-MINI52P-20-GP
20.F1117.052

2nd = 62.10043.391

B B

Place near MINI1

3D3V_S0 1D5V_S0

MINI1_PW R

C542 C523 C524 C13 C29 C28


1

1
SC1U10V3ZY-6GP

SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY
2

A JV71-MV DDR3 Madison A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD
Size Document Number Rev
A3
JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 32 of 62
5 4 3 2 1
5V_S0

1
R338
10KR2J-3-GP
2 R335 1
3D3V_S0 0R0402-PAD DY

2
FAN1
R334 D18 3 1
5V_S0 EMC2102_FAN_TACH
DY EMC2102_FAN_TACH_1
5
1 2 A K 3
2
RB551V30-GP 2nd = DY
10KR2J-3-GP EMC2102_FAN_DRIVE 83.R5003.H8H 1
*Layout* 15 mil 4

2
C54 C42 C555 D20 ACES-CON3-GP-U1
SC4D7U6D3V3KX-GP SCD1U16V2ZY-2GP SC22U6D3V5MX-2GP CH551H-30PT-GP 20.F0714.003

2
DY 83.R5003.C8F
2nd = 20.D0246.103

1
2nd = 83.R5003.H8H
3D3V_S0
SMBC_Therm 34,53
SMBD_Therm 34,53
1 2 EMC2102_VDD_3D3

R68
49D9R2F-GP

29

28

27

26

25

24

23

22
2
C62 U4

VDD_5Va

FANa

FANb

VDD_5Vb
GND

TACH

SMCLK

SMDATA
SCD1U16V2KX-3GP 3D3V_S0

1
4 H_THERMDC
2

1
SC470P50V2KX-3GP
Layout notice :
C63 Both H_THERMDA and THERMDC routing 1 21 R36
10 mil trace width and 10 mil spacing VDD_3V NC#21 8K2R2J-3-GP
1

4 H_THERMDA 2 DN1 GND 20

2
1.For CPU Sensor 3 19 ALERT# 2 R37 1 THRM# 13
DP1 ALERT# 0R2J-2-GP DY
EMC2102_DN2 4 EMC2102 18 CLK_32K 3D3V_S0
DN2 CLK_IN RN12
Layout notice : Both DN2 and DP2 routing EMC2102_DP2 5 17 EMC2102_CLK_SEL 3 2
10 mil trace width and 10 mil spacing DP2 CLK_SEL PURE_HW _SHUTDOW N#
C374 must be near Q7 4 1
EMC2102_DN3 6 16
DN3 RESET#
Q19 SRN10KJ-5-GP
1

SC470P50V2KX-3GP EMC2102_DP3 7 15 EM2102_RESET#


E

MMBT3904-4-GP C64 C488 DP3 NC#15

THERMTRIP#

POWER_OK#
SYS_SHDN#
B SC470P50V2KX-3GP GND = Internal Oscillator Selected

FAN_MODE
SHDN_SEL
2

TRIP_SET
84.T3904.C11 DY +3.3V = External 32.768kHz Clock Selected
C373 must be near EMC2102
C

3D3V_S5

NC#8
2nd = 84.03904.P11
2.System Sensor, Put between CPU and NB. GND = Channel 1 R41 DY U2 SCD1U16V2KX-3GP
PW ROK 2 1 EM2102_RESET# 1 C23 DY
OPEN = Channel 3 0R2J-2-GP B
5 1 2

10

11

12

13

14
VCC
C375 must be near Q8 +3.3V = Disabled EMC2102-DZK-GP 13,27,34,38,43,45,48,51 PM_SLP_S3# 2 A
74.02102.A73 Y 4 PW ROK 7,13
Q11 R66 2nd = 74.07922.0B3 3 GND
Layout notice : Both DN3 and DP3 routing
E

MMBT3904-4-GP 10 mil trace width and 10 mil spacing 2 DY 1 EMC2102_SHDN 74LVC1G08GW -1-GP
1

B C65 73.01G08.L04
84.T3904.C11 SC470P50V2KX-3GP C76 2nd = 73.7SZ08.DAH
2

SC470P50V2KX-3GP 10KR2J-3-GP
DY
2
C

C372 must be near EMC2102 3D3V_S0 3D3V_S0


VGATE_PW RGD 13,40
2nd = 84.03904.P11 R59 EMI capacitor
3.HW T8 sensor 2 DY 1 EMC2102_FAN_mode

10KR2J-3-GP 1 2 VGATE_PW RGD

SCD1U16V2ZY-2GP
EC82 DY SC12P50V2JN-3GP

1
1
R62 R56
2 1 C46 10KR2F-2-GP

2
10KR2J-3-GP PURE_HW _SHUTDOW N#

2
GND = Fan is OFF
OPEN = Fan is at 60% full-scale TRIP_SET Pin Voltage
V_DEGREE
RUN_POW ER_ON +3.3V = Fan is at 75% full-scale V_DEGREE

SCD1U16V2ZY-2GP
=(((Degree-75)/21)

1
1
R48
C40 2K8R2F-GP
R38

2
10R2J-2-GP

2
RSMRST# CLK_32K_R 1 2 CLK_32K
1

R30
6

240KR3-GP

2N7002KDW -GP 84.2N702.A3F 3D3V_AUX_S5


2

Q8
1

PURE_HW _SHUTDOW N#
1

R17 D2
PM_SUS_CLK 13 10KR2J-3-GP BAT54-7-F-GP
DY JV71-MV DDR3 Madison
2

CPUCORE_ON 40,43,45
RSMRST# 34,38
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

(dummy, KBC already delay) Taipei Hsien 221, Taiwan, R.O.C.


R18
1

100KR2J-1-GP C15 DY Title


SCD1U16V2ZY-2GP
DY Thermal/Fan Controllor
1

Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 33 of 62
A

3D3V_AUX_S5 3D3V_S0 3D3V_S0 3D3V_AUX_S5

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
1

1
EC43 C638 C629 C611 C639 C135 C610

1
SRN4K7J-10-GP
C177 C615 C626 DY

SCD1U16V2ZY-2GP
8
7
6
5

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
2

2
SCD1U16V2ZY-2GP
RN23 DY DY

2
DY

3D3V_AUX_S5
1
2
3
4
3D3V_AUX_S5_KBC 2 R401 1
BAT_SCL THER_SCL 0R0603-PAD
BAT_SDA THER_SDA

SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
C555,C556 colse to Pin VDD

1
4
C643 EC37 4

C646 DY

SCD1U16V2ZY-2GP
DY

2
3D3V_S0
R388
7,13,25,31,32,35,52 PLT_RST1# 1 2
100R2J-2-GP
X3

SC27P50V2JN-2-GP
47 BAT_IN#

1
C613

102

115

1
U14A

80

19
46
76
88
3 2

4
1 OF 2 C169 C136

2
SC7P50V2DN-2GP SC7P50V2DN-2GP

GPIO41

VDD

AVCC

VCC
VCC
VCC
VCC
VCC

2
1KBC_XO_R
4 1

124 104 2 R98 1 10KR2J-3-GP


PLT_RST1#_1 GPIO10/LPCPD# VREF
7
LRESET# X-32D768KHZ-34GPU
3 PCLK_KBC
2
3
LCLK A/D GPI90/AD0
97
98
AD_IA 46
2nd = 82.30001.661 82.30001.B21
DY
12,35 LPC_LFRAME# LFRAME# GPI91/AD1 TP_LOCK_BTN# 37 2 OF 2
126 99 WIRELESS_BTN# 37 U14B
2
12,35 LPC_LAD0
127
LAD0 GPI92/AD2
100 BT_BTN# 37 R151 82.30001.661
12,35 LPC_LAD1 LAD1 GPI93/AD3
R393 128 108 MEDIA_INT 1 33KR2J-3-GP R152 R147
12,35 LPC_LAD2 LAD2 GPIO05 TP191 TPAD14-GP KBC_XI_R 1 KBC_XI KCOL1
DY 0R2J-2-GP 1 LPC 96 FP_DETECT# 36 1 2 2 77 53

2
12,35 LPC_LAD3 LAD3 GPIO04 32KX1/32KCLKIN KBSOUT0/JENK# KCOL2
13 INT_SERIRQ 125 52
SC4D7P50V2CN-1GP SERIRQ 10MR2J-L-GP 10MR2J-L-GP KBSOUT1/TCK KCOL3
13 PM_CLKRUN# 8 51
1

GPIO11/CLKRUN# KBSOUT2/TMS KCOL4


C630 12 KBRCIN# 122 50
KBRST# KBC_XO KBSOUT3/TDI KCOL5
12 KA20GATE 121 101 79 49
GA20 GPI94 KBC_THERMALTRIP# 38 32KX2 KBSOUT4/JEN0#
1 2PCLK_KBC_RC ECSCI#_KBC 29 105 PCB_VER0
27 AMP_SHUTDOWN# 30 48 KCOL6
ECSCI#/GPIO54 GPI95 PCB_VER1 GPIO55/CLKOUT KBSOUT5/TDO KCOL7
DY 53 BLON_IN 9
GPIO65/SMI# D/A GPI96
106
KBSOUT6/RDY#
47
ECSWI#_KBC 123 107 63 43 KCOL8
GPIO67/PWUREQ# GPI97 CRT_DEC# 19 GPIO14/TB1 KBSOUT7 KCOL9
13,50 PM_PWRBTN# 117
31
GPIO20/TA2 KBC KBSOUT8
42
41 KCOL10
37 Volume_Down# GPIO56/TA1 KBSOUT9 KCOL11
FOR KBC DEBUG THER_SDA 68 64
27 KBC_BEEP
32
118
GPIO15/A_PWM KBSOUT10
40
39 KCOL12
THERMAL-----> THER_SCL 67
GPIO74/SDA2 GPIO01/TB2
95
PM_SLP_S3# 13,27,33,38,43,45,48,51 13 EC_TMR
62
GPIO21/B_PWM KBSOUT11
38 KCOL13
5V_AUX_S5 69
GPIO73/SCL2 SMB GPIO03
93
KBC_PWRBTN# 37 18 BRIGHTNESS GPIO13/C_PWM KBSOUT12/GPIO64
37 KCOL14
46,47 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 46 KBSOUT13/GPIO63
70 94 LID_CLOSE# 36 KCOL15
BATTERY-----> 46,47 BAT_SCL GPIO17/SCL1 GPIO07
119 SB_ID KBSOUT14/GPIO62
35 KCOL16
TPAD14-GP TP215 GPIO23 KBSOUT15/GPIO61/XOR_OUT KCOL17
1 6 Volume_Up# 37 37 BACKUP_BTN# 13 34
GPIO24 3G_EN GPIO12/PSDAT3 GPIO60/KBSOUT16 KCOL18
109 1 37 PWR_CON_LED 12 33
GPIO30 Model_ID0 TP224 TPAD14-GP GPIO25/PSCLK3 GPIO57/KBSOUT17
3

37 NUM_LED 81
GPIO66/G_PWM SP GPIO31
120
65
37 AC_IN_LED 11
10
GPIO27/PSDAT2
3

GPIO32/D_PWM PWRLED 37 37 PWR_CON_BTN# GPIO26/PSCLK2


66 71 54 KROW1
GPIO33/H_PWM STDBY_LED 37 36 TPDATA GPIO35/PSDAT1 KBSIN0
16 72 55 KROW2
84
GPIO40/F_PWM
17
CAP_LED 37 36 TPCLK GPIO37/PSCLK1 PS/2 KBSIN1
56 KROW3
23 BLUETOOTH_EN GPIO77 GPIO42/TCK AD_OFF 47 KBSIN2 KROW4
18 DBC_EN 83
82
GPIO76/SHBM SPI GPIO43/TMS
20
21
RSMRST#_KBC 13 KBSIN3
57
58 KROW5
32 WIRELESS_EN
91
GPIO75 GPIO GPIO44/TDI
22
PM_SLP_S4# 13,38,42,44
86
KBSIN4
59 KROW6
37 WLAN_TEST_LED GPIO81 GPIO45/E_PWM CHARGE_LED 37 35 SPIDI F_SDI KBSIN5
23 65W_90W# 87 60 KROW7
GPIO46/TRST# 35 SPIDO F_SDO KBSIN6
24 Model_ID1 90 61 KROW8
GPIO47
25 SPI_WP_R# 1 R365 2
35 SPICS#
92
F_CS0# FIU KBSIN7
GPIO50/TDO SPI_WP# 35 35 SPICLK F_SCK
111 26 0R0402-PAD
32 E51_TxD GPO83/SOUT_CR/BADDR1 GPIO51 TP_LOCK_LED 37 ECRST#
113 27 BLON_OUT 18 85
32 E51_RxD GPIO87/SIN_CR GPIO52/RDY# UMA_DISCRETE# VCC_POR#
112 28
GPO84/BADDR0 GPIO53
73
GPIO70 LOW_PWR 25
114 74 ENERGY_DET 25
37 DC_BATFULL GPIO16 GPIO71 WPCE773LA0DG-GP
14 75 BT_LED 37
18 LCD_CB_SEL GPIO34 GPIO72
15 110 USB_PWR_EN# 24
41,50 S5_ENABLE GPIO36 GPO82/TRIS#
SER/IR
DY VCORF 44
S5_ENABLE VCORF 3D3V_AUX_S5
1 2
1

R507 10KR2J-3-GP RN64


AGND
8 1KBC_THERMALTRIP#

GND
GND
GND
GND
GND
GND
C609 7 2LID_CLOSE#
2

SCD1U16V2ZY-2GP 6 3LOW_PWR
WPCE773LA0DG-GP 5 4ECRST#
103

5
18
45
78
89
116
71.00773.00G
SRN10KJ-6-GP

1
Q13 C645
33,38 RSMRST# B SC1U10V3KX-3GP
RN67 MMBT3906-4-GP

2
THER_SCL R502 1 2 0R0402-PAD 1 4KA20GATE UMA 84.T3906.A11
SMBC_Therm 33,53

C
THER_SDA R503 1 2 0R0402-PAD 2 3KBRCIN# BLON_IN 1 2 2nd = 84.03906.H11
SMBD_Therm 33,53 3D3V_S0 GMCH_BL_ON 7
R367 0R2J-2-GP
DIS
SRN10KJ-5-GP 3D3V_S0 1 2 E51_RxD UMA_DISCRETE# 1 2
D6 R391 10KR2J-3-GP R366 10KR2J-3-GP
RN65 DY DIS
6 1 ECSCI#_KBC E51_TxD 1 8 1 2 E51_TxD BLON_IN 1 2 3D3V_S5
13 ECSCI#_1 DBC_EN 2 7 R392 10KR2J-3-GP R369 100KR2J-1-GP
2 2

SB_ID 3 6 DY
Model_ID1 4 5 2 1 BAT_IN# AD_OFF 2 1
3D3V_AUX_S5

1
10KR2J-3-GP

10KR2J-3-GP
5 2 R368 100KR2J-1-GP R364 1KR2J-1-GP
R394 R372 PlanarID
SRN10KJ-6-GP
Madison-M96
ECSWI#_KBC
65W_90W# 1 2 (1,0)
13 ECSWI# 4 3 R698 10KR2J-3-GP
SA: 0,0

2
PCB_VER0
PCB_VER1
CH731UAPT-GP SB: 0,1

1
10KR2J-3-GP

10KR2J-3-GP
UMA/M92/Park-->65W -1: 1,0
Internal KeyBoard 83.R0304.B8H
M96/Madison -->90W
R395 R373
-1M: 1,1
2ND = 83.R3004.A8E
Connector SB 1007

2
SB 1007
DY DY
20.K0382.026
KB1
2nd = 20.K0320.026
PTWO-CON26-4-GP

Cover Up Switch
2nd source:20.F00984.002 3D3V_AUX_S5
27

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

28

LID1
R397
2
OUT LID_CLOSE#_1 1 LID_CLOSE#
2
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

3
1

GND 100R2F-L1-GP-U
1 C627
VDD SCD22U16V3KX-2-GP
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

2
1
KCOL1

KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

ME268-002-GP
74.00268.07B C623
SC1U16V3ZY-GP
2

TP_LOCK_BTN#1 TP192TPAD14-GP
1 1

Model_ID0 1 TP185TPAD14-GP
MB PIN DEFINE 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 TP_LOCK_LED 1 TP182TPAD14-GP

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

K/B Title
Taipei Hsien 221, Taiwan, R.O.C.

24 1 KBC WPC773
Size Document Number Rev
A2 -1
JV71-MV DDR3 Madison
Date: Wednesday, October 28, 2009 Sheet 34 of 62
A
A B C D E

3D3V_AUX_S5

SCD1U16V2ZY-2GP
1
EC44

5
6
7
8
DY

2
4 3D3V_AUX_S5 4
SRN10KJ-6-GP
RN29

4
3
2
1
SPI_HOLD#

U19

34 SPICS# 1 CS# VCC 8


34 SPIDI ER1
1 233R2J-2-GP SPI_DI 2 7 SPI_HOLD#
SPI_WP# SO/SIO1 HOLD# SPICLK
34 SPI_WP# 3 WP#/ACC SCLK 6 SPICLK 34
4 5 SPIDO SPIDO 34
GND SI/SIO0

1
EC38
DY MX25L1605DM2I-12G-GP

1
SC4D7P50V2CN-1GP

72.25165.A01 EC40 EC41


2

2nd = 72.25X16.A01 DY DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
2

2
3 3
16M Bits
SPI FLASH ROM

GOLDEN FINGER FOR DEBUG BOARD


2 2

DB1
3D3V_S0 1
12,34 LPC_LAD0 2
12,34 LPC_LAD1 3
12,34 LPC_LAD2 4
12,34 LPC_LAD3 5
12,34 LPC_LFRAME# 6
7,13,25,31,32,34,52 PLT_RST1# 7
8
3 PCLK_FWH 9
10
11
12

MLX-CON10-7-GP JV71-MV DDR3 Madison


20.D0183.110
DY
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BIOS
Size Document Number Rev
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 35 of 62
A B C D E
5 4 3 2 1

TOUCH PAD
5V_S0 5V_S0

1
1
2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY EC15 DY EC16
D RN28 D

2
SRN10KJ-5-GP
TPCN1
14

4
3
12
RN27 11
34 TPDATA TPDATA 1 4 TP_DATA 10
34 TPCLK TPCLK 2 3 TP_CLK 9
SRN33J-5-GP-U 8
7
TP_RIGHT 6
5
4
3
2

TP_LEFT 1

13

PTW O-CON12-3-GP-U
20.K0370.012
2nd = 20.K0315.012
1 12
C
T/P C

USBPP6
USBPN6
5V_FP_S0
FP_DETECT#
TP_DATA
TP_CLK
TP_LEFT
TP_RIGHT
B
Finger printer B

2
EC18 EC17 EC19 EC20 EC74 EC73 EC83 EC84
5V_S0 5V_FP_S0

1
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY DY DY DY DY DY DY
1

R199
0R0603-PAD FPCN1
13
2

2
13 USBPP6 2 R197 1 USBPP6_1 3
13 USBPN6 0R0402-PAD
2 R198
1 USBPN6_1 4
34 FP_DETECT# 0R0402-PAD FP_DETECT# 5
6
7
TP_LEFT 8
TP_RIGHT 9
10
11
12 JV71-MV DDR3 Madison
A A
14

PTW O-CON12-3-GP-U Wistron Corporation


20.K0370.012 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2nd = 20.K0315.012 Title

Touch PAD and FP


Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 36 of 62

5 4 3 2 1
5 4 3 2 1

PW R_LED1

1
Q28

R1
3 FRONT_PW RLED#_Q
LED FRONT_PW RLED#_R
STDBY_LED#_R
3 2 5V_S5

34 BT_LED 1
Q4

R1
3

2
BT_LED#_1

34 PW RLED R2
2 4 1
R2 SRN300J-1-GP
DTC143ZUB-GP
FRONT_PW RLED#_Q 4 5 Power LED DTC143ZUB-GP
STDBY_LED#_Q 3 6 LED-OB-2-GP 84.00143.G1K
84.00143.G1K 2nd = 84.00143.D1K DC_BATFULL#_Q 2 7 83.19223.A70 2nd = 84.00143.D1K
Q29 CHARGE_LED#_Q 1 8 2nd =
3 STDBY_LED#_Q CHARGER_LED1
D
34 STDBY_LED 1 R1 RN81 WLAN
W LAN_LED1
LED D
2 3 2 5V_AUX_S5
R2 DC_BATFULL#_R 1 R560 2 W LAN_LED#_1 1 2W LAN_LED#_RK A
32 W LAN_LED# 3D3V_S0
CHARGE_LED#_R 33R2J-2-GP R7 75R2J-1-GP
DTC143ZUB-GP
84.00143.G1K 2nd = 84.00143.D1K LED-Y-57-GP
4 1
Q30 83.01921.P70
3 DC_BATFULL#_Q Charger LED 2ND = 83.00190.S7A
1 R1 LED-OB-2-GP
34 DC_BATFULL
2 83.19223.A70
R2 2nd =
3GBT_LED1
DTC143ZUB-GP BT_LED#_1 1 2BT_LED#_R K A 5V_S0
84.00143.G1K 2nd = 84.00143.D1K R14 75R2J-1-GP
Q31 LED-B-98-GP
3 CHARGE_LED#_Q PW R_LED11 83.00193.A70

D
1 R1 K A 2nd = 83.19217.G70
34 CHARGE_LED 5V_S5
2 Q1
R2 LED-B-98-GP 2N7002-11-GP BT LED
FRONT_PW RLED#_234 1R571 330R2J-3-GP
2 FRONT_PW RLED#_11 83.00193.A70 2nd = 83.19217.G70 G
DTC143ZUB-GP PW R_LED12 34 W LAN_TEST_LED
84.00143.G1K 2nd = 84.00143.D1K FRONT_PW RLED#_234 1R572 330R2J-3-GP
2 FRONT_PW RLED#_12 K A 5V_S5 84.27002.W31

S
Q2 FRONT_PW RLED#_234 1R573 330R2J-3-GP
2 FRONT_PW RLED#_13 2nd = 84.27002.N31
3 FRONT_PW RLED#_234 LED-B-98-GP
1 R1 83.00193.A70 2nd = 83.19217.G70
34 AC_IN_LED PW R_LED13
2
R2 K A MEDIA_LED1
5V_S5
DTC143ZUB-GP 12 MEDIA_LED# 2 R12 1 MEDIA_LED#_R K A 5V_S0
LED-B-98-GP 100R2J-2-GP
C 84.00143.G1K 2nd = 84.00143.D1K 83.00193.A70 2nd = 83.19217.G70 LED-B-98-GP C
Q3 83.00193.A70
3 FRONT_PW RLED#_56 Q6 2nd = 83.19217.G70
1 R1 3 NUM_LED# NUM_LED1
34 PW RLED PW R_LED10 R1
2 34 NUM_LED 1 K A 5V_S0
R2 K A 2
5V_S5
R2 RN8 LED-B-98-GP
DTC143ZUB-GP LED-B-98-GP
DTC143ZUB-GP 1 4NUM_LED#_R 83.00193.A70
84.00143.G1K 2nd = 84.00143.D1K FRONT_PW RLED#_56 1R574 330R2J-3-GP
2 FRONT_PW RLED#_10 83.00193.A70 2nd = 83.19217.G70 2 3CAP_LED#_R 2nd = 83.19217.G70
Q35 FRONT_PW RLED#_56 1R576 330R2J-3-GP
2 FRONT_PW RLED#_9 84.00143.G1K CAP_LED1
3 FRONT_PW RLED#_78 FRONT_PW RLED#_78 1R577 330R2J-3-GP
2 FRONT_PW RLED#_7 PW R_LED9 2nd = 84.00143.D1K K A 5V_S0
1 R1 FRONT_PW RLED#_78 1R578 330R2J-3-GP
2 FRONT_PW RLED#_8 K A Q7 SRN100J-3-GP
5V_S5
2 3 CAP_LED# LED-B-98-GP
R2 LED-B-98-GP 1 R1 83.00193.A70
34 CAP_LED
DTC143ZUB-GP 83.00193.A70 2nd = 83.19217.G70 2 2nd = 83.19217.G70
R2
84.00143.G1K 2nd = 84.00143.D1K PW R_LED7
DTC143ZUB-GP
K A 5V_S5
84.00143.G1K2nd = 84.00143.D1K TP_LOCK_LED1
LED-B-98-GP Q16
83.00193.A70 2nd = 83.19217.G70 3 TP_LOCK_LED# 1 2TP_LOCK_LED#_R K A 3D3V_S0
1 R1 R250 75R2J-1-GP
PW R_LED8 34 TP_LOCK_LED
2 LED-Y-57-GP
K A R2
5V_S5
83.01921.P70
LED-B-98-GP DTC143ZUB-GP
2ND = 83.00190.S7A
83.00193.A70 2nd = 83.19217.G70 84.00143.G1K 2nd = 84.00143.D1K
Q25
24 PW R_CON_BTN#_1 3 PW R_CON_LED# PW R_CON_LED# 24
B 3D3V_S0 R1 B
34 PW R_CON_LED 1
RN52 RN51 2
1 8 1 8 R2
34 PW R_CON_BTN#
34 Volume_Up# 2 7 Volume_Up#_1 2 7
Volume_Down#_1 DTC143ZUB-GP
34 Volume_Down# 3 6 3 6
4 5 4 5 84.00143.G1K2nd = 84.00143.D1K

SRN470J-3-GP SRN10KJ-6-GP
RN6 RN5
1 8 BLT_BTN#_1 1 8
34 BT_BTN# 2 7 W IRELESS_BTN#_1 2 7
34 W IRELESS_BTN# 3 6 BACKUP_BTN#_1 3 6
34 BACKUP_BTN# 4 5 TP_LOCK_BTN#_1 4 5
34 TP_LOCK_BTN#
1

EC6 EC5 EC4 EC42


SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY DY DY DY SRN470J-3-GP SRN10KJ-6-GP
2

3D3V_AUX_S5

BT Button WLAN Button BK Button TP Button Power Button


1

BLT_BTN#_1 W IRELESS_BTN#_1 BACKUP_BTN#_1 TP_LOCK_BTN#_1 R8


A 10KR2J-3-GP JV71-MV DDR3 Madison A
BT_SW 1 W LAN_SW 1 BK_SW 1 TP_SW 1 PW R_SW 1
2

1 2 1 2 1 2 1 2 1 2 KBC_PW RBTN#_1 2 1 KBC_PW RBTN# 34


Wistron Corporation
1

5 5 5 5 5 R9
G1 470R2J-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3 4 3 4 3 4 3 4 3 4 GAP-OPEN 1 Taipei Hsien 221, Taiwan, R.O.C.
EC3
SW -TACT-5P-1-GP SW -TACT-5P-1-GP SW -TACT-5P-1-GP SW -TACT-5P-1-GP SW -TACT-5P-1-GP SC1KP50V2KX-1GP Title
2

62.40009.A61 62.40009.A61 62.40009.A61 62.40009.A61 62.40009.A61 DY


2nd = 62.40009.B21 2nd = 62.40009.B21 2nd = 62.40009.B21 2nd = 62.40009.B21 2nd = 62.40009.B21
LED&POWERBD CONN
Size Document Number Rev
-1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 37 of 62
5 4 3 2 1
Run Power
5V_S0 5V_S5

U28
DY 1 S D 8
C865 2 S D 7
1 2 3 S D 6
4 G D 5
DCBATOUT Q32 SCD1U25V3KX-GP
NDS0610-NL-GP RUN_POW ER_ON AO4468-GP
R549 84.04468.037
1 2 Z_12V S D 2nd =

K
1

1
3D3V_S0 10KR2J-3-GP 1
84.S0610.B31 R533 C864 R534 D33

G
3D3V_S0

SCD22U25V3KX-GP
3D3V_S5

10KR2J-3-GP
2 PDZ9D1B-GP

330KR2J-L1-GP
R547 2nd = 84.00610.C31 U60
R530 1 2 Z_12V_G3 83.9R103.C3F 1 S D 8

A
100R5J-3-GP 2nd = 83.9R103.F3F 2 S D 7

1
330KR2J-L1-GP S D
DY R548
3
G D
6
4 5

3D3V_runpwr 2
100KR2J-1-GP
AO4468-GP
Z_12V_D4 84.04468.037

2
2nd =
Q33
Q34 1D5V_S0 1D5V_S3
4 3

Z_12V_D3
2N7002-11-GP
DY S
U26
D
5 2 1 8
2 S D 7
G Z_12V_D3 6 1 3 S D 6
4 G D 5

S
2N7002KDW -GP
AO4468-GP
84.2N702.A3F
84.04468.037
2nd =

13,27,33,34,43,45,48,51 PM_SLP_S3#

3D3V_S5 U68 3D3V_VGA


M96 3D3V_S5
1 U72
B 1D5V_PW RGD 42
5 VCC S D
A 2 PM_SLP_S4# 13,34,42,44
7 SM_PW ROK 1 2 SM_PW ROK_R 4 AO3400-1-GP-U
Y
3 M96 84.03400.A37

G
GND
2

R753 12K1R2F-L1-GP
R865
74LVC1G08GW -1-GP
R754 73.01G08.L04 1 2 3D3V_M92_ON
10KR2J-3-GP M96

1
1

2MR2F-GP C1131
SC6800P25V2KX-1GP

2
1D05V_S0
SB1019
1

1D05V_S0 R258
2K2R2J-2-GP R755

DY 3D3V_VGA 2
0R5J-5-GP
1 3D3V_S0
2
2

Madison-Park
R257
,25,31,32,34,35 PLT_RST1#
56R2J-4-GP
C471
1
1

PM_THRMTRIP-A# 4,7,12 1 2
R256 DY SCD1U16V2ZY-2GP
B

20KR2F-L-GP
PD 1019
DY
E C
2

KBC_THERMALTRIP# 34
PLT_RST1#_B B Q17
Q18
1

R901 MMBT2222A-3-GP MMBT3904-3-GP


C
1

9K1R2F-1-GP
C472 84.02222.V11
SCD1U25V3KX-GP 2nd = 84.02222.R11
2

DY
2

JV71-MV DDR3 Madison


SB 1014
2
Wistron Corporation
83.00016.B11
3 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
RSMRST# 33,34
Taipei Hsien 221, Taiwan, R.O.C.
41 3V/5V_EN 1
BAS16-1-GP Title
D13 RUN POWER and 3D3V_AUX_S5
2nd = 83.00016.F11
Size Document Number Rev

JV71-MV DDR3 Madison -1


Date: W ednesday, October 28, 2009 Sheet 38 of 62
5 4 3 2 1

RT9018A 1D1V_S0
CPU_CORE ISL62392
ISL6266A 5V/3D3V 1D5V_S3 1D1V_S0 (2A)
VIN 1D1V(O)
VID Setting Output Signal Input Power Output Power
VID0
VID0(I / 3.3V) VGATE_PWRGD DCBATOUT_62392 5V_S5 (6A)
PGOOD VIN 5V(O) NVVDD_PGOOD CPUCORE_ON
D
VID1 EN PGOOD D
VID1(I / 3.3V)
VID2 Input Signal 3D3V_S5 (7A)
VID2(I / 3.3V) S5_ENABLE 3D3V(O)
EN0 RT9026
VID3 DDR_VREF_S3
VID3(I / 3.3V) 5V_AUX_S5 5V_S5
Output Power 5V(O) VIN
VID4 Output Signal
VID4(I / 3.3V) VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V 1D5V_S3 DDR_VREF_S3 (1.2A)
VCC_CORE_PWR(O) PGOOD 3D3V_AUX_S5 VLDOIN VTT
VID5 3D3V(O)
VID5(I / 3.3V)
PM_SLP_S4#
VID6 GFX_CORE S3 DDR_VREF_S3_1
VID6(I / 3.3V) VTTREF
ISL6263A S5
Input Signal
CPUCORE_ON VID Setting Output Signal
EN (I / 3.3V) VID0 CPUCORE_ON
VID0(I / 3.3V) PGOOD
C C
VID1
Voltage Sense VID1(I / 3.3V)
VCC_SENSE VID2
VSEN(I / Vcore) VID2(I / 3.3V)
VSS_SENSE VID3
RGND(I / Vcore) VID3(I / 3.3V)
VID4
VID4(I / 3.3V) RT8202A VGA_CORE
Input Power
Input Power Output Power DCBATOUT_8202_VGA VGA_CORE (13A)
DCBATOUT_6266A 5V_S0 VIN VOUT(O)
VCC(I) VDD
VCC_GFXCORE(7A)
5V_S0 DCBATOUT VGFXCORE (O)
VCC(I) VIN
3D3V_S0 NVVDD_PGOOD
3D3V_S0 EN PGOOD
VCC(I)
B Input Signal B
PM_SLP_S3#
VR_ON
GFXVR_EN Charger ISL88731A
TPS51124
1D5V/1D05V Output Signal
Voltage Sense AC_IN#
VCC_AXG_SENSE ACGOOD#
Input Power Output Power VSEN(I / Vcore)
5V_S5 AD_IA
VDD VSS_AXG_SENSE SRSET
1D5V_S3 (12A) RGND(I / Vcore)
DCBATOUT_51124 1D5V (O) Input Power Output Power
VCC BT+
AD+ VOUT (O)
Adapter
1D05V_S0 (9A) ACN DCBATOUT
Input Signal 1D05V(O) VOUT (O)
PM_SLP_S4# Input Signal Output Signal
EN1 AD_IN#
AD_OFF (I) (O) JV71-MV DDR3 Madison
PM_SLP_S3#
EN2
A A
Wistron Corporation
Input Power Output Power 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CPUCORE_ON Output Signal Taipei Hsien 221, Taiwan, R.O.C.
AD_JK AD+
PGOOD1 VCC(I) VCC(O) Title

PGOOD2 5V_AUX_S5 Power Sequence Logic


VCC(I) Size Document Number Rev
B
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 39 of 62
5 4 3 2 1
5 4 3 2 1

DCBATOUT_6266A
DCBATOUT DCBATOUT_6266A PM_DPRSLPVR 7,13
DCBATOUT_6266A
G50 DCBATOUT
G49 4,7,12 H_DPRSTP# CPUCORE_ON 33,43,45 Vcc_core

1
2 1

GAP-CLOSE-PW R-3-GP
2 1
3D3V_S0
R316
0R0402-PAD
Iomax=38A
G48
GAP-CLOSE-PW R-3-GP H_VID[6..0] 5
G47

2
DY C528 C530 C529 C531

10R3F-GP
2 1

499R2F-2-GP
2

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
2 1 84.08692.037 SCD1U50V3KX-GP

5
6
7
8
H_VID6

H_VID5

H_VID4

H_VID3

H_VID2

H_VID1

H_VID0
GAP-CLOSE-PW R-3-GP 2nd = 84.11903.C37
G46

1
1
GAP-CLOSE-PW R-3-GP U35 Id=35A

D
D
D
D
G45
2 1 TC11

R317 0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD
FDMS8692-GP
Qg=17~26nC

1
SE100U25VM-L1-GP
2 1

2
Rdson=11~14mohm

R315
D GAP-CLOSE-PW R-3-GP 65 D
G44

2
GAP-CLOSE-PW R-3-GP
G43

G
S
S
S
2 1

1
2 1

4
3
2
1
R318

R319

R320

R321

R322

R323

R324

R325
GAP-CLOSE-PW R-3-GP Cyntec 10*10*4

SCD1U10V2KX-4GP
1
GAP-CLOSE-PW R-3-GP C532 6266A_UGATE1
84.07672.037
DCR=1.05+-5%mohm, Irating=30A
2nd = 84.57N03.A37 Isat=60A

6266A_DPRSTP# 2

2
VCC_CORE

6266A_DPRSLPVR
79.10712.L02 68.R3610.20C
2ND = 79.10112.3JL L11 2nd = 68.R3610.20A

6266A_VR_ON
6266A_PHASE1 1 2
3D3V_S0 IND-D36UH-9-GP

6266A_3V3

6266A_D6

6266A_D5

6266A_D4

6266A_D3

6266A_D2

6266A_D1

6266A_D0

1
84.07672.037

5
6
7
8

5
6
7
8
2nd = 84.57N03.A37 TC1 TC2 TC3

D
D
D
D

D
D
D
D
Id=19.5A U6 U36

2
1

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
U37
Qg=21.5~33nC,

FDMS7672-GP

FDMS7672-GP
R326

49

48

47

46

45

44

43

42

41

40

39

38

37

2
1K91R2F-1-GP Rdson=5.5~6.7mohm 6266A_ LGATE1 65 65
1D05V_S0 G51

3V3

CLK_EN#

DPRSTP#

VID6

VID5

VID4

VID3

VID2

VID1

VID0
GND

DPRSLPVR

VR_ON

G
S
S
S

G
S
S
S
GAP-CLOSE G52

2
GAP-CLOSE
R327

4
3
2
1

4
3
2
1

1
1 36 6266A_BOOT1 1 2
13,33 VGATE_PW RGD PGOOD BOOT1
1

1R2J-GP 6266A_BOOT1_R
R329 1 R328 26266A_PSI# 2 35 6266A_UGATE1 1 79.33719.L01
4 H_PSI# PSI# UGATE1
68R2-GP 0R0402-PAD 2nd = 77.C3371.051
C5341 2 6266A_PMON_R 1 R330 2 6266A_PMON3 34 6266A_PHASE1 2 C535
4K99R2F-L-GP PMON PHASE1 SCD22U25V3KX-GP
2

C SCD1U25V3KX-GP 1 26266A_RBIAS4 RBIAS PGND1 33 79.33719.L01 C


R332 147KR2F-GP 2nd = 77.C3371.051
5 32 6266A_ LGATE1 6266A_VSUM 1 R357 2 3K65R2F-1-GP 6266A_ISEN1_P1_VCORE
4 CPU_PROCHOT#_R VR_TT# LGATE1 C541 79.33719.L01
1 R311 2 6266A_NTC_R 1 R331 2 6266A_NTC 6
NTC PVCC 31 5V_S0 1 2 6266A_ISEN1 1 R359 2 10KR2F-2-GP 2nd = 77.C3371.051
NTC-470K-8-GP 4K02R2F-GP
C540 C543 1 26266A_SOFT 7 30 6266A_LGATE2 SC2D2U16V3KX-GP
Close to Phase 1 choke 1 2 SCD015U50V3KX-GP SOFT LGATE2 6266A_VO 1 R356 2 1R2F-GP 6266A_ISEN2_P1_VCORE
6266A_VO 1 R336 26266A_OCSET 8 OCSET 29
and on the same layer SCD01U25V2KX-3GP 10K5R2F-GP PGND2 6266A_ISEN2 1 R358 2 9K09R2F-GP
C545 1 2SC1000P50V3JN-GP-U 6266A_VW 9 28 6266A_PHASE2 DCBATOUT_6266A
VW PHASE2 2
C544
R337 1 2 6266A_COMP
10 27 6266A_UGATE2 SCD22U25V3KX-GP
COMP UGATE2 R339 1
10K5R2F-GP
C550
6266A_FB 11 26 6266A_BOOT2 2 16266A_BOOT2_R
FB BOOT2 1R2J-GP
1 2

2
6266A_FB2 12 25 C604 DY C588 C597 C567
FB2 NC#25

5
6
7
8

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
SC100P50V2JN-3GP SCD1U50V3KX-GP
C549
DROOP

U39

D
D
D
D

1
1

VDIFF

ISEN2

ISEN1
VSUM
VSEN

1 R340 2 6266A_COMP_R 1 2 FDMS8692-GP Id=35A

GND

VDD
RTN

DFB

VIN
VO
97K6R2F-GP R341
SC270P50V2KX-1GP 1KR2F-3-GP 65 Qg=17~26nC
ISL6266AHRZ-GP Rdson=11~14mohm
6266A_VDIFF13

6266A_VSEN14

6266A_RTN 15

16

6266A_DFB 17

18

6266A_VSUM 19

6266A_VIN 20

21

6266A_VDD 22

6266A_ISEN223

24
16266A_DROOP

G
S
S
S
C585 84.08692.037
2

74.06266.073 2nd = 84.11903.C37

4
3
2
1
1 R343 2 6266A_FB2_R 1 2 6266A_ISEN1 C5951 26266A_VO
100R2F-L1-GP-U R354 Cyntec 10*10*4
6266A_VO
1

SC2200P50V2KX-2GP SCD22U10V2KX-1GP
C5941 2
DCR=1.05+-5%mohm, Irating=30A
1KR2F-3-GP

B B
R346
DCBATOUT 6266A_UGATE2 Isat=60A
3K16R2F-GP

R344 SCD22U10V2KX-1GP 84.07672.037 68.R3610.20C VCC_CORE


L17
1 2 5V_S0 2nd = 84.57N03.A37 2nd = 68.R3610.20A
2

1KR2F-3-GP 6266A_PHASE2
10R3F-GP

1 2
R351 IND-D36UH-9-GP
2

1 R345 2
SC330P50V2KX-3GP

1
10R2F-L-GP 6266A_LGATE2
1

5
6
7
8

5
6
7
8
C584 TC4 TC5
2

D
D
D
D

D
D
D
D

SE330U2VDM-L-GP
SC180P50V2JN-1GP

C556 U7 U38

2
1

SE330U2VDM-L-GP
C574 C576
2

FDMS7672-GP

FDMS7672-GP
SC1U25V3KX-1-GP
SCD01U25V2KX-3GP

84.07672.037 65 65
2

2
Id=19.5A 2nd = 84.57N03.A37
1

G
S
S
S

G
S
S
S
C590 G53
5 VCC_SENSE 1 R352 2
Qg=21.5~33nC, GAP-CLOSE
SCD33U10V3KX-3GP

4
3
2
1

4
3
2
1
0R0402-PAD Rdson=5.5~6.7mohm G54
2
1

GAP-CLOSE 79.33719.L01

1
C564 2nd = 77.C3371.051
SC330P50V2KX-3GP 79.33719.L01
2

5 VSS_SENSE 1 R353 2 2nd = 77.C3371.051


0R0402-PAD R333
1 2
1

C557 0R0402-PAD 6266A_VSUM 1 R360 2 3K65R2F-1-GP 6266A_ISEN2_P2_VCORE


SCD01U25V2KX-3GP
2

6266A_ISEN2 1 R361 2 10KR2F-2-GP

6266A_VSUM
A 6266A_VO 1 R363 2 1R2F-GP 6266A_ISEN1_P2_VCORE
JV71-MV DDR3 Madison A
1

R355 6266A_ISEN1 1 R362 2 10KR2F-2-GP


1

C575 C586 2K61R2F-1-GP


R342 Wistron Corporation
SCD22U50V3ZY-1GP

SCD1U25V3KX-GP

11KR2F-L-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

Taipei Hsien 221, Taiwan, R.O.C.


6266A_VSUM_R_VO
20081009
2

Title
R310 Close to Phase 1 choke
NTC-10K-26-GP
and on the same layer
ISL6266A_CPU_CORE
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
2

6266A_VO
Date: W ednesday, October 28, 2009 Sheet 40 of 62
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_62392_3D3V DCBATOUT DCBATOUT_62392_5V


5V_PW R 5V_S5
G118 G134 G133 3D3V_PW R 3D3V_S5
R544
2 1 2 1 2 1 38 3V/5V_EN 1 2
G125
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP 2KR2F-3-GP 2 1
G119 G136 G135
R5321 0R2J-2-GP
2 3V/5V_EN1
34,50 S5_ENABLE GAP-CLOSE-PW R-3-GP
2 1 2 1 2 1
G126
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP R5451 0R2J-2-GP
2 3V/5V_EN2 2 1
G120 G138 G137
D D
2 1 2 1 2 1 GAP-CLOSE-PW R-3-GP

1
G127
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP R541 2 1
G121 G140 G139
100KR2J-1-GP
2 1 2 1 2 1 GAP-CLOSE-PW R-3-GP
G128

2
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP 2 1
G122
2 1 GAP-CLOSE-PW R-3-GP
G130
GAP-CLOSE-PW R-3-GP 2 1
G123
DCBATOUT_62392_3D3V DCBATOUT_62392_3D3V DCBATOUT_62392_5V
2 1 GAP-CLOSE-PW R-3-GP
G131
GAP-CLOSE-PW R-3-GP 2 1
G124
DY C838 C847
1

1
2 1 C854 C850 C851 C857 C856 C853 GAP-CLOSE-PW R-3-GP
SCD01U50V2KX-1GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SCD01U50V2KX-1GP
G132
GAP-CLOSE-PW R-3-GP DY 2 1
2

2
DY 84.04800.D37
Id=7A 2nd = 84.08884.037 GAP-CLOSE-PW R-3-GP

8
7
6
5

5
6
7
8
Qg=8.7~13nC

D
D
D
D
U64 Id=7A U63

D
D
D
D
Iomax=7A SI4800BDY-T1-GP Rdson=23~30mohm Qg=8.7~13nC SI4800BDY-T1-GP

Rdson=23~30mohm Iomax=7A
OCP>10.5A 65 84.04800.D37 65
Cyntec 7*7*3 2nd = 84.08884.037 Cyntec 7*7*3 OCP>10.5A

17
S U62
S
S
G
DCR=30mohm, Irating=6A DCR=30mohm, Irating=6A

G
S
S
S
C C852 C848 C

VIN
1
2
3
4

4
3
2
1
3D3V_PW R Isat=13.5A 1 262392_BOOT1_R 1 R522 262392_BOOT1 14 21 62392_BOOT2 1 R521 262392_BOOT2_R 1 2 Isat=13.5A 5V_PW R
2D2R2F-GP 62392_UGATE1 13 BOOT1 BOOT2 62392_UGATE2 2D2R2F-GP
UGATE1 UGATE2 22
L28 SCD22U25V3KX-GP SCD22U25V3KX-GP L27
2 1 62392_PHASE1 12 23 62392_PHASE2 1 2
IND-3D3UH-57GP PHASE1 PHASE2 IND-3D3UH-57GP
68.3R310.20A 62392_LGATE1 15 20 62392_LGATE2 68.3R310.20A
LGATE1 LGATE2
8
7
6
5

5
6
7
8
2nd = 68.3R31A.10V 2nd = 68.3R31A.10V
D
D
D
D

TC30 C836 U59 U58 C839 TC29

D
D
D
D
SI4812BDY-T1-E3-GP

SI4812BDY-T1-E3-GP
C863 62392_OCSET1 10 25 62392_OCSET2 C860
OCSET1 OCSET2
1

1
ST220U6D3VDM-15GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST220U6D3VDM-15GP
1 R528 1 2 2 62392_ISEN1 9 ISEN1 ISEN2 26 62392_ISEN2 1 R525 2 1 2
36K5R2F-GP 65 8 27 65 36K5R2F-GP
SC4700P50V2KX-1GP VOUT1 VOUT2 SC4700P50V2KX-1GP
2

2
84.04812.A37 62392_FB1 7 28 62392_FB2 84.04812.A37 77.C2271.00L
S
S
S
G

G
S
S
S
FB1 FB2
2

2
2nd = 84.06690.E37 2nd = 84.06690.E37 2nd = 77.22271.27L
1
2
3
4

4
3
2
1
R531 16 1 R529
LDO3 PGOOD
36K5R2F-GP

36K5R2F-GP
Id=7.7A 11 3V/5V_EN1 Id=7.7A
EN1 3V/5V_EN2
24
Qg=8.5~13nC Qg=8.5~13nC
1

1
EN2
18 PVCC LDO3EN 5
77.C2271.00L Rdson=16.5~21mohm 62392_VCC 4 VCC FCCM 3 62392_FCCM Rdson=16.5~21mohm
2nd = 77.22271.27L 6 62392_FSET1
FSET1 62392_FSET2
19 2

GND
PGND FSET2
1

1
29
C870 ISL62392HRTZ-T-GP C866
1

1
SC2200P50V2KX-2GP 74.62392.073 SC2200P50V2KX-2GP
2

2
R539 3D3V_AUX_S5 SB 1007 R537
B 68K1R2F-1-GP B
47KR2F-GP

3V/5V_PW RGD 13
5V_AUX_S5
1

62392_FB2_R C845 1 R542 2 62392_FB1_R


2

2
1

1
SC4D7U10V3KX-GP

C842 0R2J-2-GP
R540 DY SB 1202 1222 62392_VCC R536
SC4D7U10V3KX-GP
2

750R2F-GP 750R2F-GP
2

2
1

C869 R552
2

2
SC1U25V3KX-1-GP 0R0402-PAD
2
1

1
20081022
1
R538 R535
10KR2F-2-GP 9K09R2F-GP

1 R553 2
2

2
0R0402-PAD

1
C868
SCD01U50V2KX-1GP R546 C867 R543

SCD01U50V2KX-1GP
2 19K6R2F-GP 24K3R2F-1-GP

2
Polymer

2
Polymer 220uF,6.3V,25mohm,Iripple=2.236A
220uF,6.3V,25mohm,Iripple=2.236A OS-CON
OS-CON 220uF,6.3V,10mohm,Iripple=3.9A
220uF,6.3V,10mohm,Iripple=3.9A
JV71-MV DDR3 Madison
A A

Vout=0.6*(1+R1/R2) Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL62392 5V/3D3V
Size Document Number Rev
Custom -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 41 of 62

5 4 3 2 1
5 4 3 2 1

1D5V_PW R 1D5V_S3 1D5V_PW R 1D5V_S3

DCBATOUT DCBATOUT_51117_1D5V G170 G171

G172 2 1 2 1

2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP


G173 G174
GAP-CLOSE-PW R-3-GP 2 1 2 1
G175
D 2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP D
G176 G177
GAP-CLOSE-PW R-3-GP 2 1 2 1
1 G178
2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G179 G180
TC34
GAP-CLOSE-PW R-3-GP
ST15U25VDM-1-GP
G181 2 1 2 1
2

2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP


G182 G183
GAP-CLOSE-PW R-3-GP 2 1 2 1
G184
2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G185 G186
GAP-CLOSE-PW R-3-GP 2 1 2 1
G187
77.21561.00L
2ND = 2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G188 G189
GAP-CLOSE-PW R-3-GP 2 1 2 1
G190
2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G191 G192
GAP-CLOSE-PW R-3-GP 2 1 2 1
G193
2 1 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G194 G195
GAP-CLOSE-PW R-3-GP 2 1 2 1

GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP


C
G196 G197 C
2 1 2 1

GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP


G198 G199
DCBATOUT_51117_1D5V 2 1 2 1

5V_S5 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP


G200 G201
2 1 2 1
C1133 C1134 C1135

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
2

C1132 Id=10.5A
R867
Qg=8~11nC,

2
300R3-GP
SC1U10V2KX-1GP
1

5
6
7
8
Rdson=10.5~14mohm
U73

D
D
D
D
2

51117A_1D5V_V5FILT FDMS8692-GP
R868
1

65 Mag. 0.56uH
5V_S5 C1136 2 1 51117A_1D5V_LL1 2 1 84.08692.037
SC1U10V2KX-1GP DCR=1.6~1.8mohm Iomax=22A

G
S
S
S
C1137 SCD1U16V2KX-3GP
2

0R3J-0-U-GP
Idc=25A, Isat=40A OCP>33A

4
3
2
1
1

D35 U74
CH551H-30PT-GP 4 13 51117A_1D5V_DRVH
V5FILT DRVH 51117A_1D5V_DRVL L58 1D5V_PW R
83.R5003.C8F 10 V5DRV DRVL 9 Vout=1.5
2nd = 83.R5003.H8H IND-D56UH-27-GP
2

51117A_1D5V_VFB 5 12 51117A_1D5V_LL 1 2
B 51117A_1D5V_VBST VFB LL B
14

SCD1U10V2KX-4GP
SC33P50V2JN-3GP
VBST

C1138

C1139
VOUT 3 1D5V_PW R 68.R5610.10P

1
6 TPS51117_1D5V_PGOOD R872 TC36 TC35
PGOOD

5
6
7
8

5
6
7
8
13,34,38,44 PM_SLP_S4# 1KR2J-1-GP1 2 R869 51117A_1D5V_EN 1 7 30KR2F-GP
EN_PSV GND

D
D
D
D

D
D
D
D

SE330U2VDM-L-GP

SE330U2VDM-L-GP
249KR2F-GP1 2 R870 51117A_1D5V__TON 2 8 U75 U76

2
51117A_1D5V_TRIP 11 TON PGND
15

FDMS7672-GP

FDMS7672-GP

2
TRIP GND 3D3V_S5 51117A_1D5V_VFB
TPS51117RGYR-GP 65 65
1

1
G
S
S
S

G
S
S
S
R873
1

9K31R3F-GP R874

4
3
2
1

4
3
2
1
R888 84.07672.037 30KR2F-GP
84.07672.037
2

10KR2J-3-GP

2
2

R871

38 1D5V_PW RGD 2 1

0R2J-2-GP
Panasonic 330uF, 2.5V
Id=15A ESR:9mohm
1

C1156 Qg=15~21nC, Iripple:3A


SC100P50V2JN-3GP
DY
Rdson=5.2~6.9mohm
2

JV71-MV DDR3 Madison


A
Vout=0.75V*(R1+R2)/R2 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51117_1D5V
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 42 of 62

5 4 3 2 1
5 4 3 2 1

D D

DCBATOUT DCBATOUT_51117_1D05V
G202
1 2 1D05V_PW R 1D05V_S0
G204
GAP-CLOSE-PW R-3-GP
G203
1 2
1 2
GAP-CLOSE-PW R-3-GP
G206
GAP-CLOSE-PW R-3-GP
G205
1 2
1

1 2
TC37 GAP-CLOSE-PW R-3-GP
G208
GAP-CLOSE-PW R-3-GP
ST15U25VDM-1-GP

G207
2

DY 1 2
1 2
GAP-CLOSE-PW R-3-GP
G209
GAP-CLOSE-PW R-3-GP
1 2

GAP-CLOSE-PW R-3-GP
DCBATOUT_51117_1D05V G210
1 2
5V_S5
C GAP-CLOSE-PW R-3-GP C
G211
C1141 C1142 C1143 1 2

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
2

C1140 GAP-CLOSE-PW R-3-GP


G212
R875

2
300R3-GP 1 2
SC1U10V2KX-1GP
1

5
6
7
8
U77 GAP-CLOSE-PW R-3-GP

D
D
D
D
G213
2

FDMS8692-GP
R876 84.08692.037 1 2
1

C1144 65
SC1U10V2KX-1GP

2 1 51117A_1D05V_LL1 2 1 Id=10.5A GAP-CLOSE-PW R-3-GP


Iomax=10A G214

G
S
S
S
5V_S5 C1145 SCD1U16V2KX-3GP Mag.1.0uH
Qg=8~11nC,
2

0R3J-0-U-GP
DCR=2.9~3.3mohm OCP>15A 1 2

4
3
2
1
Rdson=10.5~14mohm
1

U78 Idc=18A, Isat=36A GAP-CLOSE-PW R-3-GP


G215
D36 51117A_1D05V_V5FILT 4 13 51117A_1D05V_DRVH 1D05V_PW R
V5FILT DRVH 51117A_1D05V_DRVL
CH551H-30PT-GP 10 V5DRV DRVL 9 L59 1 2
68.1R01B.10J
51117A_1D05V_VFB 5 12 51117A_1D05V_LL 1 2 GAP-CLOSE-PW R-3-GP
G216
2

51117A_1D05V_VBST 14 VFB LL
VBST

C1146

C1147
3 1D05V_PW R TC38 1 2
VOUT IND-1UH-93-GP

1
SC33P50V2JN-3GP

SCD1U10V2KX-4GP

SE330U2VDM-L-GP
6 51117A_1D05V_PGOOD
PGOOD

5
6
7
8
1KR2J-1-GP 1 2 R877 51117A_1D05V_EN 1 7 3D3V_S5 R878 GAP-CLOSE-PW R-3-GP
,34,38,45,48,51 PM_SLP_S3# EN_PSV GND G217

D
D
D
D
1 2 R880 51117A_1D05V_TON2 8 U79 30KR2F-GP

2
249KR2F-GP 51117A_1D05V_TRIP TON PGND FDMS7672-GP
11 15 DY 1 2

2
TRIP GND
84.07672.037
1
TPS51117RGYR-GP 65 51117A_1D05V_VFB GAP-CLOSE-PW R-3-GP
1

B R889 B

G
S
S
S
R881
7K32R3F-GP 10KR2J-3-GP

4
3
2
1

1
2

1
R882 DY Panasonic 330uF, 2.5V
R879
2

75KR2F-GP C1170
2 1
ESR:9mohm
SC18P50V2JN-1-GP

2
33,40,45 CPUCORE_ON
Iripple:3A

2
0R2J-2-GP
Id=15A SB 1015
1

C1157 Qg=15~21nC,
SC100P50V2JN-3GP
DY Vout=0.75V*(R1+R2)/R2
Rdson=5.2~6.9mohm
2

A JV71-MV DDR3 Madison A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51117_1D05V
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 43 of 62
5 4 3 2 1
5 4 3 2 1

D D

5V_S5 1D5V_S3 Iomax=1.2A


OCP>2A
C C

2
DDR_VREF_PWR DDR_VREF_S3

1
C803 DY C806 G114
C808 SC10U10V5KX-2GP SCD1U10V2KX-4GP 1 2

1
SC1U10V2KX-1GP

2
GAP-CLOSE-PWR
G115
U54 1 2

10 1 GAP-CLOSE-PWR
0R0402-PAD 2 R499 1 9026_S5 VIN VDDQSNS G116
13,34,38,42 PM_SLP_S4# 9 S5 VLDOIN 2
8 GND VTT 3 1 2
0R0402-PAD 2 R501 1 9026_S3 7 4
S3 PGND GAP-CLOSE-PWR
DDR_VREF_S3_1 6 VTTREF VTTSNS 5

GND
1

1
C816
SC1U10V2KX-1GP RT9026PFP-GP C813 C817
2

11
SC10U10V5KX-2GP SC10U10V5KX-2GP

2
B B

JV71-MV DDR3 Madison

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

0D75V
Size Document Number Rev
A4 -1
Date:
JV71-MV DDR3
Wednesday, October 28, 2009
Madison
Sheet 44 of 62
5 4 3 2 1
5 4 3 2 1

DCBATOUT_6263A DCBATOUT G85 0R3J-0-U-GP


G68 1 2
NO GFX
2 1
G91 0R3J-0-U-GP
GAP-CLOSE-PWR-3-GP C190 GFX 1 2
G69 VGFXCORE VCC_GFXCORE
1 R157 2 POWER_MONITOR 1 2 NO GFX
7 GFXVR_EN
2 1 0R0402-PAD
G86

1
SCD01U50V2KX-1GP GFX_VID[4..0] 7 1D05V_S0 G88 0R3J-0-U-GP VCC_GFXCORE
GAP-CLOSE-PWR-3-GP R165 1 2 2 1
G70
10KR2J-3-GP NO GFX
2 1 13,27,33,34,38,43,48,51 PM_SLP_S3# 1 DY 2 R160 GFX GAP-CLOSE-PWR-3-GP
G87
0R2J-2-GP G94 0R3J-0-U-GP

2
GAP-CLOSE-PWR-3-GP 6236A_VID4 1 R166 2 GFX_VID4 1 2 2 1
G71
D 0R0402-PAD NO GFX D

1
2 1 6236A_VID3 1 R174 2 GFX_VID3 GAP-CLOSE-PWR-3-GP
G89
TC16 1 DY 2 R150 0R0402-PAD
GAP-CLOSE-PWR-3-GP GFX 0R2J-2-GP 6236A_VID2 1 R176 GFX_VID2

SE100U25VM-L1-GP
2 2 1

2
G72
79.10712.L02 0R0402-PAD
2 1 2ND = 79.10112.3JL 6236A_VID1 1 R184 2 GFX_VID1 GAP-CLOSE-PWR-3-GP
G90
1 R154 2 0R0402-PAD
3D3V_S0 6236A_VID0 1 R180 GFX_VID0
GAP-CLOSE-PWR-3-GP 10KR2F-2-GP 2 2 1
G73
0R0402-PAD
2 1
GFX GAP-CLOSE-PWR-3-GP
G92
3D3V_S0 1 R139 2
GAP-CLOSE-PWR-3-GP 1K91R2F-1-GP 2 1
GFX GAP-CLOSE-PWR-3-GP
5V_S5 5V_S0 G93
33,40,43 CPUCORE_ON 1 DY 2 R149

6236A_VR_ON
6236A_AF_EN
0R2J-2-GP

6236A_GOOD

6236A_PMON
2 1

1
GAP-CLOSE-PWR-3-GP
DCBATOUT_6263A G95
R177 R187
0R2J-2-GP 0R0402-PAD 2 1
DY GAP-CLOSE-PWR-3-GP
GFX GFX DY

2
G96

2
C873 C656 C653

33

32

31

30

29

28

27

26

25

SC33P50V2JN-3GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
U15 C659 2 1
SCD1U50V3KX-GP

FDE

VID4

VID3

VID2
GND_T

PGOOD

AF_EN

VR_ON

PMON

1
5
6
7
8
150KR2F-L-GPGFX 65 GFX GAP-CLOSE-PWR-3-GP
G99

D
D
D
D
U44
R1441 2 6236A_RBIAS 1 24 FDS8884-GP
VGFXCORE Iomax=6A 2 1
RBIAS VID1
OCP>9A
R145
C1401 2GFX 6236A_SOFT 2 23 GFX 84.08884.037 GAP-CLOSE-PWR-3-GP
SCD01U50V2KX-1GP SOFT VID0
Cyntec 7*7*3

G
S
S
S
6263A_VCC_PRM 1 2 6236A_OCSET 3 22 6236A_PVCC C232 Id=7A
C139 OCSET PVCC DCR=8mohm, Irating=13A

2
6K65R2F-GP

4
3
2
1
C147
GFX 1 2 GFX 6236A_VW 4 21 6236A_LGATE SC2D2U10V3KX-1GP Qg=8.7~13nC Isat=24A
VW LGATE
1 2 Rdson=23~30mohm
GFX SC1KP50V2KX-1GP 6236A_COMP 5 20
SC68P50V2JN-1GP COMP PGND
1 R133 2 L23
C130 6K98R3F-GP 6 19 6236A_PHASE 1 2
FB PHASE VGFXCORE
1 R135 2 6236A_COMP_R 1 2 GFX 6236A_FB COIL-1UH-34-GP-U
374KR3-GP 7 18 6236A_UGATE GFX
SC180P50V2JN-1GP VDIFF UGATE
GFX
68.1R01A.20B
DROOP
C GFX 8 17 6236A_BOOT
1 2 1 2 C
VSEN

VSUM
BOOT

6236A_BOOT_R
R181

VDD
RTN

DFB

VSS
VIN
VO
2D2R3J-2-GP C224

5
6
7
8
R1461 22K21R3F-L-GP 6236A_VDIFF SCD22U16V3KX-2-GP 65
GFX

D
D
D
D
GFX U43
GFX
9

10

11

12

13

14

15

16
C143 ISL6263ACRZ-T-GP FDS6690AS-GP
1 R137
2 6236A_FB_R 6236A_VSEN
6236A_DROOP

1
1

GFX 4K99R2F-L-GP
2

84.06690.E37
6236A_VSUM
6263A_VCC_PRM
6236A_DFB

SC560P50V2KX-2GP 6236A_VIN G83 G84


R185

6236A_VDD

G
S
S
S
GFX 6236A_RTN GAP-CLOSE-PWR GAP-CLOSE-PWR
1 2 5V_S0

4
3
2
1

2
GFX
10R2F-L-GP
GFX
R186
C226 Id=7.7A
1 2 1 2 5V_S5
C157 Qg=8.5~13nC
1 2 SC1U16V3KX-2GP 10R2F-L-GP Rdson=16.5~21mohm
2

DY
1

SC1KP50V2KX-1GP GFX
C146 C170 R158
GFX R171
SC1KP50V2KX-1GP GFX SC1KP50V2KX-1GP 1 2
2K55R2F-GP

DCBATOUT
2

DY DY
1

10R2F-L-GP
1

1 R134 2

1
C185 C214 GFX 0R0402-PAD TC20
1

GFX SCD01U25V2KX-3GP
SC330P50V2KX-3GP

SE220U2VDM-8GP

2
1

GFX
2

G3 GAP-CLOSE-PWR R163 GFX


9 VCC_AXG_SENSE 1 2 GFX 1KR3F-GP
2

R175
G4 GAP-CLOSE-PWR C189
9 VSS_AXG_SENSE 1 2 1 2 GFX 1 2 6236A_VSUM_R
1

C194 GFX SCD033U25V3KX-GP


C208 7K68R2F-GP
SCD1U25V3KX-GP

1 2 GFX
2
1

1
B B
R143 R142 GFX G97 G98
10R3F-GP 10R3F-GP SCD022U25V2KX-GP GAP-OPEN-PWR GAP-OPEN-PWR
1 R170 2GFX

2
2

4K53R2F-1-GP 6236A_VSUM_R_VCC_PRM
GFX
GFX GFX Close to choke 1 R164 2 1 R169 2
3K57R2F-GP
and on the same layer NTC-10K-9-GP
GFX

Parallel
VSS_AXG_SENSE_OUTCAP

VCC_AXG_SENSE_OUTCAP

A A

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6263A_GFX CORE
Size Document Number Rev
Custom -1
JV71-MV DDR3 Madison
Date: Wednesday, October 28, 2009 Sheet 45 of 62
5 4 3 2 1
5 4 3 2 1

84.04407.F37
2nd = 84.04433.A37
84.04407.F37
AD+ 2nd = 84.04433.A37
U30 AD+_TO_SYS DCBATOUT
8 D S 1 BT+
7 D S 2 R291 U34
6 D S 3 1 2 1 S D 8
D 5 D G 4 AD+_G 2 S D 7 D
AD+

SCD1U25V3KX-GP
D01R2512F-4-GP 3 S D 6

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP
2

2
G D

C522
AO4407A-GP R289 R288 4 5

1
G34

G35
AD+_G_1 1 2 1 2
AO4407A-GP
10KR2J-3-GP 100KR2J-1-GP

1ISL88731_CSSP_R 1

2
1
R308

3
470KR2J-2-GP

1ISL88731_CSSN

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP
Q22

1
2N7002KDW -GP 84.2N702.A3F

2
6

G42

G41

G40

G39
2

2
2 R290 1 AD+_G_2
10KR2F-2-GP R306

SCD1U25V3KX-GP
10R2J-2-GP R305
ISL88731_ACOK 10R2J-2-GP
D16

2
1
A K ISL88731_DCIN C520 C513

2
SCD1U25V3KX-GP 1 2

1
CH521S-30PT-GP-U C503 C519

ISL88731_CSSP
2
1

SC1U25V5KX-1GP SCD047U25V3KX-GP
CHRG_IN

1
R307 U31 CHG_AGND C509

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3KX-GP
215KR3F-1-GP CHG_AGND SC1U10V3KX-4GP

C521

C512

C517
NC#1
2

5
6
7
8

1
22 28 R299
DCIN CSSP 4D7R3F-L-GP U33

D
D
D
D
C ISL88731_ACIN 2 2 CHG_AGND SI4800BDY-T1-GP C

2
ACIN ISL88731_CSSN_R
27
SCD01U50V2KX-1GP

2
CSSN
1

11 26 ISL88731_VCC 3 D15 65 84.04800.D37


5V_S5 VDDSMB VCC DY
1

C514

R304 R298 2nd = 84.08884.037


1

49K9R2F-L-GP C507 0R3J-0-U-GP 1

G
S
S
S
SCD1U10V2KX-4GP 25 ISL88731_BST 1 2ISL88731_BST1 C505
2

4
3
2
1
BOOT ISL88731_LDO BAT54PT-GP
21 1 2
2

ISL88731_ACOK VDDP
13 ACOK ISL88731_DHI SC1U10V3KX-4GP
CHG_AGND 24 BT+_R
CHG_AGND UGATE
34,47 BAT_SCL 10 SCL 1 2 L10
C506 R302
23 ISL88731_LX SCD1U50V3KX-GP ISL88731_LX 1 2 1 2
PHASE
9 IND-10UH-119-GP D01R2512F-4-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
K
34,47 BAT_SDA SDA ISL88731_DLO
20

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP
LGATE

C10
C508

C511
68.1001B.10S D37

5
6
7
8

1
G38

G37
2nd = 68.1001B.10R SMF18AT1G-GP
14 19 U32

D
D
D
D
NC#14 PGND SI4800BDY-T1-GP
R293 10R2F-L-GP

A
18 ISL88731_CSIP_R 1 2
CHG_AGND CSOP
65 84.04800.D37

1
17 C504 2nd = 84.08884.037

ISL88731_CSIP
ISL88731_IINP CSON SCD22U50V3ZY-1GP
1 2 8 83.SMF18.0AH

G
S
S
S
34 AD_IA ICM
2nd = 83.SMF18.AAH

4
3
2
1
R300 1KR2F-3-GP ISL88731_CSIN
SCD01U16V2KX-3GP

1ISL88731_CCV1

R303
1 2 ISL88731_CCV 6
SB1016
B 10KR2F-2-GP VCOMP B
5 NC#5 NC#16 16
C510

ISL88731_CCS 4
SCD01U50V2KX-1GP

ICOMP
C516

ISL88731_VREF 3 VREF
1

7 R295
SC1U10V3KX-3GP
SCD015U25V2KX-GP

NC#7 PBATT_SENSE_R
12 15 1 2
GND

GND VFB BATT_SENSE 47


1

1
C515

C518

100R2J-2-GP
2

29

ISL88731AHRZ-T-GP
DY
1 2
G36 3D3V_AUX_S5
GAP-CLOSE-PW R-2U-GP

1
CHG_AGND
R296
10KR2F-2-GP

ISL88731_LDO

2
34 AC_IN#

1
R297
10KR2F-2-GP
D

Q23

2
2N7002-11-GP
G ISL88731_ACOK_L 1 R292 2 ISL88731_ACOK
A 84.27002.W31 1 0R0402-PAD JV71-MV DDR3 Madison A
2ND = 84.27002.N31
S

R294
15K8R3F-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL88731A_Charger
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 46 of 62
5 4 3 2 1
A B C D E

Adaptor in to generate DCBATOUT AD+

DCIN1 AD_JK
4 U29
1 1 S D 8
2 2 S D 7

K
3 3 S D 6

1
4 EC28 C501 D14 AD+_2 4 G D 5 4

K
SCD1U50V3KX-GP
D31

SCD1U50V3ZY-GP
5
6 P6SBMJ24APT-GP AO4407A-GP

2
83.P6SBM.AAG

A
NP1 P6SBMJ24APT-GP 2nd = 83.P6SMB.AAG R287 C500

1
83.P6SBM.AAG 200KR2F-L-GP SC1U50V5ZY-1-GP 2nd = 84.04407.F37 84.04433.A37

A
DC-JACK174-GP 2nd = 83.P6SMB.AAG
22.10037.I01 Q21

2
R2
E
AD_OFF#_JK B R1
2ND = C

1
PDTA124EU-1-GP
Q20 84.00124.K1K R286
C 100KR2J-1-GP
R1 2nd = 84.00124.T1K
34 AD_OFF B
E

2
R2

PDTC124EU-1-GP
3 84.00124.H1K 3

2nd = 84.00124.S1K

BATTERY CONNECTOR

2 2
RN9
SRN33J-7-GP BAT1

4 5 BATA_SDA_1 3 1
34,46 BAT_SDA SCL GND
3 6 BATA_SCL_1 4 2
34,46 BAT_SCL SDA GND
34 BAT_IN# 2 7 BAT_IN#_1 5 8
BAT_IN# GND
1 8 6 BT+#6 GND 9
7 BT+#7
BT+
1

1
MLVS0402M04-GP

MLVS0402M04-GP

MLVS0402M04-GP

EC9 EC8 ALP-CON7-2-GP-U


1

SC10P50V2JN-4GP
EL3 EL1 EL2
1

DY DY DY DY DY DY 20.81017.007
K

SC10P50V2JN-4GP
D1 EC31 EC32 EC30 EC10
2

2
SCD1U50V3ZY-GP

SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U
SCD1U50V3ZY-GP

2nd = 20.81025.007
2

JV71-MV DDR3 Madison


2

MM3Z5V6T1G-GP
A

1 83.5R603.E3F
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2nd = 83.5R603.D3F Taipei Hsien 221, Taiwan, R.O.C.
R301
Title
46 BATT_SENSE 1 2
0R0402-PAD
AD/BATT CONN
Size Document Number Rev
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 47 of 62
A B C D E
5 4 3 2 1

DCBATOUT DCBATOUT_8202_VGA
G218
1 2

GAP-CLOSE-PW R-3-GP
G219
1 2

GAP-CLOSE-PW R-3-GP
5V_S5 Iomax=22A G220

OCP>33A 1 2

1
1
D TC17 GAP-CLOSE-PW R-3-GP D
G221
R426 Id=23A

ST15U25VDM-1-GP
2
DIS 10R2F-L-GP DIS 1 2
5V_S5 Qg=7.2nC,
Rdson=11.1~13.9mohm DCBATOUT_8202_VGA GAP-CLOSE-PW R-3-GP
G222

2
83.00521.01F

1
D25 2nd = 83.R2003.F8F 1 2

RT8202_VDD_VGA DIS CH521S-30-GP-U1 DIS DIS DIS DIS GAP-CLOSE-PW R-3-GP


G223
C655 C652 C665 C649

5
6
7
8

1
C711 65 1 2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP
U41

RT8202_BST_VGA

D
D
D
D
SC1U10V3KX-4GP
3D3V_S0 DCBATOUT_8202_VGA FDMS8692-GP Mag. 0.56uH GAP-CLOSE-PW R-3-GP
G224

2
1 R418 2 RT8202_TON_VGA 5V_S5 84.08692.037
DCR=1.6~1.8mohm 1 2
1MR2F-GP DIS Irating=25A,Isat=40A
1

G
S
S
S
C696 GAP-CLOSE-PW R-3-GP
R422 DIS SC1KP50V2KX-1GP
G225
SB 1019

4
3
2
1
1
DIS 10KR2F-2-GP C685 1 2

2
R420 SC1U10V3KX-4GP
RT8202_DH_VGA L19 VGA_CORE GAP-CLOSE-PW R-3-GP
2

2
2 1 DIS C668 IND-D36UH-9-GP
51 VGACORE_PW ROK

9
U45 1 2RT8202_LX_VGA RT8202_LX_VGA 1 2
1

0R0402-PAD-1-GP DIS DIS

VDD

VDDP
C710 R412 SCD1U25V3KX-GP

5
6
7
8

5
6
7
8
SC100P50V2JN-3GP 16 13 RT8202_BST_VGA_L
1 2 DIS DIS DIS DIS
2

TON BOOT

D
D
D
D

D
D
D
D
DIS RT8202_PGOOD_VGA 4 12 RT8202_DH_VGA 1R3F-GP C708 TC15 TC14

FDMS7672-GP

FDMS7672-GP
PGOOD UGATE

1
SCD1U10V2KX-4GP
11 RT8202_LX_VGA DIS U17 U40
PHASE RT8202_DL_VGA
LGATE 8 R406 65 65 84.07672.037 Panasonic
C 1 R416 2 RT8202_EN_VGA 15 C
330uF,2V,9mohm

2
13,27,33,34,38,43,45,51 PM_SLP_S3# EN/DEM

SE330U2VDM-L-GP

SE330U2VDM-L-GP
10KR2F-2-GP 10 RT8202_OC_VGA_L 1 2 RT8202_LX_VGA 84.07672.037
OC

G
S
S
S

G
S
S
S
M96 FB 3 RT8202_FB_VGA Iripple=3A
1

5 6K34R3F-GP

4
3
2
1

4
3
2
1
R902 NC#5 VGA_CORE
14 NC#14 VOUT 1
R866 16KR3F-GP DIS

PGND
1 2

GND
GND
3D3V_VGA
2

Madison-Park 10KR2J-3-GP DIS


RT8202APQW -GP RT8202_DL_VGA
7

17
6
DIS 79.33719.L01
2nd = 77.C3371.051
SB1019 74.08202.A73
Id=15A
Qg=14~19nC, 79.33719.L01
Rdson=4.9~6.8mohm 2nd = 77.C3371.051

Vout=0.75*(1+Rh/Rl)
JV71-MV8 ENG 1002
1

DIS
1

R425 DY Designator For M96-M2 For Madison For PARK


1

C709 10KR2F-2-GP
B SC47P50V2JN-3GP C1148 B
DIS
2

SCD1U10V2KX-4GP R428 30k 73.2k 49.9K


2

RT8202_FB_VGA
1

64.30025.6DL 64.73225.6DL 64.49925.6DL


R429
49K9R2F-L-GP RT8202_FB_VGA
DIS
1

1
2

JV71-MV8 ENG 1002 R427 R428 3D3V_VGA 3D3V_S5


75KR2F-GP 73K2R2F-GP
DY DIS
2

1
R697 R703
NV_VID0_D 100KR2J-1-GP 100KR2J-1-GP
NV_VID1_D DIS DY
SB 1019

2
Q27
D

D
2N7002-11-GP MMBT2222A-3-GP
DY DY DIS DIS

C
Q26
2N7002-11-GP G NV_VID1 2 1 G NV_VID0_R Q42 B NV_VID0 2 1
R435 PW RCNTL_1 53 R436 PW RCNTL_0 53
1

1
84.27002.W31 10KR2F-2-GP 84.27002.W31 10KR2F-2-GP
S

E
C740 DIS C741
2ND = 84.27002.N31 SCD1U10V2KX-4GP 2ND = 84.27002.N31 SCD1U10V2KX-4GP
2

2
DY DIS
A JV71-MV DDR3 Madison A

JV71-MV8 ENG 1002 JV71-MV8 ENG 1002 Wistron Corporation


M96 Pro Madison Pro PARK XT 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
ALTV0 Vout ALTV0 Vout ALTV0 Vout
0 1.15V 0 1.00V 0 1.05V Title
1 0.9V 1 0.9V 1 0.9V RT8202A_VGA CORE
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 48 of 62
5 4 3 2 1
5 4 3 2 1

5V_S0
DCBATOUT 1D05V_S0
-1 0622
1

2
EC111 EC112 EC113 EC114 EC115 EC116 EC127 EC128 EC129
EC61 EC62 EC63 EC64 EC65 EC67
SCD1U50V3KX-GP SCD1U50V3KX-GP SCD1U50V3KX-GP SCD1U50V3KX-GP SCD1U50V3KX-GP

SCD1U50V3KX-GP
2

1
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY
D DY DY DY DY DY D

DCBATOUT SB 0520

1
EC85 EC86 EC87 EC88 EC89 EC90 EC91 EC92 EC93 EC94 EC95 EC96

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP
2

2
DY DY DY DY DY DY DY DY DY

VGA_CORE
PD 1019

2
EC104 EC105 EC106 EC107 EC108

1
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
C C
-1 0622 1D5V_S3 DDR_VREF_S3 5V_S5 DIS DIS DIS DIS DIS
3D3V_S0
2

2
EC119 EC120 EC110 EC97 EC98 EC99 EC100 EC101 EC102 EC103
2

EC125 EC126 EC123 EC124 EC121 EC122


1

1
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY DY
1

1
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

DY DY DY DY DY DY

SPRING_GND6
SPRING_GND5 SPRING-16-GP SPRING_GND20 SPRING_GND17
SPRING-16-GP SPRING-9-GP SPRING-16-GP

MINICARD

1
1

1
CPU NB VGA MDC
H9 H10 34.43E28.001
H2 H58 34.43E28.001 34.43E28.001
SPRING_GND19
HOLE HOLE

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP
H3 H4 H5 H6 H7 SPRING-9-GP SPRING_GND18

1
B SPRING-43-GP-U B
HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP
1

1
1

1
TOP
34.15J03.001

H88 H62 H59 H48


STF237R125H42-GP
H29 H11 H19 H35 H24 H25 H26 H27

STF237R113H111-GP

STF237R113H111-GP

STF237R113H111-GP
H45 H49 H57

STF237R125H42-GP
H47 H46 H50 STF256R89H178-GP

STF237R125H42-GP
HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

STF237R113H111-GP
STF237R113H111-GP

STF237R113H111-GP
1

1
1

1
DIS
DIS
DIS
SPRING_GND8 SPRING_GND9 SPRING_GND1 SPRING_GND13 SPRING_GND12 SPRING_GND11 SPRING_GND10 JV71-MV DDR3 Madison
A A
SPRING-43-GP-U SPRING-56-GP SPRING-56-GP SPRING-7-GP SPRING-7-GP SPRING-7-GP SPRING-7-GP
SPRING_GND2 SPRING_GND3 SPRING_GND4
SPRING-12-GP-U SPRING-12-GP-U SPRING-12-GP-U
Wistron Corporation
1

34.41Y19.001

34.41Y19.001
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

1
Title

34.15J03.001 34.4C322.001 34.4C322.001 34.49U26.001 34.49U26.001 34.49U26.001 34.49U26.001


EMI/Spring/Boss
Size Document Number Rev
JV71-MV8 1005 JV71-MV DDR3 Madison -1
Date: W ednesday, October 28, 2009 Sheet 49 of 62
5 4 3 2 1
A B C D E

Check test point


3D3V_S0 1 TP214 AFTE14P-GP

3D3V_AUX_S5 1 TP213 AFTE14P-GP

3D3V_S5 1 TP210 AFTE14P-GP

5V_S5 1 TP209 AFTE14P-GP


4 4
1 TP142 AFTE14P-GP
13,34 PM_PW RBTN#
1 TP161 AFTE14P-GP
4,12 H_PW RGD
1 TP160 AFTE14P-GP
34,41 S5_ENABLE
1 TP112 AFTE14P-GP
4,6 H_CPURST#

放放Dimm Door打
Test Point放 打打打打打打

3 3

2 2

1 JV71-MV DDR3 Madison 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AFTE_TP
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 50 of 62
A B C D E
5 4 3 2 1

AO4468, SO-8
Id=11.6A, Qg=9~12nC
1D5V_VGA 1D5V_S3
Rdson=17.4~22m ohm
1D5V_VGA
DIS
U69
8 D S 1
7 D S 2 DIS DIS
6 D S 3

1
5 D G 4 C885 TC33

1
C884 ST150U6D3VBM-1-GP

SCD1U16V2KX-3GP
SC10U6D3V3MX-GP DIS AO4468-GP

2
84.04468.037 77.C1571.09L

2
2ND = 80.15715.12L
D D

RUN_POWER_ON
RUNON_R_1
Q38
DIS
S D RUNON_R 1 2
R16 0R2J-2-GP
DIS NDS0610-NL-GP
84.S0610.B31

G
2ND = 84.00610.C31 1
R756 DY C296

SCD22U25V3KX-GP
1 2 DIS_EN_1D5_RUN_R 2
SA0928

1
330KR2J-L1-GP
DIS R757 DIS R758
100KR2J-1-GP DIS 330KR2J-L1-GP

2
R864
M96 DIS_EN_1D5_RUN
13,27,33,34,38,43,45,48 PM_SLP_S3# 1 2

D
0R2J-2-GP
Q39
2N7002-11-GP
1V_VGA_PWRGD 1 R759 2 DGPU_PWROK_R G 84.27002.W31
2ND = 84.27002.N31
0R2J-2-GP

S
Madison-Park DIS

1
C886
CO-LAYOUT DY

2
SCD1U10V2KX-4GP

C C

APL5930 for 1V_VGA


1D5V_S3

5V_S5 Designator For M96-M2 For Madison


1V_VGA
DIS DIS R885 7.87k 22.6k
Iomax=2.5A
1

1
3D3V_S0 C1149 C1150 C1151
SC1U16V3KX-2GP R887 20.5k 84.5k
Vo(cal.) = 1.013964 V
2

SC10U10V5KX-2GP
SC10U10V5KX-2GP
1

DIS
R883
DIS 2K2R2J-2-GP
Vo=0.8*(1+(R1/R2))
2

1V_VGA_PWRGD
1V_VGA_PWR 1V_VGA
U80
G226
1 2
5
VIN#5

1
6 4 DIS DIS DIS GAP-CLOSE-PWR
R884 VCNTL VOUT#4

1
DY 7 3 R885 G227
POK VOUT#3 22K6R2F-1-GP C1152 C1153 C1154
13,27,33,34,38,43,45,48 PM_SLP_S3# 1 2 8 2 1 2
EN FB
9 1 DIS

2
VIN#9 GND

SC100P50V2JN-3GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP
0R2J-2-GP GAP-CLOSE-PWR

2
G228
9025_FB 1 2
VGACORE_PWROK_EN APL5930KAI-TRG-GP
48 VGACORE_PWROK 1 R886 2
GAP-CLOSE-PWR
1

1
B 0R2J-2-GP C1155 DY G229 B
DIS R887 1 2
DIS SCD1U25V3ZY-1GP 84K5R2F-GP
2

GAP-CLOSE-PWR
DIS

2
1001 modify

R890
3D3V_S0 1 2

8015B_PWRGD
3D3V_S0 10KR2F-2-GP U81
DY RT8015BGQW-GP Iomax=2A
1D8V_PWR 1D8V_VGA
6
PVDD PGND
5 68.3R310.20A G153
L60
DIS DIS 7 4 8015B_LX34 2 1 1 2
VDD LX#4
1

C1158 C1159 IND-3D3UH-57GP


SC10U10V5KX-LGP SC10U10V5KX-LGP 8 3 GAP-CLOSE-PWR-3-GP
PGOOD LX#3 G154
1

C1160 C1161 C1162


DIS
2

8015B_FB 9 2 R891 1 2
FB GND
SC100P50V2JN-3GP

20KR2F-L-GP
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DIS
2

8015B_COMP 10 1 8015B_RT GAP-CLOSE-PWR-3-GP


GND

COMP SHDN/RT
DIS DIS DIS
2
1

8015B_FB
11

74.08015.A43 R892
DIS 820KR2F-GP
1

DIS
DIS R893
C1163
2

R894 16KR2F-GP DIS


12 8015B_COMP_1
1 2
20KR2F-L-GP
2

SC330P50V2KX-3GP
C1164
1 2
A A
SCD1U25V2KX-GP
Vo=0.8*(1+(R1/R2))
1V_VGA_PWRGD 1 R895 2 1V_VGA_PWRGD_R
DY
0R0402-PAD
JV71-MV DDR3 Madison
DIS
1

C1165 DY
Q41
AO7401-GP
Wistron Corporation
SCD1U10V2KX-5GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.


S D
Title

ATI POWER
G

Size Document Number Rev


Custom -1
JV71-MV DDR3 Madison
Date: Wednesday, October 28, 2009 Sheet 51 of 62
5 4 3 2 1
5 4 3 2 1

VGA1A 1 OF 8

PEG_RXP[15..0]
PEG_TXP[15..0] 7 PEG_RXP[15..0]
7 PEG_TXP[15..0] PEG_RXN[15..0]
PEG_TXN[15..0] 7 PEG_RXN[15..0]
7 PEG_TXN[15..0]
PEG_TXP0 AA38 Y33 PEG_RXP0_1 C901 1 2 PEG_RXP0
PEG_TXN0 PCIE_RX0P PCIE_TX0P PEG_RXN0_1 SCD1U16V2KX-3GP PEG_RXN0
Y37 PCIE_RX0N PCIE_TX0N Y32 1 2
C902 SCD1U16V2KX-3GP
DIS
PEG_TXP1 Y35 W33 PEG_RXP1_1 C903 1 2
DIS PEG_RXP1
PEG_TXN1 PCIE_RX1P PCIE_TX1P PEG_RXN1_1 SCD1U16V2KX-3GP PEG_RXN1
W36 PCIE_RX1N PCIE_TX1N W32 1 2
D C904 SCD1U16V2KX-3GP D
DIS
PEG_TXP2 W38 U33 PEG_RXP2_1 C905 1 2
DIS PEG_RXP2
PEG_TXN2 PCIE_RX2P PCIE_TX2P PEG_RXN2_1 SCD1U16V2KX-3GP PEG_RXN2
V37 PCIE_RX2N PCIE_TX2N U32 1 2
C906 SCD1U16V2KX-3GP
DIS
PEG_TXP3 V35 U30 PEG_RXP3_1 C908 1 2
DIS PEG_RXP3
PEG_TXN3 PCIE_RX3P PCIE_TX3P PEG_RXN3_1 SCD1U16V2KX-3GP PEG_RXN3
U36 PCIE_RX3N PCIE_TX3N U29 1 2
C907 SCD1U16V2KX-3GP
DIS
PEG_TXP4 U38 T33 PEG_RXP4_1 C910 1 2
DIS PEG_RXP4
PEG_TXN4 PCIE_RX4P PCIE_TX4P PEG_RXN4_1 SCD1U16V2KX-3GP PEG_RXN4
T37 PCIE_RX4N PCIE_TX4N T32 1 2
C909 SCD1U16V2KX-3GP
DIS
PEG_TXP5 T35 T30 PEG_RXP5_1 C911 1 2 DIS PEG_RXP5
PEG_TXN5 PCIE_RX5P PCIE_TX5P PEG_RXN5_1 SCD1U16V2KX-3GP PEG_RXN5
R36 PCIE_RX5N PCIE_TX5N T29 1 2

PCI EXPRESS INTERFACE


C912 SCD1U16V2KX-3GP
DIS
PEG_TXP6 R38 P33 PEG_RXP6_1 C914 1 2 DIS PEG_RXP6
PEG_TXN6 PCIE_RX6P PCIE_TX6P PEG_RXN6_1 SCD1U16V2KX-3GP PEG_RXN6
P37 PCIE_RX6N PCIE_TX6N P32 1 2
C913 SCD1U16V2KX-3GP
DIS
PEG_TXP7 P35 P30 PEG_RXP7_1 C915 1 2
DIS PEG_RXP7
PEG_TXN7 PCIE_RX7P PCIE_TX7P PEG_RXN7_1 SCD1U16V2KX-3GP PEG_RXN7
N36 PCIE_RX7N PCIE_TX7N P29 1 2
C916 SCD1U16V2KX-3GP
DIS
PEG_TXP8 N38 N33 PEG_RXP8_1 C918 1 2
DIS PEG_RXP8
PEG_TXN8 PCIE_RX8P PCIE_TX8P PEG_RXN8_1 SCD1U16V2KX-3GP PEG_RXN8
M37 PCIE_RX8N PCIE_TX8N N32 1 2
C917 SCD1U16V2KX-3GP
C DIS C
PEG_TXP9 M35 N30 PEG_RXP9_1 C919 1 2
DIS PEG_RXP9
PEG_TXN9 PCIE_RX9P PCIE_TX9P PEG_RXN9_1 SCD1U16V2KX-3GP PEG_RXN9
L36 PCIE_RX9N PCIE_TX9N N29 1 2
C920 SCD1U16V2KX-3GP
DIS
PEG_TXP10 L38 L33 PEG_RXP10_1 C922 1 2
DIS PEG_RXP10
PEG_TXN10 PCIE_RX10P PCIE_TX10P PEG_RXN10_1 SCD1U16V2KX-3GP PEG_RXN10
K37 PCIE_RX10N PCIE_TX10N L32 1 2
C921 SCD1U16V2KX-3GP
DIS
PEG_TXP11 K35 L30 PEG_RXP11_1 C923 1 2
DIS PEG_RXP11
PEG_TXN11 PCIE_RX11P PCIE_TX11P PEG_RXN11_1 SCD1U16V2KX-3GP PEG_RXN11
J36 PCIE_RX11N PCIE_TX11N L29 1 2
C924 SCD1U16V2KX-3GP
DIS
PEG_TXP12 J38 K33 PEG_RXP12_1 C926 1 2
DIS PEG_RXP12
PEG_TXN12 PCIE_RX12P PCIE_TX12P PEG_RXN12_1 SCD1U16V2KX-3GP PEG_RXN12
H37 PCIE_RX12N PCIE_TX12N K32 1 2
C925 SCD1U16V2KX-3GP
DIS
PEG_TXP13 H35 J33 PEG_RXP13_1 C927 1 2
DIS PEG_RXP13
PEG_TXN13 PCIE_RX13P PCIE_TX13P PEG_RXN13_1 SCD1U16V2KX-3GP PEG_RXN13
G36 PCIE_RX13N PCIE_TX13N J32 1 2
C928 SCD1U16V2KX-3GP
DIS
PEG_TXP14 G38 K30 PEG_RXP14_1 C930 1 2 DIS PEG_RXP14
PEG_TXN14 PCIE_RX14P PCIE_TX14P PEG_RXN14_1 SCD1U16V2KX-3GP PEG_RXN14
F37 PCIE_RX14N PCIE_TX14N K29 1 2
C929 SCD1U16V2KX-3GP
DIS
PEG_TXP15 F35 H33 PEG_RXP15_1 C931 1 2
DIS PEG_RXP15
PEG_TXN15 PCIE_RX15P PCIE_TX15P PEG_RXN15_1 SCD1U16V2KX-3GP PEG_RXN15
E37 PCIE_RX15N PCIE_TX15N H32 1 2
C932 SCD1U16V2KX-3GP
DIS
B DIS B
CLOCK
3 CLK_PCIE_PEG AB35 PCIE_REFCLKP
3 CLK_PCIE_PEG# AA36 PCIE_REFCLKN 1V_VGA

CALIBRATION
DIS
R768 1K27R2F-L-GP
CO-LAYOUT R769 AJ21 NC#AJ21 PCIE_CALRP Y30 1 2
AK21 NC#AK21
1 2 AH16 PWRGOOD PCIE_CALRN Y29 1 2
10KR2J-3-GP
Madison-Park R770 2KR2F-3-GP
7,13,25,31,32,34,35 PLT_RST1# PLT_RST1# 1 2 PLT_RST1#_M92_1 AA30
R771 0R2J-2-GP PERST#
DIS
DIS
1

C933 MADISON-PRO-GP DIS


SC22P50V2JN-4GP
DIS
71.MDSON.M01
2

A JV71-MV DDR3 Madison A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Madison ( 1 of 5 ) PCIE
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 52 of 62
5 4 3 2 1
5 4 3 2 1

DIS
DPLL_PVDD
L36

1D8V_VGA 1 2
BLM15BD121SS1D-GP

C934 C935 C936

1
SC1U10V2KX-1GP

SCD1U16V2KX-3GP
68.00084.F81 DIS DIS DIS VGA1B 2 OF 8
default brightness

SC10U6D3V3MX-GP
2ND = 68.00217.701 VGA1G 7 OF 8

2
ATI_BRIGHTNESS 18
AU24 HDMI_TXCAP DIS1 4 RN91 DIS
TXCAP_DPA3P HDMI_CLK+ 7,20
AV23 HDMI_TXCAM 2 3 SRN0J-10-GP-U LVDS CONTROL AK27 R561 2 10R2J-2-GP
TXCAM_DPA3N HDMI_CLK- 7,20 VARY_BL BLON_IN 34
AJ27 ATI_LCDVDD_ON 18
HDMI_TX0P RN92 DIGON
TX0P_DPA2P
AT25 DIS1 4 HDMI_DATA0+ 7,20
MUTI GFX AR24 HDMI_TX0M 2 3 SRN0J-10-GP-U HDMI_DATA0- 7,20
DPLL_VDDC 1D8V_VGA 1D8V_VGA 1D8V_VGA 1D8V_VGA DPA TX0M_DPA2N
L37
AU26 HDMI_TX1P DIS1 4 RN93
TX1P_DPA1P HDMI_DATA1+ 7,20
1 2 AV25 HDMI_TX1M 2 3 SRN0J-10-GP-U AK35
1V_VGA HDMI_DATA1- 7,20 GPU_TXBCLK+ 18

2
BLM15BD121SS1D-GP TX1M_DPA1N TXCLK_UP_DPF3P
D AL36 GPU_TXBCLK- 18 D
TXCLK_UN_DPF3N

SAMSUNG-AMD

HYNIX-AMD
R776 R773 R777 R778 AR8 AT27 HDMI_TX2P DIS1 4 RN94 HDMI_DATA2+ 7,20
DVPCNTL_MVP_0 TX2P_DPA0P

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
DIS C940 C939 C941 AU8 AR26 HDMI_TX2M 2 3 SRN0J-10-GP-U AJ38
HDMI_DATA2- 7,20 GPU_TXBOUT0+ 18

1
DVPCNTL_MVP_1 TX2M_DPA0N TXOUT_U0P_DPF2P

SC1U10V2KX-1GP
DIS DIS DIS DY DY AP8
DVPCNTL_0 TXOUT_U0N_DPF2N
AK37 GPU_TXBOUT0- 18
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP
68.00084.F81 AW8 AR30

1
DVPCNTL_1 TXCBP_DPB3P
2ND = 68.00217.701 AR3 AT29 AH35 GPU_TXBOUT1+ 18 upper odd
2

2
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1P_DPF1P
AR1 AJ36 GPU_TXBOUT1- 18
MEM_ID0 DVPCLK TXOUT_U1N_DPF1N
AU1 AV31
MEM_ID1 DVPDATA_0 TX3P_DPB2P
AU3 AU30 AG38 GPU_TXBOUT2+ 18
MEM_ID2 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2P_DPF0P
AW3 AH37 GPU_TXBOUT2- 18
MEM_ID3 DVPDATA_2 TXOUT_U2N_DPF0N
AP6 AR32
DVPDATA_3 TX4P_DPB1P
AW5 AT31 AF35
DVPDATA_4 TX4M_DPB1N TXOUT_U3P
AU5 AG36
DVPDATA_5 TXOUT_U3N
AR6 AT33

2
DVPDATA_6 TX5P_DPB0P
AW6 AU32
DVPDATA_7 TX5M_DPB0N LVTMDP
DVPDATA [3:2:1:0] for VRAM type R779 R774 R775 R780 AU6
DVPDATA_8

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
selection H/W strap AT7 AU14
DVPDATA_9 TXCCP_DPC3P
AV7 AV13 AP34 GPU_TXACLK+ 18
Should provide VRAM Table for VBios DVPDATA_10 TXCCM_DPC3N TXCLK_LP_DPE3P
AN7 AR34 GPU_TXACLK- 18

1
DVPDATA_11 TXCLK_LN_DPE3N
request AV9
DVPDATA_12 TX0P_DPC2P
AT15
AT9 AR14 AW37 GPU_TXAOUT0+ 18
DVPDATA_13 TX0M_DPC2N TXOUT_L0P_DPE2P
AR10 AU35 GPU_TXAOUT0- 18
DVPDATA_14 DPC TXOUT_L0N_DPE2N
DVPDATA [3:0] AW10
DVPDATA_15 TX1P_DPC1P
AU16
0100 1GB DDR3 Hynix-H5TQ1G63BFR-12C (800MHz) AU10
DVPDATA_16 TX1M_DPC1N
AV15
TXOUT_L1P_DPE1P
AR37 GPU_TXAOUT1+ 18 lower even

HYNIX

SAMSUNG

HYNIX-SAMSUNG-AMD

HYNIX-SAMSUNG-AMD
AP10 AU39 GPU_TXAOUT1- 18
1000 1GB DDR3 Samsung-K4W1G1646E-HC12 (800MHz) DVPDATA_17 TXOUT_L1N_DPE1N
AV11 AT17
DVPDATA_18 TX2P_DPC0P
1100 AMD AT11
DVPDATA_19 TX2M_DPC0N
AR16
TXOUT_L2P_DPE0P
AP35 GPU_TXAOUT2+ 18
AR12 AR35 GPU_TXAOUT2- 18
DVPDATA_20 TXOUT_L2N_DPE0N
AW12 AU20
DVPDATA_21 TXCDP_DPD3P
AU12 AT19 AN36
DVPDATA_22 TXCDM_DPD3N TXOUT_L3P
It's strap for GDDR3-136ball AP12 AP37
DVPDATA_23 TXOUT_L3N
AT21
TX3P_DPD2P
Need to Clarify TX3M_DPD2N
AR20

DPD AU22
TX4P_DPD1P MADISON-PRO-GP
TX4M_DPD1N
AV21 DIS
I2C AT23 CRT_BLUE
TX5P_DPD0P
AR22 71.MDSON.M01
TX5M_DPD0N CRT_GREEN
18 LCD_EDID_CLK AK26
SCL
18 LCD_EDID_DAT AJ26
SDA CRT_RED
C C
3D3V_VGA AD39 CRT_RED 19

8
7
6
5
GENERAL PURPOSE I/O R
AD37
R# RN90
56 GPIO_VGA_00 AH20
GPIO_0 SRN150F-1-GP
56 GPIO_VGA_01 AH18 AE36 CRT_GREEN 19
2

GPIO_1 G
56 GPIO_VGA_02 AN16 AD35 1 2
R781 GPIO_VGA_03 GPIO_2 G#
1 AH23
GPIO_3_SMBDATA DIS
10KR2J-3-GP TP228 1 GPIO_VGA_04 AJ23 AF37 R782 0R2J-2-GP
CRT_BLUE 19

1
2
3
4
TP229 GPIO_4_SMBCLK B
AH17 AE38 DIS
DIS R783
56 GPIO_VGA_05
1 GPIO_VGA_06 AJ17
GPIO_5_AC_BATT DAC1 B#
1

TP230 GPIO_VGA_07_BLON GPIO_6 AVSSQ


34 BLON_IN 1 2 AK17 AC36 CRT_HSYNC 19,56
0R2J-2-GP GPIO_7_BLON HSYNC
56 GPIO_VGA_08 AJ13 AC38 CRT_VSYNC 19,56
Thermal_int GPIO_8_ROMSO VSYNC
DY 56 GPIO_VGA_09 AH15
GPIO_9_ROMSI
AJ16 R784 DIS 499R2F-2-GP
GPIO_VGA_07_BLON GPIO_10_ROMSCK
56 GPIO_VGA_11 AK16 AB34 RSET 1 2
GPIO_11 RSET DAC2_VDD2DI 1D8V_VGA DAC1_AVDD 1D8V_VGA
56 GPIO_VGA_12 AL16 L38
GPIO_12
AM16 AD34
56 GPIO_VGA_13 DAC1_AVDD 50mA 70mA
2

GPIO_VGA_14 GPIO_13 AVDD AVSSQ R785 2


1 AM14 AE34 1 1 2
R898 TP231 GPIO_14_HPD2 AVSSQ C942 0R0402-PAD
48 PWRCNTL_0 AM13

1
TP261 OSC_SPREAD GPIO_15_PWRCNTL_0 SCD1U16V2KX-3GP C945 C946 C947 C948 BLM15BD121SS1D-GP
10KR2J-3-GP 1 AK14 AC33 DAC1_VDD1DI
GPIO_16_SSIN VDD1DI

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
Thermal_int AG30 AC34 AVSSQ DIS DIS
DIS GPIO_17_THERMAL_INT VSS1DI
1 GPIO_VGA_18 AN14 DIS DIS DIS DIS
1

2
THERMTRIP_VGA TP232 GPIO_18_HPD3
1 AM17
GPIO_19_CTF
68.00084.F81
TP233 48 PWRCNTL_1 AL13 AC30 2ND = 68.00217.701
GPIO_VGA_21 GPIO_20_PWRCNTL_1 R2
1 AJ14 AC31
TP234 GPIO_21_BB_EN R2#
56 GPIO_VGA_22 AK13
VGA_CLKREQ GPIO_22_ROMCS# AVSSQ
1 AN13 AD30
GPIO_VGA_21 JTAG_TRST# GPIO_23_CLKREQ# G2
1 R693 2 TP264 AM23 AD31
10KR2J-3-GP JTAG_TDI JTAG_TRST# G2#
1 AN23
TP236 JTAG_TCK JTAG_TDI DAC2_A2VDD 3D3V_VGA DAC1_VDD1DI 1D8V_VGA
ATI-ES 3 JTAG_TCK AK23 AF30 L39
2

JTAG_TMS JTAG_TCK B2
AL24 AF31
R899 1 JTAG_TDO AM24
JTAG_TMS B2# 130mA 2 R787 1
45mA 1 2
TP239 GENERICA JTAG_TDO C949 0R0402-PAD
10KR2J-3-GP 1 AJ19

1
GENERICB GENERICA
3D3V_VGA 1 R696 2 TP240 1 AK19 AC32 SCD1U16V2KX-3GP C950 C954 C955 BLM15BD121SS1D-GP
M96 GENERICB C

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
10KR2J-3-GP TP241 1 GENERICC AJ20 AD32 DIS
1

TP242 GENERICD GENERICC Y


ATI-ES 1 AK20 AF32 DIS DIS DIS DIS

2
TP244 GENERICE GENERICD COMP
SB 1008 1 AJ24
GENERICE_HPD4 68.00084.F81
TP243 1 GENERICF AH26 DAC2 2ND = 68.00217.701
TP245 GENERICG GENERICF
1 AH24 AD29
TP246 GENERICG H2SYNC
AC29
1D8V_VGA V2SYNC
Back Bias (body bias)
B HPD1 AK24 B
which minimizes HPD1
AG31 DAC2_VDD2DI
1

power consumption VDD2DI


AG32
R788 VSS2DI DAC2_A2VDDQ 1D8V_VGA
in battery modes. L40
PD = Disable 499R2F-2-GP VREFG VOLTAGE DIVIDER IS 1.5mA
DIS (VREFG = VDDR4,5(1.8V) / 3 = 0.6V) A2VDD
AG33 DAC2_A2VDD 1 2
PU = Enable C956
2

1
AD33 DAC2_A2VDDQ SCD1U16V2KX-3GP BLM15BD121SS1D-GP
VGA_VREFG A2VDDQ
AH13
VREFG DIS
AF33 DIS

2
1

A2VSSQ 3D3V_VGA
DIS 68.00084.F81
R789 C958 DPLL_PVDD R790 2ND = 68.00217.701
249R2F-GP SCD1U16V2KX-3GP 75mA AA29 1 2
2

R2SET 715R2F-GP
DIS DIS AM32
DPLL_PVDD
DPLL_VDDC AN32
2

DPLL_PVSS
125mA DDC/AUX AM26 C1063
CRT_DDCCLK 19

1
DDC1CLK SCD1U16V2KX-3GP
AN31 AN26 CRT_DDCDATA 19
DPLL_VDDC DDC1DATA
DIS
AM27

2
VGA_XTALIN PLL/CLOCK AUX1P
Designator For M96-M2 For Madison AV33
XTALIN AUX1N
AL27
VGA_XTALOUT AU34 U67
XTALOUT
DDC2CLK
AM19 ATI_HDMI_CLK 20 DIS
R899 10K DY AL19 R582 1 2 0R2J-2-GP KBC_THERM_G781_CLK 8 1
DDC2DATA ATI_HDMI_DAT 20 33,34 SMBC_Therm SMBCLK VCC
TP260 1 VGA_XO_IN AW34 33,34 SMBD_Therm R581 1 2 0R2J-2-GP KBC_THERM_G781_DAT 7 2 GPU_DPLUS
XO_IN G781_ALERT# 6 SMBDATA DXP GPU_DMINUS
AN20 3

1
TP265 VGA_XO_IN2 AUX2P ALERT# DXN GPU_THERM# C1064
1 AW35
XO_IN2 AUX2N
AM20 DIS 5
GND THERM#
4
SC2200P50V2KX-2GP
AL30 DIS

2
DDCCLK_AUX3P G781P8F-GP
AM30
DDCDATA_AUX3N
For Thermal sensor DIS
3D3V_VGA
AL29
GPU_DPLUS DDCCLK_AUX4P 3D3V_VGA
AF29 AM29
GPU_DMINUS DPLUS THERMAL DDCDATA_AUX4N
AG29
DMINUS
AN21
DPE_VDD18 DDCCLK_AUX5P
AM21

2
TP247 FAN_PWM DDCDATA_AUX5N
1 AK32
TS_FDO R585 R586
AJ30
DDC6CLK
AL31 AJ31 DIS 2K2R2F-GP 2K2R2F-GP
C

TS_A DDC6DATA
Q40
DIS DIS
DIS AK30 B ATI_HDMI_DETECT 20

1
1

A VGA_XO_IN R792 DDCCLK_AUX7P MMBT3904-4-GP A


1 2 AJ32
R10 0R2J-2-GP 1MR2J-1-GP AJ33
TSVDD 5mA DDCDATA_AUX7N
AK29
E

TSVSS
DIS X6 84.T3904.C11
2ND = 84.03904.L06
DIS MADISON-PRO-GP DIS HPD1
SA0915
2

3 2
1

DIS JV71-MV DDR3 Madison


1 2 VGA_XO_IN2 71.MDSON.M01 R793
R11 0R2J-2-GP DIS 10KR2J-3-GP
C959 4 1 C960 Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2
2

DIS DIS
SA0915 XTAL-27MHZ-58-GP
Taipei Hsien 221, Taiwan, R.O.C.
1

SC10P50V2JN-4GP 82.30034.461 SC10P50V2JN-4GP Title


1

2ND = 82.30034.701
SB 1022 SB 1022 Madison ( 2 of 5 ) IO
Size Document Number Rev
A2
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 53 of 62
5 4 3 2 1
5 4 3 2 1

1D8V_VGA
400mA

DY DIS DY DIS DIS

1
VGA1E 5 OF 8 C961 C979 C980 C981 C982

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
1D5V_VGA
MEM I/O

2
PCIE
AC7 AA31
VDDR1 PCIE_VDDR
AD11 AA32
VDDR1 PCIE_VDDR
DY DIS DY DY DIS DIS DIS AF7 AA33

1
C962 C963 C964 C983 C984 C985 C986 VDDR1 PCIE_VDDR
D AG10 AA34 D
VDDR1 PCIE_VDDR

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
AJ7 V28
VDDR1 PCIE_VDDR
AK8 W29

2
VDDR1 PCIE_VDDR
AL9 W30
VDDR1 PCIE_VDDR 1V_VGA
G11 Y31
VDDR1 PCIE_VDDR
G14
G17
VDDR1 1100mA
VDDR1
G20 G30
VDDR1 PCIE_VDDC
G23 G31
VDDR1 PCIE_VDDC
G26
VDDR1 PCIE_VDDC
H29 DIS DIS DIS DIS DIS DIS DIS DIS DIS
DIS DIS DIS DIS DIS DIS DIS G29 H30 C988 C989 C971 C972 C990 C973 C974 C991

1
VDDR1 PCIE_VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C965 C966 C987 C967 C968 C969 C970 H10 J29 C992
VDDR1 PCIE_VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
J7 J30
VDDR1 PCIE_VDDC
J9 L28

2
VDDR1 PCIE_VDDC
K11 M28
VDDR1 PCIE_VDDC
K13 N28
VDDR1 PCIE_VDDC
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC
L16 U28
VDDR1 PCIE_VDDC
L21
VDDR1
L23
VDDR1
DIS DIS DIS DIS DY DIS DY L26 AA15

1
C993 C975 C976 C977 C978 C994 C995 VDDR1 CORE VDDC
L7 AA17
M11
VDDR1 VDDC
AA20
19A VGA_CORE
VDDR1 VDDC

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
N11 AA22

2
VDDR1 VDDC
P7 AA24
VDDR1 VDDC
R11 AA27
VDDR1 VDDC
U11 AB16
VDDR1 VDDC
U7
VDDR1 VDDC
AB18 DIS DIS DIS DIS DIS DIS DY DIS DIS DIS DIS DIS DIS DIS DIS
Y11 AB21 C996 C997 C998 C999 C1000 C1001 C1002 C1003 C1004 C1005 C1006 C1007 C1008 C1009 C1010

1
VDDR1 VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
Y7 AB23
VDDR1 VDDC
AB26
VDDC
AB28

2
1D8V_VGA VDDC
L41 17mA VDDC
AC17
AC20
VDD_CT LEVEL VDDC
1 2 AC22
TRANSLATION VDDC
AC24
VDDC

POWER
BLM15BD121SS1D-GP DIS DIS DIS DIS DIS AF26 AC27
1

1
C1011 C1012 C1013 C1014 C1015 VDD_CT VDDC
DIS AF27
VDD_CT VDDC
AD18
SC10U6D3V3MX-GP

AG26 AD21
VDD_CT VDDC
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP
68.00084.F81 AG27 AD23
2

2
VDD_CT VDDC
C 2ND = 68.00217.701 VDDC
AD26 C
AF17
I/O VDDC
AF20
VDDC VGA_CORE
AF23 AF22
VDDR3 VDDC
AF24 AG16
3D3V_VGA VDDR3 VDDC
60mA AG23
AG24
VDDR3 VDDC
AG18
AG21
VDDR3 VDDC
AH22
VDDC
AH27 DIS DIS DIS DIS DY DIS DIS DIS DIS DY

1
VDDC C1020 C1021 C1022 C1023 C1024 C1025 C1026 C1027 C1028 C1029
DIS DIS DIS DIS AF13 AH28
1

VDDR4 VDDC

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP
C1016 C1017 C1018 C1019 AF15 M26
VDDR4 VDDC
AG13 N24

2
VDDR4 VDDC
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP SC1U6D3V2KX-GP AG15 N27


2

VDDR4 VDDC/BIF_VDDC
R18
VDDC
R21
VDDC
AD12 R23
VDDR4 VDDC
AF11 R26
1D8V_VGA VDDR4 VDDC
AF12 T17
VDDR4 VDDC
AG11 T20
VDDR4 VDDC
T22
VDDC
T24
1D5V_VGA VDDC
DIS DIS DIS DIS M96 T27
L56 M96 VRAM-CLK
1

C1030 C1031 C1032 C1033 VDDC/BIF_VDDC


U16
VDDRHA VDDC
1 2 M20 U18
NC_VDDRHA VDDC
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

BLM15BD121SS1D-GP VSSRHA M21 U21


SC1U6D3V2KX-GP
2

NC_VSSRHA VDDC
L57 M96 U23
1

1D5V_VGA VDDC VGA_CORE


U26
VDDRHB VDDC
68.00084.F81 1 2 V12
NC_VDDRHB VDDC
V17
2ND = 68.00217.611 M96 BLM15BD121SS1D-GP VSSRHB U12 V20
2

C1061 NC_VSSRHB VDDC


V22
1

1
C1062 SC1U6D3V2KX-GP VDDC
V24
R897 R896 VDDC
68.00084.F81 M96 V27 DIS DIS DIS DIS
2

0R2J-2-GP 0R2J-2-GP VDDC


2ND = 68.00217.611 Y16

1
PLL VDDC C1034 C1035 C1036 C1037
M96 M96 VDDC
Y18

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
SB1026 AB37 Y21
PCIE_PVDD 40mA
2

PCIE_PVDD VDDC
Y23

2
VDDC
MPV18 H7 Y26
1D8V_VGA MPV18 VDDC
L47 H8 Y28
MPV18 VDDC
1 2 PCIE_PVDD
SPV18 AM10
B BLM15BD121SS1D-GP SPV18 B
AA13
1

C951 VDDCI
DIS SPV10 AN9
SPV10 VDDCI
AB13
SCD1U16V2KX-3GP

AC12
VDDCI
68.00084.F81 DIS AN10 AC15
2

SPVSS VDDCI
2ND = 68.00217.701 CO-LAYOUT VDDCI
AD13
AD16
VDDCI VGA_CORE
M15
VDDCI
M16
VOLTAGE VDDCI
M18
4A
SENESE VDDCI
M23
VDDCI
N13
TPAD14-GP TP252 FB_VDDC VDDCI
1 AF28
FB_VDDC VDDCI
N15 DIS DIS DIS DIS DIS DIS
N17 C1038 C1039 C1040 C1041 C1042

1
VDDCI

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
N20 C1043
VDDCI

SC10U6D3V3MX-GP
CO-LAYOUT TPAD14-GP TP253 1 FB_VDDCI AG28 N22
FB_VDDCI ISOLATED VDDCI
R12

2
CORE I/O VDDCI
R13
TPAD14-GP TP254 FB_GND VDDCI
1 AH29 R16
FB_GND VDDCI
T12
VDDCI
T15
1

VGA_CORE VDDCI
L55 V15
R862 VDDCI
Y13
0R2J-2-GP VDDCI
1 2
M96
BLM15BD121SS1D-GP MADISON-PRO-GP DIS
2

M96
68.00084.F81 71.MDSON.M01
2ND = 68.00217.701
1V_VGA SPV10 1D8V_VGA L43 SPV18 1D8V_VGA L44 MPV18
L42 100mA Madison-Park50mA 150mA
Madison-Park
1 2 1 2 1 2
BLM15BD121SS1D-GP BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
1

1
Madison-Park DIS DIS DIS 68.00084.F81 C1047 C1048 C1049 68.00084.F81 C1050 C1051 C1052 C1053 C1054
1

C1044 C1045 C1046 2ND = 68.00217.701 2ND = 68.00217.701


SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
68.00084.F81
2

2
SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

2ND = 68.00217.701
2

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park
A A

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Madison ( 3 of 5 ) POWER
Size Document Number Rev
A2
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 54 of 62
5 4 3 2 1
5 4 3 2 1

D VGA1F 6 OF 8 D

AB39 A3
PCIE_VSS GND
E39 A37
PCIE_VSS GND
F34 AA16
PCIE_VSS GND
F39 AA18
PCIE_VSS GND
G33 AA2
1D8V_VGA PCIE_VSS GND
Madison-Park L45 G34
PCIE_VSS GND
AA21
Madison-Park Madison-Park H31
PCIE_VSS GND
AA23
DPA_VDD18 1 2 H34 AA26
BLM15BD121SS1D-GP PCIE_VSS GND
H39 AA28

1
C1058 C1059 C1055 PCIE_VSS GND
130mA 130mA Madison-Park J31
PCIE_VSS GND
AA6

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
68.00084.F81 J34
PCIE_VSS GND
AB12
2ND = 68.00217.701 K31 AB15

2
VGA1H 8 OF 8 PCIE_VSS GND
K34 AB17
PCIE_VSS GND
K39 AB20
1D8V_VGA DP C/D POWER DP A/B POWER PCIE_VSS GND
R860 L31 AB22
PCIE_VSS GND
L34 AB24
DPC_VDD18 AP20 PCIE_VSS GND
1 2 AN24 M34 AB27
0R2J-2-GP DPC_VDD18 DPA_VDD18 PCIE_VSS GND
AP21 AP24 M39 AC11
DPC_VDD18 DPA_VDD18 PCIE_VSS GND
Madison-Park N31
PCIE_VSS GND
AC13
1V_VGA N34 AC16
L46 PCIE_VSS GND
1V_VGA DIS DIS DIS P31 AC18
DPA_VDD10 PCIE_VSS GND
AP13 AP31 1 2 P34 AC2
DPC_VDD10 DPC_VDD10 DPA_VDD10 PCIE_VSS GND
1 R794 2 AT13 AP32 HCB1608KF-1-GP P39 AC21

1
0R0603-PAD DPC_VDD10 DPA_VDD10 C1056 C1057 C1060 PCIE_VSS GND
110mA 110mA DIS R34
PCIE_VSS GND
AC23

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
T31 AC26
PCIE_VSS GND
AN17 AN27 68.00214.091 T34 AC28

2
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP16 AP27 2ND = 68.00206.341 T39 AC6
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP17 AP28 U31 AD15
DPC_VSSR DPA_VSSR PCIE_VSS GND
AW14 AW24 U34 AD17
DPC_VSSR DPA_VSSR PCIE_VSS GND
AW16 AW26 V34 AD20
DPC_VSSR DPA_VSSR PCIE_VSS GND
V39 AD22
1D8V_VGA PCIE_VSS GND
R861 W31 AD24
1D8V_VGA PCIE_VSS GND
R859 130mA AP22 AP25 DPB_VDD18 2 1
W34
Y34
PCIE_VSS GND
AD27
AD9
DPD_VDD18 DPD_VDD18 DPB_VDD18 0R2J-2-GP PCIE_VSS GND
1 2 AP23 AP26
0R2J-2-GP DPD_VDD18 DPB_VDD18 130mA Madison-Park
Y39
PCIE_VSS GND
AE2
AE6
GND
Madison-Park GND
AF10
C 1V_VGA 1V_VGA AF16 C
GND
AP14 AN33 AF18
DPD_VDD10 DPD_VDD10 DPB_VDD10 DPB_VDD10 GND
1 R795 2 AP15 AP33 1 R796 2 AF21
0R0603-PAD
110mA
DPD_VDD10 DPB_VDD10
110mA 0R0603-PAD
F15
GND
GND GND
GND
GND
AG17
AG2
F17 AG20
GND GND
AN19 AN29 F19 AG22
DPD_VSSR DPB_VSSR GND GND
AP18 AP29 F21 AG6
DPD_VSSR DPB_VSSR GND GND
AP19 AP30 F23 AG9
DPD_VSSR DPB_VSSR GND GND
AW20 AW30 F25 AH21
DPD_VSSR DPB_VSSR GND GND
AW22 AW32 F27 AJ10
DPD_VSSR DPB_VSSR GND GND
F29 AJ11
1D8V_VGA DPE_VDD18 1D8V_VGA GND GND
L49 L50 F31 AJ2
GND GND
DIS DIS DIS DIS DIS DIS DIS DIS F33
GND GND
AJ28
1 2 2 R797 1 AW18 AW28 1 R798 2 1 2 F7 AJ6
BLM15BD121SS1D-GP DPCD_CALR DPAB_CALR BLM15BD121SS1D-GP GND GND
F9 AK11
1

1
C1067 C1068 C1069 150R2F-1-GP 150R2F-1-GP C1070 C1071 C1072 GND GND
DIS DIS 68.00084.F81 G2
GND GND
AK31
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
2ND = 68.00217.701 1D8V_VGA
68.00084.F81 DPE_VDD18 AH34
DP E/F POWER DP PLL POWER
AU28 DPA_PVDD 20mA G6
H9
GND GND
AK7
AL11
2

2
DPE_VDD18 DPA_PVDD GND GND
2ND = 68.00217.701 AJ34 AV27 1 R799 2 J2 AL14
SC1U6D3V2KX-GP DPE_VDD18 DPA_PVSS 0R0603-PAD GND GND
1V_VGA
200mA J27
J6
GND GND
AL17
AL2
L51 GND GND
DIS DIS DIS 20mA J8
GND GND
AL20
1 2 DPE_VDD10 AL33 AV29 DPB_PVDD K14 AL21
HCB1608KF-1-GP DPE_VDD10 DPB_PVDD GND GND/PX_EN
AM33 AR28 K7 AL23
1

C1073 C1074 C1075 DPE_VDD10 DPB_PVSS GND GND


DIS 120mA L11
GND GND
AL26
SC10U6D3V3MX-GP

1D8V_VGA L17 AL32


GND GND
SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

68.00214.091 20mA L2 AL6


2

DPC_PVDD GND GND


2ND = 68.00206.341 AN34 AU18 1 R800 2 L22 AL8
DPE_VSSR DPC_PVDD 0R0603-PAD GND GND
AP39 AV17 L24 AM11
1D8V_VGA DPE_VSSR DPC_PVSS GND GND
L52 AR39 L6 AM31
DPE_VSSR DPD_PVDD GND GND
DIS DIS DIS AU37
DPE_VSSR
M17
GND GND
AM9
1 2
BLM15BD121SS1D-GP
20mA M22
GND GND
AN11
200mA AV19 M24 AN2
1

C1076 C1078 DPD_PVDD DPD_PVDD 1D8V_VGA GND GND


DIS DPD_PVSS
AR18 N16
GND GND
AN30
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

C1077 N18 AN6


DPF_VDD18 DPE_PVDD GND GND
68.00084.F81 AF34 1 R801 2 N2 AN8
2

DPF_VDD18 0R0603-PAD GND GND


2ND = 68.00217.701 AG34
DPF_VDD18 20mA N21
GND GND
AP11
SC1U6D3V2KX-GP AM37 N23 AP7
1V_VGA DPE_PVDD GND GND
L53 AN38 N26 AP9
DPE_PVSS 1D8V_VGA GND GND
DIS DIS 20mA L61 N6
GND GND
AR5
B DPF_VDD10 1D8V_VGA B
1 2
HCB1608KF-1-GP
AK33
AK34
DPF_VDD10 20mA L54
1 2
R15
R17
GND GND
B11
B13
1

C1080 C1081 DPF_VDD10 DPF_PVDD GND GND


DIS 120mA AL38 1 2 R2 B15

1
DPF_PVDD C1167 C1166 BLM15BD121SS1D-GP GND GND
AM35 R20 B17
1

1
DPF_PVSS GND GND
SCD1U16V2KX-3GP

68.00214.091 C1079 DIS C1082 C1083 BLM15BD121SS1D-GP C1168 DIS R22 B19
2

GND GND
SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
2ND = 68.00206.341 AF39 C1084 Madison-Park
1DPF_PVSS

R24 B21

2
DPF_VSSR GND GND

DIS

DIS

DIS
SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
AH39 68.00084.F81 R27 B23
2

2
DPF_VSSR GND GND
AK39 68.00084.F81 2ND = 68.00217.701 R6 B25
Madison-Park

Madison-Park

DPF_VSSR GND GND


AL34 2ND = 68.00217.701 T11 B27
Madison-Park
DPF_VSSR GND GND
AM34 T13 B29
Madison-Park

DPF_VSSR GND GND


T16 B31
R858 GND GND
T18 B33
0R2J-2-GP GND GND
DIS T21
GND GND
B7
2 1 AM39 T23 B9
DPEF_CALR GND GND
T26 C1
2

R802 GND GND


U15 C39
150R2F-1-GP MADISON-PRO-GP GND GND
DIS U17
GND GND
E35
U2 E5
GND GND
U20 F11
71.MDSON.M01 U22
GND GND
F13
GND GND
U24
GND
U27
GND
U6
GND
CO-LAYOUT V11
GND
V16
GND
V18
GND
V21
GND
V23
GND
V26
GND
W2
GND
W6
GND
Y15
GND
Y17
GND
Y20
GND VSS_MECH1 TP255 TPAD14-GP
Y22 A39 1
GND VSS_MECH VSS_MECH2 TP256 TPAD14-GP
Y24 AW1 1
GND VSS_MECH VSS_MECH3 TP257 TPAD14-GP
Y27 AW39 1
GND VSS_MECH
U13
GND
V13
GND
MADISON-PRO-GP DIS
A A

71.MDSON.M01

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Madison ( 4 of 5 ) DP POWER
Size Document Number Rev
A2 -1
JV71-MV DDR3 Madison
Date: Wednesday, October 28, 2009 Sheet 55 of 62

5 4 3 2 1
5 4 3 2 1

VGA1C 3 OF 8
DDR2 DDR2 VGA1D 4 OF 8
57,58 MDA[0..63] GDDR3/GDDR5 GDDR5/GDDR3 DDR2 DDR2
DDR3 DDR3 MAA[0..12] 57,58 59,60 MDB[0..63] GDDR3/GDDR5 GDDR5/GDDR3
MAB[0..12] 59,60
MDA0 C37 G24 MAA0 DDR3 DDR3
MDA1 DQA0_0/DQA_0 MAA0_0/MAA_0 MAA1 MDB0 MAB0
C35 J23 C5 P8
MDA2 DQA0_1/DQA_1 MAA0_1/MAA_1 MAA2 MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1
A35 H24 C3 T9
DQA0_2/DQA_2 MAA0_2/MAA_2 DQB0_1/DQB_1 MAB0_1/MAB_1

MEMORY INTERFACE A
MDA3 E34 J24 MAA3 MDB2 E3 P9 MAB2
DQA0_3/DQA_3 MAA0_3/MAA_3 DQB0_2/DQB_2 MAB0_2/MAB_2

MEMORY INTERFACE B
MDA4 G32 H26 MAA4 MDB3 E1 N7 MAB3
MDA5 DQA0_4/DQA_4 MAA0_4/MAA_4 MAA5 MDB4 DQB0_3/DQB_3 MAB0_3/MAB_3 MAB4
D33 J26 F1 N8
MDA6 DQA0_5/DQA_5 MAA0_5/MAA_5 MAA6 MDB5 DQB0_4/DQB_4 MAB0_4/MAB_4 MAB5
F32 H21 F3 N9
MDA7 DQA0_6/DQA_6 MAA0_6/MAA_6 MAA7 MDB6 DQB0_5/DQB_5 MAB0_5/MAB_5 MAB6
E32 G21 F5 U9
MDA8 DQA0_7/DQA_7 MAA0_7/MAA_7 MAA8 MDB7 DQB0_6/DQB_6 MAB0_6/MAB_6 MAB7
D31 H19 G4 U8
MDA9 DQA0_8/DQA_8 MAA1_0/MAA_8 MAA9 MDB8 DQB0_7/DQB_7 MAB0_7/MAB_7 MAB8
F30 H20 H5 Y9
MDA10 DQA0_9/DQA_9 MAA1_1/MAA_9 MAA10 MDB9 DQB0_8/DQB_8 MAB1_0/MAB_8 MAB9
C30 L13 H6 W9
MDA11 DQA0_10/DQA_10 MAA1_2/MAA_10 MAA11 MDB10 DQB0_9/DQB_9 MAB1_1/MAB_9 MAB10
A30
DQA0_11/DQA_11 MAA1_3/MAA_11
G16 J4
DQB0_10/DQB_10 MAB1_2/MAB_10
AC8 SB 0812
MDA12 F28 J16 MAA12 MDB11 K6 AC9 MAB11
MDA13 DQA0_12/DQA_12 MAA1_4/MAA_12 BA2 MDB12 DQB0_11/DQB_11 MAB1_3/MAB_11 MAB12
C28 H16 BA2 57,58 K5 AA7
MDA14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 BA0 MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12 BB2
D A28 J17 BA0 57,58 L4 AA8 BB2 59,60 D
MDA15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 BA1 MDB14 DQB0_13/DQB_13 MAB1_5/BA2 BB0
E28 H17 BA1 57,58 M6 Y8 BB0 59,60
MDA16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 MDB15 DQB0_14/DQB_14 MAB1_6/BA0 BB1
D27 M1 AA9 BB1 59,60
MDA17 DQA0_16/DQA_16 DQMA#0 MDB16 DQB0_15/DQB_15 MAB1_7/BA1
F26 A32 M3
MDA18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 DQMA#1 MDB17 DQB0_16/DQB_16 DQMB#0
Designator For M96-M2 For Madison C26
DQA0_18/DQA_18 WCKA0#_0/DQMA_1
C32 M5
DQB0_17/DQB_17 WCKB0_0/DQMB_0
H3
MDA19 A26 D23 DQMA#2 MDB18 N4 H1 DQMB#1
MDA20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 DQMA#3 MDB19 DQB0_18/DQB_18 WCKB0#_0/DQMB_1 DQMB#2
F24 E22 P6 T3
MDA21 DQA0_20/DQA_20 WCKA0#_1/DQMA_3 DQMA#4 MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB#3
R803/R806 100 40 C24
DQA0_21/DQA_21 WCKA1_0/DQMA_4
C14 P5
DQB0_20/DQB_20 WCKB0#_1/DQMB_3
T5
MDA22 A24 A14 DQMA#5 MDB21 R4 AE4 DQMB#4
MDA23 DQA0_22/DQA_22 WCKA1#_0/DQMA_5 DQMA#6 MDB22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMB#5
E24 E10 T6 AF5
MDA24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 DQMA#7 MDB23 DQB0_22/DQB_22 WCKB1#_0/DQMB_5 DQMB#6
C22
DQA0_24/DQA_24 WCKA1#_1/DQMA_7
D9 Designator For M96-M2 For Madison T1
DQB0_23/DQB_23 WCKB1_1/DQMB_6
AK6
For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1. MDA25 A22 MDB24 U4 AK5 DQMB#7
MDA26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 RDQSA0 MDB25 DQB0_24/DQB_24 WCKB1#_1/DQMB_7
F22 C34 V6
For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1. MDA27 D21
DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0
D29 RDQSA1
DQMA#[0..7] 57,58
R804/R808 100 40 MDB26 V1
DQB0_25/DQB_25 GDDR5/DDR2/GDDR3
F6 RDQSB0
DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 DQMB#[0..7] 59,60
MDA28 A20 D25 RDQSA2 MDB27 V3 K3 RDQSB1
MDA29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 RDQSA3 MDB28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 RDQSB2
F20 E20 Y6 P3
MDA30 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 RDQSA4 MDB29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 RDQSB3
DIVIDER RESISTORS GDDR5 GDDR3 DDR3 D19
DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4
E16 Y1
DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3
V5
MDA31 E18 E12 RDQSA5 For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1. MDB30 Y3 AB5 RDQSB4
MDA32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 RDQSA6 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 RDQSB5
C18 J10 Y5 AH1
MVREF 1.5V 1.8/1.5V 1.5V MDA33 A18
DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6
D7 RDQSA7 For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1. MDB32 AA4
DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5
AJ9 RDQSB6
MDA34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 MDB33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 RDQSB7
F18 RDQSA[0..7] 57,58 AB6 AM5
MDA35 DQA1_2/DQA_34 WDQSA0 MDB34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
D17 A34 AB1 RDQSB[0..7] 59,60
MDA36 DQA1_3/DQA_35 DDBIA0_0/QSA_0#/WDQSA_0 WDQSA1 MDB35 DQB1_2/DQB_34 WDQSB0
MVREF TO PWR 40.2R 40.2R 40.2R A16
DQA1_4/DQA_36 DDBIA0_1/QSA_1#/WDQSA_1
E30 DIVIDER RESISTORS GDDR5 GDDR3 DDR3 AB3
DQB1_3/DQB_35 DDBIB0_0/QSB_0#/WDQSB_0
G7
MDA37 F16 E26 WDQSA2 MDB36 AD6 K1 WDQSB1
MDA38 DQA1_5/DQA_37 DDBIA0_2/QSA_2#/WDQSA_2 WDQSA3 MDB37 DQB1_4/DQB_36 DDBIB0_1/QSB_1#/WDQSB_1 WDQSB2
D15 C20 AD1 P1
MDA39 DQA1_6/DQA_38 DDBIA0_3/QSA_3#/WDQSA_3 WDQSA4 MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2#/WDQSB_2 WDQSB3
MVREF TO GND 100R 100R 100R E14
DQA1_7/DQA_39 DDBIA1_0/QSA_4#/WDQSA_4
C16 MVREF 1.5V 1.8/1.5V 1.5V AD3
DQB1_6/DQB_38 DDBIB0_3/QSB_3#/WDQSB_3
W4
MDA40 F14 C12 WDQSA5 MDB39 AD5 AC4 WDQSB4
MDA41 DQA1_8/DQA_40 DDBIA1_1/QSA_5#/WDQSA_5 WDQSA6 MDB40 DQB1_7/DQB_39 DDBIB1_0/QSB_4#/WDQSB_4 WDQSB5
D13 J11 AF1 AH3
MDA42 DQA1_9/DQA_41 DDBIA1_2/QSA_6#/WDQSA_6 WDQSA7 MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5#/WDQSB_5 WDQSB6
1D5V_VGA
F12
DQA1_10/DQA_42 DDBIA1_3/QSA_7#/WDQSA_7
F8 MVREF TO PWR 40.2R 40.2R 40.2R AF3
DQB1_9/DQB_41 DDBIB1_2/QSB_6#/WDQSB_6
AJ8
MDA43 A12 MDB42 AF6 AM3 WDQSB7
MDA44 DQA1_11/DQA_43 ODTA0 WDQSA[0..7] 57,58 MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7#/WDQSB_7
D11 J21 ODTA0 57 AG4 WDQSB[0..7] 59,60
MDA45 DQA1_12/DQA_44 ADBIA0/ODTA0 ODTA1 MDB44 DQB1_11/DQB_43 ODTB0
F10
DQA1_13/DQA_45 ADBIA1/ODTA1
G19 ODTA1 58 MVREF TO GND 100R 100R 100R AH5
DQB1_12/DQB_44 ADBIB0/ODTB0
T7 ODTB0 59
MDA46 A10 MDB45 AH6 W7 ODTB1
ODTB1 60
1

MDA47 DQA1_14/DQA_46 CLKA0 MDB46 DQB1_13/DQB_45 ADBIB1/ODTB1


C10 H27 CLKA0 57 AJ4
R803 MDA48 DQA1_15/DQA_47 CLKA0 CLKA0# MDB47 DQB1_14/DQB_46 CLKB0
G13 G27 CLKA0# 57 AK3 L9 CLKB0 59
40D2R2F-GP MDA49 DQA1_16/DQA_48 CLKA0# 1D5V_VGA MDB48 DQB1_15/DQB_47 CLKB0 CLKB0#
DIS H13
DQA1_17/DQA_49
AF8
DQB1_16/DQB_48 CLKB0#
L8 CLKB0# 59
MDA50 J13 J14 CLKA1 MDB49 AF9
DQA1_18/DQA_50 CLKA1 CLKA1 58 DQB1_17/DQB_49
MDA51 H11 H14 CLKA1# MDB50 AG8 AD8 CLKB1
2

MDA52 DQA1_19/DQA_51 CLKA1# CLKA1# 58 MDB51 DQB1_18/DQB_50 CLKB1 CLKB1# CLKB1 60


G10 AG7 AD7 CLKB1# 60

1
MDA53 DQA1_20/DQA_52 RASA0# MDB52 DQB1_19/DQB_51 CLKB1#
G8 K23 RASA0# 57 AK9
MDA54 DQA1_21/DQA_53 RASA0# RASA1# R804 MDB53 DQB1_20/DQB_52 RASB0#
K9 K19 RASA1# 58 AL7 T10 RASB0# 59
C1085 C1086 MDA55 DQA1_22/DQA_54 RASA1# 40D2R2F-GP MDB54 DQB1_21/DQB_53 RASB0# RASB1#
C K10 DIS AM8 Y10 RASB1# 60
C
1

1D5V_VGA R805 MDA56 DQA1_23/DQA_55 CASA0# MDB55 DQB1_22/DQB_54 RASB1#


G9 K20 CASA0# 57 AM7
DQA1_24/DQA_56 CASA0# DQB1_23/DQB_55
SCD01U16V2KX-3GP

SCD1U16V2KX-3GP

100R2F-L1-GP-U MDA57 A8 K17 CASA1# MDB56 AK1 W10 CASB0#

2
DQA1_25/DQA_57 CASA1# CASA1# 58 DQB1_24/DQB_56 CASB0# CASB0# 59
DIS DIS DIS MDA58 C8 MDB57 AL4 AA10 CASB1#
CASB1# 60
2

MDA59 DQA1_26/DQA_58 CSA0#_0 MDB58 DQB1_25/DQB_57 CASB1#


E8 K24 CSA0#_0 57 AM6
1

MDA60 DQA1_27/DQA_59 CSA0#_0 MDB59 DQB1_26/DQB_58 CSB0#_0


A6 K27 AM1 P10
2

MDA61 DQA1_28/DQA_60 CSA0#_1 1D5V_VGA MDB60 DQB1_27/DQB_59 CSB0#_0 CSB0#_0 59


R806 C6 C1087 AN4 L10

1
40D2R2F-GP MDA62 DQA1_29/DQA_61 CSA1#_0 R807 MDB61 DQB1_28/DQB_60 CSB0#_1
DIS E6
DQA1_30/DQA_62 CSA1#_0
M13 CSA1#_0 58 AP3
DQB1_29/DQB_61

SCD1U16V2KX-3GP
MDA63 A5 K16 100R2F-L1-GP-U DIS MDB62 AP1 AD10 CSB1#_0
DQA1_31/DQA_63 CSA1#_1 DQB1_30/DQB_62 CSB1#_0 CSB1#_0 60
DIS MDB63 AP5 AC10
2

2
1
MVREFDA CKEA0 DQB1_31/DQB_63 CSB1#_1
L18 K21 CKEA0 57
MVREFSA MVREFDA CKEA0 CKEA1 R808 CKEB0
L20 J20 U10

2
MVREFSA CKEA1 CKEA1 58 40D2R2F-GP CKEB0 CKEB0 59
DIS MVREFDB Y12 AA11 CKEB1
1D5V_VGA MVREFDB CKEB1 CKEB1 60
C1088 C1089 Madison
1 2 MBM_CALRN0 L27 K26 WEA0# MVREFSB AA12
WEA0# 57
1

MEM_CALRN0 WEA0# MVREFSB


R811 243R2F-2-GP Park1 2 R809 MBM_CALRN1 N12 L15 WEA1# N10 WEB0#

2
MEM_CALRN1 WEA1# WEA1# 58 WEB0# WEB0# 59
SCD01U16V2KX-3GP

SCD1U16V2KX-3GP

DIS 100R2F-L1-GP-U 243R2F-2-GP Madison


1 2 R810 MBM_CALRN2AG12 AB11 WEB1#
WEB1# 60
243R2F-2-GP R812 MEM_CALRN2 WEB1#
DIS
2

DIS Park-M96
1 2 MBM_CALRP1 M12 H23 MAA13_R 1 R856 2
MEM_CALRP1 MAA0_8 MAA13 57,58
243R2F-2-GP Madison
1 2 R813 MBM_CALRP0 M27 J19 C1090 3D3V_VGA 1 R900 2 TESTEN AD28 T8 MAB13_R 1 R857 2 MAB13 59,60
2

1
MEM_CALRP0 MAA1_8 TESTEN MAB0_8
243R2F-2-GP Madison
1 2 R814 MBM_CALRP2AH12 0R2J-2-GP R817 W8
GDDR5

MEM_CALRP2 MAB1_8

SCD1U16V2KX-3GP
243R2F-2-GP R816 100R2F-L1-GP-U DIS 10KR2F-2-GP CLKTESTA AK10 1D5V_VGA 0R2J-2-GP
Madison

GDDR5
CLKTESTB AL10 CLKTESTA
DIS ATI-ES AH11
Madison-Park

2
R815 R615 R616 CLKTESTB DRAM_RST#

1
1KR2J-1-GP

4K7R2F-GP

4K7R2F-GP
R81

2
CO-LAYOUT M96 4K7R2J-2-GP
M96
ATI-MP-M96 M96 M96
Madison: MEM_CALRP[0,2] signals are used. MADISON-PRO-GP DIS MADISON-PRO-GP DIS 1 R863 2

2
SB 1008 0R2J-2-GP
Park: MEM_CALRP1 and MEM_CALRN1 are used 1 R818 2
71.MDSON.M01 71.MDSON.M01 VRAM_RST 57,58,59,60
680R2F-GP
Madison-Park

1
R82 R819 C1091 C81

Madison-Park
M96 M96

Madison-Park
SC68P50V2JN-1GP

SC1KP50V2KX-1GP
AMD RESERVED CONFIGURATION STRAPS need check M9x schematic

2
4K7R2J-2-GP

10KR2F-2-GP
RECOMMENDED SETTINGS
STRAPS PIN DESCRIPTION 0= DO NOT INSTALL RESISTOR ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
HW STRAP PIN

2
1 = INSTALL 10K RESISTOR THEY MUST NOT CONFLICT DURING RESET
X = DESIGN DEPENDANT
3D3V_VGA
NA = NOT APPLICABLE
PCIE FULL TX OUTPUT SWING H2SYNC, GENERICC, GPIO2, GPIO21
B TX_PWRS_ENB Tansmitter Power Savings Enable DIS B
GPIO0 0= 50% Tx output swing 53 GPIO_VGA_00 R820 1 2 10KR2J-3-GP
(Internal PD) 1= Full Tx output swing X DIS
If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1 R821 1 2 10KR2J-3-GP
53 GPIO_VGA_01
Transmitter De-emphasis Enable Size of the primary Madison-Park
TX_DEEMPH_EN GPIO1 0= Tx de-emphasis disabled memory apertures GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11] 53 GPIO_VGA_02
R822 1 2 10KR2J-3-GP
X
1= Tx de-emphasis enabled
(Internal PD) DIS
128MB x000 M25P05A 0100 R823 1 2 10KR2J-3-GP
53 GPIO_VGA_05
256MB x001 ST M25P10A 0101
RESERVED GPIO8 RESERVED 0 V 64MB x010 Microelectronics M25P20 0101
DY
R824 1 2 10KR2J-3-GP
53 GPIO_VGA_08
32MB x M25P40 0101
512MB x M25P80 0101 DY
BIF_VGA_DIS GPIO9 VGA ENABLED 0
53 GPIO_VGA_09
R825 1 2 10KR2J-3-GP
1GB x
2GB x Chingis Pm25LV512A 0100 DIS
(formerly PMC) R826 1 2 10KR2J-3-GP
4GB x Pm25LV010A 0101 53 GPIO_VGA_11
RESERVED GPIO21 RESERVED 0

DY
R827 1 2 10KR2J-3-GP
53 GPIO_VGA_22
BIOS_ROM_EN GPIO22_ROMCSB ENABLE EXTERNAL BIOS ROM 0

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT


VIP_DEVICE_STRAP_ENA DIS
GPIO[13,12,11] if BIOS_ROM_EN=1,then Config[3:0] X X X R828 1 2 10KR2J-3-GP
19,53 CRT_HSYNC
defines the ROM type
(Internal PD) if BIOS_ROM_EN=0,then Config[3:0] 19,53 CRT_VSYNC
R829 1 2 10KR2J-3-GP
DIS
defines the primary memory apeture size

R830 1 2 10KR2J-3-GP
53 GPIO_VGA_12
RSVD V2SYNC 0 DY
R831 1 2 10KR2J-3-GP
53 GPIO_VGA_13
A
RSVD H2SYNC 0 DY A

AUD[1:0]
AUD[1] VGA_HSYNC 00:No audio function X
X
AUD[0] VGA_VSYNC
01:Audio for DisplayPort and HDMI
( if adapter is detected) JV71-MV DDR3 Madison
(Internal PD) 10:Audio for DisplayPort only
11:Audio for both DisplayPort and HDMI
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Madison ( 5 of 5 ) MEMORY/ST
Size Document Number Rev
A2
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 56 of 62
5 4 3 2 1
5 4 3 2 1

DDR3
1D5V_VGA
SB 0818
FBRAM1 FBRAM2
1D5V_VGA
K8 E3 MDA19 K8 E3 MDA11
K2
VDD DQL0
F7 MDA18 K2
VDD DQL0
F7 MDA14 MDA8~15
N1
VDD
VDD
DQL1
DQL2 F2 MDA23 MDA16~23 N1
VDD
VDD
DQL1
DQL2 F2 MDA8
R9 F8 MDA22 R9 F8 MDA12
VDD DQL3 MDA16 VDD DQL3 MDA9
D B2 VDD DQL4 H3 B2 VDD DQL4 H3 D
D9 H8 MDA20 D9 H8 MDA13
VDD DQL5 MDA21 VDD DQL5 MDA10
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDA17 R1 H7 MDA15
1D5V_VGA VDD DQL7 1D5V_VGA VDD DQL7
N9 N9

A8
VDD
DQU0 D7
C3
MDA27
MDA28 A8
VDD
DQU0 D7
C3
MDA4
MDA0 1D5V_VGA
2.16A
A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDA30 MDA24~31 A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDA7 MDA0~7
C1 C2 MDA24 C1 C2 MDA3
VDDQ DQU3 MDA25 VDDQ DQU3 MDA5
C9 VDDQ DQU4 A7 C9 VDDQ DQU4 A7

1
D2 A2 MDA31 D2 A2 MDA1 C1092 C1093 C1094 C1095 C1096 C1097 C1098 C1099 C1100 C1101
VDDQ DQU5 VDDQ DQU5

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
E9 B8 MDA26 E9 B8 MDA6
VDDQ DQU6 MDA29 VDDQ DQU6 MDA2
F1 A3 F1 A3

2
VDDQ DQU7 VDDQ DQU7
H9 VDDQ H9 VDDQ
H2 C7 RDQSA3 H2 C7 RDQSA0 DIS DIS DIS DIS DIS

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96
VDDQ DQSU W DQSA3 RDQSA3 56 VDDQ DQSU W DQSA0 RDQSA0 56
DQSU# B7 W DQSA3 56 DQSU# B7 W DQSA0 56
MAA_VREF12 H1 MAA_VREF12 H1
R832 VREFDQ R833 VREFDQ
M8 F3 RDQSA2 M8 F3 RDQSA1
MAA_ZQ0 VREFCA DQSL W DQSA2 RDQSA2 56 VREFCA DQSL RDQSA1 56
2 1 L8 ZQ DQSL# G3 W DQSA2 56 2 1MAA_ZQ1 L8 ZQ DQSL# G3 W DQSA1
W DQSA1 56
243R2F-2-GP 243R2F-2-GP
Madison-M96 K1 ODTA0 Madison-M96 K1 ODTA0
MAA0 ODT ODTA0 56 MAA0 ODT ODTA0 56
N3 A0 N3 A0

1
MAA1 P7 MAA1 P7 C1102 C1103 C1104 C1105 C1106 C1107 C1108 C1109 C1110 C1111
A1 A1

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
MAA2 P3 L2 CSA0#_0 MAA2 P3 L2 CSA0#_0
MAA3 A2 CS# CSA0#_0 56 MAA3 A2 CS# CSA0#_0 56
N2 T2 N2 T2

2
MAA4 A3 RESET# MAA4 A3 RESET#
P8 A4 P8 A4
MAA5 P2 MAA5 P2 DIS DIS DIS DIS DIS DIS

Madison-M96

Madison-M96

Madison-M96

Madison-M96
MAA6 A5 MAA6 A5
R8 A6 NC#T7 T7 VRAM_RST 56,58,59,60 R8 A6 NC#T7 T7 VRAM_RST 56,58,59,60
MAA7 R2 L9 MAA7 R2 L9
C MAA8 A7 NC#L9 MAA8 A7 NC#L9 C
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAA9 R3 J9 MAA9 R3 J9
MAA10 A9 NC#J9 MAA10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAA11 R7 MAA11 R7
MAA12 A11 MAA12 A11
N7 A12/BC# N7 A12/BC#
MAA13 T3 J8 MAA13 T3 J8
56,58 MAA13 A13 VSS 56,58 MAA13 A13 VSS

1
M7 M1 M7 M1 C1112 C1113 C1114 C1115 C1116 C1117 C1118
NC#M7 VSS NC#M7 VSS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VSS M9 VSS M9
J2 J2

2
BA0 VSS BA0 VSS
56,58 BA0 M2 BA0 VSS P9 56,58 BA0 M2 BA0 VSS P9
BA1 N8 G8 BA1 N8 G8 DIS DIS DIS

Madison-M96

Madison-M96

Madison-M96

Madison-M96
56,58 BA1 BA1 VSS 56,58 BA1 BA1 VSS
BA2 M3 B3 BA2 M3 B3
56,58 BA2 BA2 VSS 56,58 BA2 BA2 VSS
VSS T1 VSS T1
VSS A9 VSS A9
CLKA0 J7 T9 CLKA0 J7 T9
56 CLKA0 CLKA0# CK VSS 56 CLKA0 CLKA0# CK VSS
56 CLKA0# K7 CK# VSS E1 56 CLKA0# K7 CK# VSS E1
VSS P1 VSS P1
CKEA0 K9 CKEA0 K9
56 CKEA0 CKE 56 CKEA0 CKE
VSSQ G1 VSSQ G1

1
F9 F9 C1119 C1120 C1121 C1122 C1169 C1173 C1066 C1171 C1172
VSSQ VSSQ

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
DQMA#3 D3 E8 DQMA#0 D3 E8
56 DQMA#3 DMU VSSQ 56 DQMA#0 DMU VSSQ

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
DQMA#2 E7 E2 DQMA#1 E7 E2

2
56 DQMA#2 DML VSSQ 56 DQMA#1 DML VSSQ
VSSQ D8 VSSQ D8
D1 D1 DIS DIS DIS DIS

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96
W EA0# VSSQ W EA0# VSSQ
56 W EA0# L3 WE# VSSQ B9 56 W EA0# L3 WE# VSSQ B9
CASA0# K3 B1 CASA0# K3 B1
56 CASA0# RASA0# CAS# VSSQ 56 CASA0# RASA0# CAS# VSSQ
56 RASA0# J3 RAS# VSSQ G9 56 RASA0# J3 RAS# VSSQ G9

B K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP B

Madison-M96 Madison-M96

72.41164.H0U 72.41164.H0U
CLKA0#

CLKA0

1
R834 R835
Madison-M96 Madison-M96 1D5V_VGA

56R2F-1-GP

56R2F-1-GP

1
2

2
R836
Madison-M96 1K05R2F-GP

HYUNIX 1ST=72.51G63.C0U

2
MAA_VREF12
56,58 DQMA#[0..7] SAMSUNG 2ND=72.41164.H0U

1
Madison-M96

1
Madison-M96 Madison-M96 R837 C1124
56,58 RDQSA[0..7]
AMD 3RD=VR.1GB0T.002 C1123 1K05R2F-GP SCD01U50V2KX-1GP

2
SCD01U50V2KX-1GP

2
56,58 W DQSA[0..7]

A JV71-MV DDR3 Madison A


MAA[0..12]
56,58 MAA[0..12]

MDA[0..63]
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
56,58 MDA[0..63]
Taipei Hsien 221, Taiwan, R.O.C.

Title

VRAM( 1 of 4 )
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 57 of 62
5 4 3 2 1
5 4 3 2 1

DDR3
FBRAM4
FBRAM3 1D5V_VGA
1D5V_VGA K8 E3 MDA55
MDA43 VDD DQL0 MDA51
K8 E3 K2 F7
K2
VDD DQL0
F7 MDA44 N1
VDD DQL1
F2 MDA53 MDA48~55
N1
VDD
VDD
DQL1
DQL2 F2 MDA42 MDA40~47 R9
VDD
VDD
DQL2
DQL3 F8 MDA48
R9 F8 MDA46 B2 H3 MDA52
VDD DQL3 MDA40 VDD DQL4 MDA50
D B2 VDD DQL4 H3 D9 VDD DQL5 H8 D
D9 H8 MDA47 G7 G2 MDA54
VDD DQL5 MDA41 VDD DQL6 MDA49
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDA45 1D5V_VGA N9
1D5V_VGA VDD DQL7 VDD MDA61
N9 VDD DQU0 D7
D7 MDA36 A8 C3 MDA62
A8
DQU0
C3 MDA35 A1
VDDQ DQU1
C8 MDA58 MDA56~63
A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDA39 MDA32~39 C1
VDDQ
VDDQ
DQU2
DQU3 C2 MDA56
C1 C2 MDA33 C9 A7 MDA60
VDDQ DQU3 MDA37 VDDQ DQU4 MDA59
C9 VDDQ DQU4 A7 D2 VDDQ DQU5 A2
D2 A2 MDA32 E9 B8 MDA57
VDDQ DQU5 MDA38 VDDQ DQU6 MDA63
E9 VDDQ DQU6 B8 F1 VDDQ DQU7 A3
F1 A3 MDA34 H9
VDDQ DQU7 VDDQ RDQSA7
H9 VDDQ H2 VDDQ DQSU C7 RDQSA7 56
H2 C7 RDQSA4 B7 W DQSA7
VDDQ DQSU W DQSA4 RDQSA4 56 MAA_VREF34 DQSU# W DQSA7 56
DQSU# B7 W DQSA4 56 H1 VREFDQ
MAA_VREF34 H1 M8 F3 RDQSA6
VREFDQ RDQSA5 VREFCA DQSL RDQSA6 56
M8 VREFCA DQSL F3 RDQSA5 56 2 R838 1MAA_ZQ3 L8 ZQ DQSL# G3 W DQSA6
W DQSA6 56
2 R839 1MAA_ZQ2 L8 ZQ DQSL# G3 W DQSA5
W DQSA5 56
243R2F-2-GP
Madison-M96 Madison-M96 K1 ODTA1
243R2F-2-GP ODTA1 MAA0 ODT ODTA1 56
ODT K1 ODTA1 56 N3 A0
MAA0 N3 MAA1 P7
MAA1 A0 MAA2 A1 CSA1#_0
P7 A1 P3 A2 CS# L2 CSA1#_0 56
MAA2 P3 L2 CSA1#_0 MAA3 N2 T2
MAA3 A2 CS# CSA1#_0 56 MAA4 A3 RESET#
N2 A3 RESET# T2 P8 A4
MAA4 P8 MAA5 P2
MAA5 A4 MAA6 A5
P2 A5 R8 A6 NC#T7 T7 VRAM_RST 56,57,59,60
MAA6 R8 T7 MAA7 R2 L9
A6 NC#T7 VRAM_RST 56,57,59,60 A7 NC#L9
MAA7 R2 L9 MAA8 T8 L1
C MAA8 A7 NC#L9 MAA9 A8 NC#L1 C
T8 A8 NC#L1 L1 R3 A9 NC#J9 J9
MAA9 R3 J9 MAA10 L7 J1
MAA10 A9 NC#J9 MAA11 A10/AP NC#J1
L7 A10/AP NC#J1 J1 R7 A11
MAA11 R7 MAA12 N7
MAA12 A11 MAA13 A12/BC#
N7 A12/BC# 56,57 MAA13 T3 A13 VSS J8
MAA13 T3 J8 M7 M1
56,57 MAA13 A13 VSS NC#M7 VSS
M7 NC#M7 VSS M1 VSS M9
VSS M9 VSS J2
J2 BA0 M2 P9
VSS 56,57 BA0 BA0 VSS
BA0 M2 P9 BA1 N8 G8
56,57 BA0 BA0 VSS 56,57 BA1 BA1 VSS
BA1 N8 G8 BA2 M3 B3 CLKA1#
56,57 BA1 BA1 VSS 56,57 BA2 BA2 VSS
BA2 M3 B3 T1
56,57 BA2 BA2 VSS VSS
T1 A9 CLKA1
VSS CLKA1 VSS
VSS A9 56 CLKA1 J7 CK VSS T9

1
CLKA1 J7 T9 CLKA1# K7 E1
56 CLKA1 CLKA1# CK VSS 56 CLKA1# CK# VSS R840 R841
56 CLKA1# K7 CK# VSS E1 VSS P1
P1 CKEA1 K9 Madison-M96 Madison-M96
VSS 56 CKEA1 CKE

56R2F-1-GP

56R2F-1-GP
CKEA1 K9 G1
56 CKEA1 CKE VSSQ
G1 F9

2
VSSQ DQMA#7 VSSQ
VSSQ F9 56 DQMA#7 D3 DMU VSSQ E8
DQMA#4 D3 E8 DQMA#6 E7 E2
56 DQMA#4 DQMA#5 DMU VSSQ 56 DQMA#6 DML VSSQ
56 DQMA#5 E7 DML VSSQ E2 VSSQ D8
VSSQ D8 VSSQ D1
D1 W EA1# L3 B9
W EA1# VSSQ 56 W EA1# CASA1# WE# VSSQ
56 W EA1# L3 WE# VSSQ B9 56 CASA1# K3 CAS# VSSQ B1
CASA1# K3 B1 RASA1# J3 G9
56 CASA1# CAS# VSSQ 56 RASA1# RAS# VSSQ

1
RASA1# J3 G9
56 RASA1# RAS# VSSQ C1125
Madison-M96
K4W 1G1646E-HC12-GP SCD01U50V2KX-1GP

2
B K4W 1G1646E-HC12-GP B

Madison-M96
Madison-M96
72.41164.H0U
72.41164.H0U

1D5V_VGA

1
R842
Madison-M96 1K05R2F-GP

HYUNIX 1ST=72.51G63.C0U

2
MAA_VREF34
56,57 DQMA#[0..7] SAMSUNG 2ND=72.41164.H0U

1
Madison-M96
R843 C1126
56,57 RDQSA[0..7]
AMD 3RD=VR.1GB0T.002 Madison-M96 1K05R2F-GP SCD01U50V2KX-1GP

2
2
56,57 W DQSA[0..7]

MAA[0..12]
56,57 MAA[0..12]
A JV71-MV DDR3 Madison A

MDA[0..63]
56,57 MDA[0..63]
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VRAM( 2 fo 4 )
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 58 of 62
5 4 3 2 1
5 4 3 2 1

DDR3
FBRAM5 FBRAM6
1D5V_VGA 1D5V_VGA
K8 E3 MDB21 K8 E3 MDB11
VDD DQL0 MDB20 VDD DQL0 MDB14
K2 F7 K2 F7
N1
VDD
VDD
DQL1
DQL2 F2 MDB22 MDA16~23 N1
VDD
VDD
DQL1
DQL2 F2 MDB8 MDA8~15
R9 F8 MDB16 R9 F8 MDB10
VDD DQL3 MDB19 VDD DQL3 MDB15
D B2 VDD DQL4 H3 B2 VDD DQL4 H3 D
D9 H8 MDB17 D9 H8 MDB13
VDD DQL5 MDB23 VDD DQL5 MDB9
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDB18 R1 H7 MDB12
1D5V_VGA VDD DQL7 1D5V_VGA VDD DQL7
N9 VDD N9 VDD
D7 MDB30 D7 MDB4
DQU0 MDB27 DQU0 MDB3
A8 C3 A8 C3
A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDB25 MDA24~31 A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDB7 MDA0~7
C1 C2 MDB28 C1 C2 MDB0
VDDQ DQU3 MDB24 VDDQ DQU3 MDB5
C9 VDDQ DQU4 A7 C9 VDDQ DQU4 A7
D2 A2 MDB31 D2 A2 MDB1
VDDQ DQU5 MDB29 VDDQ DQU5 MDB6
E9 VDDQ DQU6 B8 E9 VDDQ DQU6 B8
F1 A3 MDB26 F1 A3 MDB2
VDDQ DQU7 VDDQ DQU7
H9 VDDQ H9 VDDQ
H2 C7 RDQSB3 H2 C7 RDQSB0
VDDQ DQSU W DQSB3 RDQSB3 56 VDDQ DQSU W DQSB0 RDQSB0 56
DQSU# B7 W DQSB3 56 DQSU# B7 W DQSB0 56
MAB_VREF12 H1 MAB_VREF12 H1
VREFDQ RDQSB2 VREFDQ RDQSB1
M8 VREFCA DQSL F3 RDQSB2 56 M8 VREFCA DQSL F3 RDQSB1 56
2 R844 1MAB_ZQ0 L8 ZQ DQSL# G3 W DQSB2
W DQSB2 56 2 R845 1MAB_ZQ1 L8 ZQ DQSL# G3 W DQSB1
W DQSB1 56
243R2F-2-GP 243R2F-2-GP
DIS K1 ODTB0 DIS K1 ODTB0
MAB0 ODT ODTB0 56 MAB0 ODT ODTB0 56
N3 A0 N3 A0
MAB1 P7 MAB1 P7
MAB2 A1 CSB0#_0 MAB2 A1 CSB0#_0
P3 A2 CS# L2 CSB0#_0 56 P3 A2 CS# L2 CSB0#_0 56
MAB3 N2 T2 MAB3 N2 T2
MAB4 A3 RESET# MAB4 A3 RESET#
P8 A4 P8 A4
MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5
R8 A6 NC#T7 T7 VRAM_RST 56,57,58,60 R8 A6 NC#T7 T7 VRAM_RST 56,57,58,60
MAB7 R2 L9 MAB7 R2 L9
C MAB8 A7 NC#L9 MAB8 A7 NC#L9 C
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAB9 R3 J9 MAB9 R3 J9
MAB10 A9 NC#J9 MAB10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAB11 R7 MAB11 R7
MAB12 A11 MAB12 A11
N7 A12/BC# N7 A12/BC#
MAB13 T3 J8 MAB13 T3 J8
56,60 MAB13 A13 VSS 56,60 MAB13 A13 VSS
M7 NC#M7 VSS M1 M7 NC#M7 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
BB0 M2 P9 BB0 M2 P9
56,60 BB0 BA0 VSS 56,60 BB0 BA0 VSS
BB1 N8 G8 BB1 N8 G8
56,60 BB1 BA1 VSS 56,60 BB1 BA1 VSS
BB2 M3 B3 BB2 M3 B3 CLKB0#
56,60 BB2 BA2 VSS 56,60 BB2 BA2 VSS
VSS T1 VSS T1
A9 A9 CLKB0
CLKB0 VSS CLKB0 VSS
56 CLKB0 J7 CK VSS T9 56 CLKB0 J7 CK VSS T9

1
CLKB0# K7 E1 CLKB0# K7 E1
56 CLKB0# CK# VSS 56 CLKB0# CK# VSS R846 R847
VSS P1 VSS P1
CKEB0 K9 CKEB0 K9 DIS
56 CKEB0 CKE 56 CKEB0 CKE

56R2F-1-GP

56R2F-1-GP
VSSQ G1 VSSQ G1 DIS
F9 F9

2
DQMB#3 VSSQ DQMB#0 VSSQ
56 DQMB#3 D3 DMU VSSQ E8 56 DQMB#0 D3 DMU VSSQ E8
DQMB#2 E7 E2 DQMB#1 E7 E2
56 DQMB#2 DML VSSQ 56 DQMB#1 DML VSSQ
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
W EB0# L3 B9 W EB0# L3 B9
56 W EB0# CASB0# WE# VSSQ 56 W EB0# CASB0# WE# VSSQ
56 CASB0# K3 CAS# VSSQ B1 56 CASB0# K3 CAS# VSSQ B1
RASB0# J3 G9 RASB0# J3 G9
56 RASB0# RAS# VSSQ 56 RASB0# RAS# VSSQ

1
C1127
B K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP SCD01U50V2KX-1GP B

2
DIS
72.41164.H0U 72.41164.H0U

DIS DIS
1D5V_VGA

1
R848
1K05R2F-GP
HYUNIX 1ST=72.51G63.C0U DIS
SAMSUNG 2ND=72.41164.H0U

2
MAB_VREF12
56,60 DQMB#[0..7]
AMD 3RD=VR.1GB0T.002

1
R849 C1128
56,60 RDQSB[0..7] 1K05R2F-GP SCD01U50V2KX-1GP

2
DIS DIS
56,60 W DQSB[0..7]

2
MAB[0..12]
56,60 MAB[0..12]

A JV71-MV DDR3 Madison A

MDB[0..63]
56,60 MDB[0..63]
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VRAM( 3 of 4 )
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 59 of 62
5 4 3 2 1
5 4 3 2 1

DDR3
FBRAM7 FBRAM8
1D5V_VGA 1D5V_VGA
K8 E3 MDB42 K8 E3 MDB52
K2
VDD DQL0
F7 MDB41 K2
VDD DQL0
F7 MDB50 MDA48~55
N1
VDD
VDD
DQL1
DQL2 F2 MDB46 MDA40~47 N1
VDD
VDD
DQL1
DQL2 F2 MDB48
R9 F8 MDB43 R9 F8 MDB49
VDD DQL3 MDB44 VDD DQL3 MDB53
D B2 VDD DQL4 H3 B2 VDD DQL4 H3 D
D9 H8 MDB40 D9 H8 MDB54
VDD DQL5 MDB47 VDD DQL5 MDB51
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDB45 R1 H7 MDB55
1D5V_VGA VDD DQL7 1D5V_VGA VDD DQL7
N9 VDD N9 VDD
D7 MDB37 D7 MDB61
A8
DQU0
C3 MDB35 A8
DQU0
C3 MDB59 MDA56~63
A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDB34 MDA32~39 A1
VDDQ
VDDQ
DQU1
DQU2 C8 MDB63
C1 C2 MDB39 C1 C2 MDB56
VDDQ DQU3 MDB38 VDDQ DQU3 MDB60
C9 VDDQ DQU4 A7 C9 VDDQ DQU4 A7
D2 A2 MDB32 D2 A2 MDB58
VDDQ DQU5 MDB36 VDDQ DQU5 MDB62
E9 VDDQ DQU6 B8 E9 VDDQ DQU6 B8
F1 A3 MDB33 F1 A3 MDB57
VDDQ DQU7 VDDQ DQU7
H9 VDDQ H9 VDDQ
H2 C7 RDQSB4 H2 C7 RDQSB7
VDDQ DQSU W DQSB4 RDQSB4 56 VDDQ DQSU W DQSB7 RDQSB7 56
DQSU# B7 W DQSB4 56 DQSU# B7 W DQSB7 56
MAB_VREF34 H1 MAB_VREF34 H1
VREFDQ R851 VREFDQ
M8 F3 RDQSB5 M8 F3 RDQSB6
VREFCA DQSL RDQSB5 56 VREFCA DQSL RDQSB6 56
2 R850 1MAB_ZQ2 L8 ZQ DQSL# G3 W DQSB5
W DQSB5 56 2 1MAB_ZQ3 L8 ZQ DQSL# G3 W DQSB6
W DQSB6 56
243R2F-2-GP 243R2F-2-GP
DIS K1 ODTB1 DIS K1 ODTB1
MAB0 ODT ODTB1 56 MAB0 ODT ODTB1 56
N3 A0 N3 A0
MAB1 P7 MAB1 P7
MAB2 A1 CSB1#_0 MAB2 A1 CSB1#_0
P3 A2 CS# L2 CSB1#_0 56 P3 A2 CS# L2 CSB1#_0 56
MAB3 N2 T2 MAB3 N2 T2
MAB4 A3 RESET# MAB4 A3 RESET#
P8 A4 P8 A4
MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5
R8 A6 NC#T7 T7 VRAM_RST 56,57,58,59 R8 A6 NC#T7 T7 VRAM_RST 56,57,58,59
MAB7 R2 L9 MAB7 R2 L9
C MAB8 A7 NC#L9 MAB8 A7 NC#L9 C
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAB9 R3 J9 MAB9 R3 J9
MAB10 A9 NC#J9 MAB10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAB11 R7 MAB11 R7
MAB12 A11 MAB12 A11
N7 A12/BC# N7 A12/BC#
MAB13 T3 J8 MAB13 T3 J8
56,59 MAB13 A13 VSS 56,59 MAB13 A13 VSS
M7 NC#M7 VSS M1 M7 NC#M7 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
BB0 M2 P9 BB0 M2 P9
56,59 BB0 BA0 VSS 56,59 BB0 BA0 VSS
BB1 N8 G8 BB1 N8 G8
56,59 BB1 BA1 VSS 56,59 BB1 BA1 VSS
BB2 M3 B3 BB2 M3 B3
56,59 BB2 BA2 VSS 56,59 BB2 BA2 VSS
T1 T1 CLKB1#
VSS VSS
VSS A9 VSS A9
CLKB1 J7 T9 CLKB1 J7 T9 CLKB1
56 CLKB1 CLKB1# CK VSS 56 CLKB1 CLKB1# CK VSS
56 CLKB1# K7 CK# VSS E1 56 CLKB1# K7 CK# VSS E1

1
VSS P1 VSS P1
CKEB1 K9 CKEB1 K9 R852 R853
56 CKEB1 CKE 56 CKEB1 CKE
VSSQ G1 VSSQ G1 DIS

56R2F-1-GP

56R2F-1-GP
VSSQ F9 VSSQ F9 DIS
DQMB#4 D3 E8 DQMB#7 D3 E8

2
56 DQMB#4 DQMB#5 DMU VSSQ 56 DQMB#7 DQMB#6 DMU VSSQ
56 DQMB#5 E7 DML VSSQ E2 56 DQMB#6 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
W EB1# L3 B9 W EB1# L3 B9
56 W EB1# CASB1# WE# VSSQ 56 W EB1# CASB1# WE# VSSQ
56 CASB1# K3 CAS# VSSQ B1 56 CASB1# K3 CAS# VSSQ B1
RASB1# J3 G9 RASB1# J3 G9
56 RASB1# RAS# VSSQ 56 RASB1# RAS# VSSQ

1
B K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP C1129 B
SCD01U50V2KX-1GP

2
72.41164.H0U 72.41164.H0U DIS

DIS DIS
1D5V_VGA

1
R854
1K05R2F-GP
HYUNIX 1ST=72.51G63.C0U DIS
SAMSUNG 2ND=72.41164.H0U

2
MAB_VREF34
56,59 DQMB#[0..7]
AMD 3RD=VR.1GB0T.002

1
R855 C1130
56,59 RDQSB[0..7] 1K05R2F-GP SCD01U50V2KX-1GP

2
DIS DIS
56,59 W DQSB[0..7]

2
MAB[0..12]
56,59 MAB[0..12]

A JV71-MV DDR3 Madison A

MDB[0..63]
56,59 MDB[0..63]
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VRAM( 4 of 4 )
Size Document Number Rev
A3 -1
JV71-MV DDR3 Madison
Date: W ednesday, October 28, 2009 Sheet 60 of 62
5 4 3 2 1
5 4 3 2 1

SA SB SC -1

D D

C C

B B

A A

JV71-MV DDR3 Madison

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HISTORY
Size Document Number Rev
A2
JV71-MV DDR3 Madison -1
Date: Wednesday, October 28, 2009 Sheet 61 of 62
5 4 3 2 1
5 4 3 2 1

LAB-Stage BOM temporary change list


Group Name SKU A SKU B SKU C SKU D SKU A PM45 SKU B PM45 SKU C PM45 SKU D GM45
SKU-A,B
M96 Madison Park UMA
Delete R428 64.15035.6DL
DY,ZZ,65 X X X X Part Name Samsung Hynix Hynix
GFX X X X O Delete Q27 84.27002.W31
NB NB1 KI.G4501.002 KI.G4501.002 KI.G4501.002 KI.G4501.001
NOGFX X X X X Delete R436 63.10334.1DL
SB SB1 KI.80101.030 KI.80101.030 KI.80101.030 KI.80101.030
DIS O O O X
VGA VGA1 71.M96M2.M03 71.MDSON.M01 71.0PARK.M04 X Delete C741 78.10423.5FL
D M96 O X X X D
VRAM FBRAM1~4 VR.1GB0B.006 VR.1GB0G.004 X X Change R429 from 64.75025.6DL to 64.49925.6DL
Madison X O X X
VRAM FBRAM5~8 VR.1GB0B.006 VR.1GB0G.004 VR.1GB0G.004 X
SKU-C
Madison-M96 O O X X
1v_VGA/1.1v_VGA Delete R428 64.15035.6DL
Madison-Park X O O X
R885 64.78715.6DL X X X Delete Q27 84.27002.W31
Park X X O X
R887 64.20525.6DL X X X
Park-M96 O X O X Delete R436 63.10334.1DL
VGA_CORE R428 64.30025.6DL 64.73225.6DL 64.49925.6DL X
UMA X X X O Delete C741 78.10423.5FL
RGB C165,151,108 X X X 78.6R874.1FL
Hynix X O O X Change R429 from 64.75025.6DL to 64.37425.6DL
Hynix-AMD X O O X
TVDAC RN31 X X X 66.75036.08L SKU-B change for Power-Team 2nd source
Hynix-Samsung-AMD O O O X Change U73 from 84.08692.037 to 84.01426.037
CRT RN30 X X X 66.15156.08L
Samsung O X X X Change U75 from 84.07672.037 to 84.01712.037
TRANSFORMER XF1~2 68.HD081.30B 68.HD081.30B 68.HD081.30B 68.HD081.30B
Samsung-AMD O X X X
MVREFDA R803 64.10005.6DL X X X Change U76 from 84.07672.037 to 84.01712.037
ATI-ES X O O X
MVREFSA R806 64.10005.6DL X X X
Change U77 from 84.08692.037 to 84.01426.037
ATI-MP-M96 O X X X
C
MVREFDB R804 64.10005.6DL X X X C
Change U79 from 84.07672.037 to 84.01712.037
MVREFSB R808 64.10005.6DL X X X
Change U41 from 84.08692.037 to 84.01426.037
65 Main 65 2nd 90W/65W DCIN1 22.10037.I21 22.10037.I21 X X
65.4FXZZ.024 65.4FXZZ.025 65BOM 65.4FXZZ.024 65.4FXZZ.024 65.4FXZZ.024 65.4FXZZ.032 Change U17 from 84.07672.037 to 84.01712.037

65.4FXZZ.026 65.4FXZZ.027 65.4FXZZ.026 65.4FXZZ.026 65.4FXZZ.026 65.4FXZZ.026 Change U40 from 84.07672.037 to 84.01712.037
65.4FXZZ.028 65.4FXZZ.029 65.4FXZZ.028
Change TC35 from 79.33719.L01 to 77.C3371.051
65.4FXZZ.032 65.4FXZZ.033
Change TC36 from 79.33719.L01 to 77.C3371.051

Change TC38 from 79.33719.L01 to 77.C3371.051


Group Name SKU E SKU F SKU G SKU E PM45 SKU F PM45 SKU G PM45 Change TC14 from 79.33719.L01 to 77.C3371.051
M96 Madison Park
DY,ZZ,65 X X X Part Name Hynix Samsung Samsung Change TC15 from 79.33719.L01 to 77.C3371.051
GFX X X X
NB NB1 KI.G4501.002 KI.G4501.002 KI.G4501.002 Change L58 from 68.R5610.10P to 68.R5610.10D
NOGFX X X X
SB SB1 KI.80101.030 KI.80101.030 KI.80101.030 Change L59 from 68.1R01B.10J to 68.1R01A.20A
DIS O O O
VGA VGA1 71.M96M2.M03 71.MDSON.M01 71.0PARK.M04
B Change L19 from 68.R5610.10P to 68.R5610.10D B
M96 O X X
VRAM FBRAM1~4 VR.1GB0G.004 VR.1GB0B.006 X
Madison X O X
VRAM FBRAM5~8 VR.1GB0G.004 VR.1GB0B.006 VR.1GB0B.006
Madison-M96 O O X
1v_VGA/1.1v_VGA
Madison-Park X O O
R885 64.78715.6DL X X
Park X X O
R887 64.20525.6DL X X
Park-M96 O X O
VGA_CORE R428 64.30025.6DL 64.73225.6DL 64.49925.6DL
UMA X X X
Hynix O X X
Hynix-AMD O X X
TVDAC RN31 X X X
Hynix-Samsung-AMD O O O
CRT RN30 X X X
Samsung X O O
TRANSFORMER XF1~2 68.HD081.30B 68.HD081.30B 68.HD081.30B
Samsung-AMD X O O
MVREFDA R803 64.10005.6DL X X
ATI-ES X O O
MVREFSA R806 64.10005.6DL X X
ATI-MP-M96 O X X
A MVREFDB R804 64.10005.6DL X X A

MVREFSB R808 64.10005.6DL X X


90W/65W DCIN1 22.10037.I21 22.10037.I21 X JV71-MV DDR3 Madison

65BOM 65.4FXZZ.024 65.4FXZZ.024 65.4FXZZ.024 Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
65.4FXZZ.026 65.4FXZZ.026 65.4FXZZ.026 Taipei Hsien 221, Taiwan, R.O.C.

Title

HISTORY
Size Document Number Rev
A2
JV71-MV DDR3 Madison -1
Date: Thursday, November 05, 2009 Sheet 62 of 62
5 4 3 2 1

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