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5 4 3 2 1

D D

Discrete/UMA /Muxless Schematics Document


AMD LIANO CPU FS1
AMD GPU Manhattan(Park/Madison M2)
C C

and Vancouver(Seymour/Whistler M2)

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

Cover Page
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 1 of 102
5 4 3 2 1
5 4 3 2 1

SYSTEM DC/DC
JE50-SB Project code:91.4M701.001 RT8239 41

JE50-SB Block Diagram INPUTS


DCBATOUT
OUTPUTS
5V_S5(5.5A)
3D3V_S5(5A)

SYSTEM DC/DC
AMD Liano APU X8 PCI EXPRESS GRAPHIC(Muxless Lan8 ~Lan15) RT8207 44
D
DDR3 ( FS1 socket 45W ) X16 PCI EXPRESS GRAPHIC(Diserete only Lan0 ~Lan15)
Madison/Park
5V_S5 1D5V_S3(15A) D

1066/1333 MHz 722-Pin uFCPGA722 DDR3 RT8207 44


DP2(PCI EXPRESS Lan0~Lan3) Whistler/Seymour 512MB/1GB/2GB
14,15,16 VRAM 5V_S5 0D75_S0(1.2A)
GPP X4 port ATI
DP0 83,84,85,86,87 88,89,90,91 SYSTEM DC/DC
DP X6 Port
RT8238 46
DDR3 HDMI 1.Park/Seymour (64Mx16b*4)=>512MB INPUTS OUTPUTS
1066/1333 MHz 4,5,6,7,8 51 2.Park/Seymour(128MX16b *4) =>1GB
3.Madison/Whistler(64Mx16b*8)=>1GB 5V_S5 1D1V_S5(1.4A)
14,15,16 DP1 EDP 4.Madison/Whistler(128Mx16b*8)=>2GB
Panel 49 RT8238 45
UMI-Link
4X4 (Diserete only) 5V_S5 1D2V_S0(5.2A)
LCD
TRAVIS 49
PS8612 9 RT9025 93

FCH CRT 3D3V_S5 1D8V_VGA_S0


INT MIC 50
Codec HUDSON-M3
C 49
ALC271X
AZALIA PCB STACKUP 1D5V_S3 1V_VGA_S0 C

Integrated Display DAC


29 LAN TXFM RJ45 59 TOP RT9025 48
PCIE x 1 59
MIC In USB 3.0 (4parts) Giga LAN VCC 2D5V_S0
3D3V_S0
USB 2.0 BCM57785 31 (200mA)
58 (10 parts or 14 port MS/MS Pro/xD S
if USB 3.0 do not used) /MMC/SD RT8208 92
INT.SPKR 5 in 1 74 S 5V_S5 VGA_CORE
GPP X4 port
GND
58 USB 1.1 (2 parts) CHARGER
SATA (6 parts) PCIE x 1,USB x 1 Mini Card BOTTOM BQ24745 40
INT RTC WLAN 65
INPUTS OUTPUTS
Line Out INT CLK GEN
PCIE x 1,USB x 1
HW MONITOR Mini-Card CHG_PWR
58 SIM 18V 6.0A
ACPI 1.1 WWAN 66 66
DCBATOUT
UP+5V
5V 100mA
B B

USB 3.0 x3,USB x 3


17,18,19,20,21,22 USB3.0 3 PORT61 82
CPU DC/DC
ISL6267 42,43
LPC BUS INPUTS OUTPUTS
VCC_CORE_S0
SATA 0~1.55V 18A
KBC BIOS LPC
DCBATOUT
ENE MXIC DEBUG VDDNB
USB 3.0 x1 MX25L1605 CONN. 71
USB KB3936 0~1.55V 4A
CCD3.0 27 60
HDD SATA 35
56
Mini USB
Blue Tooth 63
Camera
49 Touch INT.
ODD SATA 56 Pad 69 KB 69
<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 2 of 102

5 4 3 2 1
5 4 3 2 1

Strapping
REQUIRED SYSTEM STRAPS USE this pin to determine INT/EXT CLK
D D

EC_PWM2 PCI_CLK1 RTC_CLK CLK_PCI_LPC PCI_CLK4 LPC_CLK0 LPC_CLK1


PCH GPO199
PULL Allow USE CLKGEN
LPC ROM PCIE GEN2 S5_PLUS Mode DEBUG non_Fusion ENABLE EC ENABLED
HIGH
DISABLE STRAPS CLOCK mode
(Use Internal)
DEFAULT DEFAULT DEFAULT
DEFAULT

PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN


SPI ROM PCIE GEN1 ENABLE DEBUG CLOCK mode DISABLED
LOW
STRAPS DEFAULT (Use External)
DEFAULT DEFAULT

USB Table PCIE Routing


USB
C Pair Device
APU C

0 USB 2.0 EXT2(For SW Debug) LANE0 LAN


1 WLAN
2 NC
LANE1 WWAN
3 WWAN LANE2 LAN
4 BT
5 3G SIM Card
LANE3
6 NC
7 CCD FCH
8 NC
9 Card Reader
LANE0
10 USB 3.0 port 1 LANE1
11 USB 2.0 EXT2
12 USB 2.0 EXT3
LANE2
B
13 NC LANE3 B

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 3 of 102

5 4 3 2 1
5 4 3 2 1

APU1F 6 OF 6
PCI EXPRESS
PEG_RXP0 AA8 AA2 GTXP0 DIS 1 2 C401 SCD1U16V2KX-3GP PEG_TXP0 GTXP0 UMA_PX C433 1 2 SCD1U16V2KX-3GP
P_GFX_RXP0 P_GFX_TXP0 APU_HDMI_DATA2 51
PEG_RXN0 AA9 AA3 GTXN0 DIS 1 2 C402 SCD1U16V2KX-3GP PEG_TXN0 GTXN0 UMA_PX C434 1 2 SCD1U16V2KX-3GP
P_GFX_RXN0 P_GFX_TXN0 APU_HDMI_DATA2# 51

SAINE
PEG_RXP1 Y7 Y2 GTXP1 DIS 1 2 C403 SCD1U16V2KX-3GP PEG_TXP1 GTXP1 UMA_PX C435 1 2 SCD1U16V2KX-3GP
P_GFX_RXP1 P_GFX_TXP1 APU_HDMI_DATA1 51
PEG_RXN1 Y8 Y1 GTXN1 DIS 1 2 C404 SCD1U16V2KX-3GP PEG_TXN1 GTXN1 UMA_PX C436 1 2 SCD1U16V2KX-3GP
P_GFX_RXN1 P_GFX_TXN1 APU_HDMI_DATA1# 51
PEG_RXP2 W5 Y4 GTXP2 DIS 1 2 C405 SCD1U16V2KX-3GP PEG_TXP2 GTXP2 UMA_PX C437 1 2 SCD1U16V2KX-3GP
P_GFX_RXP2 P_GFX_TXP2 APU_HDMI_DATA0 51
PEG_RXN2 W6 Y5 GTXN2 DIS 1 2 C406 SCD1U16V2KX-3GP PEG_TXN2 GTXN2 UMA_PX C438 1 2 SCD1U16V2KX-3GP
P_GFX_RXN2 P_GFX_TXN2 APU_HDMI_DATA0# 51
PEG_RXP3 W8 W2 GTXP3 DIS 1 2 C407 SCD1U16V2KX-3GP PEG_TXP3 GTXP3 UMA_PX C439 1 2 SCD1U16V2KX-3GP
P_GFX_RXP3 P_GFX_TXP3 APU_HDMI_CLK 51
D PEG_RXN3 W9 W3 GTXN3 DIS 1 2 C408 SCD1U16V2KX-3GP PEG_TXN3 GTXN3 UMA_PX C440 1 2 SCD1U16V2KX-3GP D
P_GFX_RXN3 P_GFX_TXN3 APU_HDMI_CLK# 51
PEG_RXP4 V7 V2 GTXP4 DIS 1 2 C409 SCD1U16V2KX-3GP PEG_TXP4
PEG_RXN4 P_GFX_RXP4 P_GFX_TXP4 GTXN4 C410 SCD1U16V2KX-3GP PEG_TXN4
V8 P_GFX_RXN4 P_GFX_TXN4 V1 DIS 1 2
PEG_RXP5 U5 V4 GTXP5 DIS 1 2 C411 SCD1U16V2KX-3GP PEG_TXP5
PEG_RXN5 P_GFX_RXP5 P_GFX_TXP5 GTXN5 C412 SCD1U16V2KX-3GP PEG_TXN5
U6 P_GFX_RXN5 P_GFX_TXN5 V5 DIS 1 2
PEG_RXP6 U8 U2 GTXP6 DIS 1 2 C413 SCD1U16V2KX-3GP PEG_TXP6
PEG_RXN6 P_GFX_RXP6 P_GFX_TXP6 GTXN6 C414 SCD1U16V2KX-3GP PEG_TXN6
U9 U3 DIS 1 2

GRAPHICS
PEG_RXP7 P_GFX_RXN6 P_GFX_TXN6 GTXP7 C415 SCD1U16V2KX-3GP PEG_TXP7
T7 P_GFX_RXP7 P_GFX_TXP7 T2 DIS 1 2
PEG_RXN7 T8 T1 GTXN7 DIS 1 2 C416 SCD1U16V2KX-3GP PEG_TXN7
PEG_RXP8 P_GFX_RXN7 P_GFX_TXN7 GTXP8 C417 SCD1U16V2KX-3GP PEG_TXP8
R5 P_GFX_RXP8 P_GFX_TXP8 T4 DIS_PX1 2
PEG_RXN8 R6 T5 GTXN8 DIS_PX1 2 C418 SCD1U16V2KX-3GP PEG_TXN8
PEG_RXP9 P_GFX_RXN8 P_GFX_TXN8 GTXP9 C419 SCD1U16V2KX-3GP PEG_TXP9
R8 P_GFX_RXP9 P_GFX_TXP9 R2 DIS_PX1 2
PEG_RXN9 R9 R3 GTXN9 DIS_PX1 2 C420 SCD1U16V2KX-3GP PEG_TXN9
PEG_RXP10 P_GFX_RXN9 P_GFX_TXN9 GTXP10 C421 SCD1U16V2KX-3GP PEG_TXP10
P7 P_GFX_RXP10 P_GFX_TXP10 P2 DIS_PX1 2
PEG_RXN10 P8 P1 GTXN10 DIS_PX1 2 C422 SCD1U16V2KX-3GP PEG_TXN10
PEG_RXP11 P_GFX_RXN10 P_GFX_TXN10 GTXP11 C423 SCD1U16V2KX-3GP PEG_TXP11
N5 P_GFX_RXP11 P_GFX_TXP11 P4 DIS_PX1 2
PEG_RXN11 N6 P5 GTXN11 DIS_PX1 2 C424 SCD1U16V2KX-3GP PEG_TXN11
PEG_RXP12 P_GFX_RXN11 P_GFX_TXN11 GTXP12 C425 SCD1U16V2KX-3GP PEG_TXP12
N8 P_GFX_RXP12 P_GFX_TXP12 N2 DIS_PX1 2
PEG_RXN12 N9 N3 GTXN12 DIS_PX1 2 C426 SCD1U16V2KX-3GP PEG_TXN12
PEG_RXP13 P_GFX_RXN12 P_GFX_TXN12 GTXP13 C427 SCD1U16V2KX-3GP PEG_TXP13
M7 P_GFX_RXP13 P_GFX_TXP13 M2 DIS_PX1 2
PEG_RXN13 M8 M1 GTXN13 DIS_PX1 2 C428 SCD1U16V2KX-3GP PEG_TXN13
PEG_RXP14 P_GFX_RXN13 P_GFX_TXN13 GTXP14 C429 SCD1U16V2KX-3GP PEG_TXP14
L5 P_GFX_RXP14 P_GFX_TXP14 M4 DIS_PX1 2
PEG_RXN14 L6 M5 GTXN14 DIS_PX1 2 C430 SCD1U16V2KX-3GP PEG_TXN14
PEG_RXP15 P_GFX_RXN14 P_GFX_TXN14 GTXP15 C431 SCD1U16V2KX-3GP PEG_TXP15
L8 P_GFX_RXP15 P_GFX_TXP15 L2 DIS_PX1 2
PEG_RXN15 L9 L3 GTXN15 DIS_PX1 2 C432 SCD1U16V2KX-3GP PEG_TXN15
P_GFX_RXN15 P_GFX_TXN15
AC5 AD4 PCIE_TXP0_C C441 1 2 SCD1U16V2KX-3GP
31 PCIE_RXP0 P_GPP_RXP0 P_GPP_TXP0 PCIE_TXP0 31
LAN 31 PCIE_RXN0 AC6 P_GPP_RXN0 P_GPP_TXN0 AD5 PCIE_TXN0_C C442 1 2 SCD1U16V2KX-3GP
PCIE_TXN0 31 LAN
66 PCIE_RXP1 AC8 P_GPP_RXP1 P_GPP_TXP1 AC2 PCIE_TXP1_C C443 1 2 SCD1U16V2KX-3GP 3G PCIE_TXP1 66 110325 -1
C WWAN 66 PCIE_RXN1 AC9 P_GPP_RXN1 P_GPP_TXN1 AC3 PCIE_TXN1_C C444 1 2 SCD1U16V2KX-3GP 3G PCIE_TXN1 66 WWAN C
AB7 AB2 PCIE_TXP2_C C457 1 2 SCD1U16V2KX-3GP

GPP
65 PCIE_RXP2 P_GPP_RXP2 P_GPP_TXP2 PCIE_TXP2 65
WLAN 65 PCIE_RXN2 AB8 P_GPP_RXN2 P_GPP_TXN2 AB1 PCIE_TXN2_C C460 1 2 SCD1U16V2KX-3GP
PCIE_TXN2 65 WLAN
AA5 P_GPP_RXP3 P_GPP_TXP3 AB4
AA6 P_GPP_RXN3 P_GPP_TXN3 AB5

AF8 AF1 UMI_TX0P_C C445 1 2 SCD1U16V2KX-3GP


17 UMI_FCH_APU_RX0P P_UMI_RXP0 P_UMI_TXP0 UMI_APU_FCH_TX0P 17
AF7 AF2 UMI_TX0N_C C446 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX0N P_UMI_RXN0 P_UMI_TXN0 UMI_APU_FCH_TX0N 17
AE6 AF5 UMI_TX1P_C C447 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX1P P_UMI_RXP1 P_UMI_TXP1 UMI_APU_FCH_TX1P 17
AE5 AF4 UMI_TX1N_C C448 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_APU_FCH_TX1N 17
AE9 AE3 UMI_TX2P_C C449 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX2P P_UMI_RXP2 P_UMI_TXP2 UMI_APU_FCH_TX2P 17
UMI_TX2N_C C450 SCD1U16V2KX-3GP
UMI-LINK

17 UMI_FCH_APU_RX2N AE8 P_UMI_RXN2 P_UMI_TXN2 AE2 1 2 UMI_APU_FCH_TX2N 17


AD8 AD1 UMI_TX3P_C C451 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX3P P_UMI_RXP3 P_UMI_TXP3 UMI_APU_FCH_TX3P 17
AD7 AD2 UMI_TX3N_C C452 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX3N P_UMI_RXN3 P_UMI_TXN3 UMI_APU_FCH_TX3N 17
1 2 P_ZVDDP K5 K4 P_ZVSS PEG_TXP[0..15]
1D2V_S0 P_ZVDDP P_ZVSS PEG_TXP[0..15] 83
R402

1
196R2F-GP PEG_TXN[0..15]
SAINE PEG_TXN[0..15] 83
62.10055.481 R401
196R2F-GP

PEG_RXP[0..15]
PEG_RXP[0..15] 83

2
PEG_RXN[0..15]
PEG_RXN[0..15] 83

B B

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

APU_PCIE(1/5)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 4 of 102

5 4 3 2 1
5 4 3 2 1

APU1A 1 OF 6
MEMORY CHANNEL APU1B 2 OF 6
A
14 M_A_A0 U20 MA_ADD0 MA_DATA0 E13 M_A_DQ0 14 MEMORY CHANNEL B

14 M_A_A1 R20 MA_ADD1 MA_DATA1 J13 M_A_DQ1 14 15 M_B_A0 T27 MB_ADD0 MB_DATA0 A14 M_B_DQ0 15
14 M_A_A2 R21 MA_ADD2 MA_DATA2 H15 M_A_DQ2 14 15 M_B_A1 P24 MB_ADD1 MB_DATA1 B14 M_B_DQ1 15

SAINE
P22 J15 P25 D16

SAINE
14 M_A_A3 MA_ADD3 MA_DATA3 M_A_DQ3 14 15 M_B_A2 MB_ADD2 MB_DATA2 M_B_DQ2 15
14 M_A_A4 P21 MA_ADD4 MA_DATA4 H13 M_A_DQ4 14 15 M_B_A3 N27 MB_ADD3 MB_DATA3 E16 M_B_DQ3 15
14 M_A_A5 N24 MA_ADD5 MA_DATA5 F13 M_A_DQ5 14 15 M_B_A4 N26 MB_ADD4 MB_DATA4 B13 M_B_DQ4 15
14 M_A_A6 N23 MA_ADD6 MA_DATA6 F15 M_A_DQ6 14 15 M_B_A5 M28 MB_ADD5 MB_DATA5 C13 M_B_DQ5 15
14 M_A_A7 N20 MA_ADD7 MA_DATA7 E15 M_A_DQ7 14 15 M_B_A6 M27 MB_ADD6 MB_DATA6 B16 M_B_DQ6 15
14 M_A_A8 N21 MA_ADD8 15 M_B_A7 M24 MB_ADD7 MB_DATA7 A16 M_B_DQ7 15
D 14 M_A_A9 M21 MA_ADD9 MA_DATA8 H17 M_A_DQ8 14 15 M_B_A8 M25 MB_ADD8 D
14 M_A_A10 U23 MA_ADD10 MA_DATA9 F17 M_A_DQ9 14 15 M_B_A9 L26 MB_ADD9 MB_DATA8 C17 M_B_DQ8 15
14 M_A_A11 M22 MA_ADD11 MA_DATA10 E19 M_A_DQ10 14 15 M_B_A10 U26 MB_ADD10 MB_DATA9 B18 M_B_DQ9 15
14 M_A_A12 L24 MA_ADD12 MA_DATA11 J19 M_A_DQ11 14 15 M_B_A11 L27 MB_ADD11 MB_DATA10 B20 M_B_DQ10 15
14 M_A_A13 AA25 MA_ADD13 MA_DATA12 G16 M_A_DQ12 14 15 M_B_A12 K27 MB_ADD12 MB_DATA11 A20 M_B_DQ11 15
14 M_A_A14 L21 MA_ADD14 MA_DATA13 H16 M_A_DQ13 14 15 M_B_A13 W26 MB_ADD13 MB_DATA12 E17 M_B_DQ12 15
14 M_A_A15 L20 MA_ADD15 MA_DATA14 H19 M_A_DQ14 14 15 M_B_A14 K25 MB_ADD14 MB_DATA13 B17 M_B_DQ13 15
MA_DATA15 F19 M_A_DQ15 14 15 M_B_A15 K24 MB_ADD15 MB_DATA14 B19 M_B_DQ14 15
14 M_A_BS0 U24 MA_BANK0 MB_DATA15 C19 M_B_DQ15 15
14 M_A_BS1 U21 MA_BANK1 MA_DATA16 H20 M_A_DQ16 14 15 M_B_BS0 U27 MB_BANK0
14 M_A_BS2 L23 MA_BANK2 MA_DATA17 F21 M_A_DQ17 14 15 M_B_BS1 T28 MB_BANK1 MB_DATA16 C21 M_B_DQ16 15
MA_DATA18 J23 M_A_DQ18 14 15 M_B_BS2 K28 MB_BANK2 MB_DATA17 B22 M_B_DQ17 15
14 M_A_DM0 E14 MA_DM0 MA_DATA19 H23 M_A_DQ19 14 MB_DATA18 C23 M_B_DQ18 15
14 M_A_DM1 J17 MA_DM1 MA_DATA20 G20 M_A_DQ20 14 15 M_B_DM0 D14 MB_DM0 MB_DATA19 A24 M_B_DQ19 15
14 M_A_DM2 E21 MA_DM2 MA_DATA21 E20 M_A_DQ21 14 15 M_B_DM1 A18 MB_DM1 MB_DATA20 D20 M_B_DQ20 15
14 M_A_DM3 F25 MA_DM3 MA_DATA22 G22 M_A_DQ22 14 15 M_B_DM2 A22 MB_DM2 MB_DATA21 B21 M_B_DQ21 15
14 M_A_DM4 AD27 MA_DM4 MA_DATA23 H22 M_A_DQ23 14 15 M_B_DM3 C25 MB_DM3 MB_DATA22 E23 M_B_DQ22 15
14 M_A_DM5 AC23 MA_DM5 15 M_B_DM4 AF25 MB_DM4 MB_DATA23 B23 M_B_DQ23 15
14 M_A_DM6 AD19 MA_DM6 MA_DATA24 G24 M_A_DQ24 14 15 M_B_DM5 AG22 MB_DM5
14 M_A_DM7 AC15 MA_DM7 MA_DATA25 E25 M_A_DQ25 14 15 M_B_DM6 AH18 MB_DM6 MB_DATA24 E24 M_B_DQ24 15
MA_DATA26 G27 M_A_DQ26 14 15 M_B_DM7 AD14 MB_DM7 MB_DATA25 B25 M_B_DQ25 15
14 M_A_DQS0 G14 MA_DQS_H0 MA_DATA27 G26 M_A_DQ27 14 MB_DATA26 B27 M_B_DQ26 15
14 M_A_DQS#0 H14 MA_DQS_L0 MA_DATA28 F23 M_A_DQ28 14 15 M_B_DQS0 C15 MB_DQS_H0 MB_DATA27 D28 M_B_DQ27 15
14 M_A_DQS1 G18 MA_DQS_H1 MA_DATA29 H24 M_A_DQ29 14 15 M_B_DQS#0 B15 MB_DQS_L0 MB_DATA28 B24 M_B_DQ28 15
14 M_A_DQS#1 H18 MA_DQS_L1 MA_DATA30 E28 M_A_DQ30 14 15 M_B_DQS1 E18 MB_DQS_H1 MB_DATA29 D24 M_B_DQ29 15
14 M_A_DQS2 J21 MA_DQS_H2 MA_DATA31 F27 M_A_DQ31 14 15 M_B_DQS#1 D18 MB_DQS_L1 MB_DATA30 D26 M_B_DQ30 15
14 M_A_DQS#2 H21 MA_DQS_L2 15 M_B_DQS2 E22 MB_DQS_H2 MB_DATA31 C27 M_B_DQ31 15
14 M_A_DQS3 E27 MA_DQS_H3 MA_DATA32 AB28 M_A_DQ32 14 15 M_B_DQS#2 D22 MB_DQS_L2
14 M_A_DQS#3 E26 MA_DQS_L3 MA_DATA33 AC27 M_A_DQ33 14 15 M_B_DQS3 B26 MB_DQS_H3 MB_DATA32 AG26 M_B_DQ32 15
C AE26 AD25 A26 AH26 C
14 M_A_DQS4 MA_DQS_H4 MA_DATA34 M_A_DQ34 14 15 M_B_DQS#3 MB_DQS_L3 MB_DATA33 M_B_DQ33 15
14 M_A_DQS#4 AD26 MA_DQS_L4 MA_DATA35 AA24 M_A_DQ35 14 15 M_B_DQS4 AG24 MB_DQS_H4 MB_DATA34 AF23 M_B_DQ34 15
14 M_A_DQS5 AB22 MA_DQS_H5 MA_DATA36 AE28 M_A_DQ36 14 15 M_B_DQS#4 AG25 MB_DQS_L4 MB_DATA35 AG23 M_B_DQ35 15
14 M_A_DQS#5 AA22 MA_DQS_L5 MA_DATA37 AD28 M_A_DQ37 14 15 M_B_DQS5 AG21 MB_DQS_H5 MB_DATA36 AG27 M_B_DQ36 15
14 M_A_DQS6 AB18 MA_DQS_H6 MA_DATA38 AB26 M_A_DQ38 14 15 M_B_DQS#5 AF21 MB_DQS_L5 MB_DATA37 AF27 M_B_DQ37 15
14 M_A_DQS#6 AA18 MA_DQS_L6 MA_DATA39 AC25 M_A_DQ39 14 15 M_B_DQS6 AG17 MB_DQS_H6 MB_DATA38 AH24 M_B_DQ38 15
14 M_A_DQS7 AA14 MA_DQS_H7 15 M_B_DQS#6 AG18 MB_DQS_L6 MB_DATA39 AE24 M_B_DQ39 15
14 M_A_DQS#7 AA15 MA_DQS_L7 MA_DATA40 Y23 M_A_DQ40 14 15 M_B_DQS7 AH14 MB_DQS_H7
MA_DATA41 AA23 M_A_DQ41 14 15 M_B_DQS#7 AG14 MB_DQS_L7 MB_DATA40 AE22 M_B_DQ40 15
14 M_A_DIM0_CLK_DDR0 T21 MA_CLK_H0 MA_DATA42 Y21 M_A_DQ42 14 MB_DATA41 AH22 M_B_DQ41 15
14 M_A_DIM0_CLK_DDR#0 T22 MA_CLK_L0 MA_DATA43 AA20 M_A_DQ43 14 15 M_B_DIM0_CLK_DDR0 R26 MB_CLK_H0 MB_DATA42 AE20 M_B_DQ42 15
14 M_A_DIM0_CLK_DDR1 R23 MA_CLK_H1 MA_DATA44 AB24 M_A_DQ44 14 15 M_B_DIM0_CLK_DDR#0 R27 MB_CLK_L0 MB_DATA43 AH20 M_B_DQ43 15
14 M_A_DIM0_CLK_DDR#1 R24 MA_CLK_L1 MA_DATA45 AD24 M_A_DQ45 14 15 M_B_DIM0_CLK_DDR1 P27 MB_CLK_H1 MB_DATA44 AD23 M_B_DQ44 15
MA_DATA46 AA21 M_A_DQ46 14 15 M_B_DIM0_CLK_DDR#1 P28 MB_CLK_L1 MB_DATA45 AD22 M_B_DQ45 15
14 M_A_DIM0_CKE0 H28 MA_CKE0 MA_DATA47 AC21 M_A_DQ47 14 MB_DATA46 AD21 M_B_DQ46 15
14 M_A_DIM0_CKE1 H27 MA_CKE1 15 M_B_DIM0_CKE0 J26 MB_CKE0 MB_DATA47 AD20 M_B_DQ47 15
MA_DATA48 AA19 M_A_DQ48 14 15 M_B_DIM0_CKE1 J27 MB_CKE1
14 M_A_DIM0_ODT0 Y25 MA_ODT0 MA_DATA49 AC19 M_A_DQ49 14 MB_DATA48 AF19 M_B_DQ48 15
14 M_A_DIM0_ODT1 AA27 MA_ODT1 MA_DATA50 AC17 M_A_DQ50 14 15 M_B_DIM0_ODT0 W27 MB_ODT0 MB_DATA49 AE18 M_B_DQ49 15
MA_DATA51 AA17 M_A_DQ51 14 15 M_B_DIM0_ODT1 Y28 MB_ODT1 MB_DATA50 AE16 M_B_DQ50 15
14 M_A_DIM0_CS#0 V22 MA_CS#0 MA_DATA52 AB20 M_A_DQ52 14 MB_DATA51 AH16 M_B_DQ51 15
14 M_A_DIM0_CS#1 AA26 MA_CS#1 MA_DATA53 Y19 M_A_DQ53 14 15 M_B_DIM0_CS#0 V25 MB_CS#0 MB_DATA52 AG20 M_B_DQ52 15
MA_DATA54 AD18 M_A_DQ54 14 15 M_B_DIM0_CS#1 Y27 MB_CS#1 MB_DATA53 AG19 M_B_DQ53 15
14 M_A_RAS# V21 MA_RAS# MA_DATA55 AD17 M_A_DQ55 14 MB_DATA54 AF17 M_B_DQ54 15
14 M_A_CAS# W24 MA_CAS# 15 M_B_RAS# V24 MB_RAS# MB_DATA55 AD16 M_B_DQ55 15
14 M_A_W E# W23 MA_WE# MA_DATA56 AA16 M_A_DQ56 14 15 M_B_CAS# V27 MB_CAS#
MA_DATA57 Y15 M_A_DQ57 14 15 M_B_W E# V28 MB_WE# MB_DATA56 AG15 M_B_DQ56 15
14 M_A_RST# H25 MA_RESET# MA_DATA58 AA13 M_A_DQ58 14 MB_DATA57 AD15 M_B_DQ57 15
14 M_A_EVENT# T24 MA_EVENT# MA_DATA59 AC13 M_A_DQ59 14 15 M_B_RST# J25 MB_RESET# MB_DATA58 AG13 M_B_DQ58 15
B B
MA_DATA60 Y17 M_A_DQ60 14 15 M_B_EVENT# T25 MB_EVENT# MB_DATA59 AD13 M_B_DQ59 15
M_VREF_DQ_APU W20 AB16 AG16
M_VREF MA_DATA61 M_A_DQ61 14 MB_DATA60 M_B_DQ60 15
MA_DATA62 AB14 M_A_DQ62 14 MB_DATA61 AF15 M_B_DQ61 15
1D5V_S3 1 2 M_ZVDDIO W21 Y13 AE14
M_ZVDDIO MA_DATA63 M_A_DQ63 14 MB_DATA62 M_B_DQ62 15
R501 AF13
MB_DATA63 M_B_DQ63 15
39R2F-GP

SAINE
SAINE
62.10055.481
62.10055.481

APU_VREF_DQ
DDR_VREF_S3
R5020R0603-PAD
1 2 M_VREF_DQ_APU 1D5V_S3
1

C501 C502 RN501


SCD1U10V2KX-5GP SC1KP50V2KX-1GP 1 4 M_A_EVENT#
2 3 M_B_EVENT#
2

SRN1KJ-7-GP

0920-SA
LAYOUT: place them close to APU
<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

APU_DDR(2/5)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 5 of 102

5 4 3 2 1
5 4 3 2 1

RN609
APU_DP_AUXP_CPU 2 3
APU_DP_AUXN_CPU 1 4
SVC SVD Boot Voltage Boot Voltage
(VCC/GND) (open)
SRN1K8J-GP
0 0 1.1 1.1 94 APU_DP_TXP0_CPU
EDP 94 APU_DP_TXN0_CPU RN610
0 1 1.0 1.2 DP_AUX1P 1 4
APU_DP_AUXP_CPU APU_DP_AUXP_CPU 94 DP_AUX1N 2 3
1 0 0.9 1.1 APU_DP_AUXN_CPU eDP
APU_DP_AUXN_CPU 94
SRN1K8J-GP
1 1 0.8 0.9
APU1C 3 OF 6
ANALOG/DISPLAY/MISC APU_TEST25_H_BYPASSCLK_H 2 R611 1
UMA_PX 1 2C602 SCD1U16V2KX-3GP F2 D4 C603 1 2 SCD1U16V2KX-3GP UMA_PX_LVDS 510R2J-1-GP
9 LVDS_L0P_TRAVIS DP0_TXP0 DP0_AUXP LVDS_CHP_TRAVIS 9 LVDS
9 LVDS_L0N_TRAVIS
UMA_PX 1 2C606 SCD1U16V2KX-3GP F1 D5 C601 1 2 SCD1U16V2KX-3GP UMA_PX_LVDS LVDS_CHN_TRAVIS 9
M_TEST R608 2 1 39R2F-GP

SAINE
DP0_TXN0 DP0_AUXN
TRAVIS E3 E5 DP_AUX1P C626 1 2 SCD1U16V2KX-3GP UMA_PX APU_TEST9_ANALOGIN 1 R602 2
DP0_TXP1 DP1_AUXP DP1_AUXP_R 19 CRT
D LVDS Panel E2 E6 DP_AUX1N C627 1 2 SCD1U16V2KX-3GP UMA_PX DP1_AUXN_R 19 DY 0R2J-2-GP D
DP0_TXN1 DP1_AUXN
D2 J5 RN603
DP0_TXP2 DP2_AUXP PCH_HDMI_CLK_R 51 HDMI
D1 J6 PCH_HDMI_DATA_R 51 8 1
DP0_TXN2 DP2_AUXN APU_TEST12_SCANSHIFTEND 7 2
APU_TEST22_SCANSHIFTEN

DISPLAY PORT 0
C2 H4 6 3
DP0_TXP3 DP3_AUXP 1D5V_S0 APU_TEST19_PLLTEST0
C3 H5 5 4
DP0_TXN3 DP3_AUXN

19 DP1_TX0P_R
UMA_PX 1 2C618 SCD1U16V2KX-3GP DP1_TX0P K2 G5 SRN1KJ-4-GP
UMA_PX DP1_TX0N DP1_TXP0 DP4_AUXP
2C619 SCD1U16V2KX-3GP

DISPLAY PORT MISC.


19 DP1_TX0N_R 1 K1 G6

1
DP1_TXN0 DP4_AUXN 3D3V_S0 RN602
19 DP1_TX1P_R
UMA_PX 1 2C620 SCD1U16V2KX-3GP DP1_TX1P J3 F4 R653 DY APU_TEST18_PLLTEST1 8 1
UMA_PX DP1_TX1N DP1_TXP1 DP5_AUXP APU_TEST21_SCANEN
VGA output 19 DP1_TX1N_R 1 2C621 SCD1U16V2KX-3GP J2 F5 100KR2J-1-GP R674 7 2
DP1_TXN1 DP5_AUXN LVDS_CHN_TRAVIS APU_TEST20_SCANCLK2
DY 1 100KR2J-1-GP
2 6 3
from FCH UMA_PX 1 2C622 SCD1U16V2KX-3GP DP1_TX2P H2 D7 DP0_HPD APU_TEST24_SCANCLK1 5 4
19 DP1_TX2P_R

2
UMA_PX DP1_TX2N DP1_TXP2 DP0_HPD DP1_HPD
19 DP1_TX2N_R 1 2C623 SCD1U16V2KX-3GP H1 E7 DY
DP1_TXN2 DP1_HPD DP0_HPD R675 SRN1KJ-4-GP
J7 DP2_HPD 51
DP2_HPD

DISPLAY PORT 1
19 DP1_TX3P_R
UMA_PX 1 2C624 SCD1U16V2KX-3GP DP1_TX3P G2 H7 LVDS_CHP_TRAVIS 1 100KR2J-1-GP
2
UMA_PX DP1_TX3N DP1_TXP3 DP3_HPD
19 DP1_TX3N_R 1 2C625 SCD1U16V2KX-3GP G3 G7
DP1_TXN3 DP4_HPD 1D2V_S0
F7
DP5_HPD
17 APU_CLKP AH7
CLKIN_H
100MHz 17 APU_CLKN AH6
CLKIN_L DP_BLON
C6 APU_BLEN
APU_DIGON
APU_TEST25_L_BYPASSCLK_L 1 R613 2
510R2J-1-GP

CLK
C5
DP_DIGON APU_BLPWM 1D5V_S3
17 DISP_CLKP AH4 C7
DISP_CLKIN_H DP_VARY_BL
100MHz 17 DISP_CLKN AH3
DISP_CLKIN_L DP_AUX_ZVSS 1D5V_S3 ALLOW_STOP
D8 1 R623 2 1 R643 2
DP_AUX_ZVSS 150R2F-1-GP 1KR2J-1-GP
42 APU_SVC_R B8
SVC
42 APU_SVD_R A8 AA10

2
SVD TEST6
RN606 G10 APU_TEST9_ANALOGIN

SER.
APU_SIC TEST9
18 SCLK3 1 4 AH11 H10
DY APU_SID SIC TEST10
DY 18 SDATA3 2 3 AG11 H12 APU_TEST12_SCANSHIFTEND R612
SID TEST12
71 APU_RST_L_BUF 1 R631 2 D9 APU_TEST14_BP0 TP611
300R2J-4-GP
0R2J-2-GP SRN0J-6-GP APU_RST#_R TEST14 APU_TEST15_BP1 3D3V_AUX_S5
17 APU_RST# 1 R629 20R0402-PAD AF10 E9 TP610

1
APU_PWRGD_R RESET# TEST15
17,36,71,97 H_CPUPWRGD_E 1 R630 2 AE10 G9 APU_TEST16_BP2 TP612
TEST35 R615
PWROK TEST16
110218 SB change to short pad 0R0402-PAD H9 APU_TEST17_BP3 FS1R1 1 10KR2J-3-GP
2

CTRL
TP613

2
TEST17
17 APU_PROCHOT# 1 R632 20R0402-PAD AD10 H11 APU_TEST18_PLLTEST1 APU_TEST18_PLLTEST1 71 DY
APU_THERMTRIP#_VDDIO AG12 PROCHOT# TEST18
110328 -1 G11 APU_TEST19_PLLTEST0 APU_TEST19_PLLTEST0 71
R617 [AMD FAE Frank]:
THERMTRIP# TEST19
27 H_PROCHOT#
APU_ALERT# AH12
ALERT# TEST20
F12 APU_TEST20_SCANCLK2 DY 300R2J-4-GP this is electrical key
1D5V_S3 E11 APU_TEST21_SCANEN do not allow power to turn on if this pin is still "L"
APU_TDI TEST21
C C12 D11 APU_TEST22_SCANSHIFTEN FS1 package is open pin C

TEST

1
71 APU_TDI TDI TEST22
APU_TDO A12 F10 in the furtur,FS1r2 will have this pin tied to VSS
71 APU_TDO
1

APU_TCK TDO TEST23


71 APU_TCK A11 G12 APU_TEST24_SCANCLK1 if the wrong processor is plugged the socket
TCK TEST24

JTAG
R636 110328 -1 71 APU_TMS
APU_TMS D12
TMS TEST25_H
AH10 APU_TEST25_H_BYPASSCLK_H This is more of a problem on desktop platforms
2K2R2J-2-GP APU_TRST# B12 AH9 APU_TEST25_L_BYPASSCLK_L [AMD HDMI desing guidance] 1D5V_S3
71 APU_TRST#
APU_DBRDY TRST# TEST25_L (changing CPUs)
71 APU_DBRDY B11 K7
APU_DBREQ# DBRDY TEST28_H
71 APU_DBREQ# C11 K8 Strap define PU :Enable HDMI
2

DBREQ# TEST28_L
AA12 ANATSTIN_H TP601 PD:Disable HDMI

3
TEST30_H
AB12 ANATSTIN_L
APU_ALERT#_Q

DY 3D3V_S5
E8
RSVD#E8 TEST30_L TP617
110328 -1 K21 K22 M_TEST 19 DP_HPD1_R 1 R639 2 DP_HPD1_C_B 1 Q604
RSVD#K21 TEST31
AC11 AB11 ANATSTOUT_H 150KR2J-L1-GP PMBS3904-1-GP

RSVD
RSVD#AC11 TEST32_H TP618 1D5V_S3
42 APU_VDDNB_RUN_FB_L 1 R648 20R0402-PAD AA11 ANATSTOUT_L TP619 84.03904.L06

2
TEST32_L
D10 TEST35 2ND = 84.03904.P11
TEST35
1

1
1 R649 20R0402-PAD APU_RUN_FB_L B9 DP1_HPD
42 APU_VDD_RUN_FB_L VSS_SENSE
R673 1 APU_VDDP_FB_H C8 Y11 R644
TP620 VDDP_SENSE FS1R1 FS1R1 36

1
2
10KR2J-3-GP A9 AB10 DY 100KR2J-1-GP

SENSE
42 APU_VDDNB_RUN_FB_H VDDNB_SENSE DMAACTIVE# ALLOW_STOP 17
84.03904.L06 DY 1 APU_VDDIO_SUS_FB_H B10 R656 R640
TP622
1

VDDIO_SENSE 3D3V_S0 10KR2J-3-GP


2ND = 84.03904.P11 C9 AE12 UMA_PX 2K2R2J-2-GP
2

42 APU_VDD_RUN_FB_H

2
APU_VDDR_FB_H VDD_SENSE THERMDA
TP623 1 A10 AD12
APU_ALERT# VDDR_SENSE THERMDC
2 3

2
PCH_TEMP_ALERT# 19,27

APU_BLPWM_Q 1
DY Q603 SAINE 62.10055.481

1
PMBS3904-1-GP
R658
4K7R2J-2-GP
1D5V_S3 UMA_PX

2
1 R666 2 H_CPUPWRGD_E 3D3V_S0
1D5V_S0
300R2J-4-GP

1
UMA_PX

2
DY
1

1D5V_S3 1 R665 2 H_CPUPWRGD_E R664 APU_BLPWM 2 3 APU_BLPWM_TRAVIS 9,27


300R2J-4-GP R670 UMA_PX_EDP 2K2R2J-2-GP Q608 110324 -1
10KR2J-3-GP PMBS3904-1-GP R622

1
3D3V_S0 84.03904.L06 1 0R2J-2-GP
2

1
L_BKLT_CTRL_R 9,10
R655 2ND = 84.03904.P11 UMA_PX_EDP
2

DY 4K7R2J-2-GP

APU_DIGON_Q
R654
1 300R2J-4-GP
2 APU_RST#
1D5V_S0

2
1
APU_PROCHOT#_B

B DY 3D3V_S0 1D5V_S0 R663 3D3V_VGA_S0 1D5V_S3 B

1D5V_S3 1 R637 2 APU_RST# 4K7R2J-2-GP


300R2J-4-GP UMA_PX_EDP
84.03904.L06

2
1

2
1
1

2ND = 84.03904.P11 110324 -1


R669 DY R667 R695 R694
10KR2J-3-GP 10KR2J-3-GP APU_DIGON 2 3 0R2J-2-GP 0R2J-2-GP
1D5V_S0 LVDS_VDD_EN_R 9,10
84.03904.L06 Q610 DY UMA_PX
1

1
RN611 2ND = 84.03904.P11 PMBS3904-1-GP

1
2
2

4 1 R662 UMA_PX_EDP
3 DY 2 APU_PROCHOT# 3 2 100KR2J-1-GP EDP_HPD_PWR
H_CPUPWRGD_B

APU_PROCHOT#_VDDIO 42 3D3V_S0
Q612 UMA_PX_EDP 84.03904.L06
SRN1K8J-GP PMBS3904-1-GP 2ND = 84.03904.P11

3
R687 UMA_PX
1D5V_S3 R651 1 0R2J-2-GP
2 HPD_C 1 R641 2 HPD_C_B 1 Q605
9,49 DP_HPD0_C
1

RN607 1 0R2J-2-GP
2 150KR2J-L1-GP PMBS3904-1-GP
3 2 APU_SVC_R DY R668 UMA_PX UMA_PX

2
4 1 APU_SVD_R 10KR2J-3-GP R690

1
84.03904.L06 DY EDP_HPD 1 0R2J-2-GP
2 EDP_HPD_DET 85
1

SRN1K8J-GP 2ND = 84.03904.P11 R646 DY


2

DY 1D5V_S3 100KR2J-1-GP
H_CPUPWRGD_E 2 3 UMA_PX R689
H_CPUPWRGD 42
Q611 1 0R2J-2-GP
2 DP0_HPD

2
PMBS3904-1-GP

2
UMA_PX
R660 3D3V_VGA_S0

1
1D5V_S3 1 R633 20R0402-PAD UMA_PX_EDP 2K2R2J-2-GP
RN601 1D5V_S3 110328 -1 R642
5 4 APU_SID 10KR2J-3-GP
1

2
6 3 APU_SIC 3D3V_S0 UMA_PX
1

7 2 APU_THERMTRIP#_VDDIO R693

2
APU_ALERT# R635 0R2J-2-GP
APU_BLEN_Q

8 1
10KR2J-3-GP DY

1
SRN1KJ-4-GP

1
R659
2

4K7R2J-2-GP R691
1D5V_S3 UMA_PX_EDP 1 33R2J-2-GP
2
9,49 DP_HPD0_C EDP_HPD_DET 85
APU_THERMTRIP#_VDDIO_Q

RN604 84.03904.L06 DIS_EDP


2
1

8 1 APU_TRST# 2ND = 84.03904.P11 110324 -1


A 7 2 APU_TDI A
6 3 APU_TMS 3D3V_S5 3D3V_S5 APU_BLEN 2 3 L_BKLT_EN_R 9,10 3D3V_S5
5 4 APU_TCK Q609
PMBS3904-1-GP
1
1

SRN1KJ-4-GP UMA_PX_EDP <Variant Name>

1
R638 R650 R661
10KR2J-3-GP 10KR2J-3-GP UMA_PX_EDP 100KR2J-1-GP R652
1 R634 2 APU_DBREQ# 1D5V_S3 10KR2J-3-GP
300R2J-4-GP
Q606
1D5V_S3 Wistron Corporation
2
2

0924-SA BSS138-8-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
84.03904.L06 G Taipei Hsien 221, Taiwan, R.O.C.
1

1D5V_S3 2ND = 84.03904.P11 G

Dr-Bios.com
D Title
SML1_CLK 9,27,85
APU_PROCHOT# APU_THERMTRIP#_VDDIO
1 R616 2
1KR2J-1-GP
2 3
Q601
H_THERMTRIP# 18,36,85
APU_SIC S
D SML1_DATA 9,27,85 APU_Control&Debug(3/5)
0920-SA

PMBS3904-1-GP APU_SID S Size Document Number Rev
Custom
S3 Power CPU exceeds to 125 BSS138-8-GP
Q607 JE50_SB SB
Date: Friday, April 01, 2011 Sheet 6 of 102
5 4 3 2 1
5 4 3 2 1

APU_VDD APU1D 4 OF 6 APU_VDD

C1 T6
36A for VDD(35W CPU)
VDD VDD
D3 VDD VDD T10 45A for VDD(45W CPU)

SAINE
D6 VDD VDD T18
E1 VDD VDD U1

1
C708 C707 C706 C705 C704 C703 C702 C701 F3 U11 C714 C713 C712 C711 C710 C709
VDD VDD

SCD22U10V2KX-1GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC180P50V2JN-1GP

SCD22U10V2KX-1GP

SCD01U16V2KX-3GP

SC180P50V2JN-1GP
D F6 U19 D

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
VDD VDD
F8 V3 VDD:

2
2

2
VDD VDD
DY DY DY DY DY G1 VDD VDD V6 DY DY
H3
H6
VDD VDD V10
V18
10UF X7 0.22UF X2 10nF X3
VDD VDD
H8
J1
VDD VDD W1
W11
180pF Cap for EMI requirment
VDD VDD
K3 VDD VDD W13
K6 VDD VDD W15
L1 VDD VDD W17
L11 VDD VDD W19
L19 VDD VDD Y3
M3 VDD VDD Y6
M6 VDD VDD Y10
M10 VDD VDD Y12
M18 VDD VDD Y14
N1 VDD VDD Y16
N11 VDD VDD Y18
N19 VDD VDD Y20
P3 VDD VDD AA1
P6
P10
VDD VDD AB3
AB6
18A for VDDNB(35W CPU)
VDD VDD
P18
R1
VDD VDD AC1
AD3
22A for VDDNB(45W CPU)
VDD VDD
R11 VDD VDD AD6
R19 VDD VDD AE1
APU_VDDNB APU_VDDNB
T3 VDD VDDNB:
C
J9
J10
VDDNB VDDNB K11
K12
10UF X4 0.22UF X2 C
C718 C717 C716 C715 VDDNB VDDNB C723 C722 C721 C720
J11 VDDNB VDDNB K13 180pF Cap for EMI requirment
1

1
1

1
SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP
C719 J12 K14

SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP VDDNB VDDNB
J14 VDDNB VDDNB K16
J16 K17
2

2
2

2
VDDNB VDDNB
DY DY K9 VDDNB VDDNB K18 DY DY
K10 VDDNB VDDNB L18 4A for VDDIO(35W CPU)
1D5V_S3
G28
H26
VDDIO VDDIO R22
R25 1D5V_S3 4.6A for VDDIO(45W CPU)
VDDIO VDDIO
J28 VDDIO VDDIO R28
K20 VDDIO VDDIO T20
K23 VDDIO VDDIO T23
K26 VDDIO VDDIO T26 VDDIO:
1

1
1

C730 C729 C728 C727 C726 C725 C724 L22 U22


VDDIO VDDIO

1
1

1
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
SCD22U10V2KX-1GP

SC180P50V2JN-1GP

C737 C736 C735 C734 C733 C732 C731


L25 U25 10UF X2 0.22UF X6 4.7uFUF X4
SC10U6D3V5KX-1GP

VDDIO VDDIO

SC180P50V2JN-1GP

SC4D7U6D3V3KX-GP
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC4D7U6D3V3KX-GP
L28 U28

SC10U6D3V5KX-1GP
2

2
2

VDDIO VDDIO
M20 V20 180pF Cap for EMI requirment

2
2

2
VDDIO VDDIO
DY DY DY DY M23 VDDIO VDDIO V23 DY DY
M26 VDDIO VDDIO V26
N22
N25
VDDIO VDDIO W22
W25
3.5A for VDDP(35W/45W)
VDDIO VDDIO
N28 VDDIO VDDIO W28
P20 VDDIO VDDIO Y24
P23 VDDIO VDDIO Y26
P26 AA28 1D2V_S0
VDDIO VDDIO

1D2V_S0 AG2 VDDP_A VDDP_B A3


B
AG3
AG4
VDDP_A VDDP_B A4
B3
VDDP: B
VDDP_A VDDP_B
AG5 VDDP_A VDDP_B B4 10UF X2 0.22uF X2

1
1
C751 C750 C748 C747 C745

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP
SCD22U10V2KX-1GP
1D2V_S0 AG6 VDDR VDDR A5 DY 180pF Cap for EMI requirment
AG7 A6

2
2
VDDR VDDR
AG8 VDDR VDDR B5
2D5V_S0 AG9 B6
VDDR VDDR
0.75A for VDDA(35W/45W) AE11 VDDA 3A for VDDR(35W)
AF11 VDDA
3.5A for VDDR(45W)
1
1

C740 C739 C738 1D2V_S0


SCD22U10V2KX-1GP
SC4D7U6D3V3KX-GP

SC3300P50V2KX-1GP SAINE
62.10055.481
2
2

DY

1
1

1
1

1
1D5V_S3 C767 C766 C759 C758 C762 C761 C760

SC4D7U6D3V3KX-GP
SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
SCD22U10V2KX-1GP

SC4D7U6D3V3KX-GP

SC180P50V2JN-1GP
DY DY DY

2
2

2
2

2
1

1
1

C744 C743 C742 C741


SCD22U10V2KX-1GP

SC180P50V2JN-1GP
SCD22U10V2KX-1GP

SC180P50V2JN-1GP
2

2
2

VDDR: <Variant Name>


A A
4.7UF X2 0.22uF X2
Wistron Corporation

Dr-Bios.com
Decoupling between processor and DIMMs
180pF Cap for EMI requirment 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
across VDDIO and VSS Split
0624
Title

APU_Power(4/5)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 7 of 102

5 4 3 2 1
5 4 3 2 1

D D

APU1E 5 OF 6

A7 VSS VSS T11


A13 VSS VSS T19

SAINE
A15 VSS VSS U4
A17 VSS VSS U7
A19 VSS VSS U10
A21 VSS VSS U18
A23 VSS VSS V9
A25 VSS VSS V11
B7 VSS VSS V19
C4 VSS VSS W4
C10 VSS VSS W7
C14 VSS VSS W10
C16 VSS VSS W12
C18 VSS VSS W14
C20 VSS VSS W16
C22 VSS VSS W18
C24 VSS VSS Y9
C26 VSS VSS Y22
C28 VSS VSS AA4
D13 VSS VSS AA7
D15 VSS VSS AB9
D17 VSS VSS AB13
D19 VSS VSS AB15
D21 VSS VSS AB17
D23 VSS VSS AB19
C D25 AB21 C
VSS VSS
D27 VSS VSS AB23
E4 VSS VSS AB25
E10 VSS VSS AB27
E12 VSS VSS AC4
F9 VSS VSS AC7
F11 VSS VSS AC10
F14 VSS VSS AC12
F16 VSS VSS AC14
F18 VSS VSS AC16
F20 VSS VSS AC18
F22 VSS VSS AC20
F24 VSS VSS AC22
F26 VSS VSS AC24
F28 VSS VSS AC26
G4 VSS VSS AC28
G8 VSS VSS AD9
G13 VSS VSS AD11
G15 VSS VSS AE4
G17 VSS VSS AE7
G19 VSS VSS AE13
G21 VSS VSS AE15
G23 VSS VSS AE17
G25 VSS VSS AE19
J4 VSS VSS AE21
J8 VSS VSS AE23
J18 VSS VSS AE25
J20 VSS VSS AE27
J22 VSS VSS AF3
B B
J24 VSS VSS AF6
K19 VSS VSS AF9
L4 VSS VSS AF12
L7 VSS VSS AF14
L10 VSS VSS AF16
M9 VSS VSS AF18
M11 VSS VSS AF20
M19 VSS VSS AF22
N4 VSS VSS AF24
N7 VSS VSS AF26
N10 VSS VSS AF28
N18 VSS VSS AG10
P9 VSS VSS AH5
P11 VSS VSS AH8
P19 VSS VSS AH13
R4 VSS VSS AH15
R7 VSS VSS AH17
R10 VSS VSS AH19
R18 VSS VSS AH21
T9 VSS VSS AH23
VSS AH25

SAINE 62.10055.481

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

APU_VSS(5/5)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 8 of 102

5 4 3 2 1
5 4 3 2 1

R922
27 PS8612_RST# 1 0R2J-2-GP
2
UMA_PX_LVDS
LVDSA_DATA0# 49,94
LVDSA_DATA0 49,94
PS8615_VDDIO 1 R908 2 PS8615_RST#
LVDSA_DATA1# 49,94
10KR2J-3-GP PWMI: 0~100KHz, LVDSA_DATA1 49,94
UMA_PX_LVDS 0~100% duty cycle

1
110216 SB Bom change By edwin C943
LVDSA_DATA2# 49,94 Single Link LVDS
DY SC2D2U6D3V2MX-GP
LVDSA_DATA2 49,94
UMA_PX_LVDS LVDSA_CLK# 49,94

2
R918
LVDSA_CLK 49,94
6,27 APU_BLPWM_TRAVIS 1 2 APU_BLPWM_TRAVIS_R
0R2J-2-GP PS8615_VDDIO
3D3V_S0 PS8615_VDDIO
UMA_PX_LVDS PS8615_VDDRX
D L902 D

1
1 2 C939
GBK160808T-601Y-GP SCD1U10V2KX-5GP

1
68.00248.011 UMA_PX_LVDS

49
48
47
46
45
44
43
42
41
40
39
38
37
C938 C937

2
1

1
C942 U901
C932 2nd = 68.00217.241 SC1U6D3V2KX-GP SCD01U16V2KX-3GP SCD1U10V2KX-5GP
PS8615_VDDIO
DY DY UMA_PX_LVDS

NC#48
NC#47

TA0P

TB0P
VDDIO

TC0P

TCK0P
GND

TA0N

TB0N

TC0N

TCK0N

PWMI
2

2
SC1U6D3V2KX-GP UMA_PX_LVDS
2

110317 -1
UMA_PX_LVDS

1
1 36 C935
6 LVDS_CHN_TRAVIS DAUXN TD0N
2 35 SCD1U10V2KX-5GP
3D3V_S0 PS8615_VDDIOX 6 LVDS_CHP_TRAVIS DAUXP TD0P LVDS_VDD_EN_R 6,10
3 34 L_BKLT_CTRL_R 6,10

2
UMA_PX_LVDS GND NC#34
6 LVDS_L0P_TRAVIS 4 33 L_BKLT_EN_R 6,10
DRX0P NC#33
L906 6 LVDS_L0N_TRAVIS 5
DRX0N 71.08612.A03 VDDIO
32
1 2 6
VDDRX NC#31
31 110324 -1
GBK160808T-601Y-GP PS8615_RST# 7 UMA_PX_LVDS 30 LVDS_VDD_EN_R 0R2J-2-GP 1 R919 2 DY
RST# ENPVCC/I2C_ADDR LVDS_VDD_EN 10,27,49,94 PS8615_VDD12
68.00248.011 PS8615_PD# 8 29 L_BKLT_CTRL_R 0R2J-2-GP 1 R920 2 DY
C944 PD# PWMO L_BKLT_CTRL 10,49,94
1

C933 2nd = 68.00217.241 9 28 L_BKLT_EN_R 0R2J-2-GP 1 R921 2 DY


SC4D7U6D3V3KX-GP 6,49 DP_HPD0_C HPD ENBLT L_BKLT_EN 10,27,49,94
DY SC1U6D3V2KX-GP PS8615_I2C_CFG 10 27
UMA_PX_LVDS I2C_CFG VDD12
PS8615_VDDIOX 11 26
2

VDDIOX DDC_SDA LVDS_DDC_DATA_R 94

1
12 25 C946 C947
VDDIOX DDC_SCL LVDS_DDC_CLK_R 94

CSDA/MSDA
CSCL/MSCL
SCD01U16V2KX-3GP

TESTMODE

SCD1U10V2KX-5GP
PH 4.7K 3D3V_S0_TRAVIS on page:94

RLV_AMP
RLV_CFG
DY

RLV_SSC
UMA_PX_LVDS

SW_OUT

2
VDD12

GPIO0
GNDX

REXT

GND
PS8615_SW_OUT PS8615_VDD12 PS8615_VDDRX
UMA_PX_LVDS UMA_PX_LVDS
L904 PS8612QFN48GTR-A0-GP
L905

13
14
15
16
17
18
19
20
21
22
23
24
1 2 1 2
IND-4D7UH-192-GP GBK160808T-601Y-GP
68.4R750.20C 68.00248.011 PS8615_VDDIO R902: LVDS output swing control
1

2nd = 68.4R71D.10E C934 2nd = 68.00217.241 C936 PS8615_SW_OUT 4.99K for default swing, change the value for swing adjust
UMA_PX_LVDS
SC4D7U6D3V3KX-GP SC1U6D3V2KX-GP
UMA_PX_LVDS
UMA_PX_LVDS
2

1
PS8615_RLV_AMP 1 R906 2 4K99R2F-L-GP
R909 PS8615_REXT 1 R907 2 4K99R2F-L-GP
10KR2J-3-GP UMA_PX_LVDS CSCL/MSCL UMA_PX_LVDS
CSDA/MSDA
PS8615_VDD12 PS8615_RLV_SSC

2
PS8615_RLV_CFG Single Link LVDS
C PS8615_PD# PS8615_RLV_LNK 1 C
TP901

1
C941
SCD01U16V2KX-3GP C940

1
C945 SCD1U10V2KX-5GP
UMA_PX_LVDS

2
SC1U6D3V2KX-GP UMA_PX_LVDS DY 3D3V_S0

2
101123

4
3
RN901
SRN4K7J-8-GP
UMA_PX_LVDS

1
2
Q901
CSCL/MSCL 1 6 SML1_CLK 6,27,85

UMA_PX_LVDS UMA_PX_LVDS default setting 2 5


2 R915 1 PS8615_I2C_CFG 2 R910 1 UMA_PX_LVDS
PS8615_VDDIO
4K7R2J-2-GP 4K7R2J-2-GP 3 4

2N7002KDW-GP
I2C_CFG: Initial code loading selection, internal pull-down ~80K 84.2N702.A3F SML1_DATA 6,27,85
L: Hardware self configuration 2nd = 84.DM601.03F
CSDA/MSDA
M: No initial code loading, external I2C control is expected
H: Load initial code from external EEPROM through MSCL/MSDA L: Hardware self configuration

DY1 110221 SB Bom change By EMI


2 R916 PS8615_RLV_SSC 2 R911 UMA_PX_LVDS
1 PS8615_VDDIO
4K7R2J-2-GP 4K7R2J-2-GP

RLV_SSC: LVDS SSC selection, internal pull-down ~80K


L: SSC off
M: +/- 0.5% central spreading
B L: SSC off B
H: +/- 1% central spreading

DY UMA_PX_LVDS
2 R917 1 PS8615_RLV_CFG 2 R912 1 PS8615_VDDIO
4K7R2J-2-GP 4K7R2J-2-GP

RLV_CFG: LVDS color depth and data mapping selection,


internal pull-down ~80K
L: 8-bit LVDS, VESA mapping
M: 8-bit LVDS, JEIDA mapping
H: 6-bit LVDS, both VESA and JEIDA mapping H: 6-bit LVDS, both VESA and JEIDA mapping

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TRAVIS
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 9 of 102
5 4 3 2 1
5 4 3 2 1

D1006
CH751H-40-1-GP
A K

UMA_PX 3D3V_S0
U1005

R1015 1 5
NC#1 VCC
6,9 LVDS_VDD_EN_R 1 220KR2F-GP
2 LVDS_VDD_EN_A 2 A
R1019
D UMA_PX 3 4 LVDS_VDD_EN_Y 2 0R2J-2-GP
1 D
GND Y LVDS_VDD_EN 9,27,49,94
UMA_PX

1
C1008
D1005 SCD47U10V2KX-GP NC7SV17P5X-GP
CH751H-40-1-GP UMA_PX 73.7SV17.00H

2
17,27,36,97 A_RST# K A UMA_PX
UMA_PX

R1013
3D3V_S0 1 10KR2J-3-GP
2 3D3V_S0
U1006 UMA_PX
D1007
CH751H-40-1-GP 1 5
L_BKLT_EN_A NC#1 VCC
K A 2 A
3 GND Y 4
UMA_PX
NC7SV17P5X-GP
R1016 73.7SV17.00H

D
6,9 L_BKLT_EN_R 1 100KR2F-L1-GP
2 UMA_PX
UMA_PX
Q1007

1
C1009 2N7002K-2-GP
SCD47U10V2KX-GP 84.2N702.J31
UMA_PX 2ND = 84.2N702.031

2
UMA_PX
C C

S
R1012
LVDS_SEQ_CTRL_R 1 0R0402-PAD
2 LVDS_SEQ_CTRL

R1017
1 0R0402-PAD
2 LVDS_CTRL_OE

R1001 110323-1
6,9 L_BKLT_CTRL_R 1 470R2J-2-GP
2 BKLT_CTRL_A 3D3V_S0
UMA_PX
U1003
2

C1017 1 5
SCD1U50V3KX-GP LCD_CTRL_Q OE VCC R1011
2 A
UMA_PX 3D3V_S0 3 UMA_PX Y 4 2 0R2J-2-GP
1 L_BKLT_CTRL 9,49,94
1

U1001 GND
UMA_PX
UMA_PX 74AHC1G126GW -GP
R1018 1 5 73.1G126.0AH
A VCC
1 0R2J-2-GP
2 LVDS_CTRL_B 2 B
UMA_PX 3 GND Y 4

LCD_CTRL_OE
NC7SZ08M5X-NL-GP

L_BKLT_CTRL_Y
73.7SZ08.AAG
R1010
6,9 L_BKLT_EN_R 1 0R2J-2-GP
2 VDD_EN_U
UMA_PX
3D3V_S0
B U1002 3D3V_S0 B
D1003
CH751H-40-1-GP 1 5 D1004 U1004
LCD_CTRL_D A VCC CH751H-40-1-GP
K A 2 UMA_PX
B 1 OE VCC 5
3 4 LCD_CTRL_R A K LCD_CTRL_U 2
GND Y A
UMA_PX 3 UMA_PX Y
GND 4
UMA_PX
R1005 NC7SZ08M5X-NL-GP 74AHC1G126GW -GP
1 100KR2J-1-GP
2 73.7SZ08.AAG R1006 73.1G126.0AH
UMA_PX 1 100KR2J-1-GP
2
UMA_PX
1

C1006
1

SCD47U10V2KX-GP C1007
UMA_PX SCD47U10V2KX-GP
2

UMA_PX
2

R1009
1 0R2J-2-GP
2 L_BKLT_EN 9,27,49,94
UMA_PX

A <Variant Name> A

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 10 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 11 of 102
5 4 3 2 1
5 4 3 2 1

D D

ADM1

5 M_A_A0 98 NP1
A0 NP1
5 M_A_A1 97 NP2
A1 NP2
5 M_A_A2 96
A2
5 M_A_A3 95 110 M_A_RAS# 5
A3 RAS#
5 M_A_A4 92 113 M_A_WE# 5
A4 WE#
5 M_A_A5 91 115 M_A_CAS# 5
A5 CAS#
5 M_A_A6 90
A6
5 M_A_A7 86 114 M_A_DIM0_CS#0 5
A7 CS0#
5 M_A_A8 89 121 M_A_DIM0_CS#1 5
A8 CS1#
5 M_A_A9 85
A9
5 M_A_A10 107 73 M_A_DIM0_CKE0 5
A10/AP CKE0
5 M_A_A11 84 74 M_A_DIM0_CKE1 5
A11 CKE1
5 M_A_A12 83
A12
5 M_A_A13 119 101 M_A_DIM0_CLK_DDR0 5
A13 CK0
5 M_A_A14 80 103 M_A_DIM0_CLK_DDR#0 5
A14 CK0#
5 M_A_A15 78
A15
5 M_A_BS2 79 102 M_A_DIM0_CLK_DDR1 5
A16/BA2 CK1
104 M_A_DIM0_CLK_DDR#1 5
CK1#
5 M_A_BS0 109
BA0
5 M_A_BS1 108 11 M_A_DM0 5
BA1 DM0
28 M_A_DM1 5
DM1
5 M_A_DQ0 5 46 M_A_DM2 5
DQ0 DM2
5 M_A_DQ1 7 63 M_A_DM3 5
DQ1 DM3
5 M_A_DQ2 15 136 M_A_DM4 5
DQ2 DM4
5 M_A_DQ3 17 153 M_A_DM5 5
DQ3 DM5
5 M_A_DQ4 4
DQ4 DM6
170 M_A_DM6 5 Intel HR DM tied to GND
5 M_A_DQ5 6 187 M_A_DM7 5 AMD still following previous design
DQ5 DM7
5 M_A_DQ6 16
DQ6
5 M_A_DQ7 18 200 PCH_SMBDATA 15,65,66
DQ7 SDA
5 M_A_DQ8 21 202 PCH_SMBCLK 15,65,66
DQ8 SCL
5 M_A_DQ9 23
DQ9 3D3V_S0
5 M_A_DQ10 33 198 M_A_EVENT# 5
DQ10 EVENT#
5 M_A_DQ11 35
DQ11
5 M_A_DQ12 22 199
DQ12 VDDSPD SA0_DIM0
5 M_A_DQ13 24
DQ13 SA0_DIM0
5 M_A_DQ14 34 197

2
1
DQ14 SA0 SA1_DIM0 FC1401 C1401 C1402 SA1_DIM0
5 M_A_DQ15 36 201
DQ15 SA1 SC2D2U10V3KX-1GP
C 39 C

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
5 M_A_DQ16 DQ16
41 77 DY

1
5 M_A_DQ17

2
DQ17 NC#1

2
5 M_A_DQ18 51
DQ18 NC#2
122
1D5V_S3
DY
53 125 R1401 R1402
5 M_A_DQ19 DQ19 NC#/TEST
5 M_A_DQ20 40
DQ20 110218 SB change to short pad 0R0402-PAD 0R0402-PAD
5 M_A_DQ21 42 75
DQ21 VDD1
5 M_A_DQ22 50 76

1
DQ22 VDD2
5 M_A_DQ23 52 81
DQ23 VDD3
5 M_A_DQ24 57 82
DQ24 VDD4
5 M_A_DQ25 59 87
DQ25 VDD5
5 M_A_DQ26 67 88
DQ26 VDD6
5 M_A_DQ27 69 93
DQ27 VDD7
5 M_A_DQ28 56 94
DQ28 VDD8
5 M_A_DQ29 58 99
DQ29 VDD9
5 M_A_DQ30 68 100
DQ30 VDD10

STANDARD TYPE
5 M_A_DQ31 70 105
DQ31 VDD11
5 M_A_DQ32 129 106
DQ32 VDD12
DDR_VREF_S3
C1412 can't stuff 5 M_A_DQ33 131
DQ33 VDD13
111
141 112
load too large let system abnormol at boot 5 M_A_DQ34
143
DQ34 VDD14
117
5 M_A_DQ35 DQ35 VDD15
5 M_A_DQ36 130 118
DQ36 VDD16
5 M_A_DQ37 132
DQ37 VDD17
123 110317 -1
5 M_A_DQ38 140 124
DQ38 VDD18
5 M_A_DQ39 142
1

1
1

C1411 C1412 C1413 FC1403 DQ39


5 M_A_DQ40 147 2
DQ40 VSS
SC1KP50V2KX-1GP DY DY 149 3
SC1KP50V2KX-1GP

SCD1U10V2KX-5GP

5 M_A_DQ41 DQ41 VSS


157 8 PCH_SMBDATA 1 R1403 2 0R2J-2-GP
SC1U6D3V2KX-GP

2
2

5 M_A_DQ42 DQ42 VSS SMB_DATA 18


159 9 PCH_SMBCLK 1 R1404 2 0R2J-2-GP
5 M_A_DQ43 DQ43 VSS SMB_CLK 18
5 M_A_DQ44 146 13
DQ44 VSS
5 M_A_DQ45 148 14
DQ45 VSS PCH_SMBDATA C1423
5 M_A_DQ46 158
DQ46 VSS
19 1 DY 2 SC10P50V2JN-4GP
160 20 PCH_SMBCLK C1424 1 DY 2 SC10P50V2JN-4GP
5 M_A_DQ47 DQ47 VSS
5 M_A_DQ48 163 25
DQ48 VSS
5 M_A_DQ49 165 26
DQ49 VSS
5 M_A_DQ50 175 31
DQ50 VSS
5 M_A_DQ51 177 32
DQ51 VSS
5 M_A_DQ52 164 37
DQ52 VSS
5 M_A_DQ53 166 38
DQ53 VSS
5 M_A_DQ54 174 43
DQ54 VSS
Place these caps 5 M_A_DQ55 176
DQ55 VSS
44
181 48
B 0D75V_S0 0D75V_S0 close to VTT1 and 5 M_A_DQ56
183
DQ56 VSS
49 B
5 M_A_DQ57 DQ57 VSS
VTT2. 5 M_A_DQ58 191
DQ58 VSS
54
5 M_A_DQ59 193 55
DQ59 VSS
5 M_A_DQ60 180 60
DQ60 VSS
1

C1418 182 61
5 M_A_DQ61 DQ61 VSS
SC10U6D3V5KX-1GP 192 65
5 M_A_DQ62
1

DQ62 VSS
1

DY C1419 C1420 C1421 C1422 FC1404 194 66


2

5 M_A_DQ63 DQ63 VSS


71
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

VSS
10 72
SCD1U10V2KX-5GP
2

2
2

5 M_A_DQS#0 DQS0# VSS


DY DY DY DY 5 M_A_DQS#1 27
DQS1# VSS
127
5 M_A_DQS#2 45 128
DQS2# VSS
5 M_A_DQS#3 62 133
DQS3# VSS 1D5V_S3
5 M_A_DQS#4 135 134
DQS4# VSS
5 M_A_DQS#5 152
DQS5# VSS
138 SODIMM A DECOUPLING
5 M_A_DQS#6 169 139
DQS6# VSS
5 M_A_DQS#7 186 144
DQS7# VSS
145
VSS
5 M_A_DQS0 12 150

1
1

1
DQS0 VSS FC1402 C1403 C1404 C1405 C1406 C1407 C1408 C1409 C1410
5 M_A_DQS1 29 151
DQS1 VSS
47 155

SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
5 M_A_DQS2 DQS2 VSS
64 156

2
5 M_A_DQS3

2
DQS3 VSS
5 M_A_DQS4 137
DQS4 VSS
161 DY DY DY DY DY
M_A_RST# 154 162
5 M_A_DQS5 DQS5 VSS
5 M_A_DQS6 171 167
DQS6 VSS
1

C1425 188 168


5 M_A_DQS7 DQS7 VSS
SCD1U10V2KX-5GP 172
DY VSS
116 173
2

5 M_A_DIM0_ODT0 ODT0 VSS


5 M_A_DIM0_ODT1 120 178
ODT1 VSS
179
VSS
DDR_VREF_S3 126 184 Layout Note:
1

1
1

1
VREF_CA VSS
0629-SA 1
VREF_DQ VSS
185
Place these Caps near
C1414 C1415 C1416 C1417
189 SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VSS
5 M_A_RST# 30 190 SO-DIMMA.
2

2
2

2
RESET# VSS
VSS
195 DY
196
VSS
0D75V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS
Intel HR channel A & B RST tied toghter
H =8mm DDR3-204P-125-GP
AMD have to separate channel A & B
A
62.10024.D21 A
2nd = 62.10017.P91
3rd = 62.10024.C21

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 14 of 102
5 4 3 2 1
5 4 3 2 1

ADM2

5 M_B_A0 98 NP1
A0 NP1
5 M_B_A1 97 NP2
A1 NP2
5 M_B_A2 96
A2
5 M_B_A3 95 110 M_B_RAS# 5
A3 RAS#
D 5 M_B_A4 92 113 M_B_WE# 5 D
A4 WE#
5 M_B_A5 91 115 M_B_CAS# 5
A5 CAS#
5 M_B_A6 90
A6 3D3V_S0
5 M_B_A7 86 114 M_B_DIM0_CS#0 5
A7 CS0#
5 M_B_A8 89 121 M_B_DIM0_CS#1 5
A8 CS1#
5 M_B_A9 85
A9
5 M_B_A10 107 73 M_B_DIM0_CKE0 5

1
A10/AP CKE0
5 M_B_A11 84 74 M_B_DIM0_CKE1 5
A11 CKE1 R1501
5 M_B_A12 83
A12 10KR2J-3-GP
5 M_B_A13 119 101 M_B_DIM0_CLK_DDR0 5
A13 CK0
5 M_B_A14 80 103 M_B_DIM0_CLK_DDR#0 5
A14 CK0#
5 M_B_A15 78

2
A15
5 M_B_BS2 79 102 M_B_DIM0_CLK_DDR1 5
A16/BA2 CK1 SA0_DIM1
104 M_B_DIM0_CLK_DDR#1 5
CK1#
5 M_B_BS0 109
BA0 SA1_DIM1
5 M_B_BS1 108 11 M_B_DM0 5
BA1 DM0
28 M_B_DM1 5
DM1
5 M_B_DQ0 5 46 M_B_DM2 5
DQ0 DM2

2
5 M_B_DQ1 7 63 M_B_DM3 5
DQ1 DM3
5 M_B_DQ2 15
DQ2 DM4
136 M_B_DM4 5 0423 -Sabine David R1502
5 M_B_DQ3 17
DQ3 DM5
153 M_B_DM5 5 110218 SB change to short pad 0R0402-PAD
5 M_B_DQ4 4
DQ4 DM6
170 M_B_DM6 5 Intel HR DM tied to GND
5 M_B_DQ5 6 187 M_B_DM7 5 AMD still following previous design

1
DQ5 DM7
5 M_B_DQ6 16
DQ6
5 M_B_DQ7 18 200 PCH_SMBDATA 14,65,66
DQ7 SDA
5 M_B_DQ8 21 202 PCH_SMBCLK 14,65,66
DQ8 SCL
5 M_B_DQ9 23
DQ9 3D3V_S0
5 M_B_DQ10 33
DQ10 EVENT#
198 M_B_EVENT# 5 Intel HR B channel address is 01
5 M_B_DQ11 35 AMD B channel address is 10
DQ11
5 M_B_DQ12 22 199
DQ12 VDDSPD
5 M_B_DQ13 24
DQ13

1
34 197 SA0_DIM1 FC1501
5 M_B_DQ14 DQ14 SA0
36 201 SA1_DIM1 C1501 DY C1502

SCD1U10V2KX-5GP
5 M_B_DQ15 DQ15 SA1
39 DY

SC2D2U10V3KX-1GP
5 M_B_DQ16

2
DQ16
41 77

SCD1U10V2KX-5GP
5 M_B_DQ17 DQ17 NC#1
5 M_B_DQ18 51 122
DQ18 NC#2 1D5V_S3
5 M_B_DQ19 53 125
DQ19 NC#/TEST
5 M_B_DQ20 40
DQ20
5 M_B_DQ21 42 75
DQ21 VDD1
5 M_B_DQ22 50 76
DQ22 VDD2
5 M_B_DQ23 52 81
DQ23 VDD3
C
5 M_B_DQ24 57 82 C
DQ24 VDD4
5 M_B_DQ25 59 87
DQ25 VDD5
5 M_B_DQ26 67 88
DQ26 VDD6
5 M_B_DQ27 69 93
DQ27 VDD7
5 M_B_DQ28 56 94
DQ28 VDD8
5 M_B_DQ29 58 99
DQ29 VDD9
5 M_B_DQ30 68 100
DQ30 VDD10
5 M_B_DQ31 70 105
DQ31 VDD11
C1516 can't stuff 5 M_B_DQ32 129
DQ32 VDD12
106
131 111
load too large let system abnormol at boot 5 M_B_DQ33
141
DQ33 VDD13
112
5 M_B_DQ34 DQ34 VDD14
5 M_B_DQ35 143 117
DDR_VREF_S3 DQ35 VDD15
5 M_B_DQ36 130 118
DQ36 VDD16
5 M_B_DQ37 132 123
DQ37 VDD17
5 M_B_DQ38 140 124
DQ38 VDD18
5 M_B_DQ39 142
DQ39 1D5V_S3
5 M_B_DQ40 147 2
1

DQ40 VSS
1

C1515 C1516 C1517 FC1503 149 3


5 M_B_DQ41 DQ41 VSS
SCD1U10V2KX-5GP DY 157 8 SODIMM B DECOUPLING
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

5 M_B_DQ42 DQ42 VSS


DY 159 9
SC1U6D3V2KX-GP
2

2
2

5 M_B_DQ43 DQ43 VSS


5 M_B_DQ44 146 13
DQ44 VSS
5 M_B_DQ45 148 14
DQ45 VSS

1
158 19 C1503 C1504 C1505 C1506 C1507 C1508 C1509 C1510 FC1502
5 M_B_DQ46 DQ46 VSS
160 20

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP
5 M_B_DQ47

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
DQ47 VSS
5 M_B_DQ48 163 25 DY

2
DQ48 VSS
5 M_B_DQ49 165
DQ49 VSS
26 DY DY DY

STANDARD TYPE
5 M_B_DQ50 175 31
DQ50 VSS
5 M_B_DQ51 177 32
DQ51 VSS
5 M_B_DQ52 164 37
DQ52 VSS
5 M_B_DQ53 166 38
DQ53 VSS
5 M_B_DQ54 174 43
DQ54 VSS
Place these caps 5 M_B_DQ55 176
DQ55 VSS
44
181 48
0D75V_S0 close to VTT1 and 5 M_B_DQ56
183
DQ56 VSS
49 Layout Note:
5 M_B_DQ57

1
1

1
DQ57 VSS
VTT2. 5 M_B_DQ58 191
DQ58 VSS
54
Place these Caps near
C1511 C1512 C1513
193 55 C1514

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
5 M_B_DQ59 DQ59 VSS
180 60 SO-DIMMB. SCD1U10V2KX-5GP

2
5 M_B_DQ60

2
DQ60 VSS
5 M_B_DQ61 182
DQ61 VSS
61 DY
C1518 C1519 C1520 C1521 5 M_B_DQ62 192 65
1

FC1504 DQ62 VSS


5 M_B_DQ63 194 66
DY DQ63 VSS
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

71
SCD1U10V2KX-5GP

B VSS B
DY 10 72
2

5 M_B_DQS#0 DQS0# VSS


5 M_B_DQS#1 27 127
DQS1# VSS
5 M_B_DQS#2 45 128
DQS2# VSS
5 M_B_DQS#3 62 133
DQS3# VSS
5 M_B_DQS#4 135 134
DQS4# VSS
5 M_B_DQS#5 152 138
DQS5# VSS
5 M_B_DQS#6 169 139
DQS6# VSS
5 M_B_DQS#7 186 144
DQS7# VSS
145
VSS
5 M_B_DQS0 12 150
DQS0 VSS
5 M_B_DQS1 29 151
DQS1 VSS
5 M_B_DQS2 47 155
DQS2 VSS
5 M_B_DQS3 64 156
DQS3 VSS
5 M_B_DQS4 137 161
DQS4 VSS
5 M_B_DQS5 154 162
DQS5 VSS
5 M_B_DQS6 171 167
DQS6 VSS
5 M_B_DQS7 188 168
DQS7 VSS
172
M_B_RST# VSS
5 M_B_DIM0_ODT0 116 173
ODT0 VSS
5 M_B_DIM0_ODT1 120 178
1

C1522 ODT1 VSS


179
DY SCD1U10V2KX-5GP VSS
DDR_VREF_S3 126 184
VREF_CA VSS
1 185 SO-DIMMB is placed farther from
2

VREF_DQ VSS
189
0423 -Sabine David 30
VSS
190 the Processor than SO-DIMMA
5 M_B_RST# RESET# VSS
195
VSS
196
VSS
0D75V_S0 203 205
VTT1 VSS
Intel HR channel A & B RST tied toghter 204
VTT2 VSS
206
AMD have to separate channel A & B
H = 4mm DDR3-204P-123-GP
62.10017.Z61
2nd = 62.10017.M41
3rd = 62.10017.X31

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 15 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 16 of 102
5 4 3 2 1
5 4 3 2 1

Part 5 of 5
110307 SB change bom by siv FCH1E

2
3D3V_S0 3D3V_S0
C1716 PCIE_RST#_C AE2 AF3
A_RST#_R PCIE_RST# PCICLK0
10,27,36,97 A_RST# 1 R1717 2
SC470P50V2KX-3GP AD5 AF1 PCI_CLK1 21

1
A_RST# PCICLK1/GPO36

2
33R2J-2-GP AF5
C1707 1 A_RX0P_C PCICLK2/GPO37 PCI_CLK3_R
4 UMI_FCH_APU_RX0P 2 SCD1U16V2KX-3GP AE30 AG2 R1731 1 222R2J-2-GP CLK_PCI_LPC 21,65,71 R1727 R1723
C1708 1 A_RX0N_C UMI_TX0P PCICLK3/GPO38 PCI_CLK4_R
4 UMI_FCH_APU_RX0N 2 SCD1U16V2KX-3GP AE32 AF6 R1715 1 20R0402-PAD PCI_CLK4 21
10KR2J-3-GP 10KR2J-3-GP
UMI_TX0N PCICLK4/14M_OSC/GPO39

PCI CLKS
C1709 1 2 SCD1U16V2KX-3GP A_RX1P_C AD33 DY DIS_UMA
4 UMI_FCH_APU_RX1P UMI_TX1P
C1710 1 2 SCD1U16V2KX-3GP A_RX1N_C AD31 AB5
4 UMI_FCH_APU_RX1N

1
C1711 1 A_RX2P_C UMI_TX1N PCIRST# PX4_SUPPORT dGPU_PRSNT#
4 UMI_FCH_APU_RX2P 2 SCD1U16V2KX-3GP AD28 UMI_TX2P

1
C1712 1 2 SCD1U16V2KX-3GP A_RX2N_C AD29 DY
4 UMI_FCH_APU_RX2N UMI_TX2N

2
C1713 1 2 SCD1U16V2KX-3GP A_RX3P_C AC30 AJ3 C1718
4 UMI_FCH_APU_RX3P UMI_TX3P AD0/GPIO0 SCD1U16V2ZY-2GP
C1714 1 2 SCD1U16V2KX-3GP A_RX3N_C AC32 AL5 R1728 R1722
4 UMI_FCH_APU_RX3N

2
UMI_TX3N AD1/GPIO1 10KR2J-3-GP 10KR2J-3-GP
AD2/GPIO2 AG4
D D
4 UMI_APU_FCH_TX0P AB33 UMI_RX0P AD3/GPIO3
AL6 PX PX
4 UMI_APU_FCH_TX0N AB31 AH3

1
UMI_RX0N AD4/GPIO4
4 UMI_APU_FCH_TX1P AB28 UMI_RX1P AD5/GPIO5 AJ5
4 UMI_APU_FCH_TX1N AB29 AL1
UMI_RX1N AD6/GPIO6 VRAM_800_900
4 UMI_APU_FCH_TX2P Y33 AN5
UMI_RX2P AD7/GPIO7 dGPU_PRSNT#
4 UMI_APU_FCH_TX2N Y31 UMI_RX2N AD8/GPIO8 AN6 -Sabin David
Y28 AJ1 PX4_SUPPORT for SW Jin define
4 UMI_APU_FCH_TX3P UMI_RX3P AD9/GPIO9 ZP_ODD_Support
4 UMI_APU_FCH_TX3N Y29 UMI_RX3N AD10/GPIO10 AL8
AD11/GPIO11 AL3
1 R1708 2 APU_PCIE_CALRP AF29 AM7
590R2F-GP APU_PCIE_CALRN PCIE_CALRP AD12/GPIO12 3D3V_S0
1D1V_S0 1 2 AF31 AJ6
PCIE_CALRN AD13/GPIO13

PCI EXPRESS INTERFACES


R1709 AK7 3D3V_S0
2KR2F-3-GP AD14/GPIO14
V33 GPP_TX0P AD15/GPIO15 AN8 110317 -1

2
V31 GPP_TX0N AD16/GPIO16 AG9

2
W30 AM11 R1729
GPP_TX1P AD17/GPIO17 R1744 10KR2J-3-GP
W32 AJ10
GPP_TX1N AD18/GPIO18 10KR2J-3-GP
AB26 GPP_TX2P AD19/GPIO19 AL12 800MHz
AB27 AK11 Zero ODD

1
GPP_TX2N AD20/GPIO20 VRAM_800_900
AA24 AN12

1
GPP_TX3P AD21/GPIO21 Debug Strap ZP_ODD_Support
AA23 AG12
GPP_TX3N AD22/GPIO22

2
AD23/GPIO23 AE12 PCI_AD23 21

2
AA27 AC12 R1730

PCI INTERFACE
GPP_RX0P AD24/GPIO24 PCI_AD24 21
AA26 AE13 R1745 10KR2J-3-GP
GPP_RX0N AD25/GPIO25 PCI_AD25 21
10KR2J-3-GP
W27 GPP_RX1P AD26/GPIO26 AF13 PCI_AD26 21 PX 900MHz
V27 AH13 R1726 Non Zero ODD
PCI_AD27 21

1
GPP_RX1N AD27/GPIO27 DGPU_PWROK_1
V26 AH14 1 0R2J-2-GP
2 DGPU_PWROK 86,92,93

1
GPP_RX2P AD28/GPIO28
W26 AD15
GPP_RX2N AD29/GPIO29
W24 GPP_RX3P AD30/GPIO30 AC15
W23 GPP_RX3N AD31/GPIO31 AE16
AN3
CBE0# R1716
CBE1# AJ8
R1710 AN10 PCIE_RST#_C 1 33R2J-2-GP
2
C CLK_CALRN CBE2# PLT_RST# 31,65,66,71,83 C
1D1V_S0 1 2KR2F-3-GP
2 F27 AD12
CLK_CALRN CBE3#
AG10
FRAME#

1
AK9 C1715
DEVSEL# 3D3V_S0 3D3V_S0
G30 PCIE_RCLKP IRDY# AL10 SC150P50V2KX-GP folloiwng Intel HR netname
110317 -1 EXT clock_Gen G28 AF10

2
PCIE_RCLKN TRDY#
PAR AE10

2
R1732 1 20R0402-PAD FCHDISP_CLKP_R R26 AH1
6 DISP_CLKP DISP_CLKP STOP#

2
R1733 1 20R0402-PAD FCHDISP_CLKN_R T26 AM9 R1725
6 DISP_CLKN DISP_CLKN PERR#
AH8 R1724 10KR2J-3-GP
SERR#
For TRAVIS H33
DISP2_CLKP REQ0# AG15 10KR2J-3-GP DY
H31 AG13 DY LDT_STP# connection is just

1
DISP2_CLKN REQ1#/GPIO40
1005-SA AF15
for chipset automation purpose.

1
FCHAPU_CLKP_R REQ2#/CLK_REQ8#/GPIO41 GPIO42 1
6 APU_CLKP
R1734 1 20R0402-PAD T24 APU_CLKP REQ3#/CLK_REQ5#/GPIO42 AM17 TP1704 Muxless support
6 APU_CLKN
R1735 1 20R0402-PAD FCHAPU_CLKN_R T23 APU_CLKN GNT0# AD16 It is an automatic test for
GNT1#/GPO44 AD13 PE_GPIO0 83 PE_GPIO0 ->VGA_RESET AMD validation team only
DIS_PX1 R1736 2 0R2J-2-GP FCHGFX_CLKP_R J30 AD21 PE_GPIO1 ->VGA_PowerEnable
83 CLK_PCIE_VGA SLT_GFX_CLKP GNT2#/SD_LED/GPO45 PE_GPIO1 93
DIS_PX1 R1737 2 0R2J-2-GP FCHGFX_CLKN_R K29 AK17 GPIO46 1
83 CLK_PCIE_VGA# SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 TP1705
CLKRUN# AD19 PM_CLKRUN# 27
110317 -1 H27
GPP_CLK0P LOCK#
AH9
NEW H28 GPP_CLK0N PM_CLKRUN#
AF18
R1738 CLK_MINI1_R INTE#/GPIO32
65 CLK_PCIE_WLAN 1 20R0402-PAD J27 AE18 checklist:No PU Res
WLAN R1739 CLK_MINI1#_R GPP_CLK1P INTF#/GPIO33
65 CLK_PCIE_WLAN# 1 20R0402-PAD K26 AC16 Integrated Resistor PU10K
GPP_CLK1N INTG#/GPIO34
AD18 SATA_ODD_DA# 56
CLK_SRC2 INTH#/GPIO35
66 CLK_PCIE_WWAN 3G 1 R1740 2 0R2J-2-GP F33 GPP_CLK2P
3G 66 CLK_PCIE_WWAN# 3G 1 R1741 2 0R2J-2-GP CLK_SRC2# F31
GPP_CLK2N
R1742 1 20R0402-PAD LAN_CLK_R E33
LAN 31 CLK_PCIE_LAN GPP_CLK3P
R1743 1 20R0402-PAD LAN_CLK#_R E31 B25 LPCCLK0_R R1719 1 222R2J-2-GP
31 CLK_PCIE_LAN# GPP_CLK3N LPCCLK0 LPC_CLK0 21,27
D25 LPC_CLK1 21
CLOCK GENERATOR

LPCCLK1 LPC_AD0
M23 D27 LPC_AD0 27,65,71
GPP_CLK4P LAD0 LPC_AD1
M24 C28 LPC_AD1 27,65,71
B GPP_CLK4N LAD1 B
LPC

A26 LPC_AD2
LAD2 LPC_AD2 27,65,71
M27 A29 LPC_AD3
GPP_CLK5P LAD3 LPC_AD3 27,65,71
M26 LFRAME# A31
GPP_CLK5N LPC_FRAME# 27,65,71
GPP CLK port Device CLKREQ# LDRQ0#
B27
N25 AE27
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 INT_SERIRQ
0 New Card 0 N26
GPP_CLK6N SERIRQ/GPIO48
AE19 INT_SERIRQ 27 110301 SB bom change
1 WLAN 1 R23
GPP_CLK7P C1702
SC10P50V2JN-4GP
R24
GPP_CLK7N 32K_X1
2 WWAN 2 DMA_ACTIVE# G25 ALLOW_STOP 6 1 2
N27 PROCHOT# E28 APU_PROCHOT# 6
GPP_CLK8P
3 LAN 3 R27 E26
APU

GPP_CLK8N APU_PG H_CPUPWRGD_E 6,36,71,97


LDT_STP# G26
4 X APU_RST# F26 APU_RST# 6

3
J26 14M_25M_48M_OSC
5 X R1703 X1702
G2 32K_X1 20MR3-GP X-32D768KHZ-34GPU
32K_X1
6 X 110218 SB change to short pad 82.30001.661
25M_X1 C31 G4 32K_X2 2ND = 82.30001.B21

2
25M_X1 32K_X2
7 X 2 R1706 1 PCH_SUSCLK_KBC 27

2
H7 0R0402-PAD
S5_CORE_EN
8 X RTCCLK F1 RTC_CLK 21
S5 PLUS

25M_X2 C33 F3 INTRUDER_ALERT#1


25M_X2 INTRUDER_ALERT# TP1701 32K_X2
E6 RTC_AUX_S5 1 2
VDDBT_RTC_G

25M_X1 71.HUDM2.M03 C1703 SC8P50V2CN-3GP


1

1
1

C1706 C1720
R1701 G1701 DY SC1U6D3V2KX-GP
CL = 7pF
SCD1U16V2ZY-2GP

1 1MR2J-1-GP 25M_X2 GAP-OPEN


2 DY Freq tolertance :+/- 20 ppm
2

X1701
2

A A
1 2
<Variant Name>
XTAL-25MHZ-102-GP

Dr-Bios.com
2

82.30020.851
C1704 2ND = 82.30020.791 C1705
SC12P50V2JN-3GP 3RD = 82.30020.A31 SC12P50V2JN-3GP Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

CL = 12pF Title

Freq tolertance :+/- 30ppm HUDSON-M2(1/6)


Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 17 of 102
5 4 3 2 1
5 4 3 2 1

USB
Pair Device
0 USB 2.0 EXT2(For SW Debug)
3D3V_S5
1 WLAN
RN1802 2 NC
4 1 SCLK1
SDATA1 FCH1A Part 1 of 5
3 2 3 WWAN
110218 SB change to short pad AB6
PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
G8
SRN10KJ-5-GP R2 4 BT
RI#/GEVENT22# USB_RCOMP 2 R1819 1

USB MISC
W7 B9
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP 11K8R2F-GP
27,29,36,44 PM_SLP_S3# T3
SLP_S3# 5 3G SIM Card
1 R1845 2 DY VGA_PD 27,44 PM_SLP_S5# W2
SLP_S5# USB_FSD1P/GPIO186
H1
10KR2J-3-GP 2 R1809 1 PM_PWRBTN#_R J4 H3 6 USB PORT
27,97 PM_PWRBTN# PWR_BTN# USB_FSD1N
D 2 R1825 1 PM_RSMRST# 0R0402-PAD N7 D
36 FCH_PWRGD PWR_GOOD
integrated PU 100KR2J-1-GP H6 7 CCD
FCH_TEST0 USB_FSD0P/GPIO185
TP1801 1 T9 H5

USB 1.1
DY FCH_TEST1 TEST0 USB_FSD0N
110218 SB change to short pad TP1802 1 T10 TEST1/TMS 8 USB PORT
1 R1824 2 10KR2J-3-GP EC_SCI# TP1803 1 FCH_TEST2 V9 H10
TEST2 USB_HSD13P USB20_DP3 82
1 R1833 2 10KR2J-3-GP EC_SWI# R1814 2 0R0402-PAD
1 EC_A20M#_R AE22 G10 9

ACPI / WAKE UP EVENTS


27 H_A20GATE GA20IN/GEVENT0# USB_HSD13N USB20_DM3 82
DY R1813 2 0R0402-PAD
1 EC_KB_RST#_R AG19
27 H_RCIN# KBRST#/GEVENT1#
EC_SCI# R9 K10 10 USB 3.0 ccd 3.0
27 EC_SCI# LPC_PME#/GEVENT3# USB_HSD12P USB20_DP2 82
1 R1843 2 DY PM_PWRBTN# C26 LPC_SMI#/GEVENT23# USB_HSD12N
J12 USB20_DM2 82
10KR2J-3-GP T5 11 USB 3.0 on board port
LPC_PD#/GEVENT5#
U4 G12 USB20_DP1 62
1 R1839 2DY PCIE_WAKE# PCIE_WAKE# SYS_RESET#/GEVENT19# USB_HSD11P
31,65,66 PCIE_WAKE# K1
WAKE#/GEVENT8# USB_HSD11N
F12 USB20_DM1 62 12 USB 3.0 ext port 1
10KR2J-3-GP V7
R1820 0R2J-2-GP FCH_THERMTRIP# IR_RX1/GEVENT20#
integrated PU 6,36,85 H_THERMTRIP# 1 2 R10
THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P
K12 13 USB 3.0 ext port 2
3D3V_S0 1 R1815 2 WD_PWRGD AF19 K13
(FCH Rev 1.2 updated) 10KR2J-3-GP WD_PWRGD USB_HSD10N
PM_RSMRST# U2 B11
RSMRST# USB_HSD9P
1 R1844 2 DY USB_OC7# integrated PU is not USB_HSD9N D11
10KR2J-3-GP 110328 -1 AG24
supported when the pin CLK_REQ4#/SATA_IS0#/GPIO64

1
C1802 DY 0R0402-PAD 1 R1829 2 PCIE_CLK_LAN_RQ1#_R AE24 E10
31 PCIE_CLK_LAN_REQ# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P
have not use OC function if configured for USB OC SCD1U10V2KX-5GP AE26 F10
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N
(FCH Rev 1.2 updated) AF22
in JE40 Project

2
FCH_GPIO55 CLK_REQ0#/SATA_IS3#/GPIO60
110328 -1 TP1804 1 AH17
SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P
C10 USB_PP7 49
AG18 A10 USB_PN7 49
HDA_SPKR_R SATA_IS5#/FANIN3/GPIO59 USB_HSD7N
29 HDA_SPKR 1 R1840 2 0R0402-PAD AF24
SPKR/GPIO66
14 SMB_CLK AD26 H9 USB_PP6 82
SCL0/GPIO43 USB_HSD6P
14 SMB_DATA AD25 SDA0/GPIO47 USB_HSD6N G9 USB_PN6 82
SCLK1 T7
SCL1/GPIO227

USB 2.0
SDATA1 R7 A8
SDA1/GPIO228 USB_HSD5P USB_PP5 66
66 CLK_PCIE_WWAN_REQ# 0R0402-PAD 1 R1828 2 CLK_PCIE_WWAN_REQ#_R AG25 C8
CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N USB_PN5 66
0R0402-PAD 1 R1834 2 CLK_PCIE_WLAN_REQ#_R AG22

GPIO
65 CLK_PCIE_WLAN_REQ# CLK_REQ1#/FANOUT4/GPIO61
J2 IR_LED#/LLB#/GPIO184 USB_HSD4P F8 USB_PP4 63
base on AMD suggestion, 110328 -1 AG26 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N E8 USB_PN4 63
TP1805 1 VGA_PD V8
DDR3_RST#/GEVENT7#/VGA_PD
make sure Travis_EN# function first W8
GBE_LED0/GPIO183 USB_HSD3P
C6 USB_PP3 66
Y6 A6
so confrim function work nornally or not V10
SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N USB_PN3 66
3D3V_S0 on GPIO66,if work nornally, GBE_LED2/GEVENT10#
C DY AA8
GBE_STAT0/GEVENT11# USB_HSD2P
C5 C
110216 SB BIOS can re-programming pin to GPIO55 1 R1822 2 CLKREQG# AF25 A5
85 PEG_CLKREQ# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N
integrated PU 0R2J-2-GP
(DYR1841,stuff R1842) C1
USB_HSD1P USB_PP1 65
1 R1837 2 10KR2J-3-GP H_A20GATE and change Travis_EN# to GPIO55 in the furtur USB_OC7# M7 C3
BLINK/USB_OC7#/GEVENT18# USB_HSD1N USB_PN1 65
1 R1838 2 10KR2J-3-GP H_RCIN# EC_SWI# R8
keep Gevent4# for PCIE_RST2 used 27 EC_SWI#
1 R1830 2 SATA_ODD_PRSNT#_R T1
USB_OC6#/IR_TX1/GEVENT6#
E1
56 SATA_ODD_PRSNT# USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P USB_PP0 82
0R2J-2-GP P6 E3
56 ODD_DA_Q USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N USB_PN0 82
ZERO ODD F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
AMD define two function pin P5 C16 USBSS_CALRP R1817 1 USB3 2 1KR2F-3-GP
USB_OC2#/TCK/GEVENT14# USBSS_CALRP
110328 -1 J7 A16 USBSS_CALRN R1818 1 USB3 2 1KR2F-3-GP 1D1V_S5
RN1801 on same pin in CRB T8
USB_OC1#/TDI/GEVENT13# USBSS_CALRN

USB OC
SMB_CLK USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
1 4 A14 USB30_TXDP3 82
SMB_DATA USB_SS_TX3P
2 3 C14 USB30_TXDN3 82
USB_SS_TX3N
USB 3.0 ext port 2
SRN2K2J-1-GP 1 R1802 2 33R2J-2-GP HDA_BITCLK AB3 C12
29 HDA_CODEC_BITCLK AZ_BITCLK USB_SS_RX3P USB30_RXDP3 82
1 R1803 2 33R2J-2-GP HDA_SDOUT AB1 A12
29 HDA_CODEC_SDOUT AZ_SDOUT USB_SS_RX3N USB30_RXDN3 82
HDA_SDIN0 AA2
29 HDA_SDIN0 AZ_SDIN0/GPIO167
DY Y5 D15 USB30_TXDP2 82
AZ_SDIN1/GPIO168 USB_SS_TX2P
2 1 EC1802 Y3
AZ_SDIN2/GPIO169 USB_SS_TX2N
B15 USB30_TXDN2 82
SC180P50V2JN-1GP Y1 USB 3.0 ext port 1
HDA_SYNC AZ_SDIN3/GPIO170

HD AUDIO
29 HDA_CODEC_SYNC 1 R1804 2 33R2J-2-GP AD6
AZ_SYNC USB_SS_RX2P
E14 USB30_RXDP2 82
1 R1805 2 33R2J-2-GP HDA_RST# AE4 F14
29 HDA_CODEC_RST# AZ_RST# USB_SS_RX2N USB30_RXDN2 82
EC1801 F15
USB_SS_TX1P USB30_TXDP1 35
1

DY SC180P50V2JN-1GP K19 G15

USB 3.0
PS2_DAT/SDA4/GPIO187 USB_SS_TX1N USB30_TXDN1 35
J19
PS2_CLK/CEC/SCL4/GPIO188 USB 3.0 on board port
J21 H13
2

SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P USB30_RXDP1 35


G13 USB30_RXDN1 35
USB_SS_RX1N
D21 J16 USB30_TXDP0 49
PS2KB_DAT/GPIO189 USB_SS_TX0P
C20 H16 USB30_TXDN0 49
PS2KB_CLK/GPIO190 USB_SS_TX0N
D23
PS2M_DAT/GPIO191 CCD
C22 J15 USB30_RXDP0 49
PS2M_CLK/GPIO192 USB_SS_RX0P
USB_SS_RX0N K15 USB30_RXDN0 49
F21 KSO_0/GPIO209
B E20 H19 SCL2 RN1805 B
Function Name Integrated Resistor External Resistor KSO_1/GPIO210 SCL2/GPIO193 SDAT2 SCL2
F20 G19 4 1
KSO_2/GPIO211 SDA2/GPIO194 SCLK3 SDAT2
A22 G22 3 2
RN1803 GA20IN H_A20GATE 8.2K PU 10K PU 3.3_S0 DY E18
KSO_3/GPIO212 SCL3_LV/GPIO195
G21 SDATA3
SCLK3 6
KSO_4/GPIO213 SDA3_LV/GPIO196 SDATA3 6
8 1 HDA_SDIN0 A20 E22 SRN10KJ-5-GP
7 2 HDA_CODEC_BITCLK KBRST# H_RCIN# 8.2K PU 10K PU 3.3_S0 DY J18
KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197
H22
KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198
6 DY 3
PME# EC_SCI# 10K PU 10K PU 3.3_S5 DY H18
KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
J22 EC_PWM2 21 If not used SMBUS or GPIO ,PD 10K
5 4 HDA_CODEC_RST# G18 H21
KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200
B21
SRN10KJ-6-GP THRIPTRIP# H_THERMTRIP# 10K PU 10K PU 3.3_S5 DY K18
KSO_9/GPIO218
K21
KSO_10/GPIO219 EMBEDDED CTRL KSI_0/GPIO201
D19 K22
PCIE_RST2# FCH_PCIE_RST# 10K PU KSO_11/GPIO220 KSI_1/GPIO202
Checklist suggestion A18 KSO_12/GPIO221 KSI_2/GPIO203 F22
C18 F24
do not stuff by default Gevent5 MEM_Hot# 10K PU B19
KSO_13/GPIO222 KSI_3/GPIO204
E24 3D3V_S5
KSO_14/XDB0/GPIO223 KSI_4/GPIO205
B17 B23
Gevent6 EC_SWI# 10K PU 10K PU 3.3_S5 DY A24
KSO_15/XDB1/GPIO224 KSI_5/GPIO206
C24 RN1806
KSO_16/XDB2/GPIO225 KSI_6/GPIO207 SCLK3
D17 F18 4 1
WAKE# PCIE_WAKE# 10K PU 10K PU 3.3_S5 DY KSO_17/XDB3/GPIO226 KSI_7/GPIO208 SDATA3 3 2
USB_OC0# USB_OC0# 10K PU SRN10KJ-5-GP
USB_OC1# USB_OC1# 10K PU 71.HUDM2.M03
USB_OC2# USB_OC2# 10K PU
Gevent15# SATA_ODD_PRSNT# 10K PU
Gevent16# ODD_DA 10K PU 3D3V_AUX_S5

USB_OC5# USB_OC5# 10K PU


2 R1826 1
Gevent17# EC_SWI# 10K PU 10K PU 3.3_S0 DY 100KR2J-1-GP
USB_OC7# USB_OC7# 10K PU
2

R1827
LPC_SMI# EC_SMI# 8.2K PU 10K PU 3.3_S5 DY 10KR2J-3-GP Q1828
4 3 PM_RSMRST# 1 R1831 2
A GPIO35 SATA_ODD_DA# 8.2K PU 1KR2J-1-GP
RSMRST#_KBC 27 A
1

51123_PGOOD_2 5 2
SERIRQ INT_SERIRQ 8.2K PU 10K PU 3.3_S0 DY 3V_5V_POK 41

Dr-Bios.com
6 1
CLK_REQ0 CLK_PCIE_NEW_REQ# 8.2K PU <Variant Name>
2N7002KDW-GP
CLK_REQ1 CLK_PCIE_WLAN_REQ# 8.2K PU
84.2N702.A3F
CLK_REQ2 CLK_PCIE_WWAN_REQ# 8.2K PU 2nd = 84.DM601.03F Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CLK_REQ3 PCIE_CLK_LAN_RQ1# 8.2K PU
Title
CLK_REQG PEG_CLKREQ# 8.2K PU
HUDSON-M2(2/6)
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 18 of 102
5 4 3 2 1
5 4 3 2 1

Part 2 of 5
FCH1B

56 SATA_TXP0 AK19 SATA_TX0P SD_CLK/SCLK_2/GPIO73


AL14
56 SATA_TXN0 AM19 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 AN14
1st SATA HDD AL20
SD_CD#/GPIO75 AJ12
AH12
56 SATA_RXN0 SATA_RX0N SD_WP/GPIO76
56 SATA_RXP0 AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13
AM13
SD_DATA1/SDATO_2/GPIO78

SD CARD
56 SATA_TXP1 AN22 SATA_TX1P SD_DATA2/GPIO79 AH15
56 SATA_TXN1 AL22 AJ14
SATA_TX1N SD_DATA3/GPIO80
D SATA ODD AH20 AC4 GBE_COL D
56 SATA_RXN1 SATA_RX1N GBE_COL GBE_CRS
56 SATA_RXP1 AJ20 AD3
SATA_RX1P GBE_CRS
GBE_MDCK AD9
AJ22 W10 GBE_MDIO 1 R1920 2 3D3V_S5
SATA_TX2P GBE_MDIO 10KR2J-3-GP
AH22 AB8
SATA_TX2N GBE_RXCLK
E-SATA AM23
GBE_RXD3 AH7
AF7
SATA_RX2N GBE_RXD2 RN1903
AK23 SATA_RX2P GBE_RXD1 AE7
GBE_RXD0 AD7 8 1
AH24 AG8 7 2
SATA_TX3P GBE_RXCTL/RXDV GBE_RXERR
AJ24 SATA_TX3N GBE_RXERR AD1 6 3
2nd SATA HDD GBE_TXCLK AB7 5 4

GBE LAN
AN24 SATA_RX3N GBE_TXD3
AF9
AL24 AG6 SRN10KJ-6-GP
SATA_RX3P GBE_TXD2
GBE_TXD1 AE8
AL26 AD8
SATA_TX4P GBE_TXD0
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
AC2
GBE_PHY_PD
AJ26 SATA_RX4N GBE_PHY_RST#
AA7
AH26 W9 GBE_PHY
SATA_RX4P GBE_PHY_INTR
AN29
SATA_TX5P
AL28 V6
SATA_TX5N SPI_DI/GPIO164
SPI_DO/GPIO163 V5
AK27 V3
SATA_RX5N SPI_CLK/GPIO162

SERIAL ATA
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6

SPI ROM
V1
ROM_RST#/SPI_WP#/GPIO161
AL29 NC#AL29
AN31 R1904 1 2150R2F-1-GP
NC#AN31
VGA_RED L30 UMA_PX CRT_RED 94
AL31 R1905 1 2150R2F-1-GP
NC#AL31
C
AL33 NC#AL33 VGA_GREEN
L32 UMA_PX CRT_GREEN 94 C
R1906 1 2150R2F-1-GP
AH33
NC#AH33 VGA_BLUE
M29 UMA_PX CRT_BLUE 94
AH31 NC#AH31
AJ33 NC#AJ33 VGA_HSYNC/GPO68
M28 CRT_HSYNC 94
AJ31 NC#AJ31 VGA_VSYNC/GPO69 N30 CRT_VSYNC 94

VGA DAC
VGA_DDC_SDA/GPO70 M33 CRT_DDC_DATA 94
R1901 N32
SATA_CALP VGA_DDC_SCL/GPO71 CRT_DDC_CLK 94
1 1KR2F-3-GP
2 AF28
SATA_CALN SATA_CALRP HUDSON_DAC_RESET
1D1V_S0 1 2 AF27 SATA_CALRN VGA_DAC_RSET K31 1 R1907 UMA_PX
2
110226 SB R1902 715R2F-GP
931R2F-1-GP V28 1D1V_S0
AUX_VGA_CH_P DP1_AUXP_R 6
68 SATA_LED# AD22 V29 DP1_AUXN_R 6
SATA_ACT#/GPIO67 AUX_VGA_CH_N
U28 AUXCAL 2 1
AUXCAL R1913
AF21
SATA_X1 100R2F-L1-GP-U
ML_VGA_L0P T31 DP1_TX0P_R 6
T33 DP1_TX0N_R 6
ML_VGA_L0N
[checklist]: Integrated Clock Mode => Left unconnected ML_VGA_L1P T29 DP1_TX1P_R 6
T28 DP1_TX1N_R 6
ML_VGA_L1N
R32 DP1_TX2P_R 6
ML_VGA_L2P

VGA MAINLINK
AG21 R30 DP1_TX2N_R 6
SATA_X2 ML_VGA_L2N 3D3V_VDDAN_DAC_S0_R
ML_VGA_L3P P29 DP1_TX3P_R 6 DY
P28 R1908
ML_VGA_L3N DP1_TX3N_R 6
1 10KR2J-3-GP
2
ML_VGA_HPD/GPIO229 C29 DP_HPD1_R 6
AH16 N2 PSW_CLR#
FANOUT0/GPIO52 VIN0/GPIO175 GPIO176 3D3V_S5 3D3V_S5
56 SATA_ODD_PWRGT AM15 FANOUT1/GPIO53 VIN1/GPIO176
M3
3D3V_S5 AJ16 L2 AUD_HP 110221 SB
FANOUT2/GPIO54 HW MONITOR VIN2/SDATI_1/GPIO177 GPIO178
N4
VIN3/SDATO_1/GPIO178

1
B R1910 GPIO179 B
AK15 P1
APU_TALERT# FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 GPIO180
1 10KR2J-3-GP
2 AN16 P3 R1916 R1919
FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 VIN_VDDR 10KR2J-3-GP 10KR2J-3-GP
AL16 FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 M1 M2 DY
M5 GPIO182
GPIO171 VIN7/GBE_LED3/GPIO182
K6

2
FCH_USB3.0PORT_EN# TEMPIN0/GPIO171 GPIO176
K5 AG16 29 AUD_HP
MB_THRMDA_FCH TEMPIN1/GPIO172 NC#AG16
K3 AH10
TEMPIN2/GPIO173 NC#AH10

1
1
1 R1912 2 APU_TALERT# M6 A28
6,27 PCH_TEMP_ALERT# TEMPIN3/TALERT#/GPIO174 NC#A28
0R2J-2-GP G27 R1917 R1918
RN1901 NC#G27 10KR2J-3-GP 10KR2J-3-GP
DY NC#L4 L4 M3
8 1 GPIO171
7 2 FCH_USB3.0PORT_EN#

2
2
6 3 MB_THRMDA_FCH 71.HUDM2.M03
5 4

SRN10KJ-6-GP
VRAM SIZE Vram size1 Vram size2
RN1907 VDDIO MEM_1V5 MEM_1V35 (GPIO176) (GPIO177)
8 1 GPIO180
7 2 GPIO182 1.5V H Don't Care
6 3 GPIO178 512M 0 0
5 4 GPIO179 3D3V_S5 1.35V L H
SRN10KJ-6-GP 1G 1 1
1

R1915
10KR2J-3-GP 2G 1 0
2

undfine 0 1
PSW_CLR#
A A
2

<Variant Name>
G1901

Dr-Bios.com
GAP-OPEN
R1909
1 10KR2J-3-GP
2 VIN_VDDR Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
0927-SA
Title

If not used HWM or GPIO ,PD 10K HUDSON-M2(3/6)


Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 19 of 102
5 4 3 2 1
5 4 3 2 1

5V_S0

VDDAN_11_CLK_B2
3D3V_S0 FCH1C Part 3 of 5 1D1V_S0 R2019
10KR2F-2-GP
102mA AB17 VDDIO_33_PCIGP VDDCR_11
T14 1007mA
AB18 T17 DY

1
VDDIO_33_PCIGP VDDCR_11
AE9 T20

1
C2002 C2003 C2004 C2005 VDDIO_33_PCIGP VDDCR_11 C2006 C2007 C2009 C2010
AD10 U16
SC10U6D3V5KX-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP VDDIO_33_PCIGP VDDCR_11 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP
DY AG7
VDDIO_33_PCIGP VDDCR_11
U18

CORE S0
AC13 V14

PCI/GPIO I/O
2

2
VDDIO_33_PCIGP VDDCR_11
AB12 V17

G
VDDIO_33_PCIGP VDDCR_11 1D1V_S0
AB13 V20
AB14
VDDIO_33_PCIGP VDDCR_11
Y17 84.03400.B37
VDDIO_33_PCIGP VDDCR_11 VDDAN_11_CLK
D AB16 D S D
VDDIO_33_PCIGP
50mA H24 H26 340mA VDDAN_11_CLK DY
3D3V_VPPL_SYS_S0 VDDPL_33_SYS VDDAN_11_CLK
3D3V_VDDPL_MLDAC_S0 20mA V22 J25 Q2004

1
VDDPL_33_DAC VDDAN_11_CLK AO3400A-GP C2065
12mA U22 K24

1
1

1
VDDPL_33_ML VDDAN_11_CLK C2011 C2012 C2013 C2014 SCD1U10V2KX-5GP
3D3V_S0
220 ohm 300mA 3D3V_VDDAN_DAC_S0_R 30mA T22 VDDAN_33_DAC VDDAN_11_CLK
L22
3D3V_VDDPL_SSUSB_S5 11mA L18 M22 SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP R2029 DY

2
L2003 VDDPL_33_SSUSB_S VDDAN_11_CLK
3D3V_VDDPL_USB_S5 14mA D7 N21 1 0R3J-0-U-GP
2

2
2

2
VDDPL_3.3V_PCIE VDDPL_33_USB_S VDDAN_11_CLK
1 2 11mAAH29 VDDPL_33_PCIE VDDAN_11_CLK
N22

CLKGEN I/O
BLM15AG221SS1D-GP 12mAAG28 P22
2

C2016 C2017 R2006 1 LDO_CAP VDDPL_33_SATA VDDAN_11_CLK 1D1V_S0


68.00084.E21 1D5V_S0 DY 2 0R2J-2-GP DY
2nd = 68.00225.101 SC2D2U10V3KX-1GP SCD1U10V2KX-5GP
C2018 1 DY 2 SC4D7U6D3V3KX-GP M31 AB24 1088mA
1

1D1V_S0 LDO_CAP VDDAN_11_PCIE


DY VDDAN_11_PCIE
Y21
L2005 V21 AE25

1
VDDPL_11_DAC VDDPL_11_DAC VDDAN_11_PCIE C2019 C2021 C2022 C2020 C2023
3D3V_S0
220 ohm 300mA 1 2 7mA VDDAN_11_PCIE
AD24
1D2V_S5
PBY160808T-330Y-N-GP 226mA Y22 AB23 SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP
L2006 VDDAN_11_ML VDDAN_11_PCIE
68.00206.141 V23 AA22

2
2

2
VDDAN_11_ML VDDAN_11_PCIE

1
1 2 VDDPL_3.3V_SATA UMA_PX C2026 C2027 C2028 V24 AF26
VDDAN_11_ML VDDAN_11_PCIE

PCI EXPRESS
BLM15AG221SS1D-GP SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP

MAIN LINK
V25 AG27
1
2

VDDAN_11_ML VDDAN_11_PCIE

SCD1U10V2KX-5GP
68.00084.E21 C2024 C2025 DY UMA_PX DY

2
2nd = 68.00225.101 SC2D2U10V3KX-1GP SCD1U10V2KX-5GP

1
2mA AB10 AA21 1337mA
2
1

VDDIO_33_GBE_S VDDAN_11_SATA 3D3V_S5 R2027


DY VDDAN_11_SATA
Y20
UMA_PX AB21 U2001 DY

10KR2F-2-GP
1

1
VDDAN_11_SATA C2029 C2030 C2031 C2032 C2077
AB22
VDDAN_11_SATA SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP
63mA AB11 AC22 1 5

SC4D7U6D3V3KX-GP
2
VDDCR_11_GBE_S VDDAN_11_SATA IN OUT
GND DY DY
AA11 AC21 2

2
2
VDDCR_11_GBE_S VDDAN_11_SATA

2
SERIAL ATA
AA20 C2075 3 4 1D2V_SET
VDDAN_11_SATA SHDN# SET
AA18 DY

SC2D2U10V3KX-1GP
VDDAN_11_SATA

GBE LAN
145mAAA9 AB20

1
VDDIO_GBE_S VDDAN_11_SATA

1
AA10 AC19 G9141T11U-GP
VDDIO_GBE_S VDDAN_11_SATA R2028
74.09141.03F
49K9R2F-L-GP
DY
220 ohm 3A Vout=1.0*(1+R1/R2)

2
3D3V_S5 3D3V_USB_S5 3D3V_S5
L2008
1 2 470mA G7 VDDAN_33_USB_S VDDIO_33_S
N18 60mA
HCB2012KF-221T30-GP H8 L19 1014-SA

2
1

1
VDDAN_33_USB_S VDDIO_33_S C2034 C2035 C2036
68.00216.161 J8 M18
1
VDDAN_33_USB_S VDDIO_33_S
1
1

C 2ND = 68.00206.121 C2037 C2038 C2039 C2041 K8 V12 DY SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC2D2U10V3KX-1GP C
SC1U6D3V2KX-GP SCD1U10V2KX-5GP VDDAN_33_USB_S VDDIO_33_S
SC1U6D3V2KX-GP SC10U6D3V5KX-1GP K9 V13 DY If support USB 3.0 or LAN wake-up, pls tie to 3.3V_S5

1
2

2
VDDAN_33_USB_S VDDIO_33_S
DY M9 Y12
otherwise, tie to 3.3V_S0
2
2
2

VDDAN_33_USB_S VDDIO_33_S

3.3V_S5 I/O
M10 Y13
VDDAN_33_USB_S VDDIO_33_S
N9 W11
VDDAN_33_USB_S VDDIO_33_S 3D3V_S5
L2010 220 ohm 300mA N10

USB
VDDAN_33_USB_S
1D1V_S5 1 2 M12
VDDAN_33_USB_S 220 ohm 300mA L2009
BLM15AG221SS1D-GP N12 G24 5mA VDDXL_3.3V 1 2
1
2

C2044 C2045 VDDAN_33_USB_S VDDXL_33_S R2024 BLM15AG221SS1D-GP


68.00084.E21 M11

2
SC2D2U10V3KX-1GP SCD1U10V2KX-5GP VDDAN_33_USB_S
2nd = 68.00225.101 1 0R2J-2-GP
2 1D1V_S5 C2042 C2043 68.00084.E21
VDDAN_1.1V_USB 140mAU12 N20 190mA DY 2nd = 68.00225.101

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP
2
1

VDDAN_11_USB_S VDDCR_11_S VDDCR_1D1V


U13 M20 1 DY 2 1D2V_S5

1
R2023 VDDAN_11_USB_S VDDCR_11_S R2025
L2011

1
1D1V_S5 1 0R2J-2-GP
2 VDDCR_1.1V_B 1 2DY VDDCR_1.1V_USB 42mA T12 J24 70mA 1D1V_VPPL_SYS_S5 C2001 C2049 0R2J-2-GP
BLM15AG221SS1D-GP VDDCR_11_USB_S VDDPL_11_SYS_S SC1U6D3V2KX-GP
220 ohm 300mA T13

SC1U6D3V2KX-GP
VDDCR_11_USB_S
2

1D2V_S5 1 DY 2 68.00084.E21 C2080 C2046 C2047

2
R2020 2nd = 68.00225.101 SCD1U10V2KX-5GP M8 12mA
SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP

VDDAN_33_HWM_S 3D3V_VDDAN_HWM_S5
0R2J-2-GP 282mA P16
1

VDDAN_11_SSUSB_S
M14
VDDAN_11_SSUSB_S
N14
VDDAN_11_SSUSB_S VDDIO_AZ_S
AA4 26mA 3D3V_S5
DY P13
VDDAN_11_SSUSB_S
DY P14
VDDAN_11_SSUSB_S

1
C2059 220 ohm 300mA
33 ohm 3A USB3 VDDAN_1.1V_SSUSB_S 424mAN16 SC1U6D3V2KX-GP
VDDCR_11_SSUSB_S 3D3V_USB_S5 3D3V_VDDPL_USB_S5
L2001 N17

USB SS

2
VDDCR_11_SSUSB_S L2013
1D1V_S5 1 2 P17
PBY160808T-330Y-N-GP VDDCR_11_SSUSB_S
M17 1 2
VDDCR_11_SSUSB_S BLM15AG221SS1D-GP
68.00206.141
1

1
1

C2054 C2055 C2056 Confrim 68.00084.E21

1
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

R2017 USB3 USB3 DY 2nd = 68.00225.101 C2060 C2061


1

1
1

0R2J-2-GP C2050 C2051 C2052 Codec power use3.3V,VDDIO_AZ have to tied to 3.3V SC2D2U10V3KX-1GP SCD1U10V2KX-5GP
2

2
2

Non USB3 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP POWER


Codec power use1.5V,VDDIO_AZ have to tied to 1.5V

2
DY DY USB3
2

2
2

If use 1.5V_S5 power,have to add LDO for it extra


71.HUDM2.M03

If support USB 3.0 wake-up, tie to 1.1V_S5


B If no, tie to 1.1V_S0, B
If no USB 3.0, tied to GND 220 ohm 300mA 220 ohm 300mA 220 ohm 300mA 220 ohm 300mA
3D3V_S0 3D3V_VPPL_SYS_S0 3D3V_S5 3D3V_VDDAN_HWM_S5 1D1V_S5 1D1V_VPPL_SYS_S5 3D3V_S5 USB3 3D3V_VDDPL_SSUSB_S5
3D3V_S0 L2012 L2015 L2017 L2016
3D3V_VDDPL_MLDAC_S0 1 2 1 2 1 2 1 2
R2013 BLM15AG221SS1D-GP BLM15AG221SS1D-GP BLM15AG221SS1D-GP BLM15AG221SS1D-GP

1
1 0R0402-PAD
2 68.00084.E21 68.00084.E21 68.00084.E21 68.00084.E21
2

2
1
1

1
2nd = 68.00225.101 C2058 2nd = 68.00225.101 C2074 C2064 2nd = 68.00225.101 C2068 C2069 2nd = 68.00225.101 C2066 C2067 R2016
C2057 SCD1U10V2KX-5GP DY SC2D2U10V3KX-1GP SCD1U10V2KX-5GP 1D2V_S5 DY SC2D2U10V3KX-1GP USB3 0R2J-2-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
1

C2062 C2063 SC2D2U10V3KX-1GP DY DY Non USB3


1

1
2
2

2
SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP L2020

2
DY UMA_PX 1 2
2

DY BLM15AG221SS1D-GP
HW Montior Not implemented 68.00084.E21 If USB 3.0 wake-up is supported, tie to 3.3V_S5
or HW Montior balls not used GPIO 2nd = 68.00225.101 If no, tie to 3.3V_S0,
=> Decoupled cap not used If no USB 3.0, tie to GND

3D3V_S0 3D3V_VDDAN_DAC_S0_R
HW Montior Not implemented
or HW Montior balls used as GPIO If support USB 3.0, tie to 1.1V_S5
UMA_PX otherwise, tie to 1.1V_S0
L2018 => Bead not used
1 2 DY
BLM15AG221SS1D-GP
2

68.00084.E21 C2072 C2071


2nd = 68.00225.101 SC2D2U10V3KX-1GP SCD1U10V2KX-5GP
UMA_PX
1

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HUDSON-M2(4/6)
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 20 of 102
5 4 3 2 1
5 4 3 2 1

SSID = S.B
CRB:PU 3.3V_AUX_S5
checklist:PU 3.3V_S5
REQUIRED STRAPS no support S5 PLUS funciton,PU 3.3V_S5
3D3V_S0 3D3V_S5 3D3V_S5
D
USE this pin to determine INT/EXT CLK D

REQUIRED SYSTEM STRAPS


EC_PWM2 PCI_CLK1 RTC_CLK CLK_PCI_LPC PCI_CLK4 LPC_CLK0 LPC_CLK1
PCH GPO199

R2102

R2101

R2103

R2104

R2105

R2107
PULL Allow USE CLKGEN
LPC ROM PCIE GEN2 S5_PLUS Mode DEBUG non_Fusion ENABLE EC ENABLED
HIGH

1
DISABLE STRAPS CLOCK mode
(Use Internal)
DY DY DY DEFAULT DEFAULT DEFAULT
DEFAULT

2
PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN
SPI ROM

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
LOW PCIE GEN1 ENABLE DEBUG CLOCK mode DISABLED
STRAPS (Use External)
DEFAULT DEFAULT DEFAULT

17 PCI_CLK1
17,65,71 CLK_PCI_LPC
17 PCI_CLK4
LPC ROM implemented
checklistsuggestion:
no PU or PD required
C C
17,27 LPC_CLK0
17 LPC_CLK1 (integrated PU 10K)
18 EC_PW M2 CRB: do not stuff PU Res
17 RTC_CLK
R2113

R2114

R2115

R2116

R2117

R2118

R2119
1

1
DY DY DY DY
2

2
2K2R2F-GP

2K2R2F-GP
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

B B

DEBUG STRAPS
PCI_AD23 17
PCI_AD24 17
PCI_AD25 17
PCI_AD26 17
PCI_AD27 17

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23


1 R2108

1 R2109

1 R2110

1 R2111

1 R2112

PULL USE PCI Disable ILA USE FC USE DEFAULT Disable PCI
HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
DY DY DY DY DY
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
2

2
2K2R2J-2-GP

2K2R2J-2-GP

2K2R2J-2-GP

2K2R2J-2-GP

2K2R2J-2-GP

PULL BYPASS Enable ILA BYPASS FC USE EEPROM Enable PCI


LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
A <Variant Name> A

Dr-Bios.com
Note: FCH has 15K internal PU FOR PCI_AD[27:23] Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HUDSON-M2(5/6)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 21 of 102
5 4 3 2 1
5 4 3 2 1

FCH1D Part 4 of 5

A3 VSS VSS T25


A33 VSS VSS T27
B7 VSS VSS U6
B13 VSS VSS U14
D9 VSS VSS U17
D13 VSS VSS U20
E5 VSS VSS U21
D E12 VSS VSS U30 D
E16 VSS VSS U32
E29 VSS VSS V11
F7 VSS VSS V16
F9 VSS VSS V18
F11 VSS VSS W4
F13 VSS VSS W6
F16 VSS VSS W25
F17 VSS VSS W28
F19 VSS VSS Y14
F23 VSS VSS Y16
F25 VSS VSS Y18
F29 VSS VSS AA6
G6 VSS VSS AA12
G16 VSS VSS AA13
G32 VSS VSS AA14
H12 VSS VSS AA16
H15 VSS VSS AA17
H29 VSS VSS AA25
J6 VSS VSS AA28
J9 VSS VSS AA30
J10 AA32

GROUND
VSS VSS
J13 VSS VSS AB25
J28 VSS VSS AC6
J32 VSS VSS AC18
K7 VSS VSS AC28
K16 VSS VSS AD27
K27 VSS VSS AE6
K28 VSS VSS AE15
C L6 AE21 C
VSS VSS
L12 VSS VSS AE28
L13 VSS VSS AF8
L15 VSS VSS AF12
L16 VSS VSS AF16
L21 VSS VSS AF33
M13 VSS VSS AG30
M16 VSS VSS AG32
M21 VSS VSS AH5
M25 VSS VSS AH11
N6 VSS VSS AH18
N11 VSS VSS AH19
N13 VSS VSS AH21
N23 VSS VSS AH23
N24 VSS VSS AH25
P12 VSS VSS AH27
P18 VSS VSS AJ18
P20 VSS VSS AJ28
P21 VSS VSS AJ29
P31 VSS VSS AK21
P33 VSS VSS AK25
R4 VSS VSS AL18
R11 VSS VSS AM21
R25 VSS VSS AM25
R28 VSS VSS AN1
T11 VSS VSS AN18
T16 VSS VSS AN28
T18 VSS VSS AN33
B B
N8 VSSAN_HWM VSSPL_DAC T21
VSSAN_DAC L28
K25 VSSXL VSSANQ_DAC K33
VSSIO_DAC N28
H25 VSSPL_SYS
EFUSE R6

71.HUDM2.M03

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HUDSON-M2(6/6)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 22 of 102

5 4 3 2 1
5 4 3 2 1

3D3V_AUX_S5

L2702

1
C2707 C2703 C2704 2 1
DY HCB1608KF-1-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
68.00214.091 3D3V_AUX_S5

2
U2701 3D3V_AUX_S5
EC_AGND
INT_SERIRQ 3 22
17 INT_SERIRQ SERIRQ VCC

1
LPC_FRAME# 4 33
17,65,71 LPC_FRAME#

1
LPC_CLK0 LFRAME# VCC
17,21 LPC_CLK0 12
PCICLK VCC
125 110218 SB change to short pad R2706
PM_CLKRUN# 38 111 R2705 UMA 100KR2F-L1-GP
17 PM_CLKRUN#

1
FC2701 LPC_AD0 CLKRUN# VCC_0 3D3V_AUX_S5 100KR2F-L1-GP
17,65,71 LPC_AD0
10
LAD0 VCC
96 65W
LPC_AD1 8 9

2
SCD1U16V2ZY-2GP
17,65,71 LPC_AD1 LPC_AD2 LAD1 VCC EC_AVCC
7 67 2 R2764 1

2
17,65,71 LPC_AD2 LPC_AD3 LAD2 AVCC EC_AGND 0R0402-PAD ADT_TYPE DISCRETE# Model ID
5 69
17,65,71 LPC_AD3 LAD3 AGND

1
11
ECRST# GND C2705
37 24

1
ECRST# GND SCD1U16V2ZY-2GP
D DY 18 H_RCIN# 2 35 D

2
KBRST# GND

1
ECSCI#_KBC 20 R2708
SCI# R2707 100KR2F-L1-GP R2710
18 H_A20GATE 1
GA20 GND_0
113 DIS_PX
13 94 90W 100KR2F-L1-GP 100KR2F-L1-GP
10,17,36,97 A_RST# PCIRST# GND EC_AGND

2
77 BAT_SCL
BAT_SCL 39,40

2
2
SCL0 BAT_SDA
29 KBC_BEEP 21
PWM0 SDA0
78 BAT_SDA 39,40 BAT/CHARGER
23
PWM1 SDA1
80 SML1_DATA 6,9,85 DISCRETE#
28 FAN1_PWM 26
FANPWM0 SCL1
79 SML1_CLK 6,9,85 CPU-Temp/VGA Temp ; PH 4.7k on APU side
27
FANPWM1
EC_AGND High: UMA EC_AGND
3D3V_AUX_S5
28 FAN_TACH1 28
FANFB0
29
FANFB1 DA0
68 FAN1_DAC R2739 1 TP2711 Low: Discrete, PX
70 EC_LVDS_VDD_EN DY 1 0R2J-2-GP
2
69 KCOL[0..16] DA1 LVDS_VDD_EN 9,10,49,94
71 DBC_EN 49

1
KCOL0 DA2
39
KSO0 DA3
72 3G_EN 66 110317 -1
KCOL1 40 63 AD_IA ADT_TYPE A/D(PIN65) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE R2724
KSO1 AD0 AD_IA 40
KCOL2 41 64 PCB_VER_AD 100KR2F-L1-GP
KCOL3 KSO2 AD1 ADT_TYPE
42 65 N/A 100.0K 3.3V
KCOL4 KSO3 AD2 65W
43 66 CPU_THRM 28 DY

2
KCOL5 KSO4 AD3
44 90W 100.0K N/A 0V
KCOL6 KSO5 AC_IN#
45
KCOL7 KSO6 EC_SPI_WP#
46 97 EC_SPI_WP# 60 30W 100.0K 0.3V
KCOL8 47
KSO7 GPXIOA0
98
10.0K
KSO8 GPXIOA1 BLON_OUT 49 3D3V_AUX_S5
KCOL9 48 99
69 KCOL17
KCOL10 KSO9 GPXIOA2 USB_PWR_EN# 61,82 40W 20.0K 100.0K 0.55V
49 100 AMP_MUTE# 29
KCOL11 KSO10 GPXIOA3
50
KSO11 GPXIOA4
101 PM_PWRBTN# 18,97 120W 33.0K 100.0K 0.82V 110317 -1
KCOL12 51 102 S5_ENABLE
S5_ENABLE 36,97

1
KCOL17 KCOL13 KSO12 GPXIOA5
1 52 103 Reserved
TP2707 KSO13 GPXIOA6 RSMRST#_KBC 18 47.0K 100.0K 1.06V
KCOL14 53
KSO14 GPXIOA7
104 AD_OFF
AD_OFF 38 110317 -1 R2711
KCOL15 54 105 DY 100KR2F-L1-GP
KCOL16 KSO15 GPXIOA8 EC_GPXIOA09
WLAN_TEST_LED 68 Reserved 64.9K 100.0K 1.3V
81 106 1 TP2713
KCOL17 KSO16 GPXIOA9 3G_LED
82 107 1 TP2709

2
69 KROW[0..7] KSO17 GPXIOA10
KROW0 55 108 EC_GPXIOA11 1
KSI0 GPXIOA11 TP2710
KROW1 56 EC_GPXIOD3 1 R2709 2
KSI1 KBC_PWRBTN# 29,68
KROW2 57 470R2J-2-GP

1
KROW3 KSI2
58
KSI3
KROW4 59 PCB VERSION A/D(PIN64) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE G2701

1
KROW5 KSI4 C2708
60 GAP-OPEN
KROW6 61
KSI5 DY SC220P50V2KX-3GP
KSI6 3D3V_AUX_S5
SA 100.0K 10.0K 3.0V
KROW7 62

2
KSI7
SB 100.0K 20.0K 2.75V
C
69 TPCLK 87 C
PSCLK3
TP ------ > 69 TPDATA 88
PSDAT3 SC 100.0K 33.0K 2.48V

1
9 PS8612_RST# 85 109 BAT_IN# 39
PSCLK2 GPXIOD0 AC_IN# R2741
68 DC_BATFULL 86 110 AC_IN# 40 -1 100.0K 47.0K 2.24V
3G_PRES# PSDAT2 GPXIOD1 EC_GPXIOD02 10KR2J-3-GP
83
PSCLK1 GPXIOD2
112 1 TP2712 DY
84 114 EC_GPXIOD3
50 CRT_DEC# PSDAT1 GPXIOD3 CHARGER_TYPE
Reserved 100.0K 64.9K 2.0V
115

2
GPXIOD4
116 PCH_TEMP_ALERT# 6,19 Reserved 100.0K 76.8K 1.87V
GPXIOD5 CHARGER_TYPE
117 1D1V_S5_PWRGD 36,46
GPXIOD6 EC_GPXIOD7
118 1 TP2716 Reserved 100.0K 100.0K 1.65V
GPXIOD7
6 128 EC_SPI_CS#_C 2 R2713 1 33R2J-2-GP
18,29,36,44 PM_SLP_S3# GPIO4 SPICS# SPI_CS0#_R 60

1
120 EC_SPI_DO_C 2 R2714 1 33R2J-2-GP
MOSI SPI_SI_R 60 3D3V_S0
STOP_CHG# 14 119 EC_SPI_DI_C 1 R2715 2 0R0402-PAD R2742
40 STOP_CHG# GPIO7 MISO SPI_SO_R 60 3D3V_AUX_S5
15 89 PROCHOT_EC DY 10KR2J-3-GP
18,44 PM_SLP_S5# GPIO8 GPIO50
AD5
76 Model ID 110328-1
90 Value PN 3D3V_S0
CHARGE_LED 68

2
GPIO52

2
1
TP2706 1 EC_GPIO0B 17
EC_GPIO0C GPIO0B
TP2717 1 18
GPIO0C GPIO16
30 E51_TxD 65
R2702 20K 64.20025.6DL RN2701
9,10,49,94 L_BKLT_EN 19
GPIO0D GPIO17
31 E51_RxD 65 110328-1 47KR2F-GP SRN2K2J-1-GP
94 BRIGHTNESS 25
PWM2
10K 63.10334.1DL DY
36 WIRELESS_LED 1 110322-1

2
GPIO1A TP2722
68 STDBY_LED 34 91 WLAN_LED_OFF# 68 8.2K 63.82234.1DL Q2702

3
4
GPIO19 GPIO53 PCB_VER_AD
93 PWRLED 68
GPIO55 BAT_SDA
6.98K 64.69815.6DL 3 4 BAT_A_SDA 35,49

1
28 SYS_THRM 75
EC_GPIO54 AD4 DISCRETE#
TP2719 1 92
GPIO54 GPIO5D
122 R2703 4.7K 63.47234.1DL 2 5
95 123 100KR2F-L1-GP DY
65 WIFI_RF_EN GPIO56 GPIO5E PCH_SUSCLK_KBC 17
BLUETOOTH_EN 121 3K 64.30015.6DL 1 6
63,65 BLUETOOTH_EN

1
EC_SPI_CLK_C GPIO57 V18R
1 R2718 2 126 124 1 2

2
60 SPI_CLK_R SPICLK V18R

1
33R2J-2-GP
40 CHG_ON#
CHG_ON# 127
GPIO59
C2709 SC4D7U6D3V3KX-GP C2711 R2734 2K 64.20015.6DL 2N7002KDW-GP
R2721 SC22P50V2JN-4GP DY 100KR2J-1-GP BAT_SCL
16 74 USBCHARGER_CB1 1 DY 1K 63.10234.1DL 84.2N702.A3F
TP2720

2
70 LID_CLOSE# GPIO0A AD7
ECSWI#_KBC 32 73 PS8612_PWM_KBC 1 0R2J-2-GP
2 1 2 EC_AGND BAT_A_SCL 35,49
APU_BLPWM_TRAVIS 6,9

2
GPIO18 AD6 R2717 2nd = 84.DM601.03F
100KR2F-L1-GP 110221 SB
1
1

KB3936QF-A0-GP DY C2713 C2714


110218 SB change to short pad 71.03936.A0G SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

2
2

B B
2 R2737 1 ECSWI#_KBC
Prevent BIOS data loss solution EC GPIO standard PH/PL
18 EC_SWI#
D2704 0R0402-PAD
BAS16-6-GP R2738 3D3V_AUX_S5
1 1 0R2J-2-GP
2 ECSCI#_KBC 3D3V_AUX_S5
18 EC_SCI# 18 EC_SCI#
ECRST# RN2702
3 ECSCI#_KBC DY BAT_SCL 4 1
1

BAT_SDA 3 2
2 83.00016.K11 R2725
2ND = 83.00016.F11 10KR2J-3-GP DY SRN4K7J-8-GP
1

C2710 U2702 3D3V_AUX_S5


E

R2726 SC1U6D3V2KX-GP
2

2 10KR2J-3-GP
1 PURE_HW_SHUTDOWN#_Q B 1 BAT_IN# 2 R2732 1
28,36 PURE_HW_SHUTDOWN#
2

GND 100KR2J-1-GP
3
Q2704 PURE_HW_SHUTDOWN# VCC
2
C

MMBT3906-4-GP RESET#

84.T3906.A11 G690L293T73UF-GP
2nd = 84.03906.F11 74.00690.I7B ECRST# 2 R2728 1
3rd = 84.03906.R11 3D3V_S0 10KR2J-3-GP

EC_GPIO50 High Active


1

3D3V_AUX_S5
R2735 3G
RN2705 10KR2J-3-GP
CHG_ON# 4 1 Q2706 S5_ENABLE 2 R2720 1
STOP_CHG# 3 2 PROCHOT_EC G 10KR2J-3-GP
2

SRN100KJ-6-GP D H_PROCHOT#_EC 1 R2729 2 0R0402-PAD H_PROCHOT# 3G_PRES#


6
1

R2731 R2730 S 110328-1


AD_OFF 2 1KR2J-1-GP
1 100KR2J-1-GP 3D3V_S0
1

2N7002K-2-GP
84.2N702.J31 R2736 NON 3G FAN_TACH1 2 R2723 1
2

2ND = 84.2N702.031 10KR2J-3-GP 10KR2J-3-GP


2

ESD Proceted:2KV DY
E51_RxD 1 R2727 2
A 10KR2J-3-GP A

w/ 3G: PU 10K to 3D3V_S0 ; w/o 3G: PD 10K GND

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

KBC NPCE795
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 27 of 102
5 4 3 2 1
5 4 3 2 1
ADJ IN
Over temperature threshold setting by external resistor divider
Floating= 85oC; GND=90oC; VCC=95oC
1008-SA 3D3V_S0
5V_S0

R2826

1
3D3V_S0 2 100R2J-2-GP
1 3D3V_S0_thermal
R2806 R2807 R2805
10KR2J-3-GP 1 0R2J-2-GP
2 10KR2J-3-GP

1
C2830 C2827 DY DY DY
SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

2
DY

2
D ADJ 1 2 FAN_TACH1_C C2815 D
27 FAN_TACH1
0719-SA SCD1U10V2KX-5GP
D2803 1 2

6
CH551H-30PT-GP DY
R2809 83.R5003.C8F 110218 SB change to short pad
10KR2J-3-GP 2nd = 83.R5003.H8H 2 R2808 1 FAN1_PW M_R 4 FAN1
27 FAN1_PW M
Layout notice : DY 3rd = 83.5R003.08F 0R0402-PAD 3 ACES-CON4-4-GP
FAN_TACH1_C 2 20.F0765.004
Both DXN and DXP routing 10 mil

2
1028-SA R2819 2nd = 20.F1808.004
trace width and 10 mil spacing. FAN_VCC
*Layout* 15 mil 5V_S0 1 2 1 3rd = 20.F1426.004
FAN_VCC 0R0603-PAD
84.03904.L06

5
2
2ND = 84.03904.P11 C2828 close to U2801

1
P2800_DXP
U2801
C2808
DY
C2809 D2802
CH551H-30PT-GP
C2810
SC2200P50V2KX-2GP For PWM FAN

SCD1U16V2KX-3GP

SC4D7U10V3KX-GP
1

DY

2
3

1
R2802 C2829 C2828 3D3V_S0_thermal 5 4 SYS_THRM 27

1
NTC-100K-8-GP Q2808 SC390P50V3JN-GP SC2200P50V2KX-2GP VCC TDR
DY 1 6 DXP TDL 3 CPU_THRM 27
PMBS3904-1-GP 7 2
2

2
THERM_SYS_SHDN# DXN GND ADJ
8 1
2

P2800_DXN OTZ ADJ


83.R5003.C8F
110328 -1 2nd = 83.R5003.H8H
2.System Sensor, Put on palm rest 1.H/W T8 Shutdown P2800EB0-GP 3rd = 83.5R003.08F
74.02800.B71

C C

VGA Thermal sensor P2800

3D3V_AUX_S5 3D3V_S0

B B

1
D2801
BAT54PT-GP R2811
83.00054.T81 100KR2J-1-GP
2nd = 83.BAT54.D81 DY Q2805
3rd = 83.BAT54.S81 2N7002K-2-GP

2
S THERM_SYS_SHDN# 0714 -SA

2
27,36 PURE_HW _SHUTDOW N# D

1
G 3D3V_S0

1
C2811
R2818 DY DY 84.2N702.J31

SCD1U10V2KX-5GP
10KR2J-3-GP 2ND = 84.2N702.031

2
2
ESD Proceted:2KV

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal P2800
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 28 of 102

5 4 3 2 1
5 4 3 2 1

110324 -1 R2923
5V_S0 5VA_S0 110325 -1 110325 -1 1 0R2J-2-GP
2
3D3V_S0 49 MIC_AGND
110325 -1 3D3V_S0 5V_S0
1 R2921 2 HDA_CODEC_SDOUT HDA_CODEC_BITCLK 110328 -1 110328 -1
0R3J-0-U-GP C2934 1 2 DY
U2902

1
C2906 C2907 SCD1U10V2KX-5GP

1
1 DYNC#5 5 C2901 C2902 C2903 C2904 SCD1U10V2KX-5GP C2925 1 2 DY
EN

SC10U6D3V3MX-GP
2 SC15P50V2JN-2-GP SC22P50V2JN-4GP C2908 C2905 SCD1U10V2KX-5GP SCD1U10V2KX-5GP

2
GND

SC10U6D3V3MX-GP
3 4 SCD1U10V2KX-5GP SC10U10V5KX-2GP

2
VIN VOUT
110328 -1 R2925
1 0R2J-2-GP
2

2
1

1
C2927 C2928 DY
SC1U10V3KX-4GP

D DY G9091-475T12U-GP DY SC10U10V5KX-2GP C2929 1 2 DY D


74.09091.F3F CLOSE TO PIN39 and 46 DY
2

2
2ND = 74.09198.A7F 110324 -1 CLOSE TO PIN 9 SCD1U10V2KX-5GP
G2901
CLOSE TO PIN1 and 9
AUD_AGND 1 2
110328 -1 110325 -1
18 HDA_SDIN0 1 R2915 2 GAP-CLOSE
33R2J-2-GP C2921 110325 -1 G2902
R2914 SC1U6D3V2KX-GP RN2901
1 0R0402-PAD
2 3D3V_S0 AUDIP_PC_BEEP 2 1 AUDIO_BEEP 4 1 1 2
18 HDA_CODEC_BITCLK KBC_BEEP 27

ACZ_BITCLK_AUDIO_+
3 2 HDA_SPKR 18
GAP-CLOSE
18 HDA_CODEC_SDOUT SRN47KJ-3-GP-U

1
1
110325 -1 HDA_CODEC_SYNC 18
C2922 AUD_AGND
SC100P50V2JN-3GP R2906
4K7R2J-2-GP 110325 -1
HDA_CODEC_RST# 18

2
1
C2909
DY Q2901

2
SC22P50V2JN-4GP R2919 Max Vgs(th) 1.8V
PD#=0 Power down SPK Amp COMBO_MIC 1 0R0402-PAD
2 COMBO_MIC_Q G

2
PD#

AC97_DATIN

AUDIP_PC_BEEP
PD#=1 Power up SPK Amp

1
D COMBO_MIC_JD#
C2930 C2926
R2916

TVL-0402-01-AB1-GP
S

1
3D3V_S0
PD# 2100R2J-2-GP
1 EAPD 110325 -1
CLOSE TO PIN13 BSS138-8-GP

SC10U6D3V3MX-GP

2
1 2 AUD_HP1_JD#
C R2907 39K2R2F-L-GP AUD_AGND C

10
11
12
1
2
3
4
5
6
7
8
9
DIGITAL U2901
(include thermal pad)
Spilt by DGND 1
R2908
2
20KR2F-L-GP
EXT_MIC_JD# 58
AUD_AGND AUD_AGND

PD#

RESET#
DVDD-IO
DVDD

SDATA-IN

SYNC
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK

BCLK
DVSS

PCBEEP
SDATA-OUT
MIC2V

49 GND
48 SPDIFO SENSE_A 13 ALC268_SENSE_A MIC2V Ref voltage is 2.5V

2
110325 -1 EAPD 47 EAPD LINE2-L/PORT-E-L 14 LIN2-L_PORT-B C2924 1 2 SC2D2U10V3KX-1GP
becasue Vgs(th)concern
46 15 LIN2-R_PORT-B C2923 1 2 SC2D2U10V3KX-1GP R2918
5V_S0 PVDD2 LINE2-R/PORT-E-R cann't use 2N702 for desing
45 16 MIC2-L_PORT-B C2920 1 2 SC2D2U10V3KX-1GP 2K2R2J-2-GP
58 AUD_SPK_R+ SPK-OUT-R+ MIC2-L/PORT-F-L
44 17 MIC2-R_PORT-B C2919 1 2 SC2D2U10V3KX-1GP
58 AUD_SPK_R- SPK-OUT-R- MIC2-R/PORT-F-R
43 18 ALC268_SENSE_B R2920 1 220KR2F-L-GP COMBO_MIC_JD# RN2902

1
PVSS2 SENSE_B INT_MIC1_R
42 PVSS1 JDREF 19 4 5 INT_MIC_L_R 49
41 20 COMBO_MIC_R 3 6 COMBO_MIC
58
AUD_SPK_L- SPK-OUT-L- MONO-OUT COMBO_MIC 58
40 21 MIC1-L_PORT-B C2918 1 2 SC2D2U10V3KX-1GP AUD_MIC_L 2 7
58
AUD_SPK_L+ SPK-OUT-L+ MIC1-L/PORT-B-L MIC_IN_L 58
HPOUT-R/PORT-I-R

110325 -1 MIC1-R_PORT-B C2917 1 2 SC2D2U10V3KX-1GP AUD_MIC_R


HPOUT-L/PORT-I-L

5V_S0 39 PVDD1 MIC1-R/PORT-B-R 22 1 8 MIC_IN_R 58


1 R2911 2 ALC271_AVDD 38 23
5VA_S0 AVDD2 LINE1-L/PORT-C-L

1
MIC1-VREFO-R
MIC1-VREFO-L

0R0402-PAD 37 24 SRN1KJ-4-GP
AVSS2 LINE1-R/PORT-C-R
MIC2-VREFO

JDREF R2929
1

C2910 CLOSE TO PIN19 2 R2901 1 22KR2F-GP


LDO-CAP

1
SCD1U10V2KX-5GP 10KR2F-2-GP
ANALOG
CPVEE

AVDD1
AVSS1
VREF

AUD_AGND
CBN
CBP

R2909
2

2
RN2903
20KR2F-L-GP
2 3
71.00271.A03 1 4
36
35
34
33
32
31
30
29
28
27
26
25

2
AUD_AGND ALC271X-VB3-GR-GP AUD_AGND
CLOSE TO PIN38 SRN4K7J-8-GP
ALC271_AVDD AUD_AGND 0909-SA
MIC1-VREFO
MIC2-VREFO
MIC2V
LDO_CAP_AUDIO
VREF
AUD_CBN
AUD_CBP

CPVEE

B B
HP_OUT_R_AUD
HP_OUT_L_AUD

C2913 C2916
SCD1U10V2KX-5GP SCD1U10V2KX-5GP
AUD_AGND 1 2 AUD_AGND
2

AUD_AGND
1DY 2 D2901
BAW 56-5-GP
C2915 83.00056.Q11
2

C2911 SCD1U10V2KX-4GP 2nd = 83.00056.K11


SC2D2U10V3KX-1GP 2 PM_SLP_S3# 18,27,36,44
1

CLOSE TO PIN35 1 2 AUD_AGND 3


C2914
SC10U6D3V5KX-1GP 1 AMP_MUTE# 27

AUD_AGND 2 1C2912 DY
SC2D2U10V3KX-1GP PD#
D2902
CLOSE TO PIN34 BAS16-6-GP
83.00016.K11
110317 -1 MIC2V 2ND = 83.00016.F11
R2912 1 251R2J-2-GP 1
58 AUD_HP1_JACK_R2
R2913 1 251R2J-2-GP
58 AUD_HP1_JACK_L2
3 KBC_PW RBTN# 27,68
110320 -1 2
19 AUD_HP 110324 -1 DY
A INT_MIC1_R <Variant Name>
D

A
110328 -1 AUD_MIC_L
Q2902 AUD_MIC_R

Dr-Bios.com
Wistron Corporation
1
1

2N7002K-2-GP C2933 C2932 C2931


84.2N702.J31 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC5600P50V3KX-GP

SC5600P50V3KX-GP

SC5600P25V2KX-1GP
2ND = 84.2N702.031 DY DY Taipei Hsien 221, Taiwan, R.O.C.
2
2

DY
Title
G

R2924
AUD_HP1_JD# 1 0R2J-2-GP
2 AUD_HP1_JD_R# AUD_AGND AUDIO CODEC(ALC271)
Size Document Number Rev
A3
DY
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 29 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

AMP
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 30 of 102
5 4 3 2 1
5 4 3 2 1

110218 SB change to short pad


3D3V_S5 3D3V_LAN_S5 1D2V_LAN_S5
110218 SB change to short pad 3D3V_LAN_S5 3D3V_LAN_S5
R3101
1 2 3D3V_LAN_S5 L3102
0R0603-PAD BIASVDD_G 1 2

2
C3101 C3102 C3103 C3104 C3105 C3106 C3108 C3109 C3110 0R0603-PAD
C3111

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY SCD1U10V2KX-4GP R3102 R3103
DY 4K7R2J-2-GP 4K7R2J-2-GP

2
0914-SA 110218 SB change to short pad

62
56

20

1
7
DY DY DY U3101 L3104 LAN_FLASH_SI/EEDATA
XTALVDD_G 1 2

VDDO/VDDIO
VDDO/VDDIO
VDDO/VDDIO
VDDO_CR

1
D 37 BIASVDD_G C3113 0R0603-PAD BCM57785_CS#/EECLK D
BIASVDDH
SCD1U10V2KX-4GP

2
110218 SB change to short pad

2
R3104 R3105
1D2V_LAN_S5 4K7R2J-2-GP 4K7R2J-2-GP
1D2V_LAN_S5 35 L3105 DY
VDDC
110218 SB change to short pad 61 17 XTALVDD_G LAN_AVDD 1 2

1
VDDC XTALVDDH

1
L3101 0R0603-PAD
C3114 C3115
1 2 AVDDL_G
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
0R0603-PAD

2
1

1
C3116 C3117
SCD1U10V2KX-4GP 3D3V_LAN_S5
SC4D7U6D3V3KX-GP DY
48 LAN_AVDD R3140
2

2
AVDDH LAN_AVDD BCM57785_GPIO0
AVDDH 42 2 4K7R2J-2-GP
1

1
L3103 C3118

SCD1U10V2KX-4GP
1 2 GPHY_PLLVDD
GBK160808T-601Y-GP AVDDL_G 39

2
AVDDL
1

1
68.00248.011 C3119 C3112 AVDDL_G 45 1 R3141 2 BCM57785_GPIO0
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP AVDDL_G AVDDL 10KR2J-3-GP
2nd = 68.00217.241 51 AVDDL
2 LAN MDI Off-Page
2

TRD3_N 49 MDI3- 59 1008-SA


L3106 50
TRD3_P MDI3+ 59
1 2 PCIE_PLLVDD GPHY_PLLVDD 36
0R0603-PAD GPHY_PLLVDDL
TRD2_N 47 MDI2- 59
1

C3120 C3121 46
TRD2_P MDI2+ 59
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP
43 MDI1- 59
2

C TRD1_N C
TRD1_P 44 MDI1+ 59
PCIE_PLLVDD 32 PCIE_PLLVDDL
29 PCIE_PLLVDDL TRD0_N 41 MDI0- 59
TRD0_P 40 MDI0+ 59

LOW_PWR 4 LOW _PW R 1 R3106 2


0R2J-2-GP
DY
C3123 1 2SCD1U10V2KX-5GP PCIE_RXDP0 28
4 PCIE_RXP0 PCIE_TXD_P
C3124 1 2SCD1U10V2KX-5GP PCIE_RXDN0 27 2 10M/100M/1G_LED# 10M/100M/1G_LED# 59
4 PCIE_RXN0 PCIE_TXD_N SPD100LED#_SERIALDO
4 PCIE_TXP0 33 PCIE_RXD_P
34 67 LAN_ACT_LED# VDDO_CR
4 PCIE_TXN0 PCIE_RXD_N TRAFFICLED#_SERIALDI LAN_ACT_LED# 59

GPIO1_LR_OUT 8

1
110218 SB change to short pad C3125 C3126
5 BCM57785_GPIO0 SC4D7U6D3V3KX-GP DY SCD1U10V2KX-4GP
GPIO_0 TP3101

2
18,65,66 PCIE_W AKE# 3 WAKE# SCLK_SPD1000LED# 66 BCM57785_1000LED# 2 R3109 1 10M/100M/1G_LED#
12 0R0402-PAD
18 PCIE_CLK_LAN_REQ# CLK_REQ#
17,65,66,71,83 PLT_RST# 2 R3111 1 LAN_RST 11 PERST# SI_EEDATA 64 LAN_FLASH_SI/EEDATA
100R2J-2-GP 31
17 CLK_PCIE_LAN PCIE_REFCLK_P
1

17 CLK_PCIE_LAN# 30 PCIE_REFCLK_N SO_LINKLED# 65 BCM57785_LINKLED# 2 R3114 1 10M/100M/1G_LED#


C3128 0R0402-PAD
SC33P50V2JN-3GP BCM57785_CS#/EECLK
63
2

CS#_EECLK
110218 SB change to short pad
SD_DETECT/XD_WE# 1 BCM57785_SD_CD/XD_W E# 1 R3145 2 0R0402-PAD SD_CD/XD_W E# 74
SR_DISABLE/XD_DETECT# 68 BCM57785_XD_CD# 1 R3144 2 0R0402-PAD XD_CD# 74
B R3120 0R0402-PAD B
74 SD_DAT0/XD_D0/MS_D0 1 2 BCM57785_CR_DATA0 25 CR_DATA0 MS_INS#/XD_CE# 59 BCM57785_XD_CE#/MS_INS# 1 R3143 2 0R0402-PAD XD_CE#/MS_INS# 74 SB for B version
1 R3122 2 0R0402-PAD BCM57785_CR_DATA1 24
74 SD_DAT1/XD_D1/MS_D1 CR_DATA1
1 R3123 2 0R0402-PAD BCM57785_CR_DATA2 23 9 BCM57785_XD_RE# 1 R3142 2 0R0402-PAD 3D3V_CARD_S0 VDDO_CR
74 SD_DAT2/XD_D2/MS_D2 CR_DATA2 GPIO_2/MEDIA_SENSE/XD_RE# XD_RE# 74
1 R3124 2 0R0402-PAD BCM57785_CR_DATA3 22 R3146
74 SD_DAT3/XD_D3/MS_D3 CR_DATA3
1 R3126 2 0R0402-PAD BCM57785_CR_DATA4 52 57 1 2
74 SD_DAT4/XD_D4/MS_D4 CR_DATA4 CR_WP#/XD_WP# XD_W P#/SD_W P# 74
1 R3127 2 0R0402-PAD BCM57785_CR_DATA5 53 60 BCM57785_XD_ALE 1 R3131 2 0R2J-2-GP 0R0603-PAD
74 SD_DAT5/XD_D5/MS_D5 CR_DATA5 CR_LED/CR_BUS_PWR/XD_ALE XD_ALE 74
1 R3128 2 0R0402-PAD BCM57785_CR_DATA6 54 DY
74 SD_DAT6/XD_D6/MS_D6 CR_DATA6
1 R3130 2 0R0402-PAD BCM57785_CR_DATA7 55
74 SD_DAT7/XD_D7/MS_D7 CR_DATA7
CR_CLK/XD_RY_BY# 21 BCM57785_XD_R/B 1 R3132 2 0R0402-PAD SD_CLK/XD_R/B# 74
CR_CMD/XD_CLE 26 BCM57785_XD_CLE 1 R3133 2 0R0402-PAD SD_CMD/XD_CLE/MS_BS 74 0914-SA
SD_DAT0/XD_D0/MS_D0 EC3105

1
SD_DAT1/XD_D1/MS_D1

SCD1U10V2KX-4GP
SD_DAT2/XD_D2/MS_D2
SD_DAT3/XD_D3/MS_D3
3D3V_LAN_S0 1 R3134 2 VMAINPRSNT DY

2
1KR2J-1-GP 68.4R750.20C 1D2V_LAN_S5
2nd = 68.4R71D.10E
EC3101 EC3102 EC3104 EC3103 58 3rd = 68.4R710.20P LOW _PW R 1 R3147 2 0R0402-PADXD_ALE
VMAIN_PRSNT 74
1
1

1
1

1 R3136 24K7R2J-2-GP BCM57785_TEST1 L3107


SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

3D3V_LAN_S5
1 R3137 24K7R2J-2-GP BCM57785_TEST2 6 TEST1 SR_LX 16 1D2V_LAN_S5_SR 2 IND-4D7UH-192-GP
1 20100813 V1.9
DY DY DY DY
2
2

2
2

1D2V_LAN_S5
LAN_XO_R 2 R3138 1 LAN_X0
10 TEST2 SR_VFB 13
B version can't use LDO
X3101 200R2F-L-GP 19 0914-SA
XTALO

1
1
1 2LAN_XI 18 3D3V_LAN_S5 C3132 C3130
XTALI

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP
XTAL-25MHZ-102-GP LAN_RDAC 38 15

2
2
RDAC SR_VDDP
1
1

C3134 82.30020.851 C3135


A
SC15P50V2JN-2-GP 2ND = 82.30020.791 SC15P50V2JN-2-GP 14 <Variant Name> A
SR_VDD
1

3D3V_S0 3D3V_LAN_S0
3RD = 82.30020.A31
2
2

1
1

R3139 C3136 C3137

Dr-Bios.com SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP

2 R3135 1 1K24R2F-GP
0R0603-PAD 2 Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


CL=12pF
2
1

C3129 Taipei Hsien 221, Taiwan, R.O.C.


SCD1U10V2KX-4GP Freq tolertance:+/-30ppm
GND

Title
2

BCM57785XA0KMLG-GP JE40-HR SB change to B version LOM


69

71.57785.M03 Size Document Number Rev


P/N: 71.57785.M03 A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 31 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

RTS5138
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 32 of 102
5 4 3 2 1
5 4 3 2 1

D D

3D3V_S0

2
3D3V_S0 C3505
SCD1U10V2KX-4GP C3506 3D3V_S0

TEST1_U
SCD01U16V2KX-3GP

A1_EQ0

A1_EQ1
A1_DE1

A1_DE0

1
USB3 USB3
A1_DE0 2 1
A1_DE1 2 R3502 4K7R2J-2-GP
1
R3501 4K7R2J-2-GP
C
DY C
B1_DE0 DY

18
17
16
15
14
13
2 1
U3501 B1_DE1 2 R3503 4K7R2J-2-GP
1
R3504 4K7R2J-2-GP

A_DE1/NC#18
A_EQ0/NC#17
A_DE0/SCL_CTL
A_EQ1/SDA_CTL
TEST
VDD
DY
DY
3D3V_S0

C3501 1 SCD1U10V2KX-4GP
2 SSTX2+_C 19 12
18 USB30_TXDP1 A_INP A_OUTP USB30_TXDP1_R 62
1 2 SSTX2-_C 20 11 A1_EQ0 2 1
18 USB30_TXDN1 A_INN A_OUTN USB30_TXDN1_R 62
C3502 SCD1U10V2KX-4GP
USB3 21 10 A1_EQ1 2 R3512
DY 4K7R2J-2-GP
1
C3503 1 SCD1U10V2KX-4GP SSRX2+_HUB_C 22 GND GND R3509 4K7R2J-2-GP
2
USB3 9
18 USB30_RXDP1
1 2 SSRX2-_HUB_C 23 B_OUTP B_INP
8
USB30_RXDP1_R 62
B1_EQ0 2
USB3 1
18 USB30_RXDN1 B_OUTN B_INN USB30_RXDN1_R 62
C3504 SCD1U10V2KX-4GP I2C_EN1 24 7 U3501_REXT B1_EQ1 2 R3508
DY 4K7R2J-2-GP
1
USB3 B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0
I2C_EN REXT R3511 4K7R2J-2-GP
USB3 25 GND USB3

1
TEST1_U 2 1
B_EQ0/NC#2

B_DE1/NC#6 R3513 Note: R3510 4K7R2J-2-GP


REXT can be left open with default swing setting
3K48R2F-GP I2C_EN1 DY
2 1
R3505 4K7R2J-2-GP
VDD

2
PD#

B B
DY
USB3
3D3V_S0 PS8710BTQFN24GTR-A1-GP
1
2
3
4
5
6

USB3
B1_EQ0

B1_EQ1
B1_DE0

B1_DE1

27,49 BAT_A_SDA 1R3506 0R2J-2-GP


2 A1_EQ1
27,49 BAT_A_SCL 1R3507 0R2J-2-GP
2 A1_DE0
DY
DY

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 35 of 102
5 4 3 2 1
5 4 3 2 1

5V_S0 5V_S5

U3609
1 S D 8
2 S D 7
3 S D 6
4 G D 5

AO4468-GP
84.04468.037
D 2nd = 84.03014.037 D

3D3V_S0 3D3V_S5
U3607
1 S D 8
2 S D 7
RUN_ENABLE_S
3 S D 6
4 G D 5 if have use Reset IC tied to Pure_HW_shutdown
have to take care R3622 and R3623 value H_THERMTRIP# 6,18,85
101129 AO4468-GP
84.04468.037
2nd = 84.03014.037

E
R3601
1 1KR2J-1-GP
2 H_PWRGD_R B Q3601
1D1V_S0 6,17,71,97 H_CPUPWRGD_E
1D1V_S5 DY MMBT2222A-3-GP
U3610 84.02222.V11

C
1
1 S D 8 C3602 2nd = 84.02222.R11
2 S D 7 R3622 DY

SCD1U10V2KX-5GP
3 S D 6
10,17,27,97 A_RST# 1 1KR2J-1-GP
2

2
4 G D 5
0708-SA
AO4468-GP
84.04468.037
2nd = 84.03014.037
2
RUN_ENABLE_HV
3 PURE_HW_SHUTDOWN# 27,28
101129
1 D3601
41 3V_5V_EN
BAS16-6-GP
83.00016.K11

1
U3608 2ND = 83.00016.F11
1D5V_S0 AO3404A-GP 1D5V_S3 DY R3602 2 1 S5_ENABLE 27,97
200KR2J-L1-GP R3603
S D 2KR2F-3-GP

2
84.03404.B31

G
C 5V_S5 U3601 C

1 6 PM_SLP_S3# 18,27,29,44
VCC EN
2 5 5V_S0
GND DC2
3 4 3D3V_S0 RUN_ENABLE_HV
HV DC1
101129

1
RUN_ENABLE_S G5938TL1U-GP C3612
74.05938.09P SCD01U50V2KX-1GP
DY

2
0813-SA
3D3V_S0
110218 SB change to short pad
2 R3606 1
0R0402-PAD
1

C3615
SCD1U25V2KX-GP
2

5V_S5 U3602 DY
1 6
VCC EN
2 5 1D5V_S0
GND DC2
3 4 1D1V_S0
HV DC1

G5938TL1U-GP
RUN_ENABLE_HV 74.05938.09P
101129

Power Sequence
3D3V_S0 3D3V_S5

B 3D3V_S0 B
101118

1
1
101118 R3624 R3629
10KR2J-3-GP 10KR2J-3-GP
1

D3603 DY
R3627 BAW56-5-GP

2
2
DY 10KR2J-3-GP 18,27,29,44 PM_SLP_S3# 2

3
2

83.00056.Q11
45 1D2V_S0_PWRGD 1 2ND = 83.00056.G11
83.00056.Q11 3RD = 83.00056.K11
2ND = 83.00056.G11 D3605
3RD = 83.00056.K11 BAW56-5-GP D3604
2 BAW56-5-GP
6 FS1R1
27,46 1D1V_S5_PWRGD 2
3 VCORE_EN 42,45
DY DY 3 RUNPWROK_D 1 R3604 2 FCH_PWRGD 18
1 0R0402-PAD
18,27,29,44 PM_SLP_S3#
1

C3614 1
44 1D5V_S3_PWRGD
SCD1U25V2KX-GP
DY 83.00056.Q11
2

D3606 2ND = 83.00056.G11


BAS16-6-GP 3RD = 83.00056.K11
DY 1
1011-SA
3 D3607
48 2D5V_PGOOD
83.00016.K11 BAW56-5-GP
2ND = 83.00016.F11 2 42 VRM_VDD_PWRGD 2

1022-SA DY 3

42 VRM_VDD_NB_PWRGD 1 confrim Intersil by FAE,don't need L/S


83.00056.Q11
2 R3630 1 2ND = 83.00056.G11
0R0402-PAD 3RD = 83.00056.K11
110223 SB change to short pad

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power On Logic
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 36 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 37 of 102
5 4 3 2 1
5 4 3 2 1

D D
Adaptor in to generate DCBATOUT
DCIN1 AD_JK AD+
NP1 PU3802
1 1 S D 8
2 S D 7
2 3 S D 6

1
3 1Pin=3A PC3801 PC3802 PWR_AD+_2 4 G D 5

K
SCD1U50V3KX-GP

SC1U50V5ZY-1-GP
4
5 DY D3801 D3802 P1403EV8-GP

2
NP2 P6SBMJ27APT-GP P6SBMJ27APT-GP 84.P1403.B37
83.P6SBM.DAG 83.P6SBM.DAG 2nd = 84.04407.F37
ACES-CON5-14-GP 2nd = 83.P6SMB.JAG 2nd = 83.P6SMB.JAG

A
20.F1701.005 3rd = 83.P6SMB.CAG 3rd = 83.P6SMB.CAG

2
2ND = 20.F1763.005

1
PR3807 PC3805
200KR2F-L-GP

SC1U50V5ZY-1-GP
0715 -SA

2
C C

1
PQ3802R2
PQ3801 E
3 PWR_ADJK_EN B R1
1 R1 C
27 AD_OFF
2
R2 PDTA124EU-1-GP
LTC024EUB-FS8-GP 84.00124.K1K

1
84.00024.A1K 2ND = 84.00024.01K
2nd = 84.00124.H1K PR3808
3rd = 84.05124.011 100KR2J-1-GP

2
B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

DCIN_JACK
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 38 of 102
5 4 3 2 1
5 4 3 2 1

BATTERY CONNECTOR
BT+

1
PC3901 PC3902
D SCD1U50V3KX-GP SC2200P50V2KX-2GP 110218 SB change to short pad D

2
40 BATT_SENSE 2 PR3901 1
0R0402-PAD
BAT1
9
1

PN3901 BT+ 2
1 8 3
2 7 BAT_IN#_1 4
27 BAT_IN#
3 6 BATA_SCL_1 5
27,40 BAT_SCL
4 5 BATA_SDA_1 6
27,40 BAT_SDA
7
SRN33J-7-GP 8
10

1
PD3901 PC3905 PC3904 PC3903

SC1000P50V3JN-GP-U

SC10P50V2JN-4GP
MMPZ5232BPT-GP-U SC10P50V2JN-4GP
83.5R603.D3F DY DY DY ALP-CON8-8-GP-U
EC Protect

2
C 2nd = 83.5R603.K3F 20.81352.008 C
3rd = 83.5R603.Q3F

A
2ND = 20.81353.008

3rd = 20.81358.008

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

BATT_CONN
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 39 of 102
5 4 3 2 1
5 4 3 2 1

AD+ total power R1 R2 AD+ total power R1 R2


AD+ NEAR AD+_TO_SYS
65w 187k 49.9k 80w 137k 49.9k
PU4001
8 D S 1
7 D S 2 90w 121k 49.9k
6 D S 3 AD+ DCBATOUT BT+

1
5 D G 4
PR4021 PR4004 PU4002
P1403EV8-GP 100KR2J-1-GP AD+_TO_SYS 1 D01R3721F-GP-U
2 1 S D 8

A
D 84.P1403.B37 2 S D 7 D
2nd = 84.03005.037 PD4001 3 S D 6
ADD A 24V ZENAR

2
1SS400GPT-GP 4 G D 5
AD+
AD+_G_2 83.00400.C1F PG4001

K
1

1
2nd = 83.1S400.B2F GAP-CLOSE-PWR-3-GP PG4002 P1403EV8-GP

1
1
PWR_CHG_REF GAP-CLOSE-PWR-3-GP 84.P1403.B37 PD4002

2
PR4022 PR4005 2nd = 84.03005.037 SMF18AT1G-GP
PR4023 49K9R2F-L-GP 470KR2J-2-GP 83.SMF18.0AH

2
2
10KR2F-2-GP 2ND = 83.SMF18.AAH

A
PR4036 65W_BQ24745 90W_BQ24745

2
2

1
AD+_G_1 Charge diff 10R2J-2-GP PR4026 110103

1
PR4009 PR4007 1 10KR2J-3-GP
2
110325-1 187KR2F-GP 121KR2F-L-GP DY

1
2

2
R1 PR4027 PR4028 STOP_CHG#

PWR_CHG_ICREF
10R2J-2-GP 10R2J-2-GP 27 STOP_CHG#

3
ISL88731 use 63.10034.1DL

1
PQ4001 Charge diff Charge diff

2
2N7002KDW-GP AD+ PC4001 110321-1
DCBATOUT

SC1U25V5KX-1GP
84.2N702.A3F PR4008 PC4002 PC4004 20110110-WAYNE

2
2nd = 84.DM601.03F R2 0R2J-2-GP SCD1U50V3KX-GP SCD1U50V3KX-GP

4
2 1 2 1PWR_CHG_CSSP 2 1 2 1

1
DC_IN_D PR4006 Charge diff PC4003 1011-SA for RF
215KR3F-1-GP CHG_AGND SCD047U50V3KX-GP CHG_AGND
AC_OK Charge diff CHG_AGND Charge diff

1
PU4003 1027-SA Wayne PR4034 PC4005 PC4006 FC4024 FC4023 FC4025

SC2200P50V2KX-2GP

SC68P50V2JN-1GP
4D7R2J-2-GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
ICREF
2

SC10U25V5KX-GP
C 0804-SA PWR_CHG_DCIN 22 28 1 2 110325-1 DY DY DY DY C

2
2

2
DCIN CSSP

5
6
7
8
ISL88731

D
D
D
D
PWR_CHG_ACIN 2
ACIN PWR_CHG_CSSN PU4004
27
CSSN PC4009
3D3V_AUX_S5 11 VDDSMB ICOUT
26 PWR_CHG_ICOUT 1 PR4012 2 STOP_CHG# QM3002M3-GP
0R2J-2-GP K A 1 2SC1U16V3KX-2GP 84.30023.037

G
BQ24745 4 2nd = 84.08884.A37

S
S
S
25 PWR_CHG_BOOT PD4003
BOOT
1

21 PWR_CHG_VDDP CH520S-30PT-GP 110329 -1

3
2
1
VDDP
1

PR4010 PC4007 AC_OK 1 PR4011 2 PWR_CHG_ACOK 13 83.R0203.08F


ACOK

1
49K9R2F-L-GP SCD01U50V2KX-1GP PC4008 0R0402-PAD 2nd = 83.1R003.I8F 68.4R71C.10K
SC1U10V3KX-3GP 24 PWR_CHG_UGATE 2nd = 68.4R710.20D BT+
2

UGATE
27,39 BAT_SCL 10

2
2

SCL PR4017
1 2 PL4001
23 PWR_CHG_PHASE PC4017 1 2 BT+_R 1 D01R3721F-GP-U
2
PHASE SCD1U50V3KX-GP IND-4D7UH-173-GP
CHG_AGND 9
27,39 BAT_SDA SDA
20 PWR_CHG_LGATE
LGATE

5
6
7
8
0804-SA

D
D
D
D
PG4003 PG4004

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
14 19 PU4005 PC4018 PC4019 PC4020 PC4021 PC4022
NC#14 PGND

SC10U25V5KX-GP

SCD1U50V3KX-GP
CHG_AGND QM3002M3-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
18 PWR_CHG_CSOP 84.30023.037

2
PR4013 CHG_AGND CSOP

G
4 2nd = 84.08884.A37

2
S
S
S
1KR2J-1-GP 17 PWR_CHG_CSON PC4016
PWR_CHG_VICM CSON
27 AD_IA 1 2 8 2 1

3
2
1
VICM
Charge diff
PC4010 PR4014 SCD1U50V3KX-GP

BT+_PG
3D3V_AUX_S5
1

1
3D3V_AUX_S5 PC4011 1 2 PWR_CHG_FBO_RC 1 10KR2J-3-GP
2 PC4024
B
SCD01U50V2KX-1GP SC150P50V2JN-3GP
74.88731.A73 SCD1U50V3KX-GP B
Charge diff 20110110-WAYNE
Charge diff BQ24745 1 PR4015 2 PWR_CHG_FBO 6 BQ24745
2

2
FBO
2

110325-1 200KR2F-L-GP PWR_CHG_EAI 5 Charge diffNC#16 16


EAI

1
1
1

R1 PR4030 BQ24745 PWR_CHG_EAO 4


PR4032 10KR2F-2-GP PC4012 PWR_CHG_REF EAO PR4035 PR4020
3
VREF 20101011Wayne
187KR2F-GP PR4031 DY SC2200P50V2KX-2GP PWR_CHG_CE 7 100R2J-2-GP CHG_AGND PR4025 10R2J-2-GP
121KR2F-L-GP CE 22R2J-2-GP
65W 2 1PWR_CHG_REF_RC
2 1 12 15 VFB 1 2 ISL88731 use 63.10034.1DL

GND
BATT_SENSE 39
1

GND VFB
1

90W PR4033 BQ24745 PR4016 PC4014 1 2 PWR_CHG_CSOP_R Charge diff

2
2
2

1 0R2J-2-GP
2 STOP_CHG# 27
7K5R2F-1-GP SC1U10V3KX-3GP 110325-1 Charge diff

1
STOP_CHG# 1 2 BQ24745 BQ24745RHDR-GP Charge diff

29
2

R2 3D3V_AUX_S5 PC4013 BQ24745 PC4015


to KBC GPIO32 SC56P50V2JN-2GP SCD1U25V2ZY-1GP
1 2 110321-1

1
LM393_2OUT

PR4029 PC4023
LM393_2IN+

110322-1 BQ24745
1

49K9R2F-L-GP PC4025 SCD1U50V3KX-GP


PC4027 SCD01U50V2KX-1GP PC4026 Replace part --> 74.88731.C73 DY

2
SCD01U50V3KX-4GP DY SCD01U50V2KX-1GP CHG_AGND
2

2
2

PC4028 ISL88731 110321-1 ISL88731


SCD1U25V2ZY-1GP
CHG_AGND ISL88731 Use ISL88731 Use CHG_AGND
1
5
6
7
8

110321-1
CHG_AGND CHG_AGND PR4018
2OUT
VCC
2IN+
2IN-

1 0R0402-PAD
2
PU4007
LM393DR-GP
74.00393.H21
PR4024 PQ4002 CHG_AGND
3D3V_AUX_S5 1 100KR2J-1-GP
2 PWR_CHG_CE PWR_CHG_CE 3 4
1OUT
GND

<Variant Name>
1IN+

A A
1IN-

110111 AC_OK 2 5 CHG_ON#


CHG_ON# 27

1
DY
PWR_CHG_REF C453 1 6 AC_IN# 27 Wistron Corporation
4
3
2
1

SCD1U10V2KX-4GP

2
PR4019 2N7002KDW-GP DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
2 10KR2F-2-GP
1 AC_OK 84.2N702.A3F PC4033 Taipei Hsien 221, Taiwan, R.O.C.
BQ24745 2nd = 84.DM601.03F SCD1U10V2KX-5GP
PWR_CHG_VDDP Title

2
CHG_AGND
PR4050
AC_IN# to KBC CHARGER BQ24745
110321-1 1 100KR2J-1-GP
2 Size Document Number Rev
Custom
ISL88731 110325-1
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 40 of 102
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

110221 SB change to short pad


D D

DCBATOUT PWR_5V_DCBATOUT
PG4167
1 2
110221 SB change to short pad
GAP-CLOSE-PWR-3-GP
PG4168
DCBATOUT PWR_3D3V_DCBATOUT 3D3V_S5 3D3V_PWR 1 2

PG4162 PG4156 GAP-CLOSE-PWR-3-GP


1 2 1 2 PG4169
1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG4163 PG4157 GAP-CLOSE-PWR-3-GP
1 2 1 2 DCBATOUT DCBATOUT PG4170
3D3V_AUX_S5 1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

K
PG4164 PG4158 GAP-CLOSE-PWR-3-GP
1 2 1 2 PD4101 PG4171

2
1013-SA by Wayne MMPZ5228BPT-GP 1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP PR4103 PR4145 83.3R903.B3F
PG4165 PG4159 DY 100KR2J-1-GP PQ4101 PR4104 200KR2F-L-2-GP GAP-CLOSE-PWR-3-GP

1 A
1 2 1 2 4 3 1 147KR2F-GP
2 PWR_5V_ENTRIP1

1
PT4110

1
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP PWR_3D3V5V_ENTRIP 5 2 PWR_3D3V5V_ENTRIP PR4147 DY ST15U25VDM-5-GP
PG4166 PG4160 PQ4103 30KR2F-GP

2
1
1 2 1 2 PWR_3D3V_ENTRIP2 2 PR4121 1 6 1 PC4126 4 3 PWR_5V3D3V_ENLDO
147KR2F-GP DY

SC18P50V2JN-1-GP

2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP 1013-SA by Wayne 2N7002KDW-GP 5 2 DCBATOUT_UVP_2

2
1
PG4161 PC4109 84.2N702.A3F
1 2 SC18P50V2JN-1-GP 2nd = 84.DM601.03F DCBATOUT_UVP_1 6 1
DY

2
GAP-CLOSE-PWR-3-GP PR4105 2N7002KDW-GP 5V_PWR 5V_S5

1
1 0R0402-PAD
2 84.2N702.A3F PG4172
36 3V_5V_EN
PR4146 2nd = 84.DM601.03F PR4148 1 2
604KR2F-L-GP 69K8R2F-GP
GAP-CLOSE-PWR-3-GP
110221 SB change to short pad PG4173

2
1 2
C C
GAP-CLOSE-PWR-3-GP
PG4174
Vz=3.9V 1 2

UVP Function GAP-CLOSE-PWR-3-GP


PG4175
DCBATOUT<7.5V 3/5V disable 1 2

GAP-CLOSE-PWR-3-GP
PG4176
1 2

GAP-CLOSE-PWR-3-GP
PG4177
1 2

GAP-CLOSE-PWR-3-GP
PG4178
1 2
DCBATOUT GAP-CLOSE-PWR-3-GP
PG4179
1 2
5V_AUX_S5 PG4186
20101223WAYNE PWR_3D3V_DCBATOUT GAP-CLOSE-PWR-3-GP DCBATOUT GAP-CLOSE-PWR-3-GP
1 2 PWR_5V3D3V_VREG5 20101223WAYNE

1
PC4110
SCD01U50V2KX-1GP PWR_5V_DCBATOUT

1
110329-1

2
1
PR4150
DY DY DY DY PC4143 100KR2F-L1-GP 84.30023.037
SC4D7U25V5KX-GP
D

2
8
7
6
5
1

1
1

FC4104 FC4103 PC4147 PC4124 PC4148 2nd = 84.08884.A37

5
6
7
8

1
SC4D7U25V5KX-GP

D
D
D
D

PU4103 PC4146 PC4145 PC4144 FC4101 FC4102


SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U50V3KX-GP

D
D
D
D
PU4114 84.30023.037 D DY DY DY
SC10U25V5KX-GP

SCD1U50V3KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
2

QM3002M3-GP 12 PWR_5V3D3V_ENLDO PU4109 DY

SC10U25V5KX-GP

SC10U25V5KX-GP
2

2
ENLDO QM3002M3-GP
2nd = 84.08884.A37 14
LDO5
4
G

G
PC4120 4
1 S
2 S
3 S

S
S
S
B
S G PC4119 VIN
11 SCD1U25V3KX-GP
B
G S

3
2
1
2 1PWR_3D3V_VOOT2_1 1 PR4110 2 PWR_3D3V_BOOT2 7 19 PWR_5V_BOOT2 1 PR4111 2 PWR_5V_VOOT2_1 1 2
0R3J-0-U-GP BOOT2 BOOT1 0R3J-0-U-GP
3D3V_PWR 68.2R21B.10J SCD1U25V3KX-GP PWR_3D3V_UGATE2 PWR_5V_UGATE2 5V_PWR
2nd = 68.2R210.20B
PL4102
8
UGATE2 UGATE1
18
PL4105
1 2 PWR_3D3V_PHASE2 9 17 PWR_5V_PHASE2 1 2
IND-2D2UH-122-GP PHASE2 PHASE1 IND-2D2UH-122-GP
D 68.2R21B.10J
1

PT4102 PWR_5V_LGATE2
16 D 2nd = 68.2R210.20B

1
1

LGATE1

5
6
7
8
ST220U6D3VDM-15GP

PC4121 PG4122 PWR_3D3V_LGATE2 10 PG4123


8
7
6
5

LGATE2

D
D
D
D

GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP

SCD1U10V2KX-4GP
2

1
D
D
D
D

DY PWR_3D3V_FB2 5 1 PWR_5V_FB2 PU4113 PC4122 PT4103


FB2 FB1

SCD1U10V2KX-4GP
PU4115 QM3004M3-GP DY ST220U6D3VDM-15GP

2PWR_5V_VOUT 2
2

QM3004M3-GP 3D3V_AUX_S5 20 PWR_5V_VOUT

2
PG4185 BYP1

G
74.08239.A73 4 77.22271.27L
PWR_3D3V_VOUT

S
S
S
77.22271.27L 4 1 2 PWR_5V3D3V_VREG3 15
G

LDO3
G S 2nd = 77.C2271.00L
S
S
S

3
2
1
PWR_5V3D3V_ENM/SECFB
2nd = 77.C2271.00L S G GAP-CLOSE-PWR-3-GP 13
1
2
3

SECFB
1

PC4142 3V_5V_POK 6
SC4D7U6D3V5KX-3GP PGOOD PR4115
PWR_5V_ENTRIP1
84.30043.037 15KR2F-GP
84.30043.037 2
2
1

ENTRIP1
PR4117 PWR_5V3D3V_TON
2nd = 84.08878.A30
2nd = 84.08878.A30 3

1
PWR_3D3V_ENTRIP2 4 TON
6K98R2-GP
ENTRIP2 1101-SA Wayne

1
GND
PR4116
2

100KR2F-L1-GP 110224 SB change to short pad


RT8239CZQW-GP-U

21

1
3D3V_S5

2
20110111WAYNE PR4130
1 0R0402-PAD
2 5V_AUX_S5 PR4118
10KR2F-2-GP
1

PR4114 PR4123

2
1

100KR2J-1-GP DY 1 0R2J-2-GP
2 3D3V_AUX_S5
PR4119 DY
10KR2F-2-GP
2

101118
2

18 3V_5V_POK
A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8239
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 41 of 102
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_VCC_CORE1
PG4237
1 2 110221 SB change to short pad 20101223WAYNE DCBATOUT_VCC_CORE1
GAP-CLOSE-PWR-3-GP
PG4238
1 2

GAP-CLOSE-PWR-3-GP PWR_VCC_CORE_UG1

1
PG4239 PC4265 PC4266 PC4267 PC4268 FC4201 FC4202

SCD1U25V2KX-GP

SCD1U25V2KX-GP
1 2 DY DY DY

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
1103-SA

2
GAP-CLOSE-PWR-3-GP
PG4240
PWR_VCC_CORE_ISUMP_NB 43

4
1 2

G1

D1

D1

D1

G1

D1

D1

D1
1
PC4219 SCD33U50V5KX-GP

PR4224
PC4220 SCD047U25V2KX-GP
GAP-CLOSE-PWR-3-GP 1 PR4201 2 PR4243 PU4202 PU4203

Q1

Q1
D D
PG4241 10R2F-L-GP PC4201 2K61R2F-1-GP 20101018 Wayne FDMS3604S-GP FDMS3604S-GP
1 2 0525-David SC1KP50V2JN-2GP 84.03604.037 S1/D2 84.03604.037 S1/D2

PHASE

PHASE
1
2 1 9 9

Q2 S2
Q2 S2
6 APU_VDDNB_RUN_FB_L

2
2
1

1
GAP-CLOSE-PWR-3-GP PC4209 PWR_VCC_CORE_ISUMP_NB_R

G2

S2

S2
G2

S2

S2
PG4242 SC330P50V2KX-3GP 0609 Cyntec 0.36uH

1
1 2 6 APU_VDDNB_RUN_FB_H DCR=1.05mohm Iomax=45A

5
2

5
11KR2F-L-GP
1 2 PR4244

2
GAP-CLOSE-PWR-3-GP PC4202 NTC-10K-27-GP Idc=30A, Isat=60A peak current>54A
APU_VDDNB 1 PR4202 2 SC330P50V2KX-3GP Place close to
10R2F-L-GP APU_VDD
PL4301 Iomax=45A

2
1

PT4111
DY ST15U25VDM-5-GP VSUMG-
VSUMG- 43 PL4201 OPC>54A

1
APU_VDDNB_RUN_FB_R 20110119 Wayne PWR_VCC_CORE_PH1 1 2
2

2
PR4203 PR4251 IND-D36UH-9-GP
0803-SA for layout issue PC4205 143KR2F-GP PR4204 931R2F-1-GP PC4221 PWR_VCC_CORE_LG1
1 2 1 2 1 2K21R2F-GP
2 SCD1U50V3KX-GP
2nd = 68.R3610.10M

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
20110216-WAYNE PT4201 PT4202 PT4203

PWR_VCC_CORE_ISUMN_NB2
1

SE470UF2VDM-GP

SE470UF2VDM-GP

SE470UF2VDM-GP
SC470P50V2KX-3GP DY

1
20101018 Wayne

PG4214

PG4215
PR4206 68.R3610.20C

PWR_VCC_CORE_NTC_NB
1 2 1 2 1 2

PWR_VCC_CORE_PROG2

2
1KR2F-3-GP PC4208 PR4205 PR4265
DY SC100P50V2JN-3GP 324R2F-GP PC4206 6K65R2F-GP 20101015-SA Wayne

1
110221 SB change to short pad SC1KP50V2JN-2GP
2

2
5V_S5
PWR_VCC_CORE_BOOT1_NB 43
2
1

PC4207 APU_VDDNB_RUN_FB_C
DCBATOUT DCBATOUT_VCC_CORE2 PWR_VCC_CORE_UG1_NB 43
PR4207 SC1KP50V2JN-2GP
PWR_VCC_CORE_PH1_NB 43
PG4243 8K06R2F-GP PH1 VO1
1

43 PWR_VCC_CORE_ISEN1_NB PWR_VCC_CORE_LG1_NB 43
1 2
2

GAP-CLOSE-PWR-3-GP 20110119 Wayne 20101223WAYNE PC4260


PG4244 SCD22U25V3KX-GP
1 2 PWR_VCC_CORE_BOOT2_R PWR_VCC_CORE_PH2

49
48
47
46
45
44
43
42
41
40
39
38
37

2
PU4201 PWR_VCC_CORE_ISEN1 1 PR4266 2

2
GAP-CLOSE-PWR-3-GP 5V_S5 10KR2F-2-GP

PROG2
GND
ISEN1_NB
ISEN2_NB
VSEN_NB
RTN_NB
ISUMP_NB
ISUMN_NB
NTC_NB

BOOT1_NB
UG1_NB
PH1_NB
LG1_NB
PG4245 PR4256
1 2 2D2R3-1-U-GP 20101223WAYNE PWR_VCC_CORE_ISUMP 1 PR4268 2 PH1
C 110221 SB change to short pad 3K65R3F-GP 20101018 Wayne C
0602-David

2
GAP-CLOSE-PWR-3-GP 20101223WAYNE 110224 SB change to short pad

1
PG4246 1 36 PR4259 PR4257 VSUM- 1 PR4258 2
PWR_VCC_CORE_FB_NB FB2_NB PWM2_NB PWR_VCC_CORE_BOOT2 0R0402-PAD 1R2J-GP
1 2 3D3V_S5 1 PR4208 2 2 FB_NB BOOT2 35 0R0402-PAD
100KR2F-L1-GP PWR_VCC_CORE_COMP_NB 3 34 PWR_VCC_CORE_UG2
GAP-CLOSE-PWR-3-GP PWR_VCC_CORE_VW_NB COMP_NB UG2 PWR_VCC_CORE_PH2 PWR_VCC_CORE_ISEN2 VO1
4 33 1 DY 2

1
PG4247 PR4222 0R0402-PAD VRM_VDDNB_PWRGD VW_NB PH2 PWR_VCC_CORE_LG2 PR4245
36 VRM_VDD_NB_PWRGD 1 2 5 PGOOD_NB LG2 32
1 2 PR4210
1 0R0402-PAD
2 PWR_VCC_CORE_SVD 6 31 PWR_VCC_CORE_VCCP 10KR2F-2-GP
6 APU_SVD_R SVD VCCP
PR4211
1 0R0402-PAD
2 PWR_VCC_CORE_PWROK 7 ISL6267HRTZ-T-GP 30 PWR_VCC_CORE_PWM3
6 H_CPUPWRGD PWROK PWM3
GAP-CLOSE-PWR-3-GP PR4218
1 0R0402-PAD
2 PWR_VCC_CORE_SVC 8 29 PWR_VCC_CORE_LG1
6 APU_SVC_R SVC LG1

1
PG4248 9 74.06267.A73 28 PWR_VCC_CORE_PH1 PC4228
36,45 VCORE_EN ENABLE PH1 DCBATOUT_VCC_CORE2
1 2 10 27 PWR_VCC_CORE_UG1 SC1U25V3KX-1-GP 20101223WAYNE
36 VRM_VDD_PWRGD PGOOD UG1
1 2PWR_VCC_CORE_PROC_HOT 11 26 PWR_VCC_CORE_BOOT1

2
PROC_HOT BOOT1 PWR_VCC_CORE_PROG1
GAP-CLOSE-PWR-3-GP 3D3V_S5 1 PR4212 2 PR4223 0R0402-PAD 12
NTC PROG1
25

ISEN3/FB2
100KR2F-L1-GP 110224 SB change to short pad

2
20101223WAYNE PWR_VCC_CORE_UG2

ISUMN
ISUMP
6 APU_PROCHOT#_VDDIO

COMP

ISEN2
ISEN1
VSEN
PR4271

VDD
RTN

1
1
1

1
VIN
VW
0803-SA for layout issue 1 2 PWR_VCC_CORE_NTC_R 1 PR4214 2 PWR_VCC_CORE_NTC 2D2R3-1-U-GP PC4252 PC4253 PC4254 PC4255 FC4203 FC4204

FB

SCD1U25V2KX-GP
SCD1U25V2KX-GP
PR4213 NTC-470K-9-GP PC4261 DY DY DY

SC10U25V5KX-GP

SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
3K83R2F-GP 0609 SCD22U25V3KX-GP

2
13
14
15
16
17
18
19
20
21
22
23
24

2
1

2
1

4
1 PR4215 2 PWR_VCC_CORE_BOOT1_R PWR_VCC_CORE_PH1

G1

D1

D1

D1

G1

D1

D1

D1
1

2
27K4R2F-GP
PWR_VCC_CORE_VW

PWR_VCC_CORE_ISUMN
PWR_VCC_CORE_COMP

PU4205 PU4206

Q1

Q1
PWR_VCC_CORE_ISEN3
PWR_VCC_CORE_ISEN2
PWR_VCC_CORE_ISEN1 110224 SB change to short pad
PWR_VCC_CORE_FB

110325 -1 PWR_VCC_CORE_VIN 1 2 DCBATOUT_VCC_CORE1 FDMS3604S-GP FDMS3604S-GP


PR4246 0R0402-PAD 84.03604.037 S1/D2 84.03604.037 S1/D2

PHASE

PHASE
confrim Intersil by FAE,don't need L/S 9 9

Q2 S2

Q2 S2
PWR_VCC_CORE_VDD 1 PR4253 2 5V_S5

G2

S2

S2

G2

S2

S2
1R2F-GP
20101223WAYNE Cyntec 0.36uH

5
DCR=1.05mohm
2

PC4223 1 PC4262
SCD1U50V3KX-GP

SCD22U25V3KX-GP Idc=30A, Isat=60A


1

2 APU_VDD
1
2

PR4216 PC4211 PL4202


8K06R2F-GP SC1KP50V2JN-2GP PWR_VCC_CORE_PH2 1 2
IND-D36UH-9-GP
1

PC4213
20110119 Wayne PWR_VCC_CORE_LG2 20101015-SA Wayne
2

B 20101018 Wayne 1 2
2nd = 68.R3610.10M
B
SC33P50V2JN-3GP 20110216-WAYNE
1

1
PWR_VCC_CORE_ISUMP 68.R3610.20C PT4204 PT4205 PT4206

SE470UF2VDM-GP

SE470UF2VDM-GP

SE470UF2VDM-GP
PG4216 PG4217

GAP-CLOSE-PWR-3-GP
PR4217 PC4258 PWR_VCC_CORE_FB_C

GAP-CLOSE-PWR-3-GP
DY

2
1KR2F-3-GP SC68P50V2JN-1GP PC4214 SC1KP50V2JN-2GP PR4255

1
1 2 1 2 1 2 20101018 Wayne 2K61R2F-1-GP
2

PR4220 1 DY
324R2F-GP PWR_VCC_CORE_ISEN2

2
1

11KR2F-L-GP
PR4254
PC4218 PC4226 PC4225 PWR_VCC_CORE_ISUMP_R PH2 VO2
PWR_VCC_CORE_ISEN1
SCD22U16V3KX-2-GP

SCD047U16V2KX-1-GP

1 2 1 2 1 2
PR4219 PR4221 1 0609
2

SC470P50V2KX-3GP 143KR2F-GP 1K82R2F-1-GP PR4260


2

NTC-10K-27-GP
110225-SC Wayne PC4263 1 1 PC4264 Place close to
PWR_VCC_CORE_FB_R SCD22U25V3KX-GP SCD22U25V3KX-GP
PL4201
2

2 2
0609 1 2 VSUM-
PR4267
2

VSUM- 1KR2F-3-GP
PC4227
APU_VDD 1 PR4261 2 110225-SC Wayne SCD1U50V3KX-GP
1

10R2F-L-GP PC4216
SC330P50V2KX-3GP
2 1
1

PC4224 PR4209
6 APU_VDD_RUN_FB_H
SC330P50V2KX-3GP PWR_VCC_CORE_PROG1 1 6K65R2F-GP
2 PWR_VCC_CORE_ISEN2 1 PR4247 2
1 2 10KR2F-2-GP
2

6 APU_VDD_RUN_FB_L
DY 20101018 Wayne
0525-David PC4217 1 DY 2 PWR_VCC_CORE_NTC_NB_R 1 PR4262 2 PWR_VCC_CORE_NTC_NB PWR_VCC_CORE_ISUMP 1 PR4249 2 PH2
1 PR4252 2 SC1KP50V2JN-2GP PR4263 NTC-470K-9-GP 3K65R3F-GP 20101018 Wayne
10R2F-L-GP 3K83R2F-GP 0609
1 PR4264 2 VSUM- 1 PR4248 2
27K4R2F-GP 1R2J-GP
DY
PWR_VCC_CORE_ISEN1 1 DY 2 VO2
PR4250
A 10KR2F-2-GP A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VREG : +VCC_CORE
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 42 of 102
5 4 3 2 1
5 4 3 2 1

D D

DCBATOUT DCBATOUT_VDDNB
PG4301
1 2
110221 SB change to short pad
GAP-CLOSE-PWR-3-GP
PG4302
1 2

GAP-CLOSE-PWR-3-GP
PG4303
1 2

GAP-CLOSE-PWR-3-GP
PG4304
1 2

GAP-CLOSE-PWR-3-GP
PG4305
1 2 DCBATOUT_VDDNB 20110111wayne 20101223WAYNE
GAP-CLOSE-PWR-3-GP
PG4306
1 2

C GAP-CLOSE-PWR-3-GP C

1
PC4301 PC4302 PC4303 PC4304 FC4301 FC4302
DY DY DY

SCD1U25V2KX-GP

SCD1U25V2KX-GP
0803-SA for layout issue Id=14.3A PU4301

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
2

2
5
6
7
8
Qg=9.2~14nC

D
D
D
D
Rdson=11~14mohm
Iomax=22A

RMW150N03FUBTB-GP
peak current>27A

G
4

S
S
S
84.15N03.A37 Cyntec 0.36uH
DCR=1.05mohm Iomax=18A

3
2
1
2ND = 84.08064.A37 Idc=30A, Isat=60A OCP>27A
APU_VDDNB
42 PWR_VCC_CORE_UG1_NB
PL4301
42 PWR_VCC_CORE_PH1_NB 1 2
IND-D36UH-9-GP 20101015-SA Wayne
42 PWR_VCC_CORE_LG1_NB 68.R3610.20C

1
2ND = 68.R3610.10M PT4301 PT4302

SE470UF2VDM-GP

SE470UF2VDM-GP
PU4302

5
6
7
8

2
D
D
D
D
PG4307 PG4308

RBW280N03-GP

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
84.28003.037
2nd = 84.08057.037

1
G
4

S
S
S
Panasonic 330uF

3
2
1
2V, ESR=9 mohm

PH_NB VNB

B B
Id=26.5A
Qg=40.6~61nC
Rdson=2.6~3.2mohm

42 PWR_VCC_CORE_ISEN1_NB 1 PR4303 2
1 PR4302 2 PWR_VCC_CORE_BOOT1_NB_R PWR_VCC_CORE_PH1_NB 10KR2F-2-GP 20101018 Wayne
42 PWR_VCC_CORE_BOOT1_NB
1

2D2R3-1-U-GP
0609-SA PC4308 1 PR4305 2 PH_NB
42 PWR_VCC_CORE_ISUMP_NB
SCD22U25V3KX-GP 1K82R2F-1-GP

1 PR4306 2 VNB
42 VSUMG-
10R2F-L-GP

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VREG : +VCC_NB
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 43 of 102
5 4 3 2 1
5 4 3 2 1

110221 SB change to short pad

1D5V_PWR 1D5V_S3 1D5V_PWR


PG4416 PG4434
1 2 1 2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
PG4409 PG4425
1 2 1 2
110221 SB change to short pad
D GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP D

DCBATOUT PWR_DCBATOUT_1D5V
PG4412
RT8207L for 1D5V 1
PG4410
2 1
PG4426
2

GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 PG4411 PG4427
1 2 1 2
GAP-CLOSE-PWR-3-GP
PG4413 PR4401 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 18,27 PM_SLP_S5# 1 0R0402-PAD
2 PWR_1D5V_EN PG4421 PG4428
1 2 1 2
GAP-CLOSE-PWR-3-GP

1
PG4414 PC4401 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
1 2 DY SCD1U10V2KX-5GP PR4404 PG4422 PG4431
PWR_1D5V_VCC5 2 5D1R2F-GP
1 5V_S5 1 2 1 2

2
GAP-CLOSE-PWR-3-GP
PG4415 0720 -SA GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

1
1 2 PC4403 PG4424 PG4433
SC1U10V2KX-1GP 1 2 1 2
GAP-CLOSE-PWR-3-GP

2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

1
PC4402 PWR_DCBATOUT_1D5V PG4423 PG4432
20101223WAYNE
1

SC1KP50V2KX-1GP
PT4403 PR4403
ST15U25VDM-5-GP 9K53R2F-GP
20110111wayne 1 2 1 2

2
PR4405 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
2

0803-SA for layout issue PWR_1D5V_VDDP 1 0R0603-PAD


2 5V_S5

2
0720 -SA

1
1

1
PC4404 PC4420 PC4421 PC4426 FC4401 FC4402

SCD1U25V3KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
C
3D3V_S5 SC1U10V2KX-1GP PU4407 DY DY C

5
6
7
8

SC10U25V5KX-GP

SC10U25V5KX-GP
PWR_1D5V_CS

2
2

2
D
D
D
D
0720 -SA Id=14.3A

RMW150N03FUBTB-GP
Qg=9.2~14nC

1
PR4402 Rdson=11~14mohm

16

14

15
10KR2F-2-GP PU4401

G
4

S
S
S
CS

VCC5

PVCC5
PC4405
Close to pin23
2

3
2
1
PWR_1D5V_BOOT 1 PR4406 2 PWR_1D5V_PHASE_L
13
BOOT
22
2D2R3-1-U-GP
1 2
Mag. 0.88uH 10*10*4
Iomax=15A
36 1D5V_S3_PWRGD POK
74.01561.073 SCD1U25V3KX-GP
DCR=1.1~1.3mohm OCP>22.5A
PWR_DCBATOUT_1D5V 1 PR4418 2 PWR_1D5V_TON 12 21 PWR_1D5V_UGATE 84.15N03.A37
620KR2F-GP NC#12 UGATE Idc=20A, Isat=38A
2nd = 84.08065.037
PWR_1D5V_EN 1D5V_PWR
S5 2nd = 74.08207.B73
11
PL4402
PWR_0D75V_EN 10 20 PWR_1D5V_PHASE 1 2
PG4437 S3 PHASE IND-1UH-93-GP
1D5V_PWR 1 2 PWR_1D5V_VTTIN 23
VTTIN

1
PU4405 PC4412
2nd = 68.1R01C.10Q
1

5
6
7
8

SC1U16V3KX-5GP
GAP-CLOSE-PWR-3-GP PC4406 19 PWR_1D5V_LGATE DY PT4404
LGATE

D
D
D
D
PG4438 SC10U6D3V5MX-3GP 7 SE390U2D5VM-7GP

2
NC#7

RMW180N03FUBTB-GP
1 2 68.1R01B.10J 20101015-SA Wayne
2

110221 SB change to short pad GAP-CLOSE-PWR-3-GP 1 18 2nd = 79.3971V.6AL


PG4439 VTTGND PGND

G
CS_GND
17 4 79.3971V.30L

S
S
S
1D5V_PWR 1 2 PWR_1D5V_VDDQ 4
MODE PWR_1D5V_VDDQ
8 Matsuki cap 390uF

3
2
1
GAP-CLOSE-PWR-3-GP VDDQSNS
PWR_1D5V_FB 2.5V, ESR=10 mohm
B Close to pin23 DDR_VREF_PWR 24 VTT VDDQSET 9 B

1
6.3Φ×5.7L

1
2 PR4408 PC4407
VTTSNS
VTTREF
6 5V_S5 30KR2F-GP SC18P50V2JN-1-GP 84.18003.037
COMP
PGND

R1 DY Id=26.5A 2nd = 84.08062.037


GND

2
0720 -SA Qg=40.6~61nC

2
UP1561PQAG-GP Rdson=2.6~3.2mohm Vout=0.75*(1+R1/R2)
25

Close to output cap pin1, not

1
20101223WAYNE
R2
PWR_1D5V_VTTREF

PR4409
inside of the output cap 30KR2F-GP

2
1 PR4407 2 DDR_VREF_S3
0R0402-PAD
110221 SB change to short pad 110224 SB change to short pad

+0.75VS Close to PIN9


1

PC4408
Iomax: 1.2A SCD033U16V2KX-GP
2

PG4435
0D75V_S0 1 2 DDR_VREF_PWR
110221 SB change to short pad
GAP-CLOSE-PWR-3-GP
PR4410
1

PG4436 PC4409 PC4410 1 0R0402-PAD


2 PWR_0D75V_EN
18,27,29,36 PM_SLP_S3#
SC10U6D3V5MX-3GP

A 1 2 SC10U6D3V5MX-3GP A
<Variant Name>
2

GAP-CLOSE-PWR-3-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
20101223WAYNE
Title

RT8207L (1D5V_S3/0D75V_S0)
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 44 of 102
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

D D

APL5916 for VDDR&VDDP(1D2V_S0) 110221 SB change to short pad

1D2V_PW R 1D2V_S0
PG4524
1 2

GAP-CLOSE-PW R-3-GP
110221 SB change to short pad PG4525
1 2
C 1D5V_S3 C
PG4532 GAP-CLOSE-PW R-3-GP
1 2 PG4526
1 2
GAP-CLOSE-PW R-3-GP
PG4533 GAP-CLOSE-PW R-3-GP
1 2 PG4527
1 2
GAP-CLOSE-PW R-3-GP
PG4534 GAP-CLOSE-PW R-3-GP
5V_S5 1 2 PG4528
110224 SB change to short pad 1 2
2 GAP-CLOSE-PW R-3-GP
PR4501 PG4535 GAP-CLOSE-PW R-3-GP
20100614 V1.1 0R0402-PAD 1 2 PG4529
for CRB board 1 2
GAP-CLOSE-PW R-3-GP
1

PW R_VCCSA_VCNTL PG4536 GAP-CLOSE-PW R-3-GP


3D3V_S5 PW R_VCCSA_VIN 1 2 PG4530
1

1 2
PC4501 PC4502 GAP-CLOSE-PW R-3-GP
PC4503 Iomax=6A
2

1
SC1U10V2KX-1GP GAP-CLOSE-PW R-3-GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
2

PR4502 OCP>9A PG4531


1 2

2
100KR2J-1-GP
GAP-CLOSE-PW R-3-GP
1

PU4501
PR4503
VCNTL

36 1D2V_S0_PW RGD 1 0R0402-PAD


2 PW R_VCCSA_GD 7 POK VIN 5
B 1D2V_PW R B
VIN 9
PR4504
36,42 VCORE_EN 1 0R0402-PAD
2 PW R_VCCSA_EN 8 EN VOUT 3
VOUT 4

1
PC4504

1
110221 SB change to short pad PR4505 PC4505 PC4506
R1 PT4501
1

1
1
SC100P50V2JN-3GP
2

SC10U6D3V5MX-3GP
DY
GND

187KR2F-GP DY

SC10U6D3V5MX-3GP
PC4513 FB ST150U10VDM-4GP

2
SC1U6D3V2KX-GP
2

2
2
APL5916KAI-TRL-GP PW R_VCCSA_FB
1

74.05916.031

1
PR4506
360KR2F-GP
R2 2

A <Variant Name> A

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

APL5916(1D2V_S0)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 45 of 102
5 4 3 2 1
A B C D E

110221 SB Change to short pad


4 110221 SB Change to short pad 4

DCBATOUT PW R_DCBATOUT_1D1V
PG4609
RT8238 for 1D1V_S5 1D1V_PW R

1
PG4601
2
1D1V_S5

1 2 GAP-CLOSE-PW R-3-GP
PG4602
GAP-CLOSE-PW R-3-GP 1 2
PG4610
1 2 GAP-CLOSE-PW R-3-GP
PG4603
GAP-CLOSE-PW R-3-GP 1 2
PG4611
1 2 GAP-CLOSE-PW R-3-GP
PG4604
GAP-CLOSE-PW R-3-GP 1 2
PG4612
1 2 GAP-CLOSE-PW R-3-GP
PG4605
GAP-CLOSE-PW R-3-GP 1 2

GAP-CLOSE-PW R-3-GP

PW R_DCBATOUT_1D1V 20101223WAYNE
3 3

1
1

1
PW R_DCBATOUT_1D1V PC4624 PC4625 PC4626 PC4619 FC4601 FC4602

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SCD1U25V3KX-GP
Id=5A DY DY DY DY DY

SCD1U25V2KX-GP

SCD1U25V2KX-GP
SC10U25V5KX-GP
Qg=8.7~13nC

2
2

2
D
1

5
6
7
8
Rdson=23~30mohm

D
D
D
D
PR4601
5V_S5 300KR2F-GP
2

PU4613

G
4

S
S
S
3D3V_S5
20101223WAYNE QM3002M3-GP
G S

3
2
1
1

PC4601
SC1U10V2KX-1GP
Iomax=4A
Freq=360KHz 20101223WAYNE Mag.7*7*3 OCP>6A
2
1

84.30023.037 DCR=30mohm, Irating=6A


PR4602 PC4602
100KR2J-1-GP PU4601 PR4607 SCD1U25V3KX-GP 2nd = 84.08884.A37 Isat=13.5A 1D1V_PW R
PW R_1D1V_TON 11 4 PW R_1D1V_BOOT 1 2 PW R_1D1V_BOOT_R 1 2
TON BOOT 0R3J-0-U-GP 2nd = 68.2R210.20B
2

5 3 PW R_1D1V_UGATE PL4601 68.2R21B.10J


VCC UGATE
110221 SB Change to short pad PHASE 2 PW R_1D1V_PHASE 1 2
9 1 PW R_1D1V_LGATE IND-2D2UH-122-GP
27,36 1D1V_S5_PW RGD PGOOD LGATE
PR4603

1
1

1
110217 SB by edwin 1 0R0402-PAD
2 PW R_1D1V_EN 8 EN FB 6 PW R_1D1V_FB 20101223WAYNE PC4622 PC4620
2

2 DY DY 2

SC18P50V2JN-1-GP

SCD1U25V3KX-GP
PW R_V1D1V_DEM 7 PR4617 PT4605
for power sequency PC4603 MODE SE390U2D5VM-7GP
12 D 12K1R2F-L1-GP

2
GND

5
6
7
8
SCD1U10V2KX-5GP PW R_1D1V_OC 10 13 20101015-SA Wayne
1

CS GND

D
D
D
D
3D3V_S5

2
1
2

PR4604 RT8238AGQW -GP PU4612


0R0402-PAD PR4605 74.08238.073 QM3002M3-GP
150KR2J-GP 79.3971V.30L
1

PC4628 110224 SB Change to short pad PW R_1D1V_FB

G
4 2nd = 79.3971V.6AL

S
S
S
SC10U6D3V5MX-3GP
2
1
1

G S Matsuki cap 390uF


2

3
2
1

1
PR4606 2.5V, ESR=10 mohm
10KR2J-3-GP PR4616
5V_S5 10KR2F-2-GP 6.3Φ×5.7L
84.30023.037
2

2
PW R_1D1V_EN_R 2nd = 84.08884.A37

Vout=0.75*(1+R1/R2)
1

PC4629
DY SC4700P50V2KX-1GP
2

1D1V_S5 do not ramp up


before the 3D3V_S5
1 <Variant Name> 1

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8238 (1D1V_S5)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 46 of 102
A B C D E
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 47 of 102
5 4 3 2 1
5 4 3 2 1

0608-SA
110224 SB Change to short pad
5V_S5

RT9025 for 2D5V_S0

2
PR4808
3D3V_S0 0R0402-PAD
D D
101118 110221 SB Change to short pad

1
1
PC4809
Iomax>0.75A

1
SC10U6D3V5MX-3GP PC4807
SC1U10V2KX-1GP

PWR_2D5V_VDD
2

2
PG4803
110221 SB Change to short pad 1 2
2D5V_PWR 2D5V_S0
Vo(cal.)=2.51V GAP-CLOSE-PWR-3-GP
PR4809 PG4804

9
3D3V_S0 1 0R0402-PAD
2 PWR_2D5V_EN PU4802 1 2

GND
4 5 GAP-CLOSE-PWR-3-GP
CNTL NC#5

1
3D3V_S0 PC4811 3 6
VIN VOUT

1
SCD1U10V2KX-5GP
DY 2 7 PR4810 DY PC4808 PC4812 PC4810
EN FB

SC10U6D3V5MX-3GP
SC100P50V2JN-3GP

SC10U6D3V5MX-3GP
1 8 30K1R2F-L1-GP

2
POK GND
1

DY

2
C PR4812 C

2
100KR2J-1-GP UP0105RSW8-GP
PWR_2D5V_ADJ
2

1
PR4807
2 PWR_2D5V_PGOOD
1 0R0402-PAD
20110111wayne PR4811
36 2D5V_PGOOD
14KR2F-GP

2
B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

RT9025(2D5V_S0)
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 48 of 102
5 4 3 2 1
5 4 3 2 1

DCBATOUT_LCD
INVERTER POWER DCBATOUT
F4901
2 1

2
3D3V_S0 C4906 C4904 C4905 POLYSW -1D1A24V-GP-U

SC4D7U25V5KX-GP

SC1KP50V2KX-1GP
SCD1U50V3KX-GP 69.50007.A31
R4919 1 DY 2 100KR2J-1-GP DP_AUXP_CPU_C 2nd = 69.50007.A41

1
R4912 1 DY 2 100KR2J-1-GP DP_AUXN_CPU_C

LVDS VS EDP Co-layout CONNECTOR(30 Pin) INT_MIC_L_RR

D 110325 -1 R4913 1 DY 2 100KR2J-1-GP DP_AUXP_CPU_C D

1
R4917 1 DY 2 100KR2J-1-GP DP_AUXN_CPU_C
LCD1 DCBATOUT_LCD DY EC4906
31 MLVG0402220NV05BP-GP-U Camera Power
NP1
1 3D3V_S0 3D3V_CAMERA_S0
F4902

2
2 110221 ADD R4932 1 2
3
4 FUSE-1D1A6V-4GP-U

1
5 INT_MIC_L_RR R4932 1 2 0R2J-2-GP 69.50007.691 C4903
INT_MIC_L_R 29
6 DBC_EN_C R4910 1 EDP 2 0R2J-2-GP 2ND = 69.50007.771 SC10U6D3V5MX-3GP
DP_HPD0_C 6,9
7 BLON_OUT_C

2
8 LCD_BRIGHTNESS 2 R4902 1 33R2J-2-GP L4901
L_BKLT_CTRL 9,10,94
9 3D3V_CAMERA_S0
10 2 1 USB_PN7 18
11
12 3 4 DP_AUXN_CPU_C
USB_PP7 18 EDP 1 2 C4911 SCD1U16V2KX-3GP
For Camera GND MIC_GND R4933 2 0R2J-2-GP 110324-1 DP_AUXP_CPU_C 2 C4912 SCD1U16V2KX-3GP
DP_AUXN_CPU 94
13 DY 1 EDP 1 DP_AUXP_CPU 94
14 FILTER-137-GP
LVDSA_CLK 9,94
15 LVDSA_CLK# 9,94 1 R4934 2 0R2J-2-GP MIC_AGND 29 DY
16 DP_TXN0_CPU_C EDP 1 2 C4913 SCD1U16V2KX-3GP DP_TXN0_CPU 94
17 DP_AUXP_CPU_C R4904 1 LVDS 20R2J-2-GP DP_TXP0_CPU_C EDP 1 2 C4914 SCD1U16V2KX-3GP
LVDSA_DATA2 9,94 DP_TXP0_CPU 94
18 DP_AUXN_CPU_C R4905 1 LVDS 20R2J-2-GP LVDSA_DATA2# 9,94 110221 SB Change from port3 to port0
19
20 DP_TXP0_CPU_C R4906 1 LVDS 20R2J-2-GP LVDSA_DATA1 9,94
21 DP_TXN0_CPU_C R4907 1 LVDS 20R2J-2-GP C4960 DY SCD1U10V2KX-4GP
LVDSA_DATA1# 9,94 USB30_TXDP0 USB30_TXDP0_R
22 1 2
23 LVDSA_DATA0 9,94
C 24 USB30_TXDN0 1 DY 2 USB30_TXDN0_R 3D3V_S0 C
LVDSA_DATA0# 9,94
25 0719 -SA C4957 SCD1U10V2KX-4GP
26 RN4902 SRN0J-6-GP
LVDS_DDC_DATA 94 LCDVDD
27 USB30_RXDP0 2 3 USB30_RXDP0_R
LVDS_DDC_CLK 94
28 3D3V_S0 USB30_RXDN0 1 DY 4 USB30_RXDN0_R
29
30
1

2
NP2 C4901 C4902 3D3V_S0 C4962
32 SCD1U10V2KX-5GP SC1U6D3V2KX-GP SCD1U10V2KX-4GP C4963 3D3V_S0
SCD01U16V2KX-3GP

TEST_U
2

1
A_EQ0

A_EQ1
A_DE1

A_DE0
PS-CON30-GP 110217 SB Remove USB3.0 CCD
20.F1816.030 *For PS8710B: VDD = 3.3V A_DE0 2 1
110221 SB Change from port3 to port0
110221 SB Change from port3 to port0 DY DY A_DE1 2 R4909 4K7R2J-2-GP
1
R4908 4K7R2J-2-GP
2ND = 20.F1860.030 DY
L4902 Pin Control Mode B_DE0 DY

18
17
16
15
14
13
2 1
110217 SB Remove USB3.0 CCD U4903 B_DE1 2 R4920 4K7R2J-2-GP
1
USB30_TXDP0_R 2 1 R4921 4K7R2J-2-GP

A_DE1/NC#18
A_EQ0/NC#17
A_DE0/SCL_CTL
A_EQ1/SDA_CTL

VDD
TEST
DY
USB30_TXDN0_R DY
3 4
3D3V_S0
CCD1 FILTER-137-GP C4958 SCD1U10V2KX-4GP
DY
11 DY C4959 1 DYSCD1U10V2KX-4GP
2 SSTX1+_C 19 12 SSTX+_R 1DY 2 USB30_TXDP0_R
18 USB30_TXDP0 A_INP A_OUTP
1 2 SSTX1-_C 20 11 SSTX-_R 1 2 USB30_TXDN0_R A_EQ0 2 DY 1
18 USB30_TXDN0 A_INN A_OUTN
1 C4961 SCD1U10V2KX-4GP 21 10 C4956 DY SCD1U10V2KX-4GP A_EQ1 2 R4929
DY 4K7R2J-2-GP
1
C4954 1 SCD1U10V2KX-4GP SSRX1+_HUB_C GND GND USB30_RXDP0_R R4925 4K7R2J-2-GP
18 USB30_RXDP0 DY 2 22 B_OUTP B_INP 9
2 USB30_TXDP0_R 1 DY 2 SSRX1-_HUB_C 23 8 USB30_RXDN0_R B_EQ0 2 DY 1
L4903 18 USB30_RXDN0 C4955 SCD1U10V2KX-4GP I2C_EN B_OUTN B_INN
USB30_TXDN0_R U401_REXT B_EQ1 2 R4926
DY 4K7R2J-2-GP

B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0
3 24 I2C_EN REXT 7 1
4 25 R4928 4K7R2J-2-GP
GND

2
B USB30_RXDP0_R USB30_RXDP0_R TEST_U B
5 2 1 2 1

B_EQ0/NC#2

B_DE1/NC#6
6 USB30_RXDN0_R R4930 Note: R4927 4K7R2J-2-GP
7 USB30_RXDN0_R 3 4 4K99R2F-L-GP REXT can be left open with default swing setting
3D3V_CAMERA_S0 I2C_EN DY
8 2 1
9 FILTER-137-GP R4922 4K7R2J-2-GP

VDD

1
PD#
10 DY DY
12 3D3V_S0 PS8710BTQFN24GTR-A1-GP DY

1
2
3
4
5
6
110217 SB Remove USB3.0 CCD
IPEX-CON10-GP

B_EQ0

B_EQ1
B_DE0

B_DE1
27,35 BAT_A_SDA 1R4924 0R2J-2-GP
2 A_EQ1
DY 27,35 BAT_A_SCL 1R4923 0R2J-2-GP
2 A_DE0
DY
DY DY

reserve for I2C mode


DY R4931
9,10,27,94 L_BKLT_EN 1 1KR2J-1-GP
2
DY
R4916
LCDVDD 3D3V_S0 2 10KR2J-3-GP
1 3D3V_S0
U4901 R4903
Layout 40 mil 27 BLON_OUT 1 1KR2J-1-GP
2 BLON_OUT_C
1 5 R4918
9,10,27,94 LVDS_VDD_EN EN IN#5
2

2 GND
DBC_EN_C 2 33R2J-2-GP
1 DBC_EN 27
1

3 4 R4911 C4910 DY
OUT IN#4 <Variant Name>
1

SC100P50V2JN-3GP

A DY 100KR2J-1-GP A
1
1

R4914 C4909 C4907


2
1
SCD1U16V2ZY-2GP

100KR2J-1-GP C4908 G5285T11U-GP SC4D7U6D3V3KX-GP DY R4915


Wistron Corporation
1

Dr-Bios.com
SC4D7U6D3V3KX-GP74.05285.07F 10KR2J-3-GP
2

2ND = 74.09724.09F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

Taipei Hsien 221, Taiwan, R.O.C.


2

Title

LCD/Inverter Connector
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 49 of 102

5 4 3 2 1
5 4 3 2 1

68.00245.011 5V_S0
CRT RGB L5001 2nd = 68.00084.A11
CRT_RED_R 1 2 CRT_R BAV99PT-GP-U
94 CRT_RED_R
FCM1608CF-220T05-GP 2
68.00245.011
L5002 2nd = 68.00084.A11 CRT_IN#_R 3
CRT_GREEN_R 1 2 CRT_G DY
94 CRT_GREEN_R
D
FCM1608CF-220T05-GP 1 D
68.00245.011 D5002
L5003 2nd = 68.00084.A11
CRT_BLUE_R 1 2 CRT_B
94 CRT_BLUE_R
FCM1608CF-220T05-GP
0719 -SA

8
7
6
5

1
C5001 C5002 C5003 C5004 C5005 C5006
SC8P250V2CC-GP SC10P50V2JN-4GP

SC8P250V2CC-GP

SC8P250V2CC-GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
RN5005 DY DY DY
SRN150F-1-GP

2
0715 -SA
5V_CRT_S0
1
2
3
4
5V_HDMI

500mA

1
D5001
3D3V_S0 CH551H-30PT-GP
83.R5003.C8F
2nd = 83.R5003.H8H
3rd = 83.5R003.08F

2
2
3D3V_S0
C CRT1 R5006 C
5V_CRT_S0 10KR2J-3-GP
9 VCC_CRT NC#4 4
11

1
NC#11

2
1
1

3
4
C5013 CRT_DDCDATA_CON 12 CRT_IN#_R
SCD01U16V2KX-3GP CRT_DDCCLK_CON DDCDATA_ID1 RN5007
15 DDCCLK_ID3
5 CRT_IN#_R SRN4K7J-8-GP RN5003
2

CRT_R GND 3D3V_S0 SRN4K7J-8-GP


1 CRT_RED GND 6
CRT_G 2 7

3
4
CRT_B CRT_GREEN GND
3 8

2
1
CRT_BLUE GND
GND 10
14 VSYNC GND 16
94 CRT_VSYNC1 13 HSYNC GND 17
Q5001
94 CRT_HSYNC1 DDCDATA CRT_DDCDATA_CON
94 DDCDATA 4 3
D-SUB-15-113-GP
5 2
20.20492.015
2nd = 20.20929.015 6 1
B 2N7002KDW-GP B
DDCCLK 84.2N702.A3F
94 DDCCLK
27 CRT_DEC# 2 R5005 1 CRT_IN#_R 2nd = 84.DM601.03F
470R2J-2-GP
CRT_DDCCLK_CON
1

C5007
SC100P50V2JN-3GP
CRT_DDCDATA_CON
2

CRT_HSYNC1
CRT_VSYNC1
CRT_DDCCLK_CON
1

1
C5008 C5009 C5010 C5011
SC100P50V2JN-3GP
SC100P50V2JN-3GP

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP
DY DY DY
DY
2

2
<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CRT Connector
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 50 of 102
5 4 3 2 1

Dr-Bios.com
5 4 3 2 1

HDMI CONN
HDMI1
22

HDMI Level Shifter & CONNECTOR 20


1

2
HDMI_DATA2_R_C

3 HDMI_DATA2_R_C#
4 HDMI_DATA1_R_C
5
6 HDMI_DATA1_R_C#
7 HDMI_DATA0_R_C
D 8 D
9 HDMI_DATA0_R_C#
10 HDMI_CLK_R_C
11
12 HDMI_CLK_R_C#
13
14 5V_S0
15 DDC_CLK_HDMI 5V_HDMI
16 DDC_DATA_HDMI
17 F5101
18 5V_HDMI 2 1
19
21 FUSE-1D1A6V-4GP-U

1
23 C5102 69.50007.691
2nd = 69.50007.771

SCD1U10V2KX-5GP
SKT-HDMI19P-78-GP-U

2
22.10296.271
2nd = 22.10296.501
RN5105 1 4 SRN0J-6-GP HDMI_CLK_R_C# 3rd = 22.10296.331
4 APU_HDMI_CLK#
2 UMA_PX3 HDMI_CLK_R_C 4th = 22.10296.311
4 APU_HDMI_CLK
RN5104 1 4 SRN0J-6-GP HDMI_DATA0_R_C#
4 APU_HDMI_DATA0#
2 UMA_PX3 HDMI_DATA0_R_C
4 APU_HDMI_DATA0 5V_S0 1D5V_S3
RN5109 2 3 SRN0J-6-GP HDMI_DATA1_R_C# 3D3V_VGA_S0 1D5V_S3
4 APU_HDMI_DATA1# UMA_PX4
1 HDMI_DATA1_R_C
4 APU_HDMI_DATA1
RN5107 2 3 SRN0J-6-GP HDMI_DATA2_R_C#
4 APU_HDMI_DATA2# UMA_PX4
1 HDMI_DATA2_R_C
4 APU_HDMI_DATA2

2
HPD_HDMI_CON
R5126 R5127
0611-SA DIS 0R2J-2-GP 0R2J-2-GP
Close to HDMI Connector U5103
UMA_PX

1
1
HDMI_HPD_PWR VCC_A
8
VCC_B UMA_PX
2 7 DDC_DATA_HDMI
6 PCH_HDMI_DATA_R A1 B1

3
3 6 DDC_CLK_HDMI
6 PCH_HDMI_CLK_R A2 B2
1 R5111 2HDMI_HPD_B 1 Q5102
150KR2J-L1-GP PMBS3904-1-GP DP2_HPD 2 R5130 1 DP2_HPD_9509 5 4
0R2J-2-GP EN GND
C 84.03904.L06 C

2
2ND = 84.03904.P11 DIS UMA_PX
HDMI_DET 2 R5129 1 PCA9509DP-GP
HDMI_HPD_DET 85
0R2J-2-GP 71.09509.A0W
HDMI DISCRETE/ UMA Co-lay
2 R5128 1 DP2_HPD 6
0R2J-2-GP
UMA_PX

DP2_HPD
1
R5112
R5110 10KR2J-3-GP
100KR2J-1-GP

1
2
R5103
DY 2K2R2J-2-GP
5V_S0
85 HDMI_CLK#
HDMI_CLK# C5103 1DIS 2 SCD1U10V2KX-5GP HDMI_CLK_R_C# 110224 SB Leakage

2
HDMI_CLK C5104 1DIS 2 SCD1U10V2KX-5GP HDMI_CLK_R_C
85 HDMI_CLK

1
D5101
HDMI_DATA0# C5105 1DIS 2SCD1U10V2KX-5GP HDMI_DATA0_R_C# CH551H-30PT-GP
85 HDMI_DATA0#
HDMI_DATA0 C5106 1DIS 2SCD1U10V2KX-5GP HDMI_DATA0_R_C 83.R5003.C8F
85 HDMI_DATA0

1DP2_HPD_R
2nd = 83.R5003.H8H
3rd = 83.5R003.08F

2
4
3
HDMI_DATA1# C5110 1DIS 2SCD1U10V2KX-5GP HDMI_DATA1_R_C# 84.03904.L06
85 HDMI_DATA1#
HDMI_DATA1 C5107 1DIS 2SCD1U10V2KX-5GP HDMI_DATA1_R_C RN5101 2ND = 84.03904.P11
85 HDMI_DATA1
SRN2K2J-1-GP
HDMI_DATA2# C5108 1DIS 2SCD1U10V2KX-5GP HDMI_DATA2_R_C# PCH_HDMI_CLK_R 2 3 DDC_CLK_HDMI
85 HDMI_DATA2#
HDMI_DATA2 C5109 1DIS 2SCD1U10V2KX-5GP HDMI_DATA2_R_C Q5105
85 HDMI_DATA2
PMBS3904-1-GP

1
2
DY
Close to VGA chip
604R2F-2-GP

604R2F-2-GP

604R2F-2-GP
604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

5V Tolerance DIS
1

1
1

RN5106
2 3 DDC_CLK_HDMI
85 GPU_HDMI_CLK
1 4 DDC_DATA_HDMI
85 GPU_HDMI_DATA

DP2_HPD
SRN0J-6-GP
2

2
2

B B
R5115

R5116

R5117
R5114

R5118

R5119

R5120

R5121

1
HDMI_PLL_GND
R5102
Checklist: DY 2K2R2J-2-GP
Suggestion to stuff 499-ohm for DIS 1D5V_S3
D

P/N: 64.49905.6DL

2
Q5103 confrim by NXP FAE
2N7002K-2-GP
84.2N702.J31 Do not need PU Res,

1DP2_HPD_R1
4
3
2ND = 84.2N702.031 Reserve PU Res for debug furtur
5V_S0 RN5113
G

SRN10KJ-5-GP
0721 -SA UMA_PX 84.03904.L06
ESD Proceted:2KV 2ND = 84.03904.P11

1
2
1

PCH_HDMI_DATA_R 2 3 DDC_DATA_HDMI
R5113 6 PCH_HDMI_DATA_R Q5104
DY 100KR2J-1-GP PMBS3904-1-GP
6 PCH_HDMI_CLK_R
DY
2

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter/Connector


Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 51 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 52 of 102
5 4 3 2 1
5 4 3 2 1

D D

SSID = User.Interface

C
ITP Connector C

H_CPURST# use pull-up Resistor close


ITP connector 500 mil ( max ),
others place near CPU side.

B B

CPU ITP Connector


TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 55 of 102
5 4 3 2 1
5 4 3 2 1

SSID = SATA
SATA HDD Connector
HDD1

D P1 V33 16 16 D
P2 V33 17 17
P3 V33
NP1 NP1
5V_S0 P7 V5 NP2 NP2
P8 V5

1
C5605 C5606 FC5601 P9 V5
SC10U10V5ZY-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP
P13 S1

2
V12 GND
P14 V12 GND S4
DY P15 V12 GND S7
GND P4
GND P5
C5609 1 2 SCD01U16V2KX-3GP SATA_TXP0_C S2 P6
19 SATA_TXP0 A+ GND
C5610 1 2 SCD01U16V2KX-3GP SATA_TXN0_C S3 P10
19 SATA_TXN0 A- GND
GND P12
C5603 1 2 SCD01U16V2KX-3GP SATA_RXP0_C S6
19 SATA_RXP0 B+
19 SATA_RXN0 C5602 1 2 SCD01U16V2KX-3GP SATA_RXN0_C S5 P11
B- DAS/DSS

SKT-SATA7P-15P-51-GP-U3

62.10065.701
2nd = 62.10065.711
3RD = 62.10065.H11

C C

ODD Connector
SATA_RX- and SATA_RX+ Trace
Length match within 10 mil

Following AMD routing table


ODD1

5V_S0 1 R5603 2 ODD_PW R_5V P2 +5V MD P4 SATA_ODD_DA#_C


0R5J-5-GP P3 P1
+5V DP SATA_ODD_PRSNT# 18
Non Zero ODD
GND S1

2
C5611 1 2 SCD01U16V2KX-3GP SATA_TXN1_C S3 S4
19 SATA_TXN1 A- GND
C5612 1 2 SCD01U16V2KX-3GP SATA_TXP1_C S2 S7 R5604
19 SATA_TXP1 A+ GND
P5 10KR2J-3-GP
GND
GND P6 DY
C5607 1 2 SCD01U16V2KX-3GP SATA_RXN1_C S5 14
19 SATA_RXN1

1
C5608 B- GND
19 SATA_RXP1 1 2 SCD01U16V2KX-3GP SATA_RXP1_C S6 B+ GND 15
B
NP1
When the drive is powered on, the FET to the MD/DA pin drive is OFF. B
NP1
NP2 NP2 When the drive is powered off, the FET to the MD/DA pin is ON
If support Zero Power ODD
SKT-SATA7P-6P-59-GP-U
Stuff R5604,R5612,Q5601 and R5613 TC5604 and U5601
DY R5603 22.10300.B91
2nd = 22.10300.C21
3D3V_S0 3D3V_S0
1

3D3V_S0
R5606 R5612
10KR2J-3-GP 10KR2J-3-GP FCH integrated PU
Zero ODD 19 SATA_ODD_PW RGT
1

R5608
2

SATA_ODD_DA#_C 2 0R2J-2-GP
1 SATA_ODD_DA#_Q R5611
ODD_PW RGT# DY DY 10KR2J-3-GP
Zero ODD U5601
5V_S0
100 mil
G
D

2
S

4 EN/EN# OC# 5
Zero ODD 3 6 ODD_PW R_5V
Q5602 Q5601 IN#3 OUT#6
2 IN#2 OUT#7 7
2N7002K-2-GP 2N7002K-2-GP 1 8
GND OUT#8

1
1

84.2N702.J31 84.2N702.J31 TC5604 TC5603


<Variant Name>
A 2nd = 84.2N702.031 2nd = 84.2N702.031 SC10U10V5ZY-1GP SC10U10V5ZY-1GP A
Zero ODD G547I1P81U-GP

2
2

74.00547.H79 Zero ODD


Wistron Corporation
G

D
S

Dr-Bios.com
Zero ODD
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY Taipei Hsien 221, Taiwan, R.O.C.
R5607
2 0R2J-2-GP
1 SATA_ODD_DA# 17
Current limit Title

SATA_ODD_PW RGT SATA_ODD_DA#_Q 2 1 ODD_DA_Q 18


Active High HDD/ODD
R5613 Size Document Number Rev
0R2J-2-GP FCH integrated PU typ =>2.5A A3
JE50_SB SB
Zero ODD Date: Friday, April 01, 2011 Sheet 56 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

ESATA/USB Charger
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 57 of 102
5 4 3 2 1
5 4 3 2 1

SSID = AUDIO
Speaker
D
Connector SPK1 D
110223 SB change to short pad 5

29 AUD_SPK_R+ 1 R5815 20R0805-PAD AUD_SPK_R+_C 1

29 AUD_SPK_R- 1 R5816 20R0805-PAD AUD_SPK_R-_C 2


29 AUD_SPK_L+ 1 R5817 20R0805-PAD AUD_SPK_L+_C 3
29 AUD_SPK_L- 1 R5818 20R0805-PAD AUD_SPK_L-_C 4

1
ACES-CON4-17-GP-U
EC5801 EC5802 EC5803 EC5804
20.F1621.004
2nd = 20.F1686.004

MLVG0402220NV05BP-GP-U

MLVG0402220NV05BP-GP-U

MLVG0402220NV05BP-GP-U

MLVG0402220NV05BP-GP-U
DY DY DY DY 20100614V1.1

2
C
MIC IN C

110223 SB change to short pad


110325 -1 MICIN1
6
1
29 MIC_IN_L 2
29 MIC_IN_R 3
4
29 EXT_MIC_JD# 5 Change to 22.10265.261
at next stage
1

PHONE-JK402-GP
10KR2J-3-GP R5803

10KR2J-3-GP R5804

22.10265.311
1

1
DY DY EC5810 EC5811 EC5816 2nd = 22.10265.261
2

1 TP5812 TPAD14-GP

DY DY DY
MLVS0603M04-1-GP

MLVS0603M04-1-GP

MLVS0603M04-1-GP
2

2
AUD_AGND

AUD_AGND 110325 -1

B AUD_AGND B

110325 -1
AUD_AGND
AUD_AGND 110325 -1
LOUT1
29 AUD_HP1_JD# 5
4
29 AUD_HP1_JACK_R2 2
29 AUD_HP1_JACK_L2
1
6
COMBO_MIC_RR 3
1

EC5815 EC5813 EC5814 AUDIO-JK235-GP


1

EC5817 22.10270.661
1
2

2nd = 22.10270.741
RN5803
SRN1KJ-7-GP DY
DY
DY DY
MLVS0603M04-1-GP

MLVS0603M04-1-GP

MLVS0603M04-1-GP
2

DY
MLVS0603M04-1-GP
4
3

AUD_AGND
110325 -1
AUD_AGND
A AUD_AGND <Variant Name> A
110325 -1

Dr-Bios.com
AUD_AGND AUD_AGND AUD_AGND
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R5805 Title
549R2F-GP
2COMBO_MIC_RR
29 COMBO_MIC 1
Audio Jack
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 58 of 102
5 4 3 2 1
GIGA Lan Transformer LAN1
XF5901 15
1
1CT:1CT
1 16 RJ45_7 2
31 MDI3+
31 LAN_ACT_LED# 3
31 10M/100M/1G_LED# 4
XRF_TDC1 3 14 MCT2 CONN_PW R 5
CONN_PW R2 6
RJ45_7 7

1
EC5910 C5901 2 15 RJ45_8 RJ45_8 8
31 MDI3-
SC6D8P50V2CN-GP DY RJ45_5 9

SCD1U10V2KX-5GP
Tx Side
1 2 MDI0- RJ45_4 10

2
1CT:1CT RJ45_3 11
7 10 RJ45_5 RJ45_6 12
31 MDI2-
EC5909 RJ45_2 13
SC6D8P50V2CN-GP RJ45_1 14
1 2 MDI0+ XRF_TDC2 6 11 MCT1 16

EC5903 8 9 RJ45_4 MLX-CON14-6-GP


31 MDI2+

1
SC6D8P50V2CN-GP C5902 Rx Side 20.F1034.014
1 2 MDI1- DY 1008-SWAP 1008-SWAP

SCD1U10V2KX-5GP
2ND = 20.F0765.014

2
XFORM-12P-36-GP
EC5904 68.HD081.30B
SC6D8P50V2CN-GP 2nd = 68.68160.30B
1 2 MDI1+

XF5902 RN5901
EC5905 3D3V_S5 2 3 CONN_PW R2
SC6D8P50V2CN-GP 1CT:1CT 1 4 CONN_PW R
1 2 MDI2- 1 16 RJ45_3
31 MDI1+
SRN470J-4-GP-U

2
EC5901 EC5902

SC100P50V2JN-3GP
EC5906 XRF_TDC3 3 14 MCT4 SC100P50V2JN-3GP
SC6D8P50V2CN-GP DY DY

1
1 2 MDI2+

1
C5903 2 15 RJ45_6
31 MDI1-
DY

SCD1U10V2KX-5GP
Tx Side
EC5908

2
SC6D8P50V2CN-GP 1CT:1CT
1 2 MDI3- 7 10 RJ45_2
31 MDI0-

EC5907 XRF_TDC4 6 11 MCT3


SC6D8P50V2CN-GP LAN_ACT_LED#
1 2 MDI3+
8 9 RJ45_1 10M/100M/1G_LED#
31 MDI0+
C5904 1 Rx Side
0914-SA for Vendor Suggestion DY 1008-SWAP 1008-SWAP
SCD1U10V2KX-5GP

1
C5906 C5907
2

XFORM-12P-36-GP DY DY

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
68.HD081.30B

2
2nd = 68.68160.30B
MCT3

MCT4

MCT1

MCT2

U5901 U5904
TVLST2304AD0-GP TVLST2304AD0-GP
5V_S5 5 5V_S5 5
1
1

R5903 R5901 R5902 R5904


75R3J-L-GP 75R3J-L-GP 75R3J-L-GP 75R3J-L-GP
2
2

2 2
MCT_R

6
DY
1

C5908 DY
SC1KP2KV6KX-GP
2

31 MDI1+ 31 MDI0+

31 MDI1- 31 MDI0-
MCT1

MCT2

MCT3

MCT4

U5903 U5902
TVLST2304AD0-GP TVLST2304AD0-GP
5V_S5 5 5V_S5 5
1

1
1

GDT1 GDT2 GDT3 GDT4


B88069X9231T203-GP

B88069X9231T203-GP
B88069X9231T203-GP

B88069X9231T203-GP

2 2
1

6
DY DY
<Variant Name>
2

2
2

Dr-Bios.com
DY DY DY DY
31 MDI3+ 31 MDI2+
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
31 MDI3- 31 MDI2-
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN_CONN
0914-SA for EMI Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 59 of 102
5 4 3 2 1

SPI FLASH ROM (2M byte) for KBC


3D3V_AUX_S5
3D3V_AUX_S5

4
3

1
DY R6002 RN6002 C6001 C6002
D 100KR2J-1-GP SRN100KJ-6-GP DY SCD1U10V2KX-5GP D

SC10U6D3V5KX-1GP
2

2
1
2
SPI_HOLD_0#

U6001

27 SPI_CS0#_R 1 CS# VCC 8


27 SPI_SO_R 1 R6003 2 33R2J-2-GP SPI_SO 2 SO/SIO1 HOLD# 7
27 EC_SPI_W P# 3 WP# SCLK 6 SPI_CLK_R 27
4 GND SI/SIO0 5 SPI_SI_R 27

1
1

1
R6001 MX25L1606EM2I-12G-GP EC6003 R2733 EC6001
10KR2J-3-GP 72.25160.B01 DY 33R2J-2-GP SC33P50V2JN-3GP

SC4D7P50V2CN-1GP
2nd = 72.25Q16.001 DY DY

2
1

2
SPICLK_1_R
1
EC6002
SC22P50V2JN-4GP
DY

2
C C

110322 -1 3D3V_AUX_S5
RTC_AUX_S5 D6003 110322 -1
SSID = RBATT R6007
2
+RTC_VCC
1 510R2J-1-GP
2 RTC_PW R_D 3 RTC1
R6006
1 RTC_PW R 1 0R0402-PAD
2 1 PWR
2

2 GND
C6005 CH715FPT-GP NP1 NP1
SC1U6D3V2KX-GP 83.R0304.B81 110328 -1 NP2
1

NP2
DY 2nd = 83.00040.E81
Width = 20 mils BAT-AAA-BAT-054-P04-GP-U
62.70001.061
1014-SA for RTC Leakage
2ND = 62.70014.001
Delete 3rd sourse
1 +RTC_VCC
TP6001
B B

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash/RTC
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 60 of 102

5 4 3 2 1
5 4 3 2 1

Support 2A
5V_S5 5V_USB1_S3
U6101
at least 80 mil
at least 80 mil 1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6 TC6103

1
27,82 USB_PWR_EN# 4 EN/EN# OC# 5
1

SE100U16VM-13GP
C6101 C6102
D DY SCD1U10V2KX-5GP SC1U10V2KX-1GP D

2
G547E2P81U-GP
2

74.00547.079
2nd = 74.02101.079
79.1071D.3CL

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

USB Power SW
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 61 of 102
5 4 3 2 1
5 4 3 2 1

110221 SB Change from port2 to port1

SCD1U16V2KX-3GP DY
FILTER-137-GP
35 USB30_TXDP1_R C6201 1USB3
2 USB30_TXDP1_C 4 3
D 110328 -1 D
35 USB30_TXDN1_R C6202 1USB3
2 USB30_TXDN1_C 1 2

SCD1U16V2KX-3GP
L6203
5V_USB1_S3

USB31
CHASSIS CHASSIS
10 13
9
1
DY
FILTER-137-GP 8
18 USB20_DM1 4 3 2
7
18 USB20_DP1 1 2 3
6
4
L6202 5
C 11 12 C
CHASSIS CHASSIS

SKT-USB13-24-GP-U1
DY
FILTER-137-GP
35 USB30_RXDP1_R 4 3
35 USB30_RXDN1_R 1 2

L6201

USB 3.0 Connector


Pin definition
1 POWER
B 2 USB 2.0 D- B

3 USB 2.0 D+
4 GND
5 StdA_SSRX- SuperSpeed RX
6 StdA_SSRX+
7 GND
8 StdA_SSTX- SuperSpeed TX
9 StdA_SSTX+
<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

USB 3.0
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 62 of 102
5 4 3 2 1
5 4 3 2 1

D D

ANNIE Bluetooth Module


1.5A / High Active Voltage 2V
3D3V_BT_S0 3D3V_S0
U6301 C6302
SC4D7U6D3V3KX-GP
3D3V_BT_S0 1 5 1 2
OUT IN
2 GND
C 3 NC#3 EN 4 BLUETOOTH_EN 27,65
C

G5240B1T1U-GP
74.05240.A7F
2ND = 74.07534.A7F

BT2
5
1 USB_PN4 18
2 USB_PP4 18
3
B 4 3D3V_BT_S0 B
6

ACES-CON4-7-GP-U
20.F0772.004
2nd = 20.F1804.004

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Dr-Bios.com
Title

BLUE TOOTH
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 63 of 102

5 4 3 2 1
5 4 3 2 1

D D

C (Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 64 of 102
5 4 3 2 1
5 4 3 2 1

Mini Card Connector(802.11a/b/g/n)


R6504~R6509 close to Debug connector
W LAN1
D 53 D
1D5V_S0
DY NP1 3D3V_S0
18,31,66 PCIE_W AKE# 1 R6511 2 MINI1_WAKE# 1
0R2J-2-GP
2
3
4
5
6
18 CLK_PCIE_W LAN_REQ# 7
8 LPC_AD0_C R6505 1 DY 2 0R2J-2-GP LPC_AD0 17,27,71
9
10 LPC_AD1_C R6504 1 DY 2 0R2J-2-GP LPC_AD1 17,27,71
17 CLK_PCIE_W LAN# 11
12 LPC_AD2_C R6507 1 DY 2 0R2J-2-GP LPC_AD2 17,27,71
17 CLK_PCIE_W LAN 13
14 LPC_AD3_C R6506 1 DY 2 0R2J-2-GP LPC_AD3 17,27,71
15
16 LPC_FRAME#_C R6509 1 DY 2 0R2J-2-GP LPC_FRAME# 17,27,71

27 E51_RXD 1 R6501 20R2J-2-GP E51_RXD_R 17


18
27 E51_TXD 1 R6502 20R2J-2-GP E51_TXD_R 19
20 W IFI_RF_EN 27
21
22 PLT_RST#_W LAN 1 R6510 2 PLT_RST# 17,31,66,71,83
23 0R2J-2-GP
C
4 PCIE_RXN2 C
24
4 PCIE_RXP2 25
26
27
28 RN6501
29 SRN0J-6-GP
30 W LAN_SMBCLK_R 1 4
DY PCH_SMBCLK 14,15,66
31 W LAN_SMBDATA_R 2 3
4 PCIE_TXN2 PCH_SMBDATA 14,15,66
32
4 PCIE_TXP2 33
34
35
36 USB_PN1 18
37
38 USB_PP1 18
3D3V_S0 39
40
41 110328 -1
42 W MAX_LED#_C 1 R6513
DY 20R2J-2-GP
43
44 W LAN_LED#_C 1 R6514 20R0402-PAD W LAN_LED# 68
45
46 CLK_PCI_LPC_C 2 1

2
47 R6508 DY
48 0R2J-2-GP DY R6512 PLT_RST#_W LAN
49 10KR2J-3-GP
50
5V_S5 1 R6503 2 +5V_MINI_DEBUG 51

1
0R3J-0-U-GP 52 3D3V_S0 C6518
B SCD01U50V2KX-1GP B
NP2
R6515 DY

2
27,63 BLUETOOTH_EN 1 0R3J-0-U-GP
2 54

放放DIMM door可可可可
DY CLK_PCI_LPC 17,21,71
PTW O-CONN52A-8-GP
20.F1518.052 110325-1
2ND = 20.F1764.052 Reserve for
3RD = 62.10043.981 HB97 driver loss issue

5V_S5 1D5V_S0 3D3V_S0


1

1
1

C6501 C6505 C6506 C6507 FC6501 C6502 C6503 C6504 FC6502


SCD1U16V2KX-3GP DY DY DY SCD1U16V2KX-3GP DY SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP

SCD1U16V2KX-3GP

A <Variant Name> A
2

2
2

Dr-Bios.com
DY DY
Wistron Corporation
0716 -SA 0716 -SA 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WLAN
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 65 of 102
5 4 3 2 1
5 4 3 2 1

Mini Card Connector(WWAN)


W W AN1
53

R6604 NP1
18,31,65 PCIE_W AKE# 1 0R2J-2-GP
2 MINI2_W AKE# 1 3D3V_S0 1D5V_S0
DY
2
D 3 D
4
5
6
18 CLK_PCIE_W W AN_REQ# 7
8 UIM_PW R
9
10 UIM_DATA
17 CLK_PCIE_W W AN# 11
12 UIM_CLK
17 CLK_PCIE_W W AN 13
14 UIM_RESET
15
16 UIM_VPP

17
18
19
20 3G_EN 27
21
22 PLT_RST#_W AN 1 R6605 2 0R2J-2-GP PLT_RST# 17,31,65,71,83
4 PCIE_RXN1 23 3G
24
4 PCIE_RXP1 25
26
27
28 RN6601
29 SRN0J-6-GP
C 30 W W AN_SMBCLK_R 1 4 C
DY PCH_SMBCLK 14,15,65
31 W W AN_SMBDATA_R 2 3
4 PCIE_TXN1 PCH_SMBDATA 14,15,65
32
4 PCIE_TXP1 33
34
35
36 USB_PN3 18
37
38 USB_PP3 18
3D3V_S0 39
40
41
42 3G_LED# 68
43
44
45
46
47
48
49
50
51
52
Place near MINI Card CONN
NP2 3D3V_S0

54

3G

1
PTW O-CONN52A-8-GP C6601 C6604
B B
3G DY

SCD1U16V2KX-3GP

SC33P50V2JN-3GP
20.F1518.052

2
2ND = 20.F1764.052
3RD = 62.10043.981 0716 -SA

1D5V_S0

3D3V_S0
1

C6606 C6607

1
DY DY SC33P50V2JN-3GP C6608
SCD1U16V2KX-3GP

3G SCD1U16V2KX-3GP
2

2
3G
C6611 SIM1
SC4D7U25V5KX-GP Place near Pin 24
1 2 UIM_PW R 1 NP1
VCC NP1
NP2 NP2
UIM_VPP 6 1D5V_S0
VPP
RESERVED#4 4 USB_PP5 18
RESERVED#8 8 USB_PN5 18 <Variant Name>
A UIM_RESET 2 A
RST
1

UIM_CLK 3 C6609 C6610


UIM_DATA CLK SC33P50V2JN-3GP
7 5 DY DY
Wistron Corporation
SCD1U16V2KX-3GP

I/O GND

Dr-Bios.com
1 CD 9 10
TP6601
2

CD GND 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


GND 11
Taipei Hsien 221, Taiwan, R.O.C.
0716 -SA
CARDBUS9P-GP-U1 Title
3G 20.I0063.001
WWAN
ADD avl in sb stage Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 66 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 67 of 102
5 4 3 2 1
5 4 3 2 1

PLED1

FRONT_PW RLED#_R 3

STDBY_LED#_R
1 5V_S5 WLAN_LED
2

FRONT_PW RLED#_Q 1 R6801 2 330R2F-GP


STDBY_LED#_Q 1 R6802 2 470R2F-GP LED-BO-9-GP-U 3D3V_S0
DC_BATFULL#_Q R6803 330R2F-GP 83.00326.E70
D
CHARGE_LED#_Q
1
1 R6804
2
2 470R2F-GP From module D

1
CHLED1 R6808
W LAN_LED# 65
4K7R2J-2-GP
Power button LED DC_BATFULL#_R 3
Q6803

2
R2
1 5V_AUX_S5 2
R1 1 W LAN_LED_OFF# 27
Q6801 CHARGE_LED#_R 2 W LAN_LED#_1 3
3 FRONT_PW RLED#_Q
1 R1 LTC043ZUB-FS8-GP
27 PW RLED
2 LED-BO-9-GP-U 84.00043.011
R2 2nd = 84.00143.D1K
83.00326.E70

D
LTC043ZUB-FS8-GP
84.00043.011
2nd = 84.00143.D1K Q6806
2N7002K-2-GP

FRONT_PW RLED#_Q EC6801 84.2N702.J31


1DY 2SCD1U10V2KX-4GP
Power STDBY_LED CHARGE_LED#_Q EC6802 1DY 2SCD1U10V2KX-4GP
2ND = 84.2N702.031

G
S
STDBY_LED#_Q EC6803 1DY 2SCD1U10V2KX-4GP
Q6802
3 STDBY_LED#_Q DC_BATFULL#_Q EC6804 1DY 2SCD1U10V2KX-4GP
R1 W LAN_TEST_LED 27
27 STDBY_LED 1
R2
2
for factory test
C LTC043ZUB-FS8-GP C
84.00043.011
2nd = 84.00143.D1K

SATA HDD LED


Battery LED2(DC_BATFULL)

NC
Q6805
3 DC_BATFULL#_Q
19 SATA_LED# 1 R6807 2 MEDIA_LED#_R K A 5V_S0
1 R1 330R2F-GP
27 DC_BATFULL
2 MLED1
R2 LED-B-67-GP-U2
LTC043ZUB-FS8-GP
84.00043.011
83.00110.F70 3G LED
2nd = 84.00143.D1K

3D3V_S0
From module
Battery LED1(CHARGE)

1
Q6808 R6809
B CHARGE_LED#_Q B
3 DY 10KR2J-3-GP
1 R1 Q6804
27 CHARGE_LED
2 3G W LED1

2
R2 R2
3G_LED#_1 2
LTC043ZUB-FS8-GP 3G_LED#_1 1 R6806 2 3G_LED#_1R 3 1
330R2F-GP
R1 3G_LED# 66
84.00043.011 3
2nd = 84.00143.D1K 1 5V_S0
3G

D
LTA024EUB-FS8-GP
W LAN_LED#_1 1 R6805 2 W LAN_LED#_1R 2
470R2F-GP 2ND = 84.00124.K1K
Q6807
LED-BO-9-GP-U 2N7002K-2-GP
83.00326.E70 84.2N702.J31
2ND = 84.2N702.031

G
S
5V_S5
PW 1 3G
5

1
W LAN_TEST_LED 27
2 FRONT_PW RLED#_Q
3
4
KBC_PW RBTN# 27,29 for factory test
6

PTW O-CON4-9-GP-U1
A <Variant Name> A

2nd = 20.K0465.004

Dr-Bios.com
Wistron Corporation
20.K0382.004 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard/Power Button


Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 68 of 102
5 4 3 2 1
5 4 3 2 1

5V_S0

5V_S0
TOUCH PAD

1
EC6901 EC6902

SCD1U10V2KX-4GP
DY SCD1U10V2KX-4GP
20.K0315.012

2
2
1
D D
2nd = 20.K0370.012
Internal KeyBoard RN6901
SRN4K7J-8-GP
Connector TPAD1
14

3
4
12
2nd = 20.K0255.026 SRN33J-5-GP-U 11
TPDATA 1 4 TP_DATA 10
27 TPDATA
TPCLK 2 3 TP_CLK 9
KB1 PTWO-CON26-GP-U 27 TPCLK
20.K0317.026 RN6902
8
7
TP_RIGHT 6
TP_DATA 5
TP_CLK 4
TP_LEFT 3
TP_RIGHT 2
27

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
TP_LEFT 1

2
C EC6903 EC6904 EC6905 EC6906 C

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
SC100P50V2JN-3GP 13
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

1
ACES-CON12-9-GP-U
KROW[0..7] 27
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL0

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

KCOL[0..16] 27
Pin1 on right side 1 12
KCOL17 27
MB PIN DEFINE 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
T/P

SW_R1 SW_L1
B TP_RIGHT 1 2 TP_LEFT 1 2 B
26
1
K/B 3
5

4 3
5

SW-TACT-5P-9-GP SW-TACT-5P-9-GP
62.40089.221 62.40089.221

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

Key Board/Touch Pad


Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 69 of 102
5 4 3 2 1
5 4 3 2 1

D D

3D3V_AUX_S5
C C

1
C7002
SCD1U10V2KX-5GP

2
LID1
1 VDD

GND 3
R7002
LID_CLOSE# 1 100R2J-2-GP
2 LID_CLOSE#_1 2
27 LID_CLOSE# VOUT
1

C7001 APX9132HAI-TRG-GP
DY SCD047U16V2KX-1-GP 74.09132.C7B
2

74.05712.0BB
B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 70 of 102
5 4 3 2 1
5 4 3 2 1

110218 SB BOM Change

D D

3D3V_S0
DB1
1
17,27,65 LPC_AD0 2
17,27,65 LPC_AD1 3
17,27,65 LPC_AD2 4
17,27,65 LPC_AD3 5
17,27,65 LPC_FRAME# 6
17,31,65,66,83 PLT_RST# 7
8
17,21,65 CLK_PCI_LPC 9
10
11
12 DY
MLX-CON10-7-GP
20.D0183.110
C C

HDT+ Connectors

B B

1 TP7104
6 APU_TRST#

1 TP7105
6 APU_TCK
1 TP7106
6 APU_TMS
1 TP7107
6 APU_TDI
1 TP7108 CRB:placed 0-ohm
6 APU_TDO
1 TP7109 Checklist: If both SCAN and HDT+ header are implement
6,17,36,97 H_CPUPWRGD_E
1 TP7110 placed 15-ohm
6 APU_RST_L_BUF
1 TP7111
6 APU_DBRDY
1 TP7112
6 APU_DBREQ#
1 TP7113
6 APU_TEST19_PLLTEST0
1 TP7114
6 APU_TEST18_PLLTEST1
<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

Dubug connector
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 71 of 102
5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 72 of 102
5 4 3 2 1
5 4 3 2 1

SD/XD/MS Card Reader


SSID = SDIO
D CARD1 D
3D3V_CARD_S0
P11 1 XD_CD#
SD_VCC XD_CD SD_CLK/XD_R/B#
XD_R/B 2
P18 3 XD_RE#
MS_VCC XD_RE

1
EC7401 4 XD_CE#/MS_INS#
SCD1U10V2KX-4GP XD_CE SD_CMD/XD_CLE/MS_BS
18 XD_VCC XD_CLE 5
DY 6 XD_ALE

2
XD_ALE SD_CD/XD_WE#
XD_WE 7
SD_DAT0/XD_D0/MS_D0 P4 8 XD_WP#/SD_WP#
SD_DAT1/XD_D1/MS_D1 SD_DAT0 XD_WP_IN
P3 SD_DAT1
SD_DAT2/XD_D2/MS_D2 P21 10 SD_DAT0/XD_D0/MS_D0
31 SD_DAT0/XD_D0/MS_D0 SD_DAT2 XD_D0
SD_DAT3/XD_D3/MS_D3 P19 11 SD_DAT1/XD_D1/MS_D1
31 SD_DAT1/XD_D1/MS_D1 SD_DATA3 XD_D1
12 SD_DAT2/XD_D2/MS_D2
31 SD_DAT2/XD_D2/MS_D2 XD_D2
SD_CD/XD_WE# P1 13 SD_DAT3/XD_D3/MS_D3
31 SD_DAT3/XD_D3/MS_D3 SD_CD XD_D3
XD_WP#/SD_WP# P2 14 SD_DAT4/XD_D4/MS_D4
31 SD_DAT4/XD_D4/MS_D4 SD_WP XD_D4
SD_CLK/XD_R/B# P8 15 SD_DAT5/XD_D5/MS_D5
31 SD_DAT5/XD_D5/MS_D5 SD_CLK XD_D5
SD_CMD/XD_CLE/MS_BS P16 16 SD_DAT6/XD_D6/MS_D6
31 SD_DAT6/XD_D6/MS_D6 SD_CMD XD_D6
17 SD_DAT7/XD_D7/MS_D7
31 SD_DAT7/XD_D7/MS_D7 XD_D7
C SD_DAT0/XD_D0/MS_D0 P10 C
31 SD_CD/XD_WE# MS_DATA0
SD_DAT1/XD_D1/MS_D1 P9 P5
31 XD_CD# MS_DATA1 MS_GND
SD_DAT2/XD_D2/MS_D2 P12 P20
31 XD_CE#/MS_INS# MS_DATA2 MS_GND
SD_DAT3/XD_D3/MS_D3 P15
31 XD_RE# MS_DATA3
31 XD_WP#/SD_WP# XD_GND 9
SD_CMD/XD_CLE/MS_BS P7 19
31 XD_ALE MS_BS XD_GND
XD_CE#/MS_INS# P14
31 SD_CLK/XD_R/B# MS_INS
SD_CLK/XD_R/B# P17 P6
31 SD_CMD/XD_CLE/MS_BS MS_SCLK SD_GND
SD_GND P13

NP1 NP1 SD_CD/WP_COM/SDIO_GND P22


NP2 NP2 SD_CD/WP_COM/SDIO_GND P23

CARD-PUSH-42P-1-GP

20.I0132.001

B B

<Variant Name>
Card-reader Off-Page
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

CARD Reader CONN


Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 74 of 102
5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Dr-Bios.com
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 75 of 102
5 4 3 2 1
5 4 3 2 1

110221 SB Change from port1 to port3


110221 SB Change from port0 to port2 HRS-CON20-6-GP
22
USBCN2
20 110217
18 USB30_RXDN3 19 change from port8 to port0 16
18 USB30_RXDP3 18 14
D 17 13 D

18 USB20_DP3 16 18 USB_PN6 12
18 USB20_DM3 15 18 USB_PP6 11
14 10
C8213 1USB3 SCD1U16V2KX-3GP USB30_TXDN3_C
2 CARD 13 USB3 CARD 18 USB_PN0 9
18 USB30_TXDN3
C8214 1USB3 SCD1U16V2KX-3GP USB30_TXDP3_C
2 CARD 12 18 USB_PP0 8
18 USB30_TXDP3
11 7
C8211 1USB3 SCD1U16V2KX-3GP USB30_TXDN2_C
2 CARD 10 6
18 USB30_TXDP2 27,61 USB_PWR_EN#
C8212 1USB3 SCD1U16V2KX-3GP USB30_TXDP2_C
2 CARD 9 5V_S5 5
18 USB30_TXDN2
8 4
18 USB20_DM2 7 3
18 USB20_DP2 6 2
5
18 USB30_RXDP2 4 1
18 USB30_RXDN2 3 15
2
ACES-CON14-2-GP-U
1
20.K0315.014
21
C
USBCN1
2nd = 20.K0370.014 C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

IO Board Connector
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 82 of 102
5 4 3 2 1
5 4 3 2 1

CONFIGURATION STRAPS RECOMMENDED SETTINGS


0= DO NOT INSTALL RESISTOR
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1 = INSTALL 3K RESISTOR
PEG_RXP[0..15] 4 X = DESIGN DEPENDANT
AVGA1A 1 OF 8 THEY MUST NOT CONFLICT DURING RESET NA = NOT APPLICABLE
4 PEG_TXP[0..15] PEG_RXN[0..15] 4
PLATFORM
4 PEG_TXN[0..15] STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS RECOMMEND SETTING
Transmitter Power Savings Enable
PEG_TXP0
TX_PWRS_ENB GPIO0 0: 50% Tx output swing 1: Full Tx output swing X 1
AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_C_RXP0 C8301 1DIS 2 SCD1U10V2KX-5GP PEG_RXP0
D PEG_TXN0 Y37 Y32 PEG_C_RXN0 C8302 1DIS 2 SCD1U10V2KX-5GP PEG_RXN0 PCIE TRANSMITTER DE-EMPHASIS ENABLED D
PCIE_RX0N PCIE_TX0N
TX_DEEMPH_EN GPIO1 0:Tx de-emphasis disabled 1:Tx de-emphasis enabled X 1
PEG_TXP1 Y35 W33 PEG_C_RXP1 C8303 1DIS 2 SCD1U10V2KX-5GP PEG_RXP1 0:Advertises the PCIe device as 2.5GT/s capable at power on.
PEG_TXN1 PCIE_RX1P PCIE_TX1P
W36 PCIE_RX1N PCIE_TX1N W32 PEG_C_RXN1 C8304 1DIS 2 SCD1U10V2KX-5GP PEG_RXN1 BIF_GEN2_EN_A GPIO2 1:Advertises the PCIe device as 5.0GT/s capable at power on. 0 0

PEG_TXP2
optional input allow the system to request a fast
W38 PCIE_RX2P PCIE_TX2P U33 PEG_C_RXP2 C8305 1DIS 2 SCD1U10V2KX-5GP PEG_RXP2 GPIO5_AC_BATT GPIO5 ? 0
PEG_TXN2 V37 U32 PEG_C_RXN2 C8306 1DIS 2 SCD1U10V2KX-5GP PEG_RXN2 power reduction by setting GPIO5 to low.
PCIE_RX2N PCIE_TX2N

PEG_TXP3
RESERVED GPIO8 RESERVED 0 0
V35 PCIE_RX3P PCIE_TX3P U30 PEG_C_RXP3 C8308 1DIS 2 SCD1U10V2KX-5GP PEG_RXP3
PEG_TXN3 U36 U29 PEG_C_RXN3 C8307 1DIS 2 SCD1U10V2KX-5GP PEG_RXN3 0:VGA Controller capacity enabled
PCIE_RX3N PCIE_TX3N
VGA_DIS GPIO9 1:The device won't be recognized as the system's VGA controller 0 0
PEG_TXP4 U38 T33 PEG_C_RXP4 C8309 1DIS 2 SCD1U10V2KX-5GP PEG_RXP4 BIOS_ROM_EN=1, Config[2:0] defines the ROM type 0 0 1
PEG_TXN4 PCIE_RX4P PCIE_TX4P PEG_C_RXN4 C8310 SCD1U10V2KX-5GP PEG_RXN4 X X X
T37 T32 1DIS 2 ROMIDCFG[2:0] GPIO[13:11] BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size
PCIE_RX4N PCIE_TX4N (256MB)
PEG_TXP5 T35 T30 PEG_C_RXP5 C8311 1DIS 2 SCD1U10V2KX-5GP PEG_RXP5 RESERVED GPIO21 RESERVED 0 0
PEG_TXN5 PCIE_RX5P PCIE_TX5P PEG_C_RXN5 C8312 SCD1U10V2KX-5GP PEG_RXN5
R36 PCIE_RX5N PCIE_TX5N T29 1DIS 2

PEG_TXP6 R38 PCIE_RX6P


PCI EXPRESS INTERFACE PCIE_TX6P P33 PEG_C_RXP6 C8313 1DIS 2 SCD1U10V2KX-5GP PEG_RXP6
BIOS_ROM_EN GPIO_22_ROMCSB
0:Disable external BIOS ROM device
1:Enable external BIOS ROM device X 0
PEG_TXN6 P37 P32 PEG_C_RXN6 C8314 1DIS 2 SCD1U10V2KX-5GP PEG_RXN6 VIP Device Strap Enable indicates to the software driver that it sense
PCIE_RX6N PCIE_TX6N VIP_DEVICE_STRAP_EN X
V2SYNC whether or not a VIP device is connected on the VIP Host interface. 0
PEG_TXP7 P35 P30 PEG_C_RXP7 C8316 1DIS 2 SCD1U10V2KX-5GP PEG_RXP7
PEG_TXN7 PCIE_RX7P PCIE_TX7P
N36 PCIE_RX7N PCIE_TX7N P29 PEG_C_RXN7 C8315 1DIS 2 SCD1U10V2KX-5GP PEG_RXN7 RSVD H2SYNC RESERVED 0 0

C PEG_TXP8 N38 N33 PEG_C_RXP8 C8318 1DIS_PX


2 SCD1U10V2KX-5GP PEG_RXP8 RSVD GENERICC RESERVED 0 0 C
PEG_TXN8 PCIE_RX8P PCIE_TX8P
M37 PCIE_RX8N PCIE_TX8N N32 PEG_C_RXN8 C8317 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXN8

PEG_TXP9
AUD[1] HSYNC X 1
M35 PCIE_RX9P PCIE_TX9P N30 PEG_C_RXP9 C8320 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXP9 AUD[1:0]:11-Audio for both DisplayPort and HDMI
PEG_TXN9 L36 N29 PEG_C_RXN9 C8319 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXN9
PCIE_RX9N PCIE_TX9N
AUD[0] VSYNC X 1
PEG_TXP10 L38 L33 PEG_C_RXP10 C8321 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXP10
PEG_TXN10 PCIE_RX10P PCIE_TX10P PEG_C_RXN10 C8322 SCD1U10V2KX-5GP PEG_RXN10
K37 PCIE_RX10N PCIE_TX10N L32 1DIS_PX
2

PEG_TXP11 K35 L30 PEG_C_RXP11 C8323 1DIS_PX


2 SCD1U10V2KX-5GP PEG_RXP11
PEG_TXN11 PCIE_RX11P PCIE_TX11P PEG_C_RXN11 C8324 SCD1U10V2KX-5GP PEG_RXN11
1DIS_PX
J36 PCIE_RX11N PCIE_TX11N L29 2
PIN STRAPS 3D3V_VGA_S0

PEG_TXP12 J38 K33 PEG_C_RXP12 C8325 1DIS_PX


2 SCD1U10V2KX-5GP PEG_RXP12
PEG_TXN12 PCIE_RX12P PCIE_TX12P
H37 PCIE_RX12N PCIE_TX12N K32 PEG_C_RXN12 C8326 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXN12
85 TX_PW RS_ENB
R8301 1 DIS_PX2 3KR2J-2-GP

R8302 1 DIS_PX2 3KR2J-2-GP


85 TX_DEEMPH_EN
PEG_TXP13 H35 J33 PEG_C_RXP13 C8328 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXP13 R8332 stuff 1K for Mannhatton VGA
PEG_TXN13 PCIE_RX13P PCIE_TX13P PEG_C_RXN13 C8327 SCD1U10V2KX-5GP PEG_RXN13 R8303 10KR2J-3-GP
G36 PCIE_RX13N PCIE_TX13N J32 1DIS_PX
2 85 BIF_GEN2_EN_A 1 DIS_PX2 stuff 5.1K for Vancouver VGA
R8304 1 DY 2 10KR2J-3-GP
85 GPIO8_ROMSO
PEG_TXP14 G38 K30 PEG_C_RXP14 C8330 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXP14
PEG_TXN14 PCIE_RX14P PCIE_TX14P 3D3V_VGA_S0
F37 PCIE_RX14N PCIE_TX14N K29 PEG_C_RXN14 C8329 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXN14
85 VGA_DIS
R8305 1 DY 2 10KR2J-3-GP

PEG_TXP15 F35 H33 PEG_C_RXP15 C8332 1DIS_PX


2 SCD1U10V2KX-5GP PEG_RXP15 R8306 1 DIS_PX2 10KR2J-3-GP R8331 2 DY 1 10KR2J-3-GP
PCIE_RX15P PCIE_TX15P 85 CONFIG0
PEG_TXN15 E37 H32 PEG_C_RXN15 C8331 1DIS_PX
2 SCD1U10V2KX-5GP PEG_RXN15
PCIE_RX15N PCIE_TX15N R8307 10KR2J-3-GP
85 CONFIG1 1 DY 2 84 TESTEN
B B
R8308 1 DY 2 10KR2J-3-GP R8332 1 DIS_PX2 5K1R2F-2-GP
CLOCK 85 CONFIG2
AB35 R8309 1 DIS 2 10KR2J-3-GP
100MHz 17 CLK_PCIE_VGA PCIE_REFCLKP 85,94 VGA_CRT_VSYNC
AA36 R8322 1 DY 2 10KR2J-3-GP
17 CLK_PCIE_VGA# PCIE_REFCLKN 85 JTAG_TRST#_VGA
R8310 1 DIS 2 10KR2J-3-GP
85,94 VGA_CRT_HSYNC R8323
85 JTAG_TCK_VGA 1 DY 2 10KR2J-3-GP
CALIBRATION DIS_PX
AJ21 NC#AJ21 PCIE_CALRP Y30 PCIE_CALRP 1 R8316 2
DIS_PX AK21 1K27R2F-L-GP R8311 1 DY 2 10KR2J-3-GP 0728 -SA
NC#AK21 85 VSYNC_DAC2
1 R8317 2 PW RGOOD AH16 PWRGOOD PCIE_CALRN Y29 PCIE_CALRN 1 2 1V_VGA_S0
10KR2F-2-GP R8318 R8312 1 DY 2 10KR2J-3-GP
85 HSYNC_DAC2
2KR2F-3-GP
ATI_RST# 2 R8320 1 VGA_RST# AA30 DIS_PX R8313 1 DY 2 10KR2J-3-GP
PERST# 85 BIOS_ROM_EN
0R2J-2-GP
R8314 1 DY 2 10KR2J-3-GP
JTAG SIGNAL OPTION
DIS_PX MADISON-PRO-2-GP PE_GPIO0
85 GPIO5_AC_BATT
Normal Debug pilot run
DIS_PX 3D3V_VGA_S0
85 GPIO21_BB_EN
R8315 1 DY 2 10KR2J-3-GP Signal mode mode mode
1

85 VGA_RST# C8333 dGPU mode H


DY SC47P50V2JN-3GP
85 JTAG_TMS_VGA
R8324 1 DY 2 10KR2J-3-GP
IGPU L TESTEN "1"(PU) "1"(PU) "0"(PD)
2

1
10KR2J-3-GP

R8319

IGPU with BACO H


PX JTAG_TRST# "0"(PD) "1"(PU) NC
D8301 83.00056.Q11 DIS
2

17 PE_GPIO0 PE_GPIO0 2 2ND = 83.00056.G11 PLT_RST# 2 R8328 1 ATI_RST# JTAG_TCK CLK "1"(PU) NC
3RD = 83.00056.K11 0R2J-2-GP
0930 -SA 3
PX JTAG_TMS "1"(PU) "1"(PU) NC
17,31,65,66,71 PLT_RST# 2 R8326 1 PLT_RST#_R 1
A 0R2J-2-GP A
<Variant Name>
BAW 56-5-GP ATI_RST#
PX

Dr-Bios.com
D8302
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 Taipei Hsien 221, Taiwan, R.O.C.
DY DY 83.00016.K11
93 1D8V_S0_VGA_PG 2 R8333 1 1D8V_S0_VGA_PG_R 3 Title
0R2J-2-GP 2ND = 83.00016.F11
GPU_PCIE/STRAPPING(1/5)
1

C8335 2
DY SCD1U10V2KX-4GP 3rd = 83.00016.B11 Size Document Number Rev
Custom
JE50_SB SB
2

BAS16-6-GP
Date: Friday, April 01, 2011 Sheet 83 of 102

5 4 3 2 1
5 4 3 2 1

AVGA1C 3 OF 8 AVGA1D 4 OF 8
DDR2 DDR2 DDR2 DDR2
88 MDA[0..31] 90 MDB[0..31]
GDDR3/GDDR5 GDDR5/GDDR3 GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 DDR3 DDR3
MDA0 C37 G24 MDB0 C5 P8
DQA0_0/DQA_0 MAA0_0/MAA_0 MAA0 88,89 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB0 90,91
MDA1 C35 J23 MDB1 C3 T9
DQA0_1/DQA_1 MAA0_1/MAA_1 MAA1 88,89 DQB0_1/DQB_1 MAB0_1/MAB_1 MAB1 90,91
MDA2 A35 H24 MDB2 E3 P9
DQA0_2/DQA_2 MAA0_2/MAA_2 MAA2 88,89 DQB0_2/DQB_2 MAB0_2/MAB_2 MAB2 90,91

MEMORY INTERFACE A
MDA3 MDB3

MEMORY INTERFACE B
E34 DQA0_3/DQA_3 MAA0_3/MAA_3 J24 MAA3 88,89 E1 N7 MAB3 90,91
MDA4 MDB4 DQB0_3/DQB_3 MAB0_3/MAB_3
G32 H26 MAA4 88,89 F1 N8 MAB4 90,91
MDA5 DQA0_4/DQA_4 MAA0_4/MAA_4 MDB5 DQB0_4/DQB_4 MAB0_4/MAB_4
D33 DQA0_5/DQA_5 MAA0_5/MAA_5 J26 MAA5 88,89 F3 N9 MAB5 90,91
MDA6 MDB6 DQB0_5/DQB_5 MAB0_5/MAB_5
F32 DQA0_6/DQA_6 MAA0_6/MAA_6 H21 MAA6 88,89 F5 U9 MAB6 90,91
MDA7 MDB7 DQB0_6/DQB_6 MAB0_6/MAB_6
E32 G21 MAA7 88,89 G4 U8 MAB7 90,91
MDA8 DQA0_7/DQA_7 MAA0_7/MAA_7 MDB8 DQB0_7/DQB_7 MAB0_7/MAB_7
D31 DQA0_8/DQA_8 MAA1_0/MAA_8
H19 MAA8 88,89 H5 Y9 MAB8 90,91
MDA9 MDB9 DQB0_8/DQB_8 MAB1_0/MAB_8
D F30 DQA0_9/DQA_9 MAA1_1/MAA_9 H20 MAA9 88,89 H6 W9 MAB9 90,91 D
MDA10 MDB10 DQB0_9/DQB_9 MAB1_1/MAB_9
C30 DQA0_10/DQA_10 MAA1_2/MAA_10 L13 MAA10 88,89 J4 AC8 MAB10 90,91
MDA11 MDB11 DQB0_10/DQB_10 MAB1_2/MAB_10
A30 DQA0_11/DQA_11 MAA1_3/MAA_11 G16 MAA11 88,89 K6 AC9 MAB11 90,91
MDA12 MDB12 DQB0_11/DQB_11 MAB1_3/MAB_11
F28 J16 MAA12 88,89 K5 AA7 MAB12 90,91
MDA13 DQA0_12/DQA_12 MAA1_4/MAA_12 MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12
C28 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 H16 A_BA2 88,89 L4 AA8 B_BA2 90,91
MDA14 MDB14 DQB0_13/DQB_13 MAB1_5/BA2
A28 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 J17 A_BA0 88,89 M6 Y8 B_BA0 90,91
MDA15 MDB15 DQB0_14/DQB_14 MAB1_6/BA0
E28 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 H17 A_BA1 88,89 M1 AA9 B_BA1 90,91
MDA16 MDB16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQA0_16/DQA_16 M3
MDA17 MDB17 DQB0_16/DQB_16
F26 A32 DQMA0 88 M5 H3 DQMB0 90
MDA18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 MDB18 DQB0_17/DQB_17 WCKB0_0/DQMB_0
C26 DQA0_18/DQA_18 WCKA0#_0/DQMA_1 C32 DQMA1 88 N4 H1 DQMB1 90
MDA19 MDB19 DQB0_18/DQB_18 WCKB0#_0/DQMB_1
A26 DQA0_19/DQA_19 WCKA0_1/DQMA_2 D23 DQMA2 88 P6 T3 DQMB2 90
MDA20 MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2
F24 DQA0_20/DQA_20 WCKA0#_1/DQMA_3 E22 DQMA3 88 P5 T5 DQMB3 90
MDA21 MDB21 DQB0_20/DQB_20 WCKB0#_1/DQMB_3
C24 C14 DQMA4 89 R4 AE4 DQMB4 91
MDA22 DQA0_21/DQA_21 WCKA1_0/DQMA_4 MDB22 DQB0_21/DQB_21 WCKB1_0/DQMB_4
A24 A14 DQMA5 89 T6 AF5 DQMB5 91
MDA23 DQA0_22/DQA_22 WCKA1#_0/DQMA_5 MDB23 DQB0_22/DQB_22 WCKB1#_0/DQMB_5
E24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 E10 DQMA6 89 T1 AK6 DQMB6 91
MDA24 MDB24 DQB0_23/DQB_23 WCKB1_1/DQMB_6
C22 D9 DQMA7 89 U4 AK5 DQMB7 91
MDA25 DQA0_24/DQA_24 WCKA1#_1/DQMA_7 MDB25 DQB0_24/DQB_24 WCKB1#_1/DQMB_7
A22 DQA0_25/DQA_25 V6
MDA26 GDDR5/DDR2/GDDR3 MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3
F22 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 C34 QSAP_0 88 V1 F6 QSBP_0 90
MDA27 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0
D21 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 D29 QSAP_1 88 V3 K3 QSBP_1 90
MDA28 MDB28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1
A20 D25 QSAP_2 88 Y6 P3 QSBP_2 90
MDA29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 MDB29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2
F20 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 E20 QSAP_3 88 Y1 V5 QSBP_3 90
MDA30 MDB30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3
D19 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 E16 QSAP_4 89 Y3 AB5 QSBP_4 91
MDA31 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4
89 MDA[32..63] E18 E12 QSAP_5 89 91 MDB[32..63] Y5 AH1 QSBP_5 91
MDA32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 MDB32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5
C18 J10 QSAP_6 89 AA4 AJ9 QSBP_6 91
MDA33 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 MDB33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6
A18 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 D7 QSAP_7 89 AB6 AM5 QSBP_7 91
MDA34 MDB34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 DQA1_2/DQA_34 AB1
MDA35 MDB35 DQB1_2/DQB_34
D17 A34 QSAN_0 88 AB3 G7 QSBN_0 90
MDA36 DQA1_3/DQA_35 DDBIA0_0/QSA_0#/WDQSA_0 MDB36 DQB1_3/DQB_35 DDBIB0_0/QSB_0#/WDQSB_0
A16 DQA1_4/DQA_36 DDBIA0_1/QSA_1#/WDQSA_1 E30 QSAN_1 88 AD6 K1 QSBN_1 90
MDA37 MDB37 DQB1_4/DQB_36 DDBIB0_1/QSB_1#/WDQSB_1
F16 DQA1_5/DQA_37 DDBIA0_2/QSA_2#/WDQSA_2 E26 QSAN_2 88 AD1 P1 QSBN_2 90
MDA38 MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2#/WDQSB_2
D15 DQA1_6/DQA_38 DDBIA0_3/QSA_3#/WDQSA_3 C20 QSAN_3 88 AD3 W4 QSBN_3 90
MDA39 MDB39 DQB1_6/DQB_38 DDBIB0_3/QSB_3#/WDQSB_3
E14 C16 QSAN_4 89 AD5 AC4 QSBN_4 91
MDA40 DQA1_7/DQA_39 DDBIA1_0/QSA_4#/WDQSA_4 MDB40 DQB1_7/DQB_39 DDBIB1_0/QSB_4#/WDQSB_4
F14 DQA1_8/DQA_40 DDBIA1_1/QSA_5#/WDQSA_5 C12 QSAN_5 89 AF1 AH3 QSBN_5 91
MDA41 MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5#/WDQSB_5
D13 J11 QSAN_6 89 AF3 AJ8 QSBN_6 91
MDA42 DQA1_9/DQA_41 DDBIA1_2/QSA_6#/WDQSA_6 MDB42 DQB1_9/DQB_41 DDBIB1_2/QSB_6#/WDQSB_6
F12 DQA1_10/DQA_42 DDBIA1_3/QSA_7#/WDQSA_7 F8 QSAN_7 89 AF6 AM3 QSBN_7 91
MDA43 MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7#/WDQSB_7
A12 AG4
MDA44 DQA1_11/DQA_43 MDB44 DQB1_11/DQB_43
D11 DQA1_12/DQA_44 ADBIA0/ODTA0 J21 ODTA0 88 AH5 T7
MDA45 MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB0 90
F10 G19 ODTA1 89 AH6 W7
MDA46 DQA1_13/DQA_45 ADBIA1/ODTA1 MDB46 DQB1_13/DQB_45 ADBIB1/ODTB1 ODTB1 91
A10 DQA1_14/DQA_46 AJ4
MDA47 MDB47 DQB1_14/DQB_46
C10 H27 CLKA0 88 AK3 L9
MDA48 DQA1_15/DQA_47 CLKA0 MDB48 DQB1_15/DQB_47 CLKB0 CLKB0 90
C G13 DQA1_16/DQA_48 CLKA0# G27 CLKA0# 88 AF8 L8 C
MDA49 MDB49 DQB1_16/DQB_48 CLKB0# CLKB0# 90
H13 AF9
MDA50 DQA1_17/DQA_49 MDB50 DQB1_17/DQB_49
J13 DQA1_18/DQA_50 CLKA1 J14 AG8 AD8
MDA51 CLKA1 89 MDB51 DQB1_18/DQB_50 CLKB1 CLKB1 91
H11 H14 AG7 AD7
MDA52 DQA1_19/DQA_51 CLKA1# CLKA1# 89 MDB52 DQB1_19/DQB_51 CLKB1# CLKB1# 91
G10 DQA1_20/DQA_52 AK9
MDA53 MDB53 DQB1_20/DQB_52
G8 K23 AL7 T10
MDA54 DQA1_21/DQA_53 RASA0# RASA0# 88 MDB54 DQB1_21/DQB_53 RASB0# RASB0# 90
K9 DQA1_22/DQA_54 RASA1# K19 AM8 Y10
MDA55 RASA1# 89 MDB55 DQB1_22/DQB_54 RASB1# RASB1# 91
K10 DQA1_23/DQA_55 AM7
MDA56 MDB56 DQB1_23/DQB_55
G9 DQA1_24/DQA_56 CASA0# K20 CASA0# 88 AK1 W10
MDA57 MDB57 DQB1_24/DQB_56 CASB0# CASB0# 90
A8 DQA1_25/DQA_57 CASA1# K17 CASA1# 89 AL4 AA10
MDA58 MDB58 DQB1_25/DQB_57 CASB1# CASB1# 91
C8 AM6
MDA59 DQA1_26/DQA_58 MDB59 DQB1_26/DQB_58
E8 DQA1_27/DQA_59 CSA0#_0 K24 CSA0#_0 88 AM1 P10 CSB0#_0 90
MDA60 MDB60 DQB1_27/DQB_59 CSB0#_0
A6 DQA1_28/DQA_60 CSA0#_1 K27 AN4 L10
MDA61 MDB61 DQB1_28/DQB_60 CSB0#_1
C6 DQA1_29/DQA_61 AP3
MDA62 MDB62 DQB1_29/DQB_61
E6 M13 CSA1#_0 89 AP1 AD10 CSB1#_0 91
MDA63 DQA1_30/DQA_62 CSA1#_0 MDB63 DQB1_30/DQB_62 CSB1#_0
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1#_1 DQB1_31/DQB_63 CSB1#_1
MVREFDA L18 K21 U10
MVREFDA CKEA0 CKEA0 88 CKEB0 CKEB0 90
MVREFSA L20 J20 MVREFDB Y12 AA11
MVREFSA CKEA1 CKEA1 89 MVREFDB CKEB1 CKEB1 91 1D5V_VGA_S0
MVREFSB AA12
MEM_CALRN0 MVREFSB
L27 MEM_CALRN0 WEA0# K26 N10
MEM_CALRN1 N12 WEA0# 88 WEB0# WEB0# 90
L15 AB11
MEM_CALRN1 WEA1# WEA1# 89 WEB1# WEB1# 91

1
MEM_CALRN2 AG12
MEM_CALRN2 R8401
MEM_CALRP1 M12 H23 AD28 T8 DY 2K2R2J-2-GP
MEM_CALRP1 MAA0_8 MAA13 88,89 83 TESTEN TESTEN MAB0_8 MAB13 90,91
MEM_CALRP0 M27 J19 W8
MEM_CALRP0 MAA1_8 MAB1_8
MEM_CALRP2 AH12 0607-SA CLKTESTA AK10 R8402
GDDR5

GDDR5

2
1D5V_VGA_S0 MEM_CALRP2 CLKTESTB CLKTESTA DRAM_RST DRAM_RST_R
AL10
CLKTESTB DRAM_RST#
AH11 1 R8420 2 1 51R2J-2-GP
2 MEM_RST 88,89,90,91
10R2J-2-GP DIS_PX
R8403 DIS_PX

1
2

2
1 243R2F-2-GP
2 MEM_CALRN0 C8401 if for Mannhatton,have to
Madison_Whistler RN8401 R8404 DIS_PX SC120P50V2JN-1GP
SRN4K7J-8-GP 5K1R2F-2-GP
change to other value

1
1 R8405 2 MEM_CALRN1 DY MADISON-PRO-2-GP DIS_PX
243R2F-2-GP MADISON-PRO-2-GP
DIS_PX

1
DIS_PX
1
R8406
2 MEM_CALRN2 DIS_PX 4
3
243R2F-2-GP
B Madison_Whistler ** This basic topology should be used for DRAM_RST for B

DDR3/GDDR3/GDDR5.These Capacitors and Resistor values


are an example only. The Series R and || Cap values
R8407 PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC will depend on the DRAM load and will have to be
1 243R2F-2-GP
2 MEM_CALRP1 calculated for different Memory ,DRAM Load and board
DIS_PX 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 to pass Reset Signal Spec.
1 R8408 2 MEM_CALRP0
243R2F-2-GP
1

Madison_Whistler
MEM_CALRP2 R8410 R8411 R8412 R8413
Vancouver
1 2 Ra Ra 40D2R2F-GP 40D2R2F-GP
R8409 40D2R2F-GP 40D2R2F-GP Ra Ra
243R2F-2-GP Madison_Whistler Madison_Whistler DIS_PX DIS_PX
Madison_Whistler
2

MVREFDA MVREFSA MVREFDB MVREFSB


1

1
1

1
1

1
1

Rb R8414 C8402 Rb R8415 C8403 Rb R8416 C8404 Rb R8417 C8405


100R2F-L1-GP-U SCD1U10V2KX-5GP 100R2F-L1-GP-U SCD1U10V2KX-5GP 100R2F-L1-GP-U SCD1U10V2KX-5GP 100R2F-L1-GP-U SCD1U10V2KX-5GP
Madison_Whistler Madison_Whistler Madison_Whistler Madison_Whistler DIS_PX DIS_PX DIS_PX DIS_PX
2

2
2
2

2
2

DDR3/GDDR3 Memory Stuff Option(Mad/Park) Mannhatton

GDDR5 GDDR3 DDR3

MVDDQ 1.5V 1.8V/1.5V 1.5V

Ra 40.2R 40.2R 40.2R


A A

Rb 100R 100R 100R

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_Memory(2/5)
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 84 of 102

5 4 3 2 1
5 4 3 2 1

DVPDATA [3:2:1:0] for VRAM type


selection H/W strap 1D8V_VGA_S0 AVGA1B 2 OF 8
Should provide VRAM Table for VBios
request LVDS Interface RN8503
AU24 HDMI_CLK 51
TXCAP_DPA3P
Address DVPDATA[3:0] Vender PN Speed
!!
AV23 HDMI_CLK# 51 1 4
TXCAM_DPA3N
2 3

2
0 0 0 0 0 Hynix H5TQ1G63DFR-11C 1Gb(64Mx16) 900Mhz Rev D Die NEW TX0P_DPA2P
AT25 HDMI_DATA0 51
AVGA1G 7 OF 8
R8521 R8520 R8519 R8518 MUTI GFX AR24 SRN10KJ-5-GP
TX0M_DPA2N HDMI_DATA0# 51

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
1 0 0 0 1 Hynix H5TQ2G63BFR-11C 2Gb(128Mx16) 900Mhz Rev B Die DPA DIS_LVDS

10KR2J-3-GP

1G_S,2G_S,2G_A

2G_H,2G_S
AU26 HDMI_DATA1 51
TX1P_DPA1P
2 0 0 1 0 Reserve LVDS CONTROL

!!
AV25 HDMI_DATA1# 51 AK27 VGA_LBKLT_CTL 94

1
TX1M_DPA1N VARY_BL
AJ27 VGA_LCDVDD_EN 94

1G_S,2G_A
DIGON
3 0 0 1 1 Hynix H5TQ1G63DFR-12C 1Gb(64Mx16) 800Mhz Rev D Die NEW AR8 AT27 HDMI_DATA2 51
DVPCNTL_MVP_0 TX2P_DPA0P
AU8 AR26 HDMI_DATA2# 51
DVPCNTL_MVP_1 TX2M_DPA0N
4 0 1 0 0 Hynix H5TQ1G63BFR-12C 1Gb(64Mx16) 800Mhz Rev B Die AP8
DVPCNTL_0

2G_A
AW8 AR30
DVPCNTL_1 TXCBP_DPB3P
D 5 0 1 0 1 Reserve AR3
DVPCNTL_2 TXCBM_DPB3N
AT29
TXCLK_UP_DPF3P
AK35 D
AR1 AL36
DVPCLK TXCLK_UN_DPF3N
6 0 1 1 0 Reserve MEM_ID0 AU1
DVPDATA_0 TX3P_DPB2P
AV31
MEM_ID1 AU3 AU30 AJ38
DVPDATA_1 TX3M_DPB2N TXOUT_U0P_DPF2P
7 0 1 1 1 Hynix H5TQ2G63BFR-11C 2Gb(128Mx16) 800Mhz Rev B Die MEM_ID2 AW3
DVPDATA_2
DPB
TXOUT_U0N_DPF2N
AK37
MEM_ID3 AP6 AR32
DVPDATA_3 TX4P_DPB1P
AW5 AT31 AH35
DVPDATA_4 TX4M_DPB1N TXOUT_U1P_DPF1P
8 1 0 0 0 Samsung K4W1G1646E-HC12 1Gb(64Mx16) 800Mhz Rev E Die
!!
AU5 AJ36
DVPDATA_5 TXOUT_U1N_DPF1N
AR6 AT33

2
2
DVPDATA_6 TX5P_DPB0P
9 1 0 0 1 Samsung K4W2G1646C-HC11 2Gb(128Mx16) 900Mhz Rev C Die NEW AW6 AU32 AG38

1G_H,2G_H,1G_S,2G_S
R8523 R8522 R8530 R8531 DVPDATA_7 TX5M_DPB0N TXOUT_U2P_DPF0P
AU6 AH37

1G_H,2G_H,2G_S
DVPDATA_8 TXOUT_U2N_DPF0N

10KR2J-3-GP

10KR2J-3-GP
10 1 0 1 0 Reserve 10KR2J-3-GP 10KR2J-3-GP AT7 AU14

1G_H,1G_S,2G_A
DVPDATA_9 TXCCP_DPC3P
AV7 AV13 AF35

1G_H,2G_H
DVPDATA_10 TXCCM_DPC3N TXOUT_U3P
11 1 0 1 1 Samsung K4W2G1646B-HC12 2Gb(128Mx16) 800Mhz Rev B Die
!!
AN7 AG36

1
1
DVPDATA_11 TXOUT_U3N
AV9 AT15
DVPDATA_12 TX0P_DPC2P
12 1 1 0 0 Samsung K4W1G1646G-BC11 1Gb(64Mx16) 900Mhz Rev G Die NEW AT9
DVPDATA_13 TX0M_DPC2N
AR14
AR10 LVTMDP
DVPDATA_14
13 1 1 0 1 Reserve DPC

!!
AW10 AU16
DVPDATA_15 TX1P_DPC1P
AU10 AV15 AP34 GPU_LVDSA_TXC 94
DVPDATA_16 TX1M_DPC1N TXCLK_LP_DPE3P
14 1 1 1 0 ATI 23EY4187MA11 2GB(128M*16) 900Mhz NEW
!!
AP10 AR34 GPU_LVDSA_TXC# 94
DVPDATA_17 TXCLK_LN_DPE3N
AV11 AT17 VGA_DP_TXP0_CPU 94
DVPDATA_18 TX2P_DPC0P
15 1 1 1 1 Samsung K4W1G1646G-BC12 1Gb(64Mx16) 800Mhz Rev G Die NEW AT11 AR16 VGA_DP_TXN0_CPU 94 AW37 GPU_LVDSA_TX0 94
DVPDATA_19 TX2M_DPC0N TXOUT_L0P_DPE2P
AR12 AU35 GPU_LVDSA_TX0# 94
DVPDATA_20 TXOUT_L0N_DPE2N
AW12 AU20
DVPDATA_21 TXCDP_DPD3P
Apollo use Hynix D die 1GB 900MHz AU12 DVPDATA_22 TXCDM_DPD3N
AT19
TXOUT_L1P_DPE1P
AR37 GPU_LVDSA_TX1 94
AP12 AU39 GPU_LVDSA_TX1# 94
DVPDATA_23 TXOUT_L1N_DPE1N
AT21
TX3P_DPD2P
AR20 AP35 GPU_LVDSA_TX2 94
TX3M_DPD2N TXOUT_L2P_DPE0P
AR35 GPU_LVDSA_TX2# 94
DPD TXOUT_L2N_DPE0N
AU22
TX4P_DPD1P
AV21 AN36
TX4M_DPD1N TXOUT_L3P
AP37
I2C TXOUT_L3N
TX5P_DPD0P
AT23 DIS_PX
AR22
TX5M_DPD0N
94 GPU_LVDS_CLK AK26
I2C Bus for LVDS AJ26
SCL
94 GPU_LVDS_DATA SDA MADISON-PRO-2-GP
3D3V_VGA_S0 VGA_CRT_RED
Straps GENERAL PURPOSE I/O R
AD39
AD37
VGA_CRT_RED 94
R#
83 TX_PWRS_ENB AH20
GPIO_0 VGA_CRT_GREEN 1D8V_VGA_S0
83 TX_DEEMPH_EN AH18 AE36 VGA_CRT_GREEN 94
GPIO_1 G
C
83 BIF_GEN2_EN_A AN16
GPIO_2 G#
AD35 DIS_PX_Different AVDD C
GPIO_VGA_03_DATA AH23 L8502 (1.8V@65mA AVDD)
4
3

GPIO_VGA_04_CLK GPIO_3_SMBDATA VGA_CRT_BLUE


AJ23 AF37 VGA_CRT_BLUE 94 1 2
GPIO_4_SMBCLK B
RN8505
83 GPIO5_AC_BATT AH17 AE38 +3.3V tolerant BLM15BD121SS1D-GP

1
SRN4K7J-8-GP GPIO_5_AC_BATT DAC1 B# RN8504 C8501 C8503 C8504
AJ17
GPIO_6 68.00084.F81
DIS_PX AK17 AC36 VGA_CRT_RED 1 8 2nd = 68.00217.701 SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
94 VGA_BLEN GPIO_7_BLON HSYNC VGA_CRT_HSYNC 83,94
AJ13 AC38 VGA_CRT_GREEN 2 7 DY DIS DIS

2
83 GPIO8_ROMSO VGA_CRT_VSYNC 83,94

2
GPIO_8_ROMSO VSYNC VGA_CRT_BLUE
AH15 3 6
1
2

83 VGA_DIS GPIO_9_ROMSI
Q8503 AJ16 DIS_PX 4 5
GPIO_VGA_04_CLK GPIO_10_ROMSCK GPU_RSET AVSSQ
1 6 SML1_CLK 6,9,27 83 CONFIG0 AK16 AB34 1 2
GPIO_11 RSET R8514 SRN150F-1-GP
DIS_PX 83 CONFIG1 AL16
GPIO_12
2 5 AM16 AD34 AVDD 499R2F-2-GP DIS DIS_PX_Different VDD1DI
83 CONFIG2 GPIO_13 AVDD
1 VPIO14_VGA AM14 AE34 L8503 (1.8V@100mA VDD1DI)
TP8506 GPIO_14_HPD2 AVSSQ
3 4 92 PWRCNTL_0 AM13 1 2
GPIO16_SSIN GPIO_15_PWRCNTL_0 BLM15BD121SS1D-GP
TP8502 1 AK14 AC33 VDD1DI
VDD1DI

1
2N7002KDW-GP GPIO17_VGA GPIO_16_SSIN C8502 C8506 C8507
AG30
GPIO_17_THERMAL_INT VSS1DI
AC34 68.00084.F81
84.2N702.A3F EDP_HPD_DET AN14 AVSSQ 2nd = 68.00217.701 SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SML1_DATA 6,9,27 6 EDP_HPD_DET GPIO_18_HPD3
2nd = 84.DM601.03F THERMTRIP_VGA AM17 DY DIS DIS

2
GPIO_VGA_03_DATA GPIO_19_CTF
92 PWRCNTL_1 AL13 AC30
GPIO_20_PWRCNTL_1 R2
83 GPIO21_BB_EN AJ14 AC31
GPIO_21_BB_EN R2#
83 BIOS_ROM_EN AK13 1 R8506 2
GPIO_22_ROMCS#
0719 -SA 18 PEG_CLKREQ# AN13
GPIO_23_CLKREQ# G2
AD30 0R0402-PAD
83 JTAG_TRST#_VGA AM23 AD31
JTAG_TDI_VGA JTAG_TRST# G2# VDD2DI
TP8501 1 AN23
3D3V_VGA_S0 JTAG_TDI AVSSQ R8507
83 JTAG_TCK_VGA AK23
JTAG_TCK B2
AF30 (1.8V@50mA VDD2DI)
83 JTAG_TMS_VGA AL24 AF31 1 0R2J-2-GP
2
JTAG_TMS B2#
AM24 DIS_PX_Park_Madison

1
DY JTAG_TDO C8509
AJ19 DY
2

XTALOUT GENERICA
1 R8502 2 AK19 AC32 C8508 SC1U6D3V2KX-GP
R8532 0R2J-2-GP GENERICB C SCD1U10V2KX-5GP
AJ20 AD32 DY

2
DIS_PX 10KR2J-3-GP GENERICC Y
For new version no 27M AK20
AJ24
GENERICD COMP
AF32
GENERICE_HPD4 DAC2
AH26
1

GPIO17_VGA GENERICF
AH24 AD29 HSYNC_DAC2 83
GENERICG H2SYNC
AC29 VSYNC_DAC2 83
V2SYNC
DIS_Park_Madison A2VDDQ
1D8V_VGA_S0 AK24 L8505 (1.8V@1.5mA A2VDDQ)
51 HDMI_HPD_DET HPD1
AG31 VDD2DI 1 2
VDD2DI BLM15BD121SS1D-GP
AG32

1
1

1
VSS2DI
68.00084.F81 DY C8511
PLACE VREFG DIVIDER AND CAP DIS_PXR8515 2nd = 68.00217.701 C8510 SC1U6D3V2KX-GP
B 499R2F-2-GP SCD1U10V2KX-5GP B
CLOSE TO ASIC AG33 A2VDD DY

2
A2VDD
1D8V_VGA_S0 DPLL_PVDD AD33 A2VDDQ
2

GPU_VREFG A2VDDQ
DIS_PX (1.8V@75mA DPLL_PVDD) AH13
VREFG
L8501 AF33
1

C8514 A2VSSQ
1 2
1

PBY160808T-471Y-N-GP R8516 SCD1U10V2KX-5GP DIS_PX_Park_Madison 3D3V_VGA_S0 A2VDD


68.00206.261 249R2F-GP DIS_PX AA29 R2SET 1 R8517 2 R8509 (3.3V@130mA A2VDD)
1

R2SET 715R2F-GP
C8515 DIS_PX DIS_PX AM32 1 0R2J-2-GP
2
2

SC1U6D3V2KX-GP C8516 DPLL_PVDD


AN32 DDC1/DDC2/DDC6 have 5V-tolerant DIS_PX_Park_Madison
2

1
SCD1U10V2KX-5GP DPLL_PVSS C8513
DIS_PX
2

Bead:470-ohm 1.5A DDC/AUX AM26 C8512 DY SCD1U10V2KX-5GP


DDC1CLK VGA_CRT_DDCCLK 94
AN31 AN26 VGA_CRT_DDCDATA 94 DDC1 channel for CRT SC1U6D3V2KX-GP DY

2
DPLL_VDDC DDC1DATA
AM27
XTALIN PLL/CLOCK AUX1P
1V_VGA_S0 DIS_PX (1.0V@125mA DPLL_VDDC) DPLL_VDDC AV33
XTALIN AUX1N
AL27
L8506 (1.1V@150mA DPLL_VDDC For M96/M92) XTALOUT AU34
XTALOUT
1 2 AM19 GPU_HDMI_CLK 51
DDC2CLK
PBY160808T-471Y-N-GP
DDC2DATA
AL19 GPU_HDMI_DATA 51 DDC2 channel for HDMI
68.00206.261 1 XO_IN AW34
TP8516
1

1
1

C8517 C8519 XO_IN


DIS_PXC8518 AUX2P
AN20
SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP AW35 AM20
SC1U6D3V2KX-GP

XO_IN2 AUX2N
1022-SA DY DIS_PX
2

2
2

Use same parts for VGA DPPower AL30 VGA_DP_AUXP_CPU 94


DDCCLK_AUX3P
AM30 VGA_DP_AUXN_CPU 94
DDCDATA_AUX3N
AL29 AUXP PD 100K

THERMTRIP_R
P2800_VGA_DXP AF29 DDCCLK_AUX4P
Clock Input Configuraiton -GDDR3/DDR3 TP8517 1
DPLUS DDCDATA_AUX4N
AM29 AUXN PU 100K
1022-SA Delete 1 P2800_VGA_DXN AG29 THERMAL THERMTRIP_VGA
a) 27MHz crystal connected to XTALIN or XTALOUT or TP8518 DMINUS
AN21 Draw on EDP circuit page

1
DDCCLK_AUX5P
b) 27MHz (1.8V) oscillator connected to XTALIN or DDCDATA_AUX5N
AM21
AK32 R8508
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only) TS_FDO
DDC6CLK
AJ30 DY 10KR2J-3-GP
AL31 AJ31
1D8V_VGA_S0 TSVDD TS_A DDC6DATA

2
6

4
L8504 (1.8V@20mA TSVDD) DDCCLK_AUX7P
AK30
R8524 1 2 AJ32 AK29 Q8502
BLM15BD121SS1D-GP TSVDD DDCDATA_AUX7N 2N7002KDW-GP
1 1MR2J-1-GP
2 AJ33 DY
TSVSS
DIS_PX 68.00084.F81 84.2N702.A3F
1

2nd = 68.00217.701 C8521 2nd = 84.DM601.03F

3
C8524 X8501 DIS_PX SC1U6D3V2KX-GP MADISON-PRO-2-GP DIS_PX
A SC12P50V2JN-3GP A
DIS_PX
2

2 1 XTALIN 1 4

Q5801_2
DIS_PX DIS_PX C8525
6,18,36 H_THERMTRIP#
SC15P50V2JN-2-GP

Dr-Bios.com
2 3 XTALOUT 1 2 2 R8510 1
83 VGA_RST# <Variant Name>
DIS_PX 0R2J-2-GP

1
DY C8526
XTAL-27MHZ-85-GP SCD1U10V2KX-4GP
82.30034.641 DY Wistron Corporation
2nd = 82.30034.651 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3rd = 82.30034.681 Taipei Hsien 221, Taiwan, R.O.C.

1022-SA Title
TM Derek Hsieh suggestion
GPU_DP/LVDS/CRT/GPIO(3/5)
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 85 of 102
5 4 3 2 1
5 4 3 2 1

AVGA1E
10/8 5 OF 8
1D8V_VGA_S0
1D5V_VGA_S0 For DDR3/GDDR5, MVDDQ = 1.5V MEM I/O
PCIE (1.8V@504mA PCIE_VDDR)
DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX DIS_PX AC7 AA31 DY
VDDR1 PCIE_VDDR
AD11 AA32

1
C8601 C8604 C8605 C8606 C8607 C8608 C8611 C8612 C8613 C8614 VDDR1 PCIE_VDDR C8617 C8616 C8618
AF7 AA33
DY VDDR1 PCIE_VDDR

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
AG10 AA34

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR1 PCIE_VDDR
AJ7 V28 DIS_PX DIS_PX

2
VDDR1 PCIE_VDDR
AK8 W29
VDDR1 PCIE_VDDR
AL9 W30
VDDR1 PCIE_VDDR
DIS_PX DIS_PX DIS_PX G11
VDDR1 PCIE_VDDR
Y31
G14 (1.0V@1920mA PCIE_VDDC) 1V_VGA_S0
VDDR1
G17
VDDR1
G20
VDDR1 PCIE_VDDC
G30 DIS_PX DIS_PX DY DIS_PX
G23 G31 DIS_PX

1
1

1
VDDR1 PCIE_VDDC C8628 C8630 C8631 C8632
D G26
VDDR1 PCIE_VDDC
H29 DY DY C8633 C8602 C8634 D

1
1

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C8603 C8621 C8698

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
G29 H30
VDDR1 PCIE_VDDC

SCD1U10V2KX-5GP
SC1U6D3V2KX-GP H10 J29

SC1U6D3V2KX-GP

2
2

2
VDDR1 PCIE_VDDC
DIS_PX DIS_PX J7 J30

2
2

2
VDDR1 PCIE_VDDC
J9 L28
VDDR1 PCIE_VDDC
K11 M28
VDDR1 PCIE_VDDC
DIS_PX K13
VDDR1 PCIE_VDDC
N28
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC
L16 U28
VDDR1 PCIE_VDDC VGA_CORE
L21
VDDR1
L23
VDDR1 DY DIS_PX DY DIS_PX DIS_PX DY DIS_PX DY
L26
VDDR1 VDDC
AA15 DY
L7 CORE AA17

1
1

1
VDDR1 VDDC C8664S C8637 C8638 C8639 C8640 C8641 C8642 C8643 C8644
M11 AA20
VDDR1 VDDC

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
N11 AA22 SC1U6D3V2KX-GP

C1U6D3V2KX-GP
VDDR1 VDDC
P7 AA24

2
2

2
VDDR1 VDDC
R11 AA27
VDDR1 VDDC
U11 AB16
VDDR1 VDDC
U7 AB18
VDDR1 VDDC
Y11 AB21
VDDR1 VDDC
Y7
VDDR1 VDDC
AB23 DY DY
AB26
VDDC
AB28

1
1

1
1D8V_VGA_S0 VDDC C8645 C8646 C8649 C8669 C8670 C8671 C8672
AC17
VDDC SC4D7U6D3V3KX-GP
AC20 DIS_PX DIS_PX DIS_PX DIS_PX

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
DIS_PX VDDC

SC1U6D3V2KX-GP
VDDC_CT LEVEL AC22 DIS_PX

2
2

2
TRANSLATION VDDC
L8601 (1.8V@110mA VDD_CT) DIS_PX VDDC
AC24

POWER
1 2 DIS_PX AF26
VDD_CT VDDC
AC27
BLM15BD121SS1D-GP AF27 AD18

1
VDD_CT VDDC
68.00084.F81 C8650 DY
C8651 C8652 C8653 C8654 AG26
VDD_CT VDDC
AD21
DY

SCD1U10V2KX-5GP
2ND = 68.00217.701 DY AG27 AD23

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP VDD_CT VDDC
AD26

2
VDDC
AF17
I/O VDDC
AF20
3D3V_VGA_S0 VDDC
AF23 AF22
VDDR3 VDDC
DY AF24
VDDR3 VDDC
AG16
DIS_PX DY AG23
VDDR3 VDDC
AG18
AG24 AG21 110217 SB Add for DIS only
1

1
1

C8665 C8666 C8667 VDDR3 VDDC


AH22
VDDC
AH27

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP

VDDC BIF_VDDC VGA_CORE


C AF13 AH28 C
2

2
2

VDDR4 VDDC
AF15
VDDR4 VDDC
M26 DIS
R8608
AG13
AG15
VDDR4 VDDC
N24
N27
55mA in BACO mode 1 0R3J-0-U-GP
2
VDDR4 VDDC/BIF_VDDC
R18
VDDC
R21
VDDC
AD12 R23
VDDR4 VDDC

1
1

1
AF11 R26 C8693 C8697 C8696
VDDR4 VDDC SC22U10V0KX-1ML-GP
AF12 T17

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
VDDR4 VDDC
AG11 T20 DY DY

2
2

2
VDDR4 VDDC
VDDC
T22 DIS_PX
T24
VDDC
1

C8673 C8674
VDDC/BIF_VDDC
T27 110217 SB BOM change
DY SC1U6D3V2KX-GP SCD1U10V2KX-5GP U16
VDDC
DY 1VDDRHA M20 U18
2

TP8604
2

NC_VDDRHA VDDC
TP8605 1VSSRHA M21 U21
NC_VSSRHA VDDC
U23
VDDC
U26
VDDC
1VDDRHA V12 V17
TP8606
TP8607 1VSSRHB U12
NC_VDDRHB
NC_VSSRHB
VDDC
VDDC
V20
V22
VDDCI and VDDC should have seperate regulators with a merge option on PCB
VDDC
V24
VDDC
VDDC
V27 For Madison and Park, VDDCI and VDDC can share one common regulator
DIS_PX PCIE_PVDD
VDDC
Y16
L8602 (1.8V@40mA PCIE_PVDD) PLL Y18
VDDC
1 2 AB37 Y21
PCIE_PVDD VDDC
BLM15BD121SS1D-GP DIS_PX MPV18
VDDC
Y23
1

1
1

68.00084.F81 C8675 C8676 C8677 SPV10 H7


MPV18 VDDC
Y26 have to use
2ND = 68.00217.701 SCD1U10V2KX-5GP H8 Y28 Vgs(th):0.7~1.5 V
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

MPV18 VDDC
DY DY SPV18 low Rds(on)
2

2
2

VGA_CORE PX PX
1V_VGA_S0 DIS_PX AM10
SPV18 DIS_PX DIS_PX DY DY DIS_PX DY BIF_VDDC
U8603 U8605
VGA_CORE
L8603 (120mA SPV10) AA13 AO3400A-GP AO3400A-GP
VDDCI
1 2 DIS_PX AN9
SPV10 VDDCI
AB13
BLM15BD121SS1D-GP AC12 S D BIF_VDDC_CORE D S
1

VDDCI

1
1

1
1

1
1

1
SCD1U10V2KX-5GP
68.00084.F81 C8678 C8679 C8680 AN10 AC15 C8681 C8683 C8684 C8685 C8686 C8687
SPVSS VDDCI

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

2ND = 68.00217.701 AD13 SC1U6D3V2KX-GP SC4D7U6D3V3KX-GP 84.03400.B37 84.03400.B37


SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP

VDDCI
AD16
2

G
2

2
2

2
2

G
VDDCI 3D3V_VGA_S0 5V_S0
(For M97, Broadway, Madison and Park SPV10 = 1.0V) DY DIS_PX VDDCI
M15
M16
VOLTAGE VDDCI
M18
B SENESE VDDCI B
M23
VDDCI

1
1
N13 VGA_CORE
VDDCI R8610 R8607
92 FB_VDDC AF28
FB_VDDC VDDCI
N15 DY DY DY
N17 DIS_PX DIS_PX DIS_PX 1KR2J-1-GP 1KR2J-1-GP
VDDCI
N20 DY PX

1
1

1
1

1
FB_VDDCI VDDCI C8657 C8658 C8659 C8660 C8661 C8662 C8663
1 AG28 N22

2
TP8602

2
FB_VDDCI VDDCI

SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
ISOLATED R12 SC1U6D3V2KX-GP PX_EN##
CORE I/O VDDCI
R13 DIS_PX

2
2

2
2

2
VDDCI
92 FB_GND AH29 R16
FB_GND VDDCI
T12
VDDCI
T15
VDDCI
V15
VDDCI
Y13
VDDCI
PX PX
U8602 U8604
MADISON-PRO-2-GP BIF_VDDC AO3418-GP AO3418-GP 1V_VGA_S0
DIS_PX S D BIF_VDDC_1V D S
DIS_PX SPV18 Vgs(th):1~1.8 V
L8604 (1.8V@75mA SPV18) 84.03418.031 84.03418.031
1 2

G
G
BLM15BD121SS1D-GP 3D3V_VGA_S0 5V_S0
1

68.00084.F81 C8688 C8689 C8690 PX_EN Mode BIF_VDDC 110218 SB change to short pad
2ND = 68.00217.701 SCD1U10V2KX-5GP 3D3V_VGA_S0
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

DY 0 Normal VGA_Core R8602


2

1
1
DY DIS_PX 1 2 DGPU_PWROK_C
17,92,93 DGPU_PWROK
1 BACO 1V_VGA 0R0603-PAD R8611 R8606

1
1KR2J-1-GP 1KR2J-1-GP
R8609 DY PX
1

C8695 10KR2J-3-GP

2
2
DY SCD1U10V2KX-5GP PX PX PX_EN#
D8601 Q8602

2
2

2 4 3

(M97, Broadway and Madison: 1.8V@150mA MPV18) PX 3 1D5V_VGA_PWOK_R 5 2 PX_EN#

(Park: 1.8V@75mA MPV18) 1 PX_EN## 6 1


92 8209A_EN/DEM_VGA
MPV18
L8605 DIS_PX BAW56-5-GP 2N7002KDW-GP
1 2 DY DIS_PX 83.00056.Q11 84.2N702.A3F
BLM15BD121SS1D-GP Q8601 2ND = 83.00056.G11 2nd = 84.DM601.03F
1
1
1

A C8691 C8692 C8694 A


68.00084.F81 87 PX_EN G 3RD = 83.00056.K11
2ND = 68.00217.701 SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP

DIS_PX D
2
2
2

PX
S

Dr-Bios.com
<Variant Name>
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ESD Proceted:2KV Taipei Hsien 221, Taiwan, R.O.C.
DGPU_PWROK 1 R8601 2 1D5V_VGA_PWOK_R
0R2J-2-GP Title
DY
GPU_POWER(4/5)
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 86 of 102
5 4 3 2 1
5 4 3 2 1

1D8V_VGA_S0 DPAB_VDD18
if use LVDS L8709 stuff 0-ohm 0603 ohm DP AB_VDD18 : 300 mA
DIS_PX_Different AVGA1H 8 OF 8
L8702 DPAB_VDD18
1 2
if use EDP L8709 stuff bead 0603 ohm DPCD_VDD18 DP C/D POWER DP A/B POWER
Bead:470-ohm 1.5A PBY160808T-471Y-N-GP DP ABVDD10 : 220 mA

1
68.00206.261 C8707 C8708 DP CD_VDD18 : 300 mA AP20
DPC_VDD18 DPA_VDD18
AN24 0729 -SA
C8706 DIS SCD1U10V2KX-5GP AP21 AP24 Bead:470-ohm 1.5A

SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP 1V_VGA_S0 DPC_VDD18 DPA_VDD18 1V_VGA_S0
DIS

2
AVGA1F 6 OF 8 DY DPCD_VDD10 DPAB_VDD10
L8709
DIS_PX_Different DY L8703 DIS_PX_Different
1 2 AP13 AP31 1 2
DPC_VDD10 DPA_VDD10
Bead:470-ohm 1.5A PBY160808T-471Y-N-GP AT13
DPC_VDD10 DPA_VDD10
AP32 PBY160808T-471Y-N-GP

1
AB39 A3 68.00206.261 C8731 C8702 C8703 68.00206.261
PCIE_VSS GND C8732 C8733 C8705
E39 A37 DIS_EDP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
PCIE_VSS GND SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP SC4D7U6D3V3KX-GP
F34 AA16 AN17 AN27

2
PCIE_VSS GND DPC_VSSR DPA_VSSR
F39
PCIE_VSS GND
AA18 DY AP16
DPC_VSSR DPA_VSSR
AP27 DY
D G33 AA2 AP17 AP28 D
PCIE_VSS GND DPC_VSSR DPA_VSSR
G34
PCIE_VSS GND
AA21 AW14
DPC_VSSR DPA_VSSR
AW24 DY DIS
H31 AA23 AW16 AW26
PCIE_VSS GND DPC_VSSR DPA_VSSR
H34 AA26
PCIE_VSS GND
H39
PCIE_VSS GND
AA28 0728 -SA DPAB_VDD18
J31 AA6 DPCD_VDD18
PCIE_VSS GND
J34
PCIE_VSS GND
AB12 DIS_PX_Different AP22
DPD_VDD18 DPB_VDD18
AP25
K31 AB15 L8711 DPCD_VDD18 AP23 AP26
PCIE_VSS GND DPD_VDD18 DPB_VDD18
K34 AB17 1 2
PCIE_VSS GND
K39 AB20 Bead:470-ohm 1.5A PBY160808T-471Y-N-GP DP CD_VDD10 : 220 mA

1
PCIE_VSS GND C8735 C8734
L31
PCIE_VSS GND
AB22 68.00206.261
L34 AB24 C8736 DIS_EDP SCD1U10V2KX-5GP AP14 AN33

SC1U6D3V2KX-GP
PCIE_VSS GND DPCD_VDD10 DPD_VDD10 DPB_VDD10
M34 AB27 SC4D7U6D3V3KX-GP DIS_EDP AP15 AP33 DPAB_VDD10

2
PCIE_VSS GND DPD_VDD10 DPB_VDD10
M39
PCIE_VSS GND
AC11 DY
N31
PCIE_VSS GND
AC13 0729 -SA
N34 AC16
PCIE_VSS GND
P31 AC18 AN19 AN29
PCIE_VSS GND DPD_VSSR DPB_VSSR
P34 AC2 AP18 AP29
PCIE_VSS GND DPD_VSSR DPB_VSSR
P39 AC21 AP19 AP30
PCIE_VSS GND DPD_VSSR DPB_VSSR
R34
PCIE_VSS GND
AC23 if use EDP L8701 stuff 0-ohm 0603 ohm AW20
DPD_VSSR DPB_VSSR
AW30
T31
PCIE_VSS GND
AC26 if use LVDS L8711 stuff 0-ohm 0603 ohm AW22
DPD_VSSR DPB_VSSR
AW32
T34
PCIE_VSS GND
AC28 if use LVDS L8701 stuff bead 0603 ohm DIS_PX
T39
U31
PCIE_VSS GND
AC6
AD15
if use EDP L8711 stuff bead 0603 ohm R8701 R8703
PCIE_VSS GND DPCD_CALR DPAB_CALR
U34 AD17 1 150R2F-1-GP
2 AW18 AW28 1 150R2F-1-GP
2
PCIE_VSS GND 1D8V_VGA_S0 DPCD_CALR DPAB_CALR
V34
PCIE_VSS GND
AD20 DIS_PX
V39 AD22 DPEF_VDD18
PCIE_VSS GND L8701 DIS_PX_Different
W31 AD24 DP E/F POWER DP PLL POWER
PCIE_VSS GND
W34
PCIE_VSS GND
AD27 1 2 AH34
DPE_VDD18 DPA_PVDD
AU28 75 mA DPAB_VDD18
Y34 AD9 Bead:470-ohm 1.5A PBY160808T-471Y-N-GP AJ34 AV27

2
PCIE_VSS GND C8717 C8718 DPE_VDD18 DPA_PVSS
Y39
PCIE_VSS GND
AE2 68.00206.261
AE6 C8701 DY SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
GND SC4D7U6D3V3KX-GP
AF10 DIS_LVDS

1
GND
GND
AF16 DY AL33
DPE_VDD10 DPB_PVDD
AV29 75 mA DPAB_VDD18
AF18 AM33 AR28
GND DPEF_VDD10 DPE_VDD10 DPB_PVSS
AF21

F15
GND
GND GND
GND
GND
AG17
AG2 1V_VGA_S0
F17
GND GND
AG20 L8708 DIS_PX_different AN34
DPE_VSSR DPC_PVDD
AU18 75 mA DPCD_VDD18
F19 AG22 1 2 AP39 AV17
GND GND DPE_VSSR DPC_PVSS
F21
GND GND
AG6 Bead:470-ohm 1.5A PBY160808T-471Y-N-GP AR39
DPE_VSSR

1
C F23
GND GND
AG9 68.00206.261 C8722 C8723 AU37
DPE_VSSR
C
F25 AH21 C8704 SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
GND GND
F27 AJ10 SC4D7U6D3V3KX-GP DIS_LVDS AV19 75 mA DPCD_VDD18

2
GND GND DPD_PVDD
F29
GND GND
AJ11 DY DPD_PVSS
AR18
F31 AJ2
GND GND
F33
GND GND
AJ28 if use EDP L8708 stuff 0-ohm 0603 ohm DY AF34
DPF_VDD18
F7 AJ6 DPEF_VDD18 AG34
GND GND DPF_VDD18
F9
GND GND
AK11 if use LVDS L8708 stuff bead 0603 ohm DPE_PVDD
AM37 75 mA DPEF_VDD18
G2
GND GND
AK31 DP EF_VDD18 : 440 mA DPE_PVSS
AN38
G6 AK7
GND GND
H9 AL11 AK33
GND GND DPF_VDD10
J2 AL14 DPEF_VDD10 AK34
GND GND DPF_VDD10
J27
GND GND
AL17
DPF_PVDD
AL38 75 mA DPEF_VDD18
J6
GND GND
AL2 DP EF_VDD18 : 240 mA DPF_PVSS
AM35
J8 AL20 R8708
GND GND PX_EN_R
K14 AL21 1 0R2J-2-GP
2 PX_EN 86 AF39
GND GND/PX_EN DPF_VSSR
K7
GND GND
AL23 PX AH39
DPF_VSSR
L11 AL26 AK39
1

GND GND DPF_VSSR


L17 AL32 AL34
GND GND R8709 DPF_VSSR
L2
GND GND
AL6 PX AM34
DPF_VSSR
L22 AL8 10KR2J-3-GP
GND GND
L24 AM11
GND GND R8705
L6 AM31
2

GND GND DPEF_CALR AM39


M17 AM9 2 150R2F-1-GP
1
GND GND DPEF_CALR
M22
GND GND
AN11 DIS_PX
M24 AN2
GND GND MADISON-PRO-2-GP
N16 AN30
GND GND
N18
GND GND
AN6 DIS_PX
N2 AN8
GND GND
N21 AP11
GND GND
N23 AP7
GND GND
N26 AP9
GND GND
N6 AR5
GND GND
R15 B11
GND GND
R17 B13
GND GND
R2 B15
GND GND
R20 B17
GND GND
R22 B19
GND GND
R24 B21
GND GND
R27 B23
GND GND
R6 B25
B GND GND B
T11 B27
GND GND
T13 B29
GND GND
T16 B31
GND GND
T18 B33
GND GND
T21 B7
GND GND
T23 B9
GND GND
T26 C1
GND GND
U15 C39
GND GND
U17 E35
GND GND
U2 E5
GND GND
U20
GND GND
F11 For M97/M96, DPF_VDD18 can be shared with DPE_VDD18
U22 F13
GND GND
U24
GND For M97/M96, DPF_VDD10 can be shared with DPE_VDD10
U27
GND
U6
GND
V11
GND
V16
GND For dual link DVI using DPA AND DPB, DPA_VDDxx and DPB_VDDxx can be shared respectively
V18
GND
V21
GND
V23
GND For dual link DVI using DPC AND DPD, DPC_VDDxx and DPD_VDDxx can be shared respectively
V26
GND
W2
GND
W6
GND For dual link LVDS, DPE_VDDxx and DPF_VDDxx can be shared respectively
Y15
GND
Y17
GND
Y20
GND VSS_MECH1
Y22 A39 1 TP8701
GND VSS_MECH VSS_MECH2
Y24 AW1 1 TP8702
GND VSS_MECH VSS_MECH3
Y27 AW39 1 TP8703
GND VSS_MECH
U13
GND
V13
GND
MADISON-PRO-2-GP
DIS_PX

A A

Dr-Bios.com
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DPPWR/GND(5/5)
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 87 of 102
5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM1 VRAM2
MDA[0..31] 84 MDA[0..31] 84
K8 E3 MDA26 K8 E3 MDA1
VDD DQL0 MDA30 VDD DQL0 MDA0
K2 VDD DQL1 F7 DY DY Madison_Whistler K2 VDD DQL1 F7
Madison_Whistler Madison_Whistler N1 F2 MDA25 N1 F2 MDA5
VDD DQL2 VDD DQL2
1

1
C8808 C8810 C8811 C8812 C8813 R9 F8 MDA29 C8814 C8816 C8817 C8818 C8819 R9 F8 MDA7
VDD DQL3 MDA24 VDD DQL3 MDA4
DY B2 H3 B2 H3
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDA27 VDD DQL4 MDA6
Madison_Whistler Madison_Whistler D9 H8 D9 H8
2

2
VDD DQL5 MDA31 VDD DQL5 MDA2
D G7 VDD DQL6 G2 Madison_Whistler Madison_Whistler G7 VDD DQL6 G2 D
R1 H7 MDA28 R1 H7 MDA3
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDA17 D7 MDA11
DQU0 MDA19 DQU0 MDA13
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDA20 A1 C8 MDA9
VDDQ DQU2 MDA18 VDDQ DQU2 MDA15
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2

1
C9 A7 MDA22 C9 A7 MDA8
C8801 VDDQ DQU4 MDA16 VDDQ DQU4 MDA14
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
SC10U6D3V5KX-1GP E9 B8 MDA21 E9 B8 MDA10

2
VDDQ DQU6 MDA23 VDDQ DQU6 MDA12
DY F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ 0719 -SA H9 VDDQ
H2 VDDQ DQSU C7 QSAP_2 84 H2 VDDQ DQSU C7 QSAP_1 84
DQSU# B7 QSAN_2 84 DQSU# B7 QSAN_1 84
VRAM1_2_VREF H1 VRAM1_2_VREF H1
0719 -SA VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSAP_3 84 M8 VREFCA DQSL F3 QSAP_0 84
1 2 VRAM_ZQ1 L8 ZQ DQSL# G3 QSAN_3 84 1 2VRAM_ZQ2 L8 ZQ DQSL# G3 QSAN_0 84
R8801 R8802
Madison_Whistler 243R2F-2-GP K1
Madison_Whistler 243R2F-2-GP K1
ODT ODTA0 84 ODT ODTA0 84
84,89 MAA0 N3 A0 84,89 MAA0 N3 A0
84,89 MAA1 P7 A1 84,89 MAA1 P7 A1
84,89 MAA2 P3 A2 CS# L2 CSA0#_0 84 84,89 MAA2 P3 A2 CS# L2 CSA0#_0 84
84,89 MAA3 N2 A3 RESET# T2 MEM_RST 84,89,90,91 84,89 MAA3 N2 A3 RESET# T2 MEM_RST 84,89,90,91
84,89 MAA4 P8 A4 84,89 MAA4 P8 A4
84,89 MAA5 P2 A5 84,89 MAA5 P2 A5
84,89 MAA6 R8 A6 NC#T7 T7 84,89 MAA6 R8 A6 NC#T7 T7
84,89 MAA7 R2 A7 NC#L9 L9 84,89 MAA7 R2 A7 NC#L9 L9
84,89 MAA8 T8 A8 NC#L1 L1 84,89 MAA8 T8 A8 NC#L1 L1
84,89 MAA9 R3 A9 NC#J9 J9 84,89 MAA9 R3 A9 NC#J9 J9
C L7 J1 L7 J1 C
84,89 MAA10 A10/AP NC#J1 84,89 MAA10 A10/AP NC#J1
84,89 MAA11 R7 A11 84,89 MAA11 R7 A11
84,89 MAA12 N7 A12/BC# 84,89 MAA12 N7 A12/BC#
84,89 MAA13 T3 A13 VSS J8 84,89 MAA13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,89 A_BA0 M2 BA0 VSS P9 84,89 A_BA0 M2 BA0 VSS P9
84,89 A_BA1 N8 BA1 VSS G8 84,89 A_BA1 N8 BA1 VSS G8
84,89 A_BA2 M3 BA2 VSS B3 84,89 A_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKA0 J7 CK VSS T9 84 CLKA0 J7 CK VSS T9
84 CLKA0# K7 CK# VSS E1 84 CLKA0# K7 CK# VSS E1
VSS P1 VSS P1
84 CKEA0 K9 CKE 84 CKEA0 K9 CKE
1
1

VSSQ G1 VSSQ G1
R8804 R8803 F9 F9
56R2F-1-GP VSSQ VSSQ
Madison_Whistler56R2F-1-GP 84 DQMA2 D3 DMU VSSQ E8 84 DQMA1 D3 DMU VSSQ E8
Madison_Whistler
84 DQMA3 E7 DML VSSQ E2 84 DQMA0 E7 DML VSSQ E2
D8 D8
2
2

VSSQ VSSQ
VSSQ D1 VSSQ D1
GPU_CLKA0_T L3 B9 L3 B9
84 W EA0# WE# VSSQ 84 W EA0# WE# VSSQ
84 CASA0# K3 CAS# VSSQ B1 84 CASA0# K3 CAS# VSSQ B1
84 RASA0# J3 RAS# VSSQ G9 84 RASA0# J3 RAS# VSSQ G9
1

C8802
SCD01U16V2KX-3GP
Madison_Whistler H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
2

B Madison_Whistler Madison_Whistler B

1D5V_VGA_S0
1

Madison_Whistler R8805
2K1R2F-GP
0719 -SA
2

VRAM1_2_VREF
1

C8803
Madison_Whistler R8806 SCD1U10V2KX-5GP
2K1R2F-GP Madison_Whistler
2
2

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM1,2 (1/4)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 88 of 102

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM3 VRAM4
MDA[32..63] 84 MDA[32..63] 84
K8 E3 MDA58 K8 E3 MDA37
VDD DQL0 MDA63 VDD DQL0 MDA32
K2 VDD DQL1 F7 K2 VDD DQL1 F7
Madison_Whistler DY DY N1 F2 MDA56 Madison_Whistler DY Madison_Whistler DY DY N1 F2 MDA36
VDD DQL2 VDD DQL2
1

1
C8908 C8910 C8911 C8912 C8913 R9 F8 MDA62 C8914 C8915 C8920 C8922 C8923 R9 F8 MDA33
VDD DQL3 MDA57 VDD DQL3 MDA39
B2 H3 B2 H3
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDA59 VDD DQL4 MDA35
D9 H8 D9 H8
2

2
VDD DQL5 MDA60 VDD DQL5 MDA38
Madison_Whistler Madison_Whistler G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDA61 R1 H7 MDA34
VDD DQL7 VDD DQL7
D N9 VDD N9 VDD D
D7 MDA46 D7 MDA50
DQU0 MDA43 DQU0 MDA55
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
DY A1 C8 MDA45 A1 C8 MDA49
VDDQ DQU2 MDA40 VDDQ DQU2 MDA52
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2

1
C8905 C9 A7 MDA44 C9 A7 MDA48
SC10U6D3V5KX-1GP VDDQ DQU4 MDA41 VDDQ DQU4 MDA53
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDA47 E9 B8 MDA51

2
VDDQ DQU6 MDA42 VDDQ DQU6 MDA54
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
0719 -SA H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSAP_5 84 H2 VDDQ DQSU C7 QSAP_6 84
DQSU# B7 QSAN_5 84 DQSU# B7 QSAN_6 84
VRAM3_4_VREF H1 VRAM3_4_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSAP_7 84 M8 VREFCA DQSL F3 QSAP_4 84
1 2VRAM_ZQ3 L8 ZQ DQSL# G3 QSAN_7 84 0719 -SA 1 2VRAM_ZQ4 L8 ZQ DQSL# G3 QSAN_4 84
R8903 R8904
Madison_Whistler 243R2F-2-GP K1
Madison_Whistler 243R2F-2-GP K1
ODT ODTA1 84 ODT ODTA1 84
84,88 MAA0 N3 A0 84,88 MAA0 N3 A0
84,88 MAA1 P7 A1 84,88 MAA1 P7 A1
84,88 MAA2 P3 A2 CS# L2 CSA1#_0 84 84,88 MAA2 P3 A2 CS# L2 CSA1#_0 84
84,88 MAA3 N2 A3 RESET# T2 MEM_RST 84,88,90,91 84,88 MAA3 N2 A3 RESET# T2 MEM_RST 84,88,90,91
84,88 MAA4 P8 A4 84,88 MAA4 P8 A4
84,88 MAA5 P2 A5 84,88 MAA5 P2 A5
84,88 MAA6 R8 A6 NC#T7 T7 84,88 MAA6 R8 A6 NC#T7 T7
84,88 MAA7 R2 A7 NC#L9 L9 84,88 MAA7 R2 A7 NC#L9 L9
84,88 MAA8 T8 A8 NC#L1 L1 84,88 MAA8 T8 A8 NC#L1 L1
84,88 MAA9 R3 A9 NC#J9 J9 84,88 MAA9 R3 A9 NC#J9 J9
84,88 MAA10 L7 A10/AP NC#J1 J1 84,88 MAA10 L7 A10/AP NC#J1 J1
84,88 MAA11 R7 A11 84,88 MAA11 R7 A11
C N7 N7 C
84,88 MAA12 A12/BC# 84,88 MAA12 A12/BC#
84,88 MAA13 T3 A13 VSS J8 84,88 MAA13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,88 A_BA0 M2 BA0 VSS P9 84,88 A_BA0 M2 BA0 VSS P9
84,88 A_BA1 N8 BA1 VSS G8 84,88 A_BA1 N8 BA1 VSS G8
84,88 A_BA2 M3 BA2 VSS B3 84,88 A_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKA1 J7 CK VSS T9 84 CLKA1 J7 CK VSS T9
84 CLKA1# K7 CK# VSS E1 84 CLKA1# K7 CK# VSS E1
VSS P1 VSS P1
84 CKEA1 K9 CKE 84 CKEA1 K9 CKE
1
1

VSSQ G1 VSSQ G1
Madison_WhistlerR8907 R8908 F9 F9
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
84 DQMA5 D3 DMU VSSQ E8 84 DQMA6 D3 DMU VSSQ E8
E7 E2 E7 E2
Madison_Whistler
84 DQMA7 DML VSSQ
D8
84 DQMA4 DML VSSQ
D8
2
2

VSSQ VSSQ
VSSQ D1 VSSQ D1
GPU_CLKA1_T L3 B9 L3 B9
84 W EA1# WE# VSSQ 84 W EA1# WE# VSSQ
84 CASA1# K3 CAS# VSSQ B1 84 CASA1# K3 CAS# VSSQ B1
84 RASA1# J3 RAS# VSSQ G9 84 RASA1# J3 RAS# VSSQ G9
1

C8903
SCD01U16V2KX-3GP
Madison_Whistler H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
2

Madison_Whistler Madison_Whistler
B B

1D5V_VGA_S0
1

R8901
2K1R2F-GP
Madison_Whistler
2

VRAM3_4_VREF
0719 -SA
1

C8901
R8902 SCD1U10V2KX-5GP
2K1R2F-GP Madison_Whistler
2

Madison_Whistler
2

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM3,4 (2/4)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 89 of 102

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM5 VRAM6
Madison_Whistler MDB[0..31] 84 Madison_Whistler MDB[0..31] 84
K8 E3 MDB25 K8 E3 MDB3
VDD DQL0 MDB30 VDD DQL0 MDB1
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDB27 N1 F2 MDB5
VDD DQL2 VDD DQL2
1

1
C9008 C9010 C9023 C9022 C9021 R9 F8 MDB31 C9016 C9020 C9019 C9017 C9018 R9 F8 MDB0
VDD DQL3 MDB26 VDD DQL3 MDB2
DY DY DIS_PX DIS_PX B2 H3 DY DY DIS_PX DY B2 H3
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDB28 VDD DQL4 MDB6
D9 H8 D9 H8
2

2
VDD DQL5 MDB24 VDD DQL5 MDB4
D G7 VDD DQL6 G2 G7 VDD DQL6 G2 D
R1 H7 MDB29 R1 H7 MDB7
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDB22 D7 MDB8
DQU0 MDB19 DQU0 MDB15
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB23 A1 C8 MDB9
VDDQ DQU2 MDB17 VDDQ DQU2 MDB14
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2
C9005 C9 A7 MDB20 C9 A7 MDB11
VDDQ DQU4 VDDQ DQU4
DIS_PX SC10U6D3V5KX-1GP D2 VDDQ DQU5 A2 MDB16 D2 VDDQ DQU5 A2 MDB13
E9 B8 MDB21 E9 B8 MDB10

2
VDDQ DQU6 MDB18 VDDQ DQU6 MDB12
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSBP_2 84 H2 VDDQ DQSU C7 QSBP_1 84
DQSU# B7 QSBN_2 84 DQSU# B7 QSBN_1 84
VRAM5_6_VREF H1 VRAM5_6_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSBP_3 84 M8 VREFCA DQSL F3 QSBP_0 84
0719 -SA 1 2 VRAM_ZQ5 L8 ZQ DQSL# G3 QSBN_3 84 0719 -SA 1 2 VRAM_ZQ6 L8 ZQ DQSL# G3 QSBN_0 84
R9004 R9006
DIS_PX 243R2F-2-GP K1
DIS_PX 243R2F-2-GP K1
ODT ODTB0 84 ODT ODTB0 84
84,91 MAB0 N3 A0 84,91 MAB0 N3 A0
84,91 MAB1 P7 A1 84,91 MAB1 P7 A1
84,91 MAB2 P3 A2 CS# L2 CSB0#_0 84 84,91 MAB2 P3 A2 CS# L2 CSB0#_0 84
84,91 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,91 84,91 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,91
84,91 MAB4 P8 A4 84,91 MAB4 P8 A4
84,91 MAB5 P2 A5 84,91 MAB5 P2 A5
84,91 MAB6 R8 A6 NC#T7 T7 84,91 MAB6 R8 A6 NC#T7 T7
84,91 MAB7 R2 A7 NC#L9 L9 84,91 MAB7 R2 A7 NC#L9 L9
84,91 MAB8 T8 A8 NC#L1 L1 84,91 MAB8 T8 A8 NC#L1 L1
84,91 MAB9 R3 A9 NC#J9 J9 84,91 MAB9 R3 A9 NC#J9 J9
C L7 J1 L7 J1 C
84,91 MAB10 A10/AP NC#J1 84,91 MAB10 A10/AP NC#J1
84,91 MAB11 R7 A11 84,91 MAB11 R7 A11
84,91 MAB12 N7 A12/BC# 84,91 MAB12 N7 A12/BC#
84,91 MAB13 T3 A13 VSS J8 84,91 MAB13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,91 B_BA0 M2 BA0 VSS P9 84,91 B_BA0 M2 BA0 VSS P9
84,91 B_BA1 N8 BA1 VSS G8 84,91 B_BA1 N8 BA1 VSS G8
84,91 B_BA2 M3 BA2 VSS B3 84,91 B_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKB0 J7 CK VSS T9 84 CLKB0 J7 CK VSS T9
84 CLKB0# K7 CK# VSS E1 84 CLKB0# K7 CK# VSS E1
VSS P1 VSS P1
1

84 CKEB0 K9 CKE 84 CKEB0 K9 CKE


R9007 R9008 G1 G1
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
VSSQ F9 VSSQ F9
DIS_PX DIS_PX 84 DQMB2 D3 DMU VSSQ E8 84 DQMB1 D3 DMU VSSQ E8
84 DQMB3 E7 E2 84 DQMB0 E7 E2
2

DML VSSQ DML VSSQ


VSSQ D8 VSSQ D8
GPU_CLKB0_T D1 D1
VSSQ VSSQ
84 W EB0# L3 WE# VSSQ B9 84 W EB0# L3 WE# VSSQ B9
84 CASB0# K3 CAS# VSSQ B1 84 CASB0# K3 CAS# VSSQ B1
1

C9003 J3 G9 J3 G9
SCD01U16V2KX-3GP DIS_PX 84 RASB0# RAS# VSSQ 84 RASB0# RAS# VSSQ
2

H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
B DIS_PX DIS_PX B

1D5V_VGA_S0
1

R9001
DIS_PX 2K1R2F-GP
2

VRAM5_6_VREF

0719 -SA
1

R9002 C9001
DIS_PX 2K1R2F-GP SCD1U10V2KX-5GP
DIS_PX
2
2

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM5,6 (3/4)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 90 of 102

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM7 VRAM8
MDB[32..63] 84 Madison_Whistler MDB[32..63] 84
K8 E3 MDB48 K8 E3 MDB38
VDD DQL0 MDB53 VDD DQL0 MDB34
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDB50 N1 F2 MDB39
VDD DQL2 VDD DQL2
1

1
D C9109 C9110 C9111 C9112 C9113 R9 F8 MDB55 C9119 C9120 C9121 C9123 C9122 R9 F8 MDB32 D
VDD DQL3 VDD DQL3
DIS_PX DIS_PX DY DY DIS_PX B2 H3 MDB49 DY DIS_PX DIS_PX DY B2 H3 MDB36
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDB52 VDD DQL4 MDB33
D9 H8 D9 H8
2

2
VDD DQL5 MDB51 VDD DQL5 MDB37
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDB54 R1 H7 MDB35
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDB45 D7 MDB56
DQU0 MDB40 DQU0 MDB62
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB47 A1 C8 MDB57
VDDQ DQU2 MDB41 VDDQ DQU2 MDB61
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2

1
C9105 C9 A7 MDB44 C9 A7 MDB59
VDDQ DQU4 VDDQ DQU4
DIS_PX SC10U6D3V5KX-1GP D2 VDDQ DQU5 A2 MDB42 D2 VDDQ DQU5 A2 MDB58
E9 B8 MDB46 E9 B8 MDB60
2
VDDQ DQU6 MDB43 VDDQ DQU6 MDB63
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSBP_5 84 H2 VDDQ DQSU C7 QSBP_7 84
DQSU# B7 QSBN_5 84 DQSU# B7 QSBN_7 84
VRAM7_8_VREF H1 VRAM7_8_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSBP_6 84 M8 VREFCA DQSL F3 QSBP_4 84
0719 -SA 1 2 VRAM_ZQ7 L8 ZQ DQSL# G3 QSBN_6 84 0719 -SA 1 2 VRAM_ZQ8 L8 ZQ DQSL# G3 QSBN_4 84
R9103 R9104
DIS_PX 243R2F-2-GP K1 DIS_PX 243R2F-2-GP K1
ODT ODTB1 84 ODT ODTB1 84
84,90 MAB0 N3 A0 84,90 MAB0 N3 A0
84,90 MAB1 P7 A1 84,90 MAB1 P7 A1
84,90 MAB2 P3 A2 CS# L2 CSB1#_0 84 84,90 MAB2 P3 A2 CS# L2 CSB1#_0 84
84,90 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,90 84,90 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,90
84,90 MAB4 P8 A4 84,90 MAB4 P8 A4
84,90 MAB5 P2 A5 84,90 MAB5 P2 A5
84,90 MAB6 R8 A6 NC#T7 T7 84,90 MAB6 R8 A6 NC#T7 T7
C R2 L9 R2 L9 C
84,90 MAB7 A7 NC#L9 84,90 MAB7 A7 NC#L9
84,90 MAB8 T8 A8 NC#L1 L1 84,90 MAB8 T8 A8 NC#L1 L1
84,90 MAB9 R3 A9 NC#J9 J9 84,90 MAB9 R3 A9 NC#J9 J9
84,90 MAB10 L7 A10/AP NC#J1 J1 84,90 MAB10 L7 A10/AP NC#J1 J1
84,90 MAB11 R7 A11 84,90 MAB11 R7 A11
84,90 MAB12 N7 A12/BC# 84,90 MAB12 N7 A12/BC#
84,90 MAB13 T3 A13 VSS J8 84,90 MAB13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,90 B_BA0 M2 BA0 VSS P9 84,90 B_BA0 M2 BA0 VSS P9
84,90 B_BA1 N8 BA1 VSS G8 84,90 B_BA1 N8 BA1 VSS G8
84,90 B_BA2 M3 BA2 VSS B3 84,90 B_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKB1 J7 CK VSS T9 84 CLKB1 J7 CK VSS T9
84 CLKB1# K7 CK# VSS E1 84 CLKB1# K7 CK# VSS E1
VSS P1 VSS P1
1

84 CKEB1 K9 CKE 84 CKEB1 K9 CKE


R9107 R9108 G1 G1
56R2F-1-GP VSSQ VSSQ
DIS_PX56R2F-1-GP VSSQ F9 VSSQ F9
DIS_PX 84 DQMB5 D3 DMU VSSQ E8 84 DQMB7 D3 DMU VSSQ E8
E7 E2 84 DQMB4 E7 E2
2

84 DQMB6 DML VSSQ DML VSSQ


VSSQ D8 VSSQ D8
GPU_CLKB1_T D1 D1
VSSQ VSSQ
84 W EB1# L3 WE# VSSQ B9 84 W EB1# L3 WE# VSSQ B9
84 CASB1# K3 CAS# VSSQ B1 84 CASB1# K3 CAS# VSSQ B1
1

C9103 J3 G9 J3 G9
84 RASB1# RAS# VSSQ 84 RASB1# RAS# VSSQ
SCD01U16V2KX-3GP DIS_PX
B B
2

H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
DIS_PX DIS_PX

1D5V_VGA_S0
1

R9101
2K1R2F-GP
DIS_PX
2

VRAM7_8_VREF 0719 -SA


1

R9102 C9101
DIS_PX 2K1R2F-GP SCD1U10V2KX-5GP
DIS_PX
2
2

<Variant Name>
A A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM7,8 (4/4)
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 91 of 102

5 4 3 2 1
5 4 3 2 1

110221 SB Change to short pad


D D

DCBATOUT PWR_DCBATOUT_VGA_CORE

PG9201
1 2

GAP-CLOSE-PWR-3-GP
PG9202
1 2

GAP-CLOSE-PWR-3-GP
PG9203
1 2

GAP-CLOSE-PWR-3-GP
PG9204
1 2

GAP-CLOSE-PWR-3-GP
PG9231
1 2 PWR_DCBATOUT_VGA_CORE
20101223WAYNE
GAP-CLOSE-PWR-3-GP
PG9232
1 2
5V_S5
GAP-CLOSE-PWR-3-GP

1
1

1
PC9214 PC9203 PC9205 PC9211 FC9201 FC9202
84.15N03.A37 PU9202 DY DY DY

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
1

5
6
7
8
PT9204 2nd = 84.08064.A37

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
2

2
2

2
1

D
D
D
D
DIS_PX ST15U25VDM-5-GP Id=14.3A
PC9208 DIS_PX Freq=360KHz Qg=9.2~14nC DIS_PX DIS_PX DIS_PX

RMW150N03FUBTB-GP
2

SC1U10V2KX-1GP
2

0803-SA for layout issue Rdson=11~14mohm


PR9210

G
4

S
S
S
PWR_VGA_CORE_TON 1 200KR2F-L-2-GP
2
DIS_PX
Iomax=25.6A

3
2
1
DIS_PX DIS_PX OCP>38.4A
PU9201 PC9206 Cyntec 0.36uH
C DIS_PX DIS_PX SCD1U25V3KX-GP C
PWR_VGA_CORE_BOOT
DCR=1.05mohm
PR9203 16 13 2 PR9202 1 PWR_VGA_CORE_BOOT_C 1 2
TON BOOT Idc=30A, Isat=60A VGA_CORE
2 10R2F-L-GP
1 9 2D2R3-1-U-GP PL9201
VDDP PWR_VGA_CORE_UGATE
12
PWR_VGA_CORE_VDD UGATE PWR_VGA_CORE_PHASE
2 11 1 2
VDD PHASE PWR_VGA_CORE_LGATE COIL-D36UH-1-GP-U
8
LGATE
DIS_PX DIS_PX DY DIS_PX DIS_PX

1
PWR_VGA_CORE_PGOOD PU9203 PG8920
4 7 PWRCNTL_0 85 20110111wayne

1
PGOOD G0

GAP-CLOSE-PWR-3-GP
PWR_VGA_CORE_CS 10 3 PWR_VGA_CORE_FB PC9215 PT9201 PT9202 PT9203
1

5
6
7
8
CS FB

SCD1U10V2KX-4GP

SE470UF2VDM-GP

SE470UF2VDM-GP

SE470UF2VDM-GP
PC9204 14 PWRCNTL_1 85 68.R3610.20M
G1
1

D
D
D
D
SC1U10V2KX-1GP 5 PWR_VGA_CORE_D1 2nd = 68.R3610.10X

RBW280N03-GP

2
2

2
8209A_EN/DEM_VGA D1 PWR_VGA_CORE_D0
DIS_PX 15 6 84.28003.037
2

PR9205 EM/DEM D0 PWR_VGA_CORE_VOUT


11K3R3F-2-GP 17 1 PWR_VGA_CORE_VOUT 2nd = 84.08057.037
GND VOUT
DIS_PX

G
4
2

S
S
S

1
RT8208BGQW-GP 20101015-SA Wayne

3
2
1
DIS_PX PR9204
110224 SB Change to short pad 10R2J-2-GP
20100520 DIS_PX Matsuki cap 390uF

2
PR9213
2.5V, ESR=10 mohm
1 0R0402-PAD
2 FB_VDDC_RT8208B 6.3Φ×5.7L
86 FB_VDDC
0722 -SA

1
R1
3D3V_VGA_S0

1
1
PR9208
DY PC9217 PC9213
10KR2F-2-GP

SC10P50V2JN-4GP
DIS_PX SC10P50V2JN-4GP
DY

2
2
2
1

PR9221
3D3V_VGA_S0 1 10KR2F-2-GP
2 R9222 0929-SA 3D3V_AUX_S5
DIS_PX DIS_PX 10KR2J-3-GP PWR_VGA_CORE_FB

2
2

R4 R3 PR9218
R2 DY 100KR2J-1-GP

1
1

1
PWR_VGA_CORE_PGOOD 2 R9223 1 PR9212 PR9209
DGPU_PWROK 17,86,93
8209A_EN/DEM_VGA 0R0402-PAD 75KR2F-GP 75KR2F-GP PR9211
8209A_EN/DEM_VGA 86
49K9R2F-L-GP PWR_VGA_CORE_EN_R#

1
1

PC9212 C9207 DIS_PX Seymour DIS_PX


B SCD1U10V2KX-4GP SC100P50V2JN-3GP B

2
2

2
DY DIS_PX
2

0929-SA

4
101118 110224 SB Change to short pad DY

GND_SENSE_1
PWR_VGA_CORE_D1 PQ9206
2N7002KDW-GP VGA_CORE
PWR_VGA_CORE_D0
PR9214

3
1 0R0402-PAD
2 FB_GND 86

2
PR9220
DY 100R2J-2-GP

1
PR9207

1
10R2J-2-GP
DIS_PX 8209A_EN/DEM_VGA PQ9206_3

2
0607-SA

PWR_VGA_CORE_D0 PWR_VGA_CORE_D1 Level Whistler Pro

H L High 1V
H L Medium 1V Vout = 0.75V * [1+R1/(R2//R4)]
H H Low 0.9V Vout = 0.75V * (1+R1//R2)

A
Field side feedback 3D mark,D2D low % error A
PWR_VGA_CORE_D0 PWR_VGA_CORE_D1 Level Seymour XT Increase voltage to 1.15V for suffer weak VGA
1008-SA

L L High 1.1V Vout = 0.75V * [1+R1/(R2//R3//R4)]

Dr-Bios.com
L H <Variant Name>

H L Medium 1V Vout = 0.75V * [1+R1/(R2//R4)]


Wistron Corporation
H H Low 0.9V Vout = 0.75V * (1+R1//R2) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8208B_+VGA_CORE
Size Document Number Rev
A2
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 92 of 102
5 4 3 2 1
5 4 3 2 1

0603-SA

5V_S5 110224 SB Change to short pad


+3VS to 3.3V_DELAY Transfer 0603-SA

2
DIS PR9321
PR9301 3D3V_S0 0R0402-PAD
2 0R3J-0-U-GP
1

RT9025 for 1D8V_S0

1
PQ9302

1
DMP2130L-7-GP 3D3V_VGA_S0 PC9319 110221 SB Change to short pad

1
PC9321 SC1U10V2KX-1GP
S SC10U6D3V5MX-3GP DIS_PX
Iomax>1A
3D3V_S0

2
0618-SA

PWR_1D8V_VDD
D DIS_PX

2
1015-SA

D
84.02130.031 PG9307
1

G
2ND = 84.03413.A31 1 2
PR9316 PX 110221 SB Change to short pad 1D8V_VGA_PWR 1D8V_VGA_S0

G
PX 100KR2J-1-GP Vo(cal.)=1.812V GAP-CLOSE-PWR-3-GP
3D3V_VGA discharge PR9320 PG9308

9
D D
0504 chaomin 9025_PGOOD_1V 1 0R0402-PAD
2 PWR_1D8V_EN PU9304 1 2
2

3.3V_ALW_1 DY DIS_PX

GND
4 5 GAP-CLOSE-PWR-3-GP
VDD NC#5

1
PC9323 3 6 PC9320 PC9322 PC9324
VIN VOUT

2
3D3V_VGA_S0

SC10U6D3V5MX-3GP
SC100P50V2JN-3GP

SC10U6D3V5MX-3GP
SCD1U10V2KX-5GP 2 7 R9317
EN ADJ

4
PX PR9314 DY 1 8 20K5R2F-GP DY

2
PQ9303 470R2J-2-GP PGOOD GND
DIS_PX

1
2N7002KDW-GP PX

2
84.2N702.A3F R9322 RT9025-25PSP-GP

1
2nd = 84.DM601.03F 10KR2F-2-GP 74.09025.03D PWR_1D8V_ADJ
1

3
DIS_PX 2nd = 74.00105.03D

1
DIS_PX

2
PR9318
3.3V_RUN_VGA_1 16K2R2F-GP
83 1D8V_S0_VGA_PG
DIS_PX

2
110224 SB Change to short pad
17 PE_GPIO1
0603-SA
0628-SA 5V_S5
0603-SA

2
3D3V_VGA_S0 should ramp-up before VGA_Core PR9313
1D5V_S3 0R0402-PAD
VGA_Coreshould ramp-up before 1V_VGA_S0

1
1V_VGA_S0 should ramp up before 1D8V_VGA_S0

1
PC9314

1
So 1V_VGA_S0 EN have to fine tune RC delay SC10U6D3V5MX-3GP PC9313
DIS_PX SC1U10V2KX-1GP
after VGA_Core

2
110221 SB Change to short pad

PWR_1V_VDD
DIS_PX

2
0609-SA Iomax>1.2A
PR9312
RT9025 for 1V_S0
3D3V_VGA_S0 1 10KR2F-2-GP
2 1015-SA PG9305
Seymour_Whistler 1 2
PE_GPIO0 PE_GPIO1 1V_VGA_PWR 1V_VGA_S0
PR9323 GAP-CLOSE-PWR-3-GP
dGPU mode H H 17,86,92 DGPU_PWROK 1 0R2J-2-GP
2 PWR_1V_EN PG9306

9
Park_Madison PU9303 1 2
IGPU L L DY DIS_PX

GND
2
PC9318 4 5 GAP-CLOSE-PWR-3-GP
C VDD NC#5 C

1
3D3V_VGA_S0 SCD1U25V3KX-GP PC9315 PC9317 PC9316
IGPU with BACO H H 3
VIN VOUT
6

SC10U6D3V5MX-3GP
SC100P50V2JN-3GP

SC10U6D3V5MX-3GP
Seymour_Whistler 2 7 PR9322

1
EN ADJ 10KR2F-2-GP
1 8 DY

2
PGOOD GND

1
DIS_PX DIS_PX
PR9324

2
110221 SB Change to short pad 2K2R2J-2-GP RT9025-25PSP-GP
DIS_PX 74.09025.03D PWR_1V_ADJ
2nd = 74.00105.03D

1
PR9311
9025_PGOOD_1V 1 0R0402-PAD
2 PWR_1V_PGOOD PR9315
39KR2F-GP
DIS_PX Vo=0.8*(1+(R1/R2))

2
1015-SA =0.8*(1+(10K/39K)
=1.005 V

1D5V_S3 1D5V_VGA_S0

PU9305 110325 -1
AO4468, SO-8 8 D DIS_PXS 1
7 D S 2 DIS_PX
Id=11.6A, Qg=9~12nC 6 D S 3 DIS_PX

1
1
Rdson=17.4~22m ohm 5 D G 4 PC9328 PT9302
1

SCD1U16V2KX-3GP
PC9327 SE390U2D5VM-6GP
SC10U6D3V3MX-GP SIR460DP-T1-GE3-GP 77.93971.02L

2
2

DIS_PX 84.00460.037 2nd = 79.3971V.3AL


2

2nd = 84.08039.037 3rd = 79.3971V.30L


4th = 79.3971V.6AL
change low Rds(on) MOSFET

RUNON_R_1

B B

5V_S5
DIS_PX
U9301

1 6 DGPU_PWROK_R
VCC EN
110218 SB change to short pad2 GND DC2
5
3 4 1D5V_VGA_S0
HV DC1
RUNON_R_1 2 R9301 1 GMT_RUN_ENABLE_VGA
0R0402-PAD G5938TL1U-GP
74.05938.09P

PR9325
9025_PGOOD_1V 1 0R2J-2-GP
2
Park_Madison

PR9326
17,86,92 DGPU_PWROK 1 0R2J-2-GP
2 DGPU_PWROK_R
Seymour_Whistler
3D3V_VGA_S0 should ramp-up before VGA_Core
0729 -SA
1

A PC9325 VGA_Coreshould ramp-up before 1V_VGA_S0 A


DY SC1U10V3ZY-6GP
1V_VGA_S0 should ramp up before 1D8V_VGA_S0
2

0729 -SA

Dr-Bios.com
1D5V_VGA_S0 sequence no define specially

So 1D5V_VGA_S0 EN have to fine tune RC delay <Variant Name>


after 1V_VGA_S0

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DISCRETE VGA POWER
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 93 of 102
5 4 3 2 1
5 4 3 2 1

3D3V_S0

DIS_LVDS

1
2
SRN0J-7-GP RN9403 RN9427
4 5 SRN4K7J-8-GP LVDS 1 4 DP_AUXP_CPU
85 GPU_LVDSA_TX2 LVDSA_DATA2 9,49 6 APU_DP_AUXP_CPU DP_AUXP_CPU 49
3 6 2 3 DP_AUXN_CPU
85 GPU_LVDSA_TX2# LVDSA_DATA2# 9,49 6 APU_DP_AUXN_CPU DP_AUXN_CPU 49
85 GPU_LVDSA_TXC# 2 7 LVDSA_CLK# 9,49
1 8 SRN0J-6-GP
85 GPU_LVDSA_TXC LVDSA_CLK 9,49

4
3
RN9404 UMA_PX_EDP
85 GPU_LVDS_CLK 2 3 LVDS_DDC_CLK 49
D RN9405 1 4 D
85 GPU_LVDS_DATA LVDS_DDC_DATA 49
SRN0J-6-GP RN9428
DIS_LVDS 2 3 DP_AUXP_CPU
85 VGA_DP_AUXP_CPU
1 4 DP_AUXN_CPU
DIS_LVDS 85 VGA_DP_AUXN_CPU
RN9413
SRN0J-7-GP 2 3 SRN0J-6-GP
9 LVDS_DDC_CLK_R
85 GPU_LVDSA_TX0# 4 5 LVDSA_DATA0# 9,49 9 LVDS_DDC_DATA_R 1 4 DIS_EDP
85 GPU_LVDSA_TX0 3 6 LVDSA_DATA0 9,49
2 7 SRN0J-6-GP
85 GPU_LVDSA_TX1# LVDSA_DATA1# 9,49
85 GPU_LVDSA_TX1 1 8 LVDSA_DATA1 9,49 UMA_PX_LVDS
RN9429
RN9401 RN9415 2 3 DP_TXP0_CPU
6 APU_DP_TXP0_CPU DP_TXP0_CPU 49
1 8 1 4 DP_TXN0_CPU
6 APU_DP_TXN0_CPU DP_TXN0_CPU 49
85 VGA_CRT_BLUE 2 7 CRT_BLUE_R 50
3 6 SRN0J-6-GP
85 VGA_CRT_GREEN CRT_GREEN_R 50
85 VGA_CRT_RED 4 5 CRT_RED_R 50 UMA_PX_EDP
SRN0J-7-GP
DIS
RN9430
RN9416 1 4 DP_TXP0_CPU
85 VGA_DP_TXP0_CPU
RN9406 1 8 2 3 DP_TXN0_CPU
85 VGA_DP_TXN0_CPU
85 VGA_LCDVDD_EN 8 1 LVDS_VDD_EN 9,10,27,49 19 CRT_RED 2 7
7 2 3 6 SRN0J-6-GP
85 VGA_LBKLT_CTL L_BKLT_CTRL 9,10,49 19 CRT_GREEN
85 VGA_BLEN 6 3 L_BKLT_EN 9,10,27,49 19 CRT_BLUE 4 5 DIS_EDP
5 4
SRN0J-7-GP
1

SRN0J-7-GP UMA_PX if Co-layout LVDS and EDP panel,


C
DIS R9408 R9411 C
have to place Res near LVDS Cap
101130 DY
100KR2J-1-GP

100KR2J-1-GP

for Reflection Prevent


2

RN9424
2 3 DDCDATA
19 CRT_DDC_DATA DDCDATA 50
1 4 DDCCLK
19 CRT_DDC_CLK DDCCLK 50
101123
SRN0J-6-GP
UMA_PX

RN9425
2 3 DDCDATA
85 VGA_CRT_DDCDATA
1 DIS 4 DDCCLK
85 VGA_CRT_DDCCLK
DY SRN0J-6-GP
27 BRIGHTNESS 1 R9406 2 L_BKLT_CTRL
0R2J-2-GP

0804-SA

B B

5V_S0
CRT Hsync & Vsync level shift
1

C9401
SCD1U16V2ZY-2GP
2

HV_EN# 2 R9407 1
0R0402-PAD
14

10

RN9420
SRN0J-6-GP R9410
83,85 VGA_CRT_HSYNC 1 4 CRT_HSYNC_R 9 8 CRT_HSYNC_CON 1 10R2J-2-GP
2 CRT_HSYNC1
CRT_HSYNC1 50
83,85 VGA_CRT_VSYNC 2 DIS 3
U9401C
TC74VHCT125AFTQK2M-GP
14

7
4

RN9421 73.74125.F0B
2 3 2nd = 73.74125.L13 R9409
19 CRT_HSYNC
19 CRT_VSYNC 1 4 CRT_VSYNC_R 5 6 3rd = 73.74125.L12 CRT_VSYNC_CON 1 10R2J-2-GP
2 CRT_VSYNC1
CRT_VSYNC1 50
SRN0J-6-GP U9401B
UMA_PX TC74VHCT125AFTQK2M-GP
7

73.74125.F0B
2nd = 73.74125.L13 <Variant Name>
A 3rd = 73.74125.L12 A

Wistron Corporation

Dr-Bios.com
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LVDS_Switch
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 94 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title

Dr-Bios.com
Reserved
Size Document Number Rev
A
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 95 of 102

5 4 3 2 1
5 4 3 2 1

110223 SB RF Solution Check test point


1D5V_S3
DCBATOUT 1
3D3V_S0 TP9701

3D3V_AUX_S5 1 TP9702

3D3V_S5 1 TP9703
EC9701 EC9702 EC9703 EC9704 EC9705 EC9706 EC9707 EC9708 EC9709 EC9710 EC9711 EC9712 EC9713 EC9714 EC9715 EC9716 EC9717 EC9718 EC9719
1

1
1
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
D 5V_S5 TP9704 D

18,27 PM_PW RBTN# 1 TP9705


2

2
DY DY DY DY DY
6,17,36,71 H_CPUPW RGD_E 1 TP9706

27,36 S5_ENABLE 1 TP9707


110218 SB RF Solution 10,17,27,36 A_RST# 1 TP9708
1D5V_S3
DCBATOUT

FC9701 FC9702 FC9703 FC9704 FC9705 FC9706 FC9713 FC9714 FC9727 FC9728 FC9725 FC9726 FC9729 FC9730 FC9707 FC9708
Test Point 放放Dimm Door打打打打打打
1

1
1

1
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
2

2
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY

3D3V_S0 5V_S0

C C

FC9717 FC9718 FC9715 FC9716 FC9719 FC9720


1

1
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
2

2
DY DY DY DY DY DY

STF236R128H103-GP
H19 H20
H22 H14 H15 H16
STF237R117H63-GP STF237R117H63-GP
STF237R146H65-GP STF237R146H65-GP STF237R146H65-GP
1

1 3G DY

1
B B

H9 H10 H11
STF237R117H67-GP STF237R128H34-GP STF237R128H34-GP

WLAN WWAN
1

SYSTEM THERMAL

A H4 H7 <Core Design> A
H2 H1 H3 H5 H6 H8 HOLE315R300 H21
HOLE335R115-GP HOLE335R115-GP
HOLE315X315R91-S1-GP
HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP
H17

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

1
1

Taipei Hsien 221, Taiwan, R.O.C.


1
1

Title
1

UNUSED PARTS/CAP
Size Document Number Rev
A3
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 97 of 102
5 4 3 2 1
5 4 3 2 1

Modify list
D 65 W: PR4007 -> 187K(64.18735.6DL) D

90 W: PR4007 -> 121K (64.12135.6DL)

UMA and PX R5114 ~ R5121 -> 604-ohm (64.60405.6DL )


Diserete -> R5114 ~ R5121-> 499-ohm(64.49905.6DL )
R8332 stuff 1K for Mannhatton VGA
stuff 5.1K(64.51015.6DL) for Vancouver VGA
C C

if use LVDS L8711,L8709 stuff 0-ohm 0603


if use LVDS L8701,L8708 stuff bead 0603
if use EDP L8711,L8709 stuff bead 0603 ohm
if use EDP L8701,L8708 stuff 0-ohm 0603

B B

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

Change History
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 98 of 102
5 4 3 2 1
5 4 3 2 1

POWER SEQUENCE
D D

C C

B B

<Core Design>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Dr-Bios.com
Title

POWER SEQUENCE
Size Document Number Rev
A4
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 99 of 102
5 4 3 2 1
5 4 3 2 1

Thermal Block Diagram Audio Block Diagram


D D

PAGE28 DXP P2800_DXP

MMBT3904-3-GP
SC2200P50V2KX-2GP

DXN P2800_DXN
UMA Place near CPU
Thermal PWM CORE
P2800
MMBT3904-3-GP

PAGE27 GPIO5 SYS_THRM TDR T8

C KBC GPIO92 CPU_THRM TDL

OTZ THERM_SYS_SHDN#
2N7002
D
PURE_HW_SHUTDOWN#
EN 3V/5V
C

NPCE795P S
G
IMVP_PWRGD PGOD
VR
Put under CPU(T8 HW shutdown)

GPIO4 VGA_THRM TDR


GPIO94 GPIO56 PAGE28
P2800_VGA_DXP
DXP THRMDA
FAN_TACH1

SC2200P50V2KX-2GP SC2200P50V2KX-2GP
VGA DXN
P2800_VGA_DXN
THRMDC
VGA
Thermal
FAN1_DAC

TACH Place near GPU(DISCRETE only).


P2800
FAN MMBT3904-3-GP
5V VIN
B B

PH
OTZ

VSET VOUT
VIN

FAN CONTROL
P2793
PAGE28

A <Core Design> A

Dr-Bios.com
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Custom
JE50_SB SB
Date: Friday, April 01, 2011 Sheet 102 of 102

5 4 3 2 1

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