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D D

UMA /Muxless Schematics Document


AMD LIANO CPU FS1
AMD Hudson M2/M3 and Seymour XT
C C

http://j.gs/47mr

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 1 of 102
5 4 3 2 1
5 4 3 2 1

PROJECT CODE : 91.4M001.001 SYSTEM DC/DC


TPS51123 41
PCB P/N : 11230
REVISION : -1 LB475 Block Diagram DDR3 VRAM
1GB/2GB
88,89,90,91
INPUTS OUTPUTS
5V_S5
3D3V_S5

Fingerprint BD DCBATOUT 5V_AUX_S5


DDR3
D 3D3V_AUX_S5 D
900MHz
DDR3 X8 PCI EXPRESS GRAPHIC(Muxless Lan8 ~Lan15)
TPS51211 45
POWER BD 1066/1333 MHz DDRIII 1066/1333 AMD Liano APU X16 PCI EXPRESS GRAPHIC(Diserete only Lan0 ~Lan15)
14,15,16 ( FS1 socket 35W )
Seymour XT INPUTS OUTPUTS
Cardreader BD
722-Pin uFCPGA722
USB2 x 1 DDR3 GPP X4 port DP2(PCI EXPRESS Lan0~Lan3) ATI
DCBATOUT 1D1V_S5

1066/1333 MHz DDRIII 1066/1333


DP X6 Port 83,84,85,86,87
14,15,16 TPS51211 45
HDMI
DP0 51
PCIE x 2 4,5,6,7,8 INPUTS OUTPUTS
DCBATOUT 1D2V_S0

UMI-Link
DP1 TPS51216
4X4 46
LCD
TRAVIS 49
INPUTS OUTPUTS
C GLAN 9 C

RJ45 RTL8111E PCIE x 1 5V_S5 0D75_S0


31 FCH CRT
CONN 59 HUDSON-M2/M3 CRT
50
TPS51216 46
PCIE x 1
Mini-Card Integrated Display DAC MB
USB 3.0 x 1 PCB STACKUP INPUTS OUTPUTS
WLAN USB1 x 162
65 DCBATOUT
USB2.0 x 1 USB 3.0 (4parts)
1D5V_S3
USB 2.0 TOP L1
BD (10 parts or 14 port
if USB 3.0 do not used) USB 2.0 x 1/SATAII x 1
GND L2 CHARGER
E-SATA/USB
USB x 2 57 S L3 BQ24707 40
comb
GPP X4 port S L4
USB2.0 x 4 USB 1.1 (2 parts)
INPUTS OUTPUTS
Bluetooth 63 SATA x 2
VCC L5
SATA (6 parts)
HDD DCBATOUT
56 S L6 BT+
INT RTC GND L7
CAMERA 49 INT CLK GEN ODD BOTTOM L8 CPU DC/DC
56
B HW MONITOR B

ACPI 1.1
ISL6267 42
CardReader USB 2.0 x 1 LPC Bus LPC debug port
SD/MMC+/MS/ 71 INPUTS OUTPUTS
MS Pro/xD 74 Realtek
RTS5139 AZALIA DCBATOUT APU_VDD
17,18,19,20,21,22
KBC GFX Core
SPI NUVOTON ISL6267 43
Internal DMIC Azalia 27
NPCE791G
CODEC INPUTS OUTPUTS
HP1 Realtek
ALC269Q DCBATOUT APU_VDDNB
MIC IN 29 VGA
Flash ROM Touch Int. Thermal RT8208 92
2MB PAD KB EMC2103-2-AP INPUTS OUTPUTS
60 69 69 25 28 DCBATOUT VGA_CORE
A <Variant Name> A

2CH SPEAKER
GMT
Fan Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
G1454 28 Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 2 of 102
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5 4 3 2 1

Strapping
REQUIRED SYSTEM STRAPS USE this pin to determine INT/EXT CLK
D D

EC_PWM2 PCI_CLK1 RTC_CLK CLK_PCI_LPC PCI_CLK4 LPC_CLK0 LPC_CLK1


PCH GPO199
PULL Allow USE CLKGEN
LPC ROM PCIE GEN2 S5_PLUS Mode DEBUG non_Fusion ENABLE EC ENABLED
HIGH
DISABLE STRAPS CLOCK mode
(Use Internal)
DEFAULT DEFAULT DEFAULT
DEFAULT

PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN


LOW SPI ROM PCIE GEN1 ENABLE DEBUG CLOCK mode DISABLED
STRAPS DEFAULT (Use External)
DEFAULT DEFAULT

USB Table PCIE Routing


USB
C Pair Device
APU C

0 USB_Z LANE0 LAN


1 WLAN/WiMAX
2 Finger Print
LANE1
3 Bluetooth LANE2 WLAN
4 WWAN
5 Card Reader(IO Board)
LANE3
6 E-SATA
7 CCD FCH
8 USB3(RJ45_USB Board)
9 USB2(IO Board)
LANE0
10 NC LANE1
11 NC
12 NC
LANE2
B
13 NC LANE3 B

http://j.gs/47mr

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Table of Content
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 3 of 102

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CPU1F 6 OF 6
PCI EXPRESS
AA8 AA2 GTXP0 GTXP0 C433 1 2 SCD1U16V2KX-3GP
P_GFX_RXP0 P_GFX_TXP0 APU_HDMI_DATA2 51
AA9 AA3 GTXN0 GTXN0 C434 1 2 SCD1U16V2KX-3GP
P_GFX_RXN0 P_GFX_TXN0 APU_HDMI_DATA2# 51

SAINE
Y7 Y2 GTXP1 GTXP1 C435 1 2 SCD1U16V2KX-3GP
P_GFX_RXP1 P_GFX_TXP1 APU_HDMI_DATA1 51
Y8 Y1 GTXN1 GTXN1 C436 1 2 SCD1U16V2KX-3GP
P_GFX_RXN1 P_GFX_TXN1 APU_HDMI_DATA1# 51
W5 Y4 GTXP2 GTXP2 C437 1 2 SCD1U16V2KX-3GP
P_GFX_RXP2 P_GFX_TXP2 APU_HDMI_DATA0 51
W6 Y5 GTXN2 GTXN2 C438 1 2 SCD1U16V2KX-3GP
P_GFX_RXN2 P_GFX_TXN2 APU_HDMI_DATA0# 51
W8 W2 GTXP3 GTXP3 C439 1 2 SCD1U16V2KX-3GP
P_GFX_RXP3 P_GFX_TXP3 APU_HDMI_CLK 51
D W9 W3 GTXN3 GTXN3 C440 1 2 SCD1U16V2KX-3GP D
P_GFX_RXN3 P_GFX_TXN3 APU_HDMI_CLK# 51
V7 P_GFX_RXP4 P_GFX_TXP4 V2
V8 P_GFX_RXN4 P_GFX_TXN4 V1
U5 P_GFX_RXP5 P_GFX_TXP5 V4
U6 P_GFX_RXN5 P_GFX_TXN5 V5
U8 P_GFX_RXP6 P_GFX_TXP6 U2
U9 U3

GRAPHICS
P_GFX_RXN6 P_GFX_TXN6
T7 P_GFX_RXP7 P_GFX_TXP7 T2
T8 P_GFX_RXN7 P_GFX_TXN7 T1
PEG_RXP8 R5 T4 GTXP8 MUXLESS
1 2 C417 SCD1U16V2KX-3GP PEG_TXP8
PEG_RXN8 P_GFX_RXP8 P_GFX_TXP8 GTXN8 C418 SCD1U16V2KX-3GP PEG_TXN8
R6 P_GFX_RXN8 P_GFX_TXN8 T5 MUXLESS
1 2
PEG_RXP9 R8 R2 GTXP9 MUXLESS
1 2 C419 SCD1U16V2KX-3GP PEG_TXP9
PEG_RXN9 P_GFX_RXP9 P_GFX_TXP9 GTXN9 C420 SCD1U16V2KX-3GP PEG_TXN9
R9 P_GFX_RXN9 P_GFX_TXN9 R3 MUXLESS
1 2
PEG_RXP10 P7 P2 GTXP10 MUXLESS
1 2 C421 SCD1U16V2KX-3GP PEG_TXP10
PEG_RXN10 P_GFX_RXP10 P_GFX_TXP10 GTXN10 C422 SCD1U16V2KX-3GP PEG_TXN10
P8 P_GFX_RXN10 P_GFX_TXN10 P1 MUXLESS
1 2
PEG_RXP11 N5 P4 GTXP11 MUXLESS
1 2 C423 SCD1U16V2KX-3GP PEG_TXP11
PEG_RXN11 P_GFX_RXP11 P_GFX_TXP11 GTXN11 C424 SCD1U16V2KX-3GP PEG_TXN11
N6 P_GFX_RXN11 P_GFX_TXN11 P5 MUXLESS
1 2
PEG_RXP12 N8 N2 GTXP12 MUXLESS
1 2 C425 SCD1U16V2KX-3GP PEG_TXP12
PEG_RXN12 P_GFX_RXP12 P_GFX_TXP12 GTXN12 C426 SCD1U16V2KX-3GP PEG_TXN12
N9 P_GFX_RXN12 P_GFX_TXN12 N3 MUXLESS
1 2
PEG_RXP13 M7 M2 GTXP13 MUXLESS
1 2 C427 SCD1U16V2KX-3GP PEG_TXP13
PEG_RXN13 P_GFX_RXP13 P_GFX_TXP13 GTXN13 C428 SCD1U16V2KX-3GP PEG_TXN13
M8 P_GFX_RXN13 P_GFX_TXN13 M1 MUXLESS
1 2
PEG_RXP14 L5 M4 GTXP14 MUXLESS
1 2 C429 SCD1U16V2KX-3GP PEG_TXP14
PEG_RXN14 P_GFX_RXP14 P_GFX_TXP14 GTXN14 C430 SCD1U16V2KX-3GP PEG_TXN14
L6 P_GFX_RXN14 P_GFX_TXN14 M5 MUXLESS
1 2
PEG_RXP15 L8 L2 GTXP15 MUXLESS
1 2 C431 SCD1U16V2KX-3GP PEG_TXP15
PEG_RXN15 P_GFX_RXP15 P_GFX_TXP15 GTXN15 C432 SCD1U16V2KX-3GP PEG_TXN15
L9 P_GFX_RXN15 P_GFX_TXN15 L3 MUXLESS
1 2

AC5 AD4 PCIE_TXP0_C C441 1 2 SCD1U16V2KX-3GP


31 PCIE_RXP0 P_GPP_RXP0 P_GPP_TXP0 PCIE_TXP0 31
LAN 31 PCIE_RXN0 AC6 P_GPP_RXN0 P_GPP_TXN0 AD5 PCIE_TXN0_C C442 1 2 SCD1U16V2KX-3GP PCIE_TXN0 31 LAN
AC8 P_GPP_RXP1 P_GPP_TXP1 AC2
C WWAN AC9 P_GPP_RXN1 P_GPP_TXN1 AC3 WWAN C
AB7 AB2 PCIE_TXP2_C C457 1 2 SCD1U16V2KX-3GP

GPP
65 PCIE_RXP2 P_GPP_RXP2 P_GPP_TXP2 PCIE_TXP2 65
WLAN 65 PCIE_RXN2 AB8 P_GPP_RXN2 P_GPP_TXN2 AB1 PCIE_TXN2_C C460 1 2 SCD1U16V2KX-3GP PCIE_TXN2 65 WLAN
AA5 P_GPP_RXP3 P_GPP_TXP3 AB4
AA6 P_GPP_RXN3 P_GPP_TXN3 AB5

AF8 AF1 UMI_TX0P_C C445 1 2 SCD1U16V2KX-3GP


17 UMI_FCH_APU_RX0P P_UMI_RXP0 P_UMI_TXP0 UMI_APU_FCH_TX0P 17
AF7 AF2 UMI_TX0N_C C446 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX0N P_UMI_RXN0 P_UMI_TXN0 UMI_APU_FCH_TX0N 17 PEG_RXP[8..15]
AE6 AF5 UMI_TX1P_C C447 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX1P P_UMI_RXP1 P_UMI_TXP1 UMI_APU_FCH_TX1P 17 PEG_RXP[8..15] 83
AE5 AF4 UMI_TX1N_C C448 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_APU_FCH_TX1N 17 PEG_RXN[8..15]
AE9 AE3 UMI_TX2P_C C449 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX2P P_UMI_RXP2 P_UMI_TXP2 UMI_APU_FCH_TX2P 17 PEG_RXN[8..15] 83
UMI_TX2N_C C450 SCD1U16V2KX-3GP
UMI-LINK

17 UMI_FCH_APU_RX2N AE8 P_UMI_RXN2 P_UMI_TXN2 AE2 1 2 UMI_APU_FCH_TX2N 17


AD8 AD1 UMI_TX3P_C C451 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX3P P_UMI_RXP3 P_UMI_TXP3 UMI_APU_FCH_TX3P 17
AD7 AD2 UMI_TX3N_C C452 1 2 SCD1U16V2KX-3GP
17 UMI_FCH_APU_RX3N P_UMI_RXN3 P_UMI_TXN3 UMI_APU_FCH_TX3N 17
1 2 P_ZVDDP K5 K4 P_ZVSS PEG_TXP[8..15]
1D2V_S0 P_ZVDDP P_ZVSS PEG_TXP[8..15] 83
R402

1
196R2F-GP PEG_TXN[8..15]
PEG_TXN[8..15] 83
62.10055.481 R401
196R2F-GP

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

APU_PCIE(1/5)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 4 of 102

5 4 3 2 1
5 4 3 2 1

CPU1A 1 OF 6
MEMORY CHANNEL CPU1B 2 OF 6
A
14 M_A_A0 U20 MA_ADD0 MA_DATA0 E13 M_A_DQ0 14 MEMORY CHANNEL B

14 M_A_A1 R20 MA_ADD1 MA_DATA1 J13 M_A_DQ1 14 15 M_B_A0 T27 MB_ADD0 MB_DATA0 A14 M_B_DQ0 15
14 M_A_A2 R21 MA_ADD2 MA_DATA2 H15 M_A_DQ2 14 15 M_B_A1 P24 MB_ADD1 MB_DATA1 B14 M_B_DQ1 15

SAINE
P22 J15 P25 D16

SAINE
14 M_A_A3 MA_ADD3 MA_DATA3 M_A_DQ3 14 15 M_B_A2 MB_ADD2 MB_DATA2 M_B_DQ2 15
14 M_A_A4 P21 MA_ADD4 MA_DATA4 H13 M_A_DQ4 14 15 M_B_A3 N27 MB_ADD3 MB_DATA3 E16 M_B_DQ3 15
14 M_A_A5 N24 MA_ADD5 MA_DATA5 F13 M_A_DQ5 14 15 M_B_A4 N26 MB_ADD4 MB_DATA4 B13 M_B_DQ4 15
14 M_A_A6 N23 MA_ADD6 MA_DATA6 F15 M_A_DQ6 14 15 M_B_A5 M28 MB_ADD5 MB_DATA5 C13 M_B_DQ5 15
14 M_A_A7 N20 MA_ADD7 MA_DATA7 E15 M_A_DQ7 14 15 M_B_A6 M27 MB_ADD6 MB_DATA6 B16 M_B_DQ6 15
14 M_A_A8 N21 MA_ADD8 15 M_B_A7 M24 MB_ADD7 MB_DATA7 A16 M_B_DQ7 15
D 14 M_A_A9 M21 MA_ADD9 MA_DATA8 H17 M_A_DQ8 14 15 M_B_A8 M25 MB_ADD8 D
14 M_A_A10 U23 MA_ADD10 MA_DATA9 F17 M_A_DQ9 14 15 M_B_A9 L26 MB_ADD9 MB_DATA8 C17 M_B_DQ8 15
14 M_A_A11 M22 MA_ADD11 MA_DATA10 E19 M_A_DQ10 14 15 M_B_A10 U26 MB_ADD10 MB_DATA9 B18 M_B_DQ9 15
14 M_A_A12 L24 MA_ADD12 MA_DATA11 J19 M_A_DQ11 14 15 M_B_A11 L27 MB_ADD11 MB_DATA10 B20 M_B_DQ10 15
14 M_A_A13 AA25 MA_ADD13 MA_DATA12 G16 M_A_DQ12 14 15 M_B_A12 K27 MB_ADD12 MB_DATA11 A20 M_B_DQ11 15
14 M_A_A14 L21 MA_ADD14 MA_DATA13 H16 M_A_DQ13 14 15 M_B_A13 W26 MB_ADD13 MB_DATA12 E17 M_B_DQ12 15
14 M_A_A15 L20 MA_ADD15 MA_DATA14 H19 M_A_DQ14 14 15 M_B_A14 K25 MB_ADD14 MB_DATA13 B17 M_B_DQ13 15
MA_DATA15 F19 M_A_DQ15 14 15 M_B_A15 K24 MB_ADD15 MB_DATA14 B19 M_B_DQ14 15
14 M_A_BS0 U24 MA_BANK0 MB_DATA15 C19 M_B_DQ15 15
14 M_A_BS1 U21 MA_BANK1 MA_DATA16 H20 M_A_DQ16 14 15 M_B_BS0 U27 MB_BANK0
14 M_A_BS2 L23 MA_BANK2 MA_DATA17 F21 M_A_DQ17 14 15 M_B_BS1 T28 MB_BANK1 MB_DATA16 C21 M_B_DQ16 15
MA_DATA18 J23 M_A_DQ18 14 15 M_B_BS2 K28 MB_BANK2 MB_DATA17 B22 M_B_DQ17 15
14 M_A_DM0 E14 MA_DM0 MA_DATA19 H23 M_A_DQ19 14 MB_DATA18 C23 M_B_DQ18 15
14 M_A_DM1 J17 MA_DM1 MA_DATA20 G20 M_A_DQ20 14 15 M_B_DM0 D14 MB_DM0 MB_DATA19 A24 M_B_DQ19 15
14 M_A_DM2 E21 MA_DM2 MA_DATA21 E20 M_A_DQ21 14 15 M_B_DM1 A18 MB_DM1 MB_DATA20 D20 M_B_DQ20 15
14 M_A_DM3 F25 MA_DM3 MA_DATA22 G22 M_A_DQ22 14 15 M_B_DM2 A22 MB_DM2 MB_DATA21 B21 M_B_DQ21 15
14 M_A_DM4 AD27 MA_DM4 MA_DATA23 H22 M_A_DQ23 14 15 M_B_DM3 C25 MB_DM3 MB_DATA22 E23 M_B_DQ22 15
14 M_A_DM5 AC23 MA_DM5 15 M_B_DM4 AF25 MB_DM4 MB_DATA23 B23 M_B_DQ23 15
14 M_A_DM6 AD19 MA_DM6 MA_DATA24 G24 M_A_DQ24 14 15 M_B_DM5 AG22 MB_DM5
14 M_A_DM7 AC15 MA_DM7 MA_DATA25 E25 M_A_DQ25 14 15 M_B_DM6 AH18 MB_DM6 MB_DATA24 E24 M_B_DQ24 15
MA_DATA26 G27 M_A_DQ26 14 15 M_B_DM7 AD14 MB_DM7 MB_DATA25 B25 M_B_DQ25 15
14 M_A_DQS0 G14 MA_DQS_H0 MA_DATA27 G26 M_A_DQ27 14 MB_DATA26 B27 M_B_DQ26 15
14 M_A_DQS#0 H14 MA_DQS_L0 MA_DATA28 F23 M_A_DQ28 14 15 M_B_DQS0 C15 MB_DQS_H0 MB_DATA27 D28 M_B_DQ27 15
14 M_A_DQS1 G18 MA_DQS_H1 MA_DATA29 H24 M_A_DQ29 14 15 M_B_DQS#0 B15 MB_DQS_L0 MB_DATA28 B24 M_B_DQ28 15
14 M_A_DQS#1 H18 MA_DQS_L1 MA_DATA30 E28 M_A_DQ30 14 15 M_B_DQS1 E18 MB_DQS_H1 MB_DATA29 D24 M_B_DQ29 15
14 M_A_DQS2 J21 MA_DQS_H2 MA_DATA31 F27 M_A_DQ31 14 15 M_B_DQS#1 D18 MB_DQS_L1 MB_DATA30 D26 M_B_DQ30 15
14 M_A_DQS#2 H21 MA_DQS_L2 15 M_B_DQS2 E22 MB_DQS_H2 MB_DATA31 C27 M_B_DQ31 15
14 M_A_DQS3 E27 MA_DQS_H3 MA_DATA32 AB28 M_A_DQ32 14 15 M_B_DQS#2 D22 MB_DQS_L2
14 M_A_DQS#3 E26 MA_DQS_L3 MA_DATA33 AC27 M_A_DQ33 14 15 M_B_DQS3 B26 MB_DQS_H3 MB_DATA32 AG26 M_B_DQ32 15
C AE26 AD25 A26 AH26 C
14 M_A_DQS4 MA_DQS_H4 MA_DATA34 M_A_DQ34 14 15 M_B_DQS#3 MB_DQS_L3 MB_DATA33 M_B_DQ33 15
14 M_A_DQS#4 AD26 MA_DQS_L4 MA_DATA35 AA24 M_A_DQ35 14 15 M_B_DQS4 AG24 MB_DQS_H4 MB_DATA34 AF23 M_B_DQ34 15
14 M_A_DQS5 AB22 MA_DQS_H5 MA_DATA36 AE28 M_A_DQ36 14 15 M_B_DQS#4 AG25 MB_DQS_L4 MB_DATA35 AG23 M_B_DQ35 15
14 M_A_DQS#5 AA22 MA_DQS_L5 MA_DATA37 AD28 M_A_DQ37 14 15 M_B_DQS5 AG21 MB_DQS_H5 MB_DATA36 AG27 M_B_DQ36 15
14 M_A_DQS6 AB18 MA_DQS_H6 MA_DATA38 AB26 M_A_DQ38 14 15 M_B_DQS#5 AF21 MB_DQS_L5 MB_DATA37 AF27 M_B_DQ37 15
14 M_A_DQS#6 AA18 MA_DQS_L6 MA_DATA39 AC25 M_A_DQ39 14 15 M_B_DQS6 AG17 MB_DQS_H6 MB_DATA38 AH24 M_B_DQ38 15
14 M_A_DQS7 AA14 MA_DQS_H7 15 M_B_DQS#6 AG18 MB_DQS_L6 MB_DATA39 AE24 M_B_DQ39 15
14 M_A_DQS#7 AA15 MA_DQS_L7 MA_DATA40 Y23 M_A_DQ40 14 15 M_B_DQS7 AH14 MB_DQS_H7
MA_DATA41 AA23 M_A_DQ41 14 15 M_B_DQS#7 AG14 MB_DQS_L7 MB_DATA40 AE22 M_B_DQ40 15
14 M_A_DIM0_CLK_DDR0 T21 MA_CLK_H0 MA_DATA42 Y21 M_A_DQ42 14 MB_DATA41 AH22 M_B_DQ41 15
14 M_A_DIM0_CLK_DDR#0 T22 MA_CLK_L0 MA_DATA43 AA20 M_A_DQ43 14 15 M_B_DIM0_CLK_DDR0 R26 MB_CLK_H0 MB_DATA42 AE20 M_B_DQ42 15
14 M_A_DIM0_CLK_DDR1 R23 MA_CLK_H1 MA_DATA44 AB24 M_A_DQ44 14 15 M_B_DIM0_CLK_DDR#0 R27 MB_CLK_L0 MB_DATA43 AH20 M_B_DQ43 15
14 M_A_DIM0_CLK_DDR#1 R24 MA_CLK_L1 MA_DATA45 AD24 M_A_DQ45 14 15 M_B_DIM0_CLK_DDR1 P27 MB_CLK_H1 MB_DATA44 AD23 M_B_DQ44 15
MA_DATA46 AA21 M_A_DQ46 14 15 M_B_DIM0_CLK_DDR#1 P28 MB_CLK_L1 MB_DATA45 AD22 M_B_DQ45 15
14 M_A_DIM0_CKE0 H28 MA_CKE0 MA_DATA47 AC21 M_A_DQ47 14 MB_DATA46 AD21 M_B_DQ46 15
14 M_A_DIM0_CKE1 H27 MA_CKE1 15 M_B_DIM0_CKE0 J26 MB_CKE0 MB_DATA47 AD20 M_B_DQ47 15
MA_DATA48 AA19 M_A_DQ48 14 15 M_B_DIM0_CKE1 J27 MB_CKE1
14 M_A_DIM0_ODT0 Y25 MA_ODT0 MA_DATA49 AC19 M_A_DQ49 14 MB_DATA48 AF19 M_B_DQ48 15
14 M_A_DIM0_ODT1 AA27 MA_ODT1 MA_DATA50 AC17 M_A_DQ50 14 15 M_B_DIM0_ODT0 W27 MB_ODT0 MB_DATA49 AE18 M_B_DQ49 15
MA_DATA51 AA17 M_A_DQ51 14 15 M_B_DIM0_ODT1 Y28 MB_ODT1 MB_DATA50 AE16 M_B_DQ50 15
14 M_A_DIM0_CS#0 V22 MA_CS#0 MA_DATA52 AB20 M_A_DQ52 14 MB_DATA51 AH16 M_B_DQ51 15
14 M_A_DIM0_CS#1 AA26 MA_CS#1 MA_DATA53 Y19 M_A_DQ53 14 15 M_B_DIM0_CS#0 V25 MB_CS#0 MB_DATA52 AG20 M_B_DQ52 15
MA_DATA54 AD18 M_A_DQ54 14 15 M_B_DIM0_CS#1 Y27 MB_CS#1 MB_DATA53 AG19 M_B_DQ53 15
14 M_A_RAS# V21 MA_RAS# MA_DATA55 AD17 M_A_DQ55 14 MB_DATA54 AF17 M_B_DQ54 15
14 M_A_CAS# W24 MA_CAS# 15 M_B_RAS# V24 MB_RAS# MB_DATA55 AD16 M_B_DQ55 15
14 M_A_W E# W23 MA_WE# MA_DATA56 AA16 M_A_DQ56 14 15 M_B_CAS# V27 MB_CAS#
MA_DATA57 Y15 M_A_DQ57 14 15 M_B_W E# V28 MB_WE# MB_DATA56 AG15 M_B_DQ56 15
14 M_A_RST# H25 MA_RESET# MA_DATA58 AA13 M_A_DQ58 14 MB_DATA57 AD15 M_B_DQ57 15
14 M_A_EVENT# T24 MA_EVENT# MA_DATA59 AC13 M_A_DQ59 14 15 M_B_RST# J25 MB_RESET# MB_DATA58 AG13 M_B_DQ58 15
B B
MA_DATA60 Y17 M_A_DQ60 14 15 M_B_EVENT# T25 MB_EVENT# MB_DATA59 AD13 M_B_DQ59 15
M_VREF_DQ_APU W20 AB16 AG16
M_VREF MA_DATA61 M_A_DQ61 14 MB_DATA60 M_B_DQ60 15
MA_DATA62 AB14 M_A_DQ62 14 MB_DATA61 AF15 M_B_DQ61 15
1D5V_S3 1 2 M_ZVDDIO W21 Y13 AE14
M_ZVDDIO MA_DATA63 M_A_DQ63 14 MB_DATA62 M_B_DQ62 15
R501 AF13
MB_DATA63 M_B_DQ63 15
39R2F-GP

62.10055.481
62.10055.481

APU_VREF_DQ
DDR_VREF_S3 M_A_DIM0_CKE0
R502 M_A_DIM0_CKE1
1 0R0603-PAD
2 M_VREF_DQ_APU 1D5V_S3 M_B_DIM0_CKE0
M_B_DIM0_CKE1
1

C501 C502 RN501


SCD1U10V2KX-5GP SC1KP50V2KX-1GP 1 4 M_A_EVENT# 1

1
2 3 M_B_EVENT#
2

R503 R504 R505 R506


SRN1KJ-7-GP 75R2D-GP 75R2D-GP 75R2D-GP 75R2D-GP
DY DY DY DY
LAYOUT: place them close to APU
2

2
<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

http://j.gs/47mr
Taipei Hsien 221, Taiwan, R.O.C.

Title

APU_DDR(2/5)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 5 of 102

5 4 3 2 1
5 4 3 2 1

RN609
DP_AUX0N 1 4
DP_AUX0P 2 3
SVC SVD Boot Voltage Boot Voltage
(VCC/GND) (open)
SRN1K8J-GP
0 0 1.1 1.1
RN610
0 1 1.0 1.2 DP_AUX1N 1 4
DP_AUX1P 2 3
1 0 0.9 1.1 3D3V_S0 SRN1K8J-GP
1 1 0.8 0.9 DY
CPU1C 3 OF 6 R671
ANALOG/DISPLAY/MISC LVDS_CHN_TRAVIS 1 100KR2J-1-GP
2 APU_TEST25_H_BYPASSCLK_H 2 R611 1
1 2C602 SCD1U16V2KX-3GP APU_DP_TXP0_CPU F2 D4 DP_AUX0P C603 1 2 SCD1U16V2KX-3GP 510R2J-1-GP
9 LVDS_L0P_TRAVIS DP0_TXP0 DP0_AUXP LVDS_CHP_TRAVIS 9
TRAVIS 1 2C606 SCD1U16V2KX-3GP APU_DP_TXN0_CPU F1 D5 DP_AUX0N C601 1 2 SCD1U16V2KX-3GP LVDS DY M_TEST R608 2 1 39R2F-GP

SAINE
9 LVDS_L0N_TRAVIS DP0_TXN0 DP0_AUXN LVDS_CHN_TRAVIS 9
R672
LVDS Panel 1 2C607 SCD1U16V2KX-3GP APU_DP_TXP1_CPU E3 E5 DP_AUX1P C626 1 2 SCD1U16V2KX-3GP LVDS_CHP_TRAVIS 1 100KR2J-1-GP
2 APU_TEST9_ANALOGIN 1 R602 2
9 LVDS_L1P_TRAVIS APU_DP_TXN1_CPU DP0_TXP1 DP1_AUXP DP_AUX1N DP1_AUXP_R 19 CRT
D 9 LVDS_L1N_TRAVIS 1 2C604 SCD1U16V2KX-3GP E2 E6 C627 1 2 SCD1U16V2KX-3GP DP1_AUXN_R 19 DY0R2J-2-GP D
DP0_TXN1 DP1_AUXN
D2 J5 RN603
DP0_TXP2 DP2_AUXP PCH_HDMI_CLK_R 51
D1 J6 PCH_HDMI_DATA_R 51
HDMI 8 1
DP0_TXN2 DP2_AUXN APU_TEST22_SCANSHIFTEN 7 2
APU_TEST19_PLLTEST0

DISPLAY PORT 0
C2 H4 6 3
DP0_TXP3 DP3_AUXP 1D5V_S3 APU_TEST18_PLLTEST1
C3 H5 5 4
DP0_TXN3 DP3_AUXN
1 2C618 SCD1U16V2KX-3GP DP1_TX0P K2 G5 SRN1KJ-4-GP
19 DP1_TX0P_R DP1_TX0N DP1_TXP0 DP4_AUXP
2C619 SCD1U16V2KX-3GP

DISPLAY PORT MISC.


19 DP1_TX0N_R 1 K1 G6

1
DP1_TXN0 DP4_AUXN RN602
1 2C620 SCD1U16V2KX-3GP DP1_TX1P J3 F4 R653 APU_TEST12_SCANSHIFTEND 8 1
19 DP1_TX1P_R DP1_TXP1 DP5_AUXP
1 2C621 SCD1U16V2KX-3GP DP1_TX1N J2 F5 100KR2J-1-GP APU_TEST21_SCANEN 7 2
VGA output 19 DP1_TX1N_R DP1_TXN1 DP5_AUXN APU_TEST20_SCANCLK2
DY 6 3
from FCH 1 2C622 SCD1U16V2KX-3GP DP1_TX2P H2 D7 DP0_HPD APU_TEST24_SCANCLK1 5 4

2
19 DP1_TX2P_R DP1_TXP2 DP0_HPD
1 2C623 SCD1U16V2KX-3GP DP1_TX2N H1 E7 DP1_HPD
19 DP1_TX2N_R DP1_TXN2 DP1_HPD
J7 DP0_HPD SRN1KJ-4-GP
DP2_HPD DP2_HPD 51

DISPLAY PORT 1
1 2C624 SCD1U16V2KX-3GP DP1_TX3P G2 H7
19 DP1_TX3P_R DP1_TXP3 DP3_HPD
1 2C625 SCD1U16V2KX-3GP DP1_TX3N G3 G7
19 DP1_TX3N_R DP1_TXN3 DP4_HPD 1D2V_S0
F7
DP5_HPD
17 APU_CLKP AH7
CLKIN_H
100MHz 17 APU_CLKN AH6
CLKIN_L DP_BLON
C6 APU_TEST25_L_BYPASSCLK_L 1 R613 2
510R2J-1-GP

CLK
C5
DP_DIGON APU_BLPWM 1D5V_S3
17 DISP_CLKP AH4 C7
DISP_CLKIN_H DP_VARY_BL
100MHz 17 DISP_CLKN AH3
DISP_CLKIN_L DP_AUX_ZVSS 1D5V_S3 ALLOW_STOP
D8 1 R623 2 1 R643 2
DP_AUX_ZVSS 150R2F-1-GP 1KR2J-1-GP
42 APU_SVC_R B8
SVC
42 APU_SVD_R A8 AA10

2
SVD TEST6
101129 RN0601 G10 APU_TEST9_ANALOGIN

SER.
APU_SIC TEST9
18 SCLK3 1 4 AH11 H10
SIC TEST10
DY 18 SDATA3 2 DY 3 APU_SID AG11
SID TEST12
H12 APU_TEST12_SCANSHIFTEND R612
71 APU_RST_L_BUF 1 R631 2 D9 APU_TEST14_BP0 1 TP611 TPAD14-GP 300R2J-4-GP
0R2J-2-GP SRN0J-6-GP APU_RST#_R TEST14 APU_TEST15_BP1 3D3V_AUX_S5
1 R629 2 0R2J-2-GP AF10 E9 1 TP610 TPAD14-GP

1
17 APU_RST# RESET# TEST15
1 R630 2 0R2J-2-GP APU_PWRGD_R AE10 G9 APU_TEST16_BP2 1 TP612 TPAD14-GP TEST35 R615
17,36,71 H_CPUPWRGD_E PWROK TEST16
R632 H9 APU_TEST17_BP3 1 TP613 TPAD14-GP FS1R1 1 10KR2J-3-GP
2

CTRL

2
TEST17
17 APU_PROCHOT# 1 2 AD10 H11 APU_TEST18_PLLTEST1 APU_TEST18_PLLTEST1 71
APU_THERMTRIP#_VDDIO AG12 PROCHOT# TEST18
0R0402-PAD G11 APU_TEST19_PLLTEST0 APU_TEST19_PLLTEST0 71
R617 [AMD FAE Frank]:
APU_ALERT# THERMTRIP# TEST19
27 H_PROCHOT# AH12 F12 APU_TEST20_SCANCLK2 DY 300R2J-4-GP this is electrical key
1D5V_S3 ALERT# TEST20
E11 APU_TEST21_SCANEN do not allow power to turn on if this pin is still "L"
APU_TDI TEST21
C C12 D11 APU_TEST22_SCANSHIFTEN FS1 package is open pin C

TEST

1
71 APU_TDI APU_TDO TDI TEST22
71 APU_TDO A12 F10 in the furtur,FS1r2 will have this pin tied to VSS
1

APU_TCK TDO TEST23


71 APU_TCK A11 G12 APU_TEST24_SCANCLK1 if the wrong processor is plugged the socket
TCK TEST24

JTAG
R636 APU_TMS D12 AH10 APU_TEST25_H_BYPASSCLK_H This is more of a problem on desktop platforms
71 APU_TMS TMS TEST25_H 1D5V_S3
2K2R2J-2-GP APU_TRST# B12 AH9 APU_TEST25_L_BYPASSCLK_L [AMD HDMI desing guidance]
71 APU_TRST#
APU_DBRDY TRST# TEST25_L (changing CPUs)
71 APU_DBRDY B11 K7
APU_DBREQ# DBRDY TEST28_H
71 APU_DBREQ# C11 K8 Strap define PU :Enable HDMI
2

DBREQ# TEST28_L
AA12 ANATSTIN_H 1 TP601 TPAD14-GP
PD:Disable HDMI

3
TEST30_H
AB12 ANATSTIN_L
APU_ALERT#_Q

E8 1 TP617 TPAD14-GP
RSVD#E8 TEST30_L
K21 K22 M_TEST 19 DP_HPD1_R 1 R639 2 DP_HPD1_C_B 1 Q604
RSVD#K21 TEST31
AC11 AB11 ANATSTOUT_H 1 TP618 TPAD14-GP 150KR2J-L1-GP PMBS3904-1-GP

RSVD
RSVD#AC11 TEST32_H
42 APU_VDDNB_RUN_FB_L 1 R646 2 0R0402-PAD AA11 ANATSTOUT_L 1 TP619 TPAD14-GP 84.03904.L06

2
TEST32_L
D10 TEST35 2ND = 84.03904.P11

1
APU_RUN_FB_L TEST35 DP1_HPD
42 APU_VDD_RUN_FB_L 1 R647 2 0R0402-PAD B9
VSS_SENSE
1 APU_VDDP_FB_H C8 Y11 FS1R1 36
R644

1
VDDP_SENSE FS1R1
1 R659 2 TPAD14-GP TP620 APU_VDDNB_RUN_FB_H_R A9 AB10 DY 100KR2J-1-GP

SENSE
42 APU_VDDNB_RUN_FB_H VDDNB_SENSE DMAACTIVE# ALLOW_STOP 17
84.03904.L06 0R0402-PAD 1 APU_VDDIO_SUS_FB_H B10 R640
1

APU_VDD_RUN_FB_H_R VDDIO_SENSE
2ND = 84.03904.P11 1 R661 2 TPAD14-GP TP622 C9 AE12 10KR2J-3-GP

2
42 APU_VDD_RUN_FB_H VDD_SENSE THERMDA
0R0402-PAD 1 APU_VDDR_FB_H A10 AD12
APU_ALERT# TPAD14-GP TP623 VDDR_SENSE THERMDC
2 3

2
PCH_TEMP_ALERT# 19
Q603 62.10055.481
PMBS3904-1-GP

1D5V_S3 1D5V_S3

1 R666 2 H_CPUPWRGD_E 3D3V_S0


1D5V_S0
300R2J-4-GP

3
R656 3D3V_S0_TRAVIS 1 R641 2 DP_HPD0_C_B Q605
DY 9 DP_HPD0_C 1
1

1 R665 2 H_CPUPWRGD_E 2K2R2J-2-GP 150KR2J-L1-GP PMBS3904-1-GP


1D5V_S3
300R2J-4-GP R670 84.03904.L06

2
10KR2J-3-GP 2ND = 84.03904.P11

APU_BLPWM_Q1

1
DP0_HPD

1
R645
2

1
R657 100KR2J-1-GP
R654 4K7R2J-2-GP R642
1 300R2J-4-GP
2 APU_RST# 10KR2J-3-GP
1D5V_S0

2
APU_PROCHOT#_B

2
B 3D3V_S0 1D5V_S0 B
DY

2
1 R637 2 APU_RST#
1D5V_S3

1
300R2J-4-GP
1

APU_BLPWM 2 3 APU_BLPWM_TRAVIS 9
R669 DY R667 Q608
10KR2J-3-GP 10KR2J-3-GP PMBS3904-1-GP

1
1D5V_S0 84.03904.L06 84.03904.L06
1

RN611 2ND = 84.03904.P11 R655 2ND = 84.03904.P11


2

4 1 DY 4K7R2J-2-GP
3 DY 2 APU_PROCHOT# 3 2
H_CPUPWRGD_B

APU_PROCHOT#_VDDIO 42 3D3V_S0
Q612

2
SRN1K8J-GP PMBS3904-1-GP

1D5V_S3
1

RN607 1 R651 2
3 2 APU_SVC_R 0R2J-2-GP R668
4 1 APU_SVD_R DY 10KR2J-3-GP
84.03904.L06 DY
1

SRN1K8J-GP 2ND = 84.03904.P11


2

DY

http://j.gs/47mr
H_CPUPWRGD_E 2 3 H_CPUPWRGD 42,97
Q611
PMBS3904-1-GP

R633
1D5V_S3 1 0R2J-2-GP
2
RN601 1D5V_S3
5 4 APU_SID
6 3 APU_SIC
1

7 2 APU_THERMTRIP#_VDDIO
8 1 APU_ALERT# R635
10KR2J-3-GP
SRN1KJ-4-GP
2

1D5V_S3
APU_THERMTRIP#_VDDIO_Q

RN604
8 1 APU_TRST#
A APU_TCK A
7 2
6 3 APU_TMS 3D3V_S5 3D3V_S5 3D3V_S5
5 4 APU_TDI
1

SRN1KJ-4-GP 1 <Variant Name>


R638 R650 R652
10KR2J-3-GP 1D5V_S3 10KR2J-3-GP 1D5V_S3 10KR2J-3-GP
1 R634 2 APU_DBREQ# Q606 Q607
300R2J-4-GP BSS138-8-GP BSS138-8-GP Wistron Corporation
2

84.00138.H31 84.00138.H31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


84.03904.L06 G G Taipei Hsien 221, Taiwan, R.O.C.
1

1D5V_S3 2ND = 84.03904.P11


D D Title
APU_PROCHOT# APU_THERMTRIP#_VDDIO KBC_SCL1 27 KBC_SDA1 27
1 R616 2
1KR2J-1-GP
2 3
Q601
H_THERMTRIP# 18,36,85 APU_SIC S APU_SID S APU_Control&Debug(3/5)
PMBS3904-1-GP Size Document Number Rev

S3 Power ℃
CPU exceeds to 125℃ Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 6 of 102
5 4 3 2 1
5 4 3 2 1

APU_VDD CPU1D 4 OF 6 APU_VDD

C1 T6
36A for VDD(35W CPU)
VDD VDD
D3 VDD VDD T10

SAINE
D6 VDD VDD T18
E1 VDD VDD U1

1
C708 C707 C706 C705 C704 C703 C702 C701 F3 U11 C714 C713 C712 C711 C710 C709
VDD VDD

SCD22U10V2KX-1GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC180P50V2JN-1GP

SCD22U10V2KX-1GP

SCD01U16V2KX-3GP

SC180P50V2JN-1GP
DY F6 U19

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
D D
VDD VDD
F8 V3 VDD:

2
VDD VDD
G1 VDD VDD V6
H3 VDD VDD V10 10UF X7 0.22UF X2 10nF X3
H6 VDD VDD V18
H8 VDD VDD W1 180pF Cap for EMI requirment
J1 VDD VDD W11
K3 VDD VDD W13
K6 VDD VDD W15
L1 VDD VDD W17
L11 VDD VDD W19
L19 VDD VDD Y3
M3 VDD VDD Y6
M6 VDD VDD Y10
M10 VDD VDD Y12
M18 VDD VDD Y14
N1 VDD VDD Y16
N11 VDD VDD Y18
N19 VDD VDD Y20
P3 VDD VDD AA1
P6 VDD VDD AB3 18A for VDDNB(35W CPU)
P10 VDD VDD AB6
P18 VDD VDD AC1
R1 VDD VDD AD3
R11 VDD VDD AD6
R19 VDD VDD AE1
APU_VDDNB T3 APU_VDDNB
VDD VDDNB:
J9 VDDNB VDDNB K11 10UF X4 0.22UF X2
C J10 K12 C
C718 C717 C716 C715 VDDNB VDDNB C723 C722 C721 C720
J11 VDDNB VDDNB K13 180pF Cap for EMI requirment
1

1
SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP
C719 J12 K14
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP VDDNB VDDNB
DY J14 VDDNB VDDNB K16 DY
J16 K17
2

2
VDDNB VDDNB
K9 VDDNB VDDNB K18
K10 VDDNB VDDNB L18 4A for VDDIO(35W CPU)
G28 VDDIO VDDIO R22
1D5V_S3 H26 R25 1D5V_S3
VDDIO VDDIO
J28 VDDIO VDDIO R28
K20 VDDIO VDDIO T20
K23 VDDIO VDDIO T23
K26 VDDIO VDDIO T26 VDDIO:
1

C730 C729 C728 C727 C726 C725 C724 L22 U22


VDDIO VDDIO

1
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

L25 U25 C737 C736 C735 C734 C733 C732 C731


10UF X2 0.22UF X6 4.7uFUF X4
SC10U6D3V5KX-1GP

VDDIO VDDIO

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
L28 U28

SC10U6D3V5KX-1GP
2

VDDIO VDDIO
M20 V20 180pF Cap for EMI requirment

2
VDDIO VDDIO
M23 VDDIO VDDIO V23
M26 VDDIO VDDIO V26
N22 VDDIO VDDIO W22 3.5A for VDDP(35W)
N25 VDDIO VDDIO W25
N28 VDDIO VDDIO W28
P20 VDDIO VDDIO Y24
P23 VDDIO VDDIO Y26
P26 AA28 1D2V_S0
VDDIO VDDIO
1D2V_S0 AG2 VDDP_A VDDP_B A3
AG3 VDDP_A VDDP_B A4 VDDP:
B B
AG4 VDDP_A VDDP_B B3
AG5 VDDP_A VDDP_B B4 10UF X3 0.22uF X4

1
C751 C750 C749 C748 C747 C746 C745

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
1D2V_S0 AG6 VDDR VDDR A5 DY 180pF Cap for EMI requirment
AG7 A6

2
VDDR VDDR
AG8 VDDR VDDR B5
2D5V_S0 AG9 B6
VDDR VDDR
0.75A for VDDA(35W) AE11 VDDA 3A for VDDR(35W)
AF11 VDDA 1D2V_S0
1

C740 C739 C738


SC4D7U6D3V3KX-GP

SCD22U10V2KX-1GP

SC3300P50V2KX-1GP 62.10055.481
2

1
1D5V_S3 C767 C766 C765 C764 C763 C762 C761 C760 C759 C758 C757 C756 C755 C754 C753 C752
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
DY DY DY

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
2

2
1

C744 C743 C742 C741


SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

DY DY DY DY
2

VDDR: <Variant Name>


A A
4.7UF X4 0.22uF X4 1nF X4
180pF Cap for EMI requirment Wistron Corporation
Decoupling between processor and DIMMs 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
across VDDIO and VSS Split
Title

APU_Power(4/5)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 7 of 102

5 4 3 2 1
5 4 3 2 1

D D

CPU1E 5 OF 6

A7 VSS VSS T11


A13 VSS VSS T19

SAINE
A15 VSS VSS U4
A17 VSS VSS U7
A19 VSS VSS U10
A21 VSS VSS U18
A23 VSS VSS V9
A25 VSS VSS V11
B7 VSS VSS V19
C4 VSS VSS W4
C10 VSS VSS W7
C14 VSS VSS W10
C16 VSS VSS W12
C18 VSS VSS W14
C20 VSS VSS W16
C22 VSS VSS W18
C24 VSS VSS Y9
C26 VSS VSS Y22
C28 VSS VSS AA4
D13 VSS VSS AA7
D15 VSS VSS AB9
D17 VSS VSS AB13
D19 VSS VSS AB15
D21 VSS VSS AB17
D23 VSS VSS AB19
C D25 AB21 C
VSS VSS
D27 VSS VSS AB23
E4 VSS VSS AB25
E10 VSS VSS AB27
E12 VSS VSS AC4
F9 VSS VSS AC7
F11 VSS VSS AC10
F14 VSS VSS AC12
F16 VSS VSS AC14
F18 VSS VSS AC16
F20 VSS VSS AC18
F22 VSS VSS AC20
F24 VSS VSS AC22
F26 VSS VSS AC24
F28 VSS VSS AC26
G4 VSS VSS AC28
G8 VSS VSS AD9
G13 VSS VSS AD11
G15 VSS VSS AE4
G17 VSS VSS AE7
G19 VSS VSS AE13
G21 VSS VSS AE15
G23 VSS VSS AE17
G25 VSS VSS AE19
J4 VSS VSS AE21
J8 VSS VSS AE23
J18 VSS VSS AE25
J20 VSS VSS AE27
J22 VSS VSS AF3
B B
J24 VSS VSS AF6
K19 VSS VSS AF9
L4 VSS VSS AF12
L7 VSS VSS AF14
L10 VSS VSS AF16
M9 VSS VSS AF18
M11 VSS VSS AF20
M19 VSS VSS AF22
N4 VSS VSS AF24
N7 VSS VSS AF26
N10 VSS VSS AF28
N18 VSS VSS AG10
P9 VSS VSS AH5
P11 VSS VSS AH8
P19 VSS VSS AH13
R4 VSS VSS AH15
R7 VSS VSS AH17
R10 VSS VSS AH19
R18 VSS VSS AH21
T9 VSS VSS AH23
VSS AH25

62.10055.481

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

APU_VSS(5/5)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 8 of 102

5 4 3 2 1
5 4 3 2 1

1D2V_TRAVIS DVDD12

400mA
2 R922 1
0R0603-PAD

1
C906 C907 C908 C909 C903 C910 C904 C911

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP
1

2
R901 DVDD33 DVDD12 AVDD33 AVDD12
1 0R2J-2-GP
2 APU_PCIE_RST#_R
17,31,65,66,71,83,97 PLT_RST#

R923 3D3V_S0_TRAVIS GND_TRVS


If use single channel,

1
3D3V_S0_TRAVIS 2 20KR2F-L-GP
1 C902
D DY SCD1U10V2KX-5GP have to use L Group D
DY

13
53

32
46
59

25
33
39
63

62
2

2
5
TRAVIS Rev 1.01 sugget U902
R902

DVDD33
DVDD33

DVDD12
DVDD12
DVDD12
DVDD12

AVDD33
AVDD33
AVDD33
AVDD33
AVDD33

AVDD12

AVSS
AVSS
AVSS
to stuff 1M-ohm 1MR2J-L2-GP
3D3V_S0_TRAVIS
C905 1D2V_TRAVIS 220 ohm 3A AVDD12

2
SCD1U10V2KX-5GP
1 R928 2LVDS_CHP_TRAVIS 1 2 POR# 34 45 L901 400mA
APU_PCIE_RST#_R POR# LVDS_U3_P
12 44 1 2
1MR2J-L2-GP RESET# LVDS_U3_N PBY201209T-221Y-N-GP
43
LVDS_CLKU_P
17 TRAVIS_REFCLKN 31
OSC_IN LVDS_CLKU_N
42 68.00206.121
DY 17 TRAVIS_REFCLKP 30
OSC_OUT LVDS_U2_P
41
40

1
LVDS_CHN_TRAVIS 1 R929 DAC_TDO LVDS_U2_N C901 C913 C914 C915 C916 C917 C918 C919
2 1 54 38
TDO LVDS_U1_P

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
TPAD14-GP TP902 1 DAC_TDI 55 37 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP
1MR2J-L2-GP TPAD14-GP TP904 DAC_TMS TDI LVDS_U1_N
1 57 36

2
TPAD14-GP TP903 DAC_TCK TMS LVDS_U0_P
1 56 35
DY TPAD14-GP TP901 TCK LVDS_U0_N
29
LVDS_L3_P
6 APU_BLPWM_TRAVIS 48 28
CPU_VARY_BL LVDS_L3_N
27 LVDSA_CLK 49
LVDS_CLKL_P
FAE request LVDS_CLKL_N
26 LVDSA_CLK# 49
1 R907 2 0R0402-PAD LVDS_CHN_TRAVIS_C 60 24
6 LVDS_CHN_TRAVIS AUX_CH_N LVDS_L2_P LVDSA_DATA2 49
1 R909 2 0R0402-PAD LVDS_CHP_TRAVIS_C 61 23
6 LVDS_CHP_TRAVIS AUX_CH_P LVDS_L2_N LVDSA_DATA2# 49
22 LVDSA_DATA1 49
LVDS_l1_P
6 LVDS_L0P_TRAVIS 3 21 LVDSA_DATA1# 49
DPRX_L0_P LVDS_l1_N
2011.03.09 change 6 LVDS_L0N_TRAVIS 4
DPRX_L0_N LVDS_L0_P
20 LVDSA_DATA0 49
6 LVDS_L1P_TRAVIS 6 19 LVDSA_DATA0# 49
DPRX_L1_P LVDS_L0_N
6 LVDS_L1N_TRAVIS 7
DPRX_L1_N 3D3V_S0_TRAVIS220 AVDD33
DDC_DATA
50 LVDS_DDC_DATA_R 49 ohm 3A

CFG_SDA
1 LVDS_HPD_TRAVIS

CFG_SCL
2 R905

TEST_EN
58 49

CLK_SEL
6 DP_HPD0_C DPRX_HPD DDC_CLK LVDS_DDC_CLK_R 49

GPIO_0
GPIO_1
GPIO_2

R_BIAS
0R0402-PAD 47 L903 150mA
VARY_BL L_BKLT_CTRL 49
15 1 2

GND
BL_EN L_BKLT_EN 27
14 PBY201209T-221Y-N-GP
DIGON LVDS_VDD_EN 49
3D3V_S0_TRAVIS ANX3110-GP
68.00206.121

65

16
17
18

52
51

10
11
64
71.03110.003

1
C922 C923 C924 C925 C926 C927 C928

ANX3100_CLK_SEL

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
SC2D2U10V3KX-1GP

1
1
GPIO0_0

DAC_TEST_EN

2
C R908 C
1 2 ANX3100_CLK_SEL

http://j.gs/47mr
TP905 TP906

TPAD14-GP

TPAD14-GP
10KR2J-3-GP

1
R906

1
10KR2J-3-GP
3D3V_S0_TRAVIS DY
R903 3D3V_S0_TRAVIS DVDD33

2
0R2J-2-GP

2
C920 150mA
2
1

SCD1U10V2KX-5GP 2 R921 1
1 2 0R0603-PAD
RN9417 R_BIAS

2
SRN4K7J-8-GP C929 C930 C931

SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP SC2D2U10V3KX-1GP
3
4

1
1

1
1 R914 2 49 LVDS_DDC_DATA_R LVDS_DDC_DATA_R 49
R904 C912
0R0603-PAD 12KR2F-L-GP SC100P50V2JN-3GP
49 LVDS_DDC_CLK_R LVDS_DDC_CLK_R 49

2
2
GND_TRVS

Q904
DY G TRAVIS_EN# 18
D

S TRAVIS_EN#_S 2 DY 1 3D3V_S0
R927
B 2N7002K-2-GP 10KR2J-3-GP B

5V_S5
84.2N702.J31
U903 2nd = 84.2N702.031
1 6 TRAVIS_EN#_C
VCC EN
2
GND DYDC2 5 3D3V_S0_TRAVIS
RUN_ENABLE_TRAVIS_R 3 4 1D2V_TRAVIS
HV DC1
R926
RUN_ENABLE_TRAVIS 1 0R2J-2-GP
2 G5938TL1U-GP
DY 74.05938.09P

MOS spec VGS:20V


R924
Rosa:RUN_Enable 15V 2 0R3J-0-U-GP
1 R925
Annie:RUN Enable 9V 2 0R3J-0-U-GP
1
1D2V_TRAVIS U901
AO3404A-GP 1D2V_S0 3D3V_S0_TRAVIS U905
RUN_ENABLE_S AO3404A-GP 3D3V_S0
0504-Sabine David S D
S D
Annie and Rosa team soluton co-layout DY
1

84.03404.B31 DY
G

R919 RUN_ENABLE_TRAVIS 84.03404.B31


G

1MR2J-L2-GP
DY
TRAVIS_1D2V TRAVIS_3D3V
2

R917 R916 MOS spec VGS:20V


RUN_ENABLE_C 2 0R2J-2-GP
1 2 0R2J-2-GP
1
DY DY Rosa:RUN_Enable 15V
1

C936
R918
Annie:RUN Enable 9V
SCD01U50V2KX-1GP

DY 1 10KR2J-3-GP
2 C933
2

DY DY SCD01U50V2KX-1GP
2

A A
1

C935
SCD01U50V2KX-1GP
Q903 DY
2

18 TRAVIS_EN# G
<Variant Name>
D Reserved for tuning sequence of 3.3V and 1.2V
DY
1

S
R920 Wistron Corporation
1MR2J-L2-GP 2N7002K-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY 84.2N702.J31 Taipei Hsien 221, Taiwan, R.O.C.
2nd = 84.2N702.031
2

Title

TRAVIS
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 9 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 10 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 11 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 12 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 13 of 102
5 4 3 2 1
5 4 3 2 1

D D

DM1

5 M_A_A0 98 NP1
A0 NP1
5 M_A_A1 97 NP2
A1 NP2
5 M_A_A2 96
A2
5 M_A_A3 95 110 M_A_RAS# 5
A3 RAS#
5 M_A_A4 92 113 M_A_WE# 5
A4 WE#
5 M_A_A5 91 115 M_A_CAS# 5
A5 CAS#
5 M_A_A6 90
A6
5 M_A_A7 86 114 M_A_DIM0_CS#0 5
A7 CS0#
5 M_A_A8 89 121 M_A_DIM0_CS#1 5
A8 CS1#
5 M_A_A9 85
A9
5 M_A_A10 107 73 M_A_DIM0_CKE0 5
A10/AP CKE0
5 M_A_A11 84 74 M_A_DIM0_CKE1 5
A11 CKE1
5 M_A_A12 83
A12
5 M_A_A13 119 101 M_A_DIM0_CLK_DDR0 5
A13 CK0
5 M_A_A14 80 103 M_A_DIM0_CLK_DDR#0 5
A14 CK0#
5 M_A_A15 78
A15
5 M_A_BS2 79 102 M_A_DIM0_CLK_DDR1 5
A16/BA2 CK1
104 M_A_DIM0_CLK_DDR#1 5
CK1#
5 M_A_BS0 109
BA0
5 M_A_BS1 108 11 M_A_DM0 5
BA1 DM0
28 M_A_DM1 5
DM1
5 M_A_DQ0 5 46 M_A_DM2 5
DQ0 DM2
5 M_A_DQ1 7 63 M_A_DM3 5
DQ1 DM3
5 M_A_DQ2 15 136 M_A_DM4 5
DQ2 DM4
5 M_A_DQ3 17 153 M_A_DM5 5
DQ3 DM5
5 M_A_DQ4 4
DQ4 DM6
170 M_A_DM6 5 Intel HR DM tied to GND
5 M_A_DQ5 6 187 M_A_DM7 5 AMD still following previous design
DQ5 DM7
5 M_A_DQ6 16
DQ6
5 M_A_DQ7 18 200 PCH_SMBDATA 15,65,66
DQ7 SDA
5 M_A_DQ8 21 202 PCH_SMBCLK 15,65,66
DQ8 SCL
5 M_A_DQ9 23
DQ9 3D3V_S0
5 M_A_DQ10 33 198 M_A_EVENT# 5
DQ10 EVENT#
5 M_A_DQ11 35
DQ11
5 M_A_DQ12 22 199
DQ12 VDDSPD SA0_DIM0
5 M_A_DQ13 24
DQ13 SA0_DIM0
5 M_A_DQ14 34 197

2
DQ14 SA0 SA1_DIM0 C1401 C1402 SA1_DIM0
5 M_A_DQ15 36 201
DQ15 SA1 SCD1U10V2KX-5GP SC2D2U10V3KX-1GP
C
5 M_A_DQ16 39 C
DQ16
41 77 DY

1
5 M_A_DQ17

2
DQ17 NC#1
5 M_A_DQ18 51 122
DQ18 NC#2 1D5V_S3 R1401 R1402
5 M_A_DQ19 53 125
DQ19 NC#/TEST
5 M_A_DQ20 40 0R0402-PAD 0R0402-PAD
DQ20
5 M_A_DQ21 42 75
DQ21 VDD1
50 76

1
5 M_A_DQ22 DQ22 VDD2
5 M_A_DQ23 52 81
DQ23 VDD3
5 M_A_DQ24 57 82
DQ24 VDD4
5 M_A_DQ25 59 87
DQ25 VDD5
5 M_A_DQ26 67 88
DQ26 VDD6
5 M_A_DQ27 69 93
DQ27 VDD7
5 M_A_DQ28 56 94
DQ28 VDD8
5 M_A_DQ29 58 99
DQ29 VDD9
5 M_A_DQ30 68 100
DDR_VREF_S3 DQ30 VDD10
5 M_A_DQ31 70 105
DQ31 VDD11
5 M_A_DQ32 129 106
DQ32 VDD12
5 M_A_DQ33 131 111
DQ33 VDD13
5 M_A_DQ34 141 112
DQ34 VDD14
5 M_A_DQ35 143 117
DQ35 VDD15
5 M_A_DQ36 130 118
DQ36 VDD16
5 M_A_DQ37 132 123
DQ37 VDD17
5 M_A_DQ38 140 124
DQ38 VDD18
5 M_A_DQ39 142
1

C1411 C1412 C1413 DQ39


5 M_A_DQ40 147 2
SC1KP50V2KX-1GP SC1KP50V2KX-1GP DQ40 VSS RN1401
149 3
SC1U6D3V2KX-GP

5 M_A_DQ41 DQ41 VSS PCH_SMBDATA


DY 157 8 1 4
2

5 M_A_DQ42 DQ42 VSS SMB_DATA 18


159 9 PCH_SMBCLK 2 3
5 M_A_DQ43 DQ43 VSS SMB_CLK 18
5 M_A_DQ44 146 13
DQ44 VSS SRN0J-6-GP
5 M_A_DQ45 148 14
DQ45 VSS
5 M_A_DQ46 158 19
DQ46 VSS
5 M_A_DQ47 160 20
DQ47 VSS PCH_SMBDATA C1423 SC10P50V2JN-4GP
5 M_A_DQ48 163
DQ48 VSS
25 1 DY 2
165 26 PCH_SMBCLK C1424 1 DY 2 SC10P50V2JN-4GP
5 M_A_DQ49 DQ49 VSS
5 M_A_DQ50 175 31
DQ50 VSS
5 M_A_DQ51 177 32
DQ51 VSS
5 M_A_DQ52 164 37
DQ52 VSS
5 M_A_DQ53 166 38
DQ53 VSS
5 M_A_DQ54 174 43
DQ54 VSS
Place these caps 5 M_A_DQ55 176
DQ55 VSS
44
181 48
B 0D75V_S0 0D75V_S0 close to VTT1 and 5 M_A_DQ56
183
DQ56 VSS
49 B
5 M_A_DQ57 DQ57 VSS
VTT2. 5 M_A_DQ58 191
DQ58 VSS
54
5 M_A_DQ59 193 55
DQ59 VSS
5 M_A_DQ60 180 60
1

C1418 DQ60 VSS


5 M_A_DQ61 182 61
SC10U6D3V5KX-1GP DQ61 VSS
5 M_A_DQ62 192 65
1

C1419 C1420 C1421 C1422 DQ62 VSS


DY 194 66
2

5 M_A_DQ63 DQ63 VSS


DY DY 71
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VSS
10 72
2

5 M_A_DQS#0 DQS0# VSS


5 M_A_DQS#1 27 127
DQS1# VSS
5 M_A_DQS#2 45 128
DQS2# VSS
5 M_A_DQS#3 62 133
DQS3# VSS
5 M_A_DQS#4 135 134
DQS4# VSS 1D5V_S3
5 M_A_DQS#5 152
DQS5# VSS
138 SODIMM A DECOUPLING
5 M_A_DQS#6 169 139
DQS6# VSS
5 M_A_DQS#7 186 144
DQS7# VSS
145
VSS
5 M_A_DQS0 12 150

1
DQS0 VSS C1403 C1404 C1405 C1406 C1407 C1408 C1409 C1410
5 M_A_DQS1 29 151
DQS1 VSS
47 155 DY DY DY DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
5 M_A_DQS2 DQS2 VSS
64 156

2
5 M_A_DQS3 DQS3 VSS
5 M_A_DQS4 137 161
M_A_RST# DQS4 VSS
5 M_A_DQS5 154 162
DQS5 VSS
5 M_A_DQS6 171 167
1

C1425 DQS6 VSS


5 M_A_DQS7 188 168
SCD1U10V2KX-5GP DQS7 VSS
DY 172
VSS
116 173
2

5 M_A_DIM0_ODT0 ODT0 VSS


5 M_A_DIM0_ODT1 120 178
ODT1 VSS
179
VSS
DDR_VREF_S3 126 184 Layout Note:
1

1
VREF_CA VSS C1414 C1415 C1416 C1417
1 185
VREF_DQ VSS
189
Place these Caps near SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VSS
5 M_A_RST# 30 190 SO-DIMMA.
2

2
RESET# VSS
195
VSS
196
VSS
0D75V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS
Intel HR channel A & B RST tied toghter
AMD have to separate channel A & B H =8mm
DDR3-204P-107-GP
A A
62.10024.C21

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 14 of 102
5 4 3 2 1
5 4 3 2 1

DM2

5 M_B_A0 98 NP1
A0 NP1
5 M_B_A1 97 NP2
A1 NP2
5 M_B_A2 96
A2
5 M_B_A3 95 110 M_B_RAS# 5
A3 RAS#
D 5 M_B_A4 92 113 M_B_WE# 5 D
A4 WE#
5 M_B_A5 91 115 M_B_CAS# 5
A5 CAS#
5 M_B_A6 90
A6 3D3V_S0
5 M_B_A7 86 114 M_B_DIM0_CS#0 5
A7 CS0#
5 M_B_A8 89 121 M_B_DIM0_CS#1 5
A8 CS1#
5 M_B_A9 85
A9
5 M_B_A10 107 73 M_B_DIM0_CKE0 5

1
A10/AP CKE0
5 M_B_A11 84 74 M_B_DIM0_CKE1 5
A11 CKE1 R1501
5 M_B_A12 83
A12 10KR2J-3-GP
5 M_B_A13 119 101 M_B_DIM0_CLK_DDR0 5
A13 CK0
5 M_B_A14 80 103 M_B_DIM0_CLK_DDR#0 5
A14 CK0#
78

2
5 M_B_A15 A15
5 M_B_BS2 79 102 M_B_DIM0_CLK_DDR1 5
A16/BA2 CK1 SA0_DIM1
104 M_B_DIM0_CLK_DDR#1 5
CK1#
5 M_B_BS0 109
BA0 SA1_DIM1
5 M_B_BS1 108 11 M_B_DM0 5
BA1 DM0
28 M_B_DM1 5
DM1
5 M_B_DQ0 5 46 M_B_DM2 5

2
DQ0 DM2
5 M_B_DQ1 7 63 M_B_DM3 5
DQ1 DM3 R1502
5 M_B_DQ2 15 136 M_B_DM4 5
DQ2 DM4 0R0402-PAD
5 M_B_DQ3 17 153 M_B_DM5 5
DQ3 DM5
5 M_B_DQ4 4
DQ4 DM6
170 M_B_DM6 5 Intel HR DM tied to GND
6 187 AMD still following previous design

1
5 M_B_DQ5 DQ5 DM7 M_B_DM7 5
5 M_B_DQ6 16
DQ6
5 M_B_DQ7 18 200 PCH_SMBDATA 14,65,66
DQ7 SDA
5 M_B_DQ8 21 202 PCH_SMBCLK 14,65,66
DQ8 SCL
5 M_B_DQ9 23
DQ9 3D3V_S0
5 M_B_DQ10 33
DQ10 EVENT#
198 M_B_EVENT# 5 Intel HR B channel address is 01
5 M_B_DQ11 35 AMD B channel address is 10
DQ11
5 M_B_DQ12 22 199
DQ12 VDDSPD
5 M_B_DQ13 24

2
DQ13 SA0_DIM1
5 M_B_DQ14 34 197
DQ14 SA0 SA1_DIM1 C1501 C1502
5 M_B_DQ15 36
DQ15 SA1
201 DY
39 SCD1U10V2KX-5GP SC2D2U10V3KX-1GP

1
5 M_B_DQ16 DQ16
5 M_B_DQ17 41 77
DQ17 NC#1
5 M_B_DQ18 51 122
DQ18 NC#2 1D5V_S3
5 M_B_DQ19 53 125
DQ19 NC#/TEST
5 M_B_DQ20 40
DQ20
5 M_B_DQ21 42 75
DQ21 VDD1
5 M_B_DQ22 50 76
DQ22 VDD2
5 M_B_DQ23 52 81
DQ23 VDD3
C
5 M_B_DQ24 57 82 C
DQ24 VDD4
5 M_B_DQ25 59 87
DQ25 VDD5
5 M_B_DQ26 67 88
DQ26 VDD6
5 M_B_DQ27 69 93
DQ27 VDD7
5 M_B_DQ28 56 94
DQ28 VDD8
5 M_B_DQ29 58 99
DQ29 VDD9
5 M_B_DQ30 68 100
DQ30 VDD10
5 M_B_DQ31 70 105
DDR_VREF_S3 DQ31 VDD11
5 M_B_DQ32 129 106
DQ32 VDD12
5 M_B_DQ33 131 111
DQ33 VDD13
5 M_B_DQ34 141 112
DQ34 VDD14
5 M_B_DQ35 143 117
DQ35 VDD15
5 M_B_DQ36 130 118
DQ36 VDD16
5 M_B_DQ37 132 123
DQ37 VDD17
5 M_B_DQ38 140 124
DQ38 VDD18
5 M_B_DQ39 142
DQ39 1D5V_S3
5 M_B_DQ40 147 2
1

C1515 C1516 C1517 DQ40 VSS


5 M_B_DQ41 149 3
SCD1U10V2KX-5GP SCD1U10V2KX-5GP DQ41 VSS
157 8 SODIMM B DECOUPLING
SC1U6D3V2KX-GP

5 M_B_DQ42 DQ42 VSS


DY 159 9
2

5 M_B_DQ43 DQ43 VSS


5 M_B_DQ44 146 13
DQ44 VSS
5 M_B_DQ45 148 14

1
DQ45 VSS C1503 C1504 C1505 C1506 C1507 C1508 C1509 C1510
5 M_B_DQ46 158 19
DQ46 VSS
160 20 DY DY DY DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
5 M_B_DQ47

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
DQ47 VSS
163 25

2
5 M_B_DQ48 DQ48 VSS
5 M_B_DQ49 165 26
DQ49 VSS
5 M_B_DQ50 175 31
DQ50 VSS
5 M_B_DQ51 177 32
DQ51 VSS
5 M_B_DQ52 164 37
DQ52 VSS
5 M_B_DQ53 166 38
DQ53 VSS
5 M_B_DQ54 174 43
DQ54 VSS
Place these caps 5 M_B_DQ55 176
DQ55 VSS
44
181 48
0D75V_S0 close to VTT1 and 5 M_B_DQ56
183
DQ56 VSS
49
5 M_B_DQ57

1
DQ57 VSS
VTT2. 5 M_B_DQ58 191
DQ58 VSS
54 Layout Note: C1511 C1512 C1513
193 55 C1514

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
5 M_B_DQ59
180
DQ59 VSS
60
Place these Caps near SCD1U10V2KX-5GP

2
5 M_B_DQ60 DQ60 VSS
5 M_B_DQ61 182
DQ61 VSS
61 SO-DIMMB.
C1518 C1519 C1520 C1521 5 M_B_DQ62 192 65
1

DQ62 VSS
5 M_B_DQ63 194 66
DY DY DQ63 VSS
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

71
B VSS B
10 72
2

5 M_B_DQS#0 DQS0# VSS


5 M_B_DQS#1 27 127
DQS1# VSS
5 M_B_DQS#2 45 128
DQS2# VSS
5 M_B_DQS#3 62 133
DQS3# VSS
5 M_B_DQS#4 135 134
DQS4# VSS
5 M_B_DQS#5 152 138
DQS5# VSS
5 M_B_DQS#6 169 139
DQS6# VSS
5 M_B_DQS#7 186 144
DQS7# VSS
145
VSS
5 M_B_DQS0 12 150
DQS0 VSS
5 M_B_DQS1 29 151
DQS1 VSS
5 M_B_DQS2 47 155
DQS2 VSS
5 M_B_DQS3 64 156
DQS3 VSS
5 M_B_DQS4 137 161
DQS4 VSS
5 M_B_DQS5 154 162
DQS5 VSS
5 M_B_DQS6 171 167
DQS6 VSS
5 M_B_DQS7 188 168
DQS7 VSS
172
M_B_RST# VSS
5 M_B_DIM0_ODT0 116 173
ODT0 VSS
5 M_B_DIM0_ODT1 120 178
1

C1522 ODT1 VSS


179
DY SCD1U10V2KX-5GP VSS
DDR_VREF_S3 126 184
VREF_CA VSS
1 185 SO-DIMMB is placed farther from
2

VREF_DQ VSS
189
30
VSS
190
the Processor than SO-DIMMA
5 M_B_RST# RESET# VSS
195
VSS
196
VSS
0D75V_S0 203 205
VTT1 VSS
Intel HR channel A & B RST tied toghter 204
VTT2 VSS
206
AMD have to separate channel A & B
H = 4mm
DDR3-204P-106-GP

62.10017.X31

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 15 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 16 of 102
5 4 3 2 1
5 4 3 2 1

PCH1E Part 5 of 5
3D3V_S0 3D3V_S0 3D3V_S0

1
C1716
SC150P50V2KX-GP PCIE_RST#_C AE2 AF3
PCIE_RST# PCICLK0

2
27,36 PLT_RST#_ARST 1 R1717 2 A_RST#_R AD5 AF1 PCI_CLK1 21

2
33R2J-2-GP A_RST# PCICLK1/GPO36 R1731 R1727 R1723
AF5
C1707 1 SCD1U16V2KX-3GP A_RX0P_C PCICLK2/GPO37 PCI_CLK3_R R1714
4 UMI_FCH_APU_RX0P 2 AE30 AG2 1 222R2J-2-GP CLK_PCI_LPC 21,65,71 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
UMI_TX0P PCICLK3/GPO38

1
C1708 1 2 SCD1U16V2KX-3GP A_RX0N_C AE32 AF6 PCI_CLK4_R R1715 1 20R0402-PAD Zero ODD UMA UMA
4 UMI_FCH_APU_RX0N UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 21

PCI CLKS
C1709 1 2 SCD1U16V2KX-3GP A_RX1P_C AD33 DY C1717
4 UMI_FCH_APU_RX1P

1
C1710 1 SCD1U16V2KX-3GP A_RX1N_C UMI_TX1P SCD1U16V2ZY-2GP ZP_ODD PX4_SUPPORT dGPU_PRSNT#
4 UMI_FCH_APU_RX1N 2 AD31 AB5

2
C1711 1 SCD1U16V2KX-3GP A_RX2P_C UMI_TX1N PCIRST#
4 UMI_FCH_APU_RX2P 2 AD28
UMI_TX2P

2
C1712 1 2 SCD1U16V2KX-3GP A_RX2N_C AD29 DY
4 UMI_FCH_APU_RX2N UMI_TX2N
C1713 1 2 SCD1U16V2KX-3GP A_RX3P_C AC30 AJ3 C1718 R1732 R1728 R1722
4 UMI_FCH_APU_RX3P UMI_TX3P AD0/GPIO0 SCD1U16V2ZY-2GP
C1714 1 2 SCD1U16V2KX-3GP A_RX3N_C AC32 AL5 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
4 UMI_FCH_APU_RX3N

2
UMI_TX3N AD1/GPIO1
D AD2/GPIO2
AG4 Non Zero ODD BACO MUXLESS D
4 UMI_APU_FCH_TX0P AB33 AL6

1
UMI_RX0P AD3/GPIO3
4 UMI_APU_FCH_TX0N AB31 AH3
UMI_RX0N AD4/GPIO4

1
4 UMI_APU_FCH_TX1P AB28 AJ5
UMI_RX1P AD5/GPIO5 C1719
4 UMI_APU_FCH_TX1N AB29 UMI_RX1N AD6/GPIO6 AL1 DY SCD1U16V2ZY-2GP
Y33 AN5 VRAM_800_900
4 UMI_APU_FCH_TX2P

2
UMI_RX2P AD7/GPIO7 dGPU_PRSNT#
4 UMI_APU_FCH_TX2N Y31 UMI_RX2N AD8/GPIO8 AN6 for SW Jin define
Y28 AJ1 PX4_SUPPORT
4 UMI_APU_FCH_TX3P UMI_RX3P AD9/GPIO9
Y29 AL8 ZP_ODD
4 UMI_APU_FCH_TX3N UMI_RX3N AD10/GPIO10
AD11/GPIO11 AL3
1 R1708 2 APU_PCIE_CALRP AF29 AM7 3D3V_S0
590R2F-GP APU_PCIE_CALRN PCIE_CALRP AD12/GPIO12
1D1V_S0 1 2 AF31 PCIE_CALRN AD13/GPIO13 AJ6

PCI EXPRESS INTERFACES


R1709 AK7
AD14/GPIO14

2
2KR2F-3-GP V33 AN8
GPP_TX0P AD15/GPIO15 R1729
V31 GPP_TX0N AD16/GPIO16 AG9
W30 AM11 10KR2J-3-GP
GPP_TX1P AD17/GPIO17
W32
GPP_TX1N AD18/GPIO18
AJ10 800MHz
AB26 AL12

1
GPP_TX2P AD19/GPIO19 VRAM_800_900
AB27 AK11
GPP_TX2N AD20/GPIO20
AA24 AN12
GPP_TX3P AD21/GPIO21

2
AA23 AG12 Debug Strap 3D3V_S0
GPP_TX3N AD22/GPIO22 R1730
AE12 PCI_AD23 21
AD23/GPIO23 10KR2J-3-GP
AA27 AC12 DY

PCI INTERFACE
GPP_RX0P AD24/GPIO24 PCI_AD24 21
AA26
GPP_RX0N AD25/GPIO25
AE13 PCI_AD25 21 900MHz

1
C1721
W27 AF13 PCI_AD26 21 BACO

1
GPP_RX1P AD26/GPIO26 R1726 SC1U6D3V2KX-GP
V27 AH13 PCI_AD27 21
GPP_RX1N AD27/GPIO27
V26 AH14 DGPU_PWROK_1 1 0R2J-2-GP
2 DGPU_PWROK 86,92,93

2
GPP_RX2P AD28/GPIO28
W26 AD15 U1701
GPP_RX2N AD29/GPIO29
W24 AC15
GPP_RX3P AD30/GPIO30
W23 AE16 1 5
GPP_RX3N AD31/GPIO31 PCIE_RST#_C NC#1 VCC
CBE0#
AN3 2
A DY
AJ8 3 4 BUFO_CPU_RST# 1 R1718 2 PLT_RST# 9,31,65,66,71,83,97
R1710 CBE1# GND Y 0R0402-PAD
AN10
C CBE2# C
1D1V_S0 1 2KR2F-3-GP
2 CLK_CALRN F27 CLK_CALRN CBE3# AD12

1
AG10 74LVC1G07DC-GP C1715
FRAME# SC150P50V2KX-GP
DEVSEL# AK9
G30 AL10 3D3V_S0 3D3V_S0 R1716

2
EXT clock_Gen PCIE_RCLKP IRDY#
G28 AF10 1 33R2J-2-GP
2
PCIE_RCLKN TRDY#
PAR AE10

2
RN1702 2 3 SRN0J-6-GP FCHDISP_CLKP_R R26 AH1
6 DISP_CLKP DISP_CLKP STOP#

2
1 4 FCHDISP_CLKN_R T26 AM9 R1725
6 DISP_CLKN DISP_CLKN PERR#
AH8 R1724 10KR2J-3-GP
RN1703 2 SERR#
9 TRAVIS_REFCLKP 3 SRN0J-6-GP FCHTRVS_CLKP_R H33 AG15 10KR2J-3-GP DY
FCHTRVS_CLKN_R DISP2_CLKP REQ0#
9 TRAVIS_REFCLKN 1 4 H31 AG13 DY

1
DISP2_CLKN REQ1#/GPIO40
AF15

1
RN1704 2 REQ2#/CLK_REQ8#/GPIO41
6 APU_CLKP 3 SRN0J-6-GP FCHAPU_CLKP_R T24 APU_CLKP REQ3#/CLK_REQ5#/GPIO42 AM17 GPIO42 1
TP1704 Muxless support
1 4 FCHAPU_CLKN_R T23 AD16
6 APU_CLKN APU_CLKN GNT0#
GNT1#/GPO44
AD13 PE_GPIO0 83 PE_GPIO0 ->VGA_RESET LDT_STP# connection is just
1 4 FCHGFX_CLKP_R J30 AD21 PE_GPIO1 ->VGA_PowerEnable
83 CLK_PCIE_VGA SLT_GFX_CLKP GNT2#/SD_LED/GPO45 PE_GPIO1 93 for chipset automation purpose.
2 3 FCHGFX_CLKN_R K29 AK17 GPIO46 1
83 CLK_PCIE_VGA# RN1705 SRN0J-6-GP SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 TP1705
CLKRUN#
AD19 PM_CLKRUN# 27 It is an automatic test for
H27 AH9
NEW H28
GPP_CLK0P LOCK#
PM_CLKRUN# AMD validation team only
GPP_CLK0N
AF18
RN1706 2 INTE#/GPIO32 3D3V_S0
65 CLK_PCIE_WLAN 3 SRN0J-6-GP CLK_MINI1_R J27 AE18 checklist:No PU Res
WLAN CLK_MINI1#_R GPP_CLK1P INTF#/GPIO33
65 CLK_PCIE_WLAN# 1 4 K26
GPP_CLK1N INTG#/GPIO34
AC16 DY Integrated Resistor PU10K
AD18 SATA_ODD_R_DA# 1 R1734 2 SATA_ODD_DA# 27,56
INTH#/GPIO35 0R2J-2-GP PM_CLKRUN#
F33 2 R1721 1
3G GPP_CLK2P 10KR2J-3-GP
F31
GPP_CLK2N C1701 SC10P50V2JN-4GP
1 DY 2 DY
RN1708 2 3 SRN0J-6-GP LAN_CLK_R E33 RFC1702 1 DY 2 SC22P50V2JN-4GP
31 CLK_PCIE_LAN GPP_CLK3P
LAN 31 CLK_PCIE_LAN# 1 4 LAN_CLK#_R E31 B25 LPCCLK0_R R1719 1 222R2J-2-GP LPC_CLK0 21,27
INT_SERIRQ 2 R1733 1
GPP_CLK3N LPCCLK0 LPCCLK1_R R1720 1
D25 20R2J-2-GP 10KR2J-3-GP
CLOCK GENERATOR

LPCCLK1 LPC_CLK1 21
M23 D27 LPC_AD0 DY
GPP_CLK4P LAD0 LPC_AD0 27,65,71
M24 C28 LPC_AD1
GPP_CLK4N LAD1 LPC_AD1 27,65,71
LPC

B LPC_AD2 SATA_ODD_R_DA# B
GPP CLK port Device CLKREQ# A26 LPC_AD2 27,65,71 2 R1735 1
LAD2 LPC_AD3 10KR2J-3-GP
M27 A29 LPC_AD3 27,65,71
GPP_CLK5P LAD3
0 New Card 0 M26 GPP_CLK5N LFRAME# A31 LPC_FRAME# 27,65,71 DY
B27
LDRQ0#
1 WLAN 1 N25 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AE27
N26 AE19 INT_SERIRQ
GPP_CLK6N SERIRQ/GPIO48 INT_SERIRQ 27
2 2
R23 C1702
GPP_CLK7P SC10P50V2JN-4GP
3 LAN 3 R24
GPP_CLK7N
G25 32K_X1 1 2
DMA_ACTIVE# ALLOW_STOP 6
4 X N27 GPP_CLK8P PROCHOT# E28 APU_PROCHOT# 6
R27 E26
APU

GPP_CLK8N APU_PG H_CPUPWRGD_E 6,36,71


5 X LDT_STP#
G26
F26 APU_RST# 6
APU_RST#

3
6 X J26 14M_25M_48M_OSC R1703 X1702
7 X G2 32K_X1 20MR3-GP X-32D768KHZ-34GPU
32K_X1
82.30001.661
8 X 25M_X1 C31 G4 32K_X2

2
25M_X1 32K_X2
1 R1706 2 PM_SUS_CLK 27

2
H7 0R0402-PAD
S5_CORE_EN
F1 RTC_CLK 21
RTCCLK
S5 PLUS

25M_X2 C33 F3 INTRUDER_ALERT# 1 C1703


25M_X2 INTRUDER_ALERT# TP1701
E6 RTC_AUX_S5 32K_X2 1 2
VDDBT_RTC_G
SC8P50V2DN-1GP
25M_X1 71.HUDM2.M01
1

C1720
R1701 G1701 C1706 SC1U6D3V2KX-GP
CL = 7pF
1 1MR2J-1-GP 25M_X2 GAP-OPEN
SCD1U16V2ZY-2GP

2 DY DY Freq tolertance :+/- 20 ppm


2

X1701 SC10P50V2JN-4GP 2 DY 1 RFC1722 CLK_PCIE_VGA


2

A SC10P50V2JN-4GP RFC1723 CLK_PCIE_VGA# A


1 2 2 DY 1 <Variant Name>
SC10P50V2JN-4GP 2 DY 1 RFC1724 CLK_PCIE_WLAN
XTAL-25MHZ-102-GP SC10P50V2JN-4GP 2 DY 1 RFC1725 CLK_PCIE_WLAN# for RTC Leakage
2

82.30020.851
C1704 2ND = 82.30020.791 C1705 Wistron Corporation
SC12P50V2JN-3GP 3RD = 82.30020.A31 SC12P50V2JN-3GP SC10P50V2JN-4GP 2 DY 1 RFC1728 CLK_PCIE_LAN 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

SC10P50V2JN-4GP 2 DY 1 RFC1729 CLK_PCIE_LAN# Taipei Hsien 221, Taiwan, R.O.C.

for RF Title
CL = 12pF HUDSON-M2(1/6)
Size Document Number Rev
Freq tolertance :+/- 30ppm Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 17 of 102

5 4 3 2 1
5 4 3 2 1

3D3V_S5

RN1802
4 1 SCLK1
SDATA1 PCH1A Part 1 of 5
3 2
AB6 G8
SRN10KJ-5-GP PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
R2 RI#/GEVENT22# USB_RCOMP 2 R1819 1

USB MISC
W7 B9
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP 11K8R2F-GP
27,36,45,46,92 PM_SLP_S3# T3 SLP_S3#
1 R1845 2 DY VGA_PD 27,46 PM_SLP_S5# W2 H1
10KR2J-3-GP PM_PWRBTN#_R SLP_S5# USB_FSD1P/GPIO186
27,97 PM_PWRBTN# 1 R1809 2 J4 H3
PM_RSMRST# PWR_BTN# USB_FSD1N
D 2 R1825 1 36 FCH_PWRGD
0R0402-PAD N7 PWR_GOOD D
integrated PU 100KR2J-1-GP H6
FCH_TEST0 USB_FSD0P/GPIO185
TP1801 1 T9 H5

USB 1.1
TEST0 USB_FSD0N
DY TP1802 1 FCH_TEST1 T10
TEST1/TMS
1 R1824 2 10KR2J-3-GP EC_SCI# TP1803 1 FCH_TEST2 V9 H10
EC_SWI# EC_A20M#_R TEST2 USB_HSD13P
1 R1833 2 10KR2J-3-GP R1814 1 0R0402-PAD
2 AE22 G10

ACPI / WAKE UP EVENTS


27 KA20GATE GA20IN/GEVENT0# USB_HSD13N
DY R1813 1 2 EC_KB_RST#_R AG19
27 KBRCIN# KBRST#/GEVENT1#
0R0402-PAD EC_SCI# R9 K10
27 EC_SCI# LPC_PME#/GEVENT3# USB_HSD12P
1 R1843 2 PM_PWRBTN# C26 J12
10KR2J-3-GP LPC_SMI#/GEVENT23# USB_HSD12N
T5 LPC_PD#/GEVENT5#
U4
SYS_RESET#/GEVENT19# USB_HSD11P
G12 USB
1 R1839 2 PCIE_WAKE# PCIE_WAKE# K1 F12
31,65,66 PCIE_WAKE# WAKE#/GEVENT8# USB_HSD11N
10KR2J-3-GP V7 Pair Device
R1820 FCH_THERMTRIP# IR_RX1/GEVENT20#
6,36,85 H_THERMTRIP# 1 0R0402-PAD
2 R10 K12 USB_PP10 62
THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P
1 R1841 2 PCIE_CLK_LAN_REQ# integrated PU 3D3V_S0 1 R1815 2 WD_PWRGD AF19 K13 USB_PN10 62 0 USB3
WD_PWRGD USB_HSD10N
DY10KR2J-3-GP (FCH Rev 1.2 updated)
10KR2J-3-GP
PM_RSMRST# U2 B11 1 WLAN/WiMAX
RSMRST# USB_HSD9P USB_PP9 64
integrated PU is not USB_HSD9N D11 USB_PN9 64
supported when the pin AG24 CLK_REQ4#/SATA_IS0#/GPIO64 2 USB2(IO Board)

1
C1802 DY 1 R1829 2 PCIE_CLK_LAN_RQ1#_R AE24 E10 USB_PP8 1 TP1804
31 PCIE_CLK_LAN_REQ# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P
if configured for USB OC SCD1U10V2KX-5GP 0R0402-PAD AE26 F10 USB_PN8 1 TP1805 3 Bluetooth
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N
(FCH Rev 1.2 updated) AF22

2
FCH_GPIO55 CLK_REQ0#/SATA_IS3#/GPIO60
9 TRAVIS_EN# 1 R1842 2 AH17 C10 USB_PP7 49 4 WWAN
3D3V_S0 0R0402-PAD SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P
AG18 A10 USB_PN7 49
R1840 HDA_SPKR_R SATA_IS5#/FANIN3/GPIO59 USB_HSD7N
29 HDA_SPKR 1 2 AF24 5 Card Reader(IO Board)
0R0402-PAD SPKR/GPIO66
integrated PU 14 SMB_CLK AD26
SCL0/GPIO43 USB_HSD6P
H9 USB_PP6 57
DY 14 SMB_DATA AD25 G9 USB_PN6 57 6 E-SATA
KA20GATE SCLK1 SDA0/GPIO47 USB_HSD6N
1 R1837 2 10KR2J-3-GP 9 TRAVIS_EN# 1 R1846 2 T7
SCL1/GPIO227

USB 2.0
1 R1838 2 10KR2J-3-GP KBRCIN# 0R2J-2-GP SDATA1 R7 A8 7 CCD
SDA1/GPIO228 USB_HSD5P USB_PP5 82
DY AMD define two function pin DY AG25
CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N
C8 USB_PN5 82
R1834 1 0R0402-PAD
2 CLK_PCIE_WLAN_REQ#_R AG22 8 NC

GPIO
on same pin in CRB 65 CLK_PCIE_WLAN_REQ#
R1807 1 0R0402-PAD
2 dGPU_LED_C J2
CLK_REQ1#/FANOUT4/GPIO61
F8
78 dGPU_LED IR_LED#/LLB#/GPIO184 USB_HSD4P USB_PP4 66
base on AMD suggestion, AG26 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N E8 USB_PN4 66 9 Finger Print
20 VGA_PD V8
RN1801 DDR3_RST#/GEVENT7#/VGA_PD
make sure Travis_EN# function first W8
GBE_LED0/GPIO183 USB_HSD3P
C6 USB_PP3 63 10 USB1(USB3.0)
1 4 SMB_CLK Y6 A6
SMB_DATA so confrim function work nornally or not SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N USB_PN3 63
2 3 V10
GBE_LED2/GEVENT10# 11 NC
C on GPIO66,if work nornally, AA8 C5 USB_PP2 82 C
SRN2K2J-1-GP CLKREQG# GBE_STAT0/GEVENT11# USB_HSD2P
BIOS can re-programming pin to GPIO55 85 PEG_CLKREQ# 1 R1822 2 AF25 A5 USB_PN2 82 12 NC
0R2J-2-GP CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N
(DYR1841,stuff R1842) C1 13 NC
USB_HSD1P USB_PP1 65
and change Travis_EN# to GPIO55 in the furtur USB_OC7# DY
1 R1832 2 USB_OC7#_R M7 C3
BLINK/USB_OC7#/GEVENT18# USB_HSD1N USB_PN1 65
0R2J-2-GP EC_SWI# R8
keep Gevent4# for PCIE_RST2 used 27 EC_SWI#
1 R1830 2 SATA_ODD_PRSNT#_R T1
USB_OC6#/IR_TX1/GEVENT6#
E1
56 SATA_ODD_PRSNT# USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P USB_PP0 82
0R2J-2-GP P6 E3
56 ODD_DA_Q USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N USB_PN0 82
62 USB_OC#3_0 F5
USB_OC3#/AC_PRES/TDO/GEVENT15#
82 USB_OC#2_9 P5 C16 USBSS_CALRP R1817 1 USB3 2 1KR2F-3-GP
USB_OC2#/TCK/GEVENT14# USBSS_CALRP
61 USB_OC#1_8 J7 A16 USBSS_CALRN R1818 1 USB3 2 1KR2F-3-GP 1D1V_S5
USB_OC1#/TDI/GEVENT13# USBSS_CALRN
T8

USB OC
62 USB_OC#0_6 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
A14
USB_SS_TX3P
C14
USB_SS_TX3N
1 R1803 2 33R2J-2-GP HDA_BITCLK AB3 C12
29 HDA_CODEC_BITCLK AZ_BITCLK USB_SS_RX3P
1 R1804 2 33R2J-2-GP HDA_SDOUT AB1 A12
29 HDA_CODEC_SDOUT AZ_SDOUT USB_SS_RX3N
RN1804 HDA_CODEC_SDIN0 AA2
29 HDA_CODEC_SDIN0 AZ_SDIN0/GPIO167
1 10 3D3V_S5 DY Y5 D15
USB_OC#0_6 AZ_SDIN1/GPIO168 USB_SS_TX2P
2 9 2 1 EC1802 Y3 B15
USB_OC#2_9 SC180P50V2JN-1GP AZ_SDIN2/GPIO169 USB_SS_TX2N
3 8 Y1
USB_OC7# USB_OC#1_8 HDA_SYNC AZ_SDIN3/GPIO170

HD AUDIO
4 7 29 HDA_CODEC_SYNC 1 R1805 2 33R2J-2-GP AD6 E14
USB_OC#3_0 HDA_RST# AZ_SYNC USB_SS_RX2P
3D3V_S5 5 6 29 HDA_CODEC_RST# 1 R1806 2 33R2J-2-GP AE4 F14
AZ_RST# USB_SS_RX2N
SRN10KJ-L3-GP EC1801 F15
USB_SS_TX1P
1

DY SC180P50V2JN-1GP K19 G15

USB 3.0
PS2_DAT/SDA4/GPIO187 USB_SS_TX1N
J19
PS2_CLK/CEC/SCL4/GPIO188
J21 H13
2

SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P
G13
USB_SS_RX1N
D21 J16 USB_TX0P 62
PS2KB_DAT/GPIO189 USB_SS_TX0P
C20 H16 USB_TX0N 62
PS2KB_CLK/GPIO190 USB_SS_TX0N
D23
C22
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192 USB_SS_RX0P
J15 USB_RX0P 62
USB3.0
K15 USB_RX0N 62
USB_SS_RX0N
RN1803 F21
HDA_CODEC_SDIN0 KSO_0/GPIO209 SCL2 RN1805
B 8 1 Function Name Integrated Resistor External Resistor E20 KSO_1/GPIO210 SCL2/GPIO193 H19 B
7 2 HDA_CODEC_BITCLK F20 G19 SDAT2 SCL2 4 1
KSO_2/GPIO211 SDA2/GPIO194 SCLK3 SDAT2
6 DY 3 GA20IN H_A20GATE 8.2K PU 10K PU 3.3_S0 DY A22
KSO_3/GPIO212 SCL3_LV/GPIO195
G22 SCLK3 6 3 2
5 4 HDA_CODEC_RST# E18 G21 SDATA3
KSO_4/GPIO213 SDA3_LV/GPIO196 SDATA3 6
A20 E22 SRN10KJ-5-GP
SRN10KJ-6-GP KBRST# H_RCIN# 8.2K PU 10K PU 3.3_S0 DY J18
KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197
H22
KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198
PME# EC_SCI# 10K PU 10K PU 3.3_S5 DY H18
KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
J22 EC_PWM2 21 If not used SMBUS or GPIO ,PD 10K
Checklist suggestion G18
KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200
H21
do not stuff by default B21
THRIPTRIP# H_THERMTRIP# 10K PU 10K PU 3.3_S5 DY K18
KSO_9/GPIO218
K21
KSO_10/GPIO219 EMBEDDED CTRL KSI_0/GPIO201
D19 K22
PCIE_RST2# FCH_PCIE_RST# 10K PU A18
KSO_11/GPIO220 KSI_1/GPIO202
F22
KSO_12/GPIO221 KSI_2/GPIO203
Gevent5 MEM_Hot# 10K PU C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
B19 E24 3D3V_S5
KSO_14/XDB0/GPIO223 KSI_4/GPIO205
B17 B23
Gevent6 EC_SWI# 10K PU 10K PU 3.3_S5 DY A24
KSO_15/XDB1/GPIO224 KSI_5/GPIO206
C24 RN1806
KSO_16/XDB2/GPIO225 KSI_6/GPIO207 SCLK3
D17 F18 4 1
WAKE# PCIE_WAKE# 10K PU 10K PU 3.3_S5 DY KSO_17/XDB3/GPIO226 KSI_7/GPIO208 SDATA3 3 2
USB_OC0# USB_OC0# 10K PU SRN10KJ-5-GP
USB_OC1# USB_OC1# 10K PU 71.HUDM2.M01
USB_OC2# USB_OC2# 10K PU
Gevent15# SATA_ODD_PRSNT# 10K PU
Gevent16# ODD_DA 10K PU 3D3V_AUX_S5

USB_OC5# USB_OC5# 10K PU


2 R1826 1
Gevent17# EC_SWI# 10K PU 10K PU 3.3_S0 DY 100KR2J-1-GP
USB_OC7# USB_OC7# 10K PU
2

R1827
LPC_SMI# EC_SMI# 8.2K PU 10K PU 3.3_S5 DY 10KR2J-3-GP Q1828
4 3 PM_RSMRST# 1 R1831 2
A GPIO35 SATA_ODD_DA# 8.2K PU 100R2J-2-GP
RSMRST#_KBC 27 A
1

51123_PGOOD_2 5 2
SERIRQ INT_SERIRQ 8.2K PU 10K PU 3.3_S0 DY 3V_5V_POK 41,45

CLK_REQ0 CLK_PCIE_NEW_REQ# 8.2K PU 6 1 <Variant Name>


2N7002KDW-GP
CLK_REQ1 CLK_PCIE_WLAN_REQ# 8.2K PU
84.2N702.A3F
CLK_REQ2 CLK_PCIE_WWAN_REQ# 8.2K PU 2nd = 84.DM601.03F Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CLK_REQ3 PCIE_CLK_LAN_RQ1# 8.2K PU
Title
CLK_REQG PEG_CLKREQ# 8.2K PU
HUDSON-M2(2/6)
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 18 of 102
5 4 3 2 1
5 4 3 2 1

Part 2 of 5
PCH1B

R9413 0R0402-PAD
SATA_TXP0 1 2 SATA_TXP0_R AK19 AL14
66 SATA_TXP0 SATA_TXN0 SATA_TXN0_R AM19 SATA_TX0P SD_CLK/SCLK_2/GPIO73
66 SATA_TXN0 1 2 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 AN14
SSD R9414 0R0402-PAD AJ12
SD_CD#/GPIO75
66 SATA_RXN0 AL20 SATA_RX0N SD_WP/GPIO76 AH12
66 SATA_RXP0 AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13
AM13

SD CARD
SD_DATA1/SDATO_2/GPIO78
56 SATA_TXP1 AN22 AH15
SATA_TX1P SD_DATA2/GPIO79
56 SATA_TXN1 AL22 SATA_TX1N SD_DATA3/GPIO80 AJ14
D SATA ODD AH20 AC4 GBE_COL D
56 SATA_RXN1 SATA_RX1N GBE_COL GBE_CRS
56 SATA_RXP1 AJ20 SATA_RX1P GBE_CRS AD3
AD9
GBE_MDCK GBE_MDIO
57 SATA_TXP2 AJ22 W10 1 R1920 2 3D3V_S5
SATA_TX2P GBE_MDIO 10KR2J-3-GP
57 SATA_TXN2 AH22 AB8
SATA_TX2N GBE_RXCLK
E-SATA AM23
GBE_RXD3 AH7
AF7
57 SATA_RXN2 SATA_RX2N GBE_RXD2
AK23 AE7 RN1903
57 SATA_RXP2 SATA_RX2P GBE_RXD1
GBE_RXD0 AD7 8 1
56 SATA_TXP3 AH24 AG8 7 2
SATA_TX3P GBE_RXCTL/RXDV GBE_RXERR
56 SATA_TXN3 AJ24 SATA_TX3N GBE_RXERR AD1 6 3
HDD GBE_TXCLK AB7 5 4

GBE LAN
56 SATA_RXN3 AN24 SATA_RX3N GBE_TXD3 AF9
AL24 AG6 SRN10KJ-6-GP
56 SATA_RXP3 SATA_RX3P GBE_TXD2
GBE_TXD1 AE8
AL26 AD8
SATA_TX4P GBE_TXD0 R1922
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
AC2 10KR2F-2-GP
GBE_PHY_PD
AJ26 SATA_RX4N GBE_PHY_RST# AA7 1 2 3D3V_S5
AH26 W9 GBE_PHY
SATA_RX4P GBE_PHY_INTR
AN29
SATA_TX5P
1 DY
R1923
2
AL28 SATA_TX5N SPI_DI/GPIO164 V6
V5 10KR2F-2-GP
SPI_DO/GPIO163
AK27 V3
SATA_RX5N SPI_CLK/GPIO162

SERIAL ATA
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6

SPI ROM
V1
ROM_RST#/SPI_WP#/GPIO161
AL29 NC#AL29
AN31 R1904 1 2150R2F-1-GP
NC#AN31
VGA_RED L30 CRT_RED 50
AL31 R1905 1 2150R2F-1-GP
NC#AL31
AL33 NC#AL33 VGA_GREEN L32 CRT_GREEN 50
C R1906 1 C
2150R2F-1-GP
AH33 M29 CRT_BLUE 50
NC#AH33 VGA_BLUE
AH31 NC#AH31
AJ33 NC#AJ33 VGA_HSYNC/GPO68 M28 CRT_HSYNC 50
AJ31 NC#AJ31 VGA_VSYNC/GPO69 N30 CRT_VSYNC 50

VGA DAC
M33 CRT_DDC_DATA 50
R1901 VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71 N32 CRT_DDC_CLK 50
1 1KR2F-3-GP
2 SATA_CALP AF28
SATA_CALN SATA_CALRP HUDSON_DAC_RESET
1D1V_S0 1 2 AF27 SATA_CALRN VGA_DAC_RSET K31 1 R1907 2
R1902 715R2F-GP
931R2F-1-GP V28
AUX_VGA_CH_P DP1_AUXP_R 6 1D1V_VDDAN_MLDAC_S0
78 SATA_LED# AD22 V29 DP1_AUXN_R 6
SATA_ACT#/GPIO67 AUX_VGA_CH_N
U28 AUXCAL 2 1
AUXCAL R1913
AF21
SATA_X1 100R2F-L1-GP-U
ML_VGA_L0P T31 DP1_TX0P_R 6
T33 DP1_TX0N_R 6
ML_VGA_L0N
[checklist]: Integrated Clock Mode => Left unconnected ML_VGA_L1P T29 DP1_TX1P_R 6
T28 DP1_TX1N_R 6
ML_VGA_L1N
R32 DP1_TX2P_R 6
ML_VGA_L2P

VGA MAINLINK
AG21 R30 DP1_TX2N_R 6
SATA_X2 ML_VGA_L2N 3D3V_VDDAN_DAC_S0_R
ML_VGA_L3P
P29 DP1_TX3P_R 6 DY
SA_0110'11 P28 R1908
VGA_SWITCH_DETECT ML_VGA_L3N DP1_TX3N_R 6
1 R1921 2 1 10KR2J-3-GP
2
0R0402-PAD C29
ML_VGA_HPD/GPIO229 DP_HPD1_R 6
AH16 N2 PSW_CLR#
FANOUT0/GPIO52 VIN0/GPIO175 VRAM_SIZE1
56 SATA_ODD_PWRGT AM15 M3
3D3V_S5 FANOUT1/GPIO53 VIN1/GPIO176 VRAM_SIZE2
AJ16 L2
FANOUT2/GPIO54 HW MONITOR VIN2/SDATI_1/GPIO177 GPIO178
N4
B R1910 VIN3/SDATO_1/GPIO178 GPIO179 B
49 Color_Engine# AK15 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 P1
1 10KR2J-3-GP
2 APU_TALERT# VGA_SWITCH_DETECT AN16 P3 GPIO180
FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 VIN_VDDR
49 DCR_EN# AL16 FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 M1
M5 GPIO182
GPIO171 VIN7/GBE_LED3/GPIO182
K6
FCH_USB3.0PORT_EN# TEMPIN0/GPIO171
K5 AG16
MB_THRMDA_FCH TEMPIN1/GPIO172 NC#AG16
K3 AH10
APU_TALERT# TEMPIN2/GPIO173 NC#AH10
6 PCH_TEMP_ALERT# 1 R1912 2 M6 A28
0R2J-2-GP TEMPIN3/TALERT#/GPIO174 NC#A28
NC#G27
G27 VDDIO MEM_1V5 MEM_1V35
RN1901 DY L4
GPIO171 NC#L4
8 1 1.5V H Don't Care
7 2 MB_THRMDA_FCH
6 3 FCH_USB3.0PORT_EN# 71.HUDM2.M01 1.35V L H
5 4

SRN10KJ-6-GP

RN1902
GPIO182
http://j.gs/47mr
5 4
6 3 GPIO178 3D3V_S5
7 2 GPIO179
8 1 GPIO180 3D3V_S5

SRN10KJ-6-GP
1

1
R1909 R1915
1 10KR2J-3-GP
2 VIN_VDDR 10KR2J-3-GP R1916 R1917
10KR2J-3-GP 10KR2J-3-GP
1G 1G_2G
2

PSW_CLR#
A VRAM_SIZE1 A
If not used HWM or GPIO ,PD 10K
2

VRAM_SIZE2
<Variant Name>
G1901
1

GAP-OPEN R1918 R1919


10KR2J-3-GP 10KR2J-3-GP
512M_2G 512M Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
2

Title

HUDSON-M2(3/6)
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 19 of 102
5 4 3 2 1
5 4 3 2 1

5V_S0

2
R2019
0R0402-PAD
3D3V_S0 PCH1C Part 3 of 5 1D1V_S0
R2016

1
1 2 3D3V_S0_VDDIO_33_PCIGP 102mA AB17 T14 1007mA
0R0603-PAD VDDIO_33_PCIGP VDDCR_11
AB18 T17
VDDIO_33_PCIGP VDDCR_11

VDDAN_11_CLK_B
AE9 T20

1
C2050 C2056 C2055 C2054 C2053 VDDIO_33_PCIGP VDDCR_11
DY C2002 C2003 C2004 C2005 AD10
VDDIO_33_PCIGP VDDCR_11
U16 C2006 C2007 C2008 C2009 C2010

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
AG7 U18 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP
VDDIO_33_PCIGP VDDCR_11

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

CORE S0
AC13 V14

PCI/GPIO I/O
2

2
VDDIO_33_PCIGP VDDCR_11
AB12 V17
VDDIO_33_PCIGP VDDCR_11
AB13 V20
VDDIO_33_PCIGP VDDCR_11
AB14 Y17
VDDIO_33_PCIGP VDDCR_11
D AB16 D
VDDIO_33_PCIGP
50mA H24 H26 340mA VDDAN_11_CLK

G
3D3V_VPPL_SYS_S0 VDDPL_33_SYS VDDAN_11_CLK 1D1V_S0
3D3V_VDDPL_MLDAC_S0 20mA V22 J25 DY
12mA U22
VDDPL_33_DAC VDDAN_11_CLK
K24 84.03400.B37

1
VDDPL_33_ML VDDAN_11_CLK C2011 C2012 C2013 C2014 C2015 VDDAN_11_CLK
3D3V_S0
220 ohm 300mA 3D3V_VDDAN_DAC_S0_R 30mA T22 VDDAN_33_DAC VDDAN_11_CLK
L22 D S
3D3V_VDDPL_SSUSB_S5 11mA L18 M22 SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP

1
L2003 VDDPL_33_SSUSB_S VDDAN_11_CLK C2065
3D3V_VDDPL_USB_S5 14mA D7 N21

2
VDDPL_3.3V_PCIE VDDPL_33_USB_S VDDAN_11_CLK Q2004 SCD1U10V2KX-5GP
1 2 11mAAH29 VDDPL_33_PCIE VDDAN_11_CLK
N22

CLKGEN I/O
BLM15AG221SS1D-GP 12mAAG28 P22 AO3400A-GP

2
2

C2016 C2017 R2006 1 LDO_CAP VDDPL_33_SATA VDDAN_11_CLK 1D1V_S0


68.00084.E21 1D5V_S0 DY 2 0R2J-2-GP
2nd = 68.00225.101 SC2D2U10V3KX-1GP SCD1U10V2KX-5GP
C2018 1 DY 2 SC4D7U6D3V3KX-GP M31 AB24 1088mA 1R2029 2
1

1D1V_VDDAN_MLDAC_S0 LDO_CAP VDDAN_11_PCIE 0R3J-0-U-GP


VDDAN_11_PCIE
Y21 Reverse for FCH A13
L2005 V21 AE25

1
VDDPL_11_DAC VDDPL_11_DAC VDDAN_11_PCIE C2019 C2021 C2022 C2020 C2023
3D3V_S0
220 ohm 300mA 1 2 7mA VDDAN_11_PCIE
AD24
PBY160808T-330Y-N-GP 226mA Y22 AB23 SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP
L2006 VDDAN_11_ML VDDAN_11_PCIE
68.00206.141 V23 AA22

2
1

1
VDDPL_3.3V_SATA C2026 C2027 C2028 VDDAN_11_ML VDDAN_11_PCIE 1D2V_S5
1 2 V24 AF26
VDDAN_11_ML VDDAN_11_PCIE

PCI EXPRESS
BLM15AG221SS1D-GP SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP

MAIN LINK
V25 AG27
2

VDDAN_11_ML VDDAN_11_PCIE

SCD1U10V2KX-5GP
68.00084.E21 C2024 C2025

2
2nd = 68.00225.101 SC2D2U10V3KX-1GP SCD1U10V2KX-5GP
2mA AB10 AA21 1337mA
1

1
VDDIO_33_GBE_S VDDAN_11_SATA
Y20
VDDAN_11_SATA 3D3V_S5 R2027
AB21

1
VDDAN_11_SATA C2029 C2030 C2031 C2032 C2033 U2001
AB22 DY

10KR2F-2-GP

1
VDDAN_11_SATA SC1U6D3V2KX-GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP C2077
63mA AB11 VDDCR_11_GBE_S VDDAN_11_SATA
AC22
AA11 AC21 1 5

SC4D7U6D3V3KX-GP
2

2
VDDCR_11_GBE_S VDDAN_11_SATA IN OUT

SERIAL ATA
GND DY DY
AA20 2

2
2
VDDAN_11_SATA C2075 1D2V_SET
AA18 3 4
VDDAN_11_SATA SHDN# SET

GBE LAN
145mAAA9 AB20 DY

SC2D2U10V3KX-1GP
VDDIO_GBE_S VDDAN_11_SATA
AA10 AC19

1
VDDIO_GBE_S VDDAN_11_SATA

http://j.gs/47mr
G9141T11U-GP
74.09141.03F R2028
49K9R2F-L-GP
3D3V_S5
3D3V_S5
220 ohm 3A 3D3V_USB_S5
DY
Vout=1.0*(1+R1/R2)

2
L2008
1 2 470mA G7 N18 60mA 3D3V_S5_VDDIO_33 2 R2017 1
PBY201209T-221Y-N-GP VDDAN_33_USB_S VDDIO_33_S 0R0603-PAD
H8 L19

2
VDDAN_33_USB_S VDDIO_33_S C2034 C2035 C2066 C2051 C2067 C2036
68.00206.121 J8 M18
1

1
VDDAN_33_USB_S VDDIO_33_S

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC2D2U10V3KX-1GP
C C2037 C2038 C2039 C2040 C2041 K8 V12 DY C
SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP SCD1U10V2KX-5GP VDDAN_33_USB_S VDDIO_33_S
K9 V13 If support USB 3.0 or LAN wake-up, pls tie to 3.3V_S5

1
VDDAN_33_USB_S VDDIO_33_S
DY DY M9 Y12
otherwise, tie to 3.3V_S0
2

VDDAN_33_USB_S VDDIO_33_S

3.3V_S5 I/O
M10 Y13
VDDAN_33_USB_S VDDIO_33_S
N9 W11
VDDAN_33_USB_S VDDIO_33_S R2035
L2010 220 ohm 300mA N10

USB
VDDAN_33_USB_S
1D1V_S5 1 2 M12 220 ohm 300mA L2009 1 0R2J-2-GP
2 3D3V_S5
BLM15AG221SS1D-GP VDDAN_33_USB_S VDDXL_3.3V
N12 G24 5mA 1 2
1

C2079 C2044 C2045 C2081 VDDAN_33_USB_S VDDXL_33_S R2024 BLM15AG221SS1D-GP R2036


68.00084.E21 M11

2
SC10U6D3V5KX-1GP SC2D2U10V3KX-1GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP VDDAN_33_USB_S
2nd = 68.00225.101 1 0R2J-2-GP
2 1D1V_S5 C2042 C2043 68.00084.E21 1 0R2J-2-GP
2 3D3V_S0
DY VDDAN_1.1V_USB 140mAU12 N20 190mA DY 2nd = 68.00225.101 DY

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP
2

VDDAN_11_USB_S VDDCR_11_S VDDCR_1D1V


U13 M20 1 DY 2 1D2V_S5

1
R2023 VDDAN_11_USB_S VDDCR_11_S R2025
L2011

2
1D1V_S5 1 0R2J-2-GP
2 VDDCR_1.1V_B 1 2 VDDCR_1.1V_USB 42mA T12 J24 70mA 1D1V_VPPL_SYS_S5 C2001 C2049 C2052 0R2J-2-GP
VDDCR_11_USB_S VDDPL_11_SYS_S

SC1U6D3V2KX-GP

SC2D2U10V3KX-1GP
220 ohm 300mA BLM15AG221SS1D-GP T13 R2026 1 0R2J-2-GP
2

SC1U6D3V2KX-GP
1D2V_VPPL_SYS_S5
2

C2080 C2046 C2047 C2048 VDDCR_11_USB_S


1D2V_S5 1 DY 2 68.00084.E21 UMA

1
R2020 2nd = 68.00225.101 SCD1U10V2KX-5GP SC10U6D3V3MX-GP M8 12mA
SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP

VDDAN_33_HWM_S 3D3V_VDDAN_HWM_S5
0R2J-2-GP DY 282mA P16
1

VDDAN_11_SSUSB_S R2030
M14
VDDAN_11_SSUSB_S
N14 AA4 26mA 1 0R2J-2-GP
2 3D3V_S0
VDDAN_11_SSUSB_S VDDIO_AZ_S
P13
VDDAN_11_SSUSB_S R2031
P14
VDDAN_11_SSUSB_S
1 0R2J-2-GP
2 3D3V_S5 220 ohm 300mA
424mAN16 VDDCR_11_SSUSB_S DY
N17 3D3V_USB_S5 3D3V_VDDPL_USB_S5

USB SS
VDDCR_11_SSUSB_S L2013
P17
USB3

1
VDDAN_1.1V_SSUSB_S VDDCR_11_SSUSB_S C2059
33 ohm 3A M17
VDDCR_11_SSUSB_S
1 2
L2001 SC1U6D3V2KX-GP BLM15AG221SS1D-GP
1 2 Confrim 68.00084.E21

1
1D1V_S5 PBY160808T-330Y-N-GP 2nd = 68.00225.101 C2060 C2061
68.00206.141 Codec power use3.3V,VDDIO_AZ have to tied to 3.3V SC2D2U10V3KX-1GP SCD1U10V2KX-5GP
1

C2085 C2083 C2088 C2087 POWER


Codec power use1.5V,VDDIO_AZ have to tied to 1.5V

2
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

R2022 USB3 USB3 DY DY


SC10U6D3V3MX-GP
1

0R2J-2-GP C2084 C2086 C2082 If use 1.5V_S5 power,have to add LDO for it extra
2

Non USB3 SCD1U10V2KX-5GP SCD1U10V2KX-5GP SC1U6D3V2KX-GP


USB3 USB3 USB3 71.HUDM2.M01
2

110111

B B
If support USB 3.0 wake-up, tie to 1.1V_S5 220 ohm 300mA 220 ohm 300mA
If no, tie to 1.1V_S0, 3D3V_S0 3D3V_VPPL_SYS_S0 3D3V_S5 3D3V_VDDAN_HWM_S5
220 ohm 300mA
220 ohm 300mA 1D1V_S5
220 ohm 300mA 3D3V_S5 3D3V_VDDPL_SSUSB_S5
If no USB 3.0, tied to GND L2012 L2015 USB3
3D3V_S0 3D3V_VDDPL_MLDAC_S0 1 2 1 2 MUXLESS 1D1V_VPPL_SYS_S5
L2016
L2014 DY BLM15AG221SS1D-GP BLM15AG221SS1D-GP L2017 1 2
1 2 68.00084.E21 68.00084.E21 1 2 BLM15AG221SS1D-GP
2

1
BLM15AG221SS1D-GP 2nd = 68.00225.101 C2058 2nd = 68.00225.101 C2074 C2064 BLM15AG221SS1D-GP 68.00084.E21

1
68.00084.E21 C2057 SCD1U10V2KX-5GP DY SC2D2U10V3KX-1GP SCD1U10V2KX-5GP 68.00084.E21 2nd = 68.00225.101 C2089 C2090 R2032
1

1
2nd = 68.00225.101 C2062 C2063 SC2D2U10V3KX-1GP 2nd = 68.00225.101 C2068 C2069 SC2D2U10V3KX-1GP USB3 0R2J-2-GP

SCD1U10V2KX-5GP
1

2
SC2D2U6D3V3KX-GP SCD1U10V2KX-5GP DY USB3 Non USB3

SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP

2
3D3V_VDDAN_DAC_S0_R
2

2
HW Montior Not implemented
1 R2013 2 If USB 3.0 wake-up is supported, tie to 3.3V_S5
3D3V_S0 3D3V_VDDAN_DAC_S0 or HW Montior balls not used GPIO
Q2002 0R2J-2-GP => Decoupled cap not used If no, tie to 3.3V_S0,
DMP2130L-7-GP If no USB 3.0, tie to GND
3D3V_S0 3D3V_VDDAN_DAC_S0_R
HW Montior Not implemented
S
D
or HW Montior balls used as GPIO 1D1V_S0 1D2V_VPPL_SYS_S5
D

84.02130.031 DYL2018 => Bead not used UMA


1

2ND = 84.03413.A31 1 2 L2020


R2018 BLM15AG221SS1D-GP 1 2
G

100KR2J-1-GP 68.00084.E21 C2072 C2071 C2076 BLM15AG221SS1D-GP


2nd = 68.00225.101 SC10U6D3V5KX-1GP 68.00084.E21
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP

1
3D3V_VDDAN_DAC_S0 C2078
VGA_PD 18 DY 2nd = 68.00225.101
2

VGA_PD_Q# DY SCD1U10V2KX-5GP
L2019

2
1

1 2
1

C2073 R2015 BLM15AG221SS1D-GP


SC1U6D3V2KX-GP DY 2K2R2J-2-GP 68.00084.E21 220 ohm 300mA
6

2nd = 68.00225.101
2

Q2001 If support USB 3.0, tie to 1.1V_S5


2

2N7002KDW-GP
otherwise, tie to 1.1V_S0
84.2N702.A3F DY
1

2nd = 84.DM601.03F 1 R2021 2


5V_S0 1D1V_S0 0R2J-2-GP 1D1V_VDDAN_MLDAC_S0

A A
2

D S
R2014 Q2003
10KR2F-2-GP 84.03404.B31 AO3404A-GP
G

<Variant Name>
1

VGA_PD_Q

Wistron Corporation
1

C2070 VGA_PD_Q
DY SC1U6D3V2KX-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

if VGA translator is not implemented, Title


C2027 C2028 C2063 C2071 change to stuff 0-ohm HUDSON-M2(4/6)
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 20 of 102
5 4 3 2 1
5 4 3 2 1

SSID = S.B
CRB:PU 3.3V_AUX_S5
checklist:PU 3.3V_S5
REQUIRED STRAPS no support S5 PLUS funciton,PU 3.3V_S5
3D3V_S0 3D3V_S5 3D3V_S5
D
USE this pin to determine INT/EXT CLK D

REQUIRED SYSTEM STRAPS


EC_PWM2 PCI_CLK1 RTC_CLK CLK_PCI_LPC PCI_CLK4 LPC_CLK0 LPC_CLK1
PCH GPO199

R2102

R2101

R2103

R2104

R2105

R2107
PULL Allow USE CLKGEN
HIGH LPC ROM PCIE GEN2 S5_PLUS Mode DEBUG non_Fusion ENABLE EC ENABLED

1
DISABLE STRAPS CLOCK mode
(Use Internal)
DY DY DY DEFAULT DEFAULT DEFAULT
DEFAULT

2
PULL Force S5_PLUS Mode IGNORE Fusion DISABLE EC CLKGEN
SPI ROM

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
LOW PCIE GEN1 ENABLE DEBUG CLOCK mode DISABLED
STRAPS (Use External)
DEFAULT DEFAULT DEFAULT

17 PCI_CLK1
17,65,71 CLK_PCI_LPC
17 PCI_CLK4
LPC ROM implemented
checklistsuggestion:
no PU or PD required
C C
17,27 LPC_CLK0
17 LPC_CLK1 (integrated PU 10K)
18 EC_PW M2 CRB: do not stuff PU Res
17 RTC_CLK
R2113

R2114

R2115

R2116

R2117

R2118

R2119
1

1
DY DY DY DY
2

2
2K2R2F-GP

2K2R2F-GP
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

B B

DEBUG STRAPS
PCI_AD23 17
PCI_AD24 17
PCI_AD25 17
PCI_AD26 17
PCI_AD27 17

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23


1 R2108

1 R2109

1 R2110

1 R2111

1 R2112

PULL USE PCI Disable ILA USE FC USE DEFAULT Disable PCI
HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
DY DY DY DY DY
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
2

2
2K2R2J-2-GP

2K2R2J-2-GP

2K2R2J-2-GP

2K2R2J-2-GP

2K2R2J-2-GP

PULL BYPASS Enable ILA BYPASS FC USE EEPROM Enable PCI


LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
A <Variant Name> A

Note: FCH has 15K internal PU FOR PCI_AD[27:23] Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HUDSON-M2(5/6)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 21 of 102
5 4 3 2 1
5 4 3 2 1

PCH1D Part 4 of 5

A3 VSS VSS T25


A33 VSS VSS T27
B7 VSS VSS U6
B13 VSS VSS U14
D9 VSS VSS U17
D13 VSS VSS U20
E5 VSS VSS U21
D E12 VSS VSS U30 D
E16 VSS VSS U32
E29 VSS VSS V11
F7 VSS VSS V16
F9 VSS VSS V18
F11 VSS VSS W4
F13 VSS VSS W6
F16 VSS VSS W25
F17 VSS VSS W28
F19 VSS VSS Y14
F23 VSS VSS Y16
F25 VSS VSS Y18
F29 VSS VSS AA6
G6 VSS VSS AA12
G16 VSS VSS AA13
G32 VSS VSS AA14
H12 VSS VSS AA16
H15 VSS VSS AA17
H29 VSS VSS AA25
J6 VSS VSS AA28
J9 VSS VSS AA30
J10 AA32

GROUND
VSS VSS
J13 VSS VSS AB25
J28 VSS VSS AC6
J32 VSS VSS AC18
K7 VSS VSS AC28
K16 VSS VSS AD27
K27 VSS VSS AE6
K28 VSS VSS AE15
C L6 AE21 C
VSS VSS
L12 VSS VSS AE28
L13 VSS VSS AF8
L15 VSS VSS AF12
L16 VSS VSS AF16
L21 VSS VSS AF33
M13 VSS VSS AG30
M16 VSS VSS AG32
M21 VSS VSS AH5
M25 VSS VSS AH11
N6 VSS VSS AH18
N11 VSS VSS AH19
N13 VSS VSS AH21
N23 VSS VSS AH23
N24 VSS VSS AH25
P12 VSS VSS AH27
P18 VSS VSS AJ18
P20 VSS VSS AJ28
P21 VSS VSS AJ29
P31 VSS VSS AK21
P33 VSS VSS AK25
R4 VSS VSS AL18
R11 VSS VSS AM21
R25 VSS VSS AM25
R28 VSS VSS AN1
T11 VSS VSS AN18
T16 VSS VSS AN28
T18 VSS VSS AN33
B B
N8 VSSAN_HWM VSSPL_DAC T21
VSSAN_DAC L28
K25 VSSXL VSSANQ_DAC K33
VSSIO_DAC N28
H25 VSSPL_SYS
EFUSE R6

71.HUDM2.M01

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HUDSON-M2(6/6)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 22 of 102

5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 23 of 102
5 4 3 2 1
5 4 3 2 1

D
(Blanking) D

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 24 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 25 of 102

5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 26 of 102
5 4 3 2 1
5 4 3 2 1

3D3V_AUX_S5
3D3V_S0 1 R2741 2 KBC_3D3_PWR 3D3V_AUX_S5
0R0603-PAD
3D3V_AUX_S5_KBC 1 R2729 2

SC2D2U10V3KX-1GP
0R0603-PAD

1
KBC_3D3_PWR
C2704 C2705 C2706 C2707 C2708 -1 PCB Version A/D (Pin98) Pull-Low Resistor Pull-High Resistor (3D3V_S5) Voltage

1
C2701 C2702 C2703 C2709 R2701

1
SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC2D2U10V3KX-1GP SCD1U10V2KX-5GP EC2701 47KR2F-GP
SA 100.0 K 10.0 K 3.0 V
DY DY PCB Version

2
SB 100.0 K 20.0 K 2.75 V

SCD1U16V2ZY-2GP
2

2
SC 100.0 K 33.0 K 2.54 V
3D3V_S0 PCB_VER_AD
-1 100.0 K 47.0K 2.24 V
These two caps colse to Pin VDD -2 100.0 K 64.9K 1.94 V

1
-3 100.0 K 76.8 K 1.81 V
R2703 -4 100.0 K 100.0 K 1.65 V
100KR2F-L1-GP

102

115
88
76
46
19
4
1 OF 2 U2701A

2
VDD

AVCC

VCC
VCC
VCC
VCC
VCC
D D

0R2J-2-GP 1 2R2702 PLT_RST1#_1 7 104


17,36 PLT_RST#_ARST LRESET# VREF
2
17,21 LPC_CLK0 LPC_FRAME#_R LCLK
3 97 AD_IA 40

2
LFRAME# GPIO90/AD0 PCB_VER_AD
17,65,71 LPC_AD3 1 98
C2710 LAD3 GPIO91/AD1 ADT_TYPE
17,65,71 LPC_AD2 128 99
LAD2 GPIO92/AD2 MODEL_AD
SC220P50V2KX-3GP 1 17,65,71 LPC_AD1 127 100
LPC_AD0_R LAD1 GPIO93/AD3
126
DY 17 INT_SERIRQ 125
LAD0
SERIRQ GPIO94/DA0
101
17 PM_CLKRUN# 8 105 GSENSE_TST 79
GPIO11/CLKRUN# GPIO95/DA1
9 106 WWAN_EN 66
9 L_BKLT_EN ECSCI#_KBC GPIO65/SMI# GPIO96/DA2 U2701B 2 OF 2
29 KCOL[0..17] 69
VGA_SW# ECSCI#/GPIO54
TPAD14-GP TP68 1 124
ECSWI#_KBC 123 GPIO10/LPCPD# KCOL0
79 1D1V_S5_PWRGD 36,45 49 CAMERA_EN 31 53
GPIO67/PWUREQ# GPIO2 GPIO56/TA1 KBSOUT0/JENK# KCOL1
18 KA20GATE 121 95 GSENSE_X 79 18,97 PM_PWRBTN# 117 52
GPIO85/GA20 GPIO3/AD6 CPU_CURRENT GPIO20/TA2/IOX_DIN_DIO KBSOUT1/TCK KCOL2
18 KBRCIN# 122 96 1 TP156 TPAD14-GP 82 Wireless_SW# 63 51
KBRST#/GPIO86 GPIO4/AD5 GPIO14/TB1 KBSOUT2/TMS KCOL3
108 18,36,45,46,92 PM_SLP_S3# 64 50
GPIO5/AD4 KBC_PWRBTN_EC# GPIO1/TB2 KBSOUT3/TDI KCOL4
93 49
PSL_IN2_GPI6# KBSOUT4/JEN0# KCOL5
49 BLON_OUT 27 94 GSENSE_Y 79 78 CHARGE_LED 32 48
PCIE_RST# GPIO52/PSDAT3/RDY# GPIO7/AD7 GPIO15/A_PWM KBSOUT5/TDO KCOL6
TPAD14-GP TP66 1 25 114 DC_BATFULL 78 118 47
GPIO50/PSCLK3/TDO GPIO16 29 KBC_BEEP GPIO21/B_PWM KBSOUT6/RDY# KCOL7
79 GSENSE_ON# 11 6 AD_OFF 38 62 43
GPIO27/PSDAT2 GPIO24 49 BRIGHTNESS GPIO13/C_PWM KBSOUT7 KCOL8
51 HDMI_IN# 10 109 40 STOP_CHG# 65 42
GPIO26/PSCLK2 GPIO30 SATA_ODD_DA# 17,56 GPIO32/D_PWM KBSOUT8 KCOL9
69 TPDATA 71 14 S5_ENABLE 36,97 78 APS_LED 81 41
GPIO35/PSDAT1 GPIO34/CIRRXL GPIO66/G_PWM KBSOUT9/SDP_VIS#
TP ------ > 69 TPCLK 72
GPIO37/PSCLK1 GPIO36
15 WLAN_Test_LED 78 68 KBC_NOVO_BTN#
66
GPIO33/H_PWM KBSOUT10/P80_CLK
40 KCOL10
80 AD_DETECT_R 22 39 KCOL11
GPIO41 BAT_IN# 39 GPIO45/E_PWM KBSOUT11/P80_DAT
17 16 38 KCOL12
GPIO42/TCK COVER_SW# 70 68,78 PWRLED GPIO40/F_PWM KBSOUT12/GPIO64
70 20 37 KCOL13
39,40 BAT_SCL GPIO17/SCL1 GPIO43/TMS RSMRST#_KBC 18 KBSOUT13/GPIO63
69 21 36 KCOL14
BATTERY/CHARGER-----> 39,40 BAT_SDA KBC_SCL1 67
GPIO22/SDA1 GPIO44/TDI
23
PM_SLP_S5# 18,46
ECRST# 85
KBSOUT14/GPIO62
35 KCOL15
6 KBC_SCL1 GPIO73/SCL2 GPIO46/CIRRXM/TRST# SPIWP# 60 41 ECRST# VCC_POR# KBSOUT15/GPIO61/XOR_OUT
KBC_SDA1 KBC_GPIO51 KCOL16
THERMAL/FCH/AV-----> 6 KBC_SDA1 68
119
GPIO74/SDA2 GPIO51
26
73
1 TP51 TPAD14-GP GPIO60/KBSOUT16
34
33 KCOL17
1
1
TP48 TPAD14-GP
31 LAN_PWR_ON GPIO23/SCL3 PSL_IN1_GPI70 AC_IN 40 GPIO57/KBSOUT17 TP49 TPAD14-GP
GSENSOR_ID 120 74 KBC_GPIO71 1 E51_RxD 113
GPIO31/SDA3 PSL_OUT_GPIO71 TP45 TPAD14-GP 65 E51_RxD GPIO87/CIRRXM/SIN_CR KROW[0..7] 69
PROCHOT_EC 24 75 E51_TxD 111 54 KROW0
GPIO47/SCL4 VBKUP RTC_AUX_S5 65 E51_TxD GPI/O83/SOUT_CR/TRIST# KBSIN0
28 82 55 KROW1
40 CHG_ON# GPIO53/SDA4 GPIO75 WLAN_EN 65 KBSIN1
83 BLUETOOTH_EN 63 29 AMP_MUTE# 30 56 KROW2
GPO76/SHBM GPIO55/CLKOUT/IOX_DIN_DIO KBSIN2 KROW3
84 TP_LED# 78 17 PM_SUS_CLK 77 57
GPIO77 GPIO0/EXTCLK KBSIN3 KROW4
91 58
GPIO81 NUM_LED 78 KBSIN4 KROW5
110 USB_PWR_EN# 61,62,82 59
33R2J-2-GP EC_SPI_CS#_R GPO82/IOX_LDSH/TEST# KBC_GPIO84 KBSIN5 KROW6
60 SPICS# 1 2R2724 90 112 1 TP47 TPAD14-GP 13 60
33R2J-2-GP EC_SPI_CLK_R F_CS0# GPI/O84/IOX_SCLK/XORTR# CAP_LED PECI KBSIN6 KROW7
C 1 2R2725 92 107 12 61 C
60 SPICLK EC_SPI_DI_R F_SCK GPIO97 CAP_LED 78 VTT KBSIN7
60 SPIDI 1 R2726 2 86
33R2J-2-GP EC_SPI_DO_R F_SDI/F_SDIO1
60 SPIDO 1 0R0402-PAD
2R2727 87
F_SDIO/F_SDIO0 VCORF NPCE791LA0DX-GP
44
1

VCORF

1
C2711
AGND

R2728 SC1U6D3V2KX-GP

GND
GND
GND
GND
GND
GND
100KR2J-1-GP

2
2

NPCE791LA0DX-GP
103

5
116
89
78
45
18
3D3V_S0

Prevent BIOS data loss solution


4
3

3D3V_S0 3D3V_AUX_S5
RN2705
SRN10KJ-5-GP R2705
DY2

1
1 HDMI_IN# 1 R2745 2 BAT_SCL RN2703
3D3V_AUX_S5 R2740
10KR2J-3-GP 4K3R2J-GP 2 1 L_BKLT_EN 5 4 ECRST#
3D3V_AUX_S5
KBC_SCL1 R2706 6 3 COVER_SW# R2730
1
2

1 2 E51_RxD 1 R2746 2 BAT_SDA 100KR2J-1-GP 7 2 10KR2J-3-GP U2702


4K3R2J-GP 8 1 ECRST# 3D3V_AUX_S5
DY

2
10KR2J-3-GP 1
R2707 SRN10KJ-6-GP GND
3

E
Q2701

1
VCC
1 2 E51_TxD R2708 R2709 R2710
C2712 PURE_HW_SHUTDOWN# 2
BAT_IN# S5_ENABLE RSMRST#_B Q2702 SC1U10V2KX-1GP RESET#
4 3
DY 3D3V_AUX_S5 1 2 2 1 28,36 PURE_HW_SHUTDOWN# 1 2 B

MMBT3906-4-GP
10KR2J-3-GP
SMBC_THERM 28,85 100KR2J-1-GP 10KR2J-3-GP 10KR2J-3-GP DY

2
5 2 G690L293T73UF-GP

C
R2711 74.00690.I7B
KBC_SDA1 6 1 1 2 E51_TxD
SMBD_THERM 28,85
2N7002KDW-GP 10KR2J-3-GP 3D3V_AUX_S5 1
R2712
2 KBC_NOVO_BTN# 3D3V_S0 DY
R2713 SATA_ODD_DA#
84.2N702.A3F DY 100KR2J-1-GP 2 1
2ND = 84.DM601.03F 10KR2J-3-GP 84.T3906.A11
3D3V_S0 R2714 DY 2ND = 84.03906.F11
2 1 BLUETOOTH_EN 3RD = 84.03906.H11
10KR2J-3-GP R2737
AD_OFF 1 R2717 2 AC_IN 1 2
100KR2J-1-GP D2701
B 1KR2J-1-GP B
DY 18 EC_SWI#
1
R2716
DY ECSWI#_KBC H_PROCHOT#_EC
3 1 2 H_PROCHOT# 6
0R0402-PAD
2

BAS16-6-GP
3D3V_AUX_S5 83.00016.K11

D
3D3V_AUX_S5
2ND = 83.00016.F11 EC side High Active Q2703
1

3D3V_S0 R2720 PROCHOT_EC G


1

1 2 2N7002A-7-GP
3D3V_AUX_KBC 3D3V_AUX_S5 R2722 0R2J-2-GP
DY

1
R2732 10KR2F-2-GP

S
1
330KR2J-L1-GP 1 R2731 2 90W R2718
2

ADT_TYPE R2719

100KR2J-1-GP
2

0R0805-PAD
G Sensor ID:
100KR2J-1-GP

2
KBC_PWRBTN_EC# 1 R2734 2
ADT_TYPE High: ST
2

KBC_PWRBTN# 68,97
1

470R2J-2-GP GSENSOR_ID 3D3V_AUX_KBC 3D3V_AUX_KBC


High: 90W R2723 Low:ADI 2ND = 84.2N702.I31
10KR2F-2-GP
1

DY C2713 Low :65W 65W


1

SC220P50V2KX-3GP D2702
2

1
R2715 1
2

R2743 18 EC_SCI#
DY
100KR2J-1-GP

ECSCI#_KBC
DY 100KR2J-1-GP 3
2

1
2

2
MODEL_ID_AD(Pin100) Pull-Low Register Pull-High Register Voltage R2742
DY 100KR2J-1-GP BAS16-6-GP

3D3V_AUX_KBC
83.00016.K11
LB475 UMA 100.0 K 33.0 K (64.33025.6DL) 2.481V 2ND = 83.00016.F11

D
R2721
LB475 MUXLESS 100.0 K 47.0 K (64.47025.6DL) 2.245V DY Q2705 2 1
1

R2736 G DY 0R2J-2-GP
33KR2F-GP 2N7002A-7-GP
Model_ID_BOM Ctrl
A
2ND = 84.2N702.I31 A
Standard: Mount D3,D4
2

S
D
MODEL_AD
Q2704
Sandra: Mount R164,R165
DY
1

R2735 38 AD_DETECT G
100KR2F-L1-GP <Variant Name>
2N7002A-7-GP
2ND = 84.2N702.I31
Wistron Corporation
2

S
150R2F-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 R2739 2 LPC_AD0_R Taipei Hsien 221, Taiwan, R.O.C.
17,65,71 LPC_AD0
Title
1 R2738 2 LPC_FRAME#_R
17,65,71 LPC_FRAME#
100R2J-2-GP R2744 KBC Nuvoton NPCE791
1 2 AD_DETECT_R Size Document Number Rev
A2
0R2J-2-GP LB475 -1
Date: Tuesday, August 02, 2011 Sheet 27 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Thermal Thermal sensor


T8
Close to FCH on top side. 2200p close to smsc2103 chip
H_THERMDA
SA 0905 change to 390p

3 1

1
E
B C2803

1
D B C2800 SC2200P50V2KX-2GP D

2
SC390P50V2KX-GP Q9

E
H_THERMDC

2
C
MMBT3904W T1G-GP
Q6
MMBT3904W T1G-GP
CPU backside or inside the socket
CPU TEMP:
2200p close to smsc2103 chip H_THERMDA and H_THERMDC routing 10mil trace width
REMOTE2-
2 and spacing. Locate Capacity near Thermal diode.
E

1
B
C2801 C2802
2 SC390P50V2KX-GP SC2200P50V2KX-2GP 4 WIRE PWM Fan Control circuit

2
C

DY
Q42 REMOTE2+
MMBT3904W T1G-GP 5V_S0
between CPU, VGA and DIMM on bottom side Close to connector
1 AFTP2801
D2801

2
CH551H-30PT-GP C2806

1
SC4D7U6D3V3KX-GP
83.R5003.C8F
2ND = 83.R5003.H8H R2806
3rd = 83.5R003.08F DY 10KR2J-3-GP

2
3D3V_S0

2
FAN1

1
C R2800 6 C
6K8R2J-GP
FAN_PW M 1 R427 2 FAN_PW M_C 4
0R0402-PAD 3

2
SHDN_SEL FAN_TACH 2
3D3V_S0 SHDN --> 2N3904 ON External diode 1

5
1

1
R260 RN49 DY ACES-CON4-GP-U1

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
68R2-GP

EC2801
2 3 3D3V_S0 20.F0714.004

2
C2804 1 4
U2801
2nd = 20.D0196.104
2

2103_VDD SRN10KJ-5-GP

EC2802
1 2
3 4 2103_4 1 TP65 TPAD14-GP
SCD1U10V2KX-4GP VDD GPIO1 2103_5 TP67 TPAD14-GP
GPIO2 5 1 D2802
H_THERMDA 2
H_THERMDC DP1 FAN_TACH_R FAN_TACH
1 DN1 TACH 10 1 2
REMOTE2+ 16 11 FAN_PW M
REMOTE2- DP2/DN3 PWM
15 ND2/DP3 CH551H-30PT-GP
14 TRIP_SET 1 R2805 2
THERM_SYS_SHDN# TRIP_SET SHDN_SEL 604R2F-2-GP 2ND = 83.5R003.08F
SA 0905
7 SYS_SHDN# SHDN_SEL 13 T8 = 105
1 THERM_SCI# 1 2 THERM_SCI#_R 6
TP69 R272 0R0402-PAD ALERT#
83.R5003.C8F
TPAD14-GP 9 12 FAN_TACH 1 AFTP2802
27,85 SMBC_THERM SMCLK GND
8 17 FAN_PW M_C 1 AFTP2803
27,85 SMBD_THERM SMDATA GND

B EMC2103-2-AP-GP B

pin6, ALERT# OD
pin7, SYS_SHDN# OD

3D3V_AUX_S5
3D3V_S0
3

1
D2803 2ND = 84.2N702.031 R2802
BAT54PT-GP 84.2N702.J31 100KR2J-1-GP
83.00054.T81 DY 2N7002K-2-GP
2ND = 83.BAT54.D81

2
3rd = 83.BAT54.S81 S THERM_SYS_SHDN#
1

27,36 PURE_HW _SHUTDOW N# D


1

G 3D3V_S0
R2801
1

DY C2805 Q2802
DY
10KR2J-3-GP

SCD1U10V2KX-5GP
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal EMC2103
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 28 of 102

5 4 3 2 1
5 4 3 2 1

5V_S0 AUD_5VD
L2902
3D3V_S0 AUD_3VD 1 2
MIC1_VREFO_L L2901 PBY201209T-221Y-N-GP C775 C768 C773

1
1 2 C413

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
MIC1_VREFO_R PBY201209T-221Y-N-GP C776 C409

SC1U10V2KX-1GP
2

2
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2

2
C782 Place next to pin 1
1 2 ALC_AGND

SC10U6D3V3MX-GP
D
Place next to pin 39 D
75R2J-1-GP R674
AUD_PORTA_L 2 1
82 AUD_PORTA_L 5V_S0 AUD_5VA
C781
L2903

1
75R2J-1-GP R673

HP_OUT_L_AUD
C780

SCD1U10V2KX-4GP
AUD_PORTA_R 2 1 1 2
82 AUD_PORTA_R

SC2D2U10V3ZY-1GP
C783 Place next to pin 27 PBY201209T-221Y-N-GP

HP_OUT_R_AUD

2
ALC_AGND 2 1 AUD_CPVEE C415 C774 C414

1
C416

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC2D2U10V3ZY-1GP AUD_CBN
SC1U10V2KX-1GP

2
1

C443 ALC_AGND
SC2D2U10V3ZY-1GP
2

AUD_CBP
AUD_5VA
Please close codec
ALC_AGND ALC_AGND ALC_AGND
Place next to pin 25

36

35

34

33

32

31

30

29

28

27

26

25
U69

http://j.gs/47mr

VREF
LDO_CAP
CBP

CPVEE

MIC1_VREFO_R
CBN

HPOUT_R/PORT_I_R

HPOUT_L/PORT_I_L

MIC1_VREFO_L

MIC2_VREFO

AVSS1

AVDD1
MIC1_VREFO_L 1 R648 2 2K2R2J-2-GP

ALC_AGND 37
AVSS2 MIC1_VREFO_R R649 2 2K2R2J-2-GP
LINE1_R/PORT_C_R 24 1
AUD_5VA 38
AVDD2
23 R663
LINE1_L/PORT_C_L
AUD_5VD 39 PVDD1
22 AUD_PORTC_R C770 1 2SC4D7U6D3V3KX-GP PORTC_R_C 1 2 AUD_PORTC_R_C 82
AUD_SPK_L+_L MIC1_R/PORT_B_R 1KR2J-1-GP
58 AUD_SPK_L+_L 40 SPK_OUT_L+
21 AUD_PORTC_L C769 1 2 SC4D7U6D3V3KX-GP PORTC_L_C 1 R664 2 AUD_PORTC_L_C 82
AUD_SPK_L-_L MIC1_L/PORT_B_L 1KR2J-1-GP
58 AUD_SPK_L-_L 41
SPK_OUT_L-
MONO_OUT 20
42 R619
PVSS1 JDREF
JDREF 19 1 2 ALC_AGND
C 20KR2F-L-GP C
43 PVSS2
18
AUD_SPK_R-_L SENSE_B
58 AUD_SPK_R-_L 44 SPK_OUT_R-
MIC2_R/PORT_F_R 17
58 AUD_SPK_R+_L AUD_SPK_R+_L 45 SPK_OUT_R+
16
MIC2_L/PORT_F_L
AUD_5VD 46
PVDD2
15
LINE2_R/PORT_E_R
47 1 R618 2 AUD_SENSE_PORT_A
GPIO0/DMIC_DATA

EAPD AUD_SENSE_PORT_A 82
GPIO1/DMIC_CLK

14 39K2R2F-L-GP
LINE2_L/PORT_E_L
48 SPDIFO AUD_SENSE_PORT 1 R607 AUD_SENSE_PORT_C
SDATA_OUT

SENSE_A 13 2 AUD_SENSE_PORT_C 82
20KR2J-L2-GP
SDATA_IN

49
DVDD_IO

GND
PCBEEP
RESET#
DVDD

SYNC
DVSS

C700
BCLK
PD#

AUD_PC_BEEP 2 1 KBC_BEEP_R 2 1 R604 HDA_SPKR 18


10KR2J-3-GP G94

1
ALC269Q-VB6-GR-GP SCD1U10V2KX-5GP GAP-CLOSE
1

10

11

12

71.00269.G03 R586 2 1 R597


1 2

2
4K7R2J-2-GP C778 10KR2J-3-GP KBC_BEEP 27 G96
SC100P50V2JN-3GP GAP-CLOSE

2
AUD_3VD 1 2
1

AUD_3VD 1D5V_S0 G97


C772 GAP-CLOSE

2
SCD1U10V2KX-4GP
HDA_SDIN0

1 2
2

HDA_CODEC_RST# 18 R2932 R2931


0R2J-2-GP 0R2J-2-GP
78 AUD_DMIC_1_2 AUD_SYNC DY

1
78 AUD_DMIC_CLK DVDD-IO ALC_AGND

C697

1
B B

SC10U6D3V3MX-GP
2 1 HDA_CODEC_SDIN0 18 C771
R589 SCD1U10V2KX-4GP

2
22R2J-2-GP HDA_CODEC_BITCLK 18
AUD_SDATA_OUT AUD_3VD
1

C698

1
SC22P50V2JN-4GP
2

R2927
33KR2F-GP
AUD_3VD DY

2
AUD_3VD AUD_5VA
R675 HDA_CODEC_SDOUT_C

1
1 2
10KR2J-3-GP R2926

1
33KR2F-GP DY
DY Q2903
1

C2929
R9415 AUD_3VD SC100P50V2JN-3GP G
2

2
DY HDA_CODEC_SYNC_C DY
AUD_SD#_Q

1KR2J-1-GP D
18 HDA_CODEC_SDOUT
G
2

Q66 C2928 S AUD_SDATA_OUT


Q2902
D11 2N7002A-7-GP SC33P50V2JN-3GP
27 AMP_MUTE# 1 R351 2 AUD_PD#_2 2 G
2

0R0402-PAD 2N7002K-2-GP
3AUD_SD# S D

AUD_PD#_1 1
DY 18 HDA_CODEC_SYNC D
18 HDA_CODEC_RST# 1 2 84.2N702.E31 1 R2930 2
R354 2ND = 84.2N702.D31 AUD_SYNC 0R2J-2-GP
0R2J-2-GP
DY BAW56PT-U1-GP
S
84.2N702.J31
83.00056.E11 1 R403 2 2N7002K-2-GP 2ND = 84.2N702.031
2ND = 83.00056.I11
0R2J-2-GP 1 R2928 2
A
2

A
0R2J-2-GP
R676
DY
DY 10KR2J-3-GP 84.2N702.J31 <Variant Name>
2ND = 84.2N702.031
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO CODEC_ALC272&G1454
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 29 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 30 of 102

5 4 3 2 1
5 4 3 2 1

3D3V_LAN_S5 1D05V_LAN_S5 1D05V_LAN_S5 3D3V_LAN_S5


25MHz XTAL LAN_XTAL0 3D3V_S0
main pwr if have no ASF
X2

1
LAN_XTAL0
LAN_XTAL1
2 1 LAN_XTAL1 LAN_EESK 1 R3127 2

LAN_EESK
SPEED_100# 59
0R0402-PAD R3136
XTAL-25MHZ-102-GP 1KR2J-1-GP

GPO
R3123
2ND = 82.30020.791

2
1 R3130 2 1 2 LAN_RSET LAN_ACT_LED# 59 RTL_ISOLATE#
82.30020.851

1
D 1MR3J-L-GP D
2K49R2F-GP R3119
15KR2J-1-GP
1

1
C3103 C3148

48
47
46
45
44
43
42
41
40
39
38
37

2
SC15P50V2JN-2-GP SC15P50V2JN-2-GP U9304
2

2 49 3D3V_LAN_VDDSREG 3D3V_LAN_S5

AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10
LED0
DVDD33

LED1/EESK
RSET

GPO/SMBALERT
GND

59 MDI0+ 1 36 1D05V_LAN_REGOUT
MDIP0 REGOUT High:Link up
59 MDI0- 2 MDIN0 VDDREG 35 R3125
3 34 Low:Link down
1D05V_LAN_S5 AVDD10 VDDREG
59 MDI1+ 4 33 LAN_ENSW REG 1 2 3D3V_LAN_S5 GPO 1 R3120 2 1KR2J-1-GP
MDIP1 ENSWREG LAN_EEDI 0R0402-PAD
59 MDI1- 5 MDIN1 EEDI/SDA 32
Pin-XTAL2 is External Clock Input 6 31 LAN_EEDO 1 R3102 0ohm PAD For Enable Switch Regulator. R3122 10KR2J-3-GP
1D05V_LAN_S5 AVDD10 LED3/EEDO TP50 TPAD14-GP R3103 0ohm Res For Disable Switch Regulator.
Pin. 59 MDI2+ 7 30 LAN_EECS LAN_EECS 1 2
MDIP2 EECS/SCL

2
8 29 R3126 10KR2J-3-GP
R3121 is need when using external 59 MDI2- MDIN2 DVDD10 1D05V_LAN_S5
clock source. 1D05V_LAN_S5 9 AVDD10 LANWAKE# 28 PCIE_W AKE# 18,65,66 R3124 LAN_EEDI 1 2
59 MDI3+ 10 27 3D3V_LAN_S5 DY 0R2J-2-GP R3128 10KR2J-3-GP
MDIP3 DVDD33 RTL_ISOLATE# SMB_LAN_DATA 1
59 MDI3- 11 MDIN3 ISOLATE# 26 2
3D3V_LAN_S5 12 25 PLT_RST# 9,17,65,66,71,83,97

1
AVDD33 PERST# The SM DATA with 10K ohm pull GND.

REFCLK_N
REFCLK_P
SMBDATA
CLKREQ#
SMBCLK
DVDD10

EVDD10

HSON
HSOP
HSIN
Make sure PCIE_Wake# & PCIE_CLK_LAN_RQ1#connected to 10K

HSIP

GND
C
RTL8111E-VB-GR-GP
resistor pull high close to PCH side 3D3V_LAN_S5
C

13
14
15
16
17
18
19
20
21
22
23
24
1D05V_LAN_S5
SMB_LAN_DATA
18 PCIE_CLK_LAN_REQ# 1 R3121 2LAN_CLKREQ# R3135
4 PCIE_TXP0 0R0402-PAD 1 DY 2
4 PCIE_TXN0
17 CLK_PCIE_LAN 3D3V_S5 0R3J-0-U-GP
17 CLK_PCIE_LAN#
1D05V_LAN_EVDD10 -1 0114 S D

SCD1U10V2KX-4GP
4 PCIE_RXP0 1 2 PCIE_RXP4_C Q3103

1
C3145 SCD1U10V2KX-4GP C3151

1
C3152 R3133

AO3419L-GP
G

1
1 2 PCIE_RXN4_C 100KR2J-1-GP C3150

2
4 PCIE_RXN0

SC1U10V2KX-1GP
C3147 SCD1U10V2KX-4GP

SC1U10V2KX-1GP
2

2
LAN_PW R_ON_T
C3153

SCD22U10V2KX-1GP

1
1D05V_LAN_S5
Layout Note: Close to U3101 pin C3106 ~ C3112 R3132
10KR2J-3-GP
1D05V_LAN_REGOUT 1 2 1 R3131 2 1D05V_LAN_EVDD10
L1 0R0402-PAD

2
IND-4D7UH-192-GP
1

LAN_PWR_ON_C
B C3146 C3128 B
C3129 C3130 C3131 C3132 C3133 C3134 C3138 C3139 C3149
SCD1U10V2KX-4GP

SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
Layout Note: Close to U3101
pin C3113&C3114

D
C3113 value modify to 1uF

3D3V_LAN_S5
http://j.gs/47mr 3D3V_LAN_VDDSREG
capacitor
G
Q3104
2N7002A-7-GP
84.2N702.E31
27 LAN_PW R_ON
2ND = 84.2N702.J31
1 R3134 2

S
0R0603-PAD
1

C3137
C3135 C3140 C3141 C3142 C3143 C3144 C3136
SCD1U25V3KX-GP

SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C3122 change to 4.7uF X5R
type capacitor Title
Layout Note: Close to U3101 pin C3115 ~ C3120
LOM
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 31 of 102

5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 32 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 33 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 34 of 102

5 4 3 2 1
A B C D E

4 4

3 3

(Blanking)

2 2

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 Taipei Hsien 221, Taiwan, R.O.C. 1

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 35 of 102

A B C D E
5 4 3 2 1

5V_S0 5V_S5

DY U3609
C3607 1 S D 8
SCD1U25V3KX-GP 2 S D 7
84.S0610.B31 1 2 3 S D 6
2nd = 84.00610.C31 4 G D 5
DCBATOUT Q3604 RUN_ENABLE if have use Reset IC tied to Pure_HW_shutdown
NDS0610-NL-GP AO4468-GP
have to take care R3622 and R3623 value H_THERMTRIP# 6,18,85
DY 84.04468.037
D 1 R3619 2 Z_12V S D 1 R3623 2 2nd = 84.08882.037 D
DY 10KR2J-3-GP DY 0R2J-2-GP

E
1

1
R3601

1
C3606 R3621 DY D3602 1 1KR2J-1-GP
2 H_PWRGD_R B Q3601

G
6,17,71 H_CPUPWRGD_E

SCD22U25V3KX-GP

330KR2J-L1-GP
R3620 MMPZ5239BPT-GP 3D3V_S0 3D3V_S5 MMBT2222A-3-GP
DY DY
10KR2J-3-GP DY 83.9R103.D3F U3607 84.02222.V11

C
1
2 R3618 1 Z_12V_G3 DY 2ND = 83.9R103.F3F 1 S D 8 C3602 2nd = 84.02222.R11

A
330KR2J-L1-GP 2 S D 7 R3622 DY

SCD1U10V2KX-5GP
DY 3 S D 6 1 1KR2J-1-GP
2

2
17,27 PLT_RST#_ARST

1
4 G D 5
RUN_ENABLE_S
R3617
3/09 change--DY components 100KR2J-1-GP AO4468-GP
DY 84.04468.037
2nd = 84.08882.037
2
Z_12V_D4
PM_SLP_S3#_RUN_RNABLE 2
1D1V_S0 1D1V_S5
U3610 3 PURE_HW_SHUTDOWN# 27,28
3D3V_AUX_S5 1 R3635 2 1 S D 8
DY 10KR2J-3-GP DY 2 S D 7
41 3V_5V_EN 1 D3601
R3632 3 S D 6 BAS16-6-GP
1 49K9R2F-L-GP
2 4 G D 5 83.00016.K11

1
Q3603 Q3605 2ND = 83.00016.F11
G 4 3 AO4468-GP DY R3602 2 1
18,27,45,46,92 PM_SLP_S3# S5_ENABLE 27,97

1
C3613 84.04468.037 200KR2J-L1-GP R3603
D PM_SLP_S3 5 2 2nd = 84.08882.037 2KR2F-3-GP

SCD1U25V2KX-GP
PM_SLP_S3# 18,27,45,46,92
DY

2
S 6 1
RUN_ENABLE_HV
DY 2N7002K-2-GP DY 2N7002KDW-GP
84.2N702.J31 84.2N702.A3F
2ND = 84.2N702.031 2nd = 84.DM601.03F

ESD Proceted:2KV U3608


1D5V_S0 AO3404A-GP 1D5V_S3 For Discharge
S D
3D3V_S0 3D3V_S5
84.03404.B31

G
C 5V_S5 U3601 C

1
1 6 DY R658
VCC EN PM_SLP_S3# 18,27,45,46,92
2 5 5V_S0 R3631 DY 100R2J-2-GP R660
GMT_RUN_ENABLE GND DC2
3 4 3D3V_S0 1 10KR2J-3-GP
2 RUN_ENABLE_HV DY 100KR2J-1-GP
HV DC1

2
1

1
1 R3604 2 G5938TL1U-GP C3611 C3612

3D3V_RUNPWR
RUN_ENABLE_S
0R2J-2-GP 74.05938.09P SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
DY DY
2

2
R3606 PM_SLP_S3
1 0R2J-2-GP
2 3D3V_S0
R3633 DY

D
1 10KR2J-3-GP
2 84.2N702.E31
PM_SLP_S3#_EN

PM_SLP_S3# 18,27,45,46,92 Q63


DY 2ND = 84.2N702.D31 Q64

D
2N7002-11-GP
DY
1

C3615 G
18,27,45,46,92 PM_SLP_S3#
SCD1U25V2KX-GP 2N7002A-7-GP
DY G
2

5V_S5 U3602

S
S
1 6
VCC EN
2 5 1D5V_S0
GMT_RUN_ENABLE_1 GND DC2
3 4 1D1V_S0
HV DC1

G5938TL1U-GP 2011.04.16 Add 3D3V_S0 Discharge circuit


RUN_ENABLE_HV 1 R3605 2 74.05938.09P
0R2J-2-GP

Power Sequence 3D3V_S0 3D3V_S5

B 3D3V_S0 B

1
R3624 R3629
10KR2J-3-GP 10KR2J-3-GP
1

D3603 DY
R3627 BAW56-5-GP

2
10KR2J-3-GP 2
18,27,45,46,92 PM_SLP_S3#
DY
3
2

R3626 83.00056.Q11
45 1D2V_S0_PWRGD 2 1D2V_S0_PWRGD_R
1 0R2J-2-GP 1 2ND = 83.00056.G11
83.00056.Q11 3RD = 83.00056.K11
2ND = 83.00056.G11 D3605
3RD = 83.00056.K11 BAW56-5-GP D3604
2 BAW56-5-GP
6 FS1R1
27,45 1D1V_S5_PWRGD 2
DY 3 VCORE_EN_R 1 R3628 2 R3625
VCORE_EN 42
0R0402-PAD RUNPWROK_D 1 0R2J-2-GP
DY 3 2 FCH_PWRGD 18

1
18,27,45,46,92 PM_SLP_S3# 1
1

C3614 1
46 1D5V_S3_PWRGD
SCD1U25V2KX-GP R3613
DY 83.00056.Q11 330KR2J-L1-GP
2

D3606 2ND = 83.00056.G11


2

BAS16-6-GP 3RD = 83.00056.K11 2011.03.09 change add 330K


1

3 DY D3607
48 2D5V_PGOOD
BAW56-5-GP
2 42 VRM_VDD_PWRGD 2

83.00016.K11 DY 3
2ND = 83.00016.F11
42 VRM_VDD_NB_PWRGD 1 confrim Intersil by FAE,don't need L/S
R3630 83.00056.Q11
1 0R2J-2-GP
2 2ND = 83.00056.G11
3RD = 83.00056.K11

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power On Logic
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 36 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 37 of 102
5 4 3 2 1

Adaptor in to generate DCBATOUT


1
TP3802 AFTE30-GP

D D

1 TP3803 TPAD40-OP-GP

DCIN1 AD_JK AD+


NP1 1Pin=3A PU3801
1 1 S D 8
2 S D 7
2 3 S D 6

1
3 AD+2 4 G D 5

K
1
4 PC3807 PC3806 PR3803 PC3805 PC3804 PC3801

SCD1U50V3ZY-1-GP

SCD1U50V3ZY-1-GP

SCD1U50V3ZY-1-GP

SCD1U50V3ZY-1-GP

SCD1U50V3ZY-1-GP
5 PD3801 P1403EV8-GP

2
NP2 200KR2F-L-GP P6SBMJ27APT-GP 84.P1403.B37
83.P6SBM.DAG 2nd = 84.04407.F37
ACES-CON5-14-GP

A
20.F1701.005 2nd = 83.P6SMB.JAG

2
2ND = 20.F1763.005

1
PR3801
3rd = 83.P6SMB.CAG200KR2F-L-GP PC3802

SC1U50V5ZY-1-GP
2
C C

1
AD_DETECT 27
2 AD_JK
1

PC3803 PR3804
34K8R2F-1-GP AFTP3801 1
SCD1U50V3ZY-1-GP
2

1
PR3805
DY 100KR2J-1-GP

2
PQ3802R2
PQ3801 E
B C PWR_ADJK_EN B B
R1
B R1 C
27 AD_OFF
E
R2 PDTA124EU-1-GP
84.00124.K1K

1
PDTC124EU-1-GP 2ND = 84.00024.01K
PR3802
100KR2J-1-GP
84.00124.H1K
2ND = 84.00124.X1K

2
<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCIN_JACK
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 38 of 102
5 4 3 2 1
5 4 3 2 1

BATTERY CONNECTOR
BT+

1
PC3901 PC3902
SCD1U50V3KX-GP SC2200P50V2KX-2GP

2
D D

BAT1
8
1

RN3901 BT+ 2
1 8
2 7 BATA_SCL_1 3
27,40 BAT_SCL
3 6 BATA_SDA_1 4
27,40 BAT_SDA
27 BAT_IN# 4 5 BAT_IN#_1 5
6
SRN33J-7-GP PL3901 PL3902 PL3903 7
9

1
MLVS0402M04-GP

MLVS0402M04-GP

MLVS0402M04-GP
PC3905 PC3904

1
ALP-CON7-22-GP

1
DY DY DY PC3903

K
83.5R603.D3F 20.81332.007

2
SC100P50V3JN-2GP

SC100P50V3JN-2GP
PD3901

SC1000P50V3JN-GP-U
2
2ND = 83.5R603.K3F MMPZ5232BPT-GP-U

2
3rd = 83.5R603.Q3F
A

C C

BAT_IN#

BAT_SDA

BAT_SCL
AFTP3901 1 BAT_IN#_1
AFTP3902 1 BATA_SDA_1
AFTP3903 1 BATA_SCL_1
AFTP3904 1 BT+
AFTP3905 1
AFTP3906 1

D3902 D3903 D3901


3

3
1 2 1 2 1 2

BAV99-8-GP BAV99-8-GP BAV99-8-GP


DY
DY DY
3D3V_AUX_KBC

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BATT_CONN
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 39 of 102

5 4 3 2 1
5 4 3 2 1

AD+_TO_SYS DCBATOUT BT+


SSID = Charger PU4001 1 S
PU4002
D 8
AD+ 8 D S 1 2 S D 7
7 D S 2 1 PR4004 2 3 S D 6

1
6 D S 3 D01R3721F-GP-U AD+ 4 G D 5
D G PR4002

http://j.gs/47mr
5 4
100KR2J-1-GP
P1403EV8-GP P1403EV8-GP
A8( ANNIE/ASTRO)

1
84.P1403.B37 84.P1403.B37

1
D
PR4007,PR4008 PR4001
10KR2F-2-GP
AD+_G_2
PG4001 PG4002 PR4005 D
Id= -10A Id= -10A

1
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP 470KR2J-2-GP
Qg= -22nC PR4003 Qg= -22nC

2
AD+ total power R1 R2 Rdson=14~22mohm 49K9R2F-L-GP Rdson=14~22mohm

2
DC_IN_D

2
65w 12.4K 100K PQ4001 2 1

AD+_G_1
3 4 PC4003
80w 41.2k 100K SCD1U50V3KX-GP
BQ24707_ACOK 2 5
DCBATOUT
90w 60.4k 100K 1 6

1
PC4002
AD+

SCD1U25V2ZY-1GP
SCD1U50V3KX-GP
2N7002KDW-GP

SC10U25V6KX-2GP

SC10U25V6KX-2GP
120w 118k 100K PC4004

PC4024

PC4005

PC4006
84.2N702.A3F

PWR_CHG_ACN
PWR_CHG_ACP
SCD1U25V3KX-GP

1
2nd = 84.DM601.03F BQ24707_REGN

SC1U25V5KX-1GP
1 2 BQ24707_VCC

PC4001
PR4015 CHG_AGND
CHG_AGND

2
1

1
20R5F-1GP

5
6
7
8
PR4006 83.R0203.08F

D
D
D
D
3D3V_AUX_S5 316KR3F-2-GP 2nd = 83.1R003.I8F PC4009

2
1 PR4019 2 K A 1 2SC1U10V3KX-3GP PU4004
CHG_AGND 0R0402-PAD P2003BEA-GP

1
PU4003 PD4003
CH520S-30PT-GP

G
4

ACP

ACN
2

1
BQ24707_REGN

S
S
S
PWR_CHG_IOUT 20 VCC

1
PR4009 PC4017

3
2
1
10KR2F-2-GP STOP_CHG# PR4007 PR4011 SCD1U50V3KX-GP

2
R1 12K4R2F-GP 100KR2J-1-GP BQ24707_ACDET 6 17 BQ24707_BTST
connects to KBC ACDET BTST
1

Charger Current=1.4~3.6A
1

C PR4010 PC4007 C

1 2
27 STOP_CHG# 49K9R2F-L-GP SCD01U50V2KX-1GP BQ24707_CMPOUT CMPOUT_R
REGN 16
2

1
PR4014 3
D

PR4008 120KR2F-L-GP CMPOUT BQ24707_HIDRV


HIDRV 18
PQ4005 100KR2F-L1-GP PR4016 PL4001 PR4017 BT+
R2
2N7002A-7-GP CHG_AGND 3D3MR2J-GP 4 D01R3721F-GP-U

2
BQ24707_CMPOUT CMPIN BQ24707_PHASE BT+_R
G 19 1 2 1 2

2
CHG_AGND BQ24707_CMPIN PHASE IND-5D6UH-48-GP-U1

GAP-CLOSE-PWR-3-GP

SCD1U50V3KX-GP
GAP-CLOSE-PWR-3-GP
9 15 BQ24707_LODRV PC4019 PC4020 PC4021
27,39 BAT_SCL
S

SCL LODRV

2
PG4003

PC4022
CHG_AGND

SC10U25V6KX-2GP

SC10U25V6KX-2GP

SC10U25V6KX-2GP
PG4004

1
5
6
7
8
8
27,39 BAT_SDA SDA DY

D
D
D
D
3D3V_AUX_S5 PR4025

2
10R2F-L-GP PU4005
13 BQ24707_SRP 1 2 P2003BEA-GP
SRP
1

BQ24707_ILIM 10
CHG_AGND ILIM
PR4020 BQ24707_SRN

G
SRN 12 1 2 4

S
S
S
100KR2J-1-GP PR4024
BQ24707_REGN_R 11 7D5R2F-GP

3
2
1
IFAULT#
2

1
10KR2F-2-GP
PR4022
DY PWR_CHG_IOUT
5 ACOK# IOUT 7 1 PR4013 2 AD_IA 27
0R0402-PAD BQ24707_CSOP_1

GND

GND
2
BQ24707_REGN
1

3D3V_AUX_S5
PR4021 BQ24707ARGRR-GP

21

14
33KR2F-GP
DY
1

1
B PR4032 PC4016 B
2

100KR2J-1-GP 1 PR4018 2 SCD1U50V3KX-GP

2
0R0402-PAD PC4011
D

1
PQ4007 SC220P50V2KX-3GP BQ24707_CSON_1
2

2N7002A-7-GP

SCD1U25V2KX-GP
2
G CHG_ON# 27

1
PC4023
CHG_AGND CHG_AGND CHG_AGND
S

2
3D3V_AUX_S5
1

CHG_AGND CHG_AGND
PR4029
100KR2J-1-GP
3D3V_AUX_S5 3D3V_AUX_S5
2
1

PR4030
100KR2J-1-GP R662
100KR2J-1-GP AC_IN#
2

BQ24707_ACOK

AC_IN
27 AC_IN
D

A PQ4006 A
84.2N702.E31 <Core Design>
2N7002A-7-GP 2ND = 84.2N702.D31 PQ4008

G AC_IN# G
2N7002A-7-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
S

Title
BQ24745_Charger
Size Document Number Rev
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 40 of 102

5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_5v3p3v

DCBATOUT PWR_5V_DCBATOUT

3D3V_S5 3D3V_PWR DCBATOUT PWR_3D3V_DCBATOUT PG4111


D PG4105 PWR_5V_ENTRIP1 PWR_3D3V_ENTRIP2 1 2 D
1 2 PG4101

1
1 2 GAP-CLOSE-PWR

1
GAP-CLOSE-PWR PC4105 DY PR4104 PR4103 PG4112
PG4106 GAP-CLOSE-PWR SC18P50V2JN-1-GP 120KR2F-L-GP PC4106 DY 91KR2F-GP 1 2

2
1 2 PG4102 SC18P50V2JN-1-GP

2
1 2 GAP-CLOSE-PWR

2
GAP-CLOSE-PWR PG4113
PG4107 GAP-CLOSE-PWR 1 2
1 2 PG4103
1 2 GAP-CLOSE-PWR 5V_PWR 5V_S5
GAP-CLOSE-PWR PG4114 PG4116
PG4108 GAP-CLOSE-PWR 1 2 1 2
1 2 PG4104
1 2 GAP-CLOSE-PWR GAP-CLOSE-PWR
GAP-CLOSE-PWR PG4115 PG4118
PG4109 GAP-CLOSE-PWR 1 2 1 2
1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR
GAP-CLOSE-PWR PG4120
PG4110 1 2
1 2 DCBATOUT
PWR_3D3V_DCBATOUT PWR_5V_DCBATOUT GAP-CLOSE-PWR
GAP-CLOSE-PWR PC4101 PG4122
PC4113 1 2

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
1

1
GAP-CLOSE-PWR
PG4123
PU4101 1 2

2
1

EC4101 PC4112 PC4110 D PU4104 PC4114 PC4111


8
7
6
5

5
6
7
8

1
P2003BEA-GP P2003BEA-GP EC4102 GAP-CLOSE-PWR

D
D
D
D
SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
D
D
D
D

D PG4124
SCD1U25V2KX-GP
2

16
2ND = 84.07410.A37 2ND = 84.07410.A37 1 2

SCD1U25V2KX-GP
2

2
DY PU4103
DY Design Current =6A GAP-CLOSE-PWR

VIN

G
4 4 PG4125
G

OCP>10.2A

S
S
S
Design Current =4.6A SCD1U25V3KX-GP
S
S
S

1 2
PC4115 PR4106 PC4118 G S
1
2
3

3
2
1
OCP>7.8A 1PWR_3D3V_BOOT1 2 PWR_3D3V_BOOT2 PWR_5V_BOOT1 2PWR_5V_BOOT1_1 1 GAP-CLOSE-PWR
S G 2 1
PR4105 2D2R3J-2-GP
9
VBST2 VBST1
22 1
0R0603-PAD
2
PG4126
3D3V_PWR SCD1U25V3KX-GP PWR_3D3V_UGATE2 PWR_5V_UGATE1 5V_PWR
C
68.3R31A.10V
PL4101
10
DRVH2 DRVH1
21
PL4102
2ND = 68.3R310.20A 1 2
C
1 2 PWR_3D3V_PHASE2 11 20 PWR_5V_PHASE1 1 2 GAP-CLOSE-PWR
IND-3D3UH-116-GP LL2 LL1 IND-3D3UH-116-GP PG4127
PWR_3D3V_LGATE2 12 PWR_5V_LGATE1
2ND = 68.3R310.20A D 19 68.3R31A.10V 1 2
1

DRVL2 DRVL1
D
8
7
6
5

5
6
7
8
TC4101 GAP-CLOSE-PWR

D
D
D
D
SE220U6D3VM-21-GP
SCD1U10V2KX-4GP

D
D
D
D

PG4121 PU4102 PWR_3D3V_VOUT2 7 24 PWR_5V_VOUT1 PU4105 PG4117 PC4120


2

1
VO2 VO1
PC4119

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
AON7702-GP AON7702-GP

SCD1U10V2KX-4GP
PWR_3D3V_FB2 5 2 PWR_5V_FB1 TC4102
VFB2 VFB1

SE220U6D3VM-21-GP
2ND = 84.07692.B37

2
2ND = 84.07692.B37
2

2
G
S
S
S
2 PWR_5V3D3V__EN0
S
S
S
G

1 13 23
PR4109 DY820KR2F-GP EN0 PGOOD
G S
1
2
3
4

4
3
2
1
PWR_3D3V_ENTRIP26 PWR_5V_ENTRIP1
S G PWR_5V3D3V_VREF TRIP2 TRIP1
1

3 15
VREF GND
Matsuki cap 220uF
1
PC4122

PWR_5V3D3V_TONSEL
4 25
6.3V, ESR=17mohm TONSEL GND
SCD22U10V2KX-1GP

Matsuki cap 220uF


2

14 18 PWR_5V3D3V_ENC 6.3V, ESR=17mohm


SKIPSEL ENC
PWR_5V3D3V_SKIPSEL

2
VREG3

VREG5
PR4113

0R0402-PAD
1

1
TPS51123RGER-GP
8

17

1
PR4112 5V_PWR_2 PR4114

1
PR4111 0R2J-2-GP 3D3V_PWR_2 0R2J-2-GP
DY PG4119 DY
PWR_5V3D3V_VREG3

6K65R2F-GP PR4115
1 2 33KR2F-GP
2

1 2

1 2
PWR_3D3V_FB2_R 3V_5V_EN 36 PWR_5V_FB1_R
PC4124 GAP-CLOSE-PWR-3-GP

2
DYSC18P50V2JN-1-GP PC4128 DY
SC18P50V2JN-1-GP
2

2
1

1
3D3V_S5
PR4116 PC4125 PR4119
1

10KR2F-2-GP PC4126 21K5R2F-GP

1
SC4D7U6D3V5KX-3GP

PC4129 3D3V_PWR_2 3D3V_AUX_S5


SC22U6D3V5MX-2GP
SC10U6D3V3MX-GP

B 2 PR4117 1 PR4110 Close to VFB Pin (pin2) B


3D3V_PWR_2
2

2
PR4122 100KR2J-1-GP
0R0402-PAD DY
PR4118 2 1
2 1
5V_PWR_2 DY0R2J-2-GP

2
0R0402-PAD 3V_5V_POK 18,45
Close to VFB Pin (pin5)
2 PR4120
PWR_5V3D3V_VREF DY 1
0R2J-2-GP

3D3V_PWR_2 2 PR4121 1
0R0402-PAD
SKIPSEL VREG3 or VREG5 VREF(2V) GND
2 PR4123
1
DY 0R2J-2-GP Operating OOA Auto Skip Auto Skip
Mode PWM only

TONSEL CH1 CH2


GND 200kHz 265kHz
VREF 245kHz 305kHz
VREG3 300kHz 375kHz
VREG5 365kHz 460kHz

PR4130
DCBATOUT
2 DY 1
ECRST# 27
0R2J-2-GP
2

DCBATOUT 2
PR4124
DY
0R2J-2-GP
1 3V_5V_EN
PD4105
MMPZ5231BPT-GP
83.5R103.E3F http://j.gs/47mr
1
1

A PR4128 A
1

PR4125 PWR_5V3D3V__EN0_R 2 1PWR_5V3D3V__EN0


100KR2F-L1-GP PU4106 0R2J-2-GP PR4127
4 3 20KR2F-L-GP
2

<Variant Name>
5 2 PWR_5V3D3V__EN0_1
2
1

PWR_5V3D3V__EN0_2 6 1 PR4126
Wistron Corporation
1

68KR2F-GP
PR4129 2N7002KDW-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
750KR2F-GP 84.2N702.A3F Taipei Hsien 221, Taiwan, R.O.C.
2

Vz=3.9V Title
2

UVP=FUNCTION TPS51123_5V_3D3V
Size Document Number Rev
DOBATOUT<7.5V 3V/5V DISABLE A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 41 of 102

5 4 3 2 1
5 4 3 2 1

DCBATOUT

1
PC4266 PC4267 PC4268 RFC4269 SA_0113'11

SCD1U25V2ZY-1GP
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
BY POWER TEAM
DY

2
5
6
7
8
PWR_VCC_CORE_ISUMP_NB 43

D
D
D
D
PU4202

1
SIR462DP-T1-GE3-GP

PC4220 SCD047U25V2KX-GP

PR4224
D 1 PR4201 2 PR4243 D
10R2F-L-GP PC4201 2K61R2F-1-GP

PC4219 SCD33U6D3V2KX-1-GP
SC1KP50V2JN-2GP

G
S
S
S
2 1

2
6 APU_VDDNB_RUN_FB_L

1
PC4209 PWR_VCC_CORE_ISUMP_NB_R

4
3
2
1
SC330P50V2KX-3GP Cyntec 0.36uH Iomax=36A

1
DCR=1.05mohm

2
6 APU_VDDNB_RUN_FB_H

11KR2F-L-GP
1 2 PR4244 OPC>60A

2
PC4202 NTC-10K-27-GP Idc=30A, Isat=60A
APU_VDDNB 1 PR4202 2 SC330P50V2KX-3GP Place close to APU_VDD
10R2F-L-GP PWR_VCC_CORE_UG1
PL4301

2
VSUMG- PL4201
VSUMG- 43
APU_VDDNB_RUN_FB_R PWR_VCC_CORE_PH1 1 2

1
IND-D36UH-9-GP
PC4205 PR4203 PR4204 PC4221
1 2 143KR2F-GP
1 2 1 2 PR4251 SCD1U25V2KX-GP

5
6
7
8

1
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
806R2F-GP

ST470U2VDM-5-GP-U1

ST470U2VDM-5-GP-U1
1K27R2F-L-GP
PC4206

D
D
D
D
1

2
SC470P50V2KX-3GP PU4203

PWR_VCC_CORE_ISUMN_NB
2 2

PG4214

PG4215
PR4206

PWR_VCC_CORE_NTC_NB
1 2 1 2 1 2 SIR166DP-T1-GE3-GP

PWR_VCC_CORE_PROG2

TC4201

TC4203
100KR2F-L1-GP PC4208 324R2F-GP PR4265

3
SC100P50V2JN-3GP PR4205 6K65R2F-GP

1
SC1KP50V2KX-1GP
2

G
S
S
S
2
5V_S5

4
3
2
1
PWR_VCC_CORE_BOOT1_NB 43
1

PC4207 APU_VDDNB_RUN_FB_C
PWR_VCC_CORE_UG1_NB 43
PR4207 SC1KP50V2JN-2GP PWR_VCC_CORE_LG1
PWR_VCC_CORE_PH1_NB 43
8K06R2F-GP PH1 VO1
1

43 PWR_VCC_CORE_ISEN1_NB PWR_VCC_CORE_LG1_NB 43
2

PC4260
SCD22U25V3KX-GP
PWR_VCC_CORE_BOOT2_R PWR_VCC_CORE_PH2

49
48
47
46
45
44
43
42
41
40
39
38
37

2
PU4201 PWR_VCC_CORE_ISEN1 1 PR4266 2

2
5V_S5 10KR2F-2-GP

PROG2
GND
ISEN1_NB
ISEN2_NB
VSEN_NB
RTN_NB
ISUMP_NB
ISUMN_NB
NTC_NB

BOOT1_NB
UG1_NB
PH1_NB
LG1_NB
PR4256
2D2R3-1-U-GP PWR_VCC_CORE_ISUMP 1 PR4268 2 PH1
C 3K65R2F-1-GP C

1
1
1 36 PR4259 PR4257 VSUM- 1 PR4258 2
PWR_VCC_CORE_FB_NB FB2_NB PWM2_NB PWR_VCC_CORE_BOOT2 0R0402-PAD
3D3V_S5 1 PR4208 2 2 FB_NB BOOT2 35 0R0402-PAD 1R2J-GP
100KR2F-L1-GP PWR_VCC_CORE_COMP_NB 3 34 PWR_VCC_CORE_UG2
PWR_VCC_CORE_VW_NB COMP_NB UG2 PWR_VCC_CORE_PH2 PWR_VCC_CORE_ISEN2 VO1
4 33 1 DY 2

2
PR4222 0R0402-PAD VRM_VDDNB_PWRGD VW_NB PH2 PWR_VCC_CORE_LG2 PR4245
36 VRM_VDD_NB_PWRGD 1 2 5 PGOOD_NB LG2 32
PR4210
1 0R0402-PAD
2 PWR_VCC_CORE_SVD 6 31 PWR_VCC_CORE_VCCP 10KR2F-2-GP
6 APU_SVD_R SVD VCCP
PR4211
1 0R0402-PAD
2 PWR_VCC_CORE_PWROK 7 ISL6267HRTZ-T-GP 30 PWR_VCC_CORE_PWM3
6,97 H_CPUPWRGD PWROK PWM3
PR4218
1 0R0402-PAD
2 PWR_VCC_CORE_SVC 8 29 PWR_VCC_CORE_LG1
6 APU_SVC_R SVC LG1

1
9 74.06267.A73 28 PWR_VCC_CORE_PH1 PC4228
36 VCORE_EN ENABLE PH1 DCBATOUT
10 27 PWR_VCC_CORE_UG1 SC1U25V3KX-1-GP
36 VRM_VDD_PWRGD PGOOD UG1
1 PR4223 2PWR_VCC_CORE_PROC_HOT 11 26 PWR_VCC_CORE_BOOT1

2
PROC_HOT BOOT1 PWR_VCC_CORE_PROG1
3D3V_S5 1 PR4212 2 0R0402-PAD 12 25
NTC PROG1

ISEN3/FB2
100KR2F-L1-GP

2
DCBATOUT

ISUMN
ISUMP
6 APU_PROCHOT#_VDDIO

COMP

ISEN2
ISEN1
VSEN
DY PR4271

VDD
RTN

1
VIN
DY 2 PWR_VCC_CORE_NTC_R VW
1 1 PR4214 2 PWR_VCC_CORE_NTC 2D2R3-1-U-GP PC4253 PC4254 PC4255 RFC4273 SA_0113'11

FB

5
6
7
8

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PR4213 NTC-470K-9-GP PC4261 DY

SCD1U25V2ZY-1GP
BY POWER TEAM

D
D
D
D
3K83R2F-GP SCD22U25V3KX-GP PU4205
13
14
15
16
17
18
19
20
21
22
23
24

2
1 PR4215 2 PWR_VCC_CORE_BOOT1_R PWR_VCC_CORE_PH1 SIR462DP-T1-GE3-GP

2
27K4R2F-GP
PWR_VCC_CORE_VW

PWR_VCC_CORE_ISUMN
PWR_VCC_CORE_COMP

PWR_VCC_CORE_ISEN3
PWR_VCC_CORE_ISEN2
DY PWR_VCC_CORE_ISEN1
PWR_VCC_CORE_FB

PC4210 PWR_VCC_CORE_VIN 1 PR4246 2 DCBATOUT


1

SE100U25VM-L1-GP

G
S
S
S
0R0402-PAD

4
3
2
1
79.10712.L02 PWR_VCC_CORE_VDD 1 PR4253 2 5V_S5
2

1R2F-GP
Cyntec 0.36uH Iomax=36A
DCR=1.05mohm
1

1
PC4223 PWR_VCC_CORE_UG2
PC4262 Idc=30A, Isat=60A
1

SCD1U25V2KX-GP

SCD22U6D3V2KX-1GP APU_VDD
2

2
2

PR4216 PC4211 PL4202


8K06R2F-GP SC1KP50V2JN-2GP PWR_VCC_CORE_PH2 1 2
IND-D36UH-9-GP
1

PC4213
2

B 1 2 B

5
6
7
8
SC33P50V2JN-3GP

D
D
D
D
1

1
ST470U2VDM-5-GP-U1

ST470U2VDM-5-GP-U1
PWR_VCC_CORE_ISUMP PU4206
SIR166DP-T1-GE3-GP PG4216 PG4217 2 2

GAP-CLOSE-PWR-3-GP

TC4204

TC4206
PR4217 PC4258 PWR_VCC_CORE_FB_C

GAP-CLOSE-PWR-3-GP
DY
1KR2F-3-GP SC68P50V2JN-1GP PR4255

3
1 2 1 2 1 2SC1KP50V2KX-1GP 2K61R2F-1-GP
2

G
S
S
S
324R2F-GP PC4214 1
PR4220 PWR_VCC_CORE_ISEN2

4
3
2
1
1

11KR2F-L-GP
PR4254
PC4218 PR4219 PC4225 PWR_VCC_CORE_ISUMP_R PH2 VO2
SCD039U16V2KX-GP

1 2 143KR2F-GP
1 2 1 2 PWR_VCC_CORE_ISEN1 PC4226 PWR_VCC_CORE_LG2
PR4221 SCD33U6D3V2KX-1-GP 1
2

SC470P50V2KX-3GP 2K26R2F-1-GP PR4260


2

NTC-10K-27-GP
1

PC4264 Place close to


PWR_VCC_CORE_FB_R PC4263 SCD22U6D3V2KX-1GP
PL4201
2

SCD22U6D3V2KX-1GP PWR_VCC_CORE_ISEN2 1 PR4247 2


2

1 2 VSUM- 10KR2F-2-GP

http://j.gs/47mr
PR4267
1

VSUM- 1K05R2F-GP PWR_VCC_CORE_ISUMP 1 PR4249 2 PH2


PC4227 3K65R2F-1-GP
1 PR4261 2 SCD1U25V2KX-GP
APU_VDD
2

10R2F-L-GP PC4216 VSUM- 1 PR4248 2


SC330P50V2KX-3GP 1R2J-GP
2 1
1

PC4224 PR4209 PWR_VCC_CORE_ISEN1 1 DY 2 VO2


6 APU_VDD_RUN_FB_H
SC330P50V2KX-3GP PWR_VCC_CORE_PROG1 1 6K65R2F-GP
2 PR4250
1 2 10KR2F-2-GP
2

6 APU_VDD_RUN_FB_L
DY
PC4217 1 DY 2PWR_VCC_CORE_NTC_NB_R 1 PR4262 2 PWR_VCC_CORE_NTC_NB
1 PR4252 2 SC1KP50V2JN-2GP PR4263 NTC-470K-9-GP
10R2F-L-GP 3K83R2F-GP
1 PR4264 2
27K4R2F-GP
DY

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6267_VDD_CORE
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 42 of 102
5 4 3 2 1
5 4 3 2 1

D D

DCBATOUT

SA_0113'11

1
PC4301 PC4302 PC4303 RFC4305
BY POWER TEAM

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD1U25V2ZY-1GP
DY

2
5
6
7
8
D
D
D
D
PU4301
SIR462DP-T1-GE3-GP

G
S
S
S
4
3
2
1
Cyntec 0.36uH
Iomax=18A
DCR=1.05mohm OCP>27A
42 PWR_VCC_CORE_UG1_NB Idc=30A, Isat=60A
APU_VDDNB
PL4301
42 PWR_VCC_CORE_PH1_NB 1 2
IND-D36UH-9-GP

5
6
7
8

1
TC4301 TC4302

D
D
D
D

SE330U2VDM-L-GP
PU4302 SE330U2VDM-L-GP
SIR166DP-T1-GE3-GP

2
PG4307 PG4308

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP
G
S
S
S

1
4
3
2
1

C
42 PWR_VCC_CORE_LG1_NB Panasonic 330uF C

2V, ESR=9 mohm

PH_NB VNB

42 PWR_VCC_CORE_ISEN1_NB 1 PR4303 2
1 PR4302 2 PWR_VCC_CORE_BOOT1_NB_R PWR_VCC_CORE_PH1_NB 10KR2F-2-GP
42 PWR_VCC_CORE_BOOT1_NB
1

2D2R3-1-U-GP
PC4308 1 PR4305 2 PH_NB
42 PWR_VCC_CORE_ISUMP_NB
SCD22U25V3KX-GP 1K82R2F-1-GP

1 PR4306 2 VNB
42 VSUMG-
10R2F-L-GP

B B

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6267_VDDNB
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 43 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 44 of 102
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1D1V_S5 DCBATOUT PWR_DCBATOUT_1D1V

PG4501
1 2
PWR_DCBATOUT_1D1V
GAP-CLOSE-PWR
PG4502
1 2
3D3V_S5 PC4502 PC4503 PC4504
GAP-CLOSE-PWR

SC10U25V5KX-GP
SC10U25V5KX-GP

SC10U25V5KX-GP
1

2
SCD1U50V3KX-GP
PG4503

1
DY

10KR2J-3-GP

PC4505
1 2
PR4502

1
5
6
7
8
GAP-CLOSE-PWR 1D1V_PWR 1D1V_S5

D
D
D
D
PG4504 PU4502 PG4505
PR4503
1 2 SIS412DN-T1-GE3-GP 1 2

2
2 1
27,36 1D1V_S5_PWRGD 0R0402-PAD GAP-CLOSE-PWR GAP-CLOSE-PWR
Design Current =4A
D PG4506 D
OCP>6.8A

G
S
S
S
1 2
PU4501 PC4506

4
3
2
1
PR4504 1 2 PR4501 SCD1U25V3KX-GP GAP-CLOSE-PWR
82KR2F-1-GP PWR_1D1V_PWRGD 1 11 2D2R3J-2-GP PG4507
PWR_1D1V_TRIP PGOOD GND PWR_1D1V_BOOT 1 1D1V_PWR
2 10 2PWR_1D1V_BOOT_R2 1 PL4501 1 2
PD4501 PWR_1D1V_EN TRIP VBST PWR_1D1V_UGATE
K A 3 9
SDMK0340L-7-F-GP PWR_1D1V_FB EN DRVH PWR_1D1V_PHASE GAP-CLOSE-PWR
4 8 1 2

1
PWR_1D1V_CCM VFB SW IND-2D2UH-46-GP-U PG4509
5 7 5V_S5
TST V5IN

GAP-CLOSE-PWR-3-GP
PR4505 1 2 6 PWR_1D1V_LGATE PR4506 2D2R5J-1-GP 1 2
18,41 3V_5V_POK
DY

1
100KR2J-1-GP DRVL PC4508

1
PG4508

SCD1U10V2KX-4GP
PC4507 GAP-CLOSE-PWR

151218_SW_GND_VTT_1D1V
1

1
PC4501
SC1KP50V2KX-1GP PR4507 TPS51211DSCR-GP-U SC1U10V2KX-1GP TC4501 PG4510

2
5
6
7
8
470KR2F-GP SE220U2VDM-8GP 1 2

2
D
D
D
D
2 PU4503

2
SI7716ADN-T1-GE3-GP GAP-CLOSE-PWR

2
PG4511
1 2

G
S
S
S
GAP-CLOSE-PWR

SC330P50V2KX-3GP
PWR_1D1V_PWR PG4512

4
3
2
1
1 2

PC4509 GAP-CLOSE-PWR

1
DY

1
PR4508

2
DY PC4510
6K49R2F-1-GP
SC18P50V2JN-1-GP

2
2
PWR_1D1V_FB

1
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
PR4509
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B 11K5R2F-GP
C O/P cap: 220U 2V EEFCX0D221ER 15mOhm 3.87Arms PANASONIC/79.22719.20L C
H/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037

2
L/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037

Vout=0.704V*(R1+R2)/R2

SSID = PWR.Plane.Regulator_1D2V_S0
DCBATOUT PWR_DCBATOUT_1D2V

PG4513
1 2

GAP-CLOSE-PWR PWR_DCBATOUT_1D2V
PG4514
1 2
3D3V_S5 GAP-CLOSE-PWR PC4513 PC4514 PC4518
PG4515

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
1

2
SCD1U50V3KX-GP
1 2
1
10KR2J-3-GP

PC4516
B B
PR4514 GAP-CLOSE-PWR
DY DY

1
5
6
7
8
PG4516

D
D
D
D
1 2 PU4505 1D2V_PWR 1D2V_S0
PR4511
SIS412DN-T1-GE3-GP Design Current =5.25A
2

2 1 GAP-CLOSE-PWR PG4517
36 1D2V_S0_PWRGD 0R0402-PAD OCP<8.9A 1 2
G
S
S
S
GAP-CLOSE-PWR
PR4513 PU4504 PC4519 PG4518
4
3
2
1 2 PR4516 SCD1U25V3KX-GP 1 1 2
200KR2F-L-GP PWR_1D2V_PWRGD 1 11 2D2R3J-2-GP
PGOOD GND PL4502 1D2V_PWR
PWR_1D2V_TRIP 2 10 PWR_1D2V_BOOT 1 2PWR_1D2V_BOOT_R2 1 GAP-CLOSE-PWR
PD4502 PWR_1D2V_EN TRIP VBST PWR_1D2V_UGATE PG4519
K A 3 9
SDMK0340L-7-F-GP PWR_1D2V_FB EN DRVH PWR_1D2V_PHASE
4 8 1 2 1 2

1
PWR_1D2V_CCM VFB SW
DY 5
TST V5IN
7 5V_S5

GAP-CLOSE-PWR-3-GP
PR4518 1 2 6 PWR_1D2V_LGATE PR4517 2D2R5J-1-GP GAP-CLOSE-PWR
18,27,36,46,92 PM_SLP_S3#
DY
1

DRVL COIL-2D2UH-27-GP

SCD1U10V2KX-4GP
100KR2J-1-GP PC4520 PC4521 PG4520

1
PG4521

SCD1U10V2KX-4GP
PC4512 1 2
151218_SW_GND_VTT_1D2V
1

1
PC4515

PR4515 TPS51211DSCR-GP-U SC1U10V2KX-1GP PT4502


SC1KP50V2KX-1GP

2
5
6
7
8

470KR2F-GP SE220U2VDM-8GP GAP-CLOSE-PWR

2
D
D
D
D

PU4506 PG4522
2

SIS412DN-T1-GE3-GP 1 2

2
GAP-CLOSE-PWR
PG4523
G
S
S
S

1 2
SC330P50V2KX-3GP

PWR_1D2V_PWR
4
3
2
1

GAP-CLOSE-PWR
PG4524
PC4511 1 2
DY

1
GAP-CLOSE-PWR
2

1
PR4512 PG4525
7K5R2F-1-GP PC4517 1 2
SC18P50V2JN-1-GP

2
GAP-CLOSE-PWR

2
PWR_1D2V_FB
A A

I/P cap: 4.7U 25V K0805 X5R/ 78.47522.51L

1
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B PR4510
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 3.87Arms PANASONIC/79.22719.20L <Variant Name>
10K5R2F-GP
H/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
L/S: SIS412DN/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037 Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51211_1D1V_1D2V
Vout=0.704V*(R1+R2)/R2 Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 45 of 102
5 4 3 2 1
A B C D E

DCBATOUT DCBATOUT_1D5V
PG4601
SSID = PWR.Plane.Regulator_1p5v0p75v 1 2 1D5V_PW R 1D5V_S3

GAP-CLOSE-PW R
PG4602 PG4605
1 2 1 2

GAP-CLOSE-PW R GAP-CLOSE-PW R
5V_S5 PG4603 PG4606
1 2 1 2
4 4

SC1U10V3KX-3GP
DCBATOUT_1D5V GAP-CLOSE-PW R GAP-CLOSE-PW R
PG4604 PG4608

PC4601
3D3V_S0 84.00172.037
1 2 1 2

1
BSZ115N03MSC
GAP-CLOSE-PW R GAP-CLOSE-PW R
Id=20A, Qg=9.8nC, PG4609

PC4614
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC4D7U25V5KX-GP
2
1

5
6
7
8
Rdson=8.9 mohm

PC4609

PC4611

PC4612

PC4613
1 2

1
D
D
D
D
PR4604
20KR2J-L2-GP GAP-CLOSE-PW R
PU4602 PG4610

2
PU4601 SIR172DP-T1-GE3-GP 1 2
2

PR4605_2
20 12 PC4619
36 1D5V_S3_PW RGD PGOOD V5IN 84.00172.037

G
S
S
S
SCD1U25V3KX-GP 2nd = 84.08065.037 Design Current = 13.7A GAP-CLOSE-PW R
0D75V_EN 17 PR4605 PG4611
OCP>23.3A

4
3
2
1
VTTEN PW R_1D5V_VBST1
VBST 15 2 1 2 1 2
PW R_1D5V_EN 16 2D2R3J-2-GP
EN/PSV GAP-CLOSE-PW R
PW R_1D5V_VREF 6 14 PW R_1D5V_DRVH 1D5V_PW R PG4612
VREF DRVH
1

1 2
PR4603 PL4601
10KR2F-2-GP 13 PW R_1D5V_SW 1 2 GAP-CLOSE-PW R
SW IND-D68UH-51-GP-U PG4613
1 2
68.R6810.20G

SC4D7U6D3V5KX-3GP
2

1
PW R_1D5V_REFIN 8 11 TPS51216_DRVL

SCD1U10V2KX-4GP
REFIN DRVL

5
6
7
8

1
PU4603 GAP-CLOSE-PW R

PC4620

PC4621
84.00460.037 2nd = 68.R681A.10Q
SCD1U25V3KX-GP

1
D
D
D
D

PG4607
PR4612 PTC4602 PG4614
47KR2F-GP

10
DY DY

SCD1U50V3KX-GP
PGND
2

SiR460DP-T1-GE3

SIR460DP-T1-GE3-GP
PW R_1D5V_MODE 19 2D2R5F-2-GP 68.R6810.20G 1 2

SE390U2D5VM-7GP
SCD01U16V2KX-3GP

GAP-CLOSE-PWR-3-GP

2
MODE
2

3 3
PC4603

PR4601

EC4601
Id=40A, Qg=16.8nC,
200KR2F-L-GP

Id=22~39A

2
1

GAP-CLOSE-PW R
1 PR4608 2

PW R_1D5V_TRIP 18 PW R_1D5V_VDDQS Rdson=4.7~6.1 mohm DCR=2.4~2.7mohm PG4615


PC4602

9
1

TRIP VDDQS

S
S
S
TPS51216_PHS_SET

G
1 2
110KR2F-GP

Size=10X11.5X4

PWR_1D5V_VDDQS
2

1
PR4601_1

4
3
2
1
VTTIN

1
PW R_1D5V_VTTREF5 GAP-CLOSE-PW R
PR4602

VTTREF
1

3 PC4622 PG4616
DY
4K02R2F-GP

VTT
1

+0D75V_DDR_P SC330P50V2KX-3GP
PR4606

1 2
79.3971V.30L

2
PC4610 1 2nd = 77.93971.02L

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
2

SCD22U6D3V2KX-1GP VTTS GAP-CLOSE-PW R


21 GND

SCD1U10V2KX-4GP
2

1
PG4617
PC4615

PC4616

PC4617
4
2

VTTGND
7 GND DY 84.00460.037 1 2
2

2
TPS51216RUKR-GP 2nd = 84.08059.037 GAP-CLOSE-PW R
PG4618
74.51216.073 1D5V_PW R
79.3971V.30L 1 2

SC1U10V3KX-3GP
390uF, 2.5V,6.3X5.7 GAP-CLOSE-PW R

PC4604
1
PG4619
ESR=10mΩ, Iripple=3.87A
http://j.gs/47mr 1 2

2
+0D75V_DDR_P 0D75V_S0 GAP-CLOSE-PW R
PG4624 PG4620
1 2 1 2

GAP-CLOSE-PW R GAP-CLOSE-PW R
PG4625 PG4621
1 2 1 2
2 State S3 S5 VDDR VTTREF VTT 2
GAP-CLOSE-PW R GAP-CLOSE-PW R
S0 Hi Hi On On On PG4622
1 2
S3 Lo Hi On On Off(Hi-Z) DDR_VREF_S3 GAP-CLOSE-PW R
S4/S5 Lo Lo Off Off Off PG4623
PW R_1D5V_VTTREF 1 PR4611 2 1 2
0R0603-PAD
MODE GAP-CLOSE-PW R
PR4609
PR4608 Frequency Discharge Mode 1 2 0D75V_EN
18,27,36,45,92 PM_SLP_S3#
200k ohm 400kHz 0R0402-PAD
Tracking Discharge
100k ohm 300kHz 18,27 PM_SLP_S5# 1 PR4607 2 PW R_1D5V_EN

68k ohm 300kHz 0R0402-PAD

1
Non-tracking Discharge PC4606
47k ohm 400kHz DY SCD1U10V2KX-5GP

2
1
<Variant Name> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

1D5V&0D75V
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 46 of 102
A B C D E
5 4 3 2 1

D D

(Blanking)
C C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 47 of 102

5 4 3 2 1
5 4 3 2 1

D D

5V_S5
RT9025 for 2D5V_S0

1
PR4808
3D3V_S0 0R0402-PAD
Iomax=0.6A
OCP>1.8A

2
1
PC4809

1
SC10U6D3V5MX-3GP PC4807
SC1U6D3V2KX-GP

PWR_2D5V_VDD
2
PG4803

2
1 2
2D5V_PWR 2D5V_S0
C Vo(cal.)=2.51V GAP-CLOSE-PWR C
PG4804
PU4802
PR4809 1 2
3D3V_S0 1 2 PWR_2D5V_EN
0R0402-PAD 5 GAP-CLOSE-PWR
NC#5

1
4 VDD VOUT 6
1

1
3D3V_S0 PC4811 PR4810 PC4808 PC4812 PC4810 RFC4828 RFC4827
3 VIN ADJ 7 DY

SC2200P50V2KX-2GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-5GP

SC100P50V2JN-3GP

SC10U6D3V5MX-3GP
DY 30K1R2F-L1-GP

SCD1U25V2ZY-1GP
2 EN GND 8
1 9 DY DY DY
2

2
PGOOD GND
1

2
PR4812
100KR2J-1-GP PWR_2D5V_ADJ
RT9025-25ZSP-GP

1
74.09025.B3D
2

2nd = 74.09661.07D PR4811


1 2 PWR_2D5V_PGOOD 14KR2F-GP
36 2D5V_PGOOD
PR4807
0R0402-PAD

2
B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT9025(2D5V_S0)
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 48 of 102
5 4 3 2 1
5 4 3 2 1

SSID = VIDEO LVDS CONNECTOR LVDSA_DATA1_R 5


RN9402
4 LVDSA_DATA1 9
CAMERA POWER 3D3V_CAMERA_S0
LVDSA_DATA1_R# 6 3 LVDSA_DATA1# 9
LVDSA_DATA0_R 7 2 LVDSA_DATA0 9
LVDSA_DATA0_R# 8 1 LVDSA_DATA0# 9
SRN0J-7-GP R4905
DCBATOUT_LCD 1 2
0R2J-2-GP DY
RN9406 Q4902
D LVDS1 LVDSA_CLK_R 5 4 3D3V_S0 AO3419L-GP D
LVDSA_CLK 9
48 LVDSA_CLK_R# 6 3 LVDSA_CLK# 9
LVDSA_DATA2_R 7 2 LVDSA_DATA2 9 S D

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
41 50 LVDSA_DATA2_R# 8 1 LVDSA_DATA2# 9

1
1 C4911 C4906

1
SCD1U10V2KX-4GP
SRN0J-7-GP R4907 C4903

G
2 100KR2J-1-GP

2
3

2
4 33R2J-2-GP

2
5 BLON_OUT_C CAM_ON_T
42 6 LCD_BRIGHTNESS 2 R4902 1 LBKLT_CTL
7 DCR_EN#_C
8 3D3V_CAMERA_S0

D
9 USB_CAMERA# 1 R4908 20R0402-PAD
USB_PN7 18
10 USB_CAMERA 1 2 Q4901
USB_PP7 18
11 R4909 0R0402-PAD 2N7002A-7-GP
12 27 CAMERA_EN G 84.2N702.E31
43 13 2ND = 84.2N702.D31
14 For Camera GND
15

S
16
17
18
19
44 20
21
22 LCD_CBL_DET#_C 1 TP4902TPAD14-GP
23 LVDSA_CLK_R
24 LVDSA_CLK_R#
C 25 LCD_DET_G 1 TP4903TPAD14-GP For EMI request C
26 LVDSA_DATA2_R Close to LVDS connector
45 27 LVDSA_DATA2_R#
28
29 LVDSA_DATA1_R LCD_BRIGHTNESS
30 LVDSA_DATA1_R#
31
32 LVDSA_DATA0_R
33 LVDSA_DATA0_R# LVDSA_CLK_R#
46 34 LVDS_DDC_DATA_C1 R4912 2 0R2J-2-GP LVDS_DDC_DATA_R 9 LVDSA_CLK_R
35 LVDS_DDC_CLK_C 1 R4913 2 0R2J-2-GP LVDS_DDC_CLK_R 9

1
36 Color_Engine#_C 1 DY 2 Color_Engine# EC4904 EC4905 EC4902
37 R4915 1KR2J-1-GP DY DY
3D3V_S0 DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP
38 LCDVDD

2
39

SC33P50V2JN-3GP
40
SCD1U10V2KX-5GP
C4901

47 51
1

C4902
49
SC1U6D3V2KX-GP
SSID = VIDEO
2

IPEX-CONN40-2R-GP-U
R4903
20.F1093.040
27 BLON_OUT 1 2 BLON_OUT_C

1KR2J-1-GP

1
R4911
DCBATOUT_LCD DCBATOUT C4910

100KR2J-1-GP

SC100P50V2JN-3GP
2
B B
3D3V_S0 F4901

1
2 1
1

POLYSW -1D1A24V-GP-U LCDVDD


R4916 C4904 C4905 3D3V_S0
Main:69.50007.A41
SCD1U50V3KX-GP
SC1KP50V2KX-1GP

10KR2J-3-GP
2

U4901
DY Second:69.50007.A31
Layout 40 mil
2

LCDVDD_EN 1 5
EN VIN#5
Color_Engine# 19 2 GND
3 VOUT VIN#4 4
1

1
C4907
Close Connector

SC4D7U6D3V3KX-GP
R4917 R4910 C4909 C4908 RT9724GB-GP

SC4D7U6D3V3KX-GP
10KR2J-3-GP 100KR2J-1-GP 74.09724.09F

2
DY

SCD1U16V2KX-3GP
2

2
DY
2

2
Panel BL brightness/Power En/BL En
DY
R4904 27 BRIGHTNESS 1 R9406 2
0R2J-2-GP
2 1 SRN0J-6-GP
DY 3D3V_S0
4 1 LBKLT_CTL
9 L_BKLT_CTRL <Variant Name>
A 3 2 LCDVDD_EN A
10KR2J-3-GP 9 LVDS_VDD_EN
DCR_EN#_C 2 R4901 1 RN9401
33R2J-2-GP
DCR_EN# 19
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC100P50V2JN-3GP
1

C9402 Taipei Hsien 221, Taiwan, R.O.C.


R4906
10KR2J-3-GP Title
2

DY LCD/Inverter Connector
2

Size Document Number Rev


A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 49 of 102

5 4 3 2 1
5 4 3 2 1

68.00245.011
CRT RGB L5001 2nd = 68.00084.A11
CRT_RED 1 2 CRT_R
19 CRT_RED
FCM1608CF-220T05-GP
68.00245.011
L5002 2nd = 68.00084.A11
CRT_GREEN 1 2 CRT_G
19 CRT_GREEN
FCM1608CF-220T05-GP
68.00245.011
L5003 2nd = 68.00084.A11
CRT_BLUE 1 2 CRT_B
19 CRT_BLUE
D FCM1608CF-220T05-GP D

8
7
6
5

1
C5004 C5005 C5006
SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
RN5005
SRN150F-1-GP

2
5V_CRT_S0
1
2
3
4
5V_S0

500mA

1
D5001
F5001 CH551H-30PT-GP
FUSE-1D1A6V-4GP-U 83.R5003.C8F
69.50007.691 2nd = 83.R5003.H8H
2nd = 69.50007.771 3rd = 83.5R003.08F

2
3D3V_S0
5V_CRT_DDC 5V_CRT_DDC
5V_CRT_S0 CRT1

9 VCC_CRT NC#4 4

2
1
NC#11 11
1

3
4
C5013
SCD01U16V2KX-3GP CRT_DDCDATA_CON 12 RN5007
CRT_DDCCLK_CON DDCDATA_ID1 SRN4K7J-8-GP RN5003
15
2

DDCCLK_ID3 SRN4K7J-8-GP
GND 5
CRT_R 1 6

3
4
CRT_G CRT_RED GND
2 7

2
1
C CRT_B CRT_GREEN GND 3D3V_S0_DDC C
3 CRT_BLUE GND 8
GND 10
CRT_VSYNC_CON 14 VSYNC GND 16
13 17 Q5001
CRT_HSYNC_CON HSYNC GND CRT_DDC_DATA CRT_DDCDATA_CON
19 CRT_DDC_DATA 4 3

D-SUB-15-66-GP 5 2

6 1
20.20882.015
2N7002KDW -GP
CRT_DDC_CLK 84.2N702.A3F
19 CRT_DDC_CLK
2nd = 84.DM601.03F
CRT_DDCCLK_CON

3D3V_S0
AFTP5001 1 CRT_R
2

AFTP5002 1 CRT_G
R5006
10KR2J-3-GP
AFTP5003 1 CRT_B
1

B 3D3V_S0_DDC B
CRT_DDCDATA_CON
CRT_HSYNC_CON
CRT_VSYNC_CON
CRT_DDCCLK_CON

1
C5008 C5009 C5010 C5011
DY DY DY SC100P50V2JN-3GP

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP
SC100P50V2JN-3GP
DY

2
5V_S0
CRT Hsync & Vsync level shift
1

C9403
U9402 SCD1U16V2ZY-2GP
2

1 1OE# VCC 8
2 7 R9411
19 CRT_HSYNC 1A 2OE#
2 1 CRT_VSYNC1_2 3 6 CRT_HSYNC1_1 1 10R2J-2-GP
2
CRT_VSYNC_CON 2Y 1Y CRT_HSYNC_CON
4 GND 2A 5 CRT_VSYNC 19 <Variant Name>
A R9412 A
10R2J-2-GP
74AHCT2G125DP-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
73.2G125.00B Taipei Hsien 221, Taiwan, R.O.C.

Title
CRT Connector
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 50 of 102

5 4 3 2 1
5 4 3 2 1

HDMI CONN
HDMI1 DDC_CLK_HDMI 1 AFTP5109

HDMI Level Shifter & CONNECTOR 20

1 HDMI_DATA2_R_C
DDC_DATA_HDMI
HPD_HDMI_CON
1
1
AFTP5110
AFTP5112

2
3 HDMI_DATA2_R_C#
4 HDMI_DATA1_R_C
5
6 HDMI_DATA1_R_C#
D 7 HDMI_DATA0_R_C D
8
9 HDMI_DATA0_R_C#
10 HDMI_CLK_R_C
11
12 HDMI_CLK_R_C#
13
14
15 DDC_CLK_HDMI
16 DDC_DATA_HDMI
17

1
18

R5131

R5132

R5133

R5134

R5135

R5136

R5137

R5138
19

21

2
SKT-HDMI21-GP-U AFTP5111
5V_CRT_S0 5V_S0
RN5105 1 4 SRN0J-6-GP HDMI_CLK_R_C#

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP

604R2F-2-GP
4 APU_HDMI_CLK#
2 3 HDMI_CLK_R_C 22.10296.491
4 APU_HDMI_CLK

1
RN5104 1 4 SRN0J-6-GP HDMI_DATA0_R_C# 1 R5122 2
4 APU_HDMI_DATA0# HDMI_DATA0_R_C Q5113

EC5102
2 3 0R2J-2-GP
4 APU_HDMI_DATA0

1
DY

EC5101
C5102 S
1 4 HDMI_DATA1_R_C#

SCD1U10V2KX-5GP
4 APU_HDMI_DATA1#
2 3 HDMI_DATA1_R_C HDMI_PLL_GND D

2
4 APU_HDMI_DATA1 RN5109 SRN0J-6-GP

SC1U10V2KX-1GP
RN5107 2 3 SRN0J-6-GP HDMI_DATA2_R_C 84.2N702.J31 G 1 R5130 2
4 APU_HDMI_DATA2
1 4 HDMI_DATA2_R_C# DY 100KR2J-1-GP

SC1U10V2KX-1GP
4 APU_HDMI_DATA2#
2nd = 84.2N702.031 2N7002K-2-GP

Close to HDMI Connector 1D5V_S3


2011.03.09 change add eight 604 Ohm
5V_S0

HPD_HDMI_CON

2
R5127
0R0402-PAD

C HDMI_DATA2_R_C R5107 1 DY 2240R2F-1-GP HDMI_DATA2_R_C# C

1
HDMI_DATA1_R_C R5108 1 2240R2F-1-GP HDMI_DATA1_R_C#
HDMI_HPD_PWR HDMI_DATA0_R_C R5109 1 DY 2240R2F-1-GP HDMI_DATA0_R_C#
HDMI_CLK_R_C R5124 1 DY 2240R2F-1-GP HDMI_CLK_R_C#
DY

3
1 R5111 2HDMI_HPD_B 1 Q5102
20101009 modify to 240Ohm for EMI request
150KR2J-L1-GP PMBS3904-1-GP
84.03904.L06

2
2ND = 84.03904.P11
HDMI_DET
R5128
2 1 DP2_HPD 6
0R0402-PAD

1
R5110
100KR2J-1-GP R5112
10KR2J-3-GP

2
Qualify LZ57 HDMI DDC Passive Level Shifter

2
confrim by NXP FAE 1D5V_S3 5V_S0 1D5V_S3
Do not need PU Res,
2011.04.20 Reserve PU Res for debug furtur

5V_CRT_DDC

4
3
RN5113
DY SRN2K2J-1-GP

4
3
U5103
RN5101
SRN2K2J-1-GP 1

1
2
VCC_A
8
VCC_B
2 7 DDC_DATA_HDMI
6 PCH_HDMI_DATA_R

1
2
A1 B1 DDC_CLK_HDMI
6 PCH_HDMI_CLK_R 3 6
A2 B2
DP2_HPD 1 R5123 2 HPD_HDMI_CON_EN 5 4
3D3V_S0 DDC_DATA_HDMI EN GND
B DDC_CLK_HDMI 10KR2J-3-GP B
PCA9509DP-GP
71.09509.A0W

Q5104 DY
1 6 DDC_DATA_HDMI
6 PCH_HDMI_DATA_R
2 5

3 4

DMN66D0LDW-7-GP
DDC_CLK_HDMI
2nd = 84.27002.F3F
6 PCH_HDMI_CLK_R
84.DMN66.03F

3D3V_S0
1

R5102
20KR2J-L2-GP
DY
2

HDMI_OE# 1 R5103 2 HDMI_IN#_C


A 0R0402-PAD A
D

27 HDMI_IN# 1 R5117 2 HDMI_IN#_C


Q5101 0R2J-2-GP

DY
2N7002K-2-GP DY
84.2N702.J31 <Variant Name>
2ND = 84.2N702.031
Wistron Corporation
G

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
HPD_HDMI_CON
Title

HDMI Level Shifter/Connector


Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 51 of 102
5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title
eDP
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 52 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 53 of 102

5 4 3 2 1
(Blanking)

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 54 of 102
5 4 3 2 1

SSID = User.Interface

D D

ITP Connector
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.

C C

CPU ITP Connector


TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 55 of 102
5 4 3 2 1
5 4 3 2 1

SSID = SATA
SATA HDD Connector
HDD1
24
NP2
22
C5609 1 2 SCD01U16V2KX-3GP SATA_TXP3_C 21
19 SATA_TXP3
D C5610 1 2 SCD01U16V2KX-3GP SATA_TXN3_C 20 D
19 SATA_TXN3
19
19 SATA_RXN3 C5602 1 2 SCD01U16V2KX-3GP SATA_RXN3_C 18
C5603 1 2 SCD01U16V2KX-3GP SATA_RXP3_C 17
19 SATA_RXP3
16

R5609 15
3D3V_S0 1 2 0R3J-0-U-GP 3D3V_S0_HDD 14
DY 13
12
11
10
5V_S0 1 R5610 2 5V_S0_HDD 9
0R0805-PAD 8

1
C5605 C5606 7
6

1
C5604 C5601 5
DY DY

SCD1U10V2KX-5GP
SC10U10V5ZY-1GP

2
4
3

2
2

SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
1
NP1
23

SKT-SATA22P-33-GP-U1
62.10065.551
C C

ODD1
8

ODD Connector NP1


S1

S2 SATA_TXP1_C SCD01U16V2KX-3GP 2 1 C5612


SATA_TXP1 19
S3 SATA_TXN1_C SCD01U16V2KX-3GP 2 1 C5611
SATA_TXN1 19
S4
S5 SATA_RXN1_C SCD01U16V2KX-3GP 2 1 C5607
SATA_RXN1 19
S6 SATA_RXP1_C SCD01U16V2KX-3GP 2 1 C5608
SATA_RXP1 19
S7
3D3V_S0 P1 SATA_ODD_PRSNT# 18
RN5601 P2 ODD_PW R_5V
SATA_ODD_PW RGT 4 1 P3 R5605
SATA_ODD_DA# 3 2 P4 SATA_ODD_DA#_C 2 DY 1SATA_ODD_DA# SATA_ODD_DA# 17,27
P5 0R5J-5-GP
SRN10KJ-5-GP P6
NP2

2
9
R5604
SUPPORT ZERO SATA ODD SKT-SATA7P-6P-31-GP 10KR2J-3-GP
62.10065.D91 DY

1
2nd = 62.10065.D11
B B
3rd = 62.10065.D71

If support Zero Power ODD


Stuff R5604,R5612,Q5601 and R5613 TC5604 and U5601 SATA_RX- and SATA_RX+ Trace When the drive is powered on, the FET to the MD/DA pin drive is OFF.
Length match within 10 mil
DY R5603 When the drive is powered off, the FET to the MD/DA pin is ON
3D3V_S0 3D3V_S0
Following AMD routing table
1

R5606 R5612
10KR2J-3-GP 10KR2J-3-GP

R5608
2

SATA_ODD_DA#_C 1 SATA_ODD_DA#
2 0R2J-2-GP 5V_S0 U5601 100 mil
ODD_PW RGT# DY
2 6 ODD_PW R_5V
IN#2 OUT#6
3 7
G
D

IN#3 OUT#7
OUT#8 8
1

1
TC5604 TC5603
Q5602 Q5601 SC10U10V5ZY-1GP 4 SC10U10V5ZY-1GP
2N7002K-2-GP 2N7002K-2-GP EN/EN#
1
2

2
GND
84.2N702.J31 84.2N702.J31 5 FLT# GND 9
2nd = 84.2N702.031 2nd = 84.2N702.031 3D3V_S0
<Variant Name>
A TPS2001CDGNR-GP A
G

D
S

SC1U6D3V2KX-GP

74.02001.079
19 SATA_ODD_PW RGT
Wistron Corporation
1

R5607 R5611 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2 0R2J-2-GP
1 SATA_ODD_DA# 17,27 DY 10KR2J-3-GP Current limit Taipei Hsien 221, Taiwan, R.O.C.

SATA_ODD_PW RGT SATA_ODD_DA#_Q 2 DY 1


Active High Title
ODD_DA_Q 18
2

R5613 2 R5615 1 typ =>2.5A HDD/ODD


1

C5614 0R2J-2-GP FCH integrated PU 0R2J-2-GP


DY SCD1U10V2KX-5GP FCH integrated PUDY C5613 Size Document Number Rev
A3
LB475 -1
2

Date: Tuesday, August 02, 2011 Sheet 56 of 102

5 4 3 2 1
5 4 3 2 1

5V_USB0_S3
ESATA1

USB_PP6_C U3 U1
USB_PN6_C D+ VBUS
U2 D-
GND U4 DY DY

1
S1 C5705
C5704 1 SCD01U16V2KX-3GP SATA_TXP5 GND TC5701 C5706 C5707
19 SATA_TXP2 2 S2 A+ GND S4
C5703 1 SCD01U16V2KX-3GP
2 SATA_TXN5 S3 S7

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
SE220U6D3VM-21-GP
SCD1U10V2KX-4GP
19 SATA_TXN2

2
A- GND
GND 12
D
GND 13 D
19 SATA_RXP2 C5702 1 SCD01U16V2KX-3GP
2 SATA_RXP5 S6 14
C5701 1 SCD01U16V2KX-3GP SATA_RXN5 B+ GND
19 SATA_RXN2 2 S5 B- GND 15

SKT-USB15-GP
22.10321.X11

R5701
1 2
0R0402-PAD 5V_USB0_S3
18 USB_PP6 USB_PP6_C
D5701
1 4
1

TR5701
FILTER-130-GP DY
DY
USB_PP6_C 2 3 USB_PN6_C

PRTR5V0U2X-GP
2

C C
18 USB_PN6 USB_PN6_C
R5702
1 2
0R0402-PAD

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ESATA/USB Charger
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 57 of 102

5 4 3 2 1
5 4 3 2 1

INTERNAL STEREO SPEAKERS

D D

40 mil
29 AUD_SPK_L-_L 1 R5801 2 AUD_SPK_L-_L_R

40 mil 0R0805-PAD
29 AUD_SPK_L+_L 1 R5802 2 AUD_SPK_L+_L_R
AUD_SPK_L-_L 1 AFTP5806
0R0805-PAD AUD_SPK_L+_L 1 AFTP5805
Place these EMI components AUD_SPK_R-_L 1 AFTP5804
SPK1 AUD_SPK_R+_L 1 AFTP5803
close to speaker connector.

2
6
EC5801 EC5802
SC100P50V2JN-3GP SC100P50V2JN-3GP 4

1
Only needed if speaker 3
connector is physically far from 2
audio codec. When in doubt, it's 1
always a good idea to have
population option. 5

HR-CON4-GP
20.F1686.004
40 mil
29 AUD_SPK_R-_L 1 R5803 2 AUD_SPK_R-_L_R 2nd = 20.F1621.004
40 mil 0R0805-PAD
29 AUD_SPK_R+_L 1 R5804 2 AUD_SPK_R+_L_R
C C
0R0805-PAD

2
EC5803 EC5804
SC100P50V2JN-3GP SC100P50V2JN-3GP

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Jack
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 58 of 102

5 4 3 2 1
GIGA Lan Transformer
LAN Connector

3D3V_LAN_S5
RJ45
R5901 330R2J-3-GP 14 16
XF5901 31 LAN_ACT_LED# 1 2 LAN_ACT_R_LED# 12
1CT:1CT RJ45_8 YELLOW

31 MDI3- 2 23 11
RJ45_8 8
XRF_TDC 1 24 MCT2 RJ45_7 7
RJ45_6 6
3 22 RJ45_7 RJ45_5 5
31 MDI3+
SCD01U16V2KX-3GP RJ45_4 4
RJ45_3 3
1

C5903 1CT:1CT RJ45_5 RJ45_2


31 MDI2- 5 20 2

4 21 MCT1 R5903 330R2J-3-GP RJ45_1 1


2

31 SPEED_100# 1 2 SPEED_R_100# 10
6 19 RJ45_4
31 MDI2+ GREEN

C5903 value modify to 0.01uF ~ 9


0.4uF capacitor 1CT:1CT 13 15
8 17 RJ45_6
31 MDI1-
RJ45-8P-25-GP-U
7 18 MCT4 22.10019.071
9 16 RJ45_3
31 MDI1+

1CT:1CT RJ45_2
31 MDI0- 11 14

10 15 MCT3

12 13 RJ45_1
31 MDI0+
D5901
2 1 MCT1
XFORM-24P-19-GP
68.IH601.301 SD05C-1-GP
2ND = 68.89246.301
D5902
2 1 MCT2

SD05C-1-GP
D5903
2 1 MCT3

SD05C-1-GP
D5904
2 1 MCT4

U3
U4 SD05C-1-GP

1
MDI1+ 6
MDI3- 6 R5904 R5905 R5906 R5907
MDI1- 4
83.02304.0AE 83.02304.0AE 75R3J-L-GP 75R3J-L-GP 75R3J-L-GP 75R3J-L-GP
MDI3+ 4
MDI0- 3
2nd = 83.04220.0AE 2nd = 83.04220.0AE

2
TVLST2304AD0-GP MDI2- 3
MDI0+ 1 TVLST2304AD0-GP
MDI2+ 1
MCT_R
2

2
C5904
SC1KP3KV8KX-GP-U

1
R5908
5V_USB0_S3 2 1 R5909
1

0R2J-2-GP C13 5V_USB0_S3 2 1


1

0R2J-2-GP C14
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
2

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 59 of 102
5 4 3 2 1

SPI FLASH ROM (2M byte) for KBC


3D3V_AUX_KBC
3D3V_AUX_KBC

4
3

1
DY R6002 RN6002 C6001 C6002
100KR2J-1-GP SRN4K7J-8-GP DY SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP
D D

2
1
2
SPI_HOLD_0#

U6001

27 SPICS# 1 CS# VCC 8


27 SPIDI 1 R6003 2 33R2J-2-GP SPI_SO 2 SO/SIO1 HOLD# 7
27 SPIW P# 1 R6004 2 0R2J-2-GP SPI_W P# 3 WP# SCLK 6 SPICLK 27
4 GND SI/SIO0 5 SPIDO 27

1
1

1
R6001 MX25L1606EM2I-12G-GP EC6003 R2733 EC6001
10KR2J-3-GP DY 33R2J-2-GP SC33P50V2JN-3GP

SC4D7P50V2CN-1GP
72.25160.B01 DY DY

2
2ND = 72.25Q16.001

2
SPICLK_1_R
1
EC6002
SC22P50V2JN-4GP
DY

2
C C

3D3V_AUX_S5
RTC_AUX_S5 D6003
SSID = RBATT 2
+RTC_VCC
RTC1

3 4
R6006
1 RTC_PW R 1 510R2J-1-GP
2 1
2

C6005 CH715FPT-GP 2
SC1U6D3V2KX-GP 83.R0304.B81 3
1

DY 2nd = 83.00040.E81
Width = 20 mils 5

for RTC Leakage


ACES-CON3-1-GP-U1
20.F0735.003
B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash/RTC
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 60 of 102

5 4 3 2 1
5 4 3 2 1

D D
5V_RUSB3_S0
5V_S5
U6103
at least 80 mil
at least 80 mil 1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6

1
SC4D7U10V5ZY-3GP
4 5 USB_OC#1_8 18 C6108
27,62,82 USB_PWR_EN# EN/EN# OC#
1

C6107
DY
SCD1U10V2KX-5GP

2
G547F2P81U-GP
2

74.00547.A79
2nd = 74.02101.079

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Power SW
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 61 of 102
5 4 3 2 1
5 4 3 2 1

Left Side USB Power Switch 5V_LUSB1_S0

5V_S5 U6202

100 mil 1 GND FLG1 8 USB_OC#3_0 18 100 mil


2 IN OUT1 7
3 EN1# OUT2 6
4 EN2# FLG2 5 USB_OC#0_6 18

1
D C6205 C6202 C6206 D
SC1U10V3ZY-6GP 5V_USB0_S3 TC6202

SC10U10V5ZY-1GP
AP2182SG-13-GP

SCD1U16V2KX-3GP

SE220U6D3VM-21-GP
2

2
74.02182.071 at least 80 mil
LOW ACTIVE TYPE!!

1
C6204

1
R6215
DY

SC1U10V3ZY-6GP
2
27,61,82 USB_PW R_EN#
DY

100KR2J-1-GP
27,61,82 USB_PW R_EN#

2
R6207
1 2
0R0402-PAD
18 USB_PP10 USB1_DP
1

TR6207
FILTER-130-GP
C
DY USB3.0 C
2

5V_LUSB1_S0
18 USB_PN10 USB1_DN
R6208
1 2
0R0402-PAD USB1

1 VBUS STDA_SSRX- 5 USB_RX0N 18


STDA_SSRX+ 6 USB_RX0P 18
USB1_DN 2 8 USB_TX0N_C
USB1_DP D- STDA_SSTX- USB_TX0P_C
3 D+ STDA_SSTX+ 9

10 C9404 SCD1U16V2KX-3GP
10
11 11 1 2 USB_TX0N 18
12 12 GND 4 1 2 USB_TX0P 18
5V_LUSB1_S0 13 7
D5708 13 GND_DRAIN C9405 SCD1U16V2KX-3GP
1 4
SKT-USB13-29-GP
22.10339.931
DY
B B
USB1_DP 2 3 USB1_DN

PRTR5V0U2X-GP

USB 3.0 Connector


Pin definition
1 POWER
2 USB 2.0 D-
3 USB 2.0 D+
4 GND
5 StdA_SSRX- SuperSpeed RX
6 StdA_SSRX+
7 GND
8 StdA_SSTX- SuperSpeed TX
9 StdA_SSTX+
<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 2.0/3.0
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 62 of 102

5 4 3 2 1
5 4 3 2 1

D D

AFTP6301 1
Bluetooth Module
AFTP6302 1 1.5A / High Active Voltage 2V
AFTP6303 3D3V_BT_S0 3D3V_S0
1
U6301 C6302
R6301
SC4D7U6D3V3KX-GP
AFTP6304 1 1 2 3D3V_BT 1 5 1 2
0R0402-PAD VOUT VIN
2 GND
C 3 4 C
NC#3 EN BLUETOOTH_EN 27
AFTP6305 1

EC6302 UP7534EMA5-15-GP

1
AFTP6306 1

SCD1U16V2KX-3GP
DY 74.07534.A7F

2
AFTP6307 1

AFTP6308 1 EC6302 put near


BLUE1 / all USB BT1
AFTP6309 1 put one choke 7
near connector 1 3D3V_BT_S0
AFTP6310 1 by EMI request
2
3 USB_PN3 18
4 USB_PP3 18
B 5 BT_LED B
6

ACES-CON6-42-GP

TP6302 1 BLUETOOTH_EN 20.F1705.006


TPAD14-GP
AFTP6311 1 3D3V_BT_S0

AFTP6312 1 USB_PN3 18
<Variant Name>
AFTP6313 1 USB_PP3 18

AFTP6314 1 BT_LED Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

BLUE TOOTH
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 63 of 102

5 4 3 2 1
5 4 3 2 1

5V_S0 3V_FP_S0

U6401
D 1 5 D
VIN VOUT
2 GND
3 EN NC#4 4

G9091-330TA1U-GP

1
74.09091.B3F

1
C6402

2
2
C6403 SC1U10V2KX-1GP SC1U6D3V2KX-GP

C C

Finger Printer Connector


3D3V_S0

R6406 3V_FP_S0
1 2
DY
0R2J-2-GP
1

C6401 FP1
SCD1U10V2KX-4GP 7
2

1
B B
2
3
18 USB_PP9 1 R6401 2 0R0603-PAD Biometric_USBPP 4
18 USB_PN9 1 R6402 2 0R0603-PAD Biometric_USBPN 5
6
8

PTWO-CON6-12-GP

20.K0382.006
AFTP40
1
2nd = 20.K0320.006
AFTP42 1 3V_FP_S0
<Variant Name>
AFTP43 1 Biometric_USBPN
AFTP44 1 Biometric_USBPP

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Print
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 64 of 102
5 4 3 2 1
5 4 3 2 1

SSID = Wireless

D D

Mini Card Connector(802.11a/b/g/n)


1D5V_S0 3D3V_S0

2
R6513 R6512
0R0402-PAD 0R0402-PAD

1
W LAN1
53
R6511 NP1
18,31,66 PCIE_W AKE# 1 2 PCIE_W AKE#_R 1 2 +3V_MINI_W LAN
DY 0R2J-2-GP R6504~R6509 close to Debug connector
3 4
5 6
7 8 LPC_AD0_C 1 2R6505
18 CLK_PCIE_W LAN_REQ#
9 10 LPC_AD1_C 0R2J-2-GP
1
DY 2R6504
LPC_AD0 17,27,71
C 11 12 LPC_AD2_C 0R2J-2-GP
1
DY 2R6507
LPC_AD1 17,27,71 C
17 CLK_PCIE_W LAN#
13 14 LPC_AD3_C 0R2J-2-GP
1
DY 2R6506
LPC_AD2 17,27,71
17 CLK_PCIE_W LAN
15 16 LPC_FRAME#_C 0R2J-2-GP
1
DY 2R6509
LPC_AD3 17,27,71
0R2J-2-GP DY LPC_FRAME# 17,27,71

27 E51_RXD R6501 1 2 0R0402-PAD E51_RXD_R 17 18


27 E51_TXD R6502 1 2 0R0402-PAD E51_TXD_R 19 20 W LAN_EN 27
21 22 PLT_RST#_W LAN 1 R6510 2
0R0402-PAD PLT_RST# 9,17,31,66,71,83,97
4 PCIE_RXN2 23 24
4 PCIE_RXP2 25 26
27 28
29 30 PCH_SMBCLK
PCH_SMBCLK 14,15,66
4 PCIE_TXN2 31 32 PCH_SMBDATA
PCH_SMBDATA 14,15,66
4 PCIE_TXP2 33 34
35 36 USB_PN1 18
20100705_Standard 37 38 USB_PP1 18
+3V_MINI_W LAN 39 40
41 42
43 44 W LAN_LED# 1 TP6501 TPAD14-GP
45 46 CLK_PCI_LPC_C 2 1
47 48 +1D5V_MINI_W LAN R6508 CLK_PCI_LPC 17,21,71
49 50 0R2J-2-GP
5V_S5 1 R6503 2 +5V_MINI_DEBUG 51 52
0R0603-PAD
54
NP2 DY
PTW O-CONN52A-11-GP
62.10024.F71
+3V_MINI_W LAN 2nd = 62.10043.841
B B
1

C6502 C6503 C6504


SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2

+1D5V_MINI_W LAN
5V_S5
1

C6501 C6505 C6506 C6507


SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINICARD(WLAN)/ITP CONN
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 65 of 102

5 4 3 2 1
5 4 3 2 1

SSID = Wireless
Mini Card Connector(WWAN)
Place near MINI Card CONN

+3V_MINI_W W AN

D D

SC33P50V2JN-3GP

SC33P50V2JN-3GP
1

1
C6603

C6604
DY DY DY DY DY
TC6601 C6601 C6602
SC22U6D3V5MX-2GP
2

2
SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP
1D5V_S0 3D3V_S0

2
R6607 R6606
W W AN1 0R0402-PAD 0R0402-PAD
53
NP1

1
Place near Pin 24 18,31,65 PCIE_W AKE# 1 R6604 2 PCIE_W AKE#_W W AN 1 2 +3V_MINI_W W AN
+1D5V_MINI_W W AN 0R2J-2-GP
+3V_MINI_W W AN DY 3 4
5 6
SC33P50V2JN-3GP

7 8
1

1
C6607

DY DY DY 9 10
C6606 C6608 11 12
SCD1U16V2KX-3GP

13 14
2

2
SCD047U16V2KX-1-GP

15 16

17 18
19 20 W W AN_EN 27
C6611 21 22 PLT_RST#_W AN 1 R6605 2
+1D5V_MINI_W W AN PLT_RST# 9,17,31,65,71,83,97
C
19 SATA_RXP0 1 DY 2SCD01U16V2KX-3GP SATA_RXP0_C 23 24 3D3V_S0 DY 0R2J-2-GP C

19 SATA_RXN0 1 2SCD01U16V2KX-3GP SATA_RXN0_C 25 26


C6612 DY 27 28
SC33P50V2JN-3GP

C6613 29 30 PCH_SMBCLK
PCH_SMBCLK 14,15,65
1

C6610

DY DY 19 SATA_TXN0 1 DY 2SCD01U16V2KX-3GP SATA_TXN0_C 31 32 PCH_SMBDATA


PCH_SMBDATA 14,15,65
C6609 19 SATA_TXP0 1 2SCD01U16V2KX-3GP SATA_TXP0_C 33 34 DY
C6614 DY 35 36 USB_P4- 1 R6603 2 0R3J-0-U-GP USB_PN4 18
2

2
SCD047U16V2KX-1-GP

37 38 USB_P4+ 1 R6601 2 0R3J-0-U-GP USB_PP4 18


+3V_MINI_W W AN 39 40 DY
41 42 3G_LED# 1 TP6602 TPAD14-GP
43 44
45 46
47 48 +1D5V_MINI_W W AN
49 50
51 52
NP2
54

DY PTW O-CONN52A-11-GP
62.10024.F71
2nd = 62.10043.841

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 66 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

SIM Card
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 67 of 102

5 4 3 2 1
5 4 3 2 1

D D

Power button LED(White)


C C

1
G2702
GAP-OPEN

2
PW RBT1
7
1

27,97 KBC_PW RBTN# 1 R6808 2 KBC_PW RBTN#_R 2


27 KBC_NOVO_BTN# 1 R6811 100R2J-2-GP
2 KBC_NOVO_BTN#_R 3
2 R6828 1 100R2J-2-GP PW RLED_C 4
27,78 PW RLED 0R0402-PAD 5
3D3V__PW RBTN1 6
8

1
EC6804 PTW O-CON6-12-GP

1
EC6801 EC6802 EC6803 DY 20.K0382.006

SC1KP50V2KX-1GP
DY DY DY AFTP6808

2
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
2nd = 20.K0320.006

2
SC1KP50V2KX-1GP
B B

DY
3D3V_S0 2 1

R6815
0R2J-2-GP
3D3V_S5 2 1 1 2 5V_S5
R6830 R6831
0R2J-2-GP 0R2J-2-GP
DY

KBC_NOVO_BTN#_R 1 AFTP6806

PW RLED_C 1 AFTP6807

<Variant Name>
A KBC_PW RBTN#_R 1 AFTP6809 A

1 AFTP16 Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard/Power Button


Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 68 of 102

5 4 3 2 1
5 4 3 2 1

SSID = KBC SSID = Touch.Pad

5V_S0 5V_S0

Internal KeyBoard Connector

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
D C6901 C6902 D

1
2
DY

1
RN6901

2
R6905
SRN10KJ-5-GP 0R0402-PAD

4
3

2
TPAD1
7
TPAD_5V 1
SRN33J-5-GP-U
27 TPCLK TPCLK 2 3 TP_CLK 2
27 TPDATA TPDATA 1 4 TP_DATA 3
KB1 TP_LR_2 4
SB 1015 Swap data and clk RN6902 TP_LR_3
25 5
TP_LR_1 6

1
1 KCOL15 1 8

2
AFTP65 AFTP72 1 TP_DATA
2 KCOL10 1 R4921
PTW O-CON6-12-GP

1
3 KCOL11 1 AFTP70 AFTP73 1 TP_CLK L6903 R6904

0R0402-PAD

2
4 KCOL14 1 AFTP69 0R0402-PAD 20.K0382.006

2
KCOL13 AFTP68 AFTP74 TP_R

MLVS0402M04-GP
5 1 1

1
6 KCOL12 1 AFTP66 R4924
7 KCOL3 1 AFTP63 AFTP75 1 TP_L

0R0402-PAD
TP_L
8 KCOL6 1 AFTP59

1
9 KCOL8 1 AFTP57
10 KCOL7 1 AFTP58 TP_DATA
11 KCOL4 1 AFTP56 KROW [0..7] 27
12 KCOL2 1 AFTP55 TP_CLK
KROW 0 AFTP61

TP_R
C 13 1 C
14 KCOL1 1 AFTP53 KCOL[0..17] 27
15 KCOL5 1 AFTP60

1
16 KROW 3 1 AFTP54
17 KROW 2 1 AFTP52 L6901 L6902
TPAD2

1
18 KCOL0 1 AFTP49 MLVS0402M04-GP MLVS0402M04-GP
19 KROW 5 1 AFTP62 7
KROW 4 AFTP50 L6905

MLVS0402M04-GP
20 1
21 KCOL9 1 AFTP48 1

2
22 KROW 6 1 AFTP67
23 KROW 7 1 AFTP47 TP_R 2

2
24 KROW 1 1 AFTP46 TP_L 3
AFTP51 4
DY
26 5
6
ACES-CON24-7-GP
20.K0320.024 8
2nd = 20.K0391.024
TPAD_5V 1 AFTP6901
ACES-CON6-13-GP
TP_SW _L 1 AFTP6902
20.K0320.006
1 AFTP71 TP_SW _R 1 AFTP6903

B B

TP_SW _L TP_SW _R

TPS1 TPS2

6
SW -TACT4-14-GP SW -TACT4-14-GP
3 4 2 1 TP_L 3 4 2 1 TP_R

R6902 R6901
100R2J-2-GP 100R2J-2-GP
1 2 1 2

5
For LB57

62.40009.D71 62.40009.D71
<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad


Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 69 of 102

5 4 3 2 1
5 4 3 2 1

D D

3D3V_AUX_S5

1
R7004
0R0402-PAD

2
C C
3D3V_LID

1
C7002 1 AFTP7001
SCD1U10V2KX-5GP

2
HALL1

2 VDD
R7002 1
COVER_SW# LID_CLOSE#_1 VSS
27 COVER_SW# 1 100R2J-2-GP
2 3 OUT
1

C7001

LID_CLOSE#_1
DY SCD047U16V2KX-1-GP
S-5711ACDL-M3T1S-GP
2

B 74.05711.07B B

1
AFTP7002

<Variant Name>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 70 of 102
5 4 3 2 1
5 4 3 2 1

D D

3D3V_S0
DB1
1
17,27,65 LPC_AD0 2
17,27,65 LPC_AD1 3
17,27,65 LPC_AD2 4
17,27,65 LPC_AD3 5
17,27,65 LPC_FRAME# 6
9,17,31,65,66,83,97 PLT_RST# 7
8
17,21,65 CLK_PCI_LPC 9
10
11
12

MLX-CON10-7-GP
20.D0183.110
C DY C

HDT+ Connectors
1D5V_S3
HDT1

1 CPU_VDDIO CPU_TCK 2 APU_TCK 6


3 GND CPU_TMS 4 APU_TMS 6
5 GND CPU_TDI 6 APU_TDI 6
APU_TRST#_R
7 GND DY CPU_TDO 8 APU_TDO 6
6 APU_TRST# 1 R7101 2 9 CPU_TRST# CPU_PWROK_BUF 10 H_CPUPWRGD_E 6,17,36
0R2J-2-GP DBRDY3 11 12
CPU_DBRDY3 CPU_RST#_BUF APU_RST_L_BUF 6
B DY DBRDY2 13 14 B
CPU_DBRDY2 CPU_DBRDY0 APU_DBRDY 6
DBRDY1 15 16 DY
CPU_DBRDY1 CPU_DBREQ# APU_DBREQ# 6
17 18 APU_TEST19_PLLTEST0_R 1 R7105 2 0R2J-2-GP
GND CPU_PLLTEST0 APU_TEST19_PLLTEST0 6
19 20 APU_TEST18_PLLTEST1_R 1 R7106 2 0R2J-2-GP
CPU_VDDIO CPU_PLLTEST1 APU_TEST18_PLLTEST1 6
DY
SMC-CONN20A-1-GP
RN7101 20.F1722.020
8 1 DBRDY1 CRB:placed 0-ohm
7 2 DBRDY2 Checklist: If both SCAN and HDT+ header are implement
6 3 DBRDY3 placed 15-ohm
5 4

SRN10KJ-6-GP
DY
<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Dubug connector
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 71 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 72 of 102
5 4 3 2 1
5 4 3 2 1

D D

(Blanking)
C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 73 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader CONN


Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 74 of 102
5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Express Card
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 75 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 76 of 102
5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Reserved
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 77 of 102

5 4 3 2 1
5 4 3 2 1

LED 1209 All LED POWER CHANGE 5V_S5

LED Bord CONN. Q6801 LED1


R6801 3D3V_S5 1
R6827

DY 2
0R2J-2-GP
3D3V_S5_LED

C PWR_LED#_C K A PWR_LED#_R 1 2 3D3V_S5_LED


B R1 150R2J-L1-GP-U 1 R6822 2
27,68 PWRLED 5V_S5
E LED-W-56-GP WHITE 0R2J-2-GP
R2 POWER LED
DRC5143Z0L-GP
84.05143.011 83.00191.J70
Q6805
D C NUM_LED_R_1 D
B R1 Q6802
27 NUM_LED R6802
E 3D3V_S0 5V_S0 C DC_BATFULL#_C LED2
R2 R1 R6826
MAX Current: 80 mA B K A DC_BATFULL#_C_1 1 2 3D3V_S5_LED

1
DDTC143ZUA-7-F-GP E 150R2J-L1-GP-U 3D3V_S0 1 DY20R2J-2-GP 3D3V_S0_LED
R4929 R4928 27 DC_BATFULL R2 LED-W-56-GP
DY 0R2J-2-GP DRC5143Z0L-GP WHITE BATTERY LED
84.00143.D1K 0R2J-2-GP 84.05143.011 5V_S0 1 R6825 2
LEDB1
83.00191.J70 0R2J-2-GP

2
10

LED_BD_PWR 8 ORG RQ6803


7 Q6803 LED6
NUM_LED_R_1 R4930 1 2 953R2F-GP NUM_LED_R 6 C CHARGE_LED#_C K A CHARGE_LED#_C_1 1 2 3D3V_S5_LED
CAP_LED_R_1 R4931 1 2 953R2F-GP CAP_LED_R 5 B R1 150R2J-L1-GP-U
Q6806
27 APS_LED
R4932 1 DY 2 0R2J-2-GP APS_LED_R 4
27 CHARGE_LED
E LED-O-16-GP-U BATTERY LOW LED
C CAP_LED_R_1 SATA_LED#_R_1 R4933 1 2 953R2F-GP SATA_LED#_R 3 R2
B R1 2 DRC5143Z0L-GP 83.00190.Z70
27 CAP_LED
R2
E 84.05143.011
1
DDTC143ZUA-7-F-GP AFTP8221 1

SCD1U10V2KX-4GP
R6804

1
EC6812 EC6810 EC6811 EC6809 EC6816 9 Q6804 LED3
R6807
84.00143.D1K DY DY DY DY C WIRELESS_LED#_C K A WIRELESS_LED#_R_C 1 2 3D3V_S0_LED

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
1 2 W_LED_C B R1 150R2J-L1-GP-U
27 WLAN_Test_LED

2
ACES-CON8-19-GP E LED-W-56-GP
20.K0320.008 0R0402-PAD
R2 WHITE WLAN_LED
DRC5143Z0L-GP
84.05143.011
83.00191.J70

Q6807
R2
E SATA_LED#_R_1
B
19 SATA_LED# R1
C

DDTA143ECA-7-F-GP VGA LED


84.00143.K11 3D3V_S0 AFTP6801
Q6809
dGPU_LED#_Q
LED5
1 C K A dGPU_LED#_R 1 R6824 2 5V_S0
C NUM_LED_R 1 AFTP6802 B R1 C
CAP_LED_R AFTP6803 18 dGPU_LED 910R2F-GP
1 E LED-Y-71-GP
APS_LED_R 1 AFTP6804 R2 WHITE
SATA_LED#_R 1 AFTP6805 DRC5143Z0L-GP 83.00270.E70 DY
LED_BD_PWR 1 AFTP8219 84.05143.011
DY DY

Touch Pad LED


DY
A K
TP_LED#_Q
LED12 LED-W-56-GP
27 TP_LED# R7815
2 1
83.00191.J70 5V_S0

G
DY
820R2F-GP
S D
DY
Q3607
2N7002A-7-GP

2ND = 84.2N702.I31
B475 => Digital Mic circuit.

B B

3D3V_S0

MIC1
6
L8607
BLM15AG121SN-1GP 4
29 AUD_DMIC_CLK 1 2 AUD_DMIC_CLK_L 3
29 AUD_DMIC_1_2 1 2 AUD_DMIC_1_2_C 2
0R2J-2-GP
1

R4919 1
L5801 L5802 SCD1U10V2KX-4GP
AZ5125-01J-GP AZ5125-01J-GP 5
1

C5803 HR-CON4-GP
20.F1686.004
2

AUD_DMIC_CLK_L 1 AFTP5801
AUD_DMIC_1_2_C 1 AFTP5802
2nd = 20.F1621.004

1 0R0402-PAD
2
R7803

1 0R0402-PAD
2
R7802

1 0R0402-PAD
2
R7801
A A

1 0R0402-PAD
2
R4926

<Variant Name>
ALC_AGND

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AVBD/LED/MIC
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 78 of 102

5 4 3 2 1
5 4 3 2 1

G-Sensor
3D3V_S5

VCC3M_Q34 R7901 1 2 10R3F-GP VCC3_ACC


DY

SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
C
E
D Q7901 D

1
DY PDTA114EE-3-GP-U DY DY
C7901 C7902

R2

R1

2
B
GSENSE_ON#
27 GSENSE_ON# ALC_AGND

1
TPAD14-GP
R7902 GSENSE_Z_R R7905 1 2 56KR2J-L1-GP GSENSE_Z 1 TP7901
DY 100KR2J-1-GP DY

1
2
DY C7903 DY C7906
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

14

15

2
U7901

VDD

RES
GSENSE_TST 2 ALC_AGND
27 GSENSE_TST ST
3 GND VOUTZ 8
GSENSE_Y_R R7906 1 2 56KR2J-L1-GP GSENSE_Y GSENSE_Y 27
5 GND VOUTY 10 DY
1

1
6 GND
R7903 7 12 DY C7904 DY C7907
100KR2J-1-GP R7904 GND VOUTX SCD1U10V2KX-4GP SCD1U10V2KX-4GP
DY

2
0R0402-PAD-1-GP 1 NC#1
11
2

NC#11 ALC_AGND
4 NC#4
C 13 C
ALC_AGND NC#13 GSENSE_X_R R7907 1 2 56KR2J-L1-GP GSENSE_X GSENSE_X 27
9 NC#9 NC#16 16 DY

1
DY C7905 DY C7908
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
LIS34ALTR-GP DY
ALC_AGND

STMicro LIS34AL: 74.00034.0BZ


ADXL335 : 74.00335.0BZ
ADXL322

LIS244AL No Accel Layout Comment :


(1) Place C483, C484, Q46, R528, R530,
LIS34AL
C479, C476, R509, R508 close to U55.
R530 NO_ASM ASM (2) Avoid routing under DCDC switching area.

B
R509 ASM ASM B

All other ASM NO_ASM

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

G-sensor
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 79 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title

Reserved
Size Document Number Rev
A
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 80 of 102

5 4 3 2 1
5 4 3 2 1

D D

C (Blanking) C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/EMI Capacitors


Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 81 of 102
5 4 3 2 1
5 4 3 2 1

5V_RUSB3_S0
R8201 USB3
1 2
0R0402-PAD
18 USB_PP0 USB0_DP

4
TR8207
FILTER-130-GP

1
TC8201
D
DY EC8203
D

ST220U6D3VDM-15GP

SCD1U16V2KX-3GP
2

3
18 USB_PN0 USB0_DN
R8202 USB3
1 2 7
0R0402-PAD
1

2
USB0_DN 3
USB0_DP 4
5
5V_RUSB3_S0 6
D8209
1 4 8

ACES-CON6-1-GP-U1
DY
20.F0772.006
USB0_DP USB0_DN
2nd = 20.F1804.006
2 3

PRTR5V0U2X-GP
C C

Card Reader Board CONN.


IO1
AFTP8201 1 5V_RUSB3_S0 32
AFTP8202 1 USB0_DN 30
AFTP8203 1 USB0_DP 29 AUD_PORTA_R 29
28 AUD_PORTA_L 29
27 AUD_PORTC_R_C 29
26 AUD_PORTC_L_C 29
AFTP8204 1 AUD_PORTA_R 25 1 AFTP8208
AFTP8205 1 AUD_PORTA_L 24
AFTP8206 1 AUD_PORTC_R_C 23
AFTP8207 1 AUD_PORTC_L_C 22 AUD_SENSE_PORT_C 29
21 AUD_SENSE_PORT_A 29
20
19 W IRELESS_SW # 27
AFTP8209 1 AUD_SENSE_PORT_C 18
AFTP8210 1 AUD_SENSE_PORT_A 17 USB_PP2 18 ALC_AGND
16 USB_PN2 18
15
AFTP8211 1 W IRELESS_SW # 14 USB_PP5 18
B B
13 USB_PN5 18
12
AFTP8212 1 USB_PP2 11
AFTP8213 USB_PN2 USB_PW R_EN# 27,61,62
1 10 USB_OC#2_9 18
9 3D3V_S0 5V_S5
AFTP8214 1 USB_PP5 8
AFTP8215 1 USB_PN5 7
6
AFTP8216 1 USB_PW R_EN# 5
AFTP8217 1 USB_OC#2_9 4
3
2

1
31
AFTP8220 1 5V_S5

1
ACES-CON30-9-GP-U
20.K0510.030
EC8205

2
SCD1U16V2KX-3GP

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
G95 Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE
1 2 Title

IO Board Connector
ALC_AGND Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 82 of 102

5 4 3 2 1
5 4 3 2 1

CONFIGURATION STRAPS RECOMMENDED SETTINGS


0= DO NOT INSTALL RESISTOR
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1 = INSTALL 3K RESISTOR
PEG_RXP[8..15] 4 X = DESIGN DEPENDANT
VGA1A 1 OF 8 THEY MUST NOT CONFLICT DURING RESET NA = NOT APPLICABLE
4 PEG_TXP[8..15] PEG_RXN[8..15] 4
PLATFORM
4 PEG_TXN[8..15] STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS RECOMMEND SETTING
Transmitter Power Savings Enable
PEG_TXP8
TX_PWRS_ENB GPIO0 0: 50% Tx output swing 1: Full Tx output swing X 1
AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_C_RXP8 C8318 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP8
D PEG_TXN8 Y37 Y32 PEG_C_RXN8 C8317 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXN8 PCIE TRANSMITTER DE-EMPHASIS ENABLED D
PCIE_RX0N PCIE_TX0N
TX_DEEMPH_EN GPIO1 0:Tx de-emphasis disabled 1:Tx de-emphasis enabled X 1
PEG_TXP9 Y35 W33 PEG_C_RXP9 C8320 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP9 0:Advertises the PCIe device as 2.5GT/s capable at power on.
PEG_TXN9 PCIE_RX1P PCIE_TX1P
W36 PCIE_RX1N PCIE_TX1N W32 PEG_C_RXN9 C8319 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXN9 BIF_GEN2_EN_A GPIO2 1:Advertises the PCIe device as 5.0GT/s capable at power on. 0 0

PEG_TXP10
optional input allow the system to request a fast
W38 PCIE_RX2P PCIE_TX2P U33 PEG_C_RXP10 C8321 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP10 GPIO5_AC_BATT GPIO5 ? 0
PEG_TXN10 V37 U32 PEG_C_RXN10 C8322 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXN10 power reduction by setting GPIO5 to low.
PCIE_RX2N PCIE_TX2N

PEG_TXP11
RESERVED GPIO8 RESERVED 0 0
V35 PCIE_RX3P PCIE_TX3P U30 PEG_C_RXP11 C8323 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP11
PEG_TXN11 U36 U29 PEG_C_RXN11 C8324 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXN11 0:VGA Controller capacity enabled
PCIE_RX3N PCIE_TX3N
VGA_DIS GPIO9 1:The device won't be recognized as the system's VGA controller 0 0
PEG_TXP12 U38 T33 PEG_C_RXP12 C8325 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP12 BIOS_ROM_EN=1, Config[2:0] defines the ROM type 0 0 1
PEG_TXN12 PCIE_RX4P PCIE_TX4P PEG_C_RXN12 C8326 SCD1U10V2KX-5GP PEG_RXN12 X X X
T37 T32 1MUXLESS
2 ROMIDCFG[2:0] GPIO[13:11] BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size
PCIE_RX4N PCIE_TX4N (256MB)
PEG_TXP13 T35 T30 PEG_C_RXP13 C8328 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP13 RESERVED GPIO21 RESERVED 0 0
PEG_TXN13 PCIE_RX5P PCIE_TX5P PEG_C_RXN13 C8327 SCD1U10V2KX-5GP PEG_RXN13
R36 PCIE_RX5N PCIE_TX5N T29 1MUXLESS
2

PEG_TXP14 R38 PCIE_RX6P


PCI EXPRESS INTERFACE PCIE_TX6P P33 PEG_C_RXP14 C8330 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP14
BIOS_ROM_EN GPIO_22_ROMCSB
0:Disable external BIOS ROM device
1:Enable external BIOS ROM device X 0
PEG_TXN14 P37 P32 PEG_C_RXN14 C8329 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXN14 VIP Device Strap Enable indicates to the software driver that it sense
PCIE_RX6N PCIE_TX6N VIP_DEVICE_STRAP_EN X
V2SYNC whether or not a VIP device is connected on the VIP Host interface. 0
PEG_TXP15 P35 P30 PEG_C_RXP15 C8332 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXP15
PEG_TXN15 PCIE_RX7P PCIE_TX7P
N36 PCIE_RX7N PCIE_TX7N P29 PEG_C_RXN15 C8331 1MUXLESS
2 SCD1U10V2KX-5GP PEG_RXN15 RSVD H2SYNC RESERVED 0 0

C N38 PCIE_RX8P PCIE_TX8P N33 RSVD GENERICC RESERVED 0 0 C


M37 PCIE_RX8N PCIE_TX8N N32

AUD[1] HSYNC X 1
M35 PCIE_RX9P PCIE_TX9P N30 AUD[1:0]:11-Audio for both DisplayPort and HDMI
L36 PCIE_RX9N PCIE_TX9N N29
AUD[0] VSYNC X 1
L38 PCIE_RX10P PCIE_TX10P L33
K37 PCIE_RX10N PCIE_TX10N L32

K35 PCIE_RX11P PCIE_TX11P L30


J36 PCIE_RX11N PCIE_TX11N L29
PIN STRAPS 3D3V_VGA_S0 3D3V_VGA_S0

J38 PCIE_RX12P PCIE_TX12P K33


H37 K32 R8301 1 MUXLESS
2 3KR2J-2-GP
PCIE_RX12N PCIE_TX12N 85 TX_PW RS_ENB
R8322 1 DY 2 10KR2J-3-GP
85 JTAG_TRST#_VGA
R8302 1 MUXLESS
2 3KR2J-2-GP
85 TX_DEEMPH_EN
H35 PCIE_RX13P PCIE_TX13P J33
G36 J32 R8303 1 MUXLESS
2 10KR2J-3-GP R8325 1 DY 2 10KR2J-3-GP
PCIE_RX13N PCIE_TX13N 85 BIF_GEN2_EN_A
R8304 1 DY 2 10KR2J-3-GP
85 GPIO8_ROMSO
G38 PCIE_RX14P PCIE_TX14P K30
R8305 10KR2J-3-GP 3D3V_VGA_S0
F37 PCIE_RX14N PCIE_TX14N K29 85 VGA_DIS 1 DY 2

F35 H33 R8306 1 MUXLESS


2 10KR2J-3-GP R8331 2 DY 1 10KR2J-3-GP
PCIE_RX15P PCIE_TX15P 85 CONFIG0
E37 PCIE_RX15N PCIE_TX15N H32
R8307 1 DY 2 10KR2J-3-GP
85 CONFIG1 84 TESTEN
B B
R8308 1 DY 2 10KR2J-3-GP R8332 1 2 5K1R2F-2-GP
MUXLESS
CLOCK 85 CONFIG2
R8309 DY 10KR2J-3-GP
100MHz 17 CLK_PCIE_VGA AB35
AA36
PCIE_REFCLKP MUXLESS 85 VGA_CRT_VSYNC 1 2
17 CLK_PCIE_VGA# PCIE_REFCLKN R8310 1 DY 2 10KR2J-3-GP
85 VGA_CRT_HSYNC R8323
85 JTAG_TCK_VGA 1 DY 2 10KR2J-3-GP
CALIBRATION MUXLESS
AJ21 NC#AJ21 PCIE_CALRP Y30 PCIE_CALRP 1 R8316 2 PE_GPIO0
MUXLESS AK21 1K27R2F-L-GP
NC#AK21
1 R8317 2 PW RGOOD AH16 PWRGOOD PCIE_CALRN Y29 PCIE_CALRN 1 2 1V_VGA_S0 dGPU mode H
10KR2F-2-GP R8318
2KR2F-3-GP IGPU L
ATI_RST# 2 R8320 1 VGA_RST# AA30 MUXLESS
0R0402-PAD PERST#
IGPU with BACO H JTAG SIGNAL OPTION
R8314 1 DY 2 10KR2J-3-GP
85 GPIO5_AC_BATT
MADISON-PRO-2-GP Normal Debug pilot run
R8324 1 DY 2 10KR2J-3-GP Signal
85 JTAG_TMS_VGA mode mode mode
1

C8333 3D3V_VGA_S0
85 VGA_RST#
DY SC47P50V2JN-3GP
85 GPIO21_BB_EN
R8326 1 DY 2 10KR2J-3-GP
TESTEN "1"(PU) "1"(PU) "0"(PD)
2

R8315 1 DY 2 10KR2J-3-GP
1

R8319 JTAG_TRST# "0"(PD) "1"(PU) NC


D8301 10KR2J-3-GP
BAW 56-5-GP MUXLESS DY
2 PLT_RST# 2 R8328 1 ATI_RST# JTAG_TCK CLK "1"(PU) NC
17 PE_GPIO0
2

0R2J-2-GP
MUXLESS
3 ATI_RST#
83.00056.Q11 JTAG_TMS "1"(PU) "1"(PU) NC
2 R8327 1 PLT_RST#_R 1 2ND = 83.00056.G11
9,17,31,65,66,71,97 PLT_RST#
A 0R0402-PAD 3RD = 83.00056.K11 DY A
<Variant Name>
R8329
PE_GPIO0 2 0R2J-2-GP
1 ATI_RST#
D8302
DY BAS16-6-GP Wistron Corporation
DY 1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R8330 Taipei Hsien 221, Taiwan, R.O.C.
2 0R2J-2-GP
1 1D8V_S0_VGA_PG_D 3
93 1D8V_S0_VGA_PG
Title
1

2
C8334 GPU_PCIE/STRAPPING(1/5)
SCD1U10V2KX-4GP 83.00016.K11 Size Document Number Rev
2

DY 2ND = 83.00016.F11 Custom


3rd = 83.00016.B11 LB475 -1
Date: Tuesday, August 02, 2011 Sheet 83 of 102

5 4 3 2 1
5 4 3 2 1

VGA1C 3 OF 8 VGA1D 4 OF 8
DDR2 DDR2 DDR2 DDR2
88 MDA[0..31] 90 MDB[0..31]
GDDR3/GDDR5 GDDR5/GDDR3 GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 DDR3 DDR3
MDA0 C37 G24 MDB0 C5 P8
MDA1 DQA0_0/DQA_0 MAA0_0/MAA_0 MAA0 88,89 MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB0 90,91
C35 J23 MAA1 88,89 C3 T9 MAB1 90,91
MDA2 DQA0_1/DQA_1 MAA0_1/MAA_1 MDB2 DQB0_1/DQB_1 MAB0_1/MAB_1
A35 H24 MAA2 88,89 E3 P9 MAB2 90,91
DQA0_2/DQA_2 MAA0_2/MAA_2 DQB0_2/DQB_2 MAB0_2/MAB_2

MEMORY INTERFACE A
MDA3 MDB3

MEMORY INTERFACE B
E34 J24 MAA3 88,89 E1 N7 MAB3 90,91
MDA4 DQA0_3/DQA_3 MAA0_3/MAA_3 MDB4 DQB0_3/DQB_3 MAB0_3/MAB_3
G32 DQA0_4/DQA_4 MAA0_4/MAA_4 H26 MAA4 88,89 F1 DQB0_4/DQB_4 MAB0_4/MAB_4 N8 MAB4 90,91
MDA5 D33 J26 MDB5 F3 N9
MDA6 DQA0_5/DQA_5 MAA0_5/MAA_5 MAA5 88,89 MDB6 DQB0_5/DQB_5 MAB0_5/MAB_5 MAB5 90,91
F32 DQA0_6/DQA_6 MAA0_6/MAA_6 H21 MAA6 88,89 F5 DQB0_6/DQB_6 MAB0_6/MAB_6 U9 MAB6 90,91
MDA7 E32 G21 MDB7 G4 U8
DQA0_7/DQA_7 MAA0_7/MAA_7 MAA7 88,89 DQB0_7/DQB_7 MAB0_7/MAB_7 MAB7 90,91
MDA8 D31 H19 MDB8 H5 Y9
DQA0_8/DQA_8 MAA1_0/MAA_8 MAA8 88,89 DQB0_8/DQB_8 MAB1_0/MAB_8 MAB8 90,91
D MDA9 F30 H20 MDB9 H6 W9 D
DQA0_9/DQA_9 MAA1_1/MAA_9 MAA9 88,89 DQB0_9/DQB_9 MAB1_1/MAB_9 MAB9 90,91
MDA10 C30 L13 MDB10 J4 AC8
MDA11 DQA0_10/DQA_10 MAA1_2/MAA_10 MAA10 88,89 MDB11 DQB0_10/DQB_10 MAB1_2/MAB_10 MAB10 90,91
A30 DQA0_11/DQA_11 MAA1_3/MAA_11 G16 MAA11 88,89 K6 DQB0_11/DQB_11 MAB1_3/MAB_11 AC9 MAB11 90,91
MDA12 F28 J16 MDB12 K5 AA7
DQA0_12/DQA_12 MAA1_4/MAA_12 MAA12 88,89 DQB0_12/DQB_12 MAB1_4/MAB_12 MAB12 90,91
MDA13 C28 H16 MDB13 L4 AA8
DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 A_BA2 88,89 DQB0_13/DQB_13 MAB1_5/BA2 B_BA2 90,91
MDA14 A28 J17 MDB14 M6 Y8
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 A_BA0 88,89 DQB0_14/DQB_14 MAB1_6/BA0 B_BA0 90,91
MDA15 E28 H17 MDB15 M1 AA9
DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 A_BA1 88,89 DQB0_15/DQB_15 MAB1_7/BA1 B_BA1 90,91
MDA16 D27 MDB16 M3
MDA17 DQA0_16/DQA_16 MDB17 DQB0_16/DQB_16
F26 DQA0_17/DQA_17 WCKA0_0/DQMA_0 A32 DQMA0 88 M5 DQB0_17/DQB_17 WCKB0_0/DQMB_0 H3 DQMB0 90
MDA18 C26 C32 MDB18 N4 H1
DQA0_18/DQA_18 WCKA0#_0/DQMA_1 DQMA1 88 DQB0_18/DQB_18 WCKB0#_0/DQMB_1 DQMB1 90
MDA19 A26 D23 MDB19 P6 T3
DQA0_19/DQA_19 WCKA0_1/DQMA_2 DQMA2 88 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB2 90
MDA20 F24 E22 MDB20 P5 T5
DQA0_20/DQA_20 WCKA0#_1/DQMA_3 DQMA3 88 DQB0_20/DQB_20 WCKB0#_1/DQMB_3 DQMB3 90
MDA21 C24 C14 MDB21 R4 AE4
DQA0_21/DQA_21 WCKA1_0/DQMA_4 DQMA4 89 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMB4 91
MDA22 A24 A14 MDB22 T6 AF5
DQA0_22/DQA_22 WCKA1#_0/DQMA_5 DQMA5 89 DQB0_22/DQB_22 WCKB1#_0/DQMB_5 DQMB5 91
MDA23 E24 E10 MDB23 T1 AK6
DQA0_23/DQA_23 WCKA1_1/DQMA_6 DQMA6 89 DQB0_23/DQB_23 WCKB1_1/DQMB_6 DQMB6 91
MDA24 C22 D9 MDB24 U4 AK5
DQA0_24/DQA_24 WCKA1#_1/DQMA_7 DQMA7 89 DQB0_24/DQB_24 WCKB1#_1/DQMB_7 DQMB7 91
MDA25 A22 MDB25 V6
MDA26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3
F22 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 C34 QSAP_0 88 V1 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 F6 QSBP_0 90
MDA27 D21 D29 MDB27 V3 K3
DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 QSAP_1 88 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 QSBP_1 90
MDA28 A20 D25 MDB28 Y6 P3
DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 QSAP_2 88 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 QSBP_2 90
MDA29 F20 E20 MDB29 Y1 V5
DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 QSAP_3 88 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 QSBP_3 90
MDA30 D19 E16 MDB30 Y3 AB5
MDA31 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 QSAP_4 89 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 QSBP_4 91
89 MDA[32..63] E18 E12 QSAP_5 89 91 MDB[32..63] Y5 AH1 QSBP_5 91
MDA32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 MDB32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5
C18 J10 QSAP_6 89 AA4 AJ9 QSBP_6 91
MDA33 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 MDB33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6
A18 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 D7 QSAP_7 89 AB6 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 AM5 QSBP_7 91
MDA34 F18 MDB34 AB1
MDA35 DQA1_2/DQA_34 MDB35 DQB1_2/DQB_34
D17 A34 QSAN_0 88 AB3 G7 QSBN_0 90
MDA36 DQA1_3/DQA_35 DDBIA0_0/QSA_0#/WDQSA_0 MDB36 DQB1_3/DQB_35 DDBIB0_0/QSB_0#/WDQSB_0
A16 DQA1_4/DQA_36 DDBIA0_1/QSA_1#/WDQSA_1 E30 QSAN_1 88 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1#/WDQSB_1 K1 QSBN_1 90
MDA37 F16 E26 MDB37 AD1 P1
DQA1_5/DQA_37 DDBIA0_2/QSA_2#/WDQSA_2 QSAN_2 88 DQB1_5/DQB_37 DDBIB0_2/QSB_2#/WDQSB_2 QSBN_2 90
MDA38 D15 C20 MDB38 AD3 W4
DQA1_6/DQA_38 DDBIA0_3/QSA_3#/WDQSA_3 QSAN_3 88 DQB1_6/DQB_38 DDBIB0_3/QSB_3#/WDQSB_3 QSBN_3 90
MDA39 E14 C16 MDB39 AD5 AC4
DQA1_7/DQA_39 DDBIA1_0/QSA_4#/WDQSA_4 QSAN_4 89 DQB1_7/DQB_39 DDBIB1_0/QSB_4#/WDQSB_4 QSBN_4 91
MDA40 F14 C12 MDB40 AF1 AH3
MDA41 DQA1_8/DQA_40 DDBIA1_1/QSA_5#/WDQSA_5 QSAN_5 89 MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5#/WDQSB_5 QSBN_5 91
D13 J11 QSAN_6 89 AF3 AJ8 QSBN_6 91
MDA42 DQA1_9/DQA_41 DDBIA1_2/QSA_6#/WDQSA_6 MDB42 DQB1_9/DQB_41 DDBIB1_2/QSB_6#/WDQSB_6
F12 DQA1_10/DQA_42 DDBIA1_3/QSA_7#/WDQSA_7 F8 QSAN_7 89 AF6 DQB1_10/DQB_42 DDBIB1_3/QSB_7#/WDQSB_7 AM3 QSBN_7 91
MDA43 A12 MDB43 AG4
MDA44 DQA1_11/DQA_43 MDB44 DQB1_11/DQB_43
D11 DQA1_12/DQA_44 ADBIA0/ODTA0 J21 ODTA0 88 AH5 DQB1_12/DQB_44 ADBIB0/ODTB0 T7
MDA45 MDB45 ODTB0 90
F10 G19 ODTA1 89 AH6 W7
MDA46 DQA1_13/DQA_45 ADBIA1/ODTA1 MDB46 DQB1_13/DQB_45 ADBIB1/ODTB1 ODTB1 91
A10 DQA1_14/DQA_46 AJ4 DQB1_14/DQB_46
MDA47 C10 H27 MDB47 AK3 L9
DQA1_15/DQA_47 CLKA0 CLKA0 88 DQB1_15/DQB_47 CLKB0 CLKB0 90
C MDA48 G13 G27 MDB48 AF8 L8 C
DQA1_16/DQA_48 CLKA0# CLKA0# 88 DQB1_16/DQB_48 CLKB0# CLKB0# 90
MDA49 H13 MDB49 AF9
MDA50 DQA1_17/DQA_49 MDB50 DQB1_17/DQB_49
J13 DQA1_18/DQA_50 CLKA1 J14 AG8 DQB1_18/DQB_50 CLKB1 AD8
MDA51 CLKA1 89 MDB51 CLKB1 91
H11 H14 AG7 AD7
MDA52 DQA1_19/DQA_51 CLKA1# CLKA1# 89 MDB52 DQB1_19/DQB_51 CLKB1# CLKB1# 91
G10 DQA1_20/DQA_52 AK9 DQB1_20/DQB_52
MDA53 G8 K23 MDB53 AL7 T10
MDA54 DQA1_21/DQA_53 RASA0# RASA0# 88 MDB54 DQB1_21/DQB_53 RASB0# RASB0# 90
K9 DQA1_22/DQA_54 RASA1# K19 AM8 DQB1_22/DQB_54 RASB1# Y10
MDA55 RASA1# 89 MDB55 RASB1# 91
K10 AM7
MDA56 DQA1_23/DQA_55 MDB56 DQB1_23/DQB_55
G9 K20 CASA0# 88 AK1 W10
MDA57 DQA1_24/DQA_56 CASA0# MDB57 DQB1_24/DQB_56 CASB0# CASB0# 90
A8 DQA1_25/DQA_57 CASA1# K17 CASA1# 89 AL4 DQB1_25/DQB_57 CASB1# AA10 CASB1# 91
MDA58 C8 MDB58 AM6
MDA59 DQA1_26/DQA_58 MDB59 DQB1_26/DQB_58
E8 K24 CSA0#_0 88 AM1 P10 CSB0#_0 90
MDA60 DQA1_27/DQA_59 CSA0#_0 MDB60 DQB1_27/DQB_59 CSB0#_0
A6 K27 AN4 L10
MDA61 DQA1_28/DQA_60 CSA0#_1 MDB61 DQB1_28/DQB_60 CSB0#_1
C6 AP3
MDA62 DQA1_29/DQA_61 MDB62 DQB1_29/DQB_61
E6 M13 CSA1#_0 89 AP1 AD10 CSB1#_0 91
MDA63 DQA1_30/DQA_62 CSA1#_0 MDB63 DQB1_30/DQB_62 CSB1#_0
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1#_1 DQB1_31/DQB_63 CSB1#_1
MVREFDA L18 K21 U10
MVREFDA CKEA0 CKEA0 88 CKEB0 CKEB0 90
MVREFSA L20 J20 MVREFDB Y12 AA11
MVREFSA CKEA1 CKEA1 89 MVREFDB CKEB1 CKEB1 91 1D5V_VGA_S0
MVREFSB AA12
MEM_CALRN0 MVREFSB
L27 K26 N10
MEM_CALRN1 N12 MEM_CALRN0 WEA0# WEA0# 88 WEB0# WEB0# 90
L15 AB11
MEM_CALRN1 WEA1# WEA1# 89 WEB1# WEB1# 91

1
MEM_CALRN2 AG12
MEM_CALRN2 R8401
MEM_CALRP1 M12 H23 AD28 T8 DY 2K2R2J-2-GP
MEM_CALRP1 MAA0_8 MAA13 88,89 83 TESTEN TESTEN MAB0_8 MAB13 90,91
MEM_CALRP0 M27 J19 W8
MEM_CALRP2 AH12 MEM_CALRP0 MAA1_8 CLKTESTA MAB1_8 R8402
AK10
GDDR5

2
GDDR5
1D5V_VGA_S0 MEM_CALRP2 CLKTESTB CLKTESTA DRAM_RST DRAM_RST_R
AL10 AH11 1 R8420 2 1 51R2J-2-GP
2 MEM_RST 88,89,90,91
CLKTESTB DRAM_RST# 10R2J-2-GP
R8403 MUXLESS MUXLESS

1
1

2
1 243R2F-2-GP
2 MEM_CALRN0 C8406 C8407 C8401 if for Mannhatton,have to
Madison_Whistler SCD1U10V2KX-5GP SCD1U10V2KX-5GP R8404 MUXLESS SC120P50V2JN-1GP
5K1R2F-2-GP
change to other value
DY DY

2
2

1
MEM_CALRN1

CLKTESTB_C
1 R8405 2 MADISON-PRO-2-GP MUXLESS
243R2F-2-GP MADISON-PRO-2-GP

CLKTESTA_C
MUXLESS

1
MUXLESS MUXLESS
1 2 MEM_CALRN2 SA_2011_05_30
R8406 51R2F-2-GP
243R2F-2-GP 1 R8418 2DY
B Madison_Whistler 1 2 ** This basic topology should be used for DRAM_RST for B
R8419 DY DDR3/GDDR3/GDDR5.These Capacitors and Resistor values
51R2F-2-GP
are an example only. The Series R and || Cap values
R8407 PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC will depend on the DRAM load and will have to be
1 243R2F-2-GP
2 MEM_CALRP1 calculated for different Memory ,DRAM Load and board
MUXLESS 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 to pass Reset Signal Spec.
1 R8408 2 MEM_CALRP0
243R2F-2-GP
1

Madison_Whistler Vancouver
1 2 MEM_CALRP2 Ra R8410 Ra R8411 R8412 R8413
R8409 40D2R2F-GP 40D2R2F-GP Ra 40D2R2F-GP Ra 40D2R2F-GP
243R2F-2-GP Madison_Whistler Madison_Whistler MUXLESS MUXLESS
Madison_Whistler
2

MVREFDA MVREFSA MVREFDB MVREFSB


1

1
1

Rb R8414 C8402 Rb R8415 C8403 Rb R8416 C8404 Rb R8417 C8405


100R2F-L1-GP-U SCD1U10V2KX-5GP 100R2F-L1-GP-U SCD1U10V2KX-5GP 100R2F-L1-GP-U SCD1U10V2KX-5GP 100R2F-L1-GP-U SCD1U10V2KX-5GP
Madison_Whistler Madison_Whistler Madison_Whistler Madison_Whistler MUXLESS MUXLESS MUXLESS MUXLESS
2

2
2

DDR3/GDDR3 Memory Stuff Option(Mad/Park) Mannhatton

GDDR5 GDDR3 DDR3

MVDDQ 1.5V 1.8V/1.5V 1.5V

Ra 40.2R 40.2R 40.2R


A A

Rb 100R 100R 100R


<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_Memory(2/5)
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 84 of 102

5 4 3 2 1
5 4 3 2 1

DVPDATA [3:2:1:0] for VRAM type


selection H/W strap 1D8V_VGA_S0 VGA1B 2 OF 8
Should provide VRAM Table for VBios
request LVDS Interface
AU24
TXCAP_DPA3P
Address DVPDATA[3:0] Vender PN Speed TXCAM_DPA3N
AV23
VRAM SETTING VRAM SETTING

2
0 0 0 0 0 Hynix H5TQ2G63BFR-11C 2GB (128Mx16) 900Mhz AT25 VGA1G 7 OF 8
R8521 R8520 R8519 R8518 MUTI GFX TX0P_DPA2P
AR24
TX0M_DPA2N

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
1 0 0 0 1 Hynix 10KR2J-3-GP DPA
VRAM SETTING VRAM SETTING AU26 RN8503
TX1P_DPA1P
2 0 0 1 0 Reserve AV25 LVDS CONTROL AK27 LVDS_CTL_BL1 4

1
TX1M_DPA1N VARY_BL
AJ27 LVDS_CTL_ON2 3
DIGON
3 0 0 1 1 Hynix H5TQ1G63DFR-11C 1GB (64Mx16) 900Mhz AR8 AT27
DVPCNTL_MVP_0 TX2P_DPA0P SRN10KJ-5-GP
AU8 AR26
DVPCNTL_MVP_1 TX2M_DPA0N
4 0 1 0 0 Hynix AP8 MUXLESS
DVPCNTL_0
AW8 AR30
5 0 1 0 1 Reserve DVPCNTL_1 TXCBP_DPB3P
D AR3 AT29 AK35 D
DVPCNTL_2 TXCBM_DPB3N TXCLK_UP_DPF3P
AR1 AL36
MEM_ID0 DVPCLK TXCLK_UN_DPF3N
6 0 1 1 0 Reserve AU1
DVPDATA_0 TX3P_DPB2P
AV31
MEM_ID1 AU3 AU30 AJ38
7 0 1 1 1 Hynix MEM_ID2 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U0P_DPF2P
AW3 AK37
MEM_ID3 DVPDATA_2 TXOUT_U0N_DPF2N
AP6 AR32
DVPDATA_3 TX4P_DPB1P
AW5 AT31 AH35
DVPDATA_4 TX4M_DPB1N TXOUT_U1P_DPF1P
8 1 0 0 0 Samsung K4W1G1646G-BC11 1GB (64Mx16) 900Mhz AU5
DVPDATA_5 TXOUT_U1N_DPF1N
AJ36
VRAM SETTING AR6 AT33

2
9 1 0 0 1 Samsung DVPDATA_6 TX5P_DPB0P
VRAM SETTING AW6 DVPDATA_7 TX5M_DPB0N
AU32
TXOUT_U2P_DPF0P
AG38
R8523 R8522 R8530 R8531 AU6 AH37
DVPDATA_8 TXOUT_U2N_DPF0N

10KR2J-3-GP

10KR2J-3-GP
10 1 0 1 0 Reserve 10KR2J-3-GP 10KR2J-3-GP AT7 AU14
DVPDATA_9 TXCCP_DPC3P
VRAM SETTING VRAM SETTING AV7
DVPDATA_10 TXCCM_DPC3N
AV13
TXOUT_U3P
AF35
11 1 0 1 1 Samsung K4W2G1646C-HC11 2GB (128Mx16) 900Mhz AN7 AG36

1
DVPDATA_11 TXOUT_U3N
AV9 AT15
DVPDATA_12 TX0P_DPC2P
12 1 1 0 0 Samsung AT9
DVPDATA_13 TX0M_DPC2N
AR14
AR10 LVTMDP
DVPDATA_14 DPC
13 1 1 0 1 Reserve AW10 AU16
DVPDATA_15 TX1P_DPC1P
AU10 AV15 AP34
14 1 1 1 0 Reserve DVPDATA_16 TX1M_DPC1N TXCLK_LP_DPE3P
AP10 AR34
DVPDATA_17 TXCLK_LN_DPE3N
AV11 AT17
DVPDATA_18 TX2P_DPC0P
15 1 1 1 1 Samsung AT11 AR16 AW37
DVPDATA_19 TX2M_DPC0N TXOUT_L0P_DPE2P
AR12 AU35
DVPDATA_20 TXOUT_L0N_DPE2N
AW12 AU20
DVPDATA_21 TXCDP_DPD3P
AU12 AT19 AR37
DVPDATA_22 TXCDM_DPD3N TXOUT_L1P_DPE1P
AP12 AU39
DVPDATA_23 TXOUT_L1N_DPE1N
AT21
TX3P_DPD2P
AR20 AP35
TX3M_DPD2N TXOUT_L2P_DPE0P
AR35
DPD TXOUT_L2N_DPE0N
AU22
TX4P_DPD1P
AV21 AN36
TX4M_DPD1N TXOUT_L3P
AP37
I2C TXOUT_L3N
AT23
TX5P_DPD0P
AR22
MUXLESS
TX5M_DPD0N
AK26
I2C Bus for LVDS SCL
AJ26
SDA MADISON-PRO-2-GP
3D3V_VGA_S0 AD39
Straps GENERAL PURPOSE I/O R
AD37
R#
83 TX_PWRS_ENB AH20
GPIO_0 1D8V_VGA_S0
83 TX_DEEMPH_EN AH18 AE36
GPIO_1 G AVDD
C
83 BIF_GEN2_EN_A AN16
GPIO_2 G#
AD35 MUXLESS C
GPIO_VGA_03_DATA AH23 L8502 (1.8V@65mA AVDD)
4
3

GPIO_VGA_04_CLK GPIO_3_SMBDATA
AJ23 AF37 1 2
RN8505 GPIO_4_SMBCLK B BLM15BD121SS1D-GP
83 GPIO5_AC_BATT AH17 AE38

1
SRN4K7J-8-GP GPIO_5_AC_BATT DAC1 B# C8501 C8503 C8504
AJ17
GPIO_6 68.00084.F81
MUXLESS AK17 AC36 2nd = 68.00217.701 SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
GPIO_7_BLON HSYNC VGA_CRT_HSYNC 83
AJ13 AC38 MUXLESS MUXLESS MUXLESS

2
83 GPIO8_ROMSO GPIO_8_ROMSO VSYNC VGA_CRT_VSYNC 83
AH15
1
2

83 VGA_DIS GPIO_9_ROMSI
Q8503 AJ16 MUXLESS
GPIO_VGA_04_CLK GPIO_10_ROMSCK GPU_RSET AVSSQ
1 6 SMBC_THERM 27,28 83 CONFIG0 AK16 AB34 1 2
GPIO_11 RSET R8514
MUXLESS 83 CONFIG1 AL16
GPIO_12
2 5 AM16 AD34 AVDD 499R2F-2-GP MUXLESS VDD1DI
83 CONFIG2 GPIO_13 AVDD
1 VPIO14_VGA AM14 AE34 L8503 (1.8V@100mA VDD1DI)
TP8506 GPIO_14_HPD2 AVSSQ
3 4 92 PWRCNTL_0 AM13 1 2
GPIO16_SSIN GPIO_15_PWRCNTL_0 BLM15BD121SS1D-GP
1 AK14 AC33 VDD1DI

1
2N7002KDW-GP TP8502 GPIO17_VGA GPIO_16_SSIN VDD1DI C8502 C8506 C8507
AG30
GPIO_17_THERMAL_INT VSS1DI
AC34 68.00084.F81
84.2N702.A3F TPAD14-GP AN14 AVSSQ 2nd = 68.00217.701 SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SMBD_THERM 27,28 GPIO_18_HPD3
2nd = 84.DM601.03F THERMTRIP_VGA AM17 MUXLESS MUXLESS MUXLESS

2
GPIO_VGA_03_DATA GPIO_19_CTF
92 PWRCNTL_1 AL13 AC30
GPIO_20_PWRCNTL_1 R2
83 GPIO21_BB_EN AJ14 AC31
GPIO_21_BB_EN R2#
AK13 1 R8506 2
GPIO_22_ROMCS# 0R0402-PAD
18 PEG_CLKREQ# AN13 AD30
GPIO_23_CLKREQ# G2
83 JTAG_TRST#_VGA AM23 AD31
JTAG_TDI_VGA JTAG_TRST# G2#
3D3V_S0 1 R8517 DY2 AN23
3D3V_VGA_S0 10KR2F-2-GP JTAG_TDI AVSSQ
83 JTAG_TCK_VGA AK23 AF30
JTAG_TCK B2
83 JTAG_TMS_VGA AL24 AF31
JTAG_TDO JTAG_TMS B2#
1 AM24
DY TP8504 JTAG_TDO
AJ19
2

XTALOUT GENERICA
1 R8502 2 TPAD14-GP AK19 AC32
R8532 0R2J-2-GP GENERICB C
AJ20 AD32
MUXLESS
10KR2J-3-GP GENERICC Y
For new version no 27M AK20
AJ24
GENERICD COMP
AF32
GENERICE_HPD4 DAC2
AH26
1

GPIO17_VGA GENERICF
AH24 AD29
GENERICG H2SYNC
AC29
TPAD14-GP V2SYNC
1D8V_VGA_S0 1 HDMI_HPD_DET AK24
HPD1
AG31
TP8501 VDD2DI
AG32
1

VSS2DI
R8515
PLACE VREFG DIVIDER AND CAP MUXLESS
B 499R2F-2-GP AG33 B
CLOSE TO ASIC A2VDD
1D8V_VGA_S0 DPLL_PVDD AD33
2

GPU_VREFG A2VDDQ
MUXLESS (1.8V@75mA DPLL_PVDD) AH13
VREFG
L8501 AF33
1

C8514 A2VSSQ
1 2
1

PBY160808T-471Y-N-GP R8516 SCD1U10V2KX-5GP


68.00206.261 249R2F-GP MUXLESS AA29
1

C8515 R2SET
MUXLESS MUXLESS AM32
2

SC1U6D3V2KX-GP C8516 DPLL_PVDD


AN32
2

SCD1U10V2KX-5GP DPLL_PVSS
MUXLESS DDC1/DDC2/DDC6 have 5V-tolerant
2

Bead:470-ohm 1.5A DDC/AUX AM26


DDC1CLK
AN31
DPLL_VDDC DDC1DATA
AN26 DDC1 channel for CRT
AM27
1V_VGA_S0 DPLL_VDDC XTALIN PLL/CLOCK AUX1P
MUXLESS (1.0V@125mA DPLL_VDDC) SA_0111'11 AV33
XTALIN AUX1N
AL27
L8506 (1.1V@150mA DPLL_VDDC For M96/M92) XTALOUT AU34
XTALOUT
1 2 AM19
PBY160808T-471Y-N-GP DDC2CLK
DDC2DATA
AL19 DDC2 channel for HDMI
68.00206.261 2 R8511 1 XO_IN AW34
1

C8517 C8518 C8519 0R0402-PAD XO_IN


MUXLESS AUX2P
AN20
SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP 2 R8512 1XO_IN2
AW35 AM20
SC1U6D3V2KX-GP

0R0402-PAD XO_IN2 AUX2N


DY MUXLESS
2

AL30
DDCCLK_AUX3P
AM30
DDCDATA_AUX3N
AL29 AUXP PD 100K

THERMTRIP_R
P2800_VGA_DXP AF29 DDCCLK_AUX4P
Clock Input Configuraiton -GDDR3/DDR3 TP8517 1
DPLUS DDCDATA_AUX4N
AM29 AUXN PU 100K
1 P2800_VGA_DXN AG29 THERMAL THERMTRIP_VGA
a) 27MHz crystal connected to XTALIN or XTALOUT or TP8518 DMINUS
AN21 Draw on EDP circuit page

1
DDCCLK_AUX5P
b) 27MHz (1.8V) oscillator connected to XTALIN or DDCDATA_AUX5N
AM21
AK32 R8508
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only) TS_FDO
DDC6CLK
AJ30 DY 10KR2J-3-GP
AL31 AJ31
1D8V_VGA_S0 TSVDD TS_A DDC6DATA

2
6

4
L8504 (1.8V@20mA TSVDD) DDCCLK_AUX7P
AK30
R8524 1 2 AJ32 AK29 Q8502
XTALOUT TSVDD DDCDATA_AUX7N
1 1MR2J-1-GP
2 BLM15BD121SS1D-GP AJ33 2N7002KDW-GP DY
TSVSS
MUXLESS 68.00084.F81 84.2N702.A3F
1

2nd = 68.00217.701 C8521 2nd = 84.DM601.03F

3
MUXLESS SC1U6D3V2KX-GP MADISON-PRO-2-GP
MUXLESS
1

A A
MUXLESS
2

R8533

Q5801_2
0R0402-PAD
6,18,36 H_THERMTRIP#
2

83 VGA_RST# 2 R8510 1 <Variant Name>


C8524 C8525 0R2J-2-GP

1
SC12P50V2JN-3GP X8501 SC15P50V2JN-2-GP DY
2 1 XTALIN 1 2 XTALOUT_R 1 2 C8526
MUXLESS SCD1U10V2KX-4GP Wistron Corporation
XTAL-27MHZ-65-GP-U MUXLESS 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MUXLESS Taipei Hsien 221, Taiwan, R.O.C.
DY
Title

GPU_DP/LVDS/CRT/GPIO(3/5)
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 85 of 102
5 4 3 2 1
5 4 3 2 1

VGA1E
10/8 5 OF 8
1D8V_VGA_S0
1D5V_VGA_S0 For DDR3/GDDR5, MVDDQ = 1.5V MEM I/O
PCIE (1.8V@504mA PCIE_VDDR)
MUXLESS MUXLESS MUXLESS MUXLESS MUXLESS MUXLESS AC7 AA31 MUXLESS
VDDR1 PCIE_VDDR
AD11 AA32

1
C8601 C8604 C8605 C8606 C8607 C8608 C8611 C8612 C8613 C8614 VDDR1 PCIE_VDDR C8617 C8616 C8618
AF7 AA33
DY VDDR1 PCIE_VDDR

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
AG10 AA34

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR1 PCIE_VDDR
AJ7 V28 MUXLESS MUXLESS

2
VDDR1 PCIE_VDDR
AK8 W29
VDDR1 PCIE_VDDR
AL9 W30
VDDR1 PCIE_VDDR
MUXLESS MUXLESS MUXLESS G11
VDDR1 PCIE_VDDR
Y31
G14 1V_VGA_S0
VDDR1
G17
VDDR1 (1.0V@1920mA PCIE_VDDC)
G20
VDDR1 PCIE_VDDC
G30 MUXLESS MUXLESS MUXLESS
G23 G31

1
VDDR1 PCIE_VDDC C8628 C8630 C8631 C8632 C8633 C8602 C8634
D G26 H29 D
DY

1
VDDR1 PCIE_VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C8603 C8621 C8698 MUXLESS SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
G29 H30
VDDR1 PCIE_VDDC

SCD1U10V2KX-5GP
MUXLESS SC1U6D3V2KX-GP H10 J29 MUXLESS

SC4D7U6D3V3KX-GP

2
VDDR1 PCIE_VDDC
MUXLESS J7 J30 MUXLESS

2
VDDR1 PCIE_VDDC
J9 L28
VDDR1 PCIE_VDDC
K11 M28
VDDR1 PCIE_VDDC
MUXLESS K13
VDDR1 PCIE_VDDC
N28
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC
L16 U28
VDDR1 PCIE_VDDC VGA_CORE
L21
VDDR1
L23
VDDR1
L26
VDDR1 VDDC
AA15 MUXLESS MUXLESS MUXLESS MUXLESS MUXLESS
L7 CORE AA17

1
VDDR1 VDDC C8664 C8637 C8638 C8639 C8640 C8641 C8642 C8643 C8644
M11 AA20
VDDR1 VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
N11 AA22 SC1U6D3V2KX-GP
VDDR1 VDDC
P7 AA24 MUXLESS

2
VDDR1 VDDC
R11
VDDR1 VDDC
AA27 MUXLESS
U11
VDDR1 VDDC
AB16 MUXLESS MUXLESS
U7 AB18
VDDR1 VDDC
Y11 AB21
VDDR1 VDDC
Y7 AB23
VDDR1 VDDC
AB26
VDDC
AB28

1
1D8V_VGA_S0 VDDC C8645 C8646 C8649 C8669 C8670 C8671 C8672
AC17
VDDC

SC1U6D3V2KX-GP
AC20 MUXLESS SCD1U10V2KX-5GP MUXLESS MUXLESS MUXLESS MUXLESS SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
MUXLESS VDDC_CT LEVEL VDDC
AC22 MUXLESS MUXLESS

2
TRANSLATION VDDC
L8601 (1.8V@110mA VDD_CT) VDDC
AC24

POWER
1 2 MUXLESS MUXLESS AF26
VDD_CT VDDC
AC27
BLM15BD121SS1D-GP AF27 AD18

1
C8651 C8652 C8653 C8654 VDD_CT VDDC
68.00084.F81 C8650 MUXLESSDY
AG26
VDD_CT VDDC
AD21
DY

SCD1U10V2KX-5GP
2ND = 68.00217.701 AG27 AD23

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP VDD_CT VDDC
AD26

2
VDDC
AF17
I/O VDDC
AF20
3D3V_VGA_S0 VDDC
AF23 AF22
VDDR3 VDDC
AF24 AG16
VDDR3 VDDC
MUXLESS DY AG23
VDDR3 VDDC
AG18
AG24 AG21
1

1
C8665 C8666 C8667 VDDR3 VDDC
AH22
VDDC
MUXLESS AH27
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP

VDDC BIF_VDDC VGA_CORE


C AF13 AH28 C
2

2
VDDR4 VDDC
AF15 M26
VDDR4 VDDC R8608
AG13 N24
AG15
VDDR4 VDDC
N27
55mA in BACO mode 1 0R3J-0-U-GP
2
VDDR4 VDDC/BIF_VDDC
VDDC
R18 DY
R21
VDDC
AD12 R23

1
VDDR4 VDDC C8693 C8695
AF11 R26
VDDR4 VDDC
AF12 T17

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
VDDR4 VDDC
AG11 T20 BACO BACO

2
VDDR4 VDDC
T22
VDDC
T24
1

C8673 C8674 VDDC


T27
SC1U6D3V2KX-GP SCD1U10V2KX-5GP VDDC/BIF_VDDC
MUXLESS VDDC
U16
MUXLESS 1VDDRHA M20 U18
2

TP8604 NC_VDDRHA VDDC


TP8605 1VSSRHA M21 U21
NC_VSSRHA VDDC
U23
VDDC
U26
VDDC
1VDDRHA V12 V17
TP8606
TP8607 1VSSRHB U12
NC_VDDRHB
NC_VSSRHB
VDDC
VDDC
V20
V22
VDDCI and VDDC should have seperate regulators with a merge option on PCB
VDDC
V24

PCIE_PVDD
VDDC
VDDC
V27 For Madison and Park, VDDCI and VDDC can share one common regulator
MUXLESS VDDC
Y16
L8602 (1.8V@40mA PCIE_PVDD) PLL Y18
VDDC
1 2 AB37 Y21
PCIE_PVDD VDDC
BLM15BD121SS1D-GP MUXLESS MPV18 Y23
1

C8675 C8676 C8677 SPV10 VDDC


68.00084.F81 H7
MPV18 VDDC
Y26 have to use
2ND = 68.00217.701 SCD1U10V2KX-5GP H8 Y28 Vgs(th):0.7~1.5 V
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

SPV18 MPV18 VDDC


MUXLESS MUXLESS low Rds(on)
2

VGA_CORE BACO BACO


1V_VGA_S0 MUXLESS AM10 U8603 U8605
SPV18 BIF_VDDC AO3400A-GP AO3400A-GP VGA_CORE
L8603 (120mA SPV10) VDDCI
AA13 MUXLESS MUXLESS MUXLESS
1 2 MUXLESS AN9
SPV10 VDDCI
AB13
BLM15BD121SS1D-GP AC12 S D BIF_VDDC_CORE D S
1

1
C8678 C8679 C8680 VDDCI C8681 C8683 C8684 C8685 C8686 C8687
68.00084.F81 AN10
SPVSS VDDCI
AC15

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

2ND = 68.00217.701 AD13 SC1U6D3V2KX-GP SC4D7U6D3V3KX-GP 84.03400.B37 84.03400.B37


SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP

VDDCI
AD16 MUXLESS MUXLESS MUXLESS
2

G
VDDCI 3D3V_VGA_S0 5V_S0
MUXLESS MUXLESS VDDCI
M15
M16
VOLTAGE VDDCI
M18
B SENESE VDDCI B
M23

1
VDDCI VGA_CORE
N13
VDDCI R8610 R8607
92 VGACORE_VDD_SENSE AF28 N15
FB_VDDC VDDCI 1KR2J-1-GP 1KR2J-1-GP
VDDCI
N17 MUXLESS MUXLESS MUXLESS MUXLESS
N20 DY BACO

1
FB_VDDCI VDDCI C8657 C8658 C8659 C8660 C8661 C8662 C8663
1 AG28 N22

2
TP8602 FB_VDDCI VDDCI

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
ISOLATED R12 SC1U6D3V2KX-GP PX_EN##
CORE I/O VDDCI
R13 MUXLESS

2
VDDCI
92 VGACORE_GND_SENSE AH29
FB_GND VDDCI
R16 MUXLESS MUXLESS
T12
VDDCI
T15
VDDCI
V15
VDDCI
Y13
VDDCI
BACO BACO
U8602 U8604
MADISON-PRO-2-GP BIF_VDDC AO3418-GP AO3418-GP 1V_VGA_S0
MUXLESS
S D BIF_VDDC_1V D S
MUXLESS SPV18 Vgs(th):1~1.8 V
L8604 (1.8V@75mA SPV18) 84.03418.031 84.03418.031
1 2

G
BLM15BD121SS1D-GP 3D3V_VGA_S0 5V_S0
1

68.00084.F81 C8688 C8689 C8690 PX_EN Mode BIF_VDDC


SCD1U10V2KX-5GP 3D3V_VGA_S0
2ND = 68.00217.701 BACO
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP

MUXLESS 0 Normal VGA_Core R8602


2

1
MUXLESS MUXLESS 1 0R3J-0-U-GP
2 DGPU_PWROK_C
17,92,93 DGPU_PWROK
1 BACO 1V_VGA R8609 R8606

1
1KR2J-1-GP 1KR2J-1-GP
R8611 DY BACO
1

C8682 10KR2J-3-GP

2
DY SCD1U10V2KX-5GP BACO BACO PX_EN#
D8601 Q8602
2

2
2 4 3

BACO 3 1D5V_VGA_PWOK_R 5 2 PX_EN#

1 PX_EN## 6 1
92 8209A_EN/DEM_VGA
MPV18
L8605 MUXLESS BAW56-5-GP 2N7002KDW-GP
1 2 MUXLESS MUXLESS 83.00056.Q11 84.2N702.A3F
BLM15BD121SS1D-GP Q8601 2ND = 83.00056.G11 2nd = 84.DM601.03F
1

A C8691 C8692 C8694 A


68.00084.F81 87 PX_EN G 3RD = 83.00056.K11
2ND = 68.00217.701 SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP

MUXLESS D
2

BACO
S
<Variant Name>
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ESD Proceted:2KV Taipei Hsien 221, Taiwan, R.O.C.
DGPU_PWROK 1 R8601 2 1D5V_VGA_PWOK_R
DY 0R2J-2-GP Title

GPU_POWER(4/5)
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 86 of 102
5 4 3 2 1
5 4 3 2 1

1D8V_VGA_S0 DPAB_VDD18 DP AB_VDD18 : 300 mA


MUXLESS
if use LVDS L8709 stuff 0-ohm 0603 ohm VGA1H 8 OF 8
L8702 DPAB_VDD18
1 2
if use EDP L8709 stuff bead 0603 ohm DPCD_VDD18 DP C/D POWER DP A/B POWER
Bead:470-ohm 1.5A PBY160808T-471Y-N-GP DP ABVDD10 : 220 mA

1
68.00206.261 C8707 C8708 DP CD_VDD18 : 300 mA AP20 AN24
C8706 SCD1U10V2KX-5GP DPC_VDD18 DPA_VDD18
MUXLESS AP21 AP24 Bead:470-ohm 1.5A

SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP 1V_VGA_S0 DPC_VDD18 DPA_VDD18 1V_VGA_S0
MUXLESS

2
VGA1F 6 OF 8 MUXLESS DPCD_VDD10 DPAB_VDD10
L8709
MUXLESS L8703 MUXLESS
1 2 AP13
DPC_VDD10 DPA_VDD10
AP31 MUXLESS 1 2
Bead:470-ohm 1.5A PBY160808T-471Y-N-GP AT13 AP32 PBY160808T-471Y-N-GP

1
C8731 DPC_VDD10 DPA_VDD10 C8702 C8703
AB39
PCIE_VSS GND
A3 68.00206.261 68.00206.261
E39 A37 C8732 MUXLESS C8733 MUXLESS C8705

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
PCIE_VSS GND SC4D7U6D3V3KX-GP SCD1U10V2KX-5GP SC4D7U6D3V3KX-GP
F34 AA16 AN17 AN27

2
PCIE_VSS GND DPC_VSSR DPA_VSSR
F39
PCIE_VSS GND
AA18 MUXLESS MUXLESS AP16
DPC_VSSR DPA_VSSR
AP27 MUXLESS
D G33 AA2 AP17 AP28 D
PCIE_VSS GND DPC_VSSR DPA_VSSR
G34 AA21 AW14 AW24
PCIE_VSS GND DPC_VSSR DPA_VSSR
H31 AA23 AW16 AW26
PCIE_VSS GND DPC_VSSR DPA_VSSR
H34 AA26
PCIE_VSS GND DPAB_VDD18
H39 AA28
PCIE_VSS GND DPCD_VDD18
J31 AA6
PCIE_VSS GND
J34
PCIE_VSS GND
AB12 MUXLESS AP22
DPD_VDD18 DPB_VDD18
AP25
K31 AB15 L8711 DPCD_VDD18 AP23 AP26
PCIE_VSS GND DPD_VDD18 DPB_VDD18
K34 AB17 1 2
PCIE_VSS GND PBY160808T-471Y-N-GP
K39 AB20 Bead:470-ohm 1.5A DP CD_VDD10 : 220 mA

1
PCIE_VSS GND C8735 C8734
L31
PCIE_VSS GND
AB22 68.00206.261
L34 AB24 C8736 MUXLESS SCD1U10V2KX-5GP AP14 AN33

SC1U6D3V2KX-GP
PCIE_VSS GND DPCD_VDD10 DPD_VDD10 DPB_VDD10
M34 AB27 SC4D7U6D3V3KX-GP MUXLESS AP15 AP33 DPAB_VDD10

2
PCIE_VSS GND DPD_VDD10 DPB_VDD10
M39
PCIE_VSS GND
AC11 MUXLESS
N31 AC13
PCIE_VSS GND
N34 AC16
PCIE_VSS GND
P31 AC18 AN19 AN29
PCIE_VSS GND DPD_VSSR DPB_VSSR
P34 AC2 AP18 AP29
PCIE_VSS GND DPD_VSSR DPB_VSSR
P39 AC21 AP19 AP30
PCIE_VSS GND DPD_VSSR DPB_VSSR
R34 AC23 if use EDP L8701 stuff 0-ohm 0603 ohm AW20 AW30
PCIE_VSS GND DPD_VSSR DPB_VSSR
T31 AC26 if use LVDS L8711 stuff 0-ohm 0603 ohm AW22 AW32
PCIE_VSS GND DPD_VSSR DPB_VSSR
T34
T39
PCIE_VSS GND
AC28
AC6
if use LVDS L8701 stuff bead 0603 ohm MUXLESS
U31
PCIE_VSS GND
AD15
if use EDP L8711 stuff bead 0603 ohm R8701 R8703
PCIE_VSS GND DPCD_CALR DPAB_CALR
U34 AD17 1 150R2F-1-GP
2 AW18 AW28 1 150R2F-1-GP
2
PCIE_VSS GND 1D8V_VGA_S0 DPCD_CALR DPAB_CALR
V34
PCIE_VSS GND
AD20 MUXLESS
V39 AD22 DPEF_VDD18
PCIE_VSS GND L8701 MUXLESS
W31 AD24 DP E/F POWER DP PLL POWER
PCIE_VSS GND
W34
PCIE_VSS GND
AD27 1 2 AH34
DPE_VDD18 DPA_PVDD
AU28 75 mA DPAB_VDD18
Y34 AD9 Bead:470-ohm 1.5A PBY160808T-471Y-N-GP AJ34 AV27

2
PCIE_VSS GND C8717 C8718 DPE_VDD18 DPA_PVSS
Y39
PCIE_VSS GND
AE2 68.00206.261
AE6 C8701 MUXLESS SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
GND SC4D7U6D3V3KX-GP
AF10 MUXLESS

1
GND
GND
AF16 MUXLESS AL33
DPE_VDD10 DPB_PVDD
AV29 75 mA DPAB_VDD18
AF18 AM33 AR28
GND DPEF_VDD10 DPE_VDD10 DPB_PVSS
AF21

F15
GND
GND GND
GND
GND
AG17
AG2 1V_VGA_S0
F17 AG20 L8708 MUXLESS AN34 AU18 75 mA DPCD_VDD18
GND GND DPE_VSSR DPC_PVDD
F19 AG22 1 2 AP39 AV17
GND GND PBY160808T-471Y-N-GP DPE_VSSR DPC_PVSS
F21 AG6 Bead:470-ohm 1.5A AR39

1
GND GND C8722 C8723 DPE_VSSR
C F23
GND GND
AG9 68.00206.261 AU37
DPE_VSSR
C
F25 AH21 C8704 MUXLESS SCD1U10V2KX-5GP

SC1U6D3V2KX-GP
GND GND SC4D7U6D3V3KX-GP
F27 AJ10 MUXLESS AV19 75 mA DPCD_VDD18

2
GND GND DPD_PVDD
F29
GND GND
AJ11 MUXLESS DPD_PVSS
AR18
F31 AJ2
GND GND
F33
F7
GND GND
AJ28
AJ6
if use EDP L8708 stuff 0-ohm 0603 ohm AF34
AG34
DPF_VDD18
GND GND DPEF_VDD18 DPF_VDD18
F9
GND GND
AK11 if use LVDS L8708 stuff bead 0603 ohm DPE_PVDD
AM37 75 mA DPEF_VDD18
G2
GND GND
AK31 DP EF_VDD18 : 440 mA DPE_PVSS
AN38
G6 AK7
GND GND
H9 AL11 AK33
GND GND DPF_VDD10
J2 AL14 DPEF_VDD10 AK34
GND GND DPF_VDD10
J27
GND GND
AL17
DPF_PVDD
AL38 75 mA DPEF_VDD18
J6
GND GND
AL2 DP EF_VDD18 : 240 mA DPF_PVSS
AM35
J8 AL20 R8708
GND GND PX_EN_R
K14 AL21 1 0R2J-2-GP
2 PX_EN 86 AF39
GND GND/PX_EN DPF_VSSR
K7
GND GND
AL23 BACO AH39
DPF_VSSR
L11 AL26 AK39
1

GND GND DPF_VSSR


L17 AL32 AL34
GND GND R8709 DPF_VSSR
L2
GND GND
AL6 BACO AM34
DPF_VSSR
L22 AL8 10KR2J-3-GP
GND GND
L24 AM11
GND GND R8705
L6 AM31
2

GND GND DPEF_CALR AM39


M17 AM9 2 150R2F-1-GP
1
GND GND DPEF_CALR
M22
GND GND
AN11 MUXLESS
M24 AN2
GND GND MADISON-PRO-2-GP
N16 AN30
GND GND
N18 AN6
N2
GND GND
AN8
MUXLESS
GND GND
N21 AP11
GND GND
N23 AP7
GND GND
N26 AP9
GND GND
N6 AR5
GND GND
R15 B11
GND GND
R17 B13
GND GND
R2 B15
GND GND
R20 B17
GND GND
R22 B19
GND GND
R24 B21
GND GND
R27 B23
GND GND
R6 B25
B GND GND B
T11 B27
GND GND
T13 B29
GND GND
T16 B31
GND GND
T18 B33
GND GND
T21 B7
GND GND
T23 B9
GND GND
T26 C1
GND GND
U15 C39
GND GND
U17 E35
GND GND
U2 E5
GND GND
U20
GND GND
F11 For M97/M96, DPF_VDD18 can be shared with DPE_VDD18
U22 F13
GND GND
U24
GND For M97/M96, DPF_VDD10 can be shared with DPE_VDD10
U27
GND
U6
GND
V11
GND
V16
GND For dual link DVI using DPA AND DPB, DPA_VDDxx and DPB_VDDxx can be shared respectively
V18
GND
V21
GND
V23
GND For dual link DVI using DPC AND DPD, DPC_VDDxx and DPD_VDDxx can be shared respectively
V26
GND
W2
GND
W6
GND For dual link LVDS, DPE_VDDxx and DPF_VDDxx can be shared respectively
Y15
GND
Y17
GND
Y20
GND VSS_MECH1
Y22 A39 1 TP8701
GND VSS_MECH VSS_MECH2
Y24 AW1 1 TP8702
GND VSS_MECH VSS_MECH3
Y27 AW39 1 TP8703
GND VSS_MECH
U13
GND
V13
GND
MADISON-PRO-2-GP
MUXLESS

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DPPWR/GND(5/5)
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 87 of 102
5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM4 VRAM3
MDA[0..31] 84 MDA[0..31] 84
K8 E3 MDA26 K8 E3 MDA1
VDD DQL0 MDA30 VDD DQL0 MDA0
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDA25 N1 F2 MDA5
VDD DQL2 VDD DQL2
1

1
C8808 C8810 C8811 C8812 C8813 R9 F8 MDA29 C8816 C8817 C8818 C8819 R9 F8 MDA3
VDD DQL3 VDD DQL3

1
DY DY DY DY DY B2 H3 MDA24 C8814 DY DY DY DY B2 H3 MDA4
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDA27 VDD DQL4 MDA6
D9 H8 DY D9 H8

SCD1U10V2KX-5GP
2

2
VDD DQL5 MDA31 VDD DQL5 MDA2
D G7 G2 G7 G2 D

2
VDD DQL6 MDA28 VDD DQL6 MDA7
R1 VDD DQL7 H7 R1 VDD DQL7 H7
N9 VDD N9 VDD
D7 MDA17 D7 MDA15
DQU0 MDA19 DQU0 MDA10
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDA20 A1 C8 MDA13
VDDQ DQU2 MDA18 VDDQ DQU2 MDA8
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2

1
C9 A7 MDA22 C9 A7 MDA12
C8801 VDDQ DQU4 MDA16 VDDQ DQU4 MDA9
DY D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
SC10U6D3V5KX-1GP E9 B8 MDA21 E9 B8 MDA14

2
VDDQ DQU6 MDA23 VDDQ DQU6 MDA11
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSAP_2 84 H2 VDDQ DQSU C7 QSAP_1 84
DQSU# B7 QSAN_2 84 DQSU# B7 QSAN_1 84
VRAM1_2_VREF H1 VRAM1_2_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSAP_3 84 M8 VREFCA DQSL F3 QSAP_0 84
1 2 VRAM_ZQ1 L8 ZQ DQSL# G3 QSAN_3 84 1 2VRAM_ZQ2 L8 ZQ DQSL# G3 QSAN_0 84
R8801 DY R8802 DY
243R2F-2-GP K1 243R2F-2-GP K1
ODT ODTA0 84 ODT ODTA0 84
84,89 MAA0 N3 A0 84,89 MAA0 N3 A0
84,89 MAA1 P7 A1 84,89 MAA1 P7 A1
84,89 MAA2 P3 A2 CS# L2 CSA0#_0 84 84,89 MAA2 P3 A2 CS# L2 CSA0#_0 84
84,89 MAA3 N2 A3 RESET# T2 MEM_RST 84,89,90,91 84,89 MAA3 N2 A3 RESET# T2 MEM_RST 84,89,90,91
84,89 MAA4 P8 A4 84,89 MAA4 P8 A4
84,89 MAA5 P2 A5 84,89 MAA5 P2 A5
84,89 MAA6 R8 A6 NC#T7 T7 84,89 MAA6 R8 A6 NC#T7 T7
84,89 MAA7 R2 A7 NC#L9 L9 84,89 MAA7 R2 A7 NC#L9 L9
84,89 MAA8 T8 A8 NC#L1 L1 84,89 MAA8 T8 A8 NC#L1 L1
84,89 MAA9 R3 A9 NC#J9 J9 84,89 MAA9 R3 A9 NC#J9 J9
C L7 J1 L7 J1 C
84,89 MAA10 A10/AP NC#J1 84,89 MAA10 A10/AP NC#J1
84,89 MAA11 R7 A11 84,89 MAA11 R7 A11
84,89 MAA12 N7 A12/BC# 84,89 MAA12 N7 A12/BC#
84,89 MAA13 T3 A13 VSS J8 84,89 MAA13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,89 A_BA0 M2 BA0 VSS P9 84,89 A_BA0 M2 BA0 VSS P9
84,89 A_BA1 N8 BA1 VSS G8 84,89 A_BA1 N8 BA1 VSS G8
84,89 A_BA2 M3 BA2 VSS B3 84,89 A_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKA0 J7 CK VSS T9 84 CLKA0 J7 CK VSS T9
84 CLKA0# K7 CK# VSS E1 84 CLKA0# K7 CK# VSS E1
VSS P1 VSS P1
84 CKEA0 K9 CKE 84 CKEA0 K9 CKE
1

VSSQ G1 VSSQ G1
R8804 R8803 F9 F9
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
84 DQMA2 D3 DMU VSSQ E8 84 DQMA1 D3 DMU VSSQ E8
DY DY 84 DQMA3 E7 DML VSSQ E2 84 DQMA0 E7 DML VSSQ E2
D8 D8
2

VSSQ VSSQ
VSSQ D1 VSSQ D1
GPU_CLKA0_T L3 B9 L3 B9
84 W EA0# WE# VSSQ 84 W EA0# WE# VSSQ
84 CASA0# K3 CAS# VSSQ B1 84 CASA0# K3 CAS# VSSQ B1
84 RASA0# J3 RAS# VSSQ G9 84 RASA0# J3 RAS# VSSQ G9
1

C8802
DY SCD01U16V2KX-3GP
H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
2

B DY DY B

1D5V_VGA_S0
1

R8805
DY 2K1R2F-GP
2

VRAM1_2_VREF
1

C8803
R8806 DY SCD1U10V2KX-5GP
DY 2K1R2F-GP
2
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM1,2 (1/4)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 88 of 102

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM2 VRAM1
MDA[32..63] 84 MDA[32..63] 84
K8 E3 MDA36 K8 E3 MDA59
VDD DQL0 MDA35 VDD DQL0 MDA63
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDA37 N1 F2 MDA58
VDD DQL2 VDD DQL2
1

1
C8908 C8910 C8911 C8912 C8913 R9 F8 MDA34 C8914 C8915 C8920 C8922 C8923 R9 F8 MDA62
VDD DQL3 MDA39 VDD DQL3 MDA56
DY DY DY DY DY B2 H3 DY DY DY DY DY B2 H3
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDA32 VDD DQL4 MDA60
D9 H8 D9 H8
2

2
VDD DQL5 MDA38 VDD DQL5 MDA57
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDA33 R1 H7 MDA61
VDD DQL7 VDD DQL7
D N9 VDD N9 VDD D
D7 MDA50 D7 MDA46
DQU0 MDA55 DQU0 MDA43
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDA49 A1 C8 MDA45
VDDQ DQU2 MDA52 VDDQ DQU2 MDA40
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2

1
C8905 C9 A7 MDA48 C9 A7 MDA44
SC10U6D3V5KX-1GP VDDQ DQU4 MDA53 VDDQ DQU4 MDA41
DY D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDA51 E9 B8 MDA47

2
VDDQ DQU6 MDA54 VDDQ DQU6 MDA42
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSAP_6 84 H2 VDDQ DQSU C7 QSAP_5 84
DQSU# B7 QSAN_6 84 DQSU# B7 QSAN_5 84
VRAM3_4_VREF H1 VRAM3_4_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSAP_4 84 M8 VREFCA DQSL F3 QSAP_7 84
1 2VRAM_ZQ3 L8 ZQ DQSL# G3 QSAN_4 84 1 2VRAM_ZQ4 L8 ZQ DQSL# G3 QSAN_7 84
R8903 DY R8904 DY
243R2F-2-GP K1 243R2F-2-GP K1
ODT ODTA1 84 ODT ODTA1 84
84,88 MAA0 N3 A0 84,88 MAA0 N3 A0
84,88 MAA1 P7 A1 84,88 MAA1 P7 A1
84,88 MAA2 P3 A2 CS# L2 CSA1#_0 84 84,88 MAA2 P3 A2 CS# L2 CSA1#_0 84
84,88 MAA3 N2 A3 RESET# T2 MEM_RST 84,88,90,91 84,88 MAA3 N2 A3 RESET# T2 MEM_RST 84,88,90,91
84,88 MAA4 P8 A4 84,88 MAA4 P8 A4
84,88 MAA5 P2 A5 84,88 MAA5 P2 A5
84,88 MAA6 R8 A6 NC#T7 T7 84,88 MAA6 R8 A6 NC#T7 T7
84,88 MAA7 R2 A7 NC#L9 L9 84,88 MAA7 R2 A7 NC#L9 L9
84,88 MAA8 T8 A8 NC#L1 L1 84,88 MAA8 T8 A8 NC#L1 L1
84,88 MAA9 R3 A9 NC#J9 J9 84,88 MAA9 R3 A9 NC#J9 J9
84,88 MAA10 L7 A10/AP NC#J1 J1 84,88 MAA10 L7 A10/AP NC#J1 J1
84,88 MAA11 R7 A11 84,88 MAA11 R7 A11
C N7 N7 C
84,88 MAA12 A12/BC# 84,88 MAA12 A12/BC#
84,88 MAA13 T3 A13 VSS J8 84,88 MAA13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,88 A_BA0 M2 BA0 VSS P9 84,88 A_BA0 M2 BA0 VSS P9
84,88 A_BA1 N8 BA1 VSS G8 84,88 A_BA1 N8 BA1 VSS G8
84,88 A_BA2 M3 BA2 VSS B3 84,88 A_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKA1 J7 CK VSS T9 84 CLKA1 J7 CK VSS T9
84 CLKA1# K7 CK# VSS E1 84 CLKA1# K7 CK# VSS E1
VSS P1 VSS P1
84 CKEA1 K9 CKE 84 CKEA1 K9 CKE
1

VSSQ G1 VSSQ G1
R8907 R8908 F9 F9
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
DY DY 84 DQMA6 D3 DMU VSSQ E8 84 DQMA5 D3 DMU VSSQ E8
84 DQMA4 E7 DML VSSQ E2 84 DQMA7 E7 DML VSSQ E2
D8 D8
2

VSSQ VSSQ
VSSQ D1 VSSQ D1
GPU_CLKA1_T L3 B9 L3 B9
84 W EA1# WE# VSSQ 84 W EA1# WE# VSSQ
84 CASA1# K3 CAS# VSSQ B1 84 CASA1# K3 CAS# VSSQ B1
84 RASA1# J3 RAS# VSSQ G9 84 RASA1# J3 RAS# VSSQ G9
1

C8903
DY SCD01U16V2KX-3GP
H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
2

DY DY
B B

1D5V_VGA_S0
1

R8901
2K1R2F-GP
DY
2

VRAM3_4_VREF
1

C8901
R8902 SCD1U10V2KX-5GP
2K1R2F-GP DY
2

DY
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM3,4 (2/4)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 89 of 102

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM7 VRAM8
MDB[0..31] 84 MDB[0..31] 84
K8 E3 MDB25 K8 E3 MDB3
VDD DQL0 MDB30 VDD DQL0 MDB1
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDB27 N1 F2 MDB5
VDD DQL2 VDD DQL2
1

1
C9008 C9010 C9023 C9022 C9021 R9 F8 MDB31 C9016 C9020 C9019 C9017 C9018 R9 F8 MDB0
VDD DQL3 MDB26 VDD DQL3 MDB2
B2 H3 B2 H3
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDB28 VDD DQL4 MDB6
MUXLESS MUXLESS MUXLESS MUXLESS MUXLESS D9 H8 MUXLESS MUXLESS MUXLESS MUXLESS MUXLESS D9 H8
2

2
VDD DQL5 MDB24 VDD DQL5 MDB4
D G7 VDD DQL6 G2 G7 VDD DQL6 G2 D
R1 H7 MDB29 R1 H7 MDB7
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDB22 D7 MDB8
DQU0 MDB19 DQU0 MDB15
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB23 A1 C8 MDB9
VDDQ DQU2 MDB17 VDDQ DQU2 MDB14
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2
C9005 C9 A7 MDB20 C9 A7 MDB11
SC10U6D3V5KX-1GP VDDQ DQU4 MDB16 VDDQ DQU4 MDB13
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
MUXLESS E9 B8 MDB21 E9 B8 MDB10

2
VDDQ DQU6 MDB18 VDDQ DQU6 MDB12
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSBP_2 84 H2 VDDQ DQSU C7 QSBP_1 84
DQSU# B7 QSBN_2 84 DQSU# B7 QSBN_1 84
VRAM5_6_VREF H1 VRAM5_6_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSBP_3 84 M8 VREFCA DQSL F3 QSBP_0 84
1 2 VRAM_ZQ5 L8 G3 1 2 VRAM_ZQ6 L8 G3
ZQ DQSL# QSBN_3 84 ZQ DQSL# QSBN_0 84
R9004 R9006
MUXLESS
243R2F-2-GP K1 MUXLESS
243R2F-2-GP K1
ODT ODTB0 84 ODT ODTB0 84
84,91 MAB0 N3 A0 84,91 MAB0 N3 A0
84,91 MAB1 P7 A1 84,91 MAB1 P7 A1
84,91 MAB2 P3 A2 CS# L2 CSB0#_0 84 84,91 MAB2 P3 A2 CS# L2 CSB0#_0 84
84,91 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,91 84,91 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,91
84,91 MAB4 P8 A4 84,91 MAB4 P8 A4
84,91 MAB5 P2 A5 84,91 MAB5 P2 A5
84,91 MAB6 R8 A6 NC#T7 T7 84,91 MAB6 R8 A6 NC#T7 T7
84,91 MAB7 R2 A7 NC#L9 L9 84,91 MAB7 R2 A7 NC#L9 L9
84,91 MAB8 T8 A8 NC#L1 L1 84,91 MAB8 T8 A8 NC#L1 L1
84,91 MAB9 R3 A9 NC#J9 J9 84,91 MAB9 R3 A9 NC#J9 J9
C L7 J1 L7 J1 C
84,91 MAB10 A10/AP NC#J1 84,91 MAB10 A10/AP NC#J1
84,91 MAB11 R7 A11 84,91 MAB11 R7 A11
84,91 MAB12 N7 A12/BC# 84,91 MAB12 N7 A12/BC#
84,91 MAB13 T3 A13 VSS J8 84,91 MAB13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,91 B_BA0 M2 BA0 VSS P9 84,91 B_BA0 M2 BA0 VSS P9
84,91 B_BA1 N8 BA1 VSS G8 84,91 B_BA1 N8 BA1 VSS G8
84,91 B_BA2 M3 BA2 VSS B3 84,91 B_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKB0 J7 CK VSS T9 84 CLKB0 J7 CK VSS T9
84 CLKB0# K7 CK# VSS E1 84 CLKB0# K7 CK# VSS E1
VSS P1 VSS P1
1

84 CKEB0 K9 CKE 84 CKEB0 K9 CKE


R9007 R9008 G1 G1
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
VSSQ F9 VSSQ F9
MUXLESS MUXLESS
84 DQMB2 D3 DMU VSSQ E8 84 DQMB1 D3 DMU VSSQ E8
84 DQMB3 E7 E2 84 DQMB0 E7 E2
2

DML VSSQ DML VSSQ


VSSQ D8 VSSQ D8
GPU_CLKB0_T D1 D1
VSSQ VSSQ
84 W EB0# L3 WE# VSSQ B9 84 W EB0# L3 WE# VSSQ B9
84 CASB0# K3 CAS# VSSQ B1 84 CASB0# K3 CAS# VSSQ B1
1

C9003 MUXLESS J3 G9 J3 G9
84 RASB0# RAS# VSSQ 84 RASB0# RAS# VSSQ
SCD01U16V2KX-3GP
2

H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
B MUXLESS MUXLESS B

1D5V_VGA_S0
1

R9001
MUXLESS2K1R2F-GP
2

VRAM5_6_VREF
1

R9002 C9001
2K1R2F-GP SCD1U10V2KX-5GP
MUXLESS MUXLESS
2
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM5,6 (3/4)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 90 of 102

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 1D5V_VGA_S0
VRAM5 VRAM6
MDB[32..63] 84 MDB[32..63] 84
K8 E3 MDB48 K8 E3 MDB38
VDD DQL0 MDB53 VDD DQL0 MDB34
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDB50 N1 F2 MDB39
VDD DQL2 VDD DQL2
1

1
D C9109 C9110 C9111 C9112 C9113 R9 F8 MDB55 C9119 C9120 C9121 C9123 C9122 PTC9124 R9 F8 MDB32 D
VDD DQL3 VDD DQL3

ST100U6D3VBM-5GP
B2 H3 MDB49 B2 H3 MDB36
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDD DQL4 MDB52 VDD DQL4 MDB33
MUXLESS MUXLESS MUXLESS MUXLESS MUXLESS D9 H8 MUXLESS MUXLESS MUXLESS
MUXLESS
MUXLESS 77.C1071.081 D9 H8
2

2
VDD DQL5 MDB51 VDD DQL5 MDB37
G7 VDD DQL6 G2 MUXLESS G7 VDD DQL6 G2
R1 H7 MDB54 R1 H7 MDB35
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDB45 D7 MDB56
DQU0 MDB40 DQU0 MDB62
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB47 A1 C8 MDB57
VDDQ DQU2 MDB41 VDDQ DQU2 MDB61
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2

1
C9105 C9 A7 MDB44 C9 A7 MDB59
VDDQ DQU4 MDB42 VDDQ DQU4 MDB58
SC10U6D3V5KX-1GP D2 A2 D2 A2
VDDQ DQU5 MDB46 VDDQ DQU5 MDB60
MUXLESS E9 B8 E9 B8
2
VDDQ DQU6 MDB43 VDDQ DQU6 MDB63
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 VDDQ DQSU C7 QSBP_5 84 H2 VDDQ DQSU C7 QSBP_7 84
DQSU# B7 QSBN_5 84 DQSU# B7 QSBN_7 84
VRAM7_8_VREF H1 VRAM7_8_VREF H1
VREFDQ VREFDQ
M8 VREFCA DQSL F3 QSBP_6 84 M8 VREFCA DQSL F3 QSBP_4 84
1 2 VRAM_ZQ7 L8 G3 1 2 VRAM_ZQ8 L8 G3
ZQ DQSL# QSBN_6 84 ZQ DQSL# QSBN_4 84
R9103 R9104
MUXLESS
243R2F-2-GP K1 MUXLESS
243R2F-2-GP K1
ODT ODTB1 84 ODT ODTB1 84
84,90 MAB0 N3 A0 84,90 MAB0 N3 A0
84,90 MAB1 P7 A1 84,90 MAB1 P7 A1
84,90 MAB2 P3 A2 CS# L2 CSB1#_0 84 84,90 MAB2 P3 A2 CS# L2 CSB1#_0 84
84,90 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,90 84,90 MAB3 N2 A3 RESET# T2 MEM_RST 84,88,89,90
84,90 MAB4 P8 A4 84,90 MAB4 P8 A4
84,90 MAB5 P2 A5 84,90 MAB5 P2 A5
84,90 MAB6 R8 A6 NC#T7 T7 84,90 MAB6 R8 A6 NC#T7 T7
C R2 L9 R2 L9 C
84,90 MAB7 A7 NC#L9 84,90 MAB7 A7 NC#L9
84,90 MAB8 T8 A8 NC#L1 L1 84,90 MAB8 T8 A8 NC#L1 L1
84,90 MAB9 R3 A9 NC#J9 J9 84,90 MAB9 R3 A9 NC#J9 J9
84,90 MAB10 L7 A10/AP NC#J1 J1 84,90 MAB10 L7 A10/AP NC#J1 J1
84,90 MAB11 R7 A11 84,90 MAB11 R7 A11
84,90 MAB12 N7 A12/BC# 84,90 MAB12 N7 A12/BC#
84,90 MAB13 T3 A13 VSS J8 84,90 MAB13 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
84,90 B_BA0 M2 BA0 VSS P9 84,90 B_BA0 M2 BA0 VSS P9
84,90 B_BA1 N8 BA1 VSS G8 84,90 B_BA1 N8 BA1 VSS G8
84,90 B_BA2 M3 BA2 VSS B3 84,90 B_BA2 M3 BA2 VSS B3
VSS T1 VSS T1
VSS A9 VSS A9
84 CLKB1 J7 CK VSS T9 84 CLKB1 J7 CK VSS T9
84 CLKB1# K7 CK# VSS E1 84 CLKB1# K7 CK# VSS E1
VSS P1 VSS P1
1

84 CKEB1 K9 CKE 84 CKEB1 K9 CKE


R9107 R9108 G1 G1
56R2F-1-GP 56R2F-1-GP VSSQ VSSQ
VSSQ F9 VSSQ F9
MUXLESS MUXLESS
84 DQMB5 D3 DMU VSSQ E8 84 DQMB7 D3 DMU VSSQ E8
E7 E2 84 DQMB4 E7 E2
2

84 DQMB6 DML VSSQ DML VSSQ


VSSQ D8 VSSQ D8
GPU_CLKB1_T D1 D1
VSSQ VSSQ
84 W EB1# L3 WE# VSSQ B9 84 W EB1# L3 WE# VSSQ B9
84 CASB1# K3 CAS# VSSQ B1 84 CASB1# K3 CAS# VSSQ B1
1

C9103 J3 G9 J3 G9
84 RASB1# RAS# VSSQ 84 RASB1# RAS# VSSQ
SCD01U16V2KX-3GP MUXLESS
B B
2

H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
MUXLESS MUXLESS

1D5V_VGA_S0
1

R9101
2K1R2F-GP
MUXLESS
2

VRAM7_8_VREF
1

R9102 C9101
2K1R2F-GP SCD1U10V2KX-5GP
MUXLESS MUXLESS
2
2

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM7,8 (4/4)
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 91 of 102

5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_GFX

DCBATOUT

1
PC9204

5
6
7
8
PC9202 PC9205 PC9203

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP
SCD1U25V3KX-GP
PU9202 SC10U25V6KX-1GP
5V_S5

2
D SIR462DP-T1-GE3-GP MUXLESS D
MUXLESS MUXLESS MUXLESS
MUXLESS Vout=0.75V*(R1+R2)/R2

G
S
S
S
MUXLESS PR9202

1
1 2

4
3
2
1
PC9201 249KR2F-GP
PWR_VGA_CORE_TON Design Current = 15.6
SC1U10V2KX-1GP MUXLESS OCP>26.5A

2
MUXLESS
PU9201 MUXLESS
MUXLESS PR9205 PC9206 VGA_CORE
16 13 PWR_VGA_CORE_BOOT 1 2PWR_VGA_CORE_BOOT_C 1 2
TON BOOT
2 PR9201 1 9 2D2R3J-2-GP SCD1U25V3KX-GP
PL9201
10R2F-L-GP VDDP PWR_VGA_CORE_UGATE PWR_VGA_CORE_UGATE
12
PWR_VGA_CORE_VDD UGATE PWR_VGA_CORE_PHASE
2 11 1 2
VDD PHASE PWR_VGA_CORE_LGATE PWR_VGA_CORE_LGATE L-D36UH-1-GP PG9205
8
LGATE
MUXLESS
PR9204 8209A_PGOOD_VGA PWRCNTL_0
4 7 2ND = 68.R3610.20C

GAP-CLOSE-PWR-3-GP
5
6
7
8

5
6
7
8

1
PWR_VGA_CORE_CS PGOOD G0 PWR_VGA_CORE_FB PC9208 PTC9202 PTC9203 PTC9204
1 2 10 3

D
D
D
D

D
D
D
D
CS FB

SCD1U10V2KX-4GP
9K31R2F-GP 14 PWRCNTL_1 PU9203 PU9204
G1

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
MUXLESS MUXLESS PWR_VGA_CORE_D1
1

2
8209A_EN/DEM_VGA D1 PWR_VGA_CORE_D0 SIR166DP-T1-GE3-GP SIR166DP-T1-GE3-GP
15 6 MUXLESSMUXLESSMUXLESSMUXLESS

2
PC9207 EN/DEM D0
SC1U10V2KX-1GP PWR_VGA_CORE_VOUT
MUXLESS DY PWR_VGA_CORE_VOUT
2

17 1
GND VOUT

G
S
S
S

G
S
S
S

1
10R2J-2-GP
4
3
2
1

4
3
2
1

PR9203
RT8208FZQW-GP MUXLESS
74.08208.C73 MUXLESS

2
PR9211
1 2 VGACORE_VDD_SENSE_1
86 VGACORE_VDD_SENSE 0R0402-PAD
MUXLESS
PR9206 1 2 1KR2J-1-GP
3D3V_VGA_S0 PC9209 PC9210

1
PD9201 PR9208

SC10P50V2JN-4GP

SC10P50V2JN-4GP
2 DY 1 8209A_EN/DEM_VGA 10KR2F-2-GP
18,27,36,45,46 PM_SLP_S3# 8209A_EN/DEM_VGA 86
DY DY

2
1

CH551H-30PT-GP DY
PC9211

2
C C
SCD1U10V2KX-4GP MUXLESS
2

PWR_VGA_CORE_D0/ PWR_VGA_CORE_D1/ Level Seymour XT


PWRCNTL_0 PWRCNTL_1 PWR_VGA_CORE_FB
SA'1227
L L 1.15V

1
PR9209 PR9210 PR9213
3D3V_VGA_S0 H H 0.9V 73K2R2F-GP 49K9R2F-L-GP 49K9R2F-L-GP
MUXLESS MUXLESS
1

2
PWR_VGA_CORE_D1
PR9212

PWR_VGA_CORE_D0
10KR2J-3-GP
MUXLESS G0 G1
MUXLESS
2

8209A_PGOOD_VGA 1 PR9214 2 0 0

1GND_SENSE_1
DGPU_PWROK 17,86,93
0R0402-PAD
1

MUXLESS 1 1 PR9216
PC9212
SC100P50V2JN-3GP 1 2
2

0R0402-PAD VGACORE_GND_SENSE 86

PR9207
10R2J-2-GP
3D3V_VGA_S0 3D3V_VGA_S0
MUXLESS

2
1

1
PR9220 PR9221
10KR2J-3-GP 10KR2J-3-GP
DY DY

2
3D3V_AUX_S5
2

PWRCNTL_0
B PWRCNTL_0 85 B
DY PR9217 PWRCNTL_1
PWRCNTL_1 85
100KR2J-1-GP
1

PWR_VGA_CORE_EN_R#

1
PR9222 PR9223
10KR2J-3-GP 10KR2J-3-GP
6

MUXLESS MUXLESS_VGA BY DEFAULT


PQ9201 VGA_CORE
2

2
DMN66D0LDW-7-GP

DY
1

PR9215
DY 100R2J-2-GP
1

8209A_EN/DEM_VGA PQ9206_3

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8208F_VGA_CORE
Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 92 of 102
5 4 3 2 1
5 4 3 2 1

+3VS to 3.3V_DELAY Transfer


5V_S5
DY

1
PR9301
2 0R3J-0-U-GP
1 PR9321
3D3V_S5 0R0402-PAD
Design Current = 1A
PQ9302
RT9025 for 1D8V_S0

2
DMP2130L-7-GP 3D3V_VGA_S0 2A<OCP

3D3V_S0 S

1
D PC9321 PC9319

D
84.02130.031 SC10U6D3V5MX-3GP SC1U6D3V2KX-GP

G
PG9307

PWR_1D8V_VDD
2ND = 84.03413.A31 MUXLESS MUXLESS

2
MUXLESS 1 2

G
1D8V_VGA_PWR 1D8V_VGA_S0
3D3V_VGA discharge Vo(cal.)=1.812V GAP-CLOSE-PWR
1

PG9308
PR9320 PU9304
1

PR9316 C9305 1 2
10KR2F-2-GP SCD1U10V2KX-5GP 9025_PGOOD_1V 1 2 PWR_1D8V_EN DY MUXLESS
MUXLESS MUXLESS 0R0402-PAD 5 GAP-CLOSE-PWR
2

NC#5

1
4 6 PC9320 PC9322 PC9324 RFC9323 RFC9324
2

VDD VOUT

SC100P50V2JN-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC2200P50V2KX-2GP
PC9323 3 7 PR9317

SCD1U25V2ZY-1GP
D 3D3V_VGA_S0 SCD1U10V2KX-5GP VIN ADJ 20K5R2F-GP D
2 8 DY DY DY

2
EN GND
DY 1 9 MUXLESS

2
PR9332 PGOOD GND

2
1
1 2
22KR2F-GP R9322 PWR_1D8V_ADJ
10KR2F-2-GP RT9025-25ZSP-GP
MUXLESS

1
MUXLESS 74.09025.B3D
3.3V_ALW_1 PR9318

2
2nd = 74.09661.07D 16K2R2F-GP
83 1D8V_S0_VGA_PG MUXLESS
2

2
6

MUXLESS PR9314
PQ9303 470R2J-2-GP
2N7002KDW-GP MUXLESS
84.2N702.A3F
1

2nd = 84.DM601.03F
1

5V_S5

1
PE_GPIO1_R

3.3V_RUN_VGA_1 PR9313
1D5V_S3 0R0402-PAD
R9336
1 2

2
17 PE_GPIO1
0R2J-2-GP
1

1
DY C9304 PC9314 Design Current = 1.3A

1
SCD1U10V2KX-5GP So 1V_VGA_S0 EN have to fine tune RC delay SC10U6D3V5MX-3GP PC9313
2

MUXLESS SC1U6D3V2KX-GP 2A<OCP


after VGA_Core

PWR_1V_VDD
MUXLESS
RT9025 for 1V_S0

2
And R9336 0ohm, C9304 0.1uF near PQ9303
PR9312 PG9305
For 3D3V_VGA_S0 power noise 1 10KR2F-2-GP
2 1 2
3D3V_VGA_S0
2011.04.20 Seymour_Whistler 1V_PWR 1V_VGA_S0
GAP-CLOSE-PWR
3D3V_VGA_S0 should ramp-up before VGA_Core PG9306
PWR_1V_EN PU9303
17,86,92 DGPU_PWROK 1 PR9323 2 1 2
VGA_Coreshould ramp-up before 1V_VGA_S0 DY 0R2J-2-GP DY MUXLESS
5 GAP-CLOSE-PWR
NC#5

1
1V_VGA_S0 should ramp up before 1D8V_VGA_S0 PC9318 4 6 PC9315 PC9317 PC9316 RFC9326 RFC9325
VDD VOUT

SC2200P50V2KX-2GP
3D3V_VGA_S0

SC100P50V2JN-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
SCD1U25V3KX-GP 3 7 PR9322

SCD1U25V2ZY-1GP
VIN ADJ 10KR2F-2-GP
Seymour_Whistler 2 8 DY DY DY

2
EN GND
1
PGOOD GND
9 MUXLESS

2
PR9324
2K2R2J-2-GP PWR_1V_ADJ
RT9025-25ZSP-GP
MUXLESS

1
74.09025.B3D

2
PR9311
PR9315
9025_PGOOD_1V 1 2 PWR_1V_PGOOD 2nd = 74.09661.07D 39KR2F-GP
0R0402-PAD MUXLESS Vo=0.8*(1+(R1/R2))

2
=0.8*(1+(10K/39K)
C C
=1.005 V

1D5V_S3 1D5V_VGA_S0

PU9305
AO4468, SO-8 8 D MUXLESS
S 1
7 D S 2 MUXLESS
Id=11.6A, Qg=9~12nC 6 D S 3
1

1
Rdson=17.4~22m ohm 5 D G 4 PC9328 PTC9301
1

SCD1U16V2KX-3GP

PC9327 ST100U6D3VBM-5GP 1D5V_VGA_S0


SC10U6D3V3MX-GP SIR460DP-T1-GE3-GP 77.C1071.081
2

MUXLESS 84.00460.037 MUXLESS Discharge Circuit


2

2nd = 84.08039.037

1
change low Rds(on) MOSFET PR9349
470R2J-2-GP
DY
RUN_ENABLE PQ9305 RUNON_R_2

2
NDS0610-NL-GP

S D RUNON_R 1 R9302 2 RUNON_R_1 2 PR9330 1


0R2J-2-GP 0R0402-PAD
DY
MUXLESS DY
1
84.S0610.B31 PC9326
ESD Proceted:2KV
G

DIS_FBVDD_L
SCD1U10V2KX-5GP
DY 2ND = 84.00610.C31
1

DY
2

1 PR9327 2 DIS_EN_1D5_RUN_R PR9329 PQ9307


330KR2J-L1-GP DIS_EN_1D5_RUN
DY 330KR2J-L1-GP G
1

MUXLESS MUXLESS
PR9328 D
2

DY 100KR2J-1-GP
MUXLESS DY S
2

2N7002K-2-GP
84.2N702.J31
DIS_EN_1D5_RUN 2ND = 84.2N702.031
D

MUXLESS
MUXLESS PQ9306
5V_S5 U9301 2N7002K-2-GP
DY
84.2N702.J31
1 6 DGPU_PWROK_R 2ND = 84.2N702.031
B VCC EN B
2 5
GND DC2
3 4 1D5V_VGA_S0
G

HV DC1
RUNON_R_1 1 R9301 2 GMT_RUN_ENABLE_VGA ESD Proceted:2KV
0R0402-PAD G5938TL1U-GP
74.05938.09P DGPU_PWROK_R

PR9325
9025_PGOOD_1V 1 0R2J-2-GP
2
DY

PR9326
1 0R2J-2-GP
2 DGPU_PWROK_R
17,86,92 DGPU_PWROK
Seymour_Whistler
3D3V_VGA_S0 should ramp-up before VGA_Core
1

PC4825 VGA_Coreshould ramp-up before 1V_VGA_S0


DY SC1U10V3ZY-6GP
1V_VGA_S0 should ramp up before 1D8V_VGA_S0
2

1D5V_VGA_S0 sequence no define specially

So 1D5V_VGA_S0 EN have to fine tune RC delay


after 1V_VGA_S0

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DISCRETE VGA POWER
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 93 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LVDS_Switch
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 94 of 102

5 4 3 2 1
5 4 3 2 1

D D

C
(Blanking) C

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title

Reserved
Size Document Number Rev
A
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 95 of 102

5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title

Touch Panel
Size Document Number Rev
A
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 96 of 102

5 4 3 2 1
5 4 3 2 1

CPU Plate VGA Std-Off H16 H17


H4 H5 STF178R69H123-GP STF178R69H123-GP
H1
HOLE276R178-GP
H2
HOLE276R178-GP
H3
HOLE276R178-GP
STF237R128H42-1-GP STF237R128H42-1-GP
Check test point
3D3V_S0 1 AFTP1

1
DY DY

1
D 3D3V_AUX_S5 1 AFTP7 D
1

1
3D3V_S5 1 AFTP8
ZZ.00PAD.N11 ZZ.00PAD.N11 ZZ.00PAD.N11 AFTP9
34.41Z01.001 34.41Z01.001 5V_S5 1
34.4GD01.001 34.4GD01.001
1 AFTP10
18,27 PM_PW RBTN#
6,42 H_CPUPW RGD 1 AFTP11

1 AFTP12
27,36 S5_ENABLE

H7 H9 H10 H11
Structure boss 9,17,31,65,66,71,83 PLT_RST# 1 AFTP13

HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP HOLE335R115-GP H8 H12 H13 H15


HOLE256R115-GP HOLE256R115-GP HOLE256R115-GP HOLE256R115-GP

放放Dimm Door打
Test Point放 打打打打打打
1

1
ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D01 ZZ.00PAD.D11 ZZ.00PAD.D11 ZZ.00PAD.D11 ZZ.00PAD.D11

C C

POWER TESTING POINT--TOP AD+

1 TP9701
MiniPCI Std-Off 27,68 KBC_PW RBTN# TPAD40-GP

1 TP9700
TPAD40-GP
H14

1
EC9711 EC9712
STF256R89H178-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
DY DY
1

POWER TESTING POINT--Bottom


34.4B417.001 1 TP9702
27,68 KBC_PW RBTN# TPAD40-GP

1 TP9703
TPAD40-GP

B B

DCBATOUT
DCBATOUT

AD_JK

1
EC9714

SCD1U25V2KX-GP
2
1

1
EC9723 EC9724 EC9725 EC9722 EC9721 EC9720 EC9719 EC9718 EC9717 EC9716 EC9715
DY DY DY DY DY DY
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

2
A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/CAP
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 97 of 102
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

<Variant Name>

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
A4
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 98 of 102
5 4 3 2 1
5 4 3 2 1

14,15,46 0D75V_S0 0D75V_S0

POWER SEQUENCE 46 +0D75V_DDR_P +0D75V_DDR_P

17,27,60 RTC_AUX_S5 RTC_AUX_S5

4,6,7,9,45 1D2V_S0 1D2V_S0

9 1D2V_TRAVIS 1D2V_TRAVIS 65 +1D5V_MINI_W LAN +1D5V_MINI_W LAN


D D
9 AVDD12 AVDD12 6,20,29,36,65,66 1D5V_S0 1D5V_S0

9 DVDD12 DVDD12 5,6,7,14,15,36,46,51,71,93 1D5V_S3 1D5V_S3

20 1D2V_VPPL_SYS_S5 1D2V_VPPL_SYS_S5 5,14,15,46 DDR_VREF_S3 DDR_VREF_S3

20 1D2V_S5 1D2V_S5 46 DCBATOUT_1D5V DCBATOUT_1D5V

45 1D2V_PW R 1D2V_PW R 46 1D5V_PW R 1D5V_PW R

6,18,27,28,36,40,41,60,70,92,97 3D3V_AUX_S5 3D3V_AUX_S5

6,9,14,15,17,18,20,21,27,28,29,31,36,46,48,49,50,51,56,63,64,65,66,68,71,78,82,85,93,97 3D3V_S0 3D3V_S0

6,18,19,20,21,31,36,41,42,45,68,78,79,93,97 3D3V_S5 3D3V_S5


17,19,20,36 1D1V_S0 1D1V_S0
6,9 3D3V_S0_TRAVIS 3D3V_S0_TRAVIS
19,20 1D1V_VDDAN_MLDAC_S0 1D1V_VDDAN_MLDAC_S0
9 AVDD33 AVDD33 86 VDDC_CT VDDC_CT
20 1D1V_VPPL_SYS_S5 1D1V_VPPL_SYS_S5
9 DVDD33 DVDD33 86 PCIE_PVDD PCIE_PVDD
18,20,36,45 1D1V_S5 1D1V_S5
19,20 3D3V_VDDAN_DAC_S0_R 3D3V_VDDAN_DAC_S0_R 86 MPV18 MPV18
45 1D1V_PW R 1D1V_PW R
20 3D3V_VDDPL_SSUSB_S5 3D3V_VDDPL_SSUSB_S5 86 SPV10 SPV10
C C
20 3D3V_VDDAN_HW M_S5 3D3V_VDDAN_HW M_S5 86 SPV18 SPV18

20 3D3V_VPPL_SYS_S0 3D3V_VPPL_SYS_S0 86 BIF_VDDC BIF_VDDC


48 2D5V_PW R 2D5V_PW R
20 3D3V_VDDPL_MLDAC_S0 3D3V_VDDPL_MLDAC_S0 85 A2VDD A2VDD
7,48 2D5V_S0 2D5V_S0
20 3D3V_VDDPL_SSUSB_S5 3D3V_VDDPL_SSUSB_S5 85 AVDD AVDD

20 3D3V_VDDPL_USB_S5 3D3V_VDDPL_USB_S5 85 VDD1DI VDD1DI

20 3D3V_USB_S5 3D3V_USB_S5 85 VDD2DI VDD2DI

27,39,60 3D3V_AUX_KBC 3D3V_AUX_KBC 85 A2VDDQ A2VDDQ

7,42,43 APU_VDDNB APU_VDDNB 29 AUD_3VD AUD_3VD

31,59 3D3V_LAN_S5 3D3V_LAN_S5

31 3D3V_LAN_VDDSREG 3D3V_LAN_VDDSREG

41 3D3V_PW R 3D3V_PW R
9 RUN_ENABLE_TRAVIS RUN_ENABLE_TRAVIS
41 PW R_3D3V_DCBATOUT PW R_3D3V_DCBATOUT
9,36 RUN_ENABLE_S RUN_ENABLE_S
41 3D3V_PW R_2 3D3V_PW R_2
36 RUN_ENABLE_HV RUN_ENABLE_HV
49 3D3V_CAMERA_S0 3D3V_CAMERA_S0 83,85,86,87,93 1V_VGA_S0 1V_VGA_S0

B 65 +3V_MINI_W LAN +3V_MINI_W LAN 84,86,88,89,90,91,93 1D5V_VGA_S0 1D5V_VGA_S0 B

31 1D05V_LAN_S5 1D05V_LAN_S5 63 3D3V_BT_S0 3D3V_BT_S0

83,85,86,92,93 3D3V_VGA_S0 3D3V_VGA_S0

36,40,41,42,43,45,46,49,92,97 DCBATOUT DCBATOUT 87 DPAB_VDD18 DPAB_VDD18

38,97 AD_JK AD_JK


87 DPCD_VDD18 DPCD_VDD18
38,40,97 AD+ AD+ 9,36,41,42,45,46,48,61,62,65,68,78,82,92,93,97 5V_S5 5V_S5
87 DPCD_VDD10 DPCD_VDD10
39,40 BT+ BT+ 20,28,29,36,50,51,56,64,69,78,86 5V_S0 5V_S0
36,40,41,42,43,45,46,49,92,97 PW R_DCBATOUT_VGA_CORE DCBATOUT
29 AUD_5VA AUD_5VA

41 5V_PW R_2 5V_PW R_2

49 DCBATOUT_LCD DCBATOUT_LCD 41 5V_PW R 5V_PW R

49 LCDVDD LCDVDD 41 PW R_5V_DCBATOUT PW R_5V_DCBATOUT

7,42 APU_VDD APU_VDD

60 +RTC_VCC +RTC_VCC 50,51 5V_CRT_S0 5V_CRT_S0

57,59,62 5V_USB0_S3 5V_USB0_S3 <Variant Name>


A 85,86,87,93 1D8V_VGA_S0 1D8V_VGA_S0 A
61,82 5V_RUSB3_S0 5V_RUSB3_S0

62 5V_LUSB1_S0 5V_LUSB1_S0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
86,92 VGA_CORE VGA_CORE Taipei Hsien 221, Taiwan, R.O.C.

Title

POWER SEQUENCE
Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 99 of 102

5 4 3 2 1
A B C D E

4 4

3 3

2 2

<Variant Name>
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram


Size Document Number Rev
A3
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 100 of 102

A B C D E
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS BLOCK DIAGRAM


Size Document Number Rev
A2
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 101 of 102

5 4 3 2 1
5 4 3 2 1

Thermal Block Diagram Audio Block Diagram


D D

PAGE28 DXP P2800_DXP

MMBT3904-3-GP
SC2200P50V2KX-2GP

DXN P2800_DXN
UMA Place near CPU
Thermal PWM CORE
P2800
MMBT3904-3-GP

PAGE27 GPIO5 SYS_THRM TDR T8


C KBC GPIO92 CPU_THRM TDL

OTZ THERM_SYS_SHDN#
2N7002
D
PURE_HW_SHUTDOWN#
EN 3V/5V
C

NPCE795P S
G
IMVP_PWRGD PGOD
VR
Put under CPU(T8 HW shutdown)

GPIO4 VGA_THRM TDR


GPIO94 GPIO56 PAGE28
P2800_VGA_DXP
DXP THRMDA
FAN_TACH1

SC2200P50V2KX-2GP SC2200P50V2KX-2GP
VGA DXN
P2800_VGA_DXN
THRMDC
VGA
Thermal
FAN1_DAC

TACH Place near GPU(DISCRETE only).


P2800
FAN MMBT3904-3-GP
5V VIN
B B

PH
OTZ

VSET VOUT
VIN

FAN CONTROL
P2793
PAGE28

A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Custom
LB475 -1
Date: Tuesday, August 02, 2011 Sheet 102 of 102
5 4 3 2 1

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