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A B C D E

Key-West / Kinney Block DiagramProject


SYSTEM DC/DC
33 MAX8734A
3 SB
CLK GEN code: 91.4D901.001 INPUTS OUTPUTS
ICS954226AG 4,5 PCB P/N : 48.4D901.021 5V_S3
DCBATOUT
Mobile CPU REVISION : 05209-2 3V_S3
4 4

SB Celeron/Dothan SYSTEM DC/DC


DDRII*2 11,12
34,35 TPS5130
400MHz
INPUTS OUTPUTS
Host BUS 1D05V_S0
400MHz DCBATOUT 1D2V_S0
1D8V_S3
6,7,8,9,10 13
LVDS LCD
Alviso MAXIM CHARGER
31 MAX1909
GML
INPUTS OUTPUTS
14 BT+
RGB CRT CRT
3
DMI I/F 18V 4.0A 3
DCBATOUT
25 100MHz
Mini-PCI 5V 100mA
802.11a/b/g
15,16,17,18
26 CPU DC/DC
22 21 USB 2.0 USB x 3 32 MAX1907
RJ45 10/100 BCM4401 PCI BUS
CONN INPUTS OUTPUTS
20

SB
ICH6-M P IDE MASTER HDD
VCC_CORE
26 DCBATOUT
22 0.844~1.3V
RJ11 MODEM AZALIA DVD/ 20 27A
MDC 1.5 Card SLAVE
CONN CD-RW
20
PCI EXPRESS / USB 2.0
2

24
PCI EXPRESS
CARD
PCB LAYER 2

LINE OUT 24 20
OP AMP Power
LPC Bus L1: Signal 1
MAX4411 Switch
TPS2231 L2: GND
L3: Signal 2
23 L4: Signal 3
AZALIA CODEC
MIC IN24 27 29 L5: VCC
STAC9200
FlashRom
KBC 4Mb L6: Signal 4
H8S/RE144AV (512kB)
SC

24 SMBus 19
1
OP AMP Thermal Sensor 1
TPA6017 & Fan
28 28 ENC 6N300
SB Int. Wistron Corporation
Touch
KB SB 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Pad Taipei Hsien 221, Taiwan, R.O.C.

Title
2CH SPEAKER Block Diagram
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Thursday, December 22, 2005 Sheet 1 of 37
A B C D E
A B C D E

10,34,35,36,37 1D05V_S0 1D05V_S0


ICH6-M Integrated Pull-up 4,5,6,7,9,10,15,17,19,32,37 VCCP_GMCH_S0 VCCP_GMCH_S0

and Pull-down Resistors ICH6-M EDS 14308 0.8V1


Key-West / Kinney difference 6,9,10,37 CORE_GMCH_S0 CORE_GMCH_S0

12,35,36 0D9V_S0 0D9V_S0


Key-West Kenny
ACZ_BIT_CLK, DPRSLP#, EE_DIN, 7,11,35 DDR_VREF_S3 DDR_VREF_S3
non-Wake on LAN from S5 Wake on LAN from S5
EE_DOUT, EE_CS, GNT[5]#/GPO[17], 5,7,9,16,17,20,36,37 1D5V_S0 1D5V_S0
ICH6 internal 20K pull-ups R595 Stuff 1K ohm 0402 Dummy
4 GNT[6]#/GPO[16], LDRQ[1]/GPI[41], 17,34,35,36 1D5V_S3 1D5V_S3 4
R132, R573 Stuff 0 ohm 0805 Dummy
LAD[3:0]#/FB[3:0]#, LDRQ[0], 5 1D5V_VCCA_S0 1D5V_VCCA_S0
R360 Dummy Stuff 1K ohm 0402
PME#, PWRBTN#, TP[3] 5,32,36 VCC_CORE_S0 VCC_CORE_S0
R131 Dummy Stuff 10K ohm 0402
7,9,10,11,12,16,34,35,36,37 1D8V_S3 1D8V_S3
LAN_RXD[2:0] ICH6 internal 10K pull-ups R368 Dummy Stuff 100K ohm 0402
7,9,14,17,34,36 2D5V_S0 2D5V_S0
R367 Dummy Stuff 200K ohm 0402
ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs 9 2D5V_CRTDAC_S0 2D5V_CRTDAC_S0
U56 Dummy Stuff NC7SZ32M5X_NL
ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR, 13 3D3V_LCD_S0 3D3V_LCD_S0
C172 Dummy Stuff 0.01U 16V 0402
SPKR 3,4,5,7,9,11,13,15,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0 3D3V_S0
C174 Dummy Stuff 10U 6.3V 0805
16,17,18,19,20,25,26,33,37 3D3V_S3 3D3V_S3
USB[7:0][P,N] ICH6 internal 15K pull-downs C308 Dummy Stuff 0.047U 25V 0603
4,13,16,19,27,28,29,30,31,32,33,34,35,36 3D3V_S5 3D3V_S5
Q14 Dummy Stuff DDTC144EUA-7-F
DD[7], SDDREQ ICH6 internal 11.5K pull-downs 21,22,36,37 3D3V_LAN_S5 3D3V_LAN_S5
Q15 Dummy Stuff FDN338P_NL
33,36 +3V_SRC +3V_SRC
LAN_CLK ICH6 internal 100K pull-downs U58 Dummy Stuff SI3456BDV-T1-E3
15,19,28,33,36 +3D3VRTC +3D3VRTC
Q39 Dummy Stuff 2N7002
15,17 RTC_AUX_S5 RTC_AUX_S5

3 ICH6-M IDE Integrated Series 23 VDDA VDDA 3

13,14,17,18,19,20,24,25,27,28,32,35,36,37 5V_S0 5V_S0


Termination Resistors 13,17,19,23,24,26,33,34,35,36,37 5V_S3 5V_S3

DD[15:0], DIOW#, DIOR#, DREQ,


-1 13,32,33,34,36 5V_S5 5V_S5
approximately 33 ohm 14,37 5V_CRT_S0 5V_CRT_S0
DDACK#, IORDY, DA[2:0], DCS1#,
13,19,33,36,37 +15V +15V
DCS3#, IDEIRQ
13,31,33,34,35,36,37 DCBATOUT DCBATOUT

30,31,37 BT+ BT+

30,31,37 AD+ AD+

SB
PCI RESOURCE TABLE
R9 2 0R2J-GP XDP_TDI_FELX TP116 TPAD30
2 4 XDP_TDI 1
DY Device SMBus addr. USB Port Key West Define 2
R10 2 0R2J-GP XDP_TMS_FELX TP118 TPAD30 Clock Gen. USB1 Up connector DEVICE IDSEL PCI IRQ REQ# / GNT#
4 XDP_TMS
R11
1
DY 2 0R2J-GP XDP_TRST#_FELX TP117 TPAD30
D2 USBP[0]
4 XDP_TRST# 1
DY DDR Module 1 New card used
R265 1 2 0R2J-GP XDP_TCK_FELX TP119 TPAD30
A0 USBP[1]
4 XDP_TCK DY DDR Module 2 USB1 Down connector
R12 2 22D6R2F-L1-GP XDP_TDO_FELX TP120 TPAD30
A4 USBP[2] Mini-PCI AD19 P_INTB# / P_INTD# REQ3#/GNT3#
4 XDP_TDO
R14
1
DY 2 0R2J-GP ITP_CPU# TP122 TPAD30 LCD NC
3,4 CLK_XDP_CPU#
R15
1
DY 2 0R2J-GP ITP_CPU TP121 TPAD30
58 USBP[3]
3,4 CLK_XDP_CPU 1
DY Guardian USB2 connector
5E USBP[4]
AD16 P_INTC# REQ4#/GNT4#
4,6 H_CPURST#
R13 1
DY 2 22D6R2F-L1-GP CPURST_FLEX# TP123 TPAD30 Battery 16 USBP[5] NC LAN
TP124 TPAD30
4 XDP_BPM#5
EEPROM A2 USBP[6] NC
TP125 TPAD30
4 XDP_PRDY#
USBP[7] NC
TP126 TPAD30
4 XDP_BPM#3 SB
TP127 TPAD30
4 XDP_BPM#2
TP128 TPAD30
4 XDP_BPM#1
TP129 TPAD30
4 XDP_BPM#0 PCIE Port Key West Define
4,16 DBR#
TP130 TPAD30
PE[1] NC
VCCP_GMCH_S0 NC
TP131 TPAD30
PE[2]
1 PE[3] NC 1
1

C4
DY PE[4] New card used
SB
SCD1U10V2KX-LGP

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SB Taipei Hsien 221, Taiwan, R.O.C.
SB Title

ITP
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 2 of 37
A B C D E
A B C D E

3D3V_S0 3D3V_S0 3D3V_S0


L9 R119
1 2 3D3V_APWR_S0 1 2 3D3V_48MPWR_S0
4,5,7,9,11,13,15,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0
MLB-201209-21-GP

1
4D7R3J-L1-GP 3D3V_S0
C162 C350 C160 C161
SC10U6D3V5MXL1GP SCD1U16V SC10U6D3V5MXL1GP SCD1U16V

1
R123
10KR2J-2-GP
Dummy R123(up side),Mounting R136(down side)
--SRC7 on

2
4
3D3V_S0 ITP_EN 4
L23
1 2 3D3V_CLKGEN_S0

1
MLB-201209-21-GP
1

1
R136 Mounting R136(up side),Dummy R123(down side)
C651 C344 C349 C348 C354 C355 C351 C343 C358 10KR2J-2-GP
SCD1U16V SC10U10V6ZY-U SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V --CPU2_ITP on
DY
2

2
3D3V_S0
SB

1
3D3V_S0
R580
SB 10KR2J-2-GP
SD U62

1
DY RN42 R421

2
CLK_SRCT0 10KR2J-2-GP
SD
R432 1 2 39D2R2F-L-GP
56
CLK_PCI3 3 PCI0 LVDS 17
CLK_SRCC0
2 3 DREFSSCLK 7
29 PCLK_FWH
R133 1 2 33R2J-2-GP CLK_PCI4 4 PCI1 LVDS# 18 1 4 DREFSSCLK# 7 DY
21 PCLK_LAN PCI2

2
R134 1 2 33R2J-2-GP CLK_PCI5 5 19 SRN33J-5-GP-U H/L: 100/96MHz
25 PCLK_MINI PCI3 SRC1
R417 1
SD 2 33R2J-2-GP SS_SEL 9
SRC1# 20
22 SS_SEL
27 PCLK_KBC PCIF1/SEL100/96# SRC2
R135 1 2 33R2J-2-GP ITP_EN 8 23 RN43
16 CLK_ICHPCI PCIF0/ITP_EN SRC2#

1
24 CLK_SRCT1 2 3
SRC3 CLK_PCIE_NEW 20
55 25 CLK_SRCC1 1 4 RN40 R419
16 PM_STPPCI# PCI_STOP# SRC3# CLK_PCIE_NEW# 20 10KR2J-2-GP
26 CLK_SRCT3 SRN33J-5-GP-U 2 3
SRC4 CLK_MCH_3GPLL 7
27 CLK_SRCC3 RN41 1 4
SRC4# CLK_MCH_3GPLL# 7
46 31 CLK_SRCT5 2 3 SRN33J-5-GP-U
11,18 SMBC_ICH SCL SRC5 CLK_PCIE_ICH 16

2
CLK_SRCC5
3
11,18 SMBD_ICH 47 SDA SRC5# 30
33 CLK_SRCT6
1 4
SRN33J-5-GP-U
CLK_PCIE_ICH# 16 SB 3

SRC6 TP78 TPAD30


SRC6# 32
X5 CL=20pF±0.2pF 7 DREFCLK
R120 1 2 33R2J-2-GP DOT96T 14
DOT96
RN44 TP79 TPAD30
PREQ2# 20
Freq. Tolerance:±30ppm R121 1 2 33R2J-2-GP DOT96C 15 36 CLK_CPUT1 1 4
7 DREFCLK# DOT96# CPU2_ITP/SRC7 CLK_XDP_CPU 2,4
CLK_CPUC1
CPU2_ITP#/SRC7# 35 2
DY
3
RN45
CLK_XDP_CPU# 2,4
C356 CLK_XIN CLK_CPUT2
SB
SRN33J-5-GP-U
SB
1 2 CLK_XOUT
50
49
XTAL_IN CPU0 44
43 CLK_CPUC2 RN46
1
2
4
3
CLK_MCH_BCLK 6 SB
XTAL_OUT CPU0# CLK_MCH_BCLK# 6
CLK_CPUC0
SC CPU1 41 1 4 CLK_CPU_BCLK 4
2

SC33P50V2JN X5 R433 1 2 33R2J-2-GP 40 CLK_CPUT0 2 3 SRN33J-5-GP-U


16 CLK_ICH14 CPU1# CLK_CPU_BCLK# 4
CLK_REF14 52
CLK_IREF REF SRN33J-5-GP-U
C357 X-14D31818M-17
SB 1
R122
2
475R2F-L1-GP
39 IREF CPU_STOP# 54
FS_C R137 1 2 2K2R2J-2-GP
PM_STPCPU# 16,32
SD FSC/TEST_SEL 53 CPU_SEL0 4,7
1

1 2 FSB/TEST_MODE 16 CPU_SEL1 4,7


FS_A R424 1 2 22R2J-2-GP CLK_XDP_CPU R435 1 2 49D9R2F-GP
SC27P50V2JN-L-GP
32 CLK_PWRGD# 10 VTT_PWRGD#/PD USB48/FSA 12 CLK48_USB 16 DY
CLK_XDP_CPU# R427 1 2 49D9R2F-GP
SC 2 34 3D3V_CLKGEN_S0 DY
VSS_PCI VDD_SRC CLK_CPU_BCLK R425 1
SB 6 VSS_PCI VDD_SRC 21 2 49D9R2F-GP

CLK_XIN 51 7 CLK_CPU_BCLK# R429 1 2 49D9R2F-GP


VSS_REF VDD_PCI
45 VSS_CPU VDD_PCI 1
1

38 CLK_MCH_BCLK R428 1 2 49D9R2F-GP


X7 VSSA
13 VSS48 VDD_REF 48
XTAL-14D318M 29 42 CLK_MCH_BCLK# R426 1 2 49D9R2F-GP
VSS_SRC VDD_CPU
X7 CL=20pF VDDA 37 3D3V_APWR_S0
2

CLK_XOUT Freq. Tolerance:±20ppm 11 3D3V_48MPWR_S0 DREFCLK R125 1 2 49D9R2F-GP


VDD48
2 DY VDD_SRC 28
DREFCLK# R124 1 2 49D9R2F-GP
2

ICS954226AGLFTGP DREFSSCLK R418 1 2 49D9R2F-GP


SC 71.95422.00W
Place X7 and X5 co-layout ICS954226AG Spread DREFSSCLK# R420 1 2 49D9R2F-GP
SB
1st source: 71.95422.00W (ICS954226AGLFTGP) Spectrum Select CLK_MCH_3GPLL

CLK_MCH_3GPLL#
R410 1

R411 1
2 49D9R2F-GP

2nd source: 71.00140.00W (IDTCV140PAG-GP) S3 S2 S1 S0 Spread Amount% 2 49D9R2F-GP


NEAR CLKGEN 3rd source: 71.28442.00W (CY28442ZXC-2T-GP) 0 0 0 0 -0.8 CLK_PCIE_NEW R423 1 2 49D9R2F-GP

0 0 0 1 -1.0 CLK_PCIE_NEW# R422 1 2 49D9R2F-GP


3D3V_CLKGEN_S0
0 0 1 0 -1.25 CLK_PCIE_ICH R412 1 2 49D9R2F-GP
1 2 FS_A
R118 10KR2J-2-GP 0 0 1 1 -1.5 CLK_PCIE_ICH# R413 1 2 49D9R2F-GP

0 1 0 0 -1.75
0 1 0 1 -2.0
0 1 1 0 -2.5
0 1 1 1 -3.0
1 0 0 0 +/-0.3
<Variant Name>
1 1 0 0 1 +/-0.4 1

1 0 1 0 +/-0.5
FS_C FS_B FS_A CPU Wistron Corporation
1 0 1 1 +/-0.6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0 0 0 266M Taipei Hsien 221, Taiwan, R.O.C.
0 0 1 133M 1 1 0 0 +/-0.8
0 1 0 200M Title
0 1 1 166M 1 1 0 1 +/-1.0
1 0 0 333M Clock Generator (ICS954226AG)
1 0 1 100M 1 1 1 0 +/-1.25 Size Document Number Rev
1 1 0 400M A3
1 1 1 Reserved Key-West / Kinney -2
1 1 1 1 +/-1.5
Date: Friday, December 23, 2005 Sheet 3 of 37

A B C D E
A B C D E

VCCP_GMCH_S0

2,5,6,7,9,10,15,17,19,32,37 VCCP_GMCH_S0

6 H_A#[31..3]
62.10055.011
U46A
VCCP_GMCH_S0
H_A#3 P4 N2
A3# ADS# H_ADS# 6
H_A#4
H_A#5
U4
V3
A4# BNR# L1
J3
H_BNR# 6 1st source:62.10079.001

ADDR GROUP 0
A5# BPRI# H_BPRI# 6

1
H_A#6
H_A#7
R3 A6# R274
2nd source:62.10053.341
4 V2 A7# DEFER# L4 H_DEFER# 6 4
H_A#8 W1 H2 56R2J-4-GP
A8# DRDY# H_DRDY# 6
H_A#9 T4 M2 62.10055.011
A9# DBSY# H_DBSY# 6 U46B
H_A#10 W2 A10# H_D#[63..0] 6

2
H_A#11 Y4 N4 Place testpoint on
A11# BR0# H_BREQ#0 6 H_IERR# with a GND
H_A#12 Y1 H_D#0 A19 Y26 H_D#32
A12# D0# D32#

CONTROL
H_A#13 U1 A4 H_IERR# 0.1" away H_D#1 A25 AA24 H_D#33
H_A#14 A13# IERR# H_D#2 D1# D33# H_D#34
AA3 A14# INIT# B5 H_INIT# 15 A22 D2# D34# T25
H_A#15 Y3 H_D#3 B21 U23 H_D#35
A15# D3# D35#

DATA GRP 0
DATA GRP 2
H_A#16 AA2 J2 H_D#4 A24 V23 H_D#36
A16# LOCK# H_LOCK# 6 D4# D36#
U3 H_D#5 B26 R24 H_D#37
6 H_ADSTB#0 ADSTB#0 H_CPURST# 2,6 D5# D37#
B11 H_D#6 A21 R26 H_D#38
6 H_REQ#[4..0] RESET# H_RS#[2..0] 6 D6# D38#
H_REQ#0 R2 H1 H_RS#0 H_D#7 B20 R23 H_D#39
H_REQ#1 P3 REQ0# RS0# H_RS#1 H_D#8 D7# D39# H_D#40
REQ1# RS1# K1 C20 D8# D40# AA23
H_REQ#2 T2 L2 H_RS#2 H_D#9 B24 U26 H_D#41
H_REQ#3 P1 REQ2# RS2# H_D#10 D9# D41# H_D#42
REQ3# TRDY# M3 H_TRDY# 6 D24 D10# D42# V24
H_REQ#4 T1 H_D#11 E24 U25 H_D#43
REQ4# H_D#12 D11# D43# H_D#44
HIT# K3 H_HIT# 6 C26 D12# D44# V26

XTP/ITP SIGNALS
H_A#17 AF4 K4 H_D#13 B23 Y23 H_D#45
A17# HITM# H_HITM# 6 D13# D45#
H_A#18 AC4 H_D#14 E23 AA26 H_D#46
H_A#19 A18# H_D#15 D14# D46# H_D#47
AC7 A19# BPM#0 C8 XDP_BPM#0 2 C25 D15# D47# Y25
H_A#20
H_A#21
AC3
AD3
A20# ADDR GROUP 1 BPM#1 B8
A9
XDP_BPM#1 2 6 H_DSTBN#0 C23
C22
DSTBN0# DSTBN2# W25
W24
H_DSTBN#2 6
A21# BPM#2 XDP_BPM#2 2 6 H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 6
H_A#22 AE4 C9 D25 T24
A22# BPM#3 XDP_BPM#3 2 6 H_DINV#0 DINV0# DINV2# H_DINV#2 6
H_A#23 AD2 A10
A23# PRDY# XDP_PRDY# 2
H_A#24 AB4 B10 XDP_BPM#5
A24# PREQ# XDP_BPM#5 2
H_A#25 AC6 A13 XDP_TCK H_D#16 H23 AB25 H_D#48
A25# TCK XDP_TCK 2 D16# D48#
H_A#26 AD5 C12 XDP_TDI H_D#17 G25 AC23 H_D#49
A26# TDI XDP_TDI 2 D17# D49#
H_A#27 AE2 A12 XDP_TDO H_D#18 L23 AB24 H_D#50
A27# TDO XDP_TDO 2 D18# D50#
3 H_A#28 AD6 C11 XDP_TMS H_D#19 M26 AC20 H_D#51 3
A28# TMS XDP_TMS 2 D19# D51#

DATA GRP 1
DATA GRP 3
H_A#29 AF3 B13 XDP_TRST# H_D#20 H24 AC22 H_D#52
A29# TRST# XDP_TRST# 2 D20# D52#
H_A#30 AE1 A7 DBR# H_D#21 F25 AC25 H_D#53
A30# DBR# DBR# 2,16 D21# D53#
H_A#31 AF1 H_D#22 G24 AD23 H_D#54
A31# CPU_PROCHOT# H_D#23 D22# D54# H_D#55
6 H_ADSTB#1 AE5 ADSTB#1 PROCHOT# B17 J23 D23# D55# AE22
B18 H_D#24 M23 AF23 H_D#56
THERMDP1 19
HCLK THERM

THERMDA H_D#25 D24# D56# H_D#57 Layout Note:


15 H_A20M# C2 A20M# THERMDC A18 THERMDN 19 J25 D25# D57# AD24
D3 H_D#26 L26 AF20 H_D#58 Comp0, 2 connect with Zo=27.4 ohm, make
15 H_FERR# FERR# D26# D58# trace length shorter than 0.5" .
A3 C17 H_D#27 N24 AE21 H_D#59
15 H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP-A# 19 PM_THRMTRIP# D27# D59# Comp1, 3 connect with Zo=55 ohm, make
H_D#28 M25 AD21 H_D#60
should connect to H_D#29 D28# D60# H_D#61 trace length shorter than 0.5" .
15 H_STPCLK# C6
D1
STPCLK# ITP_CLK1 A15
A16
CLK_XDP_CPU# 2,3 SB ICH6 and Alviso H_D#30
H26
N25
D29# D61# AF25
AF22 H_D#62
15 H_INTR LINT0 ITP_CLK0 CLK_XDP_CPU 2,3 without T-ing D30# D62#
D4 B14 H_D#31 K25 AF26 H_D#63
15 H_NMI LINT1 BCLK1 CLK_CPU_BCLK# 3 ( No stub) D31# D63#
15 H_SMI# B4 SMI# BCLK0 B15 CLK_CPU_BCLK 3 6 H_DSTBN#1 K24 DSTBN1# DSTBN3# AE24 H_DSTBN#3 6
6 H_DSTBP#1 L24 DSTBP1# DSTBP3# AE25 H_DSTBP#3 6
6 H_DINV#1 J26 DINV1# DINV3# AD20 H_DINV#3 6
PZ47903
TPAD30 TP3 PSI# E1 P25 COMP0 R286 1 2 27D4R2F-L1-GP VCCP_GMCH_S0
PSI# COMP0 COMP1 R287 54D9R2F-L1-GP
COMP1 P26 1 2
R256 1 2 0R2J-GP CPU_SEL0_CPU C16 AB2 COMP2 R40 1 2 27D4R2F-L1-GP
3,7 CPU_SEL0 BSEL0 COMP2

1
R257 1 2 0R2J-GP CPU_SEL1_CPU C14 AB1 COMP3 R39 1 2 54D9R2F-L1-GP
3,7 CPU_SEL1 BSEL1 COMP3 R272
SD 200R2F-L-GP
ITP Conn. Only support 400MHz ( GML ) MISC
CPU TPAD30 TP1 CPU_TP3 C3 RSVD2
DPRSTP#
DPSLP#
G1
B7
H_DPRSLP# 15
H_DPSLP# 15

2
TPAD30 TP5 CPU_TP4 AF7 C19
RSVD3 DPWR# H_DPWR# 6
TPAD30 TP6 CPU_TP5 AC1 E4
RSVD4 PWRGOOD H_PWRGD 15
VCCP_GMCH_S0 TPAD30 TP60 CPU_TP6 E26 A6
RSVD5 SLP# H_CPUSLP# 6,15
VCCP_GMCH_S0 R37
2 GTLREF TEST1 2
1 2 AD26 GTLREF0 TEST1 C5
F23 TEST2
TEST2
1

1
TCK(PIN 5) 1KR2F-3-GP Layout Note:
R608 R38 0.5" max length.
56R2J-4-GP 2KR2F-3-GP
PZ47903

1
R31 R268
2

2
PM_THRMTRIP-A# 1KR2J-1-GP 1KR2J-1-GP
TCK(PIN A13) SB BSEL[1:0] Freq.(MHz) DY DY

2
LH 100
FBO(PIN 11) LL 133

VCCP_GMCH_S0

VCCP_GMCH_S0

H_CPURST# R267 2 1 54D9R2F-L1-GP


SB
SB
1

XDP_TDO R260 2 1 54D9R2F-L1-GP R513 3D3V_S5


DY 56R2J-4-GP
CPU_PROCHOT# R258 2 1 56R2J-4-GP 3D3V_S0
DY
1
2

XDP_TDI R261 1 2 150R2F-1-GP R514


1

330R2J-3-GP
1 1
XDP_TMS R263 1 2 39D2R2F-L-GP R532
1

150R2F-1-GP
2

XDP_TRST# R259 1 2 680R2J-3-GP


CPU_PROCHOT# 2 3 PROCHOT# 27
Wistron Corporation
2

XDP_TCK R262 1 2 27D4R2F-L1-GP DBR# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Q54
SB MMBT3904LT1-2-GP
Taipei Hsien 221, Taiwan, R.O.C.

Title
DY
CPU (1 of 2)
Size Document Number Rev
A3
All place within 2" to CPU
SB Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 4 of 37
A B C D E
A B C D E

U46D VCC_CORE_S0
62.10055.011
A2 VSS0 VSS97 D13 32,36 VCC_CORE_S0
VCC_CORE_S0
U46C
62.10055.011 VCC_CORE_S0 1.8V is for Dothan A5 VSS1 VSS98 D15
A2 before. A8 VSS2 VSS99 D17
A11 D19 VCCP_GMCH_S0
VSS3 VSS100
AA11 VCC0 VCC59 G5 A14 VSS4 VSS101 D21
AA13 VCC1 VCC60 H22 1D5V OR 1D8V A17 VSS5 VSS102 D23 2,4,6,7,9,10,15,17,19,32,37 VCCP_GMCH_S0
AA15 VCC2 VCC61 H6 Intel suggest Dothan A20 VSS6 VSS103 D26
AA17 J21 A23 E3 3D3V_S0
AA19
VCC3 VCC62
J5
A2 or later only use A26
VSS7 VSS104
E6
VCC4 VCC63 1.5V VSS8 VSS105
AA21 VCC5 VCC64 K22 AA1 VSS9 VSS106 E8 3,4,7,9,11,13,15,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0
AA5 VCC6 VCC65 U5 AA4 VSS10 VSS107 E10
4 AA7 V22 1D5V_VCCA_S0 AA6 E12 1D5V_S0 4
VCC7 VCC66 VSS11 VSS108
AA9 VCC8 VCC67 V6 AA8 VSS12 VSS109 E14
AB10 VCC9 VCC68 W21 AA10 VSS13 VSS110 E16 7,9,16,17,20,36,37 1D5V_S0
AB12 VCC10 VCC69 W5 AA12 VSS14 VSS111 E18

1
AB14 VCC11 VCC70 Y22 AA14 VSS15 VSS112 E20
AB16 Y6 C18 C12 AA16 E22
VCC12 VCC71 SCD01U16V2KX-LGP SC10U10V6ZY-U VSS16 VSS113
AB18 VCC13 AA18 VSS17 VSS114 E25

2
AB20 F26 AA20 F1 1D5V_VCCA_S0
VCC14 VCCA0 TP_VCCA1 VSS18 VSS115
AB22 VCC15 VCCA1 B1 AA22 VSS19 VSS116 F4
AB6 N1 TP_VCCA2 TP2 TPAD30 AA25 F5
VCC16 VCCA2 TP_VCCA3 TP4 TPAD30 VCCP_GMCH_S0 VSS20 VSS117 1D5V_VCCA_S0 1D5V_S0
AB8 VCC17 VCCA3 AC26 AB3 VSS21 VSS118 F7

1
AC11 TP61 TPAD30 AB5 F9
VCC18 VSS22 VSS119

1
AC13 VCC19 VCCP0 D10 CPU_D10 R271 1 2 0R0402-PAD AB7 VSS23 VSS120 F11 I max = 120 mA BC46 R280
3D3V_S0 SC22P50V2JN-4GP 12K7R3F-GP
AC15 VCC20 VCCP1 D12 AB9 VSS24 VSS121 F13 SB R30
AC17 VCC21 VCCP2 D14 AB11 VSS25 VSS122 F15 U45
DY DY

2
AC19 VCC22 VCCP3 D16 AB13 VSS26 VSS123 F17 1 2

2
AC9 E11 AB15 F19 1 5 1D5V_VCCA_SET 0R0402-PAD
VCC23 VCCP4 VSS27 VSS124 SHDN# SET
AD10 VCC24 VCCP5 E13 AB17 VSS28 VSS125 F21 2 GND
AD12 VCC25 VCCP6 E15 AB19 VSS29 VSS126 F24 3 IN OUT 4
AD14 VCC26 VCCP7 F10 AB21 VSS30 VSS127 G2

1
AD16 VCC27 VCCP8 F12 AB23 VSS31 VSS128 G6

1
AD18 F14 AB26 G22 BC45 G913CF-GP BC2 R281
VCC28 VCCP9 VSS32 VSS129 SC1U10V3ZY SC1U10V3ZY 49K9R2F-L-GP
AD8 VCC29 VCCP10 F16 AC2 VSS33 VSS130 G23
DY

2
AE11 VCC30 VCCP11 K6 AC5 VSS34 VSS131 G26
DY DY DY

2
AE13 VCC31 VCCP12 L21 AC8 VSS35 VSS132 H3

2
AE15 VCC32 VCCP13 L5 AC10 VSS36 VSS133 H5
AE17 VCC33 VCCP14 M22 AC12 VSS37 VSS134 H21
AE19 VCC34 VCCP15 M6 AC14 VSS38 VSS135 H25
AE9 VCC35 VCCP16 N21 AC16 VSS39 VSS136 J1
3 AF10 N5 AC18 J4 VCCP_GMCH_S0 0.1u *10 150u *1 3
VCC36 VCCP17 VSS40 VSS137
AF12 VCC37 VCCP18 P22 AC21 VSS41 VSS138 J6
AF14 VCC38 VCCP19 P6 AC24 VSS42 VSS139 J22
AF16 VCC39 VCCP20 R21 AD1 VSS43 VSS140 J24
AF18 VCC40 VCCP21 R5 AD4 VSS44 VSS141 K2
AF8 T22 AD7 K5 C21 C22 C32 C36 C25 C13 C30 C37 C23 C29 TC1
VCC41 VCCP22 VSS45 VSS142

1
D18 VCC42 VCCP23 T6 AD9 VSS46 VSS143 K21

ST100U6D3VBM-8GP
SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP
D20 VCC43 VCCP24 U21 AD11 VSS47 VSS144 K23
D22 VCC44 AD13 VSS48 VSS145 K26

2
D6 VCC45 VCCQ0 P23 AD15 VSS49 VSS146 L3
D8 VCC46 VCCQ1 W4 AD17 VSS50 VSS147 L6
E17 VCC47 AD19 VSS51 VSS148 L22
E19 VCC48 VID0 E2 H_VID0 32 AD22 VSS52 VSS149 L25
E21 VCC49 VID1 F2 H_VID1 32 AD25 VSS53 VSS150 M1
E5 VCC50 VID2 F3 H_VID2 32 AE3 VSS54 VSS151 M4
E7 VCC51 VID3 G3 H_VID3 32 AE6 VSS55 VSS152 M5
E9 VCC52 VID4 G4 H_VID4 32 AE8 VSS56 VSS153 M21 270u *4 10u *35
F18 VCC53 VID5 H4 H_VID5 32 AE10 VSS57 VSS154 M24
F20 VCC54 AE12 VSS58 VSS155 N3
F22 AE14 N6 VCC_CORE_S0
VCC55 TP_VCCSENSE VSS59 VSS156
F6 VCC56 VCCSENSE AE7 AE16 VSS60 VSS157 N22
F8 VCC57 AE18 VSS61 VSS158 N23
G21 AF6 TP_VSSSENSE AE20 N26
VCC58 VSSSENSE VSS62 VSS159

1
AE23 P2 C19 C20 C24 C26 C31 C34 C35 C40 C39 C42
VSS63 VSS160
1

AE26 VSS64 VSS161 P5


R51 R50

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP
PZ47903 AF2 VSS65 VSS162 P21

2
54D9R2F-L1-GP 54D9R2F-L1-GP AF5 P24
VSS66 VSS163
DY DY AF9 VSS67 VSS164 R1
AF11 VSS68 VSS165 R4 SD
2

2 2
AF13 VSS69 VSS166 R6
AF15 VSS70 VSS167 R22
AF17 VSS71 VSS168 R25
AF19 VSS72 VSS169 T3
AF21 VSS73 VSS170 T5
Layout Note: AF24 T21
VCCSENSE and VSSSENSE lines VSS74 VSS171 VCC_CORE_S0
B3 VSS75 VSS172 T23
should be of equal length. B6 T26
VSS76 VSS173
B9 VSS77 VSS174 U2
B12 VSS78 VSS175 U6
Layout Note: B16 U22
VSS79 VSS176

1
Provide a test point (with B19 U24 C41 C49 C254 C255 C258 C257 C259 C260 C261 C262
no stub) to connect a VSS80 VSS177 Need change to CAP
B22 VSS81 VSS178 V1
differential probe

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP
B25 VSS82 VSS179 V4

2
between VCCSENSE and C1 V5
VSSSENSE at the location VSS83 VSS180
where the two 54.9ohm
C4 VSS84 VSS181 V21 SB
resistors terminate the
C7
C10
VSS85 VSS182 V25
W3
SD
55 ohm transmission line. VSS86 VSS183
C13 VSS87 VSS184 W6
C15 VSS88 VSS185 W22
C18 VSS89 VSS186 W23
C21 VSS90 VSS187 W26
C24 VSS91 VSS188 Y2
D2 VSS92 VSS189 Y5
D5 VSS93 VSS190 Y21
D7 VSS94 VSS191 Y24
VCC_CORE_S0 SB
D9
D11
VSS95 SD
VSS96
1 1
1

1
PZ47903 C622 C623 C624 C625 C626 C627 C628 C629 C630 C631

Wistron Corporation
SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP

SC10U6D3V5KX-LGP
2

2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DY DY DY DY DY DY DY DY DY DY
Title

CPU (2 of 2)
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 5 of 37
A B C D E
A B C D E

CORE_GMCH_S0
Trace 10 mil wide with 20 mil spacing
9,10,37 CORE_GMCH_S0
H_XRCOMP H_YRCOMP

VCCP_GMCH_S0
1

1
R78 R91
24D9R2F-L-GP 24D9R2F-L-GP 2,4,5,7,9,10,15,17,19,32,37 VCCP_GMCH_S0
2

2
4 4

VCCP_GMCH_S0 VCCP_GMCH_S0 Power On Sequencing


U18A
4 H_D#[63..0] H_A#[31..3] 4 VID
2

2
H_D#0 E4 G9 H_A#3 >3mS
R77 R92 H_D#1 HD0# HA3# H_A#4
E1 HD1# HA4# C9
54D9R2F-L1-GP 54D9R2F-L1-GP H_D#2 F4 E9 H_A#5
H_D#3 HD2# HA5# H_A#6
H7 HD3# HA6# B7 VR_ON
H_D#4 E2 A10 H_A#7
HD4# HA7#
1

H_D#5 F1 F9 H_A#8
H_XSCOMP H_YSCOMP H_D#6 HD5# HA8# H_A#9 Vboot Vvid
E3 HD6# HA9# D8
H_D#7 D3 B10 H_A#10 Vboot
H_D#8 HD7# HA10# H_A#11 >100uS
K7 HD8# HA11# E10 Vcc_core <10uS
H_D#9 F2 G10 H_A#12
VCCP_GMCH_S0 VCCP_GMCH_S0 H_D#10 HD9# HA12# H_A#13
J7 HD10# HA13# D9
H_D#11 J8 E11 H_A#14
H_D#12 HD11# HA14# H_A#15
H6 HD12# HA15# F10 Vccp
1

H_D#13 F3 G11 H_A#16


R75 R89 H_D#14 HD13# HA16# H_A#17
K8 HD14# HA17# G13
221R3F-1-GP 221R3F-1-GP H_D#15 H5 C10 H_A#18
H_D#16 HD15# HA18# H_A#19
H1 HD16# HA19# C11 Vcc_mch
H_D#17 H2 D11 H_A#20
HD17# HA20#
2

H_XSWING H_YSWING H_D#18 K5 C12 H_A#21 10~30uS


H_D#19 HD18# HA21# H_A#22
K6 HD19# HA22# B13 MCH_PWERGD
1

H_D#20 J4 A12 H_A#23


HD20# HA23#
2

R76 R90 H_D#21 G3 F12 H_A#24


3 100R2F-L1-GP-U C85 100R2F-L1-GP-U C98 H_D#22 HD21# HA24# H_A#25 3
H3 HD22# HA25# G12
SCD1U16V SCD1U16V H_D#23 J1 E12 H_A#26 CLK_ENABLE#
HD23# HA26#
1

H_D#24 L5 C13 H_A#27 VCCP_GMCH_S0


HD24# HA27#
2

H_D#25 K4 B11 H_A#28


H_D#26 HD25# HA28# H_A#29 3~10mS
J5 HD26# HA29# D13

1
H_D#27 P7 A13 H_A#30 VGATE TO ICH6
H_D#28 HD27# HA30# H_A#31 R310
L7 HD28# HA31# F13
Trace 10 mil wide with 20 mil spacing H_D#29 J3 100R2F-L1-GP-U
H_D#30 HD29#
P5 HD30# HADS# F8 H_ADS# 4
H_D#31 L3 B9
HD31# HADSTB#0 H_ADSTB#0 4

2
H_D#32 U7 E13
HD32# HADSTB#1 H_ADSTB#1 4
H_D#33 H_VREF
Alviso Strapping Signals H_D#34
H_D#35
V6
R6
R5
HD33#
HD34#
HVREF
HBNR#
J11
A5
D5
H_BNR# 4
HD35# HBPRI# H_BPRI# 4
and Configuration

1
REV.NO. 1.0 H_D#36 P3 E7
HD36# HBREQ0# H_BREQ#0 4
page 183 H_D#37 T8 H10 R311
REF. NO. 15577 H_D#38 R7
HD37# HCPURST# H_CPURST# 2,4
C281 200R2F-L-GP
HD38#

2
Pin Name Strap Description Configuration H_D#39 R8 SCD1U10V2KX-LGP
H_D#40 HD39#
U8 HD40#

HOST

2
CFG[2:0] FSB Frequency Select 001 = FSB533 H_D#41 R4 HD41# HCLKINN AB1 CLK_MCH_BCLK# 3
101 = FSB400 H_D#42 T4 AB2
HD42# HCLKINP CLK_MCH_BCLK 3 CORE_GMCH_S0
others = Reversed H_D#43 T5 HD43#
H_D#44 R1 C6
HD44# HDBSY# H_DBSY# 4
H_D#45 T3 E6
HD45# HDEFER# H_DEFER# 4 H_DINV#[3..0] 4

1
H_D#46 V8 H8 H_DINV#0
HD46# HDINV#0
CFG[4:3] Reserved H_D#47 U6 HD47# HDINV#1 K3 H_DINV#1 R358
H_D#48 W6 T7 H_DINV#2 0R2J-GP
HD48# HDINV#2
CFG5 DMI x2 Select 0 = DMI x2 H_D#49 H_DINV#3
1 = DMI x4 (Default) H_D#50
U3
V5
HD49# HDINV#3 U5
G6
DY
HD50# HDPWR# H_DPWR# 4

2
2 H_D#51 H_DPWR# 2
W8 HD51# HDRDY# F7 H_DRDY# 4 H_DSTBN#[3..0] 4
CFG6 Reserved 0 = DDR2 (Default) H_D#52 W7 HD52# HDSTBN#0 G4 H_DSTBN#0
1 = DDR1 H_D#53 U2 HD53# HDSTBN#1 K1 H_DSTBN#1
H_D#54 U1 R3 H_DSTBN#2
HD54# HDSTBN#2
CFG7 CPU Strap 0 = Reserved H_D#55 Y5 HD55# HDSTBN#3 V3 H_DSTBN#3
H_DSTBP#[3..0] 4
1 = Dothan (Default) H_D#56 Y2 G5 H_DSTBP#0
H_D#57 HD56# HDSTBP#0 H_DSTBP#1
V4 HD57# HDSTBP#1 K2
CFG8 Reserved H_D#58 Y7 HD58# HDSTBP#2 R2 H_DSTBP#2
H_D#59 W1 W4 H_DSTBP#3
HD59# HDSTBP#3
CFG9 PCI Express Graphics 0 = Reserve Lanes H_D#60 W3 HD60# HEDRDY# F6 TP_H_EDRDY# TP64 TPAD30
Lane Reversal 1 = Normal (Default) H_D#61 Y3 D4
HD61# HHIT# H_HIT# 4
H_D#62 Y6 D6
HD62# HHITM# H_HITM# 4
CFG[11:10] Reserved H_D#63 W2 HD63# HLOCK# B3 H_LOCK# 4
A11 TP_H_PCREQ#
HPCREQ# H_REQ#[4..0] 4
CFG[13:12] XOR/ALL Z test 00 = Reserved H_XRCOMP C1 HXRCOMP HREQ#0 A7 H_REQ#0 TP11 TPAD30
straps 01 = XOR mode enabled H_XSCOMP C2 HXSCOMP HREQ#1 D7 H_REQ#1
10 = All Z mode enabled H_XSWING D1 HXSWING HREQ#2 B8 H_REQ#2
11 = Normal Operation (Default) H_YRCOMP T1 C7 H_REQ#3
H_YSCOMP HYRCOMP HREQ#3 H_REQ#4
L1 HYSCOMP HREQ#4 A8 H_RS#[2..0] 4
CFG[15:14] Reversed H_YSWING P1 HYSWING HRS0# A4 H_RS#0
C5 H_RS#1
HRS1#
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled HRS2# B4 H_RS#2 R291
1 = Dynamic ODT Enabled (Default) G8 H_CPUSLP#_GMCH 1 2
HCPUSLP# H_CPUSLP# 4,15
B5 0R0402-PAD
HTRDY# H_TRDY# 4
CFG17 Reversed For
Banias/Celeron-M:R291=DUMMY
CFG18 GMCH core VCC 0 = 1.05V (Default)
Select 1 = 1.5V 71.0GMCH.0JU For Dothan A:R291=DUMMY
1 1
For Dothan B:R291=0R
CFG19 CPU VTT Select 0 = 1.05V (Default) 910GML(LF C1):71.0GMCH.M28
1 = 1.2V
915GM (LF C1):71.0GMCH.M27 Wistron Corporation
CFG20 Reversed 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SDVOCRTL SDVO Present 0 = No SDVO device present (Default)
_DATA Title
1= SDVO device present
GMCH (1 of 5)
NOTE: All strap signals are sampled with respect to the leading Size Document Number Rev
edge of the Alviso GMCH PWORK In signal. A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 6 of 37
A B C D E
A B C D E

3,4,5,9,11,13,15,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0 3D3V_S0

9,14,17,34,36 2D5V_S0 2D5V_S0


Alviso will provide SDVO_CTRLCLK
and CTRLDATA pulldowns on-die 9,10,11,12,16,34,35,36,37 1D8V_S3 1D8V_S3

5,9,16,17,20,36,37 1D5V_S0 1D5V_S0

2,4,5,6,9,10,15,17,19,32,37 VCCP_GMCH_S0 VCCP_GMCH_S0

U18B 11,35 DDR_VREF_S3 DDR_VREF_S3

16 DMI_TXN[3..0] 1D5V_S0
4 DMI_TXN0 AA31 G16 CFG0 4
DMIRXN0 CFG0 U18G
DMI_TXN1 AB35 DMIRXN1 CFG1 H13 CPU_SEL1 R317 Intel suggest NC Due to votusly DVO
DMI_TXN2 AC31 G14 1 2 CPU_SEL0 R79
DMI_TXN3 DMIRXN2 CFG2 CFG3 1KR2J-1-GP TPAD30 TP68 SDVO_DAT PEG_COMP 2
AD35 DMIRXN3 CFG3 F16 H24 SDVOCTRL_DATA EXP_COMPI D36 1
F15 CFG4 TPAD30 TP71 SDVO_CLK H25 D34

MISC
16 DMI_TXP[3..0] CFG4 SDVOCTRL_CLK EXP_ICOMPO
DMI_TXP0 Y31 G15 CFG5 AB29 24D9R2F-L-GP
DMIRXP0 CFG5 3 CLK_MCH_3GPLL# GCLKN
DMI_TXP1 AA35 E16 CFG6 AC29 E30
DMIRXP1 CFG6 3 CLK_MCH_3GPLL GCLKP EXP_RXN0
DMI_TXP2 AB31 D17 CFG7 F34
DMI_TXP3 DMIRXP2 CFG7 CFG8 EXP_RXN1
AC35 DMIRXP3 CFG8 J16 A15 TVDAC_A EXP_RXN2 G30
D15 CFG9 C16 H34

DMI
16 DMI_RXN[3..0] CFG9 TVDAC_B EXP_RXN3
DMI_RXN0 CFG10

CFG/RSVD
AA33 DMITXN0 CFG10 E15 A17 TVDAC_C EXP_RXN4 J30
DMI_RXN1 AB37 D14 CFG11 J18 K34
DMITXN1 CFG11 TV_REFSET EXP_RXN5

TV
DMI_RXN2 AC33 E14 CFG12 B15 L30
DMI_RXN3 DMITXN2 CFG12 CFG13 TV_IRTNA EXP_RXN6
AD37 DMITXN3 CFG13 H12 B16 TV_IRTNB EXP_RXN7 M34
C14 CFG14 B17 N30
16 DMI_RXP[3..0] CFG14 TV_IRTNC EXP_RXN8
DMI_RXP0 Y33 H15 CFG15 P34
DMI_RXP1 DMITXP0 CFG15 CFG16 EXP_RXN9
AA37 DMITXP1 CFG16 J15 EXP_RXN10 R30
DMI_RXP2 CFG17
DMI_RXP3
AB33
AC37
DMITXP2 CFG17 H14
G22 CFG18
SB EXP_RXN11 T34
U30
DMITXP3 CFG18 CFG19 EXP_RXN12
CFG19 G23 14 GMCH_DDCCLK EXP_RXN13 V34
D23 CFG20 W30
CFG20 14 GMCH_DDCDATA EXP_RXN14
AM33 G25 RSVD21 E24 Y34
11 CLK_DDR0 SM_CK0 RSVD21 Trace impendance 50ohm Less than 0.5", trace impendance 37.5ohm DDCCLK EXP_RXN15
AL1 G24 RSVD22 TP70 TPAD30 E23
11 CLK_DDR1 SM_CK1 RSVD22 DDCDATA
AE11 J17 RSVD23 TP66 TPAD30 E21 D30
SM_CK2 RSVD23 14 VGA_BLUE BLUE EXP_RXP0
AJ34 A31 RSVD24 TP65 TPAD30 D21 E34
11 CLK_DDR3 SM_CK3 RSVD24 14 VGA_GREEN BLUE# EXP_RXP1
AF6 A30 RSVD25 TP13 TPAD30 C20 F30

VGA
11 CLK_DDR4 SM_CK4 RSVD25 14 VGA_RED GREEN EXP_RXP2
AC10 D26 RSVD26 TP12 TPAD30 B20 G34
SM_CK5 RSVD26 RSVD27 TP69 TPAD30 GREEN# EXP_RXP3
RSVD27 D25 A19 RED EXP_RXP4 H30
TP67 TPAD30 R74 2 150R2F-1-GP
11 CLK_DDR0# AN33 SM_CK0# R73
1
DY 2 150R2F-1-GP VSYNC
B19 RED# EXP_RXP5 J34
3
11 CLK_DDR1# AK1 SM_CK1# R72
1
DY 2 150R2F-1-GP HSYNC
H21 VSYNC EXP_RXP6 K30 3
AE10
AJ33
SM_CK2# SC 1
DY R53 1 2 39R2J-L-GP CRTIREF
G21
J20
HSYNC EXP_RXP7 L34
M30

PCI-EXPRESS GRAPHICS
11 CLK_DDR3# SM_CK3# 14 VGA_VSYNC REFSET EXP_RXP8
AF5 R52 1 2 39R2J-L-GP N34
11 CLK_DDR4# SM_CK4# 14 VGA_HSYNC EXP_RXP9
AD10 R359 1 2 255R2F-L-GP P30
SM_CK5# EXP_RXP10
EXP_RXP11 R34
11,12 M_CKE0_R# AP21 SM_CKE0 SB EXP_RXP12 T30
MUXING

AM21 R533 1 2 0R0402-PAD U34


11,12 M_CKE1_R# SM_CKE1 27 GBKLT_EN EXP_RXP13
11,12 M_CKE2_R# AH21 SM_CKE2 BM_BUSY# J23 PM_BMBUSY# 16 13,27 BIA_PWM E25 LBKLT_CRTL EXP_RXP14 V30
11,12 M_CKE3_R# AK21 SM_CKE3 EXT_TS0# J21 PM_EXTTS#0 13 BL_ON F25 LBKLT_EN EXP_RXP15 W34
EXT_TS1# H22 PM_EXTTS#1 LCTLA_CLK C23 LCTLA_CLK
AN16 F5 LCTLB_DATA C22 E32
PM

11,12 M_CS0_R# SM_CS0# THRMTRIP# THERMTRIP_GMCH# 19 LCTLB_DATA EXP_TXN0


LDDC_CLK
Layout Note: 11,12 M_CS1_R# AM14 SM_CS1# PWROK AD30
RST1# 1
GMCH_PWROK 32 SB LDDC_DATA
F23 LDDC_CLK EXP_TXN1 F36
DDR

11,12 M_CS2_R# AH15 SM_CS2# RSTIN# AE29 2 PLT_RST1# 18,20,27,29 F22 LDDC_DATA EXP_TXN2 G32
Route as short AG16 R374 100R2F-L1-GP-U F26 H36
as possible 11,12 M_CS3_R# SM_CS3# 13,27 LCDVDD_ON LVDD_EN EXP_TXN3
A24 LIBG C33 J32
DREF_CLKN DREFCLK# 3 LIBG EXP_TXN4
M_OCDCOMP0 AF22 A23 TPAD30 TP62 L_LVBG C31 K36
CLK

SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5


M_OCDCOMP1 AF16 C37 TPAD30 TP73 L_VREFH F28 L32
SM_OCDCOMP1 DREF_SSCLKN DREFSSCLK# 3 LVREFH EXP_TXN6
1

D37 TPAD30 TP72 L_VREFL F27 M36


DREF_SSCLKP DREFSSCLK 3 NO STUFF LVREFL EXP_TXN7
R373 R372 AP14 N32

LVDS
11,12 M_ODT0 SM_ODT0 EXP_TXN8
GMCH_TP3 TP22 TPAD30
DY DY AL15 AP37 B30 P36
40D2R2F-GP

40D2R2F-GP

11,12 M_ODT1 SM_ODT1 NC#AP37 2D5V_S0 13 TXACLK- LACLKN EXP_TXN9


AM11 AN37 GMCH_TP4 TP20 TPAD30 B29 R32
11,12 M_ODT2 SM_ODT2 NC#AN37 13 TXACLK+ LACLKP EXP_TXN10
AN10 AP36 GMCH_TP5 TP21 TPAD30 RN27 C25 T36
11,12 M_ODT3 SM_ODT3 NC#AP36 13 TXBCLK- LBCLKN EXP_TXN11
2

AP2 GMCH_TP6 TP17 TPAD30 LCTLA_CLK 1 8 C24 U32


DDR_VREF_S3 NC#AP2 13 TXBCLK+ LBCLKP EXP_TXN12
M_RCOMPN AK10 AP1 GMCH_TP7 TP18 TPAD30 LCTLB_DATA2 7 V36
M_RCOMPP SMRCOMPN NC#AP1 GMCH_TP8 TP19 TPAD30 LDDC_CLK 3 EXP_TXN13
AK11 SMRCOMPP NC#AN1 AN1 6 13 TXAOUT0- B34 LADATAN0 EXP_TXN14 W32
GMCH_TP9 TP9 TPAD30 LDDC_DATA 4
SB AF37 B1 5 B33 Y36
NC

SMVREF0 NC#B1 13 TXAOUT1- LADATAN1 EXP_TXN15


AD1 A2 GMCH_TP10 TP10 TPAD30 B32
SMVREF1 NC#A2 13 TXAOUT2- LADATAN2
SMXSLEW AE27 B37 GMCH_TP11 TP16 TPAD30 SRN2K2 D32
SMXSLEWIN NC#B37 EXP_TXP0
1

2 GMCH_TP12 TP15 TPAD30 2


AE28 SMXSLEWOUT NC#A36 A36 EXP_TXP1 E36
C112 SMYSLEW AF9 A37 GMCH_TP13 TP14 TPAD30 A34 F32
SMYSLEWIN NC#A37 13 TXAOUT0+ LADATAP0 EXP_TXP2
SCD1U10V2KX-LGP AF10 BL_ON R351 1 2 100KR2J-1-GP A33 G36
SMYSLEWOUT 13 TXAOUT1+ LADATAP1 EXP_TXP3
2

13 TXAOUT2+ B31 LADATAP2 EXP_TXP4 H32


BIA_PWM R347 1 2 100KR2J-1-GP J36
EXP_TXP5 2D5V_S0
13 TXBOUT0- C29 LBDATAN0 EXP_TXP6 K32 When High 1K Ohm
2D5V_S0 LIBG R348 1 2 1K5R2F-2-GP D28 L36
71.0GMCH.0JU 13 TXBOUT1- LBDATAN1 EXP_TXP7
R345 R516
SB When Low 2.2K Ohm 13 TXBOUT2- C27 LBDATAN2 EXP_TXP8 M32
N36 R350 1 2 DUMMY-R2 CFG18
PM_EXTTS#0 R324 1 EXP_TXP9
1 2 1 2 EXT_TSO# 27 2 DUMMY-R2 CFG3
13 TXBOUT0+ C28 LBDATAP0 EXP_TXP10 P32
10KR2J-2-GP 0R2J-GP 3D3V_S0 R346 1 2 DUMMY-R2 CFG19
DY R322 1 2 DUMMY-R2 CFG4
13 TXBOUT1+ D27
C26
LBDATAP1 EXP_TXP11 R36
T32
Ref ALVISO EDS-1 Page 115 13 TXBOUT2+ LBDATAP2 EXP_TXP12
R349 VCCP_GMCH_S0 U36 R344 1 2 DUMMY-R2 CFG20
PM_EXTTS#1 R318 1 EXP_TXP13
1 2 2 DUMMY-R2 CFG5
EXP_TXP14 V32

1
2
10KR2J-2-GP W36
R326 1 2D5V_S0 EXP_TXP15
2 2K2R2J-2-GP CFG6 RN26
FOR DDR2 For Dothan-B
R327 1
SRN4K7J-8-GP
2 DUMMY-R2 CFG7 VCCP_GMCH_S0
1D8V_S3
71.0GMCH.0JU
1

R314 1 2 DUMMY-R2 CFG8


4
3

1
R319 R65 R66 U15
10KR2J-2-GP 10KR2J-2-GP 1KR2J-1-GP R323 1 2 DUMMY-R2 CFG9 R609
SD
1

LDDC_CLK 56R2J-4-GP
R371 DY DY R325 1 2 DUMMY-R2 CFG10
4 3
2

80D6R2F-L-GP 5 2
13 EDID_CLK

2
CPU_SEL0 R68 2 DUMMY-R2 CFG11 THERMTRIP_GMCH#
CPU_SEL1
CPU_SEL0 3,4 1
6 1 LDDC_DATA
SB
CPU_SEL1 3,4 13 EDID_DAT
2

M_RCOMPN CFG0 R320 1 2 DUMMY-R2 CFG12


1
M_RCOMPP 1
R312 1 2 DUMMY-R2 CFG13 2N7002DW-7F-GP
1

R391
80D6R2F-L-GP
R64
4K7R2J-2-GP
R67
4K7R2J-2-GP
CFG(2..1) FREQ.(MHz)
10
00
400
533
R321 1

R316 1
2 DUMMY-R2

2 DUMMY-R2
CFG14

CFG15
Strapping Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY DY 11 Reserved
SD Taipei Hsien 221, Taiwan, R.O.C.
2

R313 1 2 DUMMY-R2 CFG16


CFG[17:3] have internal pullup resistors. Title
CPU_SEL0=0(R67):133MHZ R315 1 2 DUMMY-R2 CFG17
CPU_SEL0=1(R66):100MHZ
CFG[19:18] have internal pulldown resistors GMCH (2 of 5)
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 7 of 37
A B C D E
A B C D E

SUPPORT DDRII 400


4 4

U18C U18D

11 M_A_DATA[63..0] 11 M_B_DATA[63..0]
M_A_DATA0 AG35 AK15 M_B_DATA0 AE31 AJ15
SADQ0 SA_BS0# M_A_BS0# 11,12 SBDQ0 SB_BS0# M_B_BS0# 11,12
M_A_DATA1 AH35 AK16 M_B_DATA1 AE32 AG17
SADQ1 SA_BS1# M_A_BS1# 11,12 SBDQ1 SB_BS1# M_B_BS1# 11,12
M_A_DATA2 AL35 AL21 M_B_DATA2 AG32 AG21
SADQ2 SA_BS2# M_A_BS2# 11,12 SBDQ2 SB_BS2# M_B_BS2# 11,12
M_A_DATA3 AL37 M_B_DATA3 AG36
SADQ3 M_A_SDM[7..0] 11 SBDQ3 M_B_SDM[7..0] 11
M_A_DATA4 AH36 AJ37 M_A_SDM0 M_B_DATA4 AE34 AF32 M_B_SDM0
M_A_DATA5 SADQ4 SA_DM0 M_A_SDM1 M_B_DATA5 SBDQ4 SB_DM0 M_B_SDM1
AJ35 SADQ5 SA_DM1 AP35 AE33 SBDQ5 SB_DM1 AK34
M_A_DATA6 AK37 AL29 M_A_SDM2 M_B_DATA6 AF31 AK27 M_B_SDM2
M_A_DATA7 SADQ6 SA_DM2 M_A_SDM3 M_B_DATA7 SBDQ6 SB_DM2 M_B_SDM3
AL34 SADQ7 SA_DM3 AP24 AF30 SBDQ7 SB_DM3 AK24
M_A_DATA8 AM36 AP9 M_A_SDM4 M_B_DATA8 AH33 AJ10 M_B_SDM4
M_A_DATA9 SADQ8 SA_DM4 M_A_SDM5 M_B_DATA9 SBDQ8 SB_DM4 M_B_SDM5
AN35 SADQ9 SA_DM5 AP4 AH32 SBDQ9 SB_DM5 AK5
M_A_DATA10 AP32 AJ2 M_A_SDM6 M_B_DATA10 AK31 AE7 M_B_SDM6
M_A_DATA11 SADQ10 SA_DM6 M_A_SDM7 M_B_DATA11 SBDQ10 SB_DM6 M_B_SDM7
AM31 SADQ11 SA_DM7 AD3 AG30 SBDQ11 SB_DM7 AB7
M_A_DATA12 AM34 M_B_DATA12 AG34
SADQ12 M_A_DQS[7..0] 11 SBDQ12 M_B_DQS[7..0] 11
M_A_DATA13 AM35 AK36 M_A_DQS0 M_B_DATA13 AG33 AF34 M_B_DQS0
M_A_DATA14 SADQ13 SA_DQS0 M_A_DQS1 M_B_DATA14 SBDQ13 SB_DQS0 M_B_DQS1
AL32 SADQ14 SA_DQS1 AP33 AH31 SBDQ14 SB_DQS1 AK32
M_A_DATA15 AM32 AN29 M_A_DQS2 M_B_DATA15 AJ31 AJ28 M_B_DQS2
M_A_DATA16 SADQ15 SA_DQS2 M_A_DQS3 M_B_DATA16 SBDQ15 SB_DQS2 M_B_DQS3
AN31 SADQ16 SA_DQS3 AP23 AK30 SBDQ16 SB_DQS3 AK23
M_A_DATA17 AP31 AM8 M_A_DQS4 M_B_DATA17 AJ30 AM10 M_B_DQS4
M_A_DATA18 SADQ17 SA_DQS4 M_A_DQS5 M_B_DATA18 SBDQ17 SB_DQS4 M_B_DQS5
AN28 SADQ18 SA_DQS5 AM4 AH29 SBDQ18 SB_DQS5 AH6
M_A_DATA19 AP28 AJ1 M_A_DQS6 M_B_DATA19 AH28 AF8 M_B_DQS6
M_A_DATA20 SADQ19 SA_DQS6 M_A_DQS7 M_B_DATA20 SBDQ19 SB_DQS6 M_B_DQS7
AL30 SADQ20 SA_DQS7 AE5 AK29 SBDQ20 SB_DQS7 AB4
M_A_DATA21 AM30 M_B_DATA21 AH30
SADQ21 M_A_DQS#[7..0] 11 SBDQ21 M_B_DQS#[7..0] 11
M_A_DATA22 AM28 AK35 M_A_DQS#0 M_B_DATA22 AH27 AF35 M_B_DQS#0
3 M_A_DATA23 SADQ22 SA_DQS0# M_A_DQS#1 M_B_DATA23 SBDQ22 SB_DQS0# M_B_DQS#1 3
AL28 SADQ23 SA_DQS1# AP34 AG28 SBDQ23 SB_DQS1# AK33
DDR SYSTEM MEMORY A

M_A_DATA24 AP27 AN30 M_A_DQS#2 M_B_DATA24 AF24 AK28 M_B_DQS#2


M_A_DATA25 SADQ24 SA_DQS2# M_A_DQS#3 M_B_DATA25 SBDQ24 SB_DQS2# M_B_DQS#3
AM27 AN23 AG23 AJ23

DDR SYSTEM MEMORY B


M_A_DATA26 SADQ25 SA_DQS3# M_A_DQS#4 M_B_DATA26 SBDQ25 SB_DQS3# M_B_DQS#4
AM23 SADQ26 SA_DQS4# AN8 AJ22 SBDQ26 SB_DQS4# AL10
M_A_DATA27 AM22 AM5 M_A_DQS#5 M_B_DATA27 AK22 AH7 M_B_DQS#5
M_A_DATA28 SADQ27 SA_DQS5# M_A_DQS#6 M_B_DATA28 SBDQ27 SB_DQS5# M_B_DQS#6
AL23 SADQ28 SA_DQS6# AH1 AH24 SBDQ28 SB_DQS6# AF7
M_A_DATA29 AM24 AE4 M_A_DQS#7 M_B_DATA29 AH23 AB5 M_B_DQS#7
M_A_DATA30 SADQ29 SA_DQS7# M_B_DATA30 SBDQ29 SB_DQS7#
AN22 SADQ30 M_A_A[13..0] 11,12 AG22 SBDQ30 M_B_A[13..0] 11,12
M_A_DATA31 AP22 AL17 M_A_A0 M_B_DATA31 AJ21 AH17 M_B_A0
M_A_DATA32 SADQ31 SA_MA0 M_A_A1 M_B_DATA32 SBDQ31 SB_MA0 M_B_A1
AM9 SADQ32 SA_MA1 AP17 AG10 SBDQ32 SB_MA1 AK17
M_A_DATA33 AL9 AP18 M_A_A2 M_B_DATA33 AG9 AH18 M_B_A2
M_A_DATA34 SADQ33 SA_MA2 M_A_A3 M_B_DATA34 SBDQ33 SB_MA2 M_B_A3
AL6 SADQ34 SA_MA3 AM17 AG8 SBDQ34 SB_MA3 AJ18
M_A_DATA35 AP7 AN18 M_A_A4 M_B_DATA35 AH8 AK18 M_B_A4
M_A_DATA36 SADQ35 SA_MA4 M_A_A5 M_B_DATA36 SBDQ35 SB_MA4 M_B_A5
AP11 SADQ36 SA_MA5 AM18 AH11 SBDQ36 SB_MA5 AJ19
M_A_DATA37 AP10 AL19 M_A_A6 M_B_DATA37 AH10 AK19 M_B_A6
M_A_DATA38 SADQ37 SA_MA6 M_A_A7 M_B_DATA38 SBDQ37 SB_MA6 M_B_A7
AL7 SADQ38 SA_MA7 AP20 AJ9 SBDQ38 SB_MA7 AH19
M_A_DATA39 AM7 AM19 M_A_A8 M_B_DATA39 AK9 AJ20 M_B_A8
M_A_DATA40 SADQ39 SA_MA8 M_A_A9 M_B_DATA40 SBDQ39 SB_MA8 M_B_A9
AN5 SADQ40 SA_MA9 AL20 AJ7 SBDQ40 SB_MA9 AH20
M_A_DATA41 AN6 AM16 M_A_A10 M_B_DATA41 AK6 AJ16 M_B_A10
M_A_DATA42 SADQ41 SA_MA10 M_A_A11 M_B_DATA42 SBDQ41 SB_MA10 M_B_A11
AN3 SADQ42 SA_MA11 AN20 AJ4 SBDQ42 SB_MA11 AG18
M_A_DATA43 AP3 AM20 M_A_A12 M_B_DATA43 AH5 AG20 M_B_A12
M_A_DATA44 SADQ43 SA_MA12 M_A_A13 M_B_DATA44 SBDQ43 SB_MA12 M_B_A13
AP6 SADQ44 SA_MA13 AM15 AK8 SBDQ44 SB_MA13 AG15
M_A_DATA45 AM6 M_B_DATA45 AJ8
M_A_DATA46 SADQ45 M_B_DATA46 SBDQ45
AL4 SADQ46 SA_CAS# AN15 M_A_CAS# 11,12 AJ5 SBDQ46
M_A_DATA47 AM3 AP16 M_B_DATA47 AK4 AH14
SADQ47 SA_RAS# M_A_RAS# 11,12 SBDQ47 SB_CAS# M_B_CAS# 11,12
M_A_DATA48 AK2 AF29 GMCH_TP48 TP77 TPAD30 M_B_DATA48 AG5 AK14
SADQ48 SA_RCVENIN# SBDQ48 SB_RAS# M_B_RAS# 11,12
M_A_DATA49 AK3 AF28 GMCH_TP49 TP76 TPAD30 M_B_DATA49 AG4 AF15 GMCH_TP50 TP75 TPAD30
M_A_DATA50 SADQ49 SA_RCVENOUT# M_B_DATA50 SBDQ49 SB_RCVENIN# GMCH_TP51 TP74 TPAD30
AG2 SADQ50 SA_WE# AP15 M_A_WE# 11,12 AD8 SBDQ50 SB_RCVENOUT# AF14
M_A_DATA51 AG1 M_B_DATA51 AD9 AH16
2 SADQ51 SBDQ51 SB_WE# M_B_WE# 11,12 2
M_A_DATA52 AL3 M_B_DATA52 AH4
M_A_DATA53 SADQ52 M_B_DATA53 SBDQ52
AM2 SADQ53 AG6 SBDQ53
M_A_DATA54 AH3 M_B_DATA54 AE8
M_A_DATA55 SADQ54 M_B_DATA55 SBDQ54
AG3 SADQ55 AD7 SBDQ55
M_A_DATA56 AF3 M_B_DATA56 AC5
M_A_DATA57 SADQ56 M_B_DATA57 SBDQ56
AE3 SADQ57 AB8 SBDQ57
M_A_DATA58 AD6 M_B_DATA58 AB6
M_A_DATA59 SADQ58 M_B_DATA59 SBDQ58
AC4 SADQ59 AA8 SBDQ59
M_A_DATA60 AF2 M_B_DATA60 AC8
M_A_DATA61 SADQ60 M_B_DATA61 SBDQ60
AF1 SADQ61 AC7 SBDQ61
M_A_DATA62 AD4 M_B_DATA62 AA4
M_A_DATA63 SADQ62 M_B_DATA63 SBDQ62
AD5 SADQ63 AA5 SBDQ63

71.0GMCH.0JU 71.0GMCH.0JU

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (3 of 5)
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 8 of 37
A B C D E
A B C D E

1D5V_S0 1D5V_DLVDS_S0
G11
1 2
SB

1
GAP-CLOSE-PWR 1D5V_DDRDLL_S0 1D5V_S0
C71 C70 G23
SCD1U10V2KX-LGP SC10U6D3V5MXL1GP 1 2

2
3D3V_S0 1D5V_S0

1
R55 D4 GAP-CLOSE-PWR
1 2TVDAC_PWR2 1 C310 C136
10R2J-2-GP 2D5V_S0 2D5V_ALVDS_S0 SCD1U10V2KX-LGP ST100U6D3VBM-8GP

2
SSM5818SLPT-GP G13
1

1 2
4 C268 4

1
GAP-CLOSE-PWR
2

SC10U6D3V5MXL1GP C75 C74


SCD1U10V2KX-LGP SCD01U16V2KX-LGP

2
1D5V_PCIE_S0 1D5V_S0
G36
2D5V_TVDAC_S0 2D5V_S0 1 2
G10 2D5V_S0 2D5V_TXLVDS_S0

1
1 2 G12 GAP-CLOSE-PWR
1 2 C313 C99 TC15

1
GAP-CLOSE-PWR SC10U6D3V5MXL1GP SC10U6D3V5MXL1GP ST100U6D3VBM-8GP

2
1

1
C66 C67 GAP-CLOSE-PWR
SCD1U10V2KX-LGP SC10U6D3V5MXL1GP C73 C72

2
SCD1U10V2KX-LGP SC4D7U10V5ZY

2
SB
1D5V_3GPLL_S0 1D5V_S0

1
R610
C130
SCD1U10V2KX-LGP
FOR DDR2 C126
SCD1U10V2KX-LGP
1 2
0R0603-PAD

V1.8_DDR_CAP1 2

1
1D8V_S3
Note: All VCCSM C312 C301
pins shorted Note: All VCCSM SCD1U10V2KX-LGP SC10U6D3V5MXL1GP

2
1

1
internally pins shorted

1
1D5V_DLVDS_S0 C129 TC7 internally C125
SCD1U10V2KX-LGP C321 C309 ST100U6D3VBM-8GP SCD1U10V2KX-LGP

V1.8_DDR_CAP2 2

2
C128 SC10U6D3V5MXL1GP SC10U6D3V5MXL1GP C127

2
1 2 1 2

AP29 V1.8_DDR_CAP5

V1.8_DDR_CAP4
V1.8_DDR_CAP3
2D5V_ALVDS_S0 2D5V_TXLVDS_S0 2D5V_3GBG_S0 2D5V_S0

AP8 V1.8_DDR_CAP6
3 SCD1U10V2KX-LGP SCD1U10V2KX-LGP G14 3
1 2

1
C86 GAP-CLOSE-PWR
SCD1U10V2KX-LGP

2
AM37

AM26

AM25

AM13

AM12
AG26

AG25

AG13

AG12
AH37

AD28
AD27
AC27

AN26

AH26

AN25

AH25

AN13

AH13

AN12

AH12

AD11
AC11
AP26

AK26

AE26
AP25

AK25

AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13

AK13

AE13
AP12

AK12

AE12

AB11
AB10

AP19

AE37
AF26

AF25

AF13

AF12

AF20

AF19
AF18
AL26

AL25

AL13

AL12
AJ26

AJ25

AJ13

AJ12

W37
AM1
G18

G37
AB9

AE1
D18
C18

H18

D19
H17

U37
R37
N37
E17

E18

B26
B25
A25

A35

B22
B21
A21

B28
A28
A27

Y29
Y28
Y27
F17

F18

F37
L37
J37
2D5V_CRTDAC_S0 U18E
VCCA_LVDS

VCCA_3GBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCA_TVBG
VSSA_TVBG

VCCHV0
VCCHV1
VCCHV2

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VSSA_3GBG
VCCD_TVDAC

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCDQ_TVDAC

3D3V_S0
U10

VOUT 2
3 VIN
GND 1
1

POWER
C51

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
SC10U6D3V5MXL1GP

APL5308-25AC-1GPU

VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
2
1

VCCA_MPLL
VCCA_HPLL

VCC_SYNC
C50
SCD1U10V2KX-LGP
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
2

VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
71.0GMCH.0JU
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17

AC2
AC1
B23
C35
AA1
AA2

F19
E19
G19

H20

K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
1VCCP_GMCH_CAP1 A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
1VCCP_GMCH_CAP3 V1
N1
M1
VCCP_GMCH_CAP4 G1
2 CORE_GMCH_S0 2
1

C311 C296 C297 C300 C299 C298


SCD1U10V2KX-LGP VCCP_GMCH_CAP2
2

SC10U6D3V5MXL1GP SC10U6D3V5MXL1GP SCD1U10V2KX-LGP 2D5V_CRTDAC_S0

1
SC10U6D3V5MXL1GP SCD1U10V2KX-LGP C62 C61

SCD47U10V3KX-LGP
R332 R333 SCD47U10V3KX-LGP C97

1
1D5V_HMPLL_S0 2D5V_CRTDAC 1 2 1 2 SCD22U16V3ZY-GP
2D5V_S0

2
2

2
0R0805-PAD 0R3-U-GP C84
DY

1
Supply Signal Group Icc-max L5 SCD22U16V3ZY-GP

2
1 2 1D5V_DPLLA_S0 C277 C285 C276 VCCP_GMCH_S0
1D8V_S3 VCCSM ? IND-D1UH-GP SCD1U10V2KX-LGP

2
1

SCD022U16V2KXLGP VCCP_GMCH_S0
1D5V_DDRDLL_S0 VCCA_SM 0.1A 1D5V_S0 C69 C68 SC22U10V6ZY-2GP
SC10U6D3V5MXL1GP SCD1U10V2KX-LGP R334 D22
2

1
1D5V_PCIE_S0 1 2VCCP_GMCH_D
2 1

1
/1D5V_3GPLL_S0 VCC3G/VCCA_3GPLL 1A L14 10R2J-2-GP C295 C294
1 2 1D5V_DPLLB_S0 C286 SC10U6D3V5MXL1GP SC10U6D3V5MXL1GP

2
1

2D5V_3GBG_S0 VCCA_3GBG 0.01A G32 IND-D1UH-GP SCD1U10V2KX-LGP SSM5818SLPT-GP

2
1

1D5V_DLVDS_S0 VCCD_LVDS 0.05A C278 C288 Route VSSA_CRTDAC gnd from GMCH to
GAP-CLOSE-PWR SC10U6D3V5MXL1GP SCD1U10V2KX-LGP decoupling cap ground lead and then
2

2D5V_ALVDS_S0 VCCA_LVDS 0.02A connect to the gnd plane.


L7
2D5V_TXLVDS_S0 VCCTX_LVDS 0.05A 1 2 1D5V_HPLL_S0
1
IND-D1UH-GP 1
1

VCCP_GMCH_S0 VTT 0.81A Layout Notes: VSSA_CRTDAC


C111 C113
CORE_GMCH_S0 VCC 3.9A SC10U6D3V5MXL1GP SCD1U10V2KX-LGP VCCP_GMCH_S0 Route caps within 250mil
Wistron Corporation
2

of Alviso. Route FB
2D5V_CRTDAC_S0 VCCA_CRTDAC 68mA L6 within 3" of Alviso. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2 1D5V_MPLL_S0 Taipei Hsien 221, Taiwan, R.O.C.
1

1
3D3V_TVDAC VCCA_TVDAC IND-D1UH-GP
1

/3D3V_ATVBG_S0 /VCCA_TVBG 120mA C114 C83 C82 C96 Title


C110 SCD1U10V2KX-LGP SCD1U10V2KX-LGP ST100U6D3VBM-8GP SC10U10V6ZY-U
GMCH (4 of 5)
2

1D5V_TVDAC_S0 VCCD_TVDAC 24mA SC10U6D3V5MXL1GP


2

Size Document Number Rev


2D5V_TVDAC_S0 VCCHV 0.01A A3 -2
Key-West / Kinney
Date: Thursday, December 22, 2005 Sheet 9 of 37
A B C D E
1
2
3
4

U18F
B36 VSSALVDS
VSS267 AL24
VSS266 AN24
Y1 A26
CORE_GMCH_S0

VSS271 VSS265

A
A

D2 E26

71.0GMCH.0JU
VSS270 VSS264
G2 VSS269 VSS263 G26
J2 VSS268 VSS262 J26
L2 B27

U18H
VSS260 VSS261
P2 VSS259 VSS129 E27
T2 VSS258 VSS128 G27
V2 VSS257 VSS127 W27
VCCSM_NCTF31 AB12 AD2 VSS256 VSS126 AA27
VCCSM_NCTF30 AC12 AE2 VSS255 VSS125 AB27
AD12 AH2 AF27
1
1
1

VCCSM_NCTF29 VSS254 VSS124

1D8V_S3
VCCSM_NCTF28 AB13 AL2 VSS253 VSS123 AG27
AC13 AN2 AJ27

71.0GMCH.0JU
VCCSM_NCTF27 VSS252 VSS122
AD13 A3 AL27
G19
G20
G21

VCCSM_NCTF26 VSS251 VSS121


AC14 C3 AN27
2
2
2

VCCSM_NCTF25 VSS250 VSS120


VCCSM_NCTF24 AD14 AA3 VSS249 VSS119 E28
VCCSM_NCTF23 AC15 AB3 VSS248 VSS118 W28
VCCSM_NCTF22 AD15 AC3 VSS247 VSS117 AA28
VCCSM_NCTF21 AC16 AJ3 VSS246 VSS116 AB28
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR

VCCSM_NCTF20 AD16 C4 VSS245 VSS115 AC28


VCCSM_NCTF19 AC17 H4 VSS244 VSS114 A29
VCCSM_NCTF18 AD17 L4 VSS243 VSS113 D29
AC18 P4 E29

VCCP_GMCH_S0
VCCSM_NCTF17 VSS242 VSS112
VCCSM_NCTF16 AD18 U4 VSS241 VSS111 F29
VCCSM_NCTF15 AC19 Y4 VSS240 VSS110 G29
VCCSM_NCTF14 AD19 AF4 VSS239 VSS109 H29
VCCSM_NCTF13 AC20 AN4 VSS238 VSS108 L29
VCCSM_NCTF12 AD20 E5 VSS237 VSS107 P29
L12 AC21 W5 U29

FOR DDR2
1D05V_S0

VTT_NCTF17 VCCSM_NCTF11 VSS236 VSS106


M12 VTT_NCTF16 VCCSM_NCTF10 AD21 AL5 VSS235 VSS105 V29
N12 VTT_NCTF15 VCCSM_NCTF9 AC22 AP5 VSS234 VSS104 W29
P12 VTT_NCTF14 VCCSM_NCTF8 AD22 B6 VSS233 VSS103 AA29
R12 VTT_NCTF13 VCCSM_NCTF7 AC23 J6 VSS232 VSS102 AD29
T12 AD23 L6 AG29

B
B

VTT_NCTF12 VCCSM_NCTF6 VSS231 VSS101


U12 VTT_NCTF11 VCCSM_NCTF5 AC24 P6 VSS230 VSS100 AJ29
V12 VTT_NCTF10 VCCSM_NCTF4 AD24 T6 VSS229 VSS99 AM29
W12 VTT_NCTF9 VCCSM_NCTF3 AC25 AA6 VSS228 VSS98 C30
L13 VTT_NCTF8 VCCSM_NCTF2 AD25 AC6 VSS227 VSS97 Y30
M13 VTT_NCTF7 VCCSM_NCTF1 AC26 AE6 VSS226 VSS96 AA30
N13 AD26 AJ6 AB30
VCCP_GMCH_S0

VTT_NCTF6 VCCSM_NCTF0 VSS225 VSS95


P13 VTT_NCTF5 G7 VSS224 VSS94 AC30
R13 VTT_NCTF4 VCC_NCTF78 L17 V7 VSS223 VSS93 AE30
T13 VTT_NCTF3 VCC_NCTF77 M17 AA7 VSS222 VSS92 AP30
U13 VTT_NCTF2 VCC_NCTF76 N17 AG7 VSS221 VSS91 D31
V13 VTT_NCTF1 VCC_NCTF75 P17 AK7 VSS220 VSS90 E31
W13 VTT_NCTF0 VCC_NCTF74 T17 AN7 VSS219 VSS89 F31
VCC_NCTF73 U17 C8 VSS218 VSS88 G31
VCC_NCTF72 V17 E8 VSS217 VSS87 H31
VCC_NCTF71 W17 L8 VSS216 VSS86 J31
L18 P8 K31
1
1
1

VCC_NCTF70 VSS215 VSS85


VCC_NTTF69 M18 Y8 VSS214 VSS84 L31
Y12 VSS_NCTF68 VCC_NCTF68 N18 AL8 VSS213 VSS83 M31
AA12 P18 A9 N31
G17
G15
G16

VSS_NCTF67 VCC_NCTF67 VSS212 VSS82


Y13 R18 H9 P31
2
2
2

VSS_NCTF66 VCC_NCTF66 VSS211 VSS81


AA13 VSS_NCTF65 VCC_NCTF65 Y18 K9 VSS210 VSS80 R31
L14 VSS_NCTF64 VCC_NCTF64 L19 T9 VSS209 VSS79 T31
M14 VSS_NCTF63 VCC_NCTF63 M19 V9 VSS208 VSS78 U31
N14 VSS_NCTF62 VCC_NCTF62 N19 AA9 VSS207 VSS77 V31
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR

P14 VSS_NCTF61 VCC_NCTF61 P19 AC9 VSS206 VSS76 W31


R14 VSS_NCTF60 VCC_NCTF60 R19 AE9 VSS205 VSS75 AD31
T14 VSS_NCTF59 VCC_NCTF59 Y19 AH9 VSS204 VSS74 AG31
U14 VSS_NCTF58 VCC_NCTF58 L20 AN9 VSS203 VSS73 AL31
V14 M20 D10 A32
VSS

VSS_NCTF57 VCC_NCTF57 VSS202 VSS72


W14 VSS_NCTF56 VCC_NCTF56 N20 L10 VSS201 VSS71 C32
Y14 VSS_NCTF55 VCC_NCTF55 P20 Y10 VSS200 VSS70 Y32
AA14 VSS_NCTF54 VCC_NCTF54 R20 AA10 VSS199 VSS69 AA32

C
C

AB14 Y20 F11 AB32


NCTF

VSS_NCTF53 VCC_NCTF53 VSS198 VSS68


L15 L21 H11 AC32
1D05V_S0

VSS_NCTF52 VCC_NCTF52 VSS197 VSS67


M15 VSS_NCTF51 VCC_NCTF51 M21 Y11 VSS196 VSS66 AD32
N15 VSS_NCTF50 VCC_NCTF50 N21 AA11 VSS195 VSS65 AJ32
P15 VSS_NCTF49 VCC_NCTF49 P21 AF11 VSS194 VSS64 AN32
R15 VSS_NCTF48 VCC_NCTF48 T21 AG11 VSS193 VSS63 D33
T15 VSS_NCTF47 VCC_NCTF47 U21 AJ11 VSS192 VSS62 E33
U15 VSS_NCTF46 VCC_NCTF46 V21 AL11 VSS191 VSS61 F33
V15 VSS_NCTF45 VCC_NCTF45 W21 AN11 VSS190 VSS60 G33
W15 VSS_NCTF44 VCC_NCTF44 L22 B12 VSS189 VSS59 H33
Y15 VSS_NCTF43 VCC_NCTF43 M22 D12 VSS188 VSS58 J33
AA15 VSS_NCTF42 VCC_NCTF42 N22 J12 VSS187 VSS57 K33
AB15 VSS_NCTF41 VCC_NCTF41 P22 A14 VSS186 VSS56 L33
L16 VSS_NCTF40 VCC_NCTF40 R22 B14 VSS185 VSS55 M33
M16 VSS_NCTF39 VCC_NCTF39 T22 F14 VSS184 VSS54 N33
N16 VSS_NCTF38 VCC_NCTF38 U22 J14 VSS183 VSS53 P33
P16 VSS_NCTF37 VCC_NCTF37 V22 K14 VSS182 VSS52 R33
R16 VSS_NCTF36 VCC_NCTF36 W22 AG14 VSS181 VSS51 T33
T16 VSS_NCTF35 VCC_NCTF35 L23 AJ14 VSS180 VSS50 U33
U16 VSS_NCTF34 VCC_NCTF34 M23 AL14 VSS179 VSS49 V33
V16 VSS_NCTF33 VCC_NCTF33 N23 AN14 VSS178 VSS48 W33
W16 VSS_NCTF32 VCC_NCTF32 P23 C15 VSS177 VSS47 AD33
Y16 VSS_NCTF31 VCC_NCTF31 R23 K15 VSS176 VSS46 AF33
AA16 VSS_NCTF30 VCC_NCTF30 T23 A16 VSS175 VSS45 AL33
AB16 VSS_NCTF29 VCC_NCTF29 U23 D16 VSS174 VSS44 C34
R17 VSS_NCTF28 VCC_NCTF28 V23 H16 VSS173 VSS43 AA34
Y17 VSS_NCTF27 VCC_NCTF27 W23 K16 VSS172 VSS42 AB34
AA17 VSS_NCTF26 VCC_NCTF26 L24 AL16 VSS171 VSS41 AC34
AB17 VSS_NCTF25 VCC_NCTF25 M24 C17 VSS170 VSS40 AD34
AA18 VSS_NCTF24 VCC_NCTF24 N24 G17 VSS169 VSS39 AH34
AB18 VSS_NCTF23 VCC_NCTF23 P24 AF17 VSS168 VSS38 AN34
AA19 VSS_NCTF22 VCC_NCTF22 R24 AJ17 VSS167 VSS37 B35
AB19 VSS_NCTF21 VCC_NCTF21 T24 AN17 VSS166 VSS36 D35
D
D

AA20 VSS_NCTF20 VCC_NCTF20 U24 A18 VSS165 VSS35 E35


AB20 VSS_NCTF19 VCC_NCTF19 V24 B18 VSS164 VSS34 F35
R21 VSS_NCTF18 VCC_NCTF18 W24 U18 VSS163 VSS33 G35
Y21 VSS_NCTF17 VCC_NCTF17 L25 AL18 VSS162 VSS32 H35
AA21 VSS_NCTF16 VCC_NCTF16 M25 C19 VSS161 VSS31 J35
AB21 VSS_NCTF15 VCC_NCTF15 N25 H19 VSS160 VSS30 K35
Y22 VSS_NCTF14 VCC_NCTF14 P25 J19 VSS159 VSS29 L35
AA22 VSS_NCTF13 VCC_NCTF13 R25 T19 VSS158 VSS28 M35
AB22 VSS_NCTF12 VCC_NCTF12 T25 W19 VSS157 VSS27 N35
Y23 VSS_NCTF11 VCC_NCTF11 U25 AG19 VSS156 VSS26 P35
AA23 VSS_NCTF10 VCC_NCTF10 V25 AN19 VSS155 VSS25 R35
AB23 VSS_NCTF9 VCC_NCTF9 W25 A20 VSS154 VSS24 T35
Y24 VSS_NCTF8 VCC_NCTF8 L26 D20 VSS153 VSS23 U35
Title

Size
A3

AA24 VSS_NCTF7 VCC_NCTF7 M26 E20 VSS152 VSS22 V35


AB24 VSS_NCTF6 VCC_NCTF6 N26 F20 VSS151 VSS21 W35
Y25 VSS_NCTF5 VCC_NCTF5 P26 G20 VSS150 VSS20 Y35
AA25 VSS_NCTF4 VCC_NCTF4 R26 V20 VSS149 VSS19 AE35
AB25 VSS_NCTF3 VCC_NCTF3 T26 AK20 VSS148 VSS18 C36
Y26 VSS_NCTF2 VCC_NCTF2 U26 C21 VSS147 VSS17 AA36
AA26 VSS_NCTF1 VCC_NCTF1 V26 F21 VSS146 VSS16 AB36
AB26 VSS_NCTF0 VCC_NCTF0 W26 AF21 VSS145 VSS15 AC36
AN21 VSS144 VSS14 AD36
A22 AE36
Document Number

VSS143 VSS13
D22 VSS142 VSS12 AF36
E22 VSS141 VSS11 AJ36
Date: Friday, December 23, 2005

J22 VSS140 VSS10 AL36


AH22 VSS139 VSS9 AN36
AL22 E37
CORE_GMCH_S0

VSS138 VSS8
H23 VSS137 VSS7 H37
2,4,5,6,7,9,15,17,19,32,37

AF23 VSS136 VSS6 K37


B24 VSS135 VSS5 M37
D24 VSS134 VSS4 P37
F24 T37
E
E

VSS133 VSS3
7,9,11,12,16,34,35,36,37

J24 V37
Sheet

VSS132 VSS2
AG24 VSS131 VSS1 Y37
AJ24 AG37
GMCH (5 of 5)

VSS130 VSS0
10
34,35,36,37 1D05V_S0
VCCP_GMCH_S0

Key-West / Kinney
6,9,37 CORE_GMCH_S0

1D8V_S3

of
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

37
Rev
-2
Wistron Corporation
1D8V_S3
VCCP_GMCH_S0

1D05V_S0
CORE_GMCH_S0

1
2
3
4
8,12 M_B_A[13..0] DM2 8,12 M_A_A[13..0] DM1
M_B_A0 102 108 M_A_A0 102 108
A0 /RAS M_B_RAS# 8,12 A0 /RAS M_A_RAS# 8,12
M_B_A1 101 109 M_A_A1 101 109
A1 /WE M_B_WE# 8,12 A1 /WE M_A_WE# 8,12
M_B_A2 100 113 M_A_A2 100 113
A2 /CAS M_B_CAS# 8,12 A2 /CAS M_A_CAS# 8,12
M_B_A3 99 M_A_A3 99
M_B_A4 A3 M_A_A4 A3
98 A4 /CS0 110 M_CS2_R# 7,12 98 A4 /CS0 110 M_CS0_R# 7,12
M_B_A5 97 115 M_A_A5 97 115
A5 /CS1 M_CS3_R# 7,12 A5 /CS1 M_CS1_R# 7,12
M_B_A6 94 M_A_A6 94
M_B_A7 A6 M_A_A7 A6
92 A7 CKE0 79 M_CKE2_R# 7,12 92 A7 CKE0 79 M_CKE0_R# 7,12
M_B_A8 93 80 M_A_A8 93 80
A8 CKE1 M_CKE3_R# 7,12 A8 CKE1 M_CKE1_R# 7,12
M_B_A9 91 M_A_A9 91
M_B_A10 A9 M_A_A10 A9
105 A10/AP CK0 30 CLK_DDR3 7 105 A10/AP CK0 30 CLK_DDR0 7
M_B_A11 90 32 M_A_A11 90 32
A11 /CK0 CLK_DDR3# 7 A11 /CK0 CLK_DDR0# 7
M_B_A12 89 M_A_A12 89
M_B_A13 A12 M_A_A13 A12
116 A13 CK1 164 CLK_DDR4 7 116 A13 CK1 164 CLK_DDR1 7
86 A14 /CK1 166 CLK_DDR4# 7 86 A14 /CK1 166 CLK_DDR1# 7
84 A15 M_B_SDM[7..0] 8 84 A15 M_A_SDM[7..0] 8
85 10 M_B_SDM0 85 10 M_A_SDM0 1D8V_S3
8,12 M_B_BS2# A16/BA2 DM0 8,12 M_A_BS2# A16/BA2 DM0
26 M_B_SDM1 26 M_A_SDM1
DM1 M_B_SDM2 DM1 M_A_SDM2
8,12 M_B_BS0# 107 BA0 DM2 52 8,12 M_A_BS0# 107 BA0 DM2 52 7,9,10,12,16,34,35,36,37 1D8V_S3
106 67 M_B_SDM3 106 67 M_A_SDM3
8,12 M_B_BS1# BA1 DM3 8,12 M_A_BS1# BA1 DM3
130 M_B_SDM4 130 M_A_SDM4 DDR_VREF_S3
M_B_DATA0 DM4 M_B_SDM5 M_A_DATA0 DM4 M_A_SDM5
5 DQ0 DM5 147 5 DQ0 DM5 147
M_B_DATA1 7 170 M_B_SDM6 M_A_DATA1 7 170 M_A_SDM6
8 M_B_DATA[63..0] DQ1 DM6 8 M_A_DATA[63..0] DQ1 DM6 7,35 DDR_VREF_S3
M_B_DATA2 17 185 M_B_SDM7 M_A_DATA2 17 185 M_A_SDM7
M_B_DATA3 DQ2 DM7 M_A_DATA3 DQ2 DM7
19 DQ3 19 DQ3
M_B_DATA4 4 195 M_A_DATA4 4 195 SMBD_ICH 3D3V_S0
DQ4 SDA SMBD_ICH 3,18 DQ4 SDA
M_B_DATA5 6 197 M_A_DATA5 6 197 SMBC_ICH
DQ5 SCL SMBC_ICH 3,18 DQ5 SCL
M_B_DATA6 14 M_A_DATA6 14
DQ6 DQ6 3,4,5,7,9,13,15,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0
M_B_DATA7 16 199 M_A_DATA7 16 199
DQ7 VDDSPD 3D3V_S0 DQ7 VDDSPD 3D3V_S0
M_B_DATA8 23 M_A_DATA8 23
M_B_DATA9 DQ8 DQ8
25 DQ9 SA0 198 R139 1 2 0R0402-PAD M_A_DATA9 25 DQ9 SA0 198 R116 1 2 0R0402-PAD SB

1
M_B_DATA10 35 200 R138 1 2 0R0402-PAD M_A_DATA10 35 200 R115 1 2 0R0402-PAD
DQ10 SA1 3D3V_S0 DQ10 SA1
M_B_DATA11 37 DQ11 SB M_A_DATA11 37 DQ11
C163 C164

1
M_B_DATA12 20 50 M_A_DATA12 20 50 SCD1U16V SC2D2U6D3V3MXLGP
DQ12 NC#50 DQ12 NC#50

2
M_B_DATA13 22 69 C359 C360 M_A_DATA13 22 69
M_B_DATA14 DQ13 NC#69 SCD1U16V SC2D2U6D3V3MXLGP M_A_DATA14 DQ13 NC#69
36 DQ14 NC#83 83 36 DQ14 NC#83 83

2
M_B_DATA15 38 120 M_A_DATA15 38 120
M_B_DATA16 DQ15 NC#120 M_A_DATA16 DQ15 NC#120
43 DQ16 NC#163/TEST 163 43 DQ16 NC#163/TEST 163
M_B_DATA17 45 M_A_DATA17 45
M_B_DATA18 DQ17 M_A_DATA18 DQ17
55 DQ18 55 DQ18
M_B_DATA19 57 81 M_A_DATA19 57 81
M_B_DATA20 DQ19 VDD M_A_DATA20 DQ19 VDD
44 DQ20 VDD 82 44 DQ20 VDD 82
M_B_DATA21 46 87 M_A_DATA21 46 87
DQ21 VDD DQ21 VDD

SUPPORT DDRII 400


M_B_DATA22 56 88 M_A_DATA22 56 88
M_B_DATA23 DQ22 VDD M_A_DATA23 DQ22 VDD
58 95 58 95

NORMAL TYPE
M_B_DATA24 DQ23 VDD M_A_DATA24 DQ23 VDD
61 DQ24 VDD 96 61 DQ24 VDD 96
M_B_DATA25 63 103 M_A_DATA25 63 103
M_B_DATA26 DQ25 VDD M_A_DATA26 DQ25 VDD
73 DQ26 VDD 104 73 DQ26 VDD 104
M_B_DATA27 75 111 M_A_DATA27 75 111
M_B_DATA28 DQ27 VDD M_A_DATA28 DQ27 VDD
62 112 62 112
NORMAL TYPE

M_B_DATA29 DQ28 VDD M_A_DATA29 DQ28 VDD


64 DQ29 VDD 117 64 DQ29 VDD 117
M_B_DATA30 74 118 M_A_DATA30 74 118
DQ30 VDD 1D8V_S3 DQ30 VDD 1D8V_S3
M_B_DATA31 76 M_A_DATA31 76
M_B_DATA32 DQ31 M_A_DATA32 DQ31
123 DQ32 VSS 3 123 DQ32 VSS 3
M_B_DATA33 125 8 M_A_DATA33 125 8
M_B_DATA34 DQ33 VSS M_A_DATA34 DQ33 VSS
135 DQ34 VSS 9 135 DQ34 VSS 9
M_B_DATA35 137 12 M_A_DATA35 137 12
M_B_DATA36 DQ35 VSS M_A_DATA36 DQ35 VSS
124 DQ36 VSS 15 124 DQ36 VSS 15
M_B_DATA37 126 18 M_A_DATA37 126 18
M_B_DATA38 DQ37 VSS M_A_DATA38 DQ37 VSS
134 DQ38 VSS 21 134 DQ38 VSS 21
M_B_DATA39 136 24 M_A_DATA39 136 24
M_B_DATA40 DQ39 VSS M_A_DATA40 DQ39 VSS
141 DQ40 VSS 27 141 DQ40 VSS 27
M_B_DATA41 143 28 M_A_DATA41 143 28
M_B_DATA42 DQ41 VSS M_A_DATA42 DQ41 VSS
151 DQ42 VSS 33 151 DQ42 VSS 33
M_B_DATA43 153 34 M_A_DATA43 153 34
M_B_DATA44 DQ43 VSS M_A_DATA44 DQ43 VSS
140 DQ44 VSS 39 140 DQ44 VSS 39
M_B_DATA45 142 40 M_A_DATA45 142 40
M_B_DATA46 DQ45 VSS M_A_DATA46 DQ45 VSS
152 DQ46 VSS 41 152 DQ46 VSS 41
M_B_DATA47 154 42 M_A_DATA47 154 42
M_B_DATA48 DQ47 VSS M_A_DATA48 DQ47 VSS
157 DQ48 VSS 47 157 DQ48 VSS 47
M_B_DATA49 159 48 M_A_DATA49 159 48
M_B_DATA50 DQ49 VSS M_A_DATA50 DQ49 VSS
173 DQ50 VSS 53 173 DQ50 VSS 53
M_B_DATA51 175 54 M_A_DATA51 175 54
M_B_DATA52 DQ51 VSS M_A_DATA52 DQ51 VSS
158 DQ52 VSS 59 158 DQ52 VSS 59
M_B_DATA53 160 60 M_A_DATA53 160 60
M_B_DATA54 DQ53 VSS M_A_DATA54 DQ53 VSS
174 DQ54 VSS 65 174 DQ54 VSS 65
M_B_DATA55 176 66 M_A_DATA55 176 66
M_B_DATA56 DQ55 VSS M_A_DATA56 DQ55 VSS
179 DQ56 VSS 71 179 DQ56 VSS 71
M_B_DATA57 181 72 M_A_DATA57 181 72
M_B_DATA58 DQ57 VSS M_A_DATA58 DQ57 VSS
189 DQ58 VSS 77 189 DQ58 VSS 77
M_B_DATA59 191 78 M_A_DATA59 191 78
M_B_DATA60 DQ59 VSS M_A_DATA60 DQ59 VSS
180 DQ60 VSS 121 180 DQ60 VSS 121
M_B_DATA61 182 122 M_A_DATA61 182 122
DQ61 VSS DQ61 VSS

Low5.2 mm
M_B_DATA62 192 127 M_A_DATA62 192 127
M_B_DATA63 DQ62 VSS M_A_DATA63 DQ62 VSS
194 128 194 128
High 9.2mm

DQ63 VSS DQ63 VSS


VSS 132 VSS 132
M_B_DQS#0 11 133 M_A_DQS#0 11 133
M_B_DQS#1 /DQS0 VSS M_A_DQS#1 /DQS0 VSS
8 M_B_DQS#[7..0] 29 /DQS1 VSS 138 8 M_A_DQS#[7..0] 29 /DQS1 VSS 138
M_B_DQS#2 49 139 M_A_DQS#2 49 139
M_B_DQS#3 /DQS2 VSS M_A_DQS#3 /DQS2 VSS
68 /DQS3 VSS 144 68 /DQS3 VSS 144
M_B_DQS#4 129 145 M_A_DQS#4 129 145
M_B_DQS#5 /DQS4 VSS M_A_DQS#5 /DQS4 VSS
146 /DQS5 VSS 149 146 /DQS5 VSS 149
M_B_DQS#6 167 150 M_A_DQS#6 167 150
M_B_DQS#7 /DQS6 VSS M_A_DQS#7 /DQS6 VSS
186 /DQS7 VSS 155 186 /DQS7 VSS 155
VSS 156 VSS 156
M_B_DQS0 13 161 M_A_DQS0 13 161
M_B_DQS1 DQS0 VSS M_A_DQS1 DQS0 VSS
8 M_B_DQS[7..0] 31 DQS1 VSS 162 8 M_A_DQS[7..0] 31 DQS1 VSS 162
M_B_DQS2 51 165 M_A_DQS2 51 165
M_B_DQS3 DQS2 VSS M_A_DQS3 DQS2 VSS
70 DQS3 VSS 168 70 DQS3 VSS 168
M_B_DQS4 131 171 M_A_DQS4 131 171
M_B_DQS5 DQS4 VSS M_A_DQS5 DQS4 VSS
148 DQS5 VSS 172 148 DQS5 VSS 172
M_B_DQS6 169 177 M_A_DQS6 169 177
M_B_DQS7 DQS6 VSS M_A_DQS7 DQS6 VSS
188 DQS7 VSS 178 188 DQS7 VSS 178
VSS 183 VSS 183
7,12 M_ODT2 114 ODT0 VSS 184 7,12 M_ODT0 114 ODT0 VSS 184
7,12 M_ODT3 119 ODT1 VSS 187 7,12 M_ODT1 119 ODT1 VSS 187

DDR_VREF_S3 1 VREF
VSS
VSS
190
193 DDR_VREF_S3 1 VREF
VSS
VSS
190
193 Wistron Corporation
2 196 2 196 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS VSS VSS
1

Taipei Hsien 221, Taiwan, R.O.C.


C362 C361 202 201 C170 C169 202 201
SCD1U16V SC2D2U6D3V3MXLGP GND GND SCD1U16V SC2D2U6D3V3MXLGP GND GND Title
2

DDR2-200P-4-GP
62.10017.A51
DDR2-200P-5-GP
62.10017.A41 DDR Socket
Hi 9.2 mm 1st source:62.10017.A51 1st source:62.10017.A41 Size
Custom
Document Number Rev
Key-West / Kinney -2
2nd source:62.10017.A61 2nd source:62.10017.B01 Date: Friday, December 23, 2005 Sheet 11 of 37
0D9V_S0
Address / Command/Control
1 4 RN32 1 2 C198
8,11 M_A_A1 SCD1U16V
8,11 M_A_A0 2 3
SRN56J-4-GP
1 4 RN34 1 2 C197
8,11 M_A_A3 SCD1U16V
8,11 M_A_A10 2 3
SRN56J-4-GP

1 4 RN5 1 2 C196 0D9V_S0


8,11 M_B_CAS# SCD1U16V
8,11 M_B_RAS# 2 3
PLACE CAPS BETWEEN AND NEAR DDR SKTS SRN56J-4-GP
35,36 0D9V_S0
1 4 RN7 1 2 C195
1D8V_S3 PLACE EACH 0.1UF CAP CLOSE TO POWER 8,11 M_B_WE# SCD1U16V
7,11 M_CS3_R# 2 3
PIN SRN56J-4-GP 1D8V_S3

1 4 RN35 1 2 C191
8,11 M_A_A7 SCD1U16V 7,9,10,11,16,34,35,36,37 1D8V_S3
8,11 M_A_A6 2 3
1

1
SRN56J-4-GP
C152 C150 C151 C149 C183 C178 C168 C166 1 4 RN33 1 2 C194
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V 8,11 M_A_A4 SCD1U16V
8,11 M_A_A2 2 3
2

2
SRN56J-4-GP

1 4 RN8 1 2 C193
8,11 M_B_BS0# SCD1U16V
8,11 M_B_A2 2 3
SRN56J-4-GP
1 4 RN9 1 2 C192
8,11 M_B_A10
1

1
2 3 SCD1U16V
8,11 M_B_A4
C167 C179 C180 C165 C184 C182 C181 C177 SRN56J-4-GP
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2

2
1 4 RN13 1 2 C199
7,11 M_CKE2_R# SCD1U16V
8,11 M_B_A5 2 3
SRN56J-4-GP
1 4 RN14 1 2 C200
8,11 M_B_A11 SCD1U16V
8,11 M_B_A6 2 3
SRN56J-4-GP
1

1
C176 C153 C185 EC30 EC38 EC23 EC24 0D9V_S0
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
SC10U6D3V5MXL1GP

SC10U6D3V5MXL1GP
2

2
1 4 RN30 1 2 C333
8,11 M_A_BS1# SCD1U16V
8,11 M_A_RAS# 2 3
SRN56J-4-GP
1 4 RN28 1 2 C334
7,11 M_CS0_R# SCD1U16V
8,11 M_A_A13 2 3
SRN56J-4-GP

1 4 RN12 1 2 C335
8,11 M_B_BS2# SCD1U16V
8,11 M_B_A12 2 3
SRN56J-4-GP
1 4 RN15 1 2 C336
7,11 M_CKE3_R# SCD1U16V
8,11 M_B_A7 2 3
SRN56J-4-GP

1 4 RN4 1 2 C337
7,11 M_CS2_R# SCD1U16V
8,11 M_B_A13 2 3
SRN56J-4-GP
1 4 RN6 1 2 C338
8,11 M_B_A0 SCD1U16V
8,11 M_B_BS1# 2 3
SRN56J-4-GP

1 4 RN31 1 2 C339
8,11 M_A_WE# SCD1U16V
8,11 M_A_BS0# 2 3
SRN56J-4-GP
1 4 RN29 1 2 C340
8,11 M_A_CAS# SCD1U16V
7,11 M_CS1_R# 2 3
SRN56J-4-GP

1 4 RN10 1 2 C201
8,11 M_B_A3 SCD1U16V
8,11 M_B_A1 2 3
SRN56J-4-GP
1 4 RN11 1 2 C202
8,11 M_B_A9 SCD1U16V
8,11 M_B_A8 2 3
SRN56J-4-GP

1 4 RN39 1 2 C330
7,11 M_CKE0_R# SCD1U16V
8,11 M_A_BS2# 2 3
SRN56J-4-GP
1 4 RN38 1 2 C331
8,11 M_A_A12 SCD1U16V
8,11 M_A_A9 2 3
SRN56J-4-GP

1 4 RN36 1 2 C332
7,11 M_CKE1_R# SCD1U16V
8,11 M_A_A11 2 3
SRN56J-4-GP
1 4 RN37 1 2 C329
8,11 M_A_A8 SCD1U16V
8,11 M_A_A5 2 3
SRN56J-4-GP

0D9V_S0

R402 1 2 56R2J-4-GP
7,11 M_ODT0
R401 1 2 56R2J-4-GP
7,11 M_ODT1
R140 1 2 56R2J-4-GP
7,11 M_ODT2
Wistron Corporation
R141 1 2 56R2J-4-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7,11 M_ODT3
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR Serial/Terminator Resistor


Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 12 of 37
A B C D E

3D3V_S0 3D3V_S0

INVERTER/LCD U6B 3D3V_LCD_S0

14
3D3V_LCD_S0

1
TSLCX08MTCX-GP
4 R628 C648 U80
7 BL_ON D
6 BL_ON_1 1 2 LCD_BL_ON SCD1U10V2KX-LGP 1 D 6

2
5 2 D D 5
27 FPBACK

1
CN3 0R2J-GP 3 G S 4
BC13 BC12 41 43 +15V

1
SCD1U16V SC10U10V6ZY-U R629 SI3456BDV-T1-GP

1
R599 R600 C649
1 MH1 7,27 BIA_PWM 1
DY 2

1
150R3J-L-GP 150R3J-L-GP SC10U6D3V5MXL1GP
4 2 0R2J-GP R598 4

2
3 45 200KR2J-L1-GP
7 TXAOUT0-

2
LCD_S0_R
7 TXAOUT0+ 4
5
SD

2
7 TXAOUT1- 6 SC D
caps place near LCD connector
7 TXAOUT1+ 7 SD

1
8

3
9 C650
7 TXAOUT2-
10 SCD1U50V3KX-GP
7 TXAOUT2+

2
11 Q66
12 1 2N7002-8-GP
7 TXACLK-
13 5V_S5 G
7 TXACLK+
14

2
7 TXBOUT0- 15
16 S
7 TXBOUT0+

1
17
18 R601 D
7 TXBOUT1- 10KR2J-2-GP
7 TXBOUT1+ 19

3
20
7 TXBOUT2- 21

2
22 Q67 Q68
7 TXBOUT2+
23 3 OUT 1 2N7002-8-GP
24 2 R1 G
7 TXBCLK- 7,27 LCDVDD_ON
7 TXBCLK+ 25 IN 1 GND

2
1
26 R2
SB SC 7 EDID_CLK 27
28 DDTC144EUA-7F-GP
S
7 EDID_DAT
D43 29 R605
16 LAMP_STAT 2 1 CH751H-40PT LAMP_STAT_LCD 30 DUMMY-R2 LCDVDD_ON#
3 31 3
3D3V_S0

2
27,30 BT_SCL 32
LCD_BL_ON 33
27,30 BT_SDA 34
27 LCD_TST
INV_PWR_SRC
35
36 Q26 R241
SB
37 3 OUT PWR_LED#_1 1 2 PWR_LED#
SMB ADDRESS 58h 38 46 2 R1 470R2J-2-GP
5V_S5 27 BREATH_PWM

1
39 IN 1 GND
40 MH2 R2 C252
SC2200P50V2KXLGP

2
1

EC59 EC58 C270 BC47 C269 BC48 BC50 42 44 DDTC144EUA-7F-GP


SC1KP50V2KX-LGP

SC1KP50V2KX-LGP

SC1KP50V2KX-LGP

IPEX-CON40-2-GP Q29 R245 5V_S3


SCD1U16V

SCD1U16V
SC47P50V2JN

SC47P50V2JN
2

20.F0763.040 3 OUT 802_ACT_LED#_1 1 2 802_ACT_LED# LED4


2 R1 470R2J-2-GP PWR_LED# 2 1
25 LAN_R_ON

1
SC IN 1 GND
R2 C253 LED-G-62-GP
SC2200P50V2KXLGP 5V_S0

2
DDTC144EUA-7F-GP
SC SC SB 802_ACT_LED# 2
LED7
1
LED-G-62-GP
3D3V_S5
Q28
SB LED5
INV_PWR_SRC HDD_LED#_1
R2
IN 1 1 2
U75 R244
GND
27 BAT_LED1# 2
DCBATOUT
1

6 D D 1
R1
3 BAT_LED1 1 2 BAT_LED1#_1 LED-G-62-GP
5 D D 2 C602 C603 OUT 470R2J-2-GP
2 DTA114YKA-1-GP 2
SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

4 S G 3 LED2
2

3D3V_S5 CAPS_LED#_1
SB A K
1

SI3457BDV-T1-1GP Q27
1

R543
R2
IN 1 LED-G-107-GP
100KR2J-1-GP C604 R243
GND
27 BAT_LED2# 2
SC1U50V5ZY-1-GP BAT_LED2 BAT_LED2#_1
SD
R1
3 1 2 LED1
2

470R2J-2-GP NUM_LED#_1
SD
OUT
A K
2

INV_PWR_SRC_R1 DTA114YKA-1-GP
LED-G-107-GP
1

5V_S0
R544 Q25 LED3
47KR2J-2-GP E SCRLK_LED#_1 A K
R242
C HDD_LED 1 2 HDD_LED#_1 LED-G-107-GP
2

R2 470R2J-2-GP
R1
20 HDD_LED# B -1 SB
INV_PWR_SRC_R2

CHDTA114EKPT-GP
SD
3D3V_S0 LED6
Q6 BAT_LED1#_1 1 3
R2
IN 1
R42
GND
27 CAPS_LED# 2
CAPS_LED CAPS_LED#_1 BAT_LED2#_1
R1
3 1 2 2 4
D OUT
DTA114YKA-1-GP 220R2F-GP LED-GR-6-GP
3

Q56 3D3V_S0
2N7002-8-GP Q5
SD
1 R2 1
27,34,36 RUN_ON 1 IN 1
R41
GND
G 27 NUM_LED# 2
NUM_LED NUM_LED#_1
R1
3 1 2
Wistron Corporation
2

OUT
S DTA114YKA-1-GP 220R2F-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
3D3V_S0
Q7 Title
SB
R2

27 SCRLK_LED#
IN
2
1 GND
R43 Inverter/LCD
SCRLK_LED 1 SCRLK_LED#_1 Size Document Number Rev
R1
3 2
A3 -2
Key-West / Kinney
OUT
DTA114YKA-1-GP 220R2F-GP
Date: Friday, December 23, 2005 Sheet 13 of 37
A B C D E
A B C D E

5V_S0

13,17,18,19,20,24,25,27,28,32,35,36,37 5V_S0
2D5V_S0

7,9,17,34,36 2D5V_S0

5V_S0 5V_CRT_S0
4 4

CRT CONN

2
D18

CRT CH751H-40PT

SD

1
4
3
C60
CN8 RN3 SCD01U50V3KXL2GP

2
17 SRN2K2J-1-GP

6
1 11

1
2
L3 1 2 BLM18BB470SN1-GP CRT_B
7 VGA_BLUE
7 DDC_CLK
L4 1 2 BLM18BB470SN1-GP CRT_G 2 12
7 VGA_GREEN
8 JVGA_VS
L2 1 2 BLM18BB470SN1-GP CRT_R 3 13
7 VGA_RED
5V_CRT_S0 9 JVGA_HS
4 14
DDC_DATA
SB SC C48 C59 C58
10
SC 5 15
1

1
SD C63 C64 C65 16

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP
1

1
SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP
2

2
R46 R62 R61
3
DY DY DY DY DY 3

1
75R2F-2-GP 75R2F-2-GP 75R2F-2-GP VIDEO-15-47-GP
SD 20.20392.015 C280 C267 C272 C273
SC

SC27P-GP

SC27P-GP
SC

SC100P50V2JN-U

SC100P50V2JN-U
2

2
Close to Connector
SC
Close to Connector
1st source:20.20392.015
SB 2nd source:20.20412.015

2D5V_S0
D17 D21
2 5V_CRT_S0 2 5V_CRT_S0

CRT

4
3
DDC_CLK 3 DDC_DATA 3
RN2
1 1 SRN2K2J-1-GP
2 BAV99PT-GP-U BAV99PT-GP-U 2
5V_CRT_S0
DY DY

1
2
SB
SB SB
1

C81
SCD1U16V R611 1 2 0R0402-PAD 5V_S0
U9
2

SD
14

L16 U49 4 3 DDC_DATA


7 GMCH_DDCDATA
2 3 HSYNC_5 1 2 JVGA_HS 5 4 CRT_G
7 VGA_HSYNC
5 2
33R3J-2-GP CRT_R 6 3
U14A DDC_CLK 6 1
14

GMCH_DDCCLK 7
7
4

SSAHCT125PWR-GP 7 2
L17
5 6 VSYNC_5 1 2 JVGA_VS 8 1 CRT_B
7 VGA_VSYNC 2N7002DW-7F-GP
33R3J-2-GP PACDN009
U14B
DY
7

SSAHCT125PWR-GP
SB SC
SB

1 <Variant Name> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 14 of 37
A B C D E
A B C D E

3D3V_S0
X3 CL=12.5pF±0.2pF
+3D3VRTC RTC_AUX_S5 Freq. Tolerance:±20ppm 3,4,5,7,9,11,13,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0
D13 C239
2 1 1 2 +3D3VRTC

1
CH751H-40PT SC18P50V2JN-1-GP
RTC_VCC 19,28,33,36 +3D3VRTC
C240
SC1U10V3ZY VCCP_GMCH_S0

1
X3 3 R225
10MR2J-L-GP 2,4,5,6,7,9,10,17,19,32,37 VCCP_GMCH_S0
X-32D768KHZ-15
D14 R461
RTC circuitry RTC_AUX_S5

1
4 2 1 1 2 4

2
U36A
17 RTC_AUX_S5
1

2
CH751H-40PT 20KR2F-L-GP G39 C238
LPC_LAD[3..0] 27,29
1

1
R235
1KR2J-1-GP R462 C403 GAP-OPEN
SB 1 2
RCT_X1 Y1 P2 LPC_LAD0
1MR2J-1-GP SC1U10V3ZY SC18P50V2JN-1-GP RCT_X2 RTCX1 LAD[0]/FWH[0] LPC_LAD1
Y2 RTCX2 LAD[1]/FWH[1] N3

2
N5 LPC_LAD2

LPC
RTC
LAD[2]/FWH[2]
BAT2

1
RCT_RST# AA2 N4 LPC_LAD3 3D3V_S0
RTCRST# LAD[3]/FWH[3] R445
2

Open J5G1 for Dothan A step


INTRUDER# AA3 N6 LPC_LDRQ0# TP99TPAD30 Shunt for Dothan B step RCIN# 1 2
INTRUDER# LDRQ[0]# LPC_LDRQ1# & all Yonah 10KR2J-2-GP
AA5 INTVRMEN LDRQ[1]#/GPI[41] P4
5

1
2
3

LPC_LDRQ1#
D12
LFRAME#/FWH[4] P3 LPC_LFRAME# 27,29 1
R455 DY 2
10KR2J-2-GP
EE_CS VCCP_GMCH_S0
B12 EE_SHCLK
19 INTRUDER# D11 EE_DOUT A20GATE AF22 EC_GATE_A20 27
RTC1 F13 EE_DIN A20M# AF23 H_A20M# 4 SB

1
MLX-CON3-6-GP

LAN
20.F0700.003 TPAD30 TP92 ICH_TP5 F12 H_CPUSLP#_ICH R292 1 2 0R2J-GP R172
R201 LAN_CLK CPUSLP# AE27
DY H_CPUSLP# 4,6 56R2J-4-GP
LAN_RSTSYNC H_DPRSLP#_R R169 1 2 0R0402-PAD
SC 1 2
10KR2J-2-GP
B11 LAN_RSTSYNC DPRSLP# AE24
H_DPSLP#_R R152 1 2 0R0402-PAD
H_DPRSLP# 4
SD DPSLP# AD27 H_DPSLP# 4

2
DY E12

CPU
LANRXD[0] H_FERR_R R168 1
1st source:20.F0700.003 E11 LANRXD[1] FERR# AF24 2 56R2J-4-GP H_FERR# 4
2nd source:20.F0735.003 SB C13 LANRXD[2]
AG25
CPUPWRGD/GPO[49] H_PWRGD 4
C12 LANTXD[0]
C11 LANTXD[1] IGNNE# AG26 H_IGNNE# 4
R582 1 2 33R2J-2-GP E13 AE22 R717 R388 R370
23 AZ_BITCLK LANTXD[2] INIT3_3V# FWH_INIT# 29
3 R583 1 2 22R2J-2-GP AF27 3
26 AZ_BITCLK_MDC INIT# H_INIT# 4 Dothan A DUMMY 56R 0R
AZ_BITCLK_ICH C10
R204 1
SC 2 33R2J-2-GP AZ_SYNC_ICH B9
ACZ_BIT_CLK INTR AG24 H_INTR 4
VCCP_GMCH_S0
23 CODEC_SYNC

AC-97/AZALIA
R509 33R2J-2-GP ACZ_SYNC Dothan B 0R 0R DUMMY
26 MDC_SYNC 1 2 RCIN# AD23 RCIN# 27
R203 1 2 33R2J-2-GP AZ_RST#_ICH A10
23 CODEC_RST# ACZ_RST#

1
R510 1 2 33R2J-2-GP AF25
26 MDC_RST# NMI H_NMI 4
F11 AG27 R170
23 AZ_DIN0 ACZ_SDIN[0] SMI# H_SMI# 4 R6V9 75R2F-2-GP
26 AZ_DIN1 F10 ACZ_SDIN[1]
SC B10 ACZ_SDIN[2] STPCLK# AE26 H_STPCLK# 4

2
R451 1 2 47R2J-L2-GP ACZ_DOUT_ICH H_THERMTRIP_R
23 CODEC_DOUT
R511 1 2 33R2J-2-GP
C9 ACZ_SDO THRMTRIP# AE23 SB
26 MDC_DOUT
AC19 SATALED# DA[0] AC16 IDE_A0 20
DA[1] AB17 IDE_A1 20
SB AE3
AD3
SATA[0]RXN DA[2] AC17 IDE_A2 20 within 2" of ICH6, R6V9 must be placed
R453 SATA[0]RXP
AG2 SATA[0]TXN DCS1# AD16 IDE_CS#0 20
1 2 AF2 SATA[0]TXP DCS3# AE17 IDE_CS#1 20
0R0402-PAD
AD7 SATA[2]RXN DD[0] AD14 IDE_D0 20
AC7 SATA[2]RXP DD[1] AF15 IDE_D1 20

SATA
AF6 SATA[2]TXN DD[2] AF14 IDE_D2 20
AG6 AD12

IDE
SATA[2]TXP DD[3] IDE_D3 20
DD[4] AE14 IDE_D4 20
AC2 SATA_CLKN DD[5] AC11 IDE_D5 20
AC1 SATA_CLKP DD[6] AD11 IDE_D6 20
DD[7] AB11 IDE_D7 20
SATA_RBIAS_PN AG11 AE13
2 SATARBIAS# DD[8] IDE_D8 20 2
AF11 SATARBIAS DD[9] AF13 IDE_D9 20
AB12 VCCP_GMCH_S0
DD[10] IDE_D10 20
2

DD[11] AB13 IDE_D11 20


R206 AC13
DD[12] IDE_D12 20

1
0R0402-PAD AF16 AE15
20 IDE_IORDY IORDY DD[13] IDE_D13 20
AB16 AG15 R153 VCCP_GMCH_S0
Place within 500 mils 20 IDE_IRQ14 IDEIRQ DD[14] IDE_D14 20 56R2J-4-GP
20 IDE_DACK# AB15 DDACK# DD[15] AD13 IDE_D15 20
1

of ICH6 ball
20 IDE_IOW# AC14 DIOW# DY

1
20 IDE_IOR# AE16 DIOR# DDREQ AB14 IDE_DREQ 20

2
H_DPSLP# R171
71.0ICH6.A0U 56R2J-4-GP

ICH6M(LF B1):71.0ICH6.M08
DY

2
H_DPRSLP#

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH6-M (1 of 4)
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 15 of 37
A B C D E
A B C D E

U36C
U36B PCIE AC coupling caps
need to be within 250 mils of the driver.
21,25 PCI_AD[31..0]
PM_RI# T2 H25
PCI_AD0 PCI_REQ#0 RI# PERn[1]
E2 AD[0] REQ[0]# L5 SC PERp[1] H24
PCI_AD1
PCI_AD2
E5 AD[1] PCI GNT[0]# C1 PCI_GNT#0
PCI_REQ#1
TP132 TPAD30 R537 1 2 SATA_BYPASS
33R2J-2-GP
AF17 SATA[0]GP/GPI[26] PETn[1] G27
C2 AD[2] REQ[1]# B5 AE18 SATA[1]GP/GPI[29] PETp[1] G26
PCI_AD3 PCI_GNT#1 TP54 TPAD30
PCI_AD4
F5 AD[3] GNT[1]# B6
PCI_REQ#2
AF18 SATA[2]GP/GPI[30] SB
PCI_AD5
F3 AD[4] REQ[2]# M5
PCI_GNT#2
SC TP133 TPAD30
SB AG18 SATA[3]GP/GPI[31] PERn[2] K25
E9 F1 SB K24

PCI-EXPRESS
PCI_AD6 AD[5] GNT[2]# PCI_REQ#3 PERp[2]
F2 AD[6] REQ[3]# B8 PCI_REQ#3 25 18,20 SMB_CLK Y4 SMBCLK PETn[2] J27
PCI_AD7 D6 C8 PCI_GNT#3 W5 J26
AD[7] GNT[3]# PCI_GNT#3 25 18,20 SMB_DATA SMBDATA PETp[2]
PCI_AD8 E6 F7 PCI_REQ#4 SMB_LINK_ALERT# Y5
AD[8] REQ[4]#/GPI[40] PCI_REQ#4 21 LINKALERT#
4 PCI_AD9 D3 E7 PCI_GNT#4 SMLINK0 W4 M25 4

GPIO
AD[9] GNT[4]#/GPO[48] PCI_GNT#4 21 SMLINK[0] PERn[3]
PCI_AD10 A2 E8 PCI_REQ#5 SMLINK1 U6 M24
PCI_AD11 AD[10] REQ[5]#/GPI[1] ICH_GPO17 TP97 TPAD30 MCH_SYNC# SMLINK[1] PERp[3]
D2 AD[11] GNT[5]#/GPO[17] F6 AG21 MCH_SYNC# PETn[3] L27
PCI_AD12 LAMP_STAT
PCI_AD13
D5 AD[12] REQ[6]#/GPI[0] B7
ICH_GPO16
LAMP_STAT 13 SB 23 ICH_SPKR F8 SPKR PETp[3] L26
PCI_AD14
H3
B4
AD[13] GNT[6]#/GPO[16] D8
TP96 TPAD30 W3 P24
SB
AD[14] 27 PM_SUS_STAT# SUS_STAT#/LPCPD# PERn[4] PCIE_RXN4 20
PCI_AD15
PCI_AD16
J5
K2
AD[15] C/BE[0]# J6
H6
PCI_C/BE#0 21,25 SB 1 2 SYS_RESET# U2
PERp[4] P23
N27 PCIE_TXN4_R C205 1 2 SCD1U16V
PCIE_RXP4 20
AD[16] C/BE[1]# PCI_C/BE#1 21,25 3D3V_S3 SYS_RESET# PETn[4] PCIE_TXN4 20
PCI_AD17 K5 G4 R224 10KR2J-2-GP N26 PCIE_TXP4_R C206 1 2 SCD1U16V
AD[17] C/BE[2]# PCI_C/BE#2 21,25 PETp[4] PCIE_TXP4 20
PCI_AD18 D4 G2 AD19
AD[18] C/BE[3]# PCI_C/BE#3 21,25 7 PM_BMBUSY# BMBUSY#
PCI_AD19 L6 T25
AD[19] DMI[0]RXN DMI_RXN0 7
PCI_AD20 G3 A3 ICH_GPI7 AE19 T24
AD[20] IRDY# PCI_IRDY# 21,25 GPI[7] DMI[0]RXP DMI_RXP0 7 Layout Note:
PCI_AD21 H4 E1 EXT_SMI# R1 R27
PCI_PAR 21,25 DMI_TXN0 7

Direct Media Interface


PCI_AD22 AD[21] PAR GPI[8] DMI[0]TXN PCIE AC coupling caps
PCI_AD23
H2
H5
AD[22] PCIRST# R2
C3
ICH_PCIRST# 18 SB SMB_ALERT# W6
DMI[0]TXP R26 DMI_TXP0 7 need to be within 250 mils of the driver.
AD[23] DEVSEL# PCI_DEVSEL# 21,25 SMBALERT#/GPI[11]
PCI_AD24 B3 E3 V25
AD[24] PERR# PCI_PERR# 21,25 DMI[1]RXN DMI_RXN1 7
PCI_AD25 M6 C5 PCI_LOCK# EXT_WAKE# M2 V24 RP4
AD[25] PLOCK# GPI[12] DMI[1]RXP DMI_RXP1 7 3D3V_S3
PCI_AD26 EXT_SCI# USB_OC#0
PCI_AD27
B2
K6
AD[26] SERR# G5
J1
PCI_SERR# 21,25 SB R6 GPI[13] DMI[1]TXN U27
U26
DMI_TXN1 7
USB_OC#1
1
2
10
9 USB_OC#5
AD[27] STOP# PCI_STOP# 21,25 DMI[1]TXP DMI_TXP1 7
PCI_AD28 K3 J2 AC21 USB_OC#3 3 8 USB_OC#4
AD[28] TRDY# PCI_TRDY# 21,25 3 PM_STPPCI# STP_PCI#
PCI_AD29 A5 Y25 USB_OC#2 4 7 USB_OC#7
AD[29] DMI[2]RXN DMI_RXN2 7
PCI_AD30 L1 TPAD30 TP82 ICH6_GPO19 AB21 Y24 5 6 USB_OC#6
AD[30] GPO[19] DMI[2]RXP DMI_RXP2 7 3D3V_S3
PCI_AD31 K4 R5 W27
AD[31] PLTRST# PLT_RST# 18 DMI[2]TXN DMI_TXN2 7
G6 AD22 W26 SRN10KJ-L3-GP
PCICLK CLK_ICHPCI 3 3,32 PM_STPCPU# STP_CPU# DMI[2]TXP DMI_TXP2 7
21,25 PCI_FRAME# J3 FRAME# PME# P6 ICH_PME# 27
TPAD30 TP94 ICH6_GPO21 AD20 AB24
GPO[21] DMI[3]RXN DMI_RXN3 7 1D5V_S0
Interrupt I/F 1 2 1 2 TPAD30 TP83 DELAY_PLTRST# AD21
GPO[23] DMI[3]RXP AB23 DMI_RXP3 7
INT_PIRQA# INT_PIRQE#
INT_PIRQB#
N2
L2
PIRQ[A]# PIRQ[E]#/GPI[2] D9
C7 INT_PIRQF#
SB R612 BC67 TPAD30 TP109 PCICRI V3
DMI[3]TXN AA27
AA26
DMI_TXN3 7 Place within 500 mils of ICH
25 INT_PIRQB# PIRQ[B]# PIRQ[F]#/GPI[3] GPIO[24] DMI[3]TXP DMI_TXP3 7

1
3 INT_PIRQC# M1 C6 INT_PIRQG# DUMMY-R2 DUMMY-C2 3
21 INT_PIRQC# PIRQ[C]# PIRQ[G]#/GPI[4]
INT_PIRQD# L3 M3 INT_PIRQH# TPAD30 TP106 ICH6_GPIO25 P5 AD25 R436
25 INT_PIRQD# PIRQ[D]# PIRQ[H]#/GPI[5] GPIO[25] DMI_CLKN CLK_PCIE_ICH# 3 24D9R2F-L-GP
TPAD30 TP100 ICH6_GPIO27
SB R3 GPIO[27] DMI_CLKP AC25 CLK_PCIE_ICH 3
TPAD30 TP103 ICH_TP8
RESERVED ICH_TP13 TP105 TPAD30
TPAD30 TP107 ICH6_GPIO28 T3 GPIO[28]
AC5 RSVD[1] RSVD[6] AD9 21,25,27 PM_CLKRUN# AF19 CLKRUN# DMI_ZCOMP F24

2
TPAD30 TP104 ICH_TP9 AD5 AF8 ICH_TP14 TP55 TPAD30 ICH6_GPIO33 AF20
TPAD30 TP58 ICH_TP10 RSVD[2] RSVD[7] ICH_TP15 TP56 TPAD30 R480 TPAD30 TP47 ICH6_GPIO34 GPIO[33] DMI_IRCOMP_R
AF4 RSVD[3] RSVD[8] AG8 AC18 GPIO[34] DMI_IRCOMP F23
TPAD30 TP57 ICH_TP11 AG4 U3 ICH_TP16 TP108 TPAD30 1 2 TPAD30 TP93
TPAD30 TP102 ICH_TP12 RSVD[4] TP[3] USB_OC#4
AC9 RSVD[5] 1KR2J-1-GP
27 ICH_PCIE_WAKE# U5 WAKE# OC[4]#/GPI[9] C23
D23 USB_OC#5
USB_OC#4 26 SB
71.0ICH6.A0U OC[5]#/GPI[10] USB_OC#6
DY 27 PCI_SERIRQ AB20 SERIRQ OC[6]#/GPI[14] C25
USB_OC#7
SB AC20
OC[7]#/GPI[15] C24
27 PM_THRM# THRM# USB_OC#0

RP5
ICH6 Pullups 3D3V_S3
BC68 R613
32 VRM_PWRGD AF21 VRMPWRGD
OC[0]#
OC[1]#
C27
B27 USB_OC#1
USB_OC#2
USB_OC#0 26
SB
3D3V_S0 1 2 1 2 OC[2]# B26 USB_OC#2 26
PCI_FRAME# 1 10 E10 C26 USB_OC#3

CLOCKS
3 CLK_ICH14 CLK14 OC[3]#
PCI_IRDY# 2 9 INT_PIRQD# RN24 DUMMY-C2 DUMMY-R2
PCI_TRDY# 3 8 INT_PIRQG# PM_RI# 1 8 BC69 R614 A27 C21
3 CLK48_USB CLK48 USBP[0]N USB_PN0 26
PCI_STOP# 4 7 INT_PIRQF# SMB_LINK_ALERT# 2 7 1 2 1 2 D21
USBP[0]P USB_PP0 26
5 6 INT_PIRQE# SMLINK0 3 6 PM_SUS_CLK V6 A20
3D3V_S0 SUSCLK USBP[1]N USB_PN1 20
SMLINK1 4 5 DUMMY-C2 DUMMY-R2 TPAD30 TP134 B20
USBP[1]P USB_PP1 20
SRN10KJ-L3-GP T4 D19
27 ICH_SLP_S3# SLP_S3# USBP[2]N USB_PN2 26
RP2 SRN10KJ-L2-GP TP101 TPAD30 ICH_SLP_S4# T5 C19
3D3V_S0 SLP_S4# USBP[2]P USB_PP2 26
PCI_SERR# 1 10 T6 A18
27 ICH_SLP_S5# SLP_S5# USBP[3]N
PCI_DEVSEL# INT_PIRQH# ICH_PCIE_WAKE# R458 1 2 1KR2J-1-GP
PCI_PERR#
2 9
PCI_REQ#2 ICH6_PWROK USBP[3]P B18 SB
3 8 SB 19 ICH6_PWROK AA1 PWROK USBP[4]N E17 USB_PN4 26

POWER MGT
PCI_LOCK# 4 7 PCI_REQ#3 PM_BATLOW#_R R459 1 2 8K2R2J-3-GP D17
USBP[4]P USB_PP4 26
5 6 PM_CLKRUN# R446 1 2 PM_DPRSLPVR_R AE20 B16
2 3D3V_S0 32 PM_DPRSLPVR DPRSLPVR USBP[5]N 2
PM_SUS_STAT# R460 1 2 10KR2J-2-GP A16

USB
SRN10KJ-L3-GP 100R2F-L1-GP-U PM_BATLOW#_R USBP[5]P
RP3 SMB_ALERT# R452 1 2 10KR2J-2-GP
SB V2 BATLOW# USBP[6]N C15
D15
SB
3D3V_S0 1 USBP[6]P
PCI_REQ#5 1 10 U1 A14 USB_PN7
3D3V_S0 27 PM_PWRBTN# PWRBTN# USBP[7]N
INT_PIRQA# 2 9 PCI_SERIRQ R438 B14 USB_PP7 TP49 TPAD30
INT_PIRQC# MCH_SYNC# 100KR2J-1-GP PLT_RST# USBP[7]P TP50 TPAD30
3 8 V5 LAN_RST#
INT_PIRQB# 4 7 PCI_REQ#0 PCI_REQ#1 R205 1 2 10KR2J-2-GP A22 R167
USBRBIAS#
3D3V_S0 5 6 PM_THRM# ICH_RSMRST# Y3 RSMRST# USBRBIAS B22 USB_RBIAS_PN 1 2 Intel 22.6 ohm 1%
2

ICH_GPI7 R183 1 2 10KR2J-2-GP


SRN10KJ-L3-GP 71.0ICH6.A0U 22D6R2F-L1-GP
RN25 PCI_REQ#4 R450 1 2 10KR2J-2-GP Place within 500 mils of ICH
1 8 ICH_TP16 3D3V_S0
ICH_TP9 LAMP_STAT R202 1 2 10KR2J-2-GP
2
3
7
6 ICH_TP8
SB
4 5 ICH_TP13
1

3D3V_S3
3D3V_S0
ICH6-M Strapping Options
SRN0-GP C43
SCD1U10V2KX-LGP
2

SD REF FUNCTION DEFAULT OPTIONAL OVERRIDE

2
1
U38D
14

1D8V_S3 3D3V_S5 3D3V_S3 TSLCX08MTCX-GP U6A R223 RN49


14

27 RESET_OUT# 12 TSLCX08MTCX-GP 100KR2J-1-GP SRN100KJ-6-GP R7F9 No Reboot NO_STUFF STUFF


11 1
1

VRM_PWRGD 13 3 ICH6_PWROK

2
R408 R409 R399
2,4 DBR# 2 R7F8 A16 Swap NO_STUFF STUFF

3
4
1

200KR2J-L1-GP 100KR2J-1-GP 4K7R2J-2-GP Override


7

R517
SB SB SB
7

3D3V_S3 10KR2J-2-GP R7F7 Boot BIOS NO_STUFF STUFF


SC
2

C328
1
D <Variant Name> 1
1 2
2

Q43
EXT_SMI# 27
3

2N7002-8-GP SCD1U10V2KX-LGP
SB Wistron Corporation
3

U60A
14

1 Q42 TSLCX08MTCX-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


MMBT3904LT1-2-GP EXT_SCI# 27
1 1 Taipei Hsien 221, Taiwan, R.O.C.
G 3 ICH_RSMRST#
ICH_RSMRST# 19
2
1

2 Title
27,33,36 SUS_ON EXT_WAKE# 27
2

C342 R518
SCD1U10V2KX-LGP S 10KR2J-2-GP ICH6-M (2 of 4)
2

Size Document Number Rev


A3
SB Key-West / Kinney -2
2

Date: Friday, December 23, 2005 Sheet 16 of 37


A B C D E
A B C D E

1D5V_S0
3,4,5,7,9,11,13,15,16,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0 3D3V_S0
Layout Note: Layout Note:
Place above caps within Place near pin AA19 16,18,19,20,25,26,33,37 3D3V_S3 3D3V_S3

1
100 mils of ICH near F27, P27, AB27
13,14,18,19,20,24,25,27,28,32,35,36,37 5V_S0 5V_S0
U36E C379 C382 C385 C390 C387
SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP
13,19,23,24,26,33,34,35,36,37 5V_S3 5V_S3

2
1D5V_S0
5,7,9,16,20,36,37 1D5V_S0 1D5V_S0
AA22 VCC1_5_B VCC1_5_A F9 34,35,36 1D5V_S3 1D5V_S3
AA23 VCC1_5_B VCC1_5_A U17

1
AA24 VCC1_5_B VCC1_5_A U16 7,9,14,34,36 2D5V_S0 2D5V_S0
4 TC9 C368 C386 C207 AA25 U14 4
ST220U10VDM-9GP VCC1_5_B VCC1_5_A

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP
AB25 VCC1_5_B VCC1_5_A U12 15 RTC_AUX_S5 RTC_AUX_S5
2

2
AB26 VCC1_5_B VCC1_5_A U11

1
AB27 VCC1_5_B VCC1_5_A T17 2,4,5,6,7,9,10,15,19,32,37 VCCP_GMCH_S0 VCCP_GMCH_S0
F25 T11 C394 C395 C384 C383 C392 C232
VCC1_5_B VCC1_5_A SC22U10V6ZY-2GP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP

SCD1U10V2KX-LGP
F26 P17

CORE
VCC1_5_B VCC1_5_A

2
F27 VCC1_5_B VCC1_5_A P11
G22 VCC1_5_B VCC1_5_A M17
G23 VCC1_5_B VCC1_5_A M11
G24 VCC1_5_B VCC1_5_A L17
Layout Note: G25 L16
IDE decoupling VCC1_5_B VCC1_5_A
H21 VCC1_5_B VCC1_5_A L14
3D3V_S0 H22 L12
VCC1_5_B VCC1_5_A
J21 VCC1_5_B VCC1_5_A L11
1

J22 VCC1_5_B VCC1_5_A AA21


C235 K21 AA20 Place within 100
SC10U6D3V5MXL1GP VCC1_5_B VCC1_5_A mils of ICH pin 3D3V_S0
K22 VCC1_5_B VCC1_5_A AA19 *Within a given well, 5VREF needs to be up before the
2

L21 AG13, AG16


VCC1_5_B corresponding 3.3V rail
L22 AA10

PCIE
VCC1_5_B VCC3_3
M21 VCC1_5_B VCC3_3 AG19

1
M22 VCC1_5_B VCC3_3 AG16
N21 AG13 C218 C220
VCC1_5_B VCC3_3 SCD1U10V2KX-LGP SCD1U10V2KX-LGP
N22 VCC1_5_B VCC3_3 AD17

2
Layout Note: N23 AC15
VCC1_5_B VCC3_3

IDE
PCI decoupling N24 AA17
3D3V_S0 VCC1_5_B VCC3_3
N25 VCC1_5_B VCC3_3 AA15
P21 AA14 Layout Note: 3D3V_S0 5V_S0
VCC1_5_B VCC3_3
1

Distribute in PCI section 3D3V_S0


C219
P25
P26
VCC1_5_B VCC3_3 AA12
near pin A2-A6 near D1-H1 SB
VCC1_5_B

1
3 SC10U6D3V5MXL1GP P27 P1 3
VCC1_5_B VCC3_3
2

1
R21 M7 D10 R200
VCC1_5_B VCC3_3 C391 C236 C237 100R2F-L1-GP-U
R22 VCC1_5_B VCC3_3 L7 CH751H-40PT
T21 VCC1_5_B VCC3_3 L4 SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP Intel 10 ohm

2
T22 VCC1_5_B VCC3_3 J7

2
1D5V_S3 V5REF_S0

PCI
U21 VCC1_5_B VCC3_3 H7
U22 VCC1_5_B VCC3_3 H1

1
V21 E4 Layout Note:
VCC1_5_B VCC3_3 Place near U35 C228 C227
V22 VCC1_5_B VCC3_3 B1

1
W21 A6 SCD1U16V SC1U10V3ZY
VCC1_5_B VCC3_3

2
W22 C393 C396
VCC1_5_B SCD1U10V2KX-LGP SCD1U10V2KX-LGP
Y21 VCC1_5_B VCCSUS1_5 U7

2
1D5V_S0 Y22 R7
VCC1_5_B VCCSUS1_5 1D5V_S3 3D3V_S3 5V_S3
AA6 VCC1_5_A 1D5V_S0

USB
AB4 VCC1_5_A VCCSUS1_5 G19
1

1
Place within 100 AB5 VCC1_5_A

1
mils of ICH C398 C401 C231 AB6 G20 D28 R437
near pin AG5 SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP VCC1_5_A VCC1_5_A C381 10R2J-2-GP
AC4 VCC1_5_A VCC1_5_A F20 CH751H-40PT
2

1
DY DY DY AD4 VCC1_5_A VCC1_5_A E24 SCD1U10V2KX-LGP Intel 10 ohm

2
AE4 E23 C366 C365

USB CORE
VCC1_5_A VCC1_5_A

2
AE5 VCC1_5_A VCC1_5_A E22 SCD1U10V2KX-LGP SCD1U10V2KX-LGP V5REF_S3

2
AF5 E21 Place both
Place within 100 1D5V_S0 VCC1_5_A VCC1_5_A

1
AG5 E20 within 100 mils
SATA

mils of ICH VCC1_5_A VCC1_5_A of ICH near D27 C363 C367


VCC1_5_A D27
near pin AG9 AA7 D26 SCD1U16V SC1U10V3ZY
VCC1_5_A VCC1_5_A

2
AA8 VCC1_5_A VCC1_5_A D25
1

C400 C230 C399 AA9 D24


SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP VCC1_5_A VCC1_5_A
AB8 VCC1_5_A
2 1D5V_S0 1D5V_GPLL_ICH_S0 V2D5S_PCI_IDE 2D5V_S0 2
DY DY DY AC8 VCC1_5_A VCC1_5_A G8
2

G26 AD8 G38


VCC1_5_A
1 2 AE8 VCC1_5_A VCC2_5 AB18 1 2
PCI/IDE

1
AE9 P7 1D5V_ICH_S0
VCC1_5_A VCC2_5
1

Place within 100 GAP-CLOSE-PWR AF9 C389 GAP-CLOSE-PWR


mils of ICH C208 C209 VCC1_5_A SCD1U10V2KX-LGP Supply Signal Group Icc-max
REF

AG9 VCC1_5_A

2
SC10U6D3V5MXL1GP SCD01U16V2KX-LGP AA18 Layout Note: Place within 100
V5REF
2

1
3D3V_S0 AC27 A8 Place near AB18 mils of ICH V5REF_S0 V5REF 0.001A
VCCDMIPLL V5REF V5REF_S0 C212
E26 VCC3_3
F21 V5REF_S3 SCD01U16V2KX-LGP V5REF_S3 V5REF_SUS 0.01A
V5REF_SUS

2
1D5V_S0 1D5V_ICH_S0 AE1 3D3V_S3
VCCSATAPLL
1

Place within 100


G29 AG10 VCC3_3 VCCUSBPLL A25 3D3V_S0 VCC3_3 0.19A
C388 1 2 A24
mils of ICH SCD1U10V2KX-LGP VCCSUS3_3 Place within 100
A13 VCCLAN3_3/VCCSUS3_3 3D3V_S0 VCCSUS3_3 0.39A
2

1
near E26, E27 GAP-CLOSE-PWR F14 AB3 mils of ICH /VCCLAN3_3
C405 VCCLAN3_3/VCCSUS3_3 VCCRTC C213
G13 VCCLAN3_3/VCCSUS3_3
Place within 100 SCD1U10V2KX-LGP G14 SCD1U10V2KX-LGP 2D5V_S0 VCC2_5 0.01A
VCCLAN3_3/VCCSUS3_3
2

2
mils of ICH
3D3V_S0 pin AE1 DY A11
VCCLAN1_5/VCCSUS1_5 G11
G10
1D5V_S0
1D5V_S0 VCC1_5 2.95A
VCCSUS3_3 VCCLAN1_5/VCCSUS1_5 Place within 100 RTC_AUX_S5
U4 VCCSUS3_3
V1 AG23 mils of ICH 1D5V_S0 VCCSUS1_5 0.27A
Place within 100 VCCSUS3_3 V_CPU_IO pin G10 Layout Note:
V7 VCCSUS3_3 V_CPU_IO AD26 /VCCLAN1_5
1

mils of ICH W2 AB22 Place near AB3


VCCSUS3_3 V_CPU_IO VCCP_GMCH_S0

1
pin AG10 C229 Y7 C404 VCCP_GMCH_S0 V_CPU_IO 0.014A
VCCSUS3_3
1

SCD1U10V2KX-LGP G16 C402 SCD1U10V2KX-LGP


3D3V_S0 VCCSUS3_3
2

A17 G15 C369 SCD1U10V2KX-LGP RTC_AUX_S5 VCCRTC 5uA


VCCSUS3_3 VCCSUS3_3

2
B17 F16 SCD1U10V2KX-LGP
VCCSUS3_3 VCCSUS3_3
2

C17 VCCSUS3_3 VCCSUS3_3 F15


1 Intel dummy F18 VCCSUS3_3 VCCSUS3_3 E16 Layout Note:
1
G17 D16 Place near AG23
Place within 100 VCCSUS3_3 VCCSUS3_3
G18 VCCSUS3_3 VCCSUS3_3 C16
mils of ICH
pin A13 3D3V_S3 Wistron Corporation
3D3V_S3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
71.0ICH6.A0U
1

1
C378 C380 C377 C217 Title
1

Place within 100 SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP


C397 mils of ICH ICH6-M (3 of 4)
2

SCD1U10V2KX-LGP pin V7 Place within 100 Size Document Number Rev


-2
2

mils of ICH A3
pin A17 Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 17 of 37
A B C D E
A B C D E

3D3V_S0
U36D
3,4,5,7,9,11,13,15,16,17,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0
3D3V_S3 E27 F4
VSS VSS
Y6 VSS VSS F22
16,17,19,20,25,26,33,37 3D3V_S3 Y27 VSS VSS F19
Y26 VSS VSS F17
5V_S0 Y23 E25
VSS VSS
W7 VSS VSS E19
13,14,17,19,20,24,25,27,28,32,35,36,37 5V_S0 W25 VSS VSS E18
W24 VSS VSS E15
W23 VSS VSS E14
4 W1 VSS VSS D7 4
V4 VSS VSS D22
V27 VSS VSS D20
V26 VSS VSS D18
V23 VSS VSS D14
U25 VSS VSS D13
U24 VSS VSS D10
U23 VSS VSS D1
U15 VSS VSS C4
U13 VSS VSS C22
T7 VSS VSS C20
T27 VSS VSS C18
T26 VSS VSS C14
T23 VSS VSS B25
T16 VSS VSS B24
T15 VSS VSS B23
T14 VSS VSS B21
T13 VSS VSS B19
T12 VSS VSS B15
T1 VSS VSS B13
R4 VSS VSS AG7
R25 VSS VSS AG3
R24 VSS VSS AG22
R23 VSS VSS AG20
R17 VSS VSS AG17
R16 VSS VSS AG14
R15 VSS VSS AG12
R14 VSS VSS AG1
R13 VSS VSS AF7
3
SB R12
R11
VSS VSS AF3
AF26
3

VSS VSS

VSS
P22 VSS VSS AF12
P16 VSS VSS AF10
P15 VSS VSS AF1
P14 VSS VSS AE7
P13 VSS VSS AE6
P12 VSS VSS AE25
N7 VSS VSS AE21
N17 VSS VSS AE2
N16 VSS VSS AE12
N15 VSS VSS AE11
N14 VSS VSS AE10
N13 VSS VSS AD6
5V_S0 N12 AD24
VSS VSS
U41 N11 AD2
VSS VSS
N1 VSS VSS AD18
PLT_RST# 1 5 M4 AD15
A VCC R463 VSS VSS
27 HDDRSTEN 2 B M27 VSS VSS AD10
3 4 RSTDRV#_R 1 2 M26 AD1
GND Y RSTDRV#_5 20 VSS VSS
M23 VSS VSS AC6
33R2J-2-GP M16 AC3
VSS VSS
NC7SZ08M5X-NL-GP M15 AC26
VSS VSS
M14 VSS VSS AC24
M13 VSS VSS AC23
R229 1 2 0R2J-GP M12 AC22
VSS VSS
DY L25
L24
VSS VSS AC12
AC10
VSS VSS
2 3V to 5V level shift for HDD & CDROM L23 VSS VSS AB9
2
L15 VSS VSS AB7
L13 VSS VSS AB2
K7 VSS VSS AB19
K27 VSS VSS AB10
K26 VSS VSS AB1
K23 VSS VSS AA4
SMBUS(ICH6 ---> SODIMM,CLKGEN) 3D3V_S0
K1
J4
VSS
VSS
VSS
VSS
AA16
AA13
J25 VSS VSS AA11
3D3V_S0 J24 A9
VSS VSS
J23 VSS VSS A7
U38B H27 A4

14
TSLCX08MTCX-GP VSS VSS
H26 VSS VSS A26
4 R196 H23 A23
3D3V_S0 VSS VSS
1
2

6 PLT_RST#_R 1 2 G9 A21
PLT_RST1# 7,20,27,29 VSS VSS
16 PLT_RST# 5 G7 VSS VSS A19
RN16 33R2J-2-GP G21 A15
SRN4K7J-8-GP VSS VSS
ICH6 asserts PLTRST# to reset G12 VSS VSS A12
7

G1 A1
devices on the platform. VSS VSS
4
3

3D3V_S3

3D3V_S0
71.0ICH6.A0U
1
2

U38C
14

TSLCX08MTCX-GP
SMBD_ICH 3,11
RN17 9 R197
SRN10KJ-5-GP 8 ICH_PCIRST#_R 1 2
1 U34 PCIRST1# 21,25 1
16 ICH_PCIRST# 10
33R2J-2-GP
4
3

Secondary PCI Bus reset signal.


4 3
Wistron Corporation
7

5 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
16,20 SMB_CLK 6 1 SMBC_ICH 3,11
Title
PCIRST# Buffer to enhance the driving strength ICH6-M (4 of 4)
2N7002DW-7F-GP Size Document Number Rev
16,20 SMB_DATA
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 18 of 37
A B C D E
A B C D E

SD
3D3V_S3 +15V
C605
1 2
5V_S0
CPU FAN

1
SCD1U50V3KX-GP
R548
8K2R2J-3-GP 3D3V_S0
C476 needs to be placed near Guardian IC. U76A U77

8
R549 LM358DR-N1-GP 1 D D 6

2
THERMTRIP1# 1 2 3 + 2 D D 5
27 FAN1_PWM
4 VCCP_GMCH_S0 1 3 G S 4 4

1
120KR3J-L-GP 2 -

1
R550 C606 SI3456BDV-T1-GP R400

1
1 2 1 Q57 SC2200P50V2KXLGP 10KR2J-2-GP

4
2K2R2J-2-GP MMBT3904LT1-2-GP C607

2
SCD33U10V3KX-2GP

2
4 PM_THRMTRIP-A#
FAN1_TACH 27
1 2 C608
SC2200P50V2KXLGP FAN1
4
VCC_FAN 1
3D3V_S3 R551
1 2 2
3

1
75KR3J-L-GP BC57 5
1

R553 SCD1U10V2KX-LGP

3
R552 120KR3J-L-GP MLX-CON3-9-GP

2
8K2R2J-3-GP 20.D0198.103
D26

1
BAS16-1-GP
SD
2

THERMTRIP2# BC58
SC22U10V6MX 1st source:20.D0198.103

2
VCCP_GMCH_S0
2nd source:20.D0210.103
3

R554 C610
SD

1
1 2 1 Q58 SC2200P50V2KXLGP
2K2R2J-2-GP MMBT3904LT1-2-GP C609
2

SC1KP50V2KX-LGP
2

2
3
DY 3

7 THERMTRIP_GMCH#

5V_S3
SB RT1:

1
Place on bottom side 1.Mitsubishi 1% 0603 10K ohm@25 degree C. P/N:TH11-3h103FT
R555
of MB and sodimm 2K21R3F-3-GP 2.Panasonic 1% 0603 10K ohm@25 degree C. P/N:ERTJ1VG103FA

2
TPAD30 TP135 RT1 should be placed near NB
TPAD30 TP136

1
2 3D3V_S3 2
SMB ADDRESS 熱敏電阻
3D3V_S3
5Eh RT1 3D3V_S3 SB
U8 NTC-10K-9-GP

1
R556 1 2 49D9R2F-GP

2
1 9 R579
4 THERMDP1 27,29 SMBD_KBC THDAT_SMB ATF_INT# ATF_INT# 27

1
2 100KR2J-1-GP
27,29 SMBC_KBC THCLK_SMB
1

D R559
C612 C611 R557 1 2 13 10KR2J-2-GP
SMBADDRSEL

2
3
SCD1U10V2KX-LGP SC2200P50V2KXLGP 1KR2F-3-GP ICH6_PWROK#
2

6N300_VCP
SB 18 REM_DIODE2_P VCP 23

2
17 D
4 THERMDN REM_DIODE2_N

1
C613 1
+3D3VRTC 5V_CAL_SIO# 27

3
U201_VCC 4 SC2200P50V2KXLGP G
R558 1 +3VSUS Q59
16 ICH_RSMRST# 2 11 VSUS_PWRGD 2

2
1KR2F-3-GP 2N7002-8-GP
10 S 1
+RTC_PWR3V ICH6_PWROK 16
RESSERVED 16 G
ICH6_PWROK# R560 1 2 5 Q63
+3V_PWROK#

2
1KR2F-3-GP Place under CPU 2N7002-8-GP
1

C614 21 S
28,36 PWR_BTN# POWER_SW#
SCD1U10V2KX-LGP Put BC6 close to Guardian
3D3V_S3 THERMTRIP1# 6 19 REN_DIODE1_N
THERMTRIP1# REM_DIODE1_N
2

20 REN_DIODE1_P
REM_DIODE1_P

2
THERMTRIP2# 7 THERMTRIP2#
1

Notes: R562 3D3V_S5 BC6 1 Q9


1

1 2 8 15 SC2200P50V2KXLGP MMBT3904LT1-2-GP
THERMTRIP3# THERMTRIP_SIO
1

Vset=(Tp-75)/16 R561 10KR2J-2-GP


THERM_STP# 24
2

3
C615 43KR2F-GP 22 R563
1 VSET 1
Where Tp=75 to 106 degree C SCD1U10V2KX-LGP 14 HW_LOCK#
100KR2J-1-GP
2

3 VSS INTRUDER# 12
2

Set trip point=85 degree c THERMTRIP_SIO 27


Wistron Corporation
2

R565
1

Vset=(85-75)/16=0.625V 1KR2F-3-GP EMC6N300-CZC-1GP


MAX1999_SHDN# 27,33,36
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

R564 C616 Taipei Hsien 221, Taiwan, R.O.C.


Guardian temp-tolerance=+-3 degree C SC2200P50V2KXLGP
SD
10KR2J-2-GP

INTRUDER# 15
2

Title
2

MC6N300,Fan Control
2

Size Document Number Rev


A3
SB Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 19 of 37
A B C D E
A B C D E

3,4,5,7,9,11,13,15,16,17,18,19,23,24,25,27,29,32,34,36,37 3D3V_S0 3D3V_S0

HDD Connector 16,17,18,19,25,26,33,37

13,14,17,18,19,24,25,27,28,32,35,36,37
3D3V_S3

5V_S0
3D3V_S3

5V_S0
HDD1

CDROM 5,7,9,16,17,36,37 1D5V_S0 1D5V_S0


47

45
15 IDE_D[15..0] 2 1 RSTDRV#_5 18 CN12
53
IDE_D8 IDE_D7
4 IDE_D9
4
6
3
5 IDE_D6
-1 TPAD30 TP112 CD_AUDR 2
51
1 CD_AUDL TP110 TPAD30 4
IDE_D10 8 7 IDE_D5 3D3V_S0 5V_S0 3D3V_S0
IDE_D11 10 9 IDE_D4 4 3 CD_AGND TP111 TPAD30
IDE_D12 IDE_D3 IDE_D8 RSTDRV#_5
12 11
DY 6 5

1
IDE_D13 14 13 IDE_D2 IDE_D9 8 7 IDE_D7
IDE_D14 16 15 IDE_D1 R389 R385 R390 IDE_D10 10 9 IDE_D6
IDE_D15 IDE_D0 4K7R2J-2-GP IDE_D11 IDE_D5

4K7R2J-2-GP
18 17 12 11

1KR2J-1-GP
20 19 IDE_D12 14 13 IDE_D4
22 21 5V_S0 IDE_D13 16 15 IDE_D3
IDE_DREQ 15

2
24 23 IDE_D14 18 17 IDE_D2
IDE_IOW# 15
26 25 IDE_D15 20 19 IDE_D1
IDE_IOR# 15

2
HDDCSEL1 28 27 IDE_DREQ 22 21 IDE_D0
IDE_IORDY 15
1

30 29 PBIDDACK# 1 R388 2 IDE_IOR# 24 23


R370 0R0402-PAD IDE_DACK# 15 R386 IDE_IOW#
32 31 IDE_IRQ14 15 26 25
0R0402-PAD DIAG 34 33 10KR2J-2-GP IDE_DACK# 28 27 IDE_IORDY
IDE_A1 15
36 35 TPAD30 TP59 BAY_ID0 30 29 IDE_IRQ14
15 IDE_A2 IDE_A0 15

1
38 37 DIAG 32 31 IDE_A1 5V_S0
15 IDE_CS#1 IDE_CS#0 15
2

40 39 HDD_LED# IDE_A2 34 33 IDE_A0


HDD_LED# 13

1
42 41 IDE_CS#1 36 35 IDE_CS#0

2
44 43 R387 38 37 HDD_LED#
46 2K7R2J-4-GP 5V_S0 40 39 R207

48
1st source:20.F0740.044 DY 42
44
41
43
5V_S0 0R0402-PAD

2
5V_S0 2nd source:20.F0787.044 46 45

1
48 47 CSEL CDROM_CSEL

1
SYN-CONN44D-6GPU 50 49
5V_S0

1
20.F0740.044 C233
SC SCD1U16V
52
54 R208

2
DUMMY-R2
1

3 1 3

1
C322 C323 D25 SYNCONN504R2GP-U
SCD1U16V SC10U10V5ZY-1GP ST100U6D3VBM-8GP BC30 20.80587.050
2

2
SC10U10V6ZY-U PIN 49,50 DON'T USE
DY

2
1st source:20.80587.050
2nd source:20.80611.050

3D3V_S0

NEWCARD Connector SKT1 IDE_IRQ14 1


R226
2

1
1st source:21.H0104.001 8K2R2J-3-GP
Place them Near to Chip Place them Near to Connector 2nd source:21.H0103.011
3rd source:21.H0111.001
3D3V_S3 1D5V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S3 2

CARDBUS-SKT66-GP
21.H0104.001
1

1
For Newcard socket
C223 C225 C374 C373 C371 C370 C372
SCD1U16V SCD1U16V SC10U10V5ZY-1GP SCD1U16V SC10U10V5ZY-1GP SCD1U16V SCD1U16V CN10
2

2 NP2
2 SC SB 28
26
2

SB 16 PCIE_TXP4 25
24
16 PCIE_TXN4
23
16 PCIE_RXP4 22
3D3V_S3 21
16 PCIE_RXN4
RN23 R448 1 2 0R2J-GP 20
27 EXP_CARD_PRES#
R574 CPPE#
2NEWCARD_OC#
SB 2 3
CPUSB#
3 CLK_PCIE_NEW 19
27 EXP_OC# 1
DY 0R2J-GP
1 4 3 CLK_PCIE_NEW#
R447 1 2 0R2J-GP CPPE#
18

R566 SRN100KJ-6-GP R449 1 DY CONN_CLKREQ#


17
SB 3 PREQ2#
0R2J-GP
2 16
1
DY 2 EXPCARD_STBY# 27 3D3V_NEW_S0 15
14
1

0R2J-GP R622 PERST# 13


SMBUS(ICH6--NEWCARD,LAN)
21
19
18
7

U39 0R2J-GP 12
3D3V_NEW_LAN_S3
DY 27 PCIE_WAKE# 11
OC#
GND

THERMAL_PAD

STBY#
RCLKEN

SB 1D5V_NEW_S0 10
SB 9
2

R581 R567 1 2 0R2J-GP SMBD_NEW 8


16,18 SMB_DATA
R568 1 2 0R2J-GP SMBC_NEW
16 20
1
DY 2
0R2J-GP
3D3V_S3 16,18 SMB_CLK
TPAD30 TP88 CONN_TP2
7
6
NC#16 SHDN# PERST# TPAD30 TP81 CONN_TP3
1D5V_S0 14 NC#14 PERST# 8 5
13 +1.5VVIN 9 CPUSB# CPUSB# 4
1D5V_NEW_S0 NC#13 +1.5VOUT CPUSB#
5 10 CPPE# R616 1 2 0R0402-PAD USB_PP1_R 3
3D3V_NEW_S0 NC#5 +3VOUT CPPE# 16 USB_PP1
TPS2231_RST# R615 2 0R0402-PAD USB_PN1_R
3D3V_S0 4 NC#4 +3VIN SYSRST# 6
R209
16 USB_PN1 1 2 1st source:62.10024.621
1
DY 2 PLT_RST1# 1 2nd source:62.10081.021
AUXOUT

1.5VOUT

3.3VOUT

0R2J-GP
SB 3rd source:20.F0782.026
AUXIN

1.5VIN

3.3VIN

1 27 1
3D3V_S3 NP1
1

TPS2231RGP-GP FOX-CON28-GP
Wistron Corporation
15
17
11
12
3
2

U60B EL4 62.10024.621


14

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SB DLW21SN900SQ2LUGP
3D3V_NEW_LAN_S3 7,18,27,29 PLT_RST1# 4
6 TPS2231_RST# DY SB Taipei Hsien 221, Taiwan, R.O.C.
3D3V_S3
5 Title
1D5V_NEW_S0 27 PLT_DLY_RST#
1D5V_S0
HDD / CDROM / NEW CARD
4

3D3V_NEW_S0 TSLCX08MTCX-GP
7

Size Document Number Rev


3D3V_S0
A3
SB Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 20 of 37
A B C D E
3D3V_LAN_S5
3D3V_LAN_S5 1D8V_AUX_LAN
1 Close to power pin Close to power pin 22,36,37 3D3V_LAN_S5

1
C526 C527 C528 C529 C530 C531 C532 C533 C534 C535 C536 C537 C538 C660 C539 C541 C543 C544 C545
SC4D7U10V5ZY SC4D7U10V5ZY SC1KP50V2KX-LGP SC4D7U10V5ZY
2

2
SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP
SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP SCD1U10V2KX-LGP
SB SCD1U10V2KX-LGP

1D8V_AUX_LAN
SB SB
Place PLLVDD2_LAN/BIASVDD_LAN
BIASVDD_LAN Place near Chip CKT as close to chip as
1D8V_AUX_LAN

1
3D3V_LAN_S5 3D3V_LAN_S5 PLLVDD2_LAN possible
C546 1D8V_AUX_LAN
SCD1U10V2KX-LGP L33

1
PLLVDD2_LAN 1 2
C547 C548 MLB-160808-18-GP
SB

1
2

2
112

106

115
125
SCD1U10V2KX-LGP SCD1U10V2KX-LGP C549 C550

17
44

79
94

19

30
40
52

58
57

70
69

64
63

65
68
7
U30 SC2D2U6D3V3MXLGP SC1KP50V2KX-LGP

2
VDDC
VDDC
VDDC

BIASVDD

XTAL_AVDD
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI
VDDIO-PCI

EPHY_AGND
EPHY_AVDD

BIASVSS

PLLVDD
PLLGND

XTAL_AVSS
VDDIO
VDDIO
VDDIO

1
R469 R470 R471 R472
SB

49D9R2F-GP

49D9R2F-GP

49D9R2F-GP

49D9R2F-GP
R468 3D3V_LAN_S5
113 72 RDAC 1 2
SB L34
25,27 PCI_PME# PCI_PME_L RDAC
28 BIASVDD_LAN 1 2
16,25 PCI_PERR# PCI_PERR_L

2
Place RDAC CKT 1K27R2F-L-GP 0R0603-PAD

1
as close to TRD0- 61 TX- 22
121 chip as 62 C551 C552
16 PCI_REQ#4 PCI_REQ_L TRD0+ TX+ 22
16,25 PCI_TRDY# 23 PCI_TRDY_L possible TRD1- 60 RX- 22

2
59 SCD1U10V2KX-LGP SCD1U10V2KX-LGP
TRD1+ RX+ 22

16,25 PCI_PAR 31 PCI_PAR


PCI_AD0
LAN EEPROM
16,25 PCI_AD[0..31] 55 PCI_AD0
PCI_AD1 54
PCI_AD2 PCI_AD1
53 PCI_AD2
PCI_AD3 51 76 LAN_LINK100#
PCI_AD4 PCI_AD3 SPD100LEDB
50 PCI_AD4 SPD1000LEDB 78
PCI_AD5 LAN_LINK10#

Broadcom LAN
49 PCI_AD5 LINKLEDB 75
PCI_AD6 48 77 LAN_TX/RX# U31 3D3V_LAN_S5
PCI_AD7 PCI_AD6 TRAFFICLEDB
45 PCI_AD7
PCI_AD8 42 SPROM_CS 1 8
PCI_AD9 PCI_AD8 SPROM_CLK CS VCC R623
41 PCI_AD9 EEDATA_PXE 93 2 SK DC 7

1
PCI_AD10 39 SPROM_DOUT 3 6 SPROM_ORG 1 2
PCI_AD11 PCI_AD10 SPROM_DIN DI ORG C553
38 PCI_AD11 EECLK_PXE 90 4 DO GND 5
PCI_AD12 37 10KR2J-2-GP SCD01U16V2KX-LGP
PCI_AD12

2
PCI_AD13 36 95 SPROM_CLK
PCI_AD14 PCI_AD13 SPROM_CLK SPROM_CS
PCI_AD15
34
33
PCI_AD14 SPROM_CS 98 AT93C46-10SU-1GP SC
PCI_AD15 BCM4401 requires
PCI_AD16 1st source: Atmal: AT93C46-10SI "72.93C46.R01",

BCM4401
16 PCI_AD16
PCI_AD17 15 16-Bit R/W data
PCI_AD18 14
PCI_AD17 2nd source: ST : M93C46-W "72.93C46.N01",
PCI_AD18 width
PCI_AD19 11
PCI_AD20 PCI_AD19
10 PCI_AD20
PCI_AD21 9
PCI_AD22 PCI_AD21
8 PCI_AD22
PCI_AD23 6
PCI_AD24 PCI_AD23
3 PCI_AD24 Note: The BCM4401L has weak internal
PCI_AD25 1 91
PCI_AD26 PCI_AD25 REG18OUT 1D8V_AUX_LAN pulldown resistors on the follow signals:
128 PCI_AD26 REG18OUT 92
PCI_AD27 127
PCI_AD28 PCI_AD27
126 PCI_AD28 SPROM_CS,SPROM_CLK,SPROM_DOUT,SPROM_DIN
PCI_AD29 124 97
PCI_AD29 REGSUP18 3D3V_LAN_S5
PCI_AD30 123 96
PCI_AD31 PCI_AD30 REGSUP18
122 PCI_AD31
PCI_C/BE#0 43 80
16,25 PCI_C/BE#[0..3] PCI_CBE0_L TCK
PCI_C/BE#1 32 82
PCI_C/BE#2 18 PCI_CBE1_L TDI
PCI_CBE2_L TDO 83
PCI_C/BE#3 4 81
PCI_CBE3_L TMS
TRST_L 73
16,25 PCI_DEVSEL# 26 PCI_DEVSEL_L
16,25 PCI_FRAME# 20 PCI_FRAME_L
16 PCI_GNT#4 119 PCI_GNT_L VESD 25 3D3V_LAN_S5
LAN_IDSEL 5 56
PCI_IDSEL VESD
16 INT_PIRQC# 116 PCI_INTA_L VESD 114
16,25 PCI_IRDY# 21 PCI_IRDY_L
27 3D3V_LAN_S5
16,25 PCI_STOP# PCI_STOP_L
117 R474
18,25 PCIRST1# PCI_RST_L
16,25 PCI_SERR# 29 PCI_SERR_L VAUXPRSNT 87 1 2
1KR2J-1-GP R477

EPHY_TESTMODE
118 R476 LAN_LINK10# 1 2
3 PCLK_LAN PCI_CLK LAN_LINK10#_R 22
PCI_CLKRUN_L

66 LAN_X0 1 2

SPROM_DOUT
XTALO
1

LAN_X1 806R2F-GP 150R2F-1-GP


67 SB
EPHY_VREF

SPROM_DIN
R475 EXT_POR_L XTALI
10R2J-2-GP
GPIO1

GPIO0

SB DY X6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

LAN_X0_R
SC 1 2
NC
NC

NC

NC
NC
NC

NC
NC
2

SD PCLK_LAN_RC BCM4401KQLG-GP
XTAL-25MHZ-34-GP
2
12
13
24
35
46
47
74
84
100
111
120

22
102
103
86
105
85
108
109
110
71
88
89
101
99
104
107
1

1
C554 C555 C556
SC10P50V2JN-1-GP SC27P50V2JN-L-GP SC33P50V2JN
2

2
R481
DY 1 2PCI_CLKRUN_LAN# SPROM_DIN
SC
16,25,27 PM_CLKRUN#
0R0402-PAD SPROM_DOUT
X6 CL=20pF±0.2pF R483
R479 Freq. Tolerance:±30ppm LAN_LINK100# 1 2 LAN_LINK100#_R 22
PCI_AD16 1 2 LAN_IDSEL
150R2F-1-GP
100R2F-L1-GP-U

LAN_LOWPWR# 27

EXT_POR_L is an
active low signal
used to place the
BCM4401 into IDDQ
mode, <5 mA current
consumption R485
LAN_TX/RX# 1 2 LAN_TX/RX#_R 22
150R2F-1-GP

SB

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Change LAN solution
Title

LAN BCM4401
Size Document Number Rev
SB Custom
Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 21 of 37
A B C D E

3D3V_LAN_S5

LAN/MODEM CONN 21,36,37 3D3V_LAN_S5

JK1

10
TIP RJ11_1
4
3D3V_LAN_S5 RJ11_2 RING 4
B1 3D3V_LAN_S5

1
EC136 B2 EC137
SC1000P3KV8KX-GP B3 SC1000P3KV8KX-GP
LAN_TX/RX#_R 21
1

1
RJ45_7/8
10/100M Lan Transformer DY RJ45_8
DY

2
1
C557 R486 R487 C558 RJ45_7/8
SCD01U16V2KX-LGP SCD01U16V2KX-LGP
SB RJ45_6
RJ45_7
EC140
SB
0R0402-PAD

0R0402-PAD
RJ45_6
2

2
RJ45_4/5 SC1KP50V2KX-LGP
SB U4 RJ45_5

2
RJ45_4/5
SB RJ45_4
2

1 16 RJ45_3 RJ45_3 RJ45_3


21 RX+ RD RX
2 15 RJ45_6 RJ45_2 RJ45_2
21 RX- RD RX
XFR_RDC 3 14 XFR_RXC RJ45_1 RJ45_1
CT CT
A3 LAN_LINK10#_R 21 Yellow LED:TX/RX
A2 3D3V_LAN_S5
XFR_TDC 6 11 XFR_CMT A1 Orange LED:Speed 100
CT CT LAN_LINK100#_R 21
21 TX+ 7 TD TX 10 RJ45_1 9 Green LED:Speed 10

1
8 9 RJ45_2
21 TX- TD TX RJ45+RJ11-2-GP EC138 EC139
22.10177.771 SC1KP50V2KX-LGP SC1KP50V2KX-LGP

2
XFORM-215-GP
68.MGHBS.301
SD SB

1
The symbol use 2nd source R488 R489 R490 R491
W/O LED

75R2F-2-GP

75R2F-2-GP

75R2F-2-GP

75R2F-2-GP
1st source:68.H0022.30A (PLUS)
2nd source:68.MGHBS.301 (TYCO) 1st source: 22.10177.691
2nd source: 22.10177.661 The blowout from the LAN magnetics to the RJ45
connector maintining the distance between the two

2
With LED
1st source: 22.10177.771 to be within 1 inch.
3 LAN_TERMINAL 3
2nd source: 22.10245.H41
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

1
EC141 Hipot layout guide line update space > 50mil
3.No vias, No 90 degree bends. SC1000P3KV8KX-GP

4.pairs must be equal lengths.

2
5.6mil trace width,12mil separation. Rj11 layout guide line update > 100mil
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
SB

10/100 LAN Transformer RJ45 PIN

TD+ --> TX+ RJ45-1


SC TD- --> TX- RJ45-2
CN2
3 RD+ --> RX+ RJ45-3
1 TIP_MDC L11 1 2 MLB160808-GP TIP
RD- --> RX- RJ45-6
2 RING_MDC L12 1 2 MLB160808-GP RING
2 2
4

MLX-CON2-6-GP
20.F0070.002

1st source: 20.F0070.002


2nd source:

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Change LAN solution Title

LAN Connector
Size Document Number Rev
A3
SB Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 22 of 37
A B C D E
3D3V_S0

+5VA 3,4,5,7,9,11,13,15,16,17,18,19,20,24,25,27,29,32,34,36,37 3D3V_S0


5V_S0
SC SB 5V_S3 VDDA
13,14,17,18,19,20,24,25,27,28,32,35,36,37 5V_S0
L32
1 2
BLM18BD601SN-1GP

1
C654 C525 C559 DY

1
SCD047U10V2KX-2GP SC1U10V3KX-LGP SCD1U10V2KX-LGP

2
U70 C560 C561 C562
SC2D2U10V3KX-GP SCD1U10V2KX-LGP SCD047U10V2KX-2GP

2
1 IN OUT 5
SB 2
3
GND
4
SD SB
27 AUDIO_AVDD_ON EN NR

1
TPS793475DBVR-GP C563
SCD1U10V2KX-LGP

2
+5VA=4.75V SB
200mA

SC
HP_OUT_R 24 VDDA
HP_OUT_L 24
EAPD
TPAD30 TP137

1
SPDIF_1
3D3V_S0 1
R584 DY 2
10KR2J-2-GP C633 C634
SCD1U10V2KX-LGP SC10U10V5ZY-1GP

2
33

32
31
30
29
28
27
26
25
U71
SB
SD

AVSS

MONO_OUT
SPDIF_OUT
SPDIF_IN/EAPD/GPIO3
GPIO2
THERMAL PAD

HP_L
AVDD2
HP_R
TO Audio OP
1
2
NC#1 LINE_OUT_R 24
23
AUD_LOR 24 SC
15 CODEC_DOUT SDATA_OUT LINE_OUT_L AUD_LOL 24
15 AZ_BITCLK 3 BIT_CLK GPIO1 22 SPDIF_SHDN 27
AUD_GPIO0 R627 1 2 0R2J-GP HP_NB_SENSE
4 DVSS2 GPIO0 21
DY HP_NB_SENSE 24,27
1

5 20 CAP2
R617 SDATA_IN CAP2
6 DVDD VREF_OUT 19 VREFOUT 24
1

DUMMY-R2 7 18 CODEC_VREF
15 CODEC_SYNC SYNC VREF_IN
R585 8 17
15 CODEC_RST# RESET# AVSS1
1

33R2J-2-GP

1
LINE_IN_R
R586

LINE_IN_L
SENSE_A
2

DUMMY-R2 C635 C636 C655


SB

NC#11
2

MIC_1
MIC_2
SC1U10V3ZY SCD1U10V2KX-LGP SC1U10V3KX-LGP

CD_R
CD_L
15 AZ_DIN0

2
1

BC70
SB
2

DUMMY-C2 STAC9200X5NAEBGP

9
10
11
12
13
14
15
16
1

BC66
SB
2

DUMMY-C2
MIC_IN_R 24
3D3V_S0
MIC_IN_L 24
2

AUD_PC_BEEP_R R625 1 2 0R2J-GP AUD_PC_BEEP


DY
1

C639 C640 C641 VDDA


SC
SCD1U10V2KX-LGP SC1U10V3KX-LGP SC10U6D3V5MXL1GP
2

1
R587
5K1R2F-1-GP
SB 2
1

R588 1 R589
39K2R2F-L-GP 20KR2F-L-GP
2

D D
Q64 Q65
3

2N7002-8-GP 2N7002-8-GP

HP_NB_SENSE 1 1 MIC_SWITCH 24
G G
VDDA
2

S S
1

U72 C580
1 5 SCD1U10V2KX-LGP
16 ICH_SPKR B VCC
2

27 EC_BEEP 2 A R500 C581


PC BEEP 3 GND Y 4 AUD_SYS_BEEP 1 2 AUD_BEEP 1 2AUD_PC_BEEP AUD_PC_BEEP 24
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

39KR2J-GP SCD1U10V2KX-LGP Change to Azalia solution Taipei Hsien 221, Taiwan, R.O.C.
74AHC1G86GV-GP R501 C582
SC1KP50V2KX-LGP Title
-1 2K2R2J-2-GP
2

DY SC AUDIO CODEC STAC9200


SB
2

Place C582 close to the codec input (U71 pin 10, 12) Size Document Number Rev
A3
SB Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 23 of 37
A B C D E

3D3V_S3
23 VREFOUT
3D3V_S0
MIC IN 16,17,18,19,20,25,26,33,37 3D3V_S3
5V_S3

1
R590 R591
4K7R2J-2-GP 4K7R2J-2-GP 13,17,19,23,26,33,34,35,36,37 5V_S3
R592
100KR2F-L1-GP
L35 BLM11A121S-GP JK2

2
R620 4D99R3F-1-GP C658 SC2D2U10V5KX-LGP 1

2
1 2 MIC_IN_L_1 1 2 MIC_IN_L_2 1 2 MIC_IN_L_C 2
23 MIC_IN_L
4 6 4
1 2 MIC_IN_R_1 1 2 MIC_IN_R_2 1 2 MIC_IN_R_C 3
23 MIC_IN_R
R621 4D99R3F-1-GP L36 BLM11A121S-GP 4
23 MIC_SWITCH
C659 SC2D2U10V5KX-LGP 5

1
G1
R593 R594 EC142 EC143 G2
20KR2F-L-GP 20KR2F-L-GP SC100P50V2JN-U SC100P50V2JN-U

2
AUDIO-JK51-GP
22.10088.A31
SC

2
Place on bottom side
SB
3D3V_S0
1st source:22.10088.A31
2nd source:22.10088.A81
LINE OUT

1
R505
100KR2F-L1-GP SB
L37 BLM11A121S-GP LOUT1
SB 1

2
3D3V_S0 SPKR_L+2 1 2 SPKR_L+1 2 D37
HP_NB_SENSE 6 2 5V_S0
SPKR_R+2 1 2 SPKR_R+1 3
1 R519 3D3V_OP_S0 L38 BLM11A121S-GP SPKR_L-_R
2
0R0603-PAD
23,27 HP_NB_SENSE 4
5
3
DY
G1 1
1

3 G2 3

1
C586
10
19

14
18

11
SC1U10V3KX-LGP
9
U73 BC64 BC65 AUDIO-JK51-GP BAV99PT-GP-U
2

SC100P50V2JN-U SC100P50V2JN-U 22.10088.A31 D38


SC
SHDNR#
SHDNL#
SVDD
PVDD

OUTL
OUTR

2
2 5V_S0
C587 SC1U10V3KX-LGP
SB Place on bottom side SPKR_L+_R
1 2 C1P 1 4
3
DY
C1N C1P NC#4
3 C1N NC#6 6 1

Speaker
NC#8 8
C588 SC1U10V3KX-LGP 12
HP_OUT_L1 NC#12 BAV99PT-GP-U
23 HP_OUT_L 1 2 13 INL NC#16 16

5
HP_OUT_R1 15 20 D39
INR NC#20 SPK1 2 5V_S0
C589 SC1U10V3KX-LGP SPKR_L- R538 1 2 0R0603-PAD SPKR_L-_R 1 MLX-CON4-13-GP
SGND
PGND

20.D0174.104 SPKR_R+_R
DY
PVSS

SVSS

1 2 3
GND

23 HP_OUT_R
SPKR_L+ R539 1 2 0R0603-PAD SPKR_L+_R 2
3 1
MAX4411ETP-1-GP SPKR_R+ R540 1 2 0R0603-PAD SPKR_R+_R 4
5

21

17
2

BAV99PT-GP-U
1

SPKR_R- R541 1 2 0R0603-PAD SPKR_R-_R


C642 C643 D40
SB

6
SC47P50V2JN SC47P50V2JN 2 5V_S0
2

1
EC144 EC145 EC146 EC147
SC
1

SC470P50V2KX

SC470P50V2KX

SC470P50V2KX

SC470P50V2KX
SPKR_R-_R
C590
SB DY DY DY DY 1st source : 20.D0151.104
3
DY
SB

2
SC1U10V3KX-LGP 2nd source : 21.D0010.104 1
2

2 5V_S3 5V_OP_S3 BAV99PT-GP-U 2


L39
SB
SB 1 2
MLB-201209-21-GP
SB 5V_OP_S3 R506
DY1KR2J-1-GP
1

1
C592 C657 RN48
3D3V_S0 SB C591 SCD1U10V2KX-LGP
C656
SCD1U10V2KX-LGP SC1U10V3KX-LGP AUDIO_G0
SC10U10V5ZY-1GP SB 4 1
AUDIO_G1
1 2
SB 3 2 1 2
2

2
5V_OP_S3 U74 R508 1KR2J-1-GP
1

SRN100KJ-6-GP
R507
SB SPKR_L+
100KR2F-L1-GP SD 16
LOUT+ 4
8 SPKR_L-
SB
VDD LOUT-
15 PVDD
SC 6 PVDD GAIN0 GAIN1 AV
2

NC#12 12
SPK_SHDN# 19 SHUTDOWN# 0 0 6dB
C593 1 2 AMP_BYPASS 10
D D AUDIO_G0 BYPASS
2 GAIN0 GND 1
SC SCD47U10V3KX-LGP AUDIO_G1 3 GAIN1 GND 11 0 1 10dB
3

GND 13
R626 1 2 0R2J-GP PC_BEEP
DY 23 AUD_PC_BEEP
L_LINE_IN
9
5
LIN+ GND 20
1 0 15.6dB
Q51 HP_NB_SENSE Q53 R_LINE_IN LIN- SPKR_R-
27 NB_MUTE
G
1
2N7002-8-GP
SB G
1
2N7002-8-GP
17
7
RIN- ROUT- 14
18 SPKR_R+

GND
RIN+ ROUT+
From EC From HP Jack 23 AUD_LOL
C595 1 2 1 1 21.6dB
2

S
SC SC S SCD047U10V2KX-2GP TPA6017A2PWPR-GP

21
C596 1 2
SB
1 23 AUD_LOR 1
2

SCD047U10V2KX-2GP
C594
SCD047U10V2KX-2GP
C597
SCD047U10V2KX-2GP Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


1

Taipei Hsien 221, Taiwan, R.O.C.


C644 C645
SC
SC47P50V2JN SC47P50V2JN Title
2

Change to Azalia solution


DY DY
SB AUDIO (2/2)
Size Document Number Rev
SC A3 -2
Key-West / Kinney
SB Date: Friday, December 23, 2005 Sheet 24 of 37
A B C D E
A B C D E

3D3V_S0

3,4,5,7,9,11,13,15,16,17,18,19,20,23,24,27,29,32,34,36,37 3D3V_S0
3D3V_S3

MINI-PCI 16,17,18,19,20,26,33,37 3D3V_S3


5V_S0

13,14,17,18,19,20,24,27,28,32,35,36,37 5V_S0

4 4

3D3V_S0

1
BC61 BC18 BC62 BC60
PCI_AD[31..0] 16,21 SC4D7U10V5ZY SCD1U16V SCD1U16V SCD1U16V

2
PCI_C/BE#[3..0] 16,21
RN47
3D3V_S0 3D3V_S3 WLAN_24_ON 2 3
WLAN_5_ON 1 4
CN9
1

1
125 SRN100KJ-6-GP
R439 R440 TIP MH1 RING U65 3D3V_S0
10KR2J-2-GP DUMMY-R2
SB 1 2
DY 3 4
1
2
A VCC 5
B
2

5 6 3 GND Y 4 LAN_R_ON 13

2
7 8
9 10
TPAD30 TP89 802_ACT_LED 11 12 WLAN_24_ON NC7SZ32M5X-GP
13 14 WLAN_5_ON
27 HW_RADIO_DIS#
15 16
16 INT_PIRQD# 17 18 5V_S0
SB 3D3V_S0
MINI_PIN21
19
21
20
22
INT_PIRQB# 16 SB
3 TPAD30 TP46 23 24 3D3V_S3
3

3 PCLK_MINI 25 26 PCIRST1# 18,21


27 28 3D3V_S0
16 PCI_REQ#3 29 30 PCI_GNT#3 16 SB
SB PCI_AD31
31
33
32
34 MINI_PME# R441 1 2 0R0402-PAD PCI_PME# 21,27
PCI_AD29 35 36 BT_PRIOR
37 38 PCI_AD30 TP91 TPAD30
PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
TPAD30 TP90 WLAN_ACT 43 44 PCI_AD26
PCI_C/BE#3 45 46 PCI_AD24 R442
PCI_AD23 MOD_IDSEL PCI_AD19
47
49
48
50
1 2 SB
PCI_AD21 51 52 PCI_AD22 10R2J-2-GP
PCI_AD19 53 54 PCI_AD20
55 56 PCI_PAR 16,21
PCI_AD17 57 58 PCI_AD18
PCI_C/BE#2 59 60 PCI_AD16
16,21 PCI_IRDY# 61 62
63 64 PCI_FRAME# 16,21
16,21,27 PM_CLKRUN# 65 66 PCI_TRDY# 16,21
SB 16,21 PCI_SERR# 67
69
68
70
PCI_STOP# 16,21

16,21 PCI_PERR# 71 72 PCI_DEVSEL# 16,21


PCI_C/BE#1 73 74
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13
PCI_AD12 79 80 PCI_AD11
2 PCI_AD10 2
81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4
93 94 PCI_AD2
PCI_AD3 95 96 PCI_AD0
5V_S0 97 98
PCI_AD1 99 100
101 102
103 104
105 106
107 108
109 110
111 112 DEBUG_TXD 27
113 114
115 116
117 118 R444
119 120
27 DEBUG_EN# 121 122 1 2 3D3V_S3
123 124 3D3V_S3
MH2 10KR2J-2-GP
126

PCISLT124-2-GP
62.10034.151
1 1
SB
1st source:62.10034.151 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2nd source:62.10043.151 Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI-PCI
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 25 of 37
A B C D E
A B C D E

USB POWER USB PORT

2
EL2 EL1
DLW21SN900SQ2LUGP DLW21SN900SQ2LUGP
5V_USB1_S3
USB_OC#0 16 DY DY
U78
5V_S3 5V_USB1_S3

3
1 8 100 mil USB1
GND OC1#
2
3
IN OUT1 7
6
SB 11
9
SB
27,33 USB_EN# EN1# OUT2

1
4 4 EN2# OC2# 5 1 5 4
1

C109 C107 C108 TC6


C617 SC4D7U10V5ZY SCD1U16V SCD1U16V ST150U6D3VDML3GP R98 1 2 0R0603-PADUSB_PN0_R 2 6 USB_PN2_R R95 1 2 0R0603-PAD
16 USB_PN0 USB_PN2 16

2
SC1U10V3KX-LGP TPS2062D-GP R97 2 0R0603-PADUSB_PP0_R USB_PP2_R R96 2 0R0603-PAD
DY 16 USB_PP0 1 3 7 1 USB_PP2 16 SB
2

SB 4 8
USB_OC#2 16 SB 10
12

SKT-USB-76-U-GP
22.10218.E41 D44
1st source:22.10218.E41
6 USB_PP0_R
2nd source:22.10218.K41

2
USB_PP2_R 1
EL3
USB_OC#4 16
DLW21SN900SQ2LUGP
U79
5V_S3 5V_USB2_S3 DY 5V_USB2_S3
2 5 5V_USB1_S3

1 GND OC1# 8 100 mil


2 IN OUT1 7

3
USB_EN# 3 6
EN1# OUT2
1

1
USB2 USB_PN2_R USB_PN0_R
4 EN2# OC2# 5 SB 3 4
1

C324 C326 C325 TC19 6 SRV05-2-GP


C618 SC4D7U10V5ZY SCD1U16V SC1KP50V2KX-LGP ST150U6D3VDML3GP 1
DY
2

2
SC1U10V3KX-LGP TPS2062D-GP
DY DY
2

R101 1 2 0R0603-PADUSB_PN4_R
SB 16 USB_PN4
R100 1 2 0R0603-PADUSB_PP4_R
2
3 D45
16 USB_PP4
4
5 6 USB_PN4_R
USB_PP4_R 1
3 SKT-USB-97-UGP 3
22.10218.H01
SB 2 5 5V_USB2_S3
1st source:22.10218.H01
2nd source:22.10245.H11
3 4
SRV05-2-GP
DY

SB

2
MDC Connector 2

3D3V_S3

BC71 R618 CN6


1 2 1 2 13 15

1
MH1 14
DUMMY-C2 DUMMY-R2 1 2 C375 C376
3D3V_S3 SC4D7U10V5ZY SCD1U16V

2
15 MDC_DOUT 3 4
U60C 5 6 5V_S3
14

TSLCX08MTCX-GP 7 8
15 MDC_SYNC
15 MDC_RST# 9 15 AZ_DIN1 2 1 ACSDATAIN1_B 9 10 13,17,19,23,24,33,34,35,36,37 5V_S3
8 MDC_RST#_1 R165 33R2J-2-GP 11 12 AZ_BITCLK_MDC 15
27 MDC_RST_DIS# 10 MH2 17
16 18 3D3V_S0

1
7

R619
SC AMP-CONN12A-GP 22R2J-2-GP
3,4,5,7,9,11,13,15,16,17,18,19,20,23,24,25,27,29,32,34,36,37 3D3V_S0
20.F0582.012
DY 3D3V_S3

1 2
16,17,18,19,20,25,33,37 3D3V_S3
1 1st source:20.F0582.012 C216 1
SC22P50V2JN-4GP
2nd source:20.F0604.012
2
DY
SB Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB / MDC CONN.


Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 26 of 37
A B C D E
A B C D E

3D3V_S5 3D3V_S5
KSI[7..0] 28
5V_S0 SB 5V_EC_S0
3D3V_S5 KSO[16..0] 28

1
R569 R570 R535 1 2 0R0603-PAD 3D3V_S5 3D3V_S0
100KR2J-1-GP 100KR2J-1-GP
D30
3,4,5,7,9,11,13,15,16,17,18,19,20,23,24,25,29,32,34,36,37 3D3V_S0

1
2 1

SC4D7U10V5ZY
2

2
3

1
EC_RST EC_RST# C226 C224 3D3V_S5
1

D5 CH751H-40PT SCD1U16V C221 C189 C222 C190

2
R63 BAT54-4-GP D D SC10U10V5ZY-1GP SCD1U16V SCD1U16V SCD01U16V2KX-LGP
DY 4,13,16,19,28,29,30,31,32,33,34,35,36 3D3V_S5

2
100KR2J-1-GP Q60 Q61
DY

13

86

36

76

77
3

1
2N7002-8-GP 2N7002-8-GP U35 5V_S0
4 SD 4

VCCB

AVREF
VCL

VCC
VCC

AVCC
2

2 C210 R156
13,14,17,18,19,20,24,25,28,32,35,36,37 5V_S0
EC_RST#_1 1 PCLK_KBC_RC 2
1 1 2
SC3P50V2CN-1-GP
1
22R2J-2-GP
-1
G SC G
1

127 66 KSO16
3 PCLK_KBC P36/LCLK PD0
2

2
BC7 HP_MUTE# R631 1 2 0R2J-GP HP_NB_SENSE
SC1U10V3KX-LGP
S S
7,18,20,29 PLT_RST1# 126
125
P35/LRESET# PD1 65
64 EXT_TSO# DY
15,29 LPC_LFRAME# P34/LFRAME# PD2 EXT_TSO# 7
2

LPC_LAD0 121 63
P30/LAD0 PD3 PM_THRM# 16
LPC_LAD1 122 62
P31/LAD1 PD4 PROCHOT# 4
LPC_LAD2 5V_CAL_SIO#
SB LPC_LAD3
123
124
P32/LAD2 PD5 61
60
5V_CAL_SIO# 19
P33/LAD3 PD6 HW_RADIO_DIS# 25
R606 1 2 0R2J-GP 59
15,29 LPC_LAD[3..0] PD7 EXPCARD_STBY# 20
DY 131 58 KSO8
SB SB 5V_EC_S0
16,21,25 PM_CLKRUN# P82/CLKRUN# PG0
132 57 KSO9
16 PM_SUS_STAT# P83/LPCPD# PG1
D46 56 KSO10
PG2 KSO11 HDDRSTEN R175 1
2 1 MAX1999_SHDN# 19,33,36 16 PCI_SERIRQ 128 P37/SERIRQ PG3 55 2 10KR2J-2-GP
KSO12
CH751H-40PT DY 3D3V_S0
16 EXT_WAKE# 129 P80/PME# PG4/EXSDAA 54
KSO13
3D3V_S5
-2 R157 16 EXT_SCI# 119
120
PB1/WUE1#/LSCI PG5/EXSCLA 53
52 KSO14
16 EXT_SMI# PB0/WUE0#/LSMI# PG6/EXSDAB
1 2 EC_GATE_A20 130 51 KSO15
P81/GA20 PG7/EXSCLB
10KR2J-2-GP
15 EC_GATE_A20
EC_RST# 8 50 KSO0
SB
35 EC_RST# RES# PF0/TMIA
142 49 KSO1
RESO# PF1/TMIB
1

TPAD30 TP87 MODE0 10 48 KSO2


R154 R155 RN21 MODE1 MD0 PF2/TMOA KSO3 3D3V_S5
9 MD1 PF3/TMOB 47
10KR2J-2-GP 10KR2J-2-GP X1 CL=16pF±0.2pF 3D3V_S5 4 1 KBC_NMI 11 NMI PF4/EXTMIX 46 KSO4
Freq. Tolerance:±50ppm 3 2 KBC_STBY# 12 45 KSO5 RN22
CN11 STBY# PF5/EXTMIY KSO6 GLOBAL_RESET 1
PF6/EXTMOX 44 4 SRN10KJ-5-GP
2

3 DEBUG_EN# R174 SRN10KJ-5-GP 140 43 KSO7 KBC_P91 2 3 3


1 DEBUG_TXD KBC_XTAL_IN_R 1 X1 PF7/TMOY
2 2 141 X2
X1 10R2J-2-GP KBC_XTAL_IN 143 32 KSI0
3 KBC_EXTAL_IN XTAL PE0 KSI1 EXP_OC# R575 1
1 2 144 EXTAL PE1 31 2 10KR2J-2-GP SB
1

CON3-4 TPAD30 TP51 EC_CLKOUT 18 30 KSI2


C214 XTAL-10MHZ-3GP C215 P96/EXCL PE2 KSI3
DY SC22P50V2JN-4GP SC22P50V2JN-4GP TPAD30 TP138
SC PE3 29
KSI4
SB 78 P60/FTCI/KIN0#/TMIX PE4 28
2

KSI5 ATF_INT# R150 1 2 10KR2J-2-GP


1st source:20.D0198.103
SB 24 NB_MUTE 79
80
P61/FTOA/KIN1# PE5 27
26 KSI6
19 FAN1_TACH P62/FTIA/KIN2#/TMIY PE6
81 25 KSI7
2nd source:20.D0210.103 20 EXP_OC# P63/FTIB/KIN3# PE7 BT_SCL R189 1 2 2K2R2J-2-GP
7,13 BIA_PWM
R630 1 2 0R2J-GP BIA_PWM_2
82 P64/FTIC/KIN4# BT_SDA R190 1 2 2K2R2J-2-GP
SC
3D3V_S5 DY 83 P65/FTID/KIN5# PC0 94 SYS_PWRB# 36
SC SD 28 LID_CLOSE# 84
85
P66/FTOB/KIN6#/IRQ6# PC1 93
92
AUDIO_AVDD_ON 23
21,25 PCI_PME# P67/TMOX/KIN7#/IRQ7# PC2 FWH_WP# 29
ICH_PME# R147 1 2 10KR2J-2-GP
112
PC3 91
90 PME_EN#
FWH_TBL# 29 DY
19 FAN1_PWM P10/PW0 PC4
1

TPAD30 TP80 TP30 TPAD30 PCI_PME# R149 1 2 10KR2J-2-GP


R186 R187
110
109
P11/PW1 PC5 89
88
SPDIF_SHDN 23 SB
10KR2J-2-GP 10KR2J-2-GP 13 BREATH_PWM P12/PW2 PC6 MDC_RST_DIS# 26
108 87 PCIE_WAKE# R160 1 2 10KR2J-2-GP
21 LAN_LOWPWR# P13/PW3 PC7 PLT_DLY_RST# 20
R596 DUMMY-R2 GLOBAL_RESET TP52 TPAD30 LCD_TST R188 1 2 10KR2J-2-GP
SB
13,30 BT_SCL 14 P52/EXSCK1/SCL0 P90/IRQ2#/ADTRG# 24
DY
2

MODE0 KBC_P91
MODE1
1 2 SB 13,30 BT_SDA 17 P97/SDA0 P91/IRQ1# 23
ACAV_IN# RN18
1 2 19,29 SMBC_KBC 135
138
P86/IRQ5#/SCK1/SCL1 P92/IRQ0# 22
21
SB SMBC_KBC 2 3
19,29 SMBD_KBC P42/TMRI0/SDA1 P93 ICH_SLP_S3# 16
R597 DUMMY-R2 SMBD_KBC
BID0 39
P94 20
19
RUN_PWROK 32,34 1 4 SD
PA2/KIN10#/PS2AC P95 ICH_SLP_S5# 16
BID1 SRN4K7J-8-GP
SB BID2
38 PA3/KIN11#/PS2AD USB_EN#
BID3
37
35
PA4/KIN12#/PS2BC P40/TMCI0 136
137 TP84 TPAD30
USB_EN# 26,33 SB
2 PA5/KIN13#/PS2BD P41/TMO0 RN50 2
28 TCLK_5 34 PA6/KIN14#/PS2CC P43/TMCI1 2 AUX_EN 33,36
33 3 RUN_ON_D 2 3 SRN100KJ-6-GP
28 TDATA_5 PA7/KIN15#/PS2CD P44/TMO1 EC_BEEP 23
5V_EC_S0 SUS_ON
-2 103
P45/TMRI1 4
5
RUN_ON_D 34,36 1 4
13 BAT_LED1# P20 P46 SUS_ON 16,33,36 3D3V_S5
102 6 RN51
13 BAT_LED2# P21 P47 RCIN# 15
TPAD30 TP28 PS_ID 101 RUN_ON 2 3 SRN100KJ-6-GP
TPAD30 TP27 PS_ID_DISABLE# P22 ALW_ON
100 P23 P50/EXTXD1 16 FPBACK 13 1 4
1

2
31 CHG_I_SEL 99 P24 P51/EXRXD1 15 LCD_TST 13
R181 R180 R177 R193 98
DUMMY-R2 DUMMY-R2 31 CHG_ON# P25
10KR2J-2-GP 10KR2J-2-GP R191 RN52
SB 31 4CELL# 97
96
P26 PA0/KIN8# 41
40 HDDC_EN#
HDDRSTEN 18
10KR2J-2-GP 4CELL# 2 3 SRN100KJ-6-GP
TPAD30 TP29 P27 PA1/KIN9# TP48 TPAD30 CHG_I_SEL 1 4
2

1
68 107 ACAV_IN#
23,24 HP_NB_SENSE P70/AN0 P14/PW4 EEPROM_WC 29
2

BID0 69 106
7,13 LCDVDD_ON P71/AN1 P15/PW5 ICH_PCIE_WAKE# 16 D
BID1
BID2
30,31 PBAT_PRES# 70
71
P72/AN2 P16/PW6 105
104
PM_PWRBTN# 16
Q62
SB
20 EXP_CARD_PRES# P73/AN3 P17/PW7 ICH_PME# 16

3
BID3 72 2N7002-8-GP
20 PCIE_WAKE# P74/AN4
1

ATF_INT#
19 ATF_INT# 73 P75/AN5 PB2/WUE2# 118 SCRLK_LED# 13 SD
1

R179 R176 74 117


DUMMY-R2 DUMMY-R2 19 THERMTRIP_SIO P76 PB3/WUE3# NUM_LED# 13
R178 R192
10KR2J-2-GP 10KR2J-2-GP
7 GBKLT_EN 75 977 P77 PB4/WUE4# 116 CAPS_LED# 13 1 ACAV_IN 31,36
PB5/WUE5# 115 ALW_ON 36 G
DEBUG_TXD 133 114
25 DEBUG_TXD P84/IRQ3#/TXD1 PB6/WUE6# RESET_OUT# 16

2
DEBUG_EN#
SB 25 DEBUG_EN# 134 P85/IRQ4#/RXD1 PB7/WUE7# 113 RUN_ON 13,34,36 SB
2

BID3 BID2 BID1 BID0 Board Rev.


AVSS
VSS
VSS
VSS
VSS
VSS

1 ---------------------------------------- 1

RE144AV-GP
0 0 0 0 NFF
7
42
95
111
139

67

0 0 0 1 X00 Wistron Corporation


0 0 1 0 X01 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0 0 1 1 X02
0 1 0 0 X03 Taipei Hsien 221, Taiwan, R.O.C.
0 1 0 1 A00 Title
0 1 1 0 A01
KBC_H8S/RE144AV
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 27 of 37
A B C D E
A B C D E

+3D3VRTC

INTERNAL KEYBOARD CONNECTOR POWER BUTTON 15,19,33,36 +3D3VRTC


3D3V_S5

+3D3VRTC
4,13,16,19,27,29,30,31,32,33,34,35,36 3D3V_S5
SB 5V_S0
KSI[7..0] 27 KSO[16..0] 27
4 4

1
13,14,17,18,19,20,24,25,27,32,35,36,37 5V_S0
R32
10KR2J-2-GP

2
CN4 R33
PWRBTN# 1 2 PWR_BTN# 19,36
KSO10 1 27
KSO10 NC#27

2
KSO11 2 26 SW1 470R2J-2-GP
KSO11 NC#26

1
KSO9 3 PUSH-SW31-U2-GP
KSO14 KSO9 KSI7 BC3 BC4
4 KSO14 KSI7 25 6 5
KSO13 5 24 KSI6 SCD1U16V SCD1U16V
KSO13 KSI6

2
KSO15 KSI4
KSO16
6 KSO15 KSI4 23
KSI2 DY DY
7 KSO16 KSI2 22
Cover Switch

4
KSO12 8 21 KSI5 3D3V_S5
KSO0 KSO12 KSI5 KSI1 D15
KSO2
9
10
KSO0 KSI1 20
19 KSI3
SB 2
KSO1 KSO2 KSI3 KSI0 62.40008.061
11 KSO1 KSI0 18
KSO3 12 17 KSO5 3
KSO8 KSO3 KSO5 KSO4
KSO6
13
14
KSO8 KSO4 16
15 KSO7
1st source : 62.40008.061 1
KSO6 KSO7
2nd source : 62.40009.191 3D3V_S5
HRS-CON25-1-GP BAV99PT-GP-U
20.F0694.025

1
R237
100KR2J-1-GP
3
1st source : 20.F0694.025 CN13 3
2nd source : 20.F0642.025 4 R236

2
2 LID_SW 2 1 LID_CLOSE# 27

1
1 22R2J-2-GP
3 EC82 C249
SCD1U50V3ZY-GP SCD1U10V2KX-LGP

2
MLX-CON2-6-GP
20.F0070.002 DY
SD
SB
SC

TouchPad Connector 5V_S0


2 2

1
KSO5 KSO8 KSI5 KSI7 R396 R398
KSO4 KSO3 KSI1 KSI6 10KR2J-2-GP 10KR2J-2-GP CN5
KSO7 KSO1 KSI3 KSI4 9
KSO6 KSO2 KSI0 KSI2 8

2
7
27 TDATA_5 6
5
8
7
6
5

8
7
6
5

8
7
6
5

8
7
6
5

27 TCLK_5 4
RC3 RC2 RC4 RC1 3
SRC100P50V-U SRC100P50V-U SRC100P50V-U SRC100P50V-U 2
DY DY DY DY SB

1
SB 1
1
2
3
4

1
2
3
4

1
2
3
4

1
2
3
4

BC55 BC56 BC53 BC54 10

SCD1U16V
SC47P50V2JN

SC47P50V2JN

SC1U10V3ZY
2

2
MLX-CON8-7-GP
20.K0185.008

KSO16 KSO0 KSO14


KSO12 KSO9
KSO15 KSO11
1st source : 20.K0185.008
KSO13 KSO10 2nd source : 20.K0212.008
1 <Variant Name> 1
8
7
6
5

8
7
6
5
1

RC5 RC6
C211 SRC100P50V-U SRC100P50V-U Wistron Corporation
SC100P50V2JN-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY DY
2

DY SB Taipei Hsien 221, Taiwan, R.O.C.


1
2
3
4

1
2
3
4

Title
for EMI KB / TPAD / LID SW / PWR BTN
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 28 of 37
A B C D E
A B C D E

3D3V_S5

4,13,16,19,27,28,30,31,32,33,34,35,36 3D3V_S5

512KB Flash Unused FGPI pins must not be float

RP1
SELECT_FWH 1 10
FWH_FGPI4 2 9
LPC_LAD[3..0] 15,27
4 FWH_FGPI3 3 8 4
FWH_FGPI2 4 7 FWH_FGPI1
5 6 FWH_FGPI0

SRN10KJ-L3-GP
3D3V_S0
SB
LPC_LFRAME# 15,27
FWH_INIT# 15

1
PCLK_FWH 3
C242 C241
PLT_RST1# 7,18,20,27
SCD1U16V SC1U10V3ZY

1
SELECT_FWH

R227
SB

25
32

23
24
31

29
2
U40 DUMMY-R3

R/C#/CLK
WE#/FWH4
OE#/INIT#

RST#
VDD
VDD

IC

2
3D3V_S0
RN20 PCLK_FWH_RC

2
1 4 12 13 LPC_LAD0
A0/ID0 DQ0/FWH0 LPC_LAD1 C243
2 3 11 A1/ID1 DQ1/FWH1 14
10 15 LPC_LAD2 DUMMY-C3
SRN10KJ-5-GP A2/ID2 DQ2/FWH2 LPC_LAD3
9 A3/ID3 DQ3/FWH3 17
27 FWH_TBL# 8 A4/TBL# DQ4/RES 18
27 FWH_WP# 7 A5/WP# DQ5/RES 19

1
FWH_FGPI0 6 20
FWH_FGPI1 A6/FGPI0 DQ6/RES
5 A7/FGPI1 DQ7/RES 21
FWH_FGPI2 4
3 FWH_FGPI3 A8/FGPI2 3
3 A9/FGPI3
FWH_FGPI4 30 A10/FGPI4
SCOKET:

NC#27
NC#26
NC#22
NC#1
62.10002.032
VSS
VSS
28
49LF004B334C-GP
62.10005.032
16

27
26
22
1
1st source:72.49004.F03 (SST) 72.49004.F03 3D3V_S0
2nd source:72.49004.G03 (PMC)
3rd source:72.39040.J03 (Winbond) SB

SMBus address A2
2 2
User Password

3D3V_S5 3D3V_S5
C188
U32 1 2

1 8 SCD1U10V2KX-LGP
A0 VCC
2 A1 WP 7 EEPROM_WC 27
3 A2 SCL 6 SMBC_KBC 19,27
4 GND SDA 5 SMBD_KBC 19,27

AT24C04N-10SU-GP
72.24C04.E01

The symbol use 2nd source


1st source:72.24C04.G01 (ST)
2nd source:72.24C04.E01 (ATMEL)

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BIOS
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 29 of 37
A B C D E
A B C D E

3D3V_S5
Adaptor in to generate DCBATOUT
4,13,16,19,27,28,29,31,32,33,34,35,36 3D3V_S5
AD+

ADAPTER IN
DCIN1
AD+ 31,37 AD+
BT+
4

4 L10
Layout 200mil U2
31,37 BT+
4
1 AJ_DC+ 1 2 AD_JK 1 S D 8
SCHOKE-D-GP 2 S D 7

1
3 S D 6
2 EC86 AD+_2 4 G D 5
SCD1U50V3ZY-GP

1
for EMI AO4407-1-GP SD

1
3 BC44

1
SC1KP50V2KX-LGP R8 EC1
SD

2
5 200KR2J-L1-GP BC43 SCD1U50V3ZY-GP

2
6

SCD1U50V3ZY-GP
2
MH1 Place near U2

2
SKT-JACK-132-GP-U1
22.10037.A41

1
R7
1st source:22.10037.A41 100KR2J-1-GP
SD
SB 2nd source:22.10037.A31

2
3 3

3D3V_S5

D2 D3 D16
2 2 2

3 3 3
2 2

1 1 1
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U

BATTERY CONNECTOR
CN7
7
SB 1

PBAT_PRES#_R 2
BT+ 3
R525 1 2 100R2F-L1-GP-U BT_SCL_R 4
13,27 BT_SCL
R524 1 2 100R2F-L1-GP-U BT_SDA_R 5
13,27 BT_SDA
G6 R526 1 2 100R2F-L1-GP-U 6
27,31 PBAT_PRES#
31 BT+SENSE 1 2 8

GAP-CLOSE SYN-CON6-3-GP-U
1st source:20.80304.006
1

20.80304.006 2nd source:20.80385.006


1

1
BC5 1
BCC1 SC1KP50V2KX-LGP
2

SCD1U50V3ZY-GP
SB
2

SD SB Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Pin3 is System present#
Title

Adaptor/ Bettery conn.


Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 30 of 37
A B C D E
A B C D E

3D3V_S5

4,13,16,19,27,28,29,30,32,33,34,35,36 3D3V_S5
DCBATOUT

13,33,34,35,36,37 DCBATOUT
AD+
RX DCBATOUT
AD+
30,37 AD+
U3 R29 L13 U47
8 D S 1 AD+_TO_SYS 1 2 DCBATOUT_BEAD 1 2 1 S D 8 BT+
D S S D BT+
7 2 BLM41PG600-GP 2 7
6 D S 3 D01R3720F-L 3 S D 6 30,37 BT+

1
5 D G 4 Place near U3 4 G D 5
C17 R342 pin1~3 DCBATOUT_BEAD
4 4

1
SC1KP50V2KX-LGP 100KR2F-L1-GP AO4407-1-GP AO4407-1-GP

1
DY EC5
SD C266
SCD1U50V3ZY-GP 32,37 DCBATOUT_BEAD

2
SCD1U50V3KX-GP G3 G2

2
MAX1909_ACIN

GAP-CLOSE-PWR
1
AC_IN Threshold 2.089V Max. SD

1
R527 MAX1909_PDL
AC_IN > 2.089V --> AC R341 10R5J-L-GP GAP-CLOSE-PWR

1
DETECT 13KR3F-GP

2
2
SB SB
D6

1
DCBATOUT
AD+ 1 2
C78
SD AD+_TO_SYS
1

CH521S-30-GP-U MAX1909_REF

SCD1U50V3KX-GP
2

1
R528
10R5J-L-GP
SD C80 C79
SD MAX1909_LDO

SB

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
2

2
1

1
Near MAX1909
2

C77
Pin 2

1
MAX1909_DC_IN_R R58

SCD1U50V3KX-GP
2
1

41K2R2F-GP 1 2 C57 C54 C52 C53 C652

4
3
2
1
CSSN1
MAX1909_LDO C56 Close to SC1U10V3ZY U11 SCD1U50V3ZY-GP SC10U25V0KX-L-GP SC10U25V0KX-L-GP SC2200P50V2KXLGP

2
MAX1909_REF SCD1U50V3ZY-GP

G
S
S
S
MAX1909

MAX1909_DHIV
2

SB

26

25
pin 24

2
SD U13
R56
SD SB

CSSP

CSSN
33R2J-2-GP
1

D
D
D
D
1

R228 R60 R59 MAX1909_PDS27 22 SI4431BDY-E3-GP


PDS DHIV

5
6
7
8
30K1R3F-GP R306 15K4R3-GP 42K2R2F-L-GP MAX1909_SRC24 28 Near MAX1909
100KR2F-L1-GP MAX1909_DC_IN 1 SRC PDL
DCIN LDO 2 Pin 21 BT+
2

1
R301
2

MAX1909_DLOV
3
SB SC SB MAX1909_VCTL 11
DLOV 21 C76
SC1U10V3ZY CHG_PWR-2 1
L15
2CHG_PWR-3 1 2 3
VCTL

2
MAX1909_ICTL 10 IND-15UH-35
ICTL
1

D MAX1909_MODE 7 D015R3720F-L
MODE MAX1909_DHI
R624
DHI 23 SC
1

52K3R2F-L-GP
SD
R307 3 ACIN SB

5
6
7
8

1
49K9R2F-L-GP U12
2

MAX1909_IINP
SC 1 8 TC12 TC13

D
D
D
D
27 CHG_I_SEL IINP SC10U25V0KX-L-GP
G 20 MAX1909_DLO SC10U25V0KX-L-GP
DLO
2

2
Q35 D MAX1909_CLS 9 CLS
2

D 2N7002-8-GP MAX1909_LDO
3

S R304
3

1 2 31K6R2F-GP 6 ACOK PGND 19

G
S
S
S
R305 SI4800BDY-T1

4
3
2
1
27 CHG_ON# 1 27,36 ACAV_IN 1 2 PGND 29
1 G 49K9R2F-L-GP
27 4CELL#
G Q34 R57 18
CSIP
2

QB1 2N7002-8-GP
SB 1 2 5 PKPRES
2

SB 2N7002-8-GP
S
S 1KR2J-1-GP
27,30 PBAT_PRES#
MAX1909_CCV 13 17
MAX1909_CCI CCV CSIN
12 CCI BATT 16 BT+SENSE 30
1

4CELL# is "H" MAX1909_CCS 14 CCS GND 15


R44
then BATT is 3 serial.
REF

SD 10KR2J-2-GP
1

MAX1909ET-GP
2

4
1

R45 C44
1

C47 20KR3F-GP SCD01U50V3KXL2GP V_REF :4.2235V (<500uA)


2

SCD1U50V3KX-GP C46
2

SCD01U50V3KXL2GP
2

C45 ISOURCE_MAX =
MAX1909_REF

SCD01U50V3KXL2GP
(0.075/RX)*(VCLS/VREF) = 2.84A
2

R302
49K9R2F-L-GP
2

2 2
MAX1909_CLS
1

C55
SC1U10V3ZY R303
2

33KR2F-GP
CHG current CHG_ON# CHG_I_SEL
SB
2

0A H L 3D3V_S5
SD G8
1.25A L H 1 2

1
3.0A L L GAP-CLOSE-PWR R290
100KR2F-L1-GP

2
PBAT_PRES#
SB

SB

1 1

SB
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SB CHARGER MAX1909
Size Document Number Rev
C
Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 31 of 37
A B C D E
A B C D E

-2
CPU_CORE-MAX1907 MAX1907_VDD
5V_S0 5V_S5

MAX1907_VCC

1
DCBATOUT_BEAD

1
R28
3D3V_S0 R3 C10 0R3-U-GP R2 DCBATOUT_BEAD
SD DUMMY-R3
-2

10R3J-3-GP
1 2

2
C2 SCD1U50V3KX-GP
-2

2
1 2 MAX1907_VDD
2

1
C661 C662
R23 R26 R25 SC4D7U10V5ZY
4 SD DY 4

1
2K2R2J-2-GP D D

100KR2J-1-GP

100KR2J-1-GP

DUMMY-C5

DUMMY-C5
1
C14 C16 C263 C264 C11 C15 C265 C653 TC10 TC22

10

34

SC2200P50V2KXLGP

SE100U25VM-L1-GP

SE470U25VM-L-GP
U1 SC4D7U10V5ZY D1

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
1

2
SSM5818SLPT-GP Q30 Q4

V+
VCC

2
IRFR3707Z IRFR3707Z
VDD 30
1 1
SD

2
R24 C9
3 CLK_PWRGD#
SYSPOK
38
36
CLKEN#
31 1 2 1 2
SD G G
SYSPOK BST

3
VGATE 0R3-U-GP
37 IMVPOK SCD1U50V3KX-GP
S S IR/12.5mOhm SB
MAX1907_S0 MAX1907_DH @4.5V/Qg=9.6nQ
MAX1907_S1
4 S0 DH 33 SB VCC_CORE_S0
MAX1907_S2
5 S1 MAX1907_LX
-1
6 S2 LX 32 SB Cyntec/ 2.3mOhm/ 28A
29 MAX1907_DL L1
H_VID0 DL
5 H_VID0 26 D0 1 2
H_VID1 R21 IND-D68UH-15-GP
5 H_VID1
H_VID2
25
24
D1
28 1 2
SD
5 H_VID2 D2 PGND
H_VID3 200R2F-L-GP
5 H_VID3 23 D3 SD DY

1
H_VID4 22
5 H_VID4 D4
H_VID5 21 C8 R529 R36 TC11 TC3 TC4 TC2
5 H_VID5 D5

1
18 1907_CSP1 1 2 R20 DUMMY-R5 3K83R2F G4
CSP

2
MAX1907_B0 1907_CSN1 D D

SE330U2VDM-7GP

SE330U2VDM-7GP

SE330U2VDM-7GP

SE330U2VDM-7GP
1 B0 CSN 19 1 2
MAX1907_B1 2 SC1KP50V2KX-LGP 200R2F-L-GP
B1

2
4

4
MAX1907_B2 R18 GAP-CLOSE-PWR
3 B2 SC

1 2

2
17 MAX1907_OAIN+ C7 1 2 Q31 BC72 R35
R4 OAIN+ MAX1907_OAIN- 1 110R2F-L-GP IRFR3709Z
OAIN- 16 2 1 2 1 2
1 2 7 1 1 C599
27,34 RUN_PWROK SHDN# DUMMY-C3
3 1KR2J-1-GP SC470P50V2KX R19 G G 6K81R2F-1-GP NTC-10K-9-GP 3

Ton=NC, Freq.=300KHz 1 2

3
40 15 C6 S Q3 S C38
TON FB
1

0R2J-GP IRFR3709Z
1 2 IR/8.2mOhm SB 1 2 Panasonic/ 2V/ 330uF

2
R255 C1
DUMMY-R2 MAX1907_CC 12 SC100P50V2JN-U @4.5V/Qg=17nQ SCD1U50V3KX-GP 9mOhm/ 3A
1 2 CC SB

1
14 R22 G7
NEG

1
SC270P50V2JN G5
1 2
787R3F-GP
SB SB
SD SD
2

8 13 MAX1907_NEG GAP-CLOSE-PWR
MAX1907_REF REF POS

2
R278 GAP-CLOSE-PWR

2
MAX1907_ILIM 9 MAX1907_POS 1907_CSP
ILIM 1 2
DY
1

1
DPSLP#

11 130R3F-GP
C3 R254 GND R279
27 41
TIME

DDO# NC#41
SUS

SC1U10V3ZY 150KR2F-L-GP 1K18R2F-GP R277 R431


2

1 2 1 2 GMCH_PWROK 7
MAX1907AETL-1-GP 0R2J-GP
2

20

35

39

2
R253 4K7R2F-GP R430
SB 1 2 G1 VGATE 1 2
PM_STPCPU# 0R2J-GP
3,16 PM_STPCPU# 1 2 SD
1

100KR2F-L1-GP 3D3V_S0
offset 1.2%
2

PM_DPRSLPVR R6 GAP-CLOSE
16 PM_DPRSLPVR 30K1R3F-GP
R252
64K9R2F-N1-GP U64
SD 1 NC VCC 5
2

CLK_PWRGD#
SD 2 A
1

3 GND Y 4 VRM_PWRGD 16
NC7S14-U
2 2
DY

OCP=30A, Vally current = 27.5A,


Vilim=550mV(55mVp-p*10) VCCP_GMCH_S0
3D3V_S5

1
SYSPOK

1
R1 D
R17 10KR2J-2-GP

3
4K7R2J-2-GP
Boot-up Voltage : 1.2V VID Vcore
Deeper Sleep Voltage : 0.748V

2
, B0=L, B1=L, B2=Open VID5 VID4 VID3 VID2 VID1 VID0 V Q2

2
, S0=L, S1=H, S2=Open, 1
2N7002-8-GP
0 1 0 1 1 1 1.340 G

2
5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 0 1 1 0 0 0 1.324 SD 1 Q1
MMBT3904LT1-2-GPS

1
0 1 1 0 1 0 1.292

2
1

C5 R16
R248 R247 R246 R251 R250 R249 0 1 1 1 0 0 1.260 SCD1U50V3ZY-GP 22KR2J-3-GP

2
DUMMY-R2 20KR2F-L-GP DUMMY-R2 DUMMY-R2 DUMMY-R2 DUMMY-R2
0 1 1 1 0 1 1.244

2
2

0 1 1 1 1 1 1.212
2

MAX1907_S0 MAX1907_S1 MAX1907_S2 MAX1907_B0 MAX1907_B1 MAX1907_B2


1 1 0 0 0 0 1 1.180 1
1

1
1

R266 R264 R273 1 0 0 0 1 1 1.148


R269 DUMMY-R2 DUMMY-R2 R276 R275 DUMMY-R2
20KR2F-L-GP 20KR2F-L-GP 20KR2F-L-GP 1 0 0 1 1 0 1.100 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 0 1 0 0 1 1.052 Taipei Hsien 221, Taiwan, R.O.C.
2

1 0 1 0 1 1 1.020 Title

1 0 1 1 1 0 0.972 IMVP IV-CPU POWER-MAX1907


Size Document Number Rev
1 1 0 0 0 0 0.940 A3
Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 32 of 37
A B C D E
A B C D E

SYSTEM DC/DC 3D3V_S3 / 5V_S3 16,17,18,19,20,25,26,37

4,13,16,19,27,28,29,30,31,32,34,35,36
3D3V_S3

3D3V_S5
3D3V_S3

3D3V_S5

13,17,19,23,24,26,34,35,36,37 5V_S3 5V_S3


SB
13,32,34,36 5V_S5 5V_S5
R530
+3V_SRC 3D3V_S3 1 2 13,31,34,35,36,37 DCBATOUT DCBATOUT
DCBATOUT
10R5J-L-GP 5V_S5 MAX1999_VCC
4 3D3V_S3 R573 1 2 5V_S3 5V_S3 4
0R5J-5-GP R88 R356
1 2 MAX1999_V+ 1 2 G40

5V = 5Arms, 1 2

1
10R5J-L-GP 47R2J-L2-GP
SB C92 C93 C292 GAP-CLOSE-PWR
SC SC
OCP>6.8A
4
5
6

3
SC1U50V5ZY-1-GP SCD1U50V3ZY-GP SC1U10V3ZY G41

2
S
D
D
U58 D20 1 2
SI3456BDV-T1-GP
SD BAW56PT-U
DCBATOUT GAP-CLOSE-PWR
DY

1
G42

2
C124 C123 1 2
SD

SC4D7U25V5KX-GP
G
D
D

SCD1U50V3ZY-GP
2

2
GAP-CLOSE-PWR
SD
3
2
1

1
MAX1999_BST3 MAX1999_BST5 G43
SC

8
7
6
5
C95 C94 C105
SD SD SC 1 2

5
6
7
8
U26 U17 SCD1U50V3ZY-GP

D
D
D
D

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
36 3VSUS_ON

2
1

D
D
D
D
GAP-CLOSE-PWR
C307 R366 R338 C279 G44
3V = 4Arms, SCD1U50V3ZY-GP 0R3-U-GP 0R3-U-GP SCD1U50V3ZY-GP 1 2

20

17
2

2
U55 CLOSE TO
OCP>6A SB CMOS SB 5V_S3 GAP-CLOSE-PWR

S
S
S
G

V+

VCC
1

1
FDS6612A-1-GP
SC SC

G
S
S
S
1
2
3
4
MAX1977_BST3R MAX1999_BST5R FDS6612A-1-GP
28 BST3 BST5 14 SB

4
3
2
1
+3V_SRC TAI-TECH/ 20mOhm/ 5A
TAI-TECH/ 20mOhm/ 5A For Power debug
MAX1999_DH3 26 16 MAX1999_DH5
L21 DH3 DH5 L19
1 2 MAX1999_LX3 27 15 MAX1999_LX5 1 2
3 IND-8UH-2 LX3 LX5 IND-8UH-2 3
MAX1999_DL3 MAX1999_DL5
SC 8
24 DL3 DL5 19 SC
7
6
5

5
6
7
8

1
U25 U20
D
D
D
D
22 OUT3 OUT5 21

1
D
D
D
D
TC14
1

MAX1999_FB3 MAX1999_FB5 C91 ST150U6D3VDML4GP


SB 7 FB3 FB5 9

2
C103 SC47P50V2JN
SC47P50V2JN SC

2
-2
1 2
1

S
S
S
G

R354
1

1
TC18 FDS6690DS-GP MAX1999_ON3
SB

G
S
S
S
3 ON3
1
2
3
4

ST150U6D3VDML4GP R86 R94 MAX1999_ON5 MAX1999_PRO# FDS6690DS-GP R87 R84


4 ON5 PRO# 10 1 2 SC
2

4
3
2
1
1

1
6K98R3F-GP 2MR3-GP 2MR3-GP 15K4R3-GP
SB C89 6
NC#1 1
100KR2J-1-GP C90
SC100P50V2JN-U SHDN# SC100P50V2JN-U
DY
2

2
Kemet/ 6.3V/150uF
Kemet/ 6.3V/150uF 11 MAX1999_ILIM
ILIM5 40mOhm/ 1.8A
40mOhm/ 1.8A
1

MAX1999_VCC

1
19,27,36 MAX1999_SHDN# 13 TON
R83 R82 R85
10KR3F-L-GP R360 1 2 1KR2J-1-GP
ILIM3 5
10KR3F-L-GP SB
SB DY 2 1
These components should be SC R595 1 2 1KR2J-1-GP 8 2 300KR2J-GP
located near by MAX1999 REF PGOOD SUSPWROK_1999 34
2

2
2
SUS_ON R353 1 2 1KR2J-1-GP These components should be
12 23 R81
SKIP# GND 200KR2J-L1-GP
located near by MAX1977

LDO3

LDO5
MAX1999_REF

1
2 2
Vref = 2V SB

25

18
MAX8734AEEI-GP
SB
2

MAX1999_VCC
+3D3VRTC 5V_S5 C289
3V_LDO=100mA SB 5V_LDO=100mA
SCD22U16V3ZY-GP MAX1999_LDO3 MAX1999_LDO5 5V_S5
1

U56
1

1
G34 ILIM5: 5V * 200K / (200K+300K) = 2.0V
1 5 R355 1 2 200mV / 24 = 8.3A R531
27,36 AUX_EN A VCC 300KR2J-GP
2 100KR2J-1-GP
16,27,36 SUS_ON B OCP point = 8.3A +1/2Iripple
3 4 1999_ON3 GAP-CLOSE-PWR
GND Y
1

1
SD -2
2

2
MAX1999_SKIP# C293 C291 ILIM3: 5V * 200K / (200K+300K) = 2.0V
NC7SZ32M5X-GP DY SC4D7U6D3V3KX-GP SC4D7U10V5KX-N2
200mV / 24 = 8.3A MAX1999_PRO#
2

2
3D3V_S5
OCP point = 8.3A +1/2Iripple
G33 SB OCP point = 20A +1/2Iripple 3D3V_S3
SC 1 2
U81
USB_EN# high = SKIP GAP-CLOSE-PWR 5V_S5 spec. = 10mA

1
USB_EN# low = PWM ILIM*=Vcc 100mV
1

4 3 R576
EC90 ILIM*=Vref 200mV 10KR2J-2-GP
MAX1999_SHDN# SC1U10V3ZY MAX1999_DL5
26,27 USB_EN# 5 2 SB OCP= 0.1Vth/Rds(on) + 0.5Iripple
2

2
1

1
MAX1999_PRO# 6 1 C619 C620 SUSPWROK_1999
MAX1999_ON3 SCD1U50V3KX-GP SCD1U50V3KX-GP
SD
2

2
MAX1999_ON5
2N7002DW-7F-GP 15V_C 5V_C
SB SB
1

3
1 1
C290 C302 D41 D42
-2 SKIP# > 2.4V : PWM mode DUMMY-C2 DUMMY-C2 BAT54S-2-GP BAT54S-2-GP
SKIP# = GND( ,0.8V) : SKIP MODE
SKIP# = REF (1.7V~2.3V)/FloatING
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

1
Ultrasonic MODE(25KHz min) +15V 10V_C 5V_S3 Taipei Hsien 221, Taiwan, R.O.C.
1

G18 C632 C621 Title


SCD1U50V3KX-GP SCD1U50V3KX-GP
1 2
DC/DC 3V_S3/5V_S3
2

Size Document Number Rev


GAP-CLOSE SD SB A3
Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 33 of 37
A B C D E
A B C D E

For 1.5V
SETTING=1.517V R381 C318
1D5V_S3 TI TPS5130 for 1.5V, 1.8V, 1.05V.
R384
1 2 1
680R2J-3-GP SC4700P50V2KX
2
(1D5V=>CH1 , 1D8V=>CH2 , 1D05V =>CH3) OCP_1.05V
1 2
R378
10KR3F-L-GP 1 2
SB R376 DCBATOUT
1 1 2
R377 7K87R2F-GP
3K9R2F-GP 5130_TRIP1 20KR3F-GP
C316
4 1 2 4
1 2

For 1.05V 1D05V_S0


SD SCD1U50V3KX-GP
C319 5130_INV1 SETTING=1.061V R363 C304
SC4700P50V2KX 1 2 1 2 5V_S5 close to IC
2

5130_FB1 R365
680R2J-3-GP SC5600P25V2KX
1 2 OCP_1.8V

3
R362
For 1.8V 80K6R3F-1-GP 1 2 D24 R375 DCBATOUT
1D8V_S3 BAW56PT-U 1 2
SETTING=1.8V

1
R379 C317 20KR2F-L-GP
1 2 1 2 R364 5130_LH1 5130_TRIP2 20KR3F-GP

2
R383 2K7R2J-4-GP C315
1 2 680R2J-3-GP SC5600P25V2KX C118 1 2
R380 5130_LL1
1 2 5130_LL1 35 SD G22

1 2
10K2R3F-GP 1 2 SCD1U50V3KX-GP 1 2
1

SCD1U25V5KX-1GP
R382 11K3R2F-2-GP C305 5130_INV3 5130_OUT1U close to IC GAP-CLOSE
2KR2F-3-GP 5130_OUT1U 35
SC3300P50V2KX-1GP 5130_OUT1D
5130_OUT1D 35

2
5130_FB3
OCP_1D5V
1 2

5130_TRIP1 R361 DCBATOUT


DCBATOUT 1 2
C320 5130_INV2 5130_TRIP2
SC3300P50V2KX-1GP 5130_TRIP3 20KR3F-GP
2

5130_FB2 5130_FLT C303


1 2

1
R336 5130_FLT 5130_OUT2D
1 2 C119 5130_INV1
5130_OUT2D 35 SD SCD1U50V3KX-GP
5V_S5 SCD01U50V3KXL2GP
3
close to IC 3

2
100KR2J-1-GP

48
47
46
45
44
43
42
41
40
39
38
37
U24
C117

FLT

TRIP2
INV1

LH1
OUT1_U
LL1

OUTGND1
TRIP1
OUT1_D

VIN_SENSE12

OUTGND2
OUT2_D
5130_LH2 1 2 5130_LL2
5130_LL2 35
6

U52 SCD1U25V5KX-1GP
2N7002DW-7F-GP
close to IC DCBATOUT
5130_FB1 1 36 C314
5130_SS_STBY1 FB1 LL2 5130_OUT2U
2 SS_STBY1 OUT2_U 35 5130_OUT2U 35 1 2
5130_INV2 3 34
INV2 LH2
1

5130_FB2 4 33 SCD1U50V3ZY-GP
5130_SS_STBY2 FB2 VIN
5 SS_STBY2 VREF3.3 32
5130_SS_STBY1 5130_PWM_SEL 5130_VREF5
5130_CT
6 PWM_SEL VREF5 31
1 R93
SD
TPS5130
7 CT REG5V_IN 30 2 5V_S3
1

8 29 0R0402-PAD
SUSPWROK_1999 C122 5130_REF GND LDO_IN
9 REF LDO_CUR 28

1
SC1500P50V3KX-GP R577 10 27
STBY_VREF5 LDO_GATE
2

1 2 STBY_REF 11 26 C100 C647


5V_S5 STBY_VREF3.3 LDO_OUT SC4D7U10V5KX-N2 SC4D7U10V5KX-N2
12 STBY_LDO INV_LDO 25

2
R335 100KR2J-1-GP
5V_S5 1 2 SB SB
100KR2J-1-GP
SD SD
SB

VIN_SENSE3
PG_DELAY
SS_STBY3

OUTGND3
OUT3_U

OUT3_D
PGOUT
6

TRIP3
INV3
2 2

LH3
FB3

LL3
U51
2N7002DW-7F-GP
5130_CT TPS5130PTRG4-GP-U

13
14
15
16
17
18
19
20
21
22
23
24
1

C120 5130_SS_STBY3
1

SC47P50V2JN 5130_FB3
2

5130_INV3
5130_SS_STBY2 5130_OUT3D
5130_OUT3D 35
5130_LL3
1

5130_REF 5130_OUT3U
5130_OUT3U 35
1

C121 C101
33 SUSPWROK_1999
1

SC4700P50V2KX C102 5130_LH3 1 2 5130_LL3 35


2

C104 SC1KP50V2KX-LGP
SD
2

SCD1U50V3KX-GP SCD1U25V5KX-1GP
2

2 5V_S5

3
3D3V_S0 5V_S5
R337 1
1 2 DCBATOUT
5V_S5 2D5V_S0 3D3V_S5 D23
1

1
100KR2J-1-GP R199 BAT54-4-GP R352
10KR2J-2-GP 300KR2J-GP
1

R221 R198 5130_TRIP3


2

2
6

100KR2J-1-GP 5130_PWM_SEL
100KR2J-1-GP

U54 3D3V_S0 Q36


1
2N7002DW-7F-GP D 3 OUT 1
2

Q22 2 R1
13,27,36 RUN_ON
3

2N7002-8-GP U38A IN 1 GND


14
3

TSLCX08MTCX-GP R2
Wistron Corporation
MMBT3904LT1-2-GP

1 Q21 VCCP_PWGD 1 DTC115EE-2-GP


1

1 3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


RUN_PWROK 27,32
G RUN_ON 2 Taipei Hsien 221, Taiwan, R.O.C.
2
1

5130_SS_STBY3
2

C234 R5 Title
SB
7
1

SCD22U16V3ZY-GP 100KR2J-1-GP
DC/DC 1D8V/1D5V/1D05V
S
2

C306
27,36 RUN_ON_D SC1500P50V3KX-GP Size Document Number Rev
2

A3
SB HW Thermal Throttling Key-West / Kinney -2
Date: Friday, December 23, 2005 Sheet 34 of 37
A B C D E
A B C D E

TI TPS5130 for 1.5V, 1.8V, 1.05V 13,31,33,34,36,37 DCBATOUT DCBATOUT

13,32,33,34,36 5V_S5 5V_S5


(1D5V=>CH1 , 1D8V=>CH2 , 1D05V =>CH3) 10,34,36,37 1D05V_S0 1D05V_S0

7,9,10,11,12,16,34,36,37 1D8V_S3 1D8V_S3


DCBATOUT
13,14,17,18,19,20,24,25,27,28,32,36,37 5V_S0 5V_S0

12,36 0D9V_S0 0D9V_S0

1
17,34,36 1D5V_S3 1D5V_S3
4 C133 C134 4

5
6
7
8
U29 SCD1U50V3ZY-GP SC4D7U25V5KX-GP 1D5V_S3 1D5V_S3

2
SD
For DDR REF S3 Power

D
D
D
D
G45
1 2
1D8V_S3
VISHAY/30mOhm
GAP-CLOSE-PWR
@4.5V/Qg=8.7nQ SB 5V_S3
1D5V/5A SB

G
S
S
S
1D5V_S3
SI4800BDY-T1
DDR_VREF_S3 need
4
3
2
1

1
OCP=10A For Power debug C204
34 5130_OUT1U
5130_OUT1U
5130_LL1 1
L22
2
C186
SCD1U50V3KX-GP
R142
220R2F-GP
1 2 10 mil and must
34 5130_LL1
neat NB and DIMM

2
IND-4D7UH-56 SCD1U16V
SC U33

2
Panasonic/2V/220uF DDR_VREF_1 1 5 DDR_VREF_S3
IN+ VDD
5
6
7
8
U28 2
9mOhm/3A VSS

1
D
D
D
D

GANG SONG/16mOhm/6.8A 3 IN- OUT 4

1
C187 R144

1
TC17 SCD1U50V3KX-GP 220R2F-GP
SB SB G1214
DY VREFOUT = 0.9V

2
ST220U2VDM-1 C203
Rds(on)=20mOhm SC

2
SCD1U16V
SD

2
R143 1 2 0R3-U-GP
G
S
S
S

IRF7807ZPBF-GP
SD
4
3
2
1

IR/18.2mOhm 1D8V_S3 1D8V_S3


@4.5V/Qg=7.2nQ G46

5130_OUT1D
SB 1 2
34 5130_OUT1D
GAP-CLOSE-PWR
Power budget:0.9V/2.2Apeak (For DDR2_VTT)
3 3
DCBATOUT G47
1 2
1D8V_S3
GAP-CLOSE-PWR
1

G48
C115 C116 1 2
5
6
7
8

1
U22 SCD1U50V3ZY-GP SC4D7U25V5KX-GP
2

GAP-CLOSE-PWR C345
D
D
D
D

G49 SC10U10V5ZY-1GP 5V_S0 1D8V_S3


SD

2
1 2

GAP-CLOSE-PWR
0D9V / 1A

1
G50
G
S
S
S

0D9V_S0

1
SI4800BDY-T1 1 2 C352 R414
4
3
2
1

1D8V_S3 SCD1U10V2KX-LGP 1KR2F-3-GP


5130_OUT2U L20 GAP-CLOSE-PWR U63
34 5130_OUT2U DY

2
5130_LL2 G51
34 5130_LL2
1 2 1D8V/5A R145

2
IND-4D7UH-56 1 2 4 1
VOUT VIN
SC OCP=10A GAP-CLOSE-PWR VREF 3 APL533_VREF1 1 2 DDR_VREF_1
8 NC VCNTL 6
5
6
7
8

1
U23 0R2J-GP
SB 7 NC

1
D
D
D
D

GANG SONG/16mOhm/6.8A TC8 C353 TC21 5 2


NC GND

1
Rds(on)=20mOhm For Power debug SE220U16VM-L-GP C346 R415

ST150U4VBM-L2-GP
9

SC10U10V5ZY-1GP
GND

2
1

SCD1U10V2KX-LGP 1KR2F-3-GP
SB TC16 DY
SC DY

2
ST220U4VDM-L7-GP APL5331KAC-TRLGP
SD
2

2
G
S
S
S

IRF7807ZPBF-GP KEMENT/4V/220uF
4
3
2
1

2 2
40mOhm/ 1.8A
5130_OUT2D
34 5130_OUT2D SB 3D3V_S5
DCBATOUT SB
1

1
3D3V_S5
C87 C88
L3# circuit C271
5
6
7
8

U19 SCD1U50V3ZY-GP SC4D7U25V5KX-GP SCD1U10V2KX-LGP


2

2
DY
D
D
D
D

SD R340
100KR2J-1-GP SD
U53
DY
2
G
S
S
S

SI4800BDY-T1 HTH 1 5 2
HTH VCC
4
3
2
1

2 GND
1D05V_S0 3 4 BL3# 3
5130_OUT3U L18 LTH RESET#/RESET
34 5130_OUT3U
1

34 5130_LL3 5130_LL3 1 2 1 EC_RST# 27


IND-4D7UH-56 R339 G680LT1F-GP
SC 1D05V/5A 33KR2J-3-GP D19
OCP=10A DY BAT54-4-GP
DY
5
6
7
8

U16 GANG SONG/16mOhm/6.8A


DY
2
1
D
D
D
D

1
R80 HTH 1
1

1KR2J-1-GP
Rds(on)=20mOhm SB
1

TC5
SC DY ST220U4VDM-L6-GP R300
SD Wistron Corporation
2

100KR2J-1-GP
G
S
S
S

IRF7807ZPBF-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DY
4
3
2
1

KEMENT/4V/220uF Taipei Hsien 221, Taiwan, R.O.C.


2

25mOhm/ 2.2A Title


5130_OUT3D
SD
34 5130_OUT3D
SB DC/DC 1D8V/1D5V/1D05V-2
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 35 of 37
A B C D E
A B C D E

DCBATOUT 1D5V_S3 1D8V_S3

Run Power

1
R357 R394 R102
100KR2J-1-GP 22R3J-2-GP 1KR2J-1-GP

DY
SC

2
SUS_ON_P D D
D

3
Q38

3
2N7002-8-GP Q40 Q12
SB 2N7002-8-GP 2N7002-8-GP

4
3D3V_S0 1D05V_S0 +15V 1 G
1
G
1
DY 4
16,27,33 SUS_ON
G

2
5V_S5

2
1

1
+3V_SRC S S
R211 R607 R392 S

1
1KR2J-1-GP 1KR2J-1-GP 100KR2J-1-GP
R393
2
DY DY 100KR2J-1-GP U59
1 D
U57
D 6 3D3V_S0 DCBATOUT

2
2 D D 5

1
D D 4 3 RUN_ON_3V 3 G S 4

2
R368
3

2
RUN_OFF_D 5 2 SI3456BDV-T1-GP 100KR2J-1-GP

1
Q24 Q70 R397
2N7002-8-GP 2N7002-8-GP 6 1 100KR2J-1-GP C327 DY

2
RUN_OFF_D SC4700P50V2KX
1
DY 1
DY DY 3VSUS_ON 33

1
G G

1
2N7002DW-7F-GP R369 D Q39
2

1
200KR2J-L1-GP 2N7002-8-GP C308 R367
SB

3
200KR2J-L1-GP
S S
DY

SCD047U25V3KX-GP
DY

2
27,34 RUN_ON_D

2
1
G
Discharge path DY

2
SB
S
SD
5V_S3
SC
SB
3 +3D3VRTC 3
3D3V_S5

PWRLOGIC
U21
D 5V_S0
SB 1 D 6

1
2 D D 5
3 G S 4 R182 R162 R161
+15V 100KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP
1 SI3456BDV-T1-GP

2
C106 1D5V_S3
MAX1999_SHDN# 19,27,33
SC4700P50V2KX
2
1

D9 D C646
R404 R395 U61 2 1 2
DY
SYS_PWRB# 27

3
100KR2J-1-GP 100KR2J-1-GP
1 D D 6 1D5V_S0 3 Q18 SC100P50V2JN-U
19,28 PWR_BTN# 2N7002-8-GP
R403 2 D D 5
2

RUN_ON_P RUN_ON_1D5V
1 2 3 G S 4 1
G
1 SB
D 200KR2J-L1-GP DAN202U-1GP

2
1

AO6408-1-GP D
3

C341 S

3
Q41 750KR2J-GP
2N7002-8-GP -1 D
RUN_OFF 1 Q19
2

3
G 1 2N7002-8-GP
27 ALW_ON
-1 G
2

D Q17

2
S 1 2N7002-8-GP
27,31 ACAV_IN
3

3D3V_S0 2D5V_S0 G S
2 2

2
Q44 U27
1 S
13,27,34 RUN_ON 2N7002-8-GP
G VOUT 2
3 VIN
3D3V_LAN_S5 power 500mW
2

GND 1
1

S C132
C131 SC10U6D3V5MXL1GP
SC
2

SCD1U10V2KX-LGP APL5308-25AC-1GPU
2

R132 1 2
0R5J-5-GP
+3V_SRC 3D3V_LAN_S5

+3D3VRTC
S D
1D5V_S0 VCC_CORE_S0 0D9V_S0

1
5V_S0 2D5V_S0 Q15
C174 R131 FDN338P-NL-GP C173 C171

G
SC10U6D3V5MXL1GP 10KR2J-2-GP SC4D7U10V5ZY SCD1U16V
DY

2
1

R126 R99 R210 R49 R163 DCBATOUT DY DY

2
1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP

DY DY DY DY DY

1
Q14
SD
2

3 OUT C172
1

1
D D D D D 2 R1 SCD01U16V2KX-LGP
27,33 AUX_EN

2
R467 C407 C408 1 GND
IN
DY
3

10KR2J-2-GP SC1U50V5ZY-1-GP SCD1U50V3ZY-GP R2


DY
2

2
Q13 Q11 Q20 Q8 Q16
1
2N7002-8-GP 2N7002-8-GP 2N7002-8-GP 2N7002-8-GP 2N7002-8-GP DDTC144EUA-7F-GP 1
2

RUN_OFF
G
1
DY G
1
DY G
1
DY G
1
DY G
1
DY
U69
Wistron Corporation
2

+3D3VRTC
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
S
SB S S S S 5 SHDN# IN 1
2 Taipei Hsien 221, Taiwan, R.O.C.
GND
4 5/3#(FB) OUT 3
Title

1
Discharge path MAX1615EUK-GP C406 PWRPLANE&PWRLOGIC
SC1U10V3ZY Size Document Number Rev

2
A3 -2
Key-West / Kinney
Date: Friday, December 23, 2005 Sheet 36 of 37
A B C D E
A B C D E

3D3V_S3 3D3V_S3 DCBATOUT BT+ AD+ AD+ AD+

+15V
U60D

14

1
TSLCX08MTCX-GP EC148 EC149 EC150 EC151 EC98 EC89 EC95 EC117 EC100 EC91 EC8 EC92 EC3 EC11 EC7
SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP
12
U76B 11
DY

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
8 LM358DR-N1-GP 13
5 +
7 SD

7
6 -

SB SD
4

4 DCBATOUT VCCP_GMCH_S0 4
3D3V_S0 3D3V_S0 DCBATOUT_BEAD

U6C U6D

14

14

1
TSLCX08MTCX-GP TSLCX08MTCX-GP EC4 EC96 EC99 EC15 EC97 EC13 EC94 EC93 EC6 EC108 EC102 EC121
SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP
9 12
8 11

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
10 13 SD

7
5V_CRT_S0 5V_S3 1D05V_S0 1D8V_S3 3D3V_LAN_S5

1
EC37 EC111 EC22 EC25 EC29 EC21 EC20 EC107 EC112 EC109

1
EC57 EC65 EC63 EC16 EC28
U14C U14D SCD1U16V SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
14

10

14

13

2
SSAHCT125PWR-GP SSAHCT125PWR-GP

SCD1U16V

SCD1U16V

SCD1U16V
2

2
9 8 12 11 3D3V_S0
DY
7

7
SD 5V_S0 3D3V_S0 3D3V_S0 3D3V_S0
3 3

SC

1
EC44 EC49 EC48 EC130 EC43 EC45 EC127 EC113 EC122 EC118 EC70 EC125 EC71
EC19 EC101
SPR2 SPR3 SPR1 SPR4 SPR5 SPR6 SPR7 SPR16 SPR17 K3 K1 K2 K4 SCD1U16V SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
GNDPAD GNDPAD GNDPAD GNDPAD

SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U


1

1
DY DY DY DY DY DY DY DY DY DY DY DY DY
5V_S3 3D3V_S0
SD
5V_S0
SD SD

1
EC64 EC119 EC126 EC69 EC40 EC54 EC33 EC53 EC47 EC52

1
SPR8 SPR9 SPR10 SPR11 SPR12 SPR13 SPR14 SPR15 SPR18 SPR19 EC88 EC26 EC39 EC2 EC114 EC87

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SPRING-23-GP

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
SPRING-4
1

DY SD DY DY DY DY
5V_S3 5V_S3 5V_S3
SC SD SD
EC85 EC10 EC14 EC135
SD

1
EC78 EC62 EC60 EC66 EC72 EC84 EC51 EC27 EC56 EC35 EC36 EC18
2 SC 2

SB SB SB

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
H5 H18 H15 H10 H13 H12 H14 H16
HOLE HOLE HOLE HOLE HOLE HOLE
34.4D902.001 ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX 34.4D901.001 ZZ.0HOLE.XXX
DY DY DY DY DY DY
SD SD SD SD
SC
1

CORE_GMCH_S0 5V_S0 5V_S0 5V_S0


1

1
EC104 EC103 EC110 EC80 EC132 EC77 EC41 EC79 EC81
H4 H2
SB H7 H8 H3 H17 H21 H9 EC17 EC68 EC67 EC55 EC61
HOLE HOLE HOLE HOLE HOLE HOLE HOLE SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
ZZ.0HOLE.XXX 34.40E37.001 ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX

DY DY DY DY DY DY
SD SD SD SD
1

1D5V_S0
1

1
EC120 EC106 EC9 EC31 EC128 EC116 EC124 EC129 EC115 EC123 EC105
H1 H23 H24 H22 H20 H19 H6 H25
1
HOLE
SB HOLE HOLE HOLE HOLE HOLE HOLE
1
SC
SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V
2

2
ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX ZZ.0HOLE.XXX 34.40E37.001 ZZ.0HOLE.XXX ZZ.0HOLE.XXX

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1

Title
SB
SD MISC & EMI
Size Document Number Rev
A3 -2
Key-West / Kinney
Date: Thursday, December 22, 2005 Sheet 37 of 37
A B C D E

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