Wilkinson type ADC Dual slope conversion cycle consists of:

capacitor charge time (fixed ) with a current I~Uin; capacitor discharge time (by a constant current, in time t2~Uin depending on pulse height Uin)

Fig.1 Dual slope conversion cycle: t1 - capacitor C is fixed time charged with current I~Uin. t2 - capacitor C is discharged by constant current during time t2~Uin.

Signals in Wilkinson ADC

Fig.2 Signals in the Wilkinson ADC during the pulse measurement process.

The low level discriminato is used to recognize the arrival of the pulse => threshold is set above the noise level to prevent ADC from wasting a lot of time analyzing noise. Output discriminator's pulse opens the linear gate (LG). => C is connected to input. C is forced to charge up, so that its Uc follows the amplitude of the rising input pulse. When the input pulse has reached its maximum amplitude and begins to fall LG is closed and C is disconnected from the input. Uc ~ max amplitude of the pulse. Following peak amplitude detection a constant current source is connected to C to cause a linear discharge (rundown) Uc. At the same time, the address clock is connected to address counter and the clock pulses are counting for the duration of C discharge. When the Uc reach zero, the counting stops. Since the time for linear discharge of C is proportional to the original pulse amplitude, the number Nc recorded in the address counter is also proportional to the amplitude. During the memory cycle the address Nc is located in the memory and +1 count is added to contents of that location. The value of Nc is usually referred as the channel number.

Fig. 3

Operation of the Wilkinson ADC during the tree stages of pulse amplitude measurement:
a. charging of the rundown

capacitor, b. capacitor rundown,

c. the memory cycle.