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Assignmnt 1
Assignmnt 1
Question 1: Convert the (12.0625)10 and (673.23)10 decimal numbers to binary numbers. (Use
successive division and multiplication techniques. Show all steps.) a) (12.0625)10 to binary Successive Division by 2 We use repeated 12/2 division technique for 6/2 the integer part of a 3/2 decimal number to convert it into binary. Successive Multiplication by 2 We use repeated multiplication for fractional part of a decimal number to convert it into binary. 0.0625*2 0.125*2 0.25*2 0.5*2 = = = =
Integer Quotient = = = = 6 3 1 0 + + + +
Coefficient ai
a 0 =0 a 1 =0 a 2 =1 a 3 =1
Coefficient a-i
(0.0625)10=(0.0001)2 Hence the binary value is (1100.0001)2 b) (673.23)10 to binary Successive Division by 2 673/2 336/2 We use repeated division technique for the integer part of a decimal number to convert it into binary. 168/2 84/2 42/2 21/2 10/2 5/2 2/2 Successive Multiplication by 2 We use repeated multiplication for fractional part of a 0.23*2 0.46*2 0.92*2 = = = = = = = = = = = = =
Coefficient ai
a 0 =1 a 1 =0 a 2 =0 a 3 =0 a 4 =0 a 5 =1 a 6 =0 a 7 =1 a 8 =0 a 9 =1
Coefficient a-i
= = = = = = = =
1 1 0 1 0 1 1 1
+ + + + + + + +
Question 2: Perform the subtraction with binary numbers using 2 s complement and 1 s complement
(a) (11010)2 (1101)2 , (b) (100)2 (110000)2. Show all steps. Solution: 2 s complement method Step (A): Add the minuend M to the 2 s complement of the subtrahend N Step (B): Inspect the end carry result from step (A) y y If an end carry occurs, discard it. If an end carry does not occur, take the 2 s complement of the numbers obtained in step (A) and place a negative sign in front. 1 s complement method Step (A): Add the minuend M to the 1 s complement of the subtrahend N Step (B): Inspect the end carry result from step (A) y y If an end carry occurs, add 1 to least significant bit. If an end carry does not occur, take the 1 s complement of the numbers obtained in step (A) and place a negative sign in front.
(a) (11010)2 (1101)2 M = 11010; N = 01101 2 s complement of N = 10011 1 s complement of N = 10010 Now, M-N = 11010-01101 Now, M-N = 11010-01101 11010 10011 Sum: 101101 Discard end carry -1 0 0 0 0 0 Ans, M-N = (1 1 0 1)2 2 (a) (11010)2 (1101)2 M = 11010; N = 01101
11010 10010 End carry & Sum: 1 0 1 1 0 0 add 1 to LSB +1 Ans, M-N = (1 1 0 1)2
(b) (100)2 (110000)2 M = 000100; N = 110000 2 s complement of N = 010000 Now, M-N = 000100-110000
(b) (100)2 (110000)2 M = 000100; N = 110000 1 s complement of N = 010000 Now, M-N = 000100-110000
000100 010000 Sum: 010100 No end carry take 2 s complement And place negative sign in front. Ans, M-N = -( 1 0 1 1 0 0)2
000100 001111 Sum: 010011 No end carry take 1 s complement And place negative sign in front. Ans, M-N = -( 1 0 1 1 0 0)2
+ AB + BCD to a minimum number of literals and implement your simplified Boolean function with fewest number of logic gates (AND, OR, NOT) (Show logic circuit diagram). Express your Boolean function in a sum of minterms and product of maxterms (canonical forms) as well as sum of products and product of sums (standard form). Solution: Let, F be the given Boolean function such that, F = BC + AC + AB + BCD F = BC + AC + AB + BCD = AC + ABC + ABC + BC (1 + D) = AC ( 1 + B) + (A + 1)BC = AC + BC Expressing the Boolean Function F = AC + BC in sum of minterms
Logic Diagream
F = AC + BC = AC (B D + B D + BD + BD) + BC (A D + A D + AD + AD) = AB C D + AB C D + ABC D + ABC D + A BCD + A BCD + ABCD + ABCD = m8 + m9 + m12 + m13 + m6 + m7 + m14 + m15 = (6,7,8,9,12,13,14,15) = Sum of minterms F = (0,1,2,3,4,5,10,11) = Product of Maxter = M0 M1 M2 . M3 M4 M5 M10 M11 = (A+B+C+D) (A+B+C+D ) (A+B+C +D) (A+B+C +D ) (A+B +C+D) (A+B +C+D ) (A +B+C +D) (A +B+C +D ) Product of Maxterms CD CD 00 01 11 10 00 01 11 10 00| 0 0 0 0 00| 0 0 0 0 AB| 01| 0 0 1 1 AB| 01| 0 0 1 1 11| 1 1 1 1 11| 1 1 1 1 10| 1 1 0 0 10| 1 1 0 0 Hence F = (B + C ).(A + C) in Hence F = AC + BC in the sum of the Product of sum form. Product form. 3
Question 4:
Simplify the Boolean function xy z + xyz + x yz + xyz using map method (sum of products) and Boolean function F= B C D + BCD + ABCD using the don t care d = B CD + A BC D. Solution: Let, w = xy z + xyz + x yz + xyz => m5 + m6 + m3 + m7 yz 01 0 1
X|
0| 1|
00 0 0
11 1 1
10 0 1
Again here, F = B C D + BCD + ABCD F = B C D + BCD + ABCD = (A+A ) B C D + (A+A )BCD + ABCD = A B C D + A BCD + AB C D + ABCD +ABCD = m0 + m6 + m8 + m14 + m15 , And d = B CD + A BC D = A B CD + A BC D + AB CD = m2 + m5 + m10 With the above functions we have: CD 00 00| AB| 01| 11| 10| 1 0 0 1 01 0 X 0 0 11 0 0 1 0 10 X 1 1 X Hence the overall output considering the don t cares is F = CD + B D + ABC
Question 5: Write down the structural coding in Verilog HDL for a 4-bit full adder?
Solution: //half adder module half_adder(sum,c_out,a,b); input a,b; output sum,c_out; xor(sum,a,b); and(c_out,a,b); endmodule //full adder using basic gates module full_adder(sum,c_out,a,b,c_in); input a,b,c_in; output sum,c_out; wire w1,w2,w3; xor(w1,a,b); xor(sum,w1,c_in); and(w2,a,b); and(w3,w1,c_in); or(c_out,w2,w3); endmodule
a b
Half adder
w1
Half adder
sum
W2
//full adder using two half adder c_in module full_adder(sum,c_out,a,b,c_in); input a,b,c_in; output sum,c_out; wire w1,w2,w3; half_adder ha0(.sum(w1),.c_out(w2),.a(a),.b(b)); half_adder ha1(.sum(sum),.c_out(w3),.a(w1),.b(c_in)); or(c_out,w2,w3); endmodule
c_out
W2
//4bit full adder using full adders module four_bit_full_adder(sum,c_out,a,b,c_in); input c_in; input [3:0] a,b; output c_out; output [3:0] sum; wire [2:0] c_o; full_adder fa0(.sum(sum[0]),.c_out(c_o[0]),.a(a[0]),.b(b[0]),.c_in(c_in)); full_adder fa1(.sum(sum[1]),.c_out(c_o[1]),.a(a[1]),.b(b[1]),.c_in(c_o[0])); full_adder fa2(.sum(sum[2]),.c_out(c_o[2]),.a(a[2]),.b(b[2]),.c_in(c_o[1])); full_adder fa3(.sum(sum[3]),.c_out(c_out),.a(a[3]),.b(b[3]),.c_in(c_o[2])); endmodule