Tiltle: Signal Integrity Analysis using DRC free design using SOC Encounter ABSTRACT VLSI Physical Design

Converts a circuit description into a geometric description.It is the mechanical activity towards preparation of artwork for the mask preparation, and Electrical activity towards making the design meets its constraints at silicon level. The term Signal Integrity (SI) addresses two concerns in the electrical design aspects the timing and the quality of the signal. It tells whether the signal reach its destination when it is supposed to do,and also, when it gets there, whether it is in good condition or not. The goal of signal integrity analysis is to ensure reliable high-speed data transmission. In a digital system, a signal is transmitted from one component to another in the form of logic 1 or 0, which is actually at certain reference voltage levels. Signal integrity problems in modern integrated circuits (ICs) can have many drastic consequences for digital designs:

Products can fail to operate at all, or worse yet, become unreliable in the field. The design may work, but only at speeds slower than planned Yield may be lowered, sometimes drastically

SI issues that has been encountered in the block level design IMDF are resolved in SI Analysis using SoC Encounter.