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Data Formatting & Carrier Modulation Transmitter Trainer and Carrier Demodulation & Data Reformatting Receiver Trainer ST2156 & ST2157
Data Formatting & Carrier Modulation Transmitter Trainer and Carrier Demodulation & Data Reformatting Receiver Trainer ST2156 & ST2157
Modulation transmitter
Trainer and carrier
Demodulation & data
Reformatting receiver trainer
ST2156 & ST2157
Learning Material
Ver. 1.2
Dear User,
Please remember that each paper manual requires 50-100 sheets of paper
on an average.
colourful diagrams,
plenty of theory,
Safety Instructions
Read the following safety instructions carefully before operating the instrument. To
avoid any personal injury or damage to the instrument or any product connected to it.
Do not operate the instrument if you suspect any damage within.
The instrument should be serviced by qualified personnel only.
Introduction
Data Formatting & Carrier Modulation Transmitter Trainer ST2156 and
Carrier Demodulation & Data Reformatting Receiver Trainer ST2157 are
complete digital communication system which efficiently explains all communication
processing steps involved in digital transmission & reception of analog signals.
Various digital modulation techniques viz. ASK, FSK, PSK, DPSK, QPSK etc. can be
implemented using combinations of these two trainers.
Features
Features of ST2156
On-board Carrier generation circuit (Sine waves synchronized to transmitter
data).
On-board in phase and quadrate phase carrier for QPSK modulation.
Different data conditioning formats NRZ (L), NRZ (M), RZ, Biphase.
(Manchester), Biphase (Mark), AMI, RB.
FSK, PSK, DPSK ASK, QPSK, DQPSK carrier modulation.
On-board Unipolar to Bipolar conversion.
On-board data inverter.
On-board 8-bit Data Source
On-board Clock Source
Features of ST2157
7 different data reconditioning formats NRZ (M), RZ, AMI, RB, Biphase
(Manchester), Biphase (Mark).
ASK, FSK, PSK, DPSK & QPSK carrier demodulation.
On - Board Biphase Clock recovery circuit.
On - Board data squaring circuit and differential decoder.
On - Board 4th Order Butterworth filters
On board 8 bit Data Receiver.
Theory
Communication and Communication System:
Communications is the field of study concerned with the transmission of information
through various means. It can also be defined as technology employed in transmitting
messages.
In the most fundamental sense, Communication involves implicitly the transmission
of information from one place to another through a succession of processes, as
describe here:
The generation of message signal: voice, music, and picture or computer data.
The description of that message signal by set of symbols.
The encoding of these symbols in a form that is suitable for transmission over
physical medium.
The transmission of encoded symbols to desired destination.
The decoding and reproduction of original symbol.
The recreation of original message.
In a communication system, there are three basic elements, namely, transmitter,
receiver and channel as shown in figure 1
The transmitter is located at one point in space, the receiver is located at some other
point separated from transmitter, and channel is a physical medium which connects
them. The purpose of transmitter is to convert the message signal produced by the
source of information, into a form suitable for transmission over the channel.
However, as the signal propagates along the channel, it is distorted due to channel
imperfections. The received signal is a corrupted version of transmitted signal. The
receiver has the task of operating on the received signal so as to reconstruct a
recognizable form of the original message signal.
Digital Communication:
Digital communications refers to the field of study concerned with the transmission of
digital data. This is in contrast with analog communications. While analog
communication uses a continuously varying signal, a digital transmission can be
broken down into discrete messages. Transmitting data in discrete messages allows
for greater signal processing capability. The ability to process a communication signal
means that errors caused by random processes can be detected and corrected. Digital
signals can also be sampled instead of continuously monitored and multiple signals
can be multiplexed together to form one signal.
Because of all these advantages, and recent advances in wideband communication
channels and solid-state electronics have allowed scientists to fully realize these
advantages, digital communications has grown quickly. Digital communications is
quickly edging out analog communication because of the vast demand to transmit
computer data and the ability of digital communiations to do so.
Waveforms of NRZ-L
Figure 5
Non return to zero- level (NRZ-M):
Representation : Level transition for bit 1 and unchanged level
for bit 0.
Bandwidth : Low bandwidth.
DC Level : High DC component.
Timing Information : No timing information (For long stream of 0s)
Waveforms of NRZ-M
Figure 6
Return to zero (RZ):
Representation : 0V for bit 0 and for bit 1, for half bit duration +5V
and the rest of the bit duration is represented as 0V.
Bandwidth : Twice as that required for the NRZ.
DC Level : High DC component.
Timing Information : No timing information (For long stream of 0s)
Waveforms of RZ-L
Figure 7
Biphase (Manchester):
Representation : For bit 1, +5V for first half bit time and 0V during
the second half and for bit 0, 0V for first half bit
time and +5V during the second half.
Bandwidth : Twice as that required for the NRZ.
DC Level : No DC component.
Timing Information : Good clock recovery.
Waveforms of Manchester
Figure 8
Biphase (Mark):
Representation : For any bit either 1 or 0, first half bit duration +5V
or 0V and invert of first half during next half bit
duration. Bit 0 Bit Pattern remains the same.
Bit 1 Phase Reversal.
Bandwidth : Twice as that required for the NRZ.
DC Level : No DC component.
Timing Information : Good clock recovery.
Waveforms of Mark
Figure 9
Return to Bias (RB):
Representation : During the first half a period, positive level for bit 1
and a negative level for bit 0 and during the second
half bit time, both returns to the bias level.
Bandwidth : Twice as that required for the NRZ.
DC Level : The DC component depends on the string of 1s and
0s.
Timing Information : Good clock recovery (Self clocking system).
Waveforms of RB
Figure 10
Alternate Mark Inversion (AMI):
Representation : Like RB encoding, the AMI always returns to the bias
level during second half of the bit time interval and
during the first half the transmitted level can be a
positive, a negative or bias level, as for a bit 0 bias
level and for a bit 1 either a positive level or negative
level, the level being chose opposite to what it was
used to represent the previous bit 1.
Bandwidth : Twice as that required for the NRZ.
DC Level : No DC component.
Timing Information : No timing information (For long sequence of 0s).
Waveforms of AMI
Figure 11
Modulation and its purpose:
Baseband signals produced by various information sources are not always suitable for
direct transmission over a given channel. These signals are usually further modified to
facilitate transmission. This conversion process is known as Modulation. In this
process, the baseband signal is used to modify some parameter of a high frequency
carrier signal. A carrier is sinusoidal signal of the high frequency, and one of its
parameter such as amplitude, frequency or phase is varied according to the message
signal.
Purpose of Modulation:
1. For realizable height of Antenna.
2. Simultaneous transmission of several signals.
3. To have a high noise immunity.
Digital Modulation:
In digital modulation, an analog carrier signal is modulated by a digital bit stream.
Digital modulation methods can be considered as digital-to-analog conversion, and
the corresponding demodulation or detection as analog-to-digital conversion. To be
able to transmit the data over long distance, we have to modulate the signal that is
varying phase, frequency or amplitude according to the digital data. At the receiver
separate the signal and the digital information by the process of demodulation.
Some of the digital modulation techniques are described here as follows
Amplitude Shift Keying (ASK) Technique:
The simplest method of modulating a carrier with a data stream is to change the
amplitude of the carrier wave every time the data changes. This modulation technique
is known as Amplitude Shift Keying.
The simplest way of achieving amplitude shift keying is by switching 'ON' the carrier
whenever the data bit is '1' & switching it 'OFF' whenever the data bit is '0' i.e. the
transmitter outputs the carrier for a' 1 ' & totally suppresses the carrier for a '0'. This
technique is also known as ON-OFF keying. Figure 12 illustrates the amplitude shift
keying for the given data stream.
Thus,
The data stream applied is unipolar i.e. 0 volts for logic '0' & + 5 Volts for logic '1'.
The output of balanced modulator is a sine wave, unchanged in phase when a data bit
l' is applied to it and is zero when the data bit '0' is applied.
The ASK modulation result in a great simplicity at the receiver. The method to
demodulate the ASK waveform is to rectify it, pass it through the filter & shape up
the resulting waveform. The output is the original data stream. Figure 14 shows the
functional blocks required in order to demodulate the ASK waveform at receiver.
The functional blocks required in order to generate the FSK signal is as shown in
figure 17. There are two ASK modulator, each has different carrier frequencies but
the digital data is inverted in one of the modulator. These two different ASK
modulated signal are applied to the summing amplifier to get FSK modulated signal.
low pass filter output is too rounded to be used for digital processing. Therefore it is
'Squared Up' by a voltage comparator.
Phasor Diagram
Figure 25
Assume the digit code be 00. This would give a 0 phase to the in phase carrier and 0
phase to quadrature carrier (90 out of phase with respect to I-carrier). If we add these
two waves we would get a 45 resultant. See figure 26.
Phasor Diagram
Figure 27
It can be appreciated from the above phasor diagram that each phasor switches its
phase depending on the data level exactly in the same way as the same way as the
PSK modulator does. The only difference is that QPSK is sum of two such PSK
modulators.
The QPSK modulator can be configured as shown in the figure 28
The two carriers namely I & Q as has been stated, have same frequency but differ in
phase by 90. Also the I data refer to the Dibit MSB & Q data refers to the Dibit LSB.
Each modulator performs phase-shift keying on its respective carrier input in
accordance with respective data input such that,
1. The output of modulator 1 is a PSK signal with phase shift of 0 and 180
respectively, relative to the I-carrier, and
2. The output of modulator 2 is a PSK signal with phase shift of 90 and 270
respectively, relative to the I-carrier.
The output of the two modulators is summed by a summing amplifier. As it is clear
from the earlier phasor diagram, the phase of the summing amplifier's output signal
relative to I-carrier, at any instance of time takes one of the four phases 45 135,
225, and 315 depending on the applied debit code. When these Dibit codes alter, the
phase of the QPSK output changes by 0, 90, 180 or 270 from its previous phase
position. Thus the output of the summing amplifier is a QPSK waveform. The
demodulation of QPSK signal is performed by the fourth power loop detector. The
demodulator is quite similar to the one used in PSK system as can be seen from figure
29.
Quadrature Phase Shift Keying Demodulator:
The incoming QPSK signal is first squared in the signal squarer 1. The functioning of
the signal squarer has already been discussed in the PSK Modulator section. The
output of the signal squarer 1 is a signal at twice the original frequency with phase
changes reduced to 0 & 180. This is because all the phase changes are also doubled.
The 0 & 180 phase changes becomes 0 (as 2 x 180 = 360 = 0 phase shift.) and
the 90 and 270 phases both become 180 (since 270 + 270 = 540 = 180 phase
shift)
Therefore, the output from signal squarer 2 is a sinewave at four times the frequency
of the original QPSK carrier signal with no phase changes.
The output of signal squarer 2 is fed to the phase locked loop (PLL) which locks on
the incoming signal & produces a square wave of same frequency as that of the input.
The output of PLL is divided in frequency by a factor of 4 by a 4 circuit. Now the
frequency is same as that of the QPSK carrier signal.
The next stage in demodulation is a phase adjusts Circuit. The output of the phase
adjust circuit are two square waves of same frequency as the input signal applied and
with 90 phase shift between them. Also the phase of the two output signals can also
be adjusted relative to the original QPSK signal. Note that the 90 phase difference
between the two outputs is maintained.
The output of the phase circuit controls the two analog switches. The switch is closed
when the corresponding output goes high. The original QPSK signal is then switched
through to one of the QPSK demodulator. How output can be input with a low level,
the switches are open & the output is pulled down to 0V.
The two outputs from the demodulator are labeled I & Q. Once the correct phase
relation between QPSK signal & phase adjust output have been set, the I & Q outputs
will contain information about original two bit code. This is illustrated in phase or
diagram. See figure 30.
The average level of the I & Q outputs contains information about the Dibit code. The
average level of the two outputs is extracted by passing them through the low pass
filter. The output of the filters is rounded & cannot be used for digital processing. The
wave 'Squared Up' by a voltage a comparator circuit. As shown in the figure 31.
At the receiver, once again there are four possibilities the two outputs may be
interchanged or inverted as mentioned above. But now the absolute levels of the
received data are no longer important. The receiver simply has to tell the two bit code
change. As a result phase ambiguity is no longer a problem. To derive NRZ (L)
waveform from the encoded pair a differential Dibit decoder is used at receiver. Its
output is serially transmitted. The fig 43 shows the functional block diagrams of the
QPSK system.
Operating Instructions
1. The experiments make use of two trainers namely ST2156 & ST2157. ST2156
serves Transmitter device while ST2157 trainer serves as receiver.
2. Set carrier frequency selection switch according to a carrier frequency used in a
carrier modulation at ST2156 while using PSK & DPSK demodulation.
3. Do not forget to connect grounds of both the trainers ST2156 & ST2157.
4. Use reset switch to synchronies LED patterns of receiver same as that of
transmitter.
Experiment 1
Objective: Study of Data Formats
Equipments Needed:
1. ST2156 Trainer.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 1.1 for the connection diagram for Experiment 1.
Figure 1.1
Procedure:
1. Connect the power supply of ST2156 but do not turn on the power supplies until
connections are made for this experiment.
2. Make the connections as shown in the figure 1.1.
3. Switch 'ON' the power.
4. Connect oscilloscope CH1 to Data In and CH2 to Clock In and observe the
waveforms.
5. Connect oscilloscope CH1 to Data In and CH2 to NRZ (L) and observe the
waveforms.
6. Connect oscilloscope CH1 to Data In and CH2 to NRZ (M) and observe the
waveforms.
7. Connect oscilloscope CH1 to Data In and CH2 to RZ and observe the
waveforms.
8. Connect oscilloscope CH1 to Data In and CH2 to Biphase (manchester) and
observe the waveforms.
Experiment 2
Objective: Study of Amplitude Shift Keying.
Equipments Needed:
1. ST2156 and ST2157 Trainers.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 2.1 for the connection diagram for Experiment 2.
Figure 2.1
Procedure:
1. Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.
2. Make the connections as shown in the figure 8.1.
3. Switch 'ON' the power.
4. On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and
observe the waveforms.
5. On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of
modulator Circuit (l) on ST2156 and observe the waveforms.
6. Vary the gain potentiometer of modulator circuit (l) on ST2156 to adjust the
amplitude of ASK Waveform.
7. On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of
comparator on ST2157 and observe the waveforms.
Observations:
1. The output at Data In is repeating sequence of bits generated by Data Source.
2. The output at Modulator Circuit (l) is the ASK waveform which contains carrier
transmitted for Data 1 and carrier suppressed Data 0.
3. The output at comparator on ST2157 is the same as Data In on ST2156.
Experiment 3
Objective: Study of Frequency Shift Keying.
Equipments Needed:
1. ST2156 and ST2157 Trainers.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 3.1 for the connection diagram for Experiment 3.
Figure 3.1
Procedure:
1. Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.
2. Make the connections as shown in the figure 3.1.
3. Switch 'ON' the power.
4. On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and
observe the waveforms.
5. On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of
Summing Amplifier on ST2156 and observe the waveforms.
6. Adjust the potentiometers of both the Modulator Circuit (l) &(ll) onST2156 to
adjust the amplitude of FSK waveform at Summing Amplifiers output on
ST2156.
7. On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of
comparator on ST2157 and observe the waveforms.
Observations:
1. The output at Summer Amplifier is the FSK waveform, Observe that for data
bit '0' the FSK signal is at lower frequency (960KHz) & for data bit '1 the FSK
signal is at higher frequency (1.6 MHz)The output at comparator on ST2157 is
the same as Data In on ST2156.
Experiment 4
Objective: Study of Phase Shift Keying.
Equipments Needed:
1. ST2156 and ST2157 Trainers.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 4.1 for the connection diagram for Experiment 4.
Figure 4.1
Procedure:
1. Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.
2. Make the connections as shown in the figure 4.1.
3. Switch 'ON' the power.
4. On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and
observe the waveforms.
5. On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of
Modulator Circuit (l) on ST2156 and observe the waveforms.
6. Adjust the Gain potentiometer of the Modulator Circuit (l) on ST2156 to
adjust the amplitude of PSK waveform at output of Modulator Circuit (l) on
ST2156.
7. Now on ST2157 connect oscilloscope CH1 to Input of PSK demodulator and
connect CH2 one by one to output of double squaring circuit, output of PLL,
output of Divide by four ( 2) observe the wave forms.
Figure 4.2
Experiment 5
Objective: Study of Differential Phase Shift Keying.
Equipments Needed:
1. ST2156 and ST2157 Trainers.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 5.1 for the connection diagram for Experiment 5.
Figure 5.1
Procedure:
1. Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.
2. Make the connections as shown in the figure 5.1.
3. Switch 'ON' the power.
4. On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and
observe the waveforms.
5. On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of
Modulator Circuit (l) on ST2156 and observe the waveforms.
6. Adjust the Gain potentiometer of the Modulator Circuit (l) onST2156 to adjust
the amplitude of PSK waveform at output of Modulator Circuit (l) on ST2156.
7. Now on ST2157 connect oscilloscope CH1 to Input of PSK demodulator and
connect CH2 one by one to output of double squaring circuit, output of PLL,
output of Divide by four ( 2) observe the wave forms.
Experiment 6
Objective: Study of Quadrature Phase Shift Keying.
Equipments Needed:
1. ST2156 and ST2157 Trainers.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 6.1 for the connection diagram for Experiment 6.
Figure 6.1
Procedure:
1. Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.
2. Make the connections as shown in the figure 6.1.
3. Switch 'ON' the power.
4. On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and
observe the waveforms.
5. On ST2156, connect oscilloscope CH1 to Clock Output and CH2 one by one
to Sine and Cosine output of 960 KHz and observe the waveforms.
6. On ST2156, connect oscilloscope CH1 to Data In and connect CH2 one by one
to I Data and Q Data outputs and observe the waveforms.
7. Now connect oscilloscope CH1 to I Data output on ST2156 and connect CH2
one by one to Signal In, Carrier In and Output of modulator circuit (l) on
ST2156 and observe the waveforms.
8. Now connect oscilloscope CH1 to Q Data output on ST2156 and connect CH2
one by one to Signal In, Carrier In and Output of modulator circuit (ll) on
ST2156 and observe the waveforms.
9. Now connect oscilloscope CH1 to Data Out on ST2156 and CH2 to Output
of Summing Amplifier on ST2156 and observe the waveforms.
10. Set Carrier frequency selection switch to 960 KHz on ST2157.
11. Now on ST2157 connect oscilloscope CH1 to Input of QPSK demodulator
and connect CH2 one by one to output of double squaring circuit, output of
PLL, output of Divide by four ( 4) observe the wave forms.
12. On ST2157, connect oscilloscope CH1 to I output of QPSK demodulator and
CH2 to Q output of QPSK demodulator and observe the waveforms. Set all
toggle switch to 0, now vary the phase adjust potentiometer and observe its
effects on the demodulated signal waveforms.
13. Connect oscilloscope CH1 to I output of QPSK demodulator on ST2157 then
connect CH2 one by one to output of low pass filter, output of Comparator on
ST2157 and observe the waveforms.
14. Connect oscilloscope CH1 to Q output of QPSK demodulator on ST2157 then
connect CH2 one by one to output of low pass filter, output of Comparator on
ST2157 and observe the waveforms.
15. Compare the output of comparators on ST2157 with the output I Data and Q
Data on ST2156 respectively.
16. Connect oscilloscope CH1 to Data In then connect CH2 output to Bit decoder
and observe the waveforms. If both data does not matches then try to match it by
varying the phase adjust potentiometer on QPSK Demodulator.
17. Now try to match the LED sequence by once pressing the reset switch on
ST2156.
Observations:
1. The output at Data In is repeating sequence of bits generated by Data Source.
2. The I Data and Q Data output are even and odd bit sequence of input data
sequence and bit duration is double of input data sequence as shown in the
figure 11.2.
3. The Output of Modulator Circuit (l) and Modulator Circuit (ll) are Phase Shift
Keying modulated signals, and summation of these two signals are Quadrature
Phase Shifted signal as shown in the figure 6.2.
4. The output of Double squaring circuit is sinusoidal signal (carrier signal) but
frequency is four times higher than that of carrier used.
5. The output of Phase Lock Loop (PLL) is clock signal of same frequency as that
of the output of double squaring circuit and output of Divide by four ( 4) is
clock signal of frequency four times less than the output of PLL signal.
6. The output of QPSK demodulator is a signal having group of positive half
cycles and group of negative half cycles of the carrier signal as shown in the
figure 6.3.
7. A low pass filter removes high frequency component from demodulated QPSK
signal and it makes the signal smooth as shown in the figure 6.3.
8. The variation in reference voltage potentiometer affect the Data, to recover Data
correctly potentiometer adjustment is necessary and recovered Data.
Experiment 7
Objective: Study of Differential Quadrature Phase Shift Keying.
Equipments Needed:
1 ST2156 and ST2157 Trainers.
2 mm Banana cable
3 Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 7.1 for the connection diagram for Experiment 7.
Figure 7.1
Procedure:
1. Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.
2. Make the connections as shown in the figure 7.1.
3. Switch 'ON' the power.
4. On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and
observe the waveforms.
5. On ST2156 connect oscilloscope CH1 to Clock Out and CH2 one by one to
Sine and Cosine output of 960 KHz and observe the waveforms.
6. Connect oscilloscope CH1 to Data In and connect CH2 one by one to I Data
and Q Data outputs and observe the waveforms.
7. Now connect oscilloscope CH1 to I Data output of serial to parallel converter
on ST2156 and connect CH2 to Output of differential encoder (l) on ST2156
and observe the waveforms.
8. On ST2156, connect oscilloscope CH1 to Q Data output of serial to parallel
converter and connect CH2 to Output of differential encoders (ll) and observe
the waveforms.
Observations:
1. The output at Data In is repeating sequence of bits generated by Data Source.
2. The I Data and Q Data output are even and odd bit sequence of input data
sequence and bit duration is double of input data sequence as shown in the
figure 7.2.
3. The Output of Modulator Circuit (l) and Modulator Circuit (ll) are Phase Shift
Keying modulated signals as shown in the figure 7.2, and summation of these
two signals are Quadrature Phase Shifted signal as shown in the figure 7.2.
4. The output of Phase Lock Loop (PLL) is clock signal of same frequency as that
of the output of double squaring circuit and output of Divide by four ( 4) is
clock signal of frequency four times less than the output of PLL signal.
5. The output of QPSK demodulator is a signal having group of positive half
cycles and group of negative half cycles of the carrier signal as shown in the
figure 7.2.
6. A low pass filter removes high frequency component from demodulated QPSK
signal and it makes the signal smooth as shown in the figure 7.2.
7. The Phase Adjust potentiometer matches the phase of regenerated clock and
carrier with input clock and carrier signal respectively.
8. The recovered data does not find inverted after demodulation.
Warranty
1) We guarantee this product against all manufacturing defects for 24 months from
the date of sale by us or through our dealers. Consumables like dry cell etc. are
not covered under warranty.
2) The guarantee will become void, if
a) The product is not operated as per the instruction given in the Learning
Material
b) The agreed payment terms and other conditions of sale are not followed.
c) The customer resells the instrument to another party.
d) Any attempt is made to service and modify the instrument.
3) The non-working of the product is to be communicated to us immediately giving
full details of the complaints and defects noticed specifically mentioning the
type, serial number of the product and date of purchase etc.
4) The repair work will be carried out, provided the product is dispatched securely
packed and insured. The transportation charges shall be borne by the customer.
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