Pal - Pawge QAWGE - La 8681P.rev.1.0.Schematics

A B C D E
1 1
Compal QAWGE/PAWGE
Compal LA-8681P Schematics Document
2 2
AMD APU Zacate-FT1 + FCH Hudson-M3L + GPU RobsonXT
3
Lenovo B585 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2010/06/30 Deciphered Date 2012/06/30 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH
CS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT
OUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, IN
CONTAINS
C.
LA8681P
Date: Tuesday, November 29, 2011 Sheet 1 of 48
A B C D E
A B C D E
QIWG5
Compal confidential
File Name : PAWGE LS7981P CardReader/B
LS7982P USB/B
LS7983P PWR/B
1
QIWG6 1
LVDS Conn. LS7981P CardReader/B

page 22 Memory BUS(DDRIII) 200pin DDRII-SO-DIMM X2 LS7982P USB/B
AMD Brazos APU Single Channel BANK 0, 1, 2, 3 page 8,9 LS7983P PWR/B
CRT Conn. FT1 1.5V DDRIII 1333 LS7984P LED/B
page 24
LS7985P ODD/B
BGA 413-Ball
AMDRosbon XT_M2 HDMI Conn. 19mm x 19mm
page 23
page 5,6,7
VRAM 64*16 x4 PCI-E GPP GEN2
DDR3*4
x4 UMI Gen. 2
page 15 ~ 21
2Channel Speaker
page 27
2
Audio Codec Internal MIC 2
page 27
Hudson M3L AZALIA CX20671
page 27
BGA 656-Ball Audio Jacks
23mm x 23mm Stereo
HeadPhone Output
4 * x1 PCI-E 1.0 10*USB2.0
Microphone Input
CMOS Camera page 22
WLAN &WiMax page 10,11,12,13,14 2*SATA serial BlueTooth CONN page 28
page 29
USB PORT 2.0 x2(Left) page 33

GIGA LAN LPC BUS
RTL8111/8105 USB PORT 3.0 x2(Right) page 34
page 25,26
SPI ROM WLAN/WiMAX

3
page 11
EC 3
ENE KB9012
PCI Express USB(WiMAX) page 30 Card Reader
Realtek RTS5178
Mini card Slot 1 PCI-E(WLAN) SD/MMC
WLAN/WiMAX page 29 Daoughter board
Int.KBD
page 32
Touch Pad
page 32
SATA3.0 HDD CONN

page 28
Thermal Sensor
4
EMC1403 page 29 SATA ODD CONN
page 28 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA8681P
A B C D E
A B C D E
Voltage Rails FCH Hudson-M3L Brazos FCH Hudson-M3L

Power Plane Description S1 S3 S5 USB Port List PCIE Port List SATA Port List
VIN Adapter power supply (19V) N/A N/A N/A USB1.1 PCIE0 SATA0 HDD
B+ AC or battery power rail for power circuit. N/A N/A N/A
Port0 NC PCIE1 SATA1 ODD
APU
+APU_CORE Core voltage for CPU (0.7-1.2V) ON OFF OFF GPU
+APU_CORE_NB 1.0V switched power rail ON OFF OFF Port1 NC PCIE2 PCIE x4 SATA2 NC
1 1
+1.5V 1.5V power rail for CPU VDDIO and DDRIII ON ON OFF
USB2.0 PCIE3 SATA3 NC
+0.75VS 0.75VS switched power rail for DDR terminator ON OFF OFF
+1.0VS 1.0V switched power rail for NB VDDC & VGA ON OFF OFF Port0 Right USB PCIE0 LAN SATA4 NC
+1.1VS 1.1VS switched power rail ON OFF OFF
Port1 Right USB PCIE1 WLAN SATA5 NC
FCH
+1.8VS 1.8V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON* Port2 Mini-PCIE PCIE2 NC
+3V_LAN 3.3V power rail for LAN ON ON(WOL) OFF
Port3 USB Camera PCIE3 NC
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON* Port4 NC
+5VS 5V switched power rail ON OFF OFF
Port5 CardReader
+VSB VSB always on power rail ON ON ON*
+RTCVCC RTC power ON ON ON Port6 BT
+1.1VALW 1.1V always on power rail ON ON ON*
Port7 NC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Port8 NC
2 Port9 NC BOM Structure 2

EC SM Bus1 address EC SM Bus2 address
Port10 Left USB1
UMA@ : UMA only
Device Address HEX Device Address HEX Left USB2
Port11 PX@ : DIS muxluss PX 4.0
Smart Battery 0001-011xb 15H EMC1412-2 (dGPU) 1111-100xb F8H
EMC1403-2(DDR,WLAN) 1001-101xb 9AH
Robson@ : Robson GPU
Port12 NC
SB-TSI 1001-100xb 98H
GIGA@ : RTL8111 1000
Port13 NC 8105@ : RTL8105 10/100
DIMM@ : DIMM select
SM Bus Controller 0 (FCH_SMB1 ~ FCH_SMB4, SMB_ALERT#)
CMOS@ : USB camera
BT@ : BT function
Device Address HEX ME@ : ME components
APU SIC/SID (FCH_SMB3)
X76@, H1G@, H512@, S1G@, S512@ : VRAM
H_THERMTRIP# (FCH_ALERT#)
45@ : 45 Level
HDMI@ : HDMI function
non HDMI@ : HDMI function
AN@ : Apple + Nokia ear phone combo
3
SM Bus Controller 1 (FCH_SMB0)
A@ : Apple ear phone 3
PCB@ : PCB PN
Device Address HEX 14@ : 14"
DDR DIMM1 (FCH_SMB0) 1001-000xb
15@ : 15"
90
DDR DIMM2 (FCH_SMB0) 1001-001xb
BBH@ : BBH
92
WLAN (FCH_SMB0)
nonBBH@@ : nonBBH@
4 4

Notes List
B 1.0
LA8681P
A B C D E
5 4 3 2 1
tK
Power-Up/Down Sequence Wy^Z^d>Z'Wh,E
1. All the ASIC supplies must fully reach their respective nominal voltages within 20 ms of the start of the ramp-up Wy^WtZE>'WhWK&&,'WhWKE
sequence, though a shorter ramp-up duration is preferred.
K
2. VDDR3 should ramp-up before or simultaneously with VDDC. Wy^Z^d,E'WhK
Wy^WtZE>'WhWK&&,'WhWKE,
3. For LVDS, DPx_VDD10 should ramp-up before DPx_VDD18 and the PCIe Reference clock should begin before
D DPx_VDD18. For power-down, DPx_VDD18 should ramp-down before DPx_VDD10. 'WhWW s Wy KD D
D
4. The external pull-ups on the DDC/AUX signals (if applicable) should ramp-up before or after both VDDC and W/WsW/sZd^ssZsd s K&& KE
VDD_CT have ramped up. WWsW&sWWs
Wsss/sYs/
5.VDDC and VDD_CT should not ramp-up simultaneously. (e.g., VDDC should reach 90% before VDD_CT starts to
W>>WsDWs^Ws
ramp-up (or vice versa).)
W&sWsW>>s s K&& KE
^Ws
W/s s K&& KE
VDDR3(3.3VGS) Note: Do not drive any IOs before VDDR3 is ramped up.
sZs s K&& KE
/&ss ^ K&& KE
PCIE_VDDC(1.0V) K s ^
W/s
/&ss'KZt'Wh
/&sstK
C
VDDR1(1.5VGS) sZ s K&& K&&
C
ss/ s K&& K&&

VDDC/VDDCI(1.12V)
VDD_CT(1.8V)
PXS_RST# PE_EN K^
'Wh 'Wh
PERSTb BIF_VDDC
PXS_PWREN
REFCLK PX_mode
B s>t MOS
s'^ B
Straps Reset
s SI4800
s'^
Straps Valid s s'^
Regulator

Global ASIC Reset

Regulator
s'KZ
s s'^
T4+16clock
SI4800

PWRGOOD
A A

dGPU Block Diagram
B 1.0
LA8681P
5 4 3 2 1
5 4 3 2 1
AAAU6 PCB@ AAAU22 E1200@ BBBU22 E1800@
PCB 0R3 LA-8681P REV0 M/B EM1200GBB22GV EM1800GBB22GV

U22B
+1.8VS
C508 1 HDMI@ 0.1U_0402_16V7K HDMI_TX2P_C DP_ZVSS
DISPLAYPORT 1
2 A8 H3 R398 1 2 150_0402_1%
<23> HDMI_TX2P HDMI_TX2N_C TDP1_TXP0 DP_ZVSS
C509 1 0.1U_0402_16V7K
DP MISC
<23> HDMI_TX2N 2 B8 TDP1_TXN0
HDMI@ G2
DP_BLON APU_ENBKL <22>
R404 1 2 1K_0402_5% APU_DBREQ# C510 1 HDMI@
2 0.1U_0402_16V7K HDMI_TX1P_C B9 H2
<23> HDMI_TX1P HDMI_TX1N_C TDP1_TXP1 DP_DIGON APU_ENVDD <22>
C511 1 2 0.1U_0402_16V7K A9 H1
D <23> HDMI_TX1N TDP1_TXN1 DP_VARY_BL APU_BLPWM <22> D
R399 1 2 1K_0402_5% APU_SVC HDMI@
C512 1 HDMI@
2 0.1U_0402_16V7K HDMI_TX0P_C D10
APU_SVD <23> HDMI_TX0P HDMI_TX0N_C TDP1_TXP2
R400 1 2 1K_0402_5% C513 1 2 0.1U_0402_16V7K C10 B2
<23> HDMI_TX0N TDP1_TXN2 TDP1_AUXP HDMI_CLK <23>
HDMI@ C2
TDP1_AUXN HDMI_DATA <23>
R405 2 1 300_0402_5% APU_RST# C514 1 HDMI@
2 0.1U_0402_16V7K HDMI_CLKP_C A10
<23> HDMI_CLKP TDP1_TXP3
C515 1 2 0.1U_0402_16V7K HDMI_CLKN_C B10 C1
APU_PWRGD <23> HDMI_CLKN TDP1_TXN3 TDP1_HPD HDMI_DET <23>
R401 2 1 300_0402_5% HDMI@
B5 A3 EDID_CLK
<22> LVDS_A2 LTDP0_TXP0 LTDP0_AUXP EDID_CLK <22>
R402 1 2 510_0402_1% TEST_25_L EDID_DATA
DISPLAYPORT 0
<22> LVDS_A2# A5 B3 EDID_DATA <22>
LTDP0_TXN0 LTDP0_AUXN
R403 1 2 1K_0402_5% TEST36 D6 D3 LTDP0_HPD R406 1 2 100K_0402_5%
<22> LVDS_A1 LTDP0_TXP1 LTDP0_HPD
<22> LVDS_A1# C6
LTDP0_TXN1
C12 DAC_RED <24>
DAC_RED R407 1
<22> LVDS_A0 A6
LTDP0_TXP2 DAC_REDB
D13 2 150_0402_1%
<22> LVDS_A0# B6 A12 DAC_GRN <24>
+3VS LTDP0_TXN2 DAC_GREEN R408 1
B12 2 150_0402_1%
DAC_GREENB
D8 A13
VGA DAC
<22> LVDS_ACLK LTDP0_TXP3 DAC_BLUE DAC_BLU <24>
C8 B13 R409 1 2 150_0402_1%
EDID_CLK <22> LVDS_ACLK# LTDP0_TXN3 DAC_BLUEB
R510 1 2 4.7K_0402_5%
<10> APU_CLK V2 E1 CRT_HSYNC <24>
R511 1 EDID_DATA CLKIN_H DAC_HSYNC
2 4.7K_0402_5% <10> APU_CLK# V1
CLKIN_L DAC_VSYNC
E2 CRT_VSYNC <24>
APU_PROCHOT#
CLK
R410 1 2 1K_0402_5% D2 F2
<10> APU_DISP_CLK DISP_CLKIN_H DAC_SCL CRT_DDC_CLK <24>
<10> APU_DISP_CLK# D1 D4 CRT_DDC_DATA <24>
R411 1 APU_ALERT#_R DISP_CLKIN_L DAC_SDA
2 1K_0402_5%
J1 D12 DAC_ZVSS R413 1 2 499_0402_1%
<44> APU_SVC SVC DAC_ZVSS
<44> APU_SVD J2
SVD
SER
R1 PAD T66
R809 1 EC_SMB_CK2_R TEST4 AMD check list update
<16,29,30> EC_SMB_CK2 2 0_0402_5% P3 R2 PAD T67
R810 1 EC_SMB_DA2_R SIC TEST5 20101110
TO EC <16,29,30> EC_SMB_DA2 2 0_0402_5% P4
SID TEST6
R6
T5 PAD T68
TEST14 TEST15 R415 1 @
<10> APU_RST# T3
RESET_L TEST15
E4 2 1K_0402_5%
C C
<10,44> APU_PWRGD T4 K4 PAD T69
CTRL
PWROK TEST16
1 L1 PAD T95
@ C1022 R808 1 APU_PROCHOT# TEST17 TEST18
<10,30,37> H_PROCHOT# 2 0_0402_5% U1
PROCHOT_L TEST18
L2 R416 1 2 1K_0402_5%
APU_THERMTRIP# U2 M2 TEST19 R417 1 2 1K_0402_5%
TEST
100P_0402_50V8J APU_ALERT#_R THERMTRIP_L TEST19 TEST25_H R419 1
T2
ALERT_L TEST25_H
K1 2 510_0402_1%
2 K2 TEST_25_L
APU_TDI TEST25_L TEST28_H
N2 L5 PAD T71
APU_TDO TDI TEST28_H TEST28_L
N1 M5 PAD T72
APU_TCK TDO TEST28_L TEST31
P1 M21 PAD T73
TCK TEST31
JTAG
APU_TMS P2 J18 TEST33_H C516 1 2 0.1U_0402_16V4Z R420 1 2 51_0402_1%
APU_TRST# TMS TEST33_H TEST33_L C517 1
M4 J19 2 0.1U_0402_16V4Z R421 1 2 51_0402_1%
APU_DBRDY TRST_L TEST33_L Delete Test point for layout limitation
M3 U15
APU_DBREQ# DBRDY TEST34_H 20100818 non HDMI@
M1 T15
DBREQ_L TEST34_L TEST35 R422 1
TEST35
H4 2 1K_0402_5%
F4 N5 TEST36
<44> APU_VDDNB_RUN_FB_H VDDCR_NB_SENSE TEST36 TEST37
G1 R5 PAD T76 R958 1 HDMI@ 2 1K_0402_5% +1.8VS
<44> APU_VDD0_RUN_FB_H VDDCR_CPU_SENSE TEST37
T77PAD F3
VDDIO_MEM_S_SENSE HDMI function enable R958 mount
<44> APU_VDD0_RUN_FB_L F1 disable R422 mount
VSS_SENSE
K3
TEST38
B4 T1 ALLOW_STOP# <10>
RSVD_1 DMAACTIVE_L
W11
RSVD_2 R423 1
V5
RSVD_3 2 1K_0402_5% +1.8VS
+3VS S IC E SERIES EME450GBB22GVA 1.65G BGA
1
R424
10K_0402_5%
2
B R425 B
AMD Debug
2
1K_0402_5% check the connect need or not

2
B
+1.8VS +1.8VS
1
Q79
+1.8VS
E
APU_THERMTRIP# 3 1 H_THERMTRIP# <12>

C
MMBT3904_NL_SOT23-3 JHDT1
1 2 APU_TCK R843 2 1 1K_0402_5%
1 2
1 2
1K_0402_5%
R427 @ 0_0402_5% 3 4 APU_TMS R844 2 1 1K_0402_5%

3 4
2
need to pop for HDT debug

R842
If FCH internal pull-up disabled, level-shifter could be deleted. 20101012 5 6 APU_TDI R845 2 1 1K_0402_5%
5 6
Need BIOS to disable internal pull-up!!
@ 7 8 APU_TDO
7 8
1
APU_TRST# R846 1 20_0402_5% APU_TRST#_R 9 10 APU_PWRGD

9 10
R847 2 @ 1 10K_0402_5% 11 12 APU_RST#
11 12
R848 2 @ 1 10K_0402_5% 13 14 APU_DBRDY
13 14
R849 2 @ 1 10K_0402_5% 15 16 APU_DBREQ#
15 16
17 18 J108_PLLTST0 R851 1 @ 2 0_0402_5% TEST19
17 18
19 20 J108_PLLTST1 R852 1 @ 2 0_0402_5% TEST18
19 20
Please be noted about TEST_18 and TEST_19
SAMTE_ASP-136446-07-B
@ need to pop for HDT debug
A 20101012 A

FT1 CTRL/DP/CRT
Custom 1.0
LA8681P
Date: Wednesday, November 30, 2011 Sheet 5 of 48
5 4 3 2 1
A B C D E
U22E
DDR_A_MA0 R17 B14 DDR_A_D0
DDR_A_MA1 M_ADD0 M_DATA0 DDR_A_D1
H19 A15
J17 A17
DDR_A_MA3 M_ADD2 M_DATA2 DDR_A_D3 DDR_A_D[0..63]
H18 D18 DDR_A_D[0..63] <8,9>
H17 A14
DDR_A_MA5 M_ADD4 M_DATA4 DDR_A_D5 DDR_A_MA[0..15]
G17 C14 DDR_A_MA[0..15] <8,9>
H15 C16
DDR_A_MA7 M_ADD6 M_DATA6 DDR_A_D7 DDR_A_DM[0..7]
G18 D16 DDR_A_DM[0..7] <8,9>
4 DDR_A_MA8 M_ADD7 M_DATA7 4
F19
DDR_A_MA9 M_ADD8 DDR_A_D8
E19 C18
T19 A19
F17 B21
E18 D20
W17 A18
E16 B18
G15 A21
M_ADD15 M_DATA14
DDR SYSTEM MEMORY

C20 DDR_A_D15
M_DATA15
<8,9> DDR_A_BS0 R18
M_BANK0 DDR_A_D16
<8,9> DDR_A_BS1 T18 C23
M_BANK1 M_DATA16 DDR_A_D17
<8,9> DDR_A_BS2 F16 D23
M_BANK2 M_DATA17 DDR_A_D18
F23
DDR_A_DM0 M_DATA18 DDR_A_D19
D15 F22
DDR_A_DM1 M_DM0 M_DATA19 DDR_A_D20
B19 C22
D21 D22
H22 F20
P23 F21
DDR_A_DM5 M_DM4 M_DATA23
V23
DDR_A_DM6 M_DM5 DDR_A_D24
AB20 H21
AA16 H23
M_DM7 M_DATA25 DDR_A_D26 U22A
K22
DDR_A_DQS0 M_DATA26 DDR_A_D27 PCIE_CRX_GTX_P0
<8,9> DDR_A_DQS0 A16 K21 <15> PCIE_CRX_GTX_P0 AA6 AB6 PCIE_CTX_C_GRX_P0 C518 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P0 <15>
M_DQS_H0 M_DATA27 P_GPP_RXP0 P_GPP_TXP0
<8,9> DDR_A_DQS#0
DDR_A_DQS#0 B16 G23 DDR_A_D28 <15> PCIE_CRX_GTX_N0 PCIE_CRX_GTX_N0 Y6 AC6 PCIE_CTX_C_GRX_N0 C519 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_N0 <15>
DDR_A_DQS1 M_DQS_L0 M_DATA28 DDR_A_D29 P_GPP_RXN0 P_GPP_TXN0
<8,9> DDR_A_DQS1 B20 H20
DDR_A_DQS#1 M_DQS_H1 M_DATA29 DDR_A_D30 PCIE_CRX_GTX_P1
<8,9> DDR_A_DQS#1 A20 K20 <15> PCIE_CRX_GTX_P1 AB4 AB3 PCIE_CTX_C_GRX_P1 C520 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P1 <15>
PCIE I/F
M_DQS_L1 M_DATA30 P_GPP_RXP1 P_GPP_TXP1
<8,9> DDR_A_DQS2
DDR_A_DQS2 E23 K23 DDR_A_D31 <15> PCIE_CRX_GTX_N1 PCIE_CRX_GTX_N1 AC4 AC3 PCIE_CTX_C_GRX_N1 C521 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_N1 <15>
DDR_A_DQS#2 M_DQS_H2 M_DATA31 P_GPP_RXN1 P_GPP_TXN1
<8,9> DDR_A_DQS#2 E22
M_DQS_L2 PCIE_CTX_C_GRX_P2 C522 1
<8,9> DDR_A_DQS3
DDR_A_DQS3 J22 N23 DDR_A_D32 <15> PCIE_CRX_GTX_P2 PCIE_CRX_GTX_P2 AA1 Y1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P2 <15>
M_DQS_H3 M_DATA32 P_GPP_RXP2 P_GPP_TXP2 PCIE_CTX_C_GRX_N2 C523 1
<8,9> DDR_A_DQS#3
DDR_A_DQS#3 J23 P21 DDR_A_D33 <15> PCIE_CRX_GTX_N2 PCIE_CRX_GTX_N2 AA2 Y2 2 0.1U_0402_16V7K PCIE_CTX_GRX_N2 <15>
DDR_A_DQS4 M_DQS_L3 M_DATA33 DDR_A_D34 P_GPP_RXN2 P_GPP_TXN2
<8,9> DDR_A_DQS4 R22 T20
M_DQS_H4 M_DATA34 PCIE_CTX_C_GRX_P3 C524 1
<8,9> DDR_A_DQS#4
DDR_A_DQS#4 P22 T23 DDR_A_D35 <15> PCIE_CRX_GTX_P3 PCIE_CRX_GTX_P3 Y4 V3 2 0.1U_0402_16V7K PCIE_CTX_GRX_P3 <15>
3 DDR_A_DQS5 M_DQS_L4 M_DATA35 DDR_A_D36 PCIE_CRX_GTX_N3 P_GPP_RXP3 P_GPP_TXP3 PCIE_CTX_C_GRX_N3 C525 1 3
<8,9> DDR_A_DQS5 W22 M20 <15> PCIE_CRX_GTX_N3 Y3 V4 2 0.1U_0402_16V7K PCIE_CTX_GRX_N3 <15>
DDR_A_DQS#5 M_DQS_H5 M_DATA36 DDR_A_D37 P_GPP_RXN3 P_GPP_TXN3
<8,9> DDR_A_DQS#5 V22 P20
DDR_A_DQS6 M_DQS_L5 M_DATA37 DDR_A_D38 P_ZVDD_10 R436 1 1.27K_0402_1%
<8,9> DDR_A_DQS6 AC20 R23 +1.05VS 1 2 Y14 AA14 P_ZVSS 2
DDR_A_DQS#6 M_DQS_H6 M_DATA38 DDR_A_D39 R435 2K_0402_1% P_ZVDD_10 P_ZVSS
<8,9> DDR_A_DQS#6 AC21 T22
DDR_A_DQS7 M_DQS_L6 M_DATA39
<8,9> DDR_A_DQS7 AB16
M_DQS_H7
Less than 1"
DDR_A_DQS#7 AC16 V20 DDR_A_D40 Less than 1"
<8,9> DDR_A_DQS#7 M_DQS_L7 M_DATA40
V21 DDR_A_D41 <10> UMI_RX0P AA12 AB12 UMI_TX0P_C C526 1 2 0.1U_0402_16V7K
M_DATA41 P_UMI_RXP0 P_UMI_TXP0 UMI_TX0P <10>
DDR_A_CLK0 M17 Y23 DDR_A_D42 <10> UMI_RX0N Y12 AC12 UMI_TX0N_C C527 1 2 0.1U_0402_16V7K
<8> DDR_A_CLK0 M_CLK_H0 M_DATA42 P_UMI_RXN0 P_UMI_TXN0 UMI_TX0N <10>
DDR_A_CLK#0 M16 Y22 DDR_A_D43
<8> DDR_A_CLK#0 M_CLK_L0 M_DATA43
DDR_A_CLK1 M19 T21 DDR_A_D44 <10> UMI_RX1P AA10 AC11 UMI_TX1P_C C528 1 2 0.1U_0402_16V7K
<8> DDR_A_CLK1 M_CLK_H1 M_DATA44 P_UMI_RXP1 P_UMI_TXP1 UMI_TX1P <10>
DDR_A_CLK#1 M18 U23 DDR_A_D45 Y10 AB11 UMI_TX1N_C C529 1 2 0.1U_0402_16V7K
UMI I/F
<8> DDR_A_CLK#1 M_CLK_L1 M_DATA45 <10> UMI_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_TX1N <10>
DDR_B_CLK2 N18 W23 DDR_A_D46
<9> DDR_B_CLK2 M_CLK_H2 M_DATA46
DDR_B_CLK#2 N19 Y21 DDR_A_D47 <10> UMI_RX2P AB10 AA8 UMI_TX2P_C C530 1 2 0.1U_0402_16V7K
<9> DDR_B_CLK#2 M_CLK_L2 M_DATA47 P_UMI_RXP2 P_UMI_TXP2 UMI_TX2P <10>
DDR_B_CLK3 L18 <10> UMI_RX2N AC10 Y8 UMI_TX2N_C C531 1 2 0.1U_0402_16V7K
<9> DDR_B_CLK3 M_CLK_H3 P_UMI_RXN2 P_UMI_TXN2 UMI_TX2N <10>
DDR_B_CLK#3 L17 Y20 DDR_A_D48
<9> DDR_B_CLK#3 M_CLK_L3 M_DATA48
AB22 DDR_A_D49 <10> UMI_RX3P AC7 AB8 UMI_TX3P_C C532 1 2 0.1U_0402_16V7K
M_DATA49 P_UMI_RXP3 P_UMI_TXP3 UMI_TX3P <10>
DDR_RST# L23 AC19 DDR_A_D50 <10> UMI_RX3N AB7 AC8 UMI_TX3N_C C533 1 2 0.1U_0402_16V7K
<8,9> DDR_RST# M_RESET_L M_DATA50 P_UMI_RXN3 P_UMI_TXN3 UMI_TX3N <10>
DDR_EVENT# N17 AA18 DDR_A_D51
<8,9> DDR_EVENT# M_EVENT_L M_DATA51
AA23 DDR_A_D52 S IC E SERIES EME450GBB22GVA 1.65G BGA
M_DATA52 DDR_A_D53
AA20
DDR_CKE0 M_DATA53 DDR_A_D54
<8,9> DDR_CKE0 F15 AB19
DDR_CKE1 M_CKE0 M_DATA54 DDR_A_D55
<8,9> DDR_CKE1 E15 Y18
M_CKE1 M_DATA55
AC17 DDR_A_D56
M_DATA56 DDR_A_D57
Y16
DDR_A_ODT0 M_DATA57 DDR_A_D58
<8> DDR_A_ODT0 W19 AB14
DDR_A_ODT1 M0_ODT0 M_DATA58 DDR_A_D59
<8> DDR_A_ODT1 V15 AC14
DDR_B_ODT0 M0_ODT1 M_DATA59 DDR_A_D60
<9> DDR_B_ODT0 U19 AC18
DDR_B_ODT1 M1_ODT0 M_DATA60 DDR_A_D61
<9> DDR_B_ODT1 W15 AB18
M1_ODT1 M_DATA61 DDR_A_D62
AB15
DDR_CS0_DIMMA# M_DATA62 DDR_A_D63
<8> DDR_CS0_DIMMA# T17 AC15
DDR_CS1_DIMMA# M0_CS_L0 M_DATA63
<8> DDR_CS1_DIMMA# W16
2 DDR_CS0_DIMMB# M0_CS_L1 2
<9> DDR_CS0_DIMMB# U17
DDR_CS1_DIMMB# M1_CS_L0 +MEM_VREF
<9> DDR_CS1_DIMMB# V16 M23
M1_CS_L1 M_VREF
DDR_A_RAS# U18
<8,9> DDR_A_RAS# M_RAS_L
DDR_A_CAS# V19
<8,9> DDR_A_CAS# M_CAS_L
<8,9> DDR_A_WE#
DDR_A_WE# V17 M22 M_ZVDDIO_MEM_SR437 2 1 +1.5V_APU
M_WE_L M_ZVDDIO_MEM_S
S IC E SERIES EME450GBB22GVA 1.65G BGA 39.2_0402_1%
+1.5V_APU
2
+1.5V_APU R438
1K_0402_1%
R444 1 2 DDR_EVENT#
1
1K_0402_5% +MEM_VREF
2
1 1
R439 C534 C535
1 1K_0402_1% 1
1000P_0402_50V7K 0.1U_0402_16V4Z
2 2
1
Place within 1000 mils to APU

20100526 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/06/30 Deciphered Date 2012/0630 Title
FT1 DDRIII/UMI/PCIE
Custom 1.0
LA8681P
A B C D E
5 4 3 2 1
+1.8VS
11A U22C 2A L29

+APU_CORE +VDD_18 2 1 U22D
TSense/PLL/DP/PCIE/IO
E5 U8 FBMA-L11-201209-221LMA30T_0805 A7 N13
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
0.1U_0402_16V7K
VDDCR_CPU_1 VDD_18_1 VSS_1 VSS_50
E6 W8 1 1 1 1 1 1 1 B7 N20
+APU_CORE VDDCR_CPU_2 VDD_18_2 VSS_2 VSS_51
C545
C537
C546
C538
C547
C548
C549
F5 U6 B11 N22
D VDDCR_CPU_3 VDD_18_3 Change from SM010014520 to SD002000080 VSS_3 VSS_52 D
F7 U9 B17 P10
VDDCR_CPU_4 VDD_18_4 20100816 VSS_4 VSS_53
G6 W6 B22 P14
VDDCR_CPU_5 VDD_18_5 2 2 2 2 2 2 2 VSS_5 VSS_54
G8 T7 C4 R4
H5 V7 D5 R7
CPU CORE
H7 D7 R20
VDDCR_CPU_8 VSS_8 VSS_57
J6 D9 T6
J8 D11 T9
L7 D14 T11
M6 B15 T13
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
180P_0402_50V8J
VDDCR_CPU_12 Change from SM010014520 to SD002000080 VSS_12 VSS_61
1 1 1 1 1 1 M8 D17 U4
VDDCR_CPU_13 20100816 VSS_13 VSS_62
C550
C551
C552
C553
C554
C555
N7 D19 U5
VDDCR_CPU_14 +1.8VS VSS_14 VSS_63
R8 E7 U7
GND
0.15A E9 U12
2 2 2 2 2 2 +APU_CORE_NB L30 VSS_16 VSS_65
10A E12
VSS_17 VSS_66
U20
DAC
E8 W9 +VDD_18_DAC 2 1 E20 U22
VDDCR_NB_1 VDD_18_DAC VSS_18 VSS_67
E11 F8 V8
10U_0603_6.3V6M
180P_0402_50V8J
VDDCR_NB_2 FBMA-L11-201209-221LMA30T_0805 VSS_19 VSS_68
E13 1 1 1 F11 V9
1U_0402_6.3V6K
VDDCR_NB_3 VSS_20 VSS_69
C556
C557
C558
F9 +1.0VS has been raised to +1.05VS for F13 V11
F12 AMD design guide 45339_R1.02 update 20101004 G4 V13
GPU AND NB CORE

G11 G5 W1
G13
VDDCR_NB_6
VDDCR_NB_7
POWER 2 2 2 G7
VSS_23
VSS_24
VSS_72
VSS_73
W2
H9 +1.05VS G9 W4
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

1 1 1 1 1 H12 G12 W5
C559
C560
C561
C562
C563
K11
VDDCR_NB_10
0.2A G20
VSS_27 VSS_76
W7
K13 L31 G22 W12
DIS PLL
L10 U11 +VDDL_10 2 1 H6 W20
2 2 2 2 2 VDDCR_NB_12 VDDPL_10 VSS_29 VSS_78
L12 H11 Y5
1U_0402_6.3V6K
180P_0402_50V8J
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDCR_NB_13 FBMA-L11-201209-221LMA30T_0805 VSS_30 VSS_79
L14 1 1 1 1 H13 Y7
C564
C565
C566
C567
M11 J4 Y9
M12 J5 Y11
M13
VDDCR_NB_17
place C564 J7
VSS_34 VSS_83
Y13
N10 2 2 2 2 J20 Y15
VDDCR_NB_18 close APU ball VSS_35 VSS_84
N12 K10 Y17
VDDCR_NB_19 L32 VSS_36 VSS_85
N14
VDDCR_NB_20
5.5A K14
VSS_37 VSS_86
Y19
PCIE/IO/DDR3 Phy
P11 +VDD_10 2 1 L4 AA4
+APU_CORE_NB VDDCR_NB_21 VSS_38 VSS_87
P13 U13 L6 AA22
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
0.1U_0402_16V7K
0.1U_0402_16V7K
VDDCR_NB_22 VDD_10_1 FBMA-L11-201209-221LMA30T_0805 VSS_39 VSS_88
W13 1 1 1 1 1 1 1 L8 AB2
+1.5V_APU VDD_10_2 VSS_40 VSS_89
C569
C570
C571
C572
C573
C574
2A
C1102
C V12 L11 AB5 C
VDD_10_3 Change from SM010014520 to SD002000080 VSS_41 VSS_90
G16 T12 L13 AB9
VDDIO_MEM_S_1 VDD_10_4 20100816 VSS_42 VSS_91
G19 L20 AB13
VDDIO_MEM_S_2 2 2 2 2 2 2 2 VSS_43 VSS_92
E17 L22 AB17
VDDIO_MEM_S_3 VSS_44 VSS_93
J16 M7 AB21
DDR3
L16 N4 AC5
L19 N6 AC9
N16 N8 AC13
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
180P_0402_50V8J

1 1 1 1 1 1 1 R16 N11 A11
DP Phy/IO
VDDIO_MEM_S_8 VSS_49 VSSBG_DAC
C582
C583
C584
C585
C586
C587
C588
R19
VDDIO_MEM_S_9
0.5A
W18 +3VS
VDDIO_MEM_S_10 S IC E SERIES EME450GBB22GVA 1.65G BGA
U16 A4
2 2 2 2 2 2 2 VDDIO_MEM_S_11 VDD_33
1U_0402_6.3V6K
0.1U_0402_16V7K
1 1
C580
C581
S IC E SERIES EME450GBB22GVA 1.65G BGA
2 2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
+1.5V_APU
1 1 1 1
C591
C592
C593
C594
2 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1
C589
C590
2 2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1
C595
C596
C597
C598
B B
2 2 2 2
+1.5V_APU +1.5V
1 1 1 1 1
180P_0402_50V8J
180P_0402_50V8J
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C599
C600
C601
C602
C603
@ J15
1 2
1 2
2 2 2 2 2
JUMP_43X79
By case (Along split)

+1.5V_APU
+1.5V_APU
POWER
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 1 1 1
C608
C609
C610
C611
C612
C613
C614
C615
A A
330U_2.5V_M
1
22U_0805_6.3V6M
2 2 2 2 2 2 2 2
1
+
C622
C623
@
@
2 2
Near CPU Socket

P07-FT1 PWR/VSS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
LA8681P
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
JDIMM1 ME@
+VREF_DQ 1 VREF_DQ VSS 2
3 4 DDR_A_D4 +1.5V +1.5V
VSS DQ4
1000P_0402_50V7K
DDR_A_D[0..63]
0.1U_0402_16V4Z
DDR_A_D0 5 6 DDR_A_D5
DDR_A_D1 DQ0 DQ5 DDR_A_D[0..63] <6,9>
1 1 7 DQ1 VSS 8
2
C626
C627
9 10 DDR_A_MA[0..15]
VSS DQS0# DDR_A_DQS#0 <6,9> DDR_A_MA[0..15] <6,9>
DDR_A_DM0 11 12 R440 R441
DM0 DQS0 DDR_A_DQS0 <6,9> DDR_A_DM[0..7]
13 14 DDR_A_DM[0..7] <6,9> 1K_0402_1% 1K_0402_1%
2 2 DDR_A_D2 VSS VSS DDR_A_D6
15 DQ2 DQ6 16
1
DQ3 DQ7
19 VSS VSS 20 +VREF_DQ +VREF_CA
D DDR_A_D8 DDR_A_D12 D
21 DQ8 DQ12 22
DQ9 DQ13
2
25 26
VSS VSS DDR_A_DM1 R442 R443
<6,9> DDR_A_DQS#1 27 28
DQS1# DM1 1K_0402_1% 1K_0402_1%
<6,9> DDR_A_DQS1 29 30 DDR_RST# <6,9>
DQS1 RESET#
31 32
DDR_A_D10 VSS VSS DDR_A_D14
33 34
1
DDR_A_D11 DQ10 DQ14 DDR_A_D15
35 36
DQ11 DQ15
37 38
39 40
41
43
DQ17 DQ21
42
44
Combine to one?
VSS VSS DDR_A_DM2
<6,9> DDR_A_DQS#2 45 46
DQS2# DM2
<6,9> DDR_A_DQS2 47 48
DQS2 VSS DDR_A_D22
49 50
DDR_A_D18 VSS DQ22 DDR_A_D23
51 52
DDR_A_D19 DQ18 DQ23
53 54
DQ19 VSS DDR_A_D28
55 56
57 58
DDR_A_D25 DQ24 DQ29
59 60
DQ25 VSS
61 62 DDR_A_DQS#3 <6,9>
DDR_A_DM3 VSS DQS3#
63 64 DDR_A_DQS3 <6,9>
DM3 DQS3
65 66
67 68
69 70
DQ27 DQ31
71 72
VSS VSS
73 74 +1.5V
<6,9> DDR_CKE0 CKE0 CKE1 DDR_CKE1 <6,9>
75 76
C VDD VDD DDR_A_MA15 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C
77 78
NC A15 DDR_A_MA14
<6,9> DDR_A_BS2 79 80 2 2 2 2 2 2
BA2 A14
81 82
DDR_A_MA12 VDD VDD DDR_A_MA11 C628 C629 C630 C631 C632 C633
83 84
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 86
A9 A7 1 1 1 1 1 1
87 88
DDR_A_MA8 VDD VDD DDR_A_MA6 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
89 90
DDR_A_MA5 A8 A6 DDR_A_MA4
91 92
A5 A4
93 94
DDR_A_MA3 VDD VDD DDR_A_MA2
95 96
97 98
A1 A0
99 100
VDD VDD
101 102 DDR_A_CLK1 <6>
<6> DDR_A_CLK0 CK0 CK1
103 104 DDR_A_CLK#1 <6>
<6> DDR_A_CLK#0 CK0# CK1#
105 106
DDR_A_MA10 VDD VDD
107 108 DDR_A_BS1 <6,9>
A10/AP BA1
<6,9> DDR_A_BS0 109 110 DDR_A_RAS# <6,9>
BA0 RAS#
111 112
VDD VDD
113 114 DDR_CS0_DIMMA# <6>
<6,9> DDR_A_WE# WE# S0#
<6,9> DDR_A_CAS# 115
117
CAS# ODT0
116
118
DDR_A_ODT0 <6> CRB 0.1u X1 4.7u X1 CRB 100U X2
DDR_A_MA13 VDD VDD
119 120 DDR_A_ODT1 <6>
A13 ODT1 +1.5V
121 122
<6> DDR_CS1_DIMMA# S1# NC +0.75VS
123 124
VDD VDD
125 126 +VREF_CA
TEST VREF_CA
127 128
VSS VSS
1000P_0402_50V7K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
220U_6.3V_M
0.1U_0402_16V4Z
DDR_A_D33 131 132 DDR_A_D37 1 1 2 1
DQ33 DQ37
C645
C642
C641
133 134 1
VSS VSS
C644
C643
135 136 DDR_A_DM4 +
B <6,9> DDR_A_DQS#4 DQS4# DM4 B
<6,9> DDR_A_DQS4 137 DQS4 VSS 138
139 140 DDR_A_D38 2 2 1
DDR_A_D34 VSS DQ38 DDR_A_D39 2 2
141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS DDR_A_D44
145 VSS DQ44 146
DDR_A_D40 147 148 DDR_A_D45 20100729
DDR_A_D41 DQ40 DQ45
149 150
DQ41 VSS
151 VSS DQS5# 152 DDR_A_DQS#5 <6,9>
DDR_A_DM5 153 154
DM5 DQS5 DDR_A_DQS5 <6,9>
155 VSS VSS 156 Place near JDIMM1 SF000002Y00
DDR_A_D42 157 158 DDR_A_D46
159 DQ43 DQ47 160
161 162
163 DQ48 DQ52 164
DDR_A_D49 165 166 DDR_A_D53
DQ49 DQ53
167 VSS VSS 168
169 170 DDR_A_DM6
<6,9> DDR_A_DQS#6 DQS6# DM6
<6,9> DDR_A_DQS6 171 DQS6 VSS 172
173 174 DDR_A_D54
175 DQ50 DQ55 176
DDR_A_D51 177 178
DQ51 VSS DDR_A_D60
179 VSS DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS 184
185 186 DDR_A_DQS#7 <6,9>
DDR_A_DM7 VSS DQS7#
187 DM7 DQS7 188 DDR_A_DQS7 <6,9>
189 190
191 DQ58 DQ62 192
DDR_A_D59 193 194 DDR_A_D63
R445 10K_0402_5% DQ59 DQ63
195 196
A VSS VSS A
1 2 197 198 DDR_EVENT# <6,9>
SA0 EVENT#
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
+3VS 199 VDDSPD SDA 200 FCH_SMDAT0 <9,12,29>

201 202 FCH_SMCLK0 <9,12,29>
SA1 SCL
1 1 203 VTT VTT 204 +0.75VS
1
C646
C647
R446 205 206

GND1 GND2
207 208
2 2 10K_0402_5% BOSS1 BOSS2 Security Classification Compal Secret Data Compal Electronics, Inc.
2
LCN_DAN06-K4406-0103 DDR3 SO-DIMM A DDR3 SODIMM-I Socket

Reverse Type THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Custom 1.0
LA8681P
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
JDIMM2 ME@
+VREF_DQ 1 VREF_DQ VSS1 2
3 4 DDR_A_D4
VSS2 DQ4
1000P_0402_50V7K
0.1U_0402_16V4Z
DDR_A_D1 DQ0 DQ5
1 1 7 DQ1 VSS3 8
DIMM@ 9 10
DDR_A_DM0 VSS4 DQS#0 DDR_A_DQS#0 <6,8> DDR_A_D[0..63]
DIMM@ C648 C649 11 12
DM0 DQS0 DDR_A_DQS0 <6,8> DDR_A_D[0..63] <6,8>
13 VSS5 VSS6 14
2 2 DDR_A_D2 DDR_A_D6 DDR_A_MA[0..15]
15 DQ2 DQ6 16 DDR_A_MA[0..15] <6,8>
D DDR_A_D3 DDR_A_D7 D
17 DQ3 DQ7 18
19 20 DDR_A_DM[0..7]
VSS7 VSS8 DDR_A_DM[0..7] <6,8>
23 24
DQ9 DQ13
25 26
VSS9 VSS10 DDR_A_DM1
<6,8> DDR_A_DQS#1 27 28
DQS#1 DM1
<6,8> DDR_A_DQS1 29 30 DDR_RST# <6,8>
DQS1 RESET#
31 32
DDR_A_D10 VSS11 VSS12 DDR_A_D14
33 34
35 36
DQ11 DQ15
37 38
39 40
41 42
DQ17 DQ21
43 44
VSS15 VSS16 DDR_A_DM2
<6,8> DDR_A_DQS#2 45 46
DQS#2 DM2
<6,8> DDR_A_DQS2 47 48
DQS2 VSS17 DDR_A_D22
49 50
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 52
DDR_A_D19 DQ18 DQ23
53 54
DQ19 VSS19 DDR_A_D28
55 56
57 58
DDR_A_D25 DQ24 DQ29
59 60
DQ25 VSS21
61 62 DDR_A_DQS#3 <6,8>
DDR_A_DM3 VSS22 DQS#3
63 64 DDR_A_DQS3 <6,8>
DM3 DQS3 +1.5V
65 66
67 68
DDR_A_D27 DQ26 DQ30 DDR_A_D31 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
69 70
DQ27 DQ31
71 72 2 2 2 2 2 2
VSS25 VSS26
C650 C651 C652 C653 C654 C655
DIMM@ DIMM@ DIMM@ DIMM@ DIMM@ DIMM@
73 74 1 1 1 1 1 1
C <6,8> DDR_CKE0 CKE0 CKE1 DDR_CKE1 <6,8> C
75 76 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VDD1 VDD2 DDR_A_MA15
77 78
NC1 A15 DDR_A_MA14
<6,8> DDR_A_BS2 79 80
BA2 A14
81 82
DDR_A_MA12 VDD3 VDD4 DDR_A_MA11
83 84
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 86
A9 A7
87 88
89 90
91
93
A5 A4
92
94
CRB 0.1u X1 4,7uX1
95 96
97 98
A1 A0 +0.75VS
99 100
VDD9 VDD10
101 102 DDR_B_CLK3 <6>
<6> DDR_B_CLK2 CK0 CK1
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
103 104 DDR_B_CLK#3 <6>
<6> DDR_B_CLK#2 CK0# CK1#
105 106 1 2
DDR_A_MA10 VDD11 VDD12
107 108 DDR_A_BS1 <6,8>
A10/AP BA1
C664
C663
<6,8> DDR_A_BS0 109 110 DDR_A_RAS# <6,8>
BA0 RAS#
111 112
VDD13 VDD14 2 1
113 114 DDR_CS0_DIMMB# <6>
<6,8> DDR_A_WE# WE# S0# DIMM@ DIMM@
<6,8> DDR_A_CAS# 115 116 DDR_B_ODT0 <6>
CAS# ODT0
117 118
DDR_A_MA13 VDD15 VDD16
119 120 DDR_B_ODT1 <6>
A13 ODT1
121 122
<6> DDR_CS1_DIMMB# S1# NC2
123 124
VDD17 VDD18
125 126 +VREF_CA
NCTEST VREF_CA
127 VSS27 VSS28 128
1000P_0402_50V7K
0.1U_0402_16V4Z
DDR_A_D32 129 130 DDR_A_D36 Place near JDIMM2

131 132 1 1
DQ33 DQ37
133 VSS29 VSS30 134
C665
C666
135 136 DDR_A_DM4 DIMM@ DIMM@
<6,8> DDR_A_DQS#4 DQS#4 DM4
<6,8> DDR_A_DQS4 137 DQS4 VSS31 138
B
139 140 DDR_A_D38 2 2 B
141 142
DDR_A_D35 DQ34 DQ39
143 DQ35 VSS33 144
145 146 DDR_A_D44
147 DQ40 DQ45 148
DDR_A_D41 149 150
DQ41 VSS35
151 VSS36 DQS#5 152 DDR_A_DQS#5 <6,8>
DDR_A_DM5 153 154
DM5 DQS5 DDR_A_DQS5 <6,8>
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46
159 DQ43 DQ47 160
161 162
163 DQ48 DQ52 164
DDR_A_D49 165 166 DDR_A_D53
DQ49 DQ53
167 VSS41 VSS42 168
169 170 DDR_A_DM6
<6,8> DDR_A_DQS#6 DQS#6 DM6
<6,8> DDR_A_DQS6 171 DQS6 VSS43 172
173 174 DDR_A_D54
175 DQ50 DQ55 176
DDR_A_D51 177 178
DQ51 VSS45 DDR_A_D60
179 VSS46 DQ60 180
DDR_A_D56 181 182 DDR_A_D61
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7 <6,8>
DDR_A_DM7 VSS48 DQS#7
187 188 DDR_A_DQS7 <6,8>
For DRAM strap pin reservation DM7 DQS7
189 190
20100817 DDR_A_D58 VSS49 VSS50 DDR_A_D62
191 DQ58 DQ62 192
DIMM@ DDR_A_D59 193 194 DDR_A_D63
R961 1 DQ59 DQ63
2 10K_0402_5% 195 VSS51 VSS52 196
197 198 DDR_EVENT# <6,8>
SA0 EVENT#
+3VS 199 200 FCH_SMDAT0 <8,12,29>
VDDSPD SDA
201 SA1 SCL 202 FCH_SMCLK0 <8,12,29>
A A
1 1 203 VTT1 VTT2 204 +0.75VS
C667 DIMM@
2.2U_0603_6.3V4Z 205 206
DIMM@ C668 G1 G2
2 2 LCN_DAN06-K4806-0103
2
0.1U_0402_16V4Z DIMM@
CRB only one 4.7k R962
10K_0402_5%
DDR3 SO-DIMM B
1
Reverse Type
For DRAM strap pin reservation
DDR3 SODIMM-II Socket
20100817 Size Document Number Rev
Custom 1.0
LA8681P
5 4 3 2 1
A B C D E
C146 1 U2A
C146 place close to FCH 2 150P_0402_50V8J
HUDSON-2
APU_PCIE_RST#_C AE2 AF3
PLT_RST# PCIE_RST# PCICLK0
1 R557 2 33_0402_5% A_RST# AD5 AF1
PCI CLKS
A_RST# PCICLK1/GPO36 PCI_CLK1 <14>
PCICLK2/GPO37 AF5
C147 1 2 0.1U_0402_16V7K UMI_RXP0_C AE30 AG2
<6> UMI_RX0P UMI_RXN0_C UMI_TX0P PCICLK3/GPO38 PCI_CLK3 <14>
C148 1 2 0.1U_0402_16V7K AE32 AF6
<6> UMI_RX0N UMI_RXP1_C UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 <14>
C149 1 2 0.1U_0402_16V7K AD33
<6> UMI_RX1P UMI_RXN1_C UMI_TX1P
C150 1 2 0.1U_0402_16V7K AD31 AB5
<6> UMI_RX1N UMI_RXP2_C UMI_TX1N PCIRST#
C151 1 2 0.1U_0402_16V7K AD28
<6> UMI_RX2P UMI_RXN2_C UMI_TX2P +3VALW
C152 1 2 0.1U_0402_16V7K AD29
<6> UMI_RX2N UMI_TX2N
C153 1 2 0.1U_0402_16V7K UMI_RXP3_C AC30 AJ3 C789 @
<6> UMI_RX3P UMI_RXN3_C UMI_TX3P AD0/GPIO0
C154 1 2 0.1U_0402_16V7K AC32 AL5 APU_PCIE_RST #: Reset PCIE device on APU 1 2
1 <6> UMI_RX3N UMI_TX3N AD1/GPIO1 1
AD2/GPIO2 AG4
AB33 AL6 0.1U_0402_16V4Z
<6> UMI_TX0P UMI_RX0P AD3/GPIO3
5
AB31 AH3 MC74VHC1G08DFT2G SC70 5P
<6> UMI_TX0N UMI_RX0N AD4/GPIO4
PCI EXPRESS INTERFACES

AB28 AJ5 @ R692 2
P
<6> UMI_TX1P UMI_RX1P AD5/GPIO5 B
AB29 AL1 APU_PCIE_RST#_C 1 2 4
<6> UMI_TX1N UMI_RX1N AD6/GPIO6 Y APU_PCIE_RST# <15,29>
Y33 AN5 33_0402_5% 1
<6> UMI_TX2P UMI_RX2P AD7/GPIO7 A
G
Y31 AN6 U43
2
Y28 AJ1 1
3
<6> UMI_TX3P UMI_RX3P AD9/GPIO9
Y29 AL8 @ @ @ R866
AL3 C790 R693 0_0402_5%
R94 PCIE_CALRP AD11/GPIO11 8.2K_0402_5%
1 2 590_0402_1% AF29 AM7 150P_0402_50V8J
R88 PCIE_CALRN PCIE_CALRP AD12/GPIO12 2
+VDDAN_11_PCIE 1 2 2K_0402_1% AF31 AJ6
1
PCIE_CALRN AD13/GPIO13
AK7
C718 0.1U_0402_16V7K PCIE_FTX_DRX_P0 AD14/GPIO14 @R695
@ R695
LAN <25> PCIE_FTX_C_DRX_P0
C720
1
1
2
2 0.1U_0402_16V7K PCIE_FTX_DRX_N0
V33
V31
GPP_TX0P AD15/GPIO15
AN8
AG9 1 2
PLT_RST# <25,30>
<25> PCIE_FTX_C_DRX_N0 GPP_TX0N AD16/GPIO16
C721 1 2 0.1U_0402_16V7K PCIE_FTX_DRX_P1 W30 AM11 0_0402_5%
<29> PCIE_FTX_C_DRX_P1 PCIE_FTX_DRX_N1 GPP_TX1P AD17/GPIO17
WLAN C719 1 2 0.1U_0402_16V7K W32 AJ10
<29> PCIE_FTX_C_DRX_N1 GPP_TX1N AD18/GPIO18
AB26
AL12 R692/ C790 close to FCH
AB27 AK11
GPP_TX2N AD20/GPIO20
AA24 AN12
AA23 AG12
GPP_TX3N AD22/GPIO22
AE12 PCI_AD23 <14>
AD23/GPIO23
<25> PCIE_FRX_DTX_P0 AA27 AC12 PCI_AD24 <14>
GPP_RX0P AD24/GPIO24
<25> PCIE_FRX_DTX_N0 AA26 AE13 PCI_AD25 <14>
GPP_RX0N AD25/GPIO25
<29> PCIE_FRX_DTX_P1 W27 AF13 PCI_AD26 <14>
V27 AH13
PCI INTERFACE
<29> PCIE_FRX_DTX_N1 GPP_RX1N AD27/GPIO27 PCI_AD27 <14>
V26 AH14
W26 AD15
W24 AC15
W23 AE16
AN3
CBE0#
AJ8
2 CBE1# 2
AN10
R95 CLK_CALRN CBE2#
+1.1VS_CKVDD 1 2 2K_0402_1% F27 AD12
CLK_CALRN CBE3#
AG10
FRAME#
AK9
DEVSEL#
AL10
IRDY#
G30 AF10
PCIE_RCLKP TRDY#
G28 AE10
PCIE_RCLKN PAR
AH1
STOP#
<5> APU_DISP_CLK R26
DISP_CLKP PERR#
AM9 Module design have reserve GPIO44,45 for
<5> APU_DISP_CLK# T26 AH8 VGA power enable and reset
DISP_CLKN SERR#
AG15
REQ0#
H33 AG13
DISP2_CLKP REQ1#/GPIO40
H31 AF15
DISP2_CLKN REQ2#/CLK_REQ8#/GPIO41
AM17 T14
REQ3#/CLK_REQ5#/GPIO42
<5> APU_CLK T24 AD16
APU_CLKP GNT0#
<5> APU_CLK# T23 AD13
APU_CLKN GNT1#/GPO44
AD21
R98 CLK_PCIE_VGA_R GNT2#/SD_LED/GPO45
<15> CLK_PCIE_VGA 1 2 0_0402_5% J30 AK17 T99
R99 CLK_PCIE_VGA#_R SLT_GFX_CLKP GNT3#/CLK_REQ7#/GPIO46
VGA <15> CLK_PCIE_VGA# 1 2 0_0402_5% K29 AD19
SLT_GFX_CLKN CLKRUN#
AH9
LOCK#
H27
GPP_CLK0P
H28 AF18
GPP_CLK0N INTE#/GPIO32
AE18
INTF#/GPIO33
J27 AC16
GPP_CLK1P INTG#/GPIO34
K26 AD18
GPP_CLK1N INTH#/GPIO35
R102 1 2 0_0402_5% CLK_PCIE_WLAN_R
WLAN <29> CLK_PCIE_WLAN
R103 1 2 0_0402_5% CLK_PCIE_WLAN#_R
F33
F31
GPP_CLK2P
CLOCK GENERATOR
<29> CLK_PCIE_WLAN# GPP_CLK2N
B25 R558 1 2 22_0402_5%
CLK_PCIE_LAN_R LPCCLK0 CLK_PCI_EC <14,30>
R100 1 2 0_0402_5% E33 1 @ 2
<25> CLK_PCIE_LAN CLK_PCIE_LAN#_R GPP_CLK3P CLK_PCI_DB <29>
R101 1 2 0_0402_5% R670
LAN <25> CLK_PCIE_LAN# E31
GPP_CLK3N LPCCLK1
D25
D27
LPC_CLK1 <14>
0_0402_5%
3 LAD0 LPC_AD0 <29,30> 3
M23 GPP_CLK4P LAD1 C28 LPC_AD1 <29,30>
M24 A26 LPC_AD2 <29,30>
GPP_CLK4N LAD2
LAD3 A29 LPC_AD3 <29,30>
LPC
M27 A31 LPC_FRAME# <29,30>
GPP_CLK5P LFRAME#
M26 GPP_CLK5N LDRQ0# B27
AE27
LDRQ1#/CLK_REQ6#/GPIO49
N25 GPP_CLK6P SERIRQ/GPIO48 AE19 SERIRQ <30>
N26
GPP_CLK6N
R23
GPP_CLK7P
R24 GPP_CLK7N DMA_ACTIVE# G25 ALLOW_STOP# <5>
E28 APU_PROCHOT#_R R15 1 @ 2 0_0402_5% H_PROCHOT# <5,30,37>
PROCHOT#
N27 GPP_CLK8P APU_PG E26 APU_PWRGD <5,44>
R27 G26
@ GPP_CLK8N LDT_STP#
APU
T101 APU_RST# F26 APU_RST# <5>

22_0402_5%
R559 1 2 J26 14M_25M_48M_OSC
S5_CORE_EN
H7 T100
change to 510 Ohm
RTCCLK F1 RTC_CLK <14,30>
F3 +RTCBATT
25M_X1 INTRUDER_ALERT#
C31 E6 W=20mils 1 2
25M_X1 VDDBT_RTC_G R105 510_0402_5%
1U_0402_6.3V6K
G2 32K_X1
S5 PLUS
32K_X1 1
1
25M_X2 C33 C156 CLRP1 @
25M_X2 SHORT PADS
2
32K_X2 2
32K_X2 G4
25M_X1
S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
25M_X2 1 2 C158 1 2 32K_X1
4 4
R106 1M_0402_5% for Clear CMOS
22P_0402_50V8J
1
3 OSC NC 4
2
2 1 R107 Y1
NC OSC 20M_0402_5% 32.768KHZ_12.5PF_CM31532768DZFT
Y4
2
1 25MHZ_20PF_FSX3M-25.M20FDO 1
C157 C155
C159 1 2 32K_X2 Security Classification Compal Secret Data Compal Electronics, Inc.
22P_0402_50V8J 22P_0402_50V8J 22P_0402_50V8J
2 2
FCH PCIE/CLK/PCI/LPC/RTC
Custom 0.1
LA8681P
A B C D E
A B C D E
4MB SPI ROM
& Non-share ROM. SPI_CLK_FCH
1
+3VALW
R111
33_0402_5%
@
R112 1 2 SPI_WP#_R
2
3.3K_0402_5%
U2B
R108 1 2 SPI_HOLD#
10K_0402_5% +3VALW C160
1 HUDSON-2 0.1U_0402_16V4Z 1
22P_0402_50V8J
AK19 AL14 C165 @
<28> SATA_FTX_C_DRX_P0 SATA_TX0P SD_CLK/SCLK_2/GPIO73
<28> SATA_FTX_C_DRX_N0 AM19 AN14 1 2
SATA_TX0N SD_CMD/SLOAD_2/GPIO74 R115
HDD SD_CD/GPIO75
AJ12
AL20 AH12 0_0402_5% U4
<28> SATA_FRX_C_DTX_N0 SATA_RX0N SD_WP/GPIO76
AN20 AK13 SPI_SB_CS0#_R 1 2 SPI_SB_CS0# 1 8 R110
<28> SATA_FRX_C_DTX_P0 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 CS# VCC
SD CARD
AM13 SPI_SO_R 1 2 SPI_SO_L 2 7 SPI_HOLD# 0_0402_5%
SD_DATA1/SDATO_2/GPIO78 SPI_WP#_R 3 SO/SIO1 HOLD# SPI_CLK_FCH 1 SPI_CLK_FCH_R
<28> SATA_FTX_C_DRX_P1 AN22 AH15 6 2
SATA_TX1P SD_DATA2/GPIO79 33_0402_5% WP# SCLK SPI_SI SPI_SI_R
<28> SATA_FTX_C_DRX_N1 AL22 AJ14 4 5 1 2
SATA_TX1N SD_DATA3/GPIO80 R117 GND SI/SIO0
ODD 33_0402_5%
AH20 AC4 R116 W25Q32BVSSIG SOIC 8
<28> SATA_FRX_C_DTX_N1 SATA_RX1N GBE_COL R119
AJ20 AD3 0_0402_5%
<28> SATA_FRX_C_DTX_P1 SATA_RX1P GBE_CRS SPI_WP# R110 place close to FCH
AD9 1 2
GBE_MDCK
AJ22 W10
SATA_TX2P GBE_MDIO
AH22 AB8
SATA_TX2N GBE_RXCLK +3VALW
AH7
GBE_RXD3
AM23 AF7
SATA_RX2N GBE_RXD2 GBE_PHY_INTR R121 1
AK23 AE7 2 10K_0402_5%
SATA_RX2P GBE_RXD1
AD7
GBE_RXD0
AH24 AG8
SATA_TX3P GBE_RXCTL/RXDV
AJ24 AD1
SATA_TX3N GBE_RXERR
AB7
GBE_TXCLK
FCH-M3L NC pin AN24 AF9
GBE LAN
SATA_RX3N GBE_TXD3
AL24 AG6
SATA_RX3P GBE_TXD2
AE8
GBE_TXD1
AL26 AD8
SATA_TX4P GBE_TXD0
AN26 AB9
SATA_TX4N GBE_TXCTL/TXEN
AC2
SERIAL ATA
GBE_PHY_PD
AJ26 AA7
SATA_RX4N GBE_PHY_RST# GBE_PHY_INTR
AH26 W9
SATA_RX4P GBE_PHY_INTR
AN29
2 SATA_TX5P SPI_SO_R 2
AL28 V6
SATA_TX5N SPI_DI/GPIO164 SPI_SI_R
V5
SPI_DO/GPIO163 SPI_CLK_FCH_R
AK27 V3
SATA_RX5N SPI_CLK/GPIO162
SPI ROM
AM27 T6 SPI_SB_CS0#_R
SATA_RX5P SPI_CS1#/GPIO165 SPI_WP#
V1
ROM_RST#/SPI_WP#/GPIO161
AL29
NC6
AN31
NC7
L30
VGA_RED
AL31
NC8
AL33
NC9
L32
VGA_GREEN
AH33
NC10
AH31
NC11
M29
VGA_BLUE
AJ33
NC12
AJ31
VGA DAC
NC13
VGA_HSYNC/GPO68
M28 FCH-M3L NC pin
N30
VGA_VSYNC/GPO69
M33
1K_0402_1% SATA_CALRP VGA_DDC_SDA/GPO70
2 1 R128 AF28 N32
SATA_CALRP VGA_DDC_SCL/GPO71
931_0402_1% 2 1 R130 SATA_CALRN AF27
+AVDD_SATA SATA_CALRN
K31
VGA_DAC_RSET
+3VS 10K_0402_5% 1 @ 2 R133 AD22

SATA_ACT#/GPIO67
AUX_VGA_CH_P V28
AUX_VGA_CH_N V29
AF21
VGA MAINLINK
SATA_X1
AUXCAL U28
ML_VGA_L0P T31
3 3
ML_VGA_L0N T33
AG21 T29
SATA_X2 ML_VGA_L1P
ML_VGA_L1N T28
R32
ML_VGA_L2P
ML_VGA_L2N R30
P29
ML_VGA_L3P
ML_VGA_L3N P28
C29
ML_VGA_HPD/GPIO229
T48 AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2 1 2

AM15 R137 10K_0402_5%
FANOUT1/GPIO53 HW MONITOR
<28> BT_ON# AJ16 FANOUT2/GPIO54 VIN1/GPIO176 M3 1 2
R138 10K_0402_5%
<29> BT_DISABLE# AK15 FANIN0/GPIO56 VIN2/SDATI_1/GPIO177 L2 1 2
AN16 R139 10K_0402_5%
<29> WL_OFF# FANIN1/GPIO57
AL16 FANIN2/GPIO58 VIN3/SDATO_1/GPIO178 N4
VIN4/SLOAD_1/GPIO179 P1
<28> ODD_EN K6
TEMPIN0/GPIO171
VIN5/SCLK_1/GPIO180 P3
1 2 K5
TEMPIN1/GPIO172 VIN6/GBE_STAT3/GPIO181
M1
R146 10K_0402_5%
VIN7/GBE_LED3/GPIO182 M5 1 2
1 2 K3 R148 10K_0402_5%
R149 10K_0402_5% TEMPIN2/GPIO173
AG16
NC1
1 2 M6 AH10
R151 10K_0402_5% TEMPIN3/TALERT#/GPIO174 NC2 Need to enable internal
NC3 A28
4 4
NC4 G27 pull down to leave
NC5 L4 unconnected

FCH SATA/SPI/VGA/HWM/SD
Custom 0.1
LA8681P
A B C D E
A B C D E
U2D
PCIE_RST2 : Reset PCIE device on Hudson 3
HUDSON-2
T17 AB6 G8
USB MISC
PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
<30> EC_LID_OUT# R2 RI#/GEVENT22#
W7 B9 USB_RCOMP R154 1 2 11.8K_0402_1%
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
<30> PM_SLP_S3# T3 SLP_S3#
<30> PM_SLP_S5# W2 SLP_S5# USB_FSD1P/GPIO186 H1
<30> PBTN_OUT# J4 PWR_BTN# USB_FSD1N H3
FCH_PWRGD N7
<30,44> FCH_PWRGD PWR_GOOD
H6 FCH-M3L NC pin
USB 1.1
TEST0 USB_FSD0P/GPIO185
T9 H5
ACPI / WAKE UP EVENTS

TEST1 TEST0 USB_FSD0N
T10 TEST1/TMS
1 TEST2 1
V9 TEST2 USB_HSD13P H10
G10
USB_HSD13N
<30> GATEA20 AE22
GA20IN/GEVENT0#
K10
USB_HSD12P
<30> KBRST# AG19 J12
KBRST#/GEVENT1# USB_HSD12N
<30> EC_SCI# R9
LPC_PME#/GEVENT3#
C26 G12
<30> EC_SMI#
T5
LPC_SMI#/GEVENT23#
LPC_PD#/GEVENT5#
USB_HSD11P
USB_HSD11N
F12
USB30_P11 <34>
USB30_N11 <34> LP2 Root
R155 1 @ 2 10K_0402_5% SYS_RESET# U4
+3VALW SYS_RESET#/GEVENT19#
<25,29> FCH_PCIE_WAKE# K1 K12 USB30_P10 <34>
WAKE#/GEVENT8# USB_HSD10P
V7 K13
<5> H_THERMTRIP# R10
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
USB_HSD10N USB30_N10 <34> LP1
WD_PWRGD AF19 B11
WD_PWRGD USB_HSD9P
USB_HSD9N
D11 FCH-M3L NC pin
<30> EC_RSMRST# U2
RSMRST#
E10
USB_HSD8P
AG24 F10
CLK_REQ4#/SATA_IS0#/GPIO64 USB_HSD8N
<25> LAN_CLKREQ# AE24
CLK_REQ3#/SATA_IS1#/GPIO63
AE26 C10
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD7P
AF22 A10
CLK_REQ0#/SATA_IS3#/GPIO60 USB_HSD7N Root
USB 2.0
AH17
SATA_IS4#/FANOUT3/GPIO55
AG18 H9
<27> FCH_SPKR AF24
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
USB_HSD6P
USB_HSD6N
G9
USB20_P6 <28>
USB20_N6 <28>
BT
FCH_SMCLK0
GPIO
<8,9,29> FCH_SMCLK0 AD26
+3VALW FCH_SMDAT0 SCL0/GPIO43
For FCH internal debug use AD25 A8
<8,9,29> FCH_SMDAT0 FCH_SMCLK1 T7
SDA0/GPIO47
SCL1/GPIO227
USB_HSD5P
USB_HSD5N
C8
USB20_P5 <32>
USB20_N5 <32>
CR
R179 1 @ 2 2.2K_0402_5% TEST0 FCH_SMDATA1 R7
SDA1/GPIO228
<29> WLAN_CLKREQ# AG25 F8
CLK_REQ2#/FANIN4/GPIO62 USB_HSD4P
R181 1 @ 2 2.2K_0402_5% TEST1 AG22
CLK_REQ1#/FANOUT4/GPIO61 USB_HSD4N
E8 FCH-M3L NC pin
J2
R183 1 @ TEST2 IR_LED#/LLB#/GPIO184
2 2.2K_0402_5% AG26 C6
2
<15,17,43> VGA_PWRGD
V8
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
USB_HSD3P
USB_HSD3N
A6
USB20_P3 <22>
USB20_N3 <22>
CMOS 2
W8
GBE_LED0/GPIO183
Y6 C5
V10
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
USB_HSD2P
USB_HSD2N
A5
USB20_P2 <29>
USB20_N2 <29>
WLAN Root
AA8
GBE_STAT0/GEVENT11#
R156 2 @ 1 0_0402_5% PEG_CLKREQ#_R AF25 C1
<16> PEG_CLKREQ# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD1P
USB_HSD1N
C3
USB20_P1 <32>
USB20_N1 <32>
RP2
USB_OC7# M7 E1
+3VALW <28> ODD_DA#_FCH R8
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_HSD0P
USB_HSD0N
E3
USB20_P0 <33>
USB20_N0 <33>
RP1
USB_OC5# T1
USB OC
USB_OC5#/IR_TX0/GEVENT17# USBSS_CALRP R864 1
<28> ODD_DETECT# P6 C16 2 1K_0402_1%
USB_OC3# USB_OC4#/IR_RX0/GEVENT16# USBSS_CALRP USBSS_CALRN R865 1
F5
USB_OC3#/AC_PRES/TDO/GEVENT15# USBSS_CALRN
A16 2 1K_0402_1% +FCH_VDD_11_SSUSB_S
R883 1 @ 2 10K_0402_5% USB_OC7# USB_OC2# P5
<32> USB_OC2# USB_OC2#/TCK/GEVENT14#
USB_OC1# J7 A14
USB_OC2# <33> USB_OC1# USB_OC0# USB_OC1#/TDI/GEVENT13# USB_SS_TX3P
R624 1 2 10K_0402_5% T8 C14
<34> USB_OC0# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# USB_SS_TX3N
R625 1 2 10K_0402_5% USB_OC1# C12
USB_SS_RX3P
A12
USB_SS_RX3N
R174 1 2 10K_0402_5% USB_OC0# FCH-M3L NC pin
R159 1 2 33_0402_5% HDA_BITCLK AB3 D15
ODD_DA#_FCH <27> HDA_BITCLK_AUDIO HDA_SDOUT AZ_BITCLK USB_SS_TX2P
R618 1 @ 2 10K_0402_5% R160 1 2 33_0402_5% AB1 B15
<27> HDA_SDOUT_AUDIO HDA_SDIN0 AZ_SDOUT USB_SS_TX2N
AA2
HD AUDIO
<27> HDA_SDIN0 AZ_SDIN0/GPIO167
R649 1 @ 2 10K_0402_5% ODD_DETECT# Y5 E14
AZ_SDIN1/GPIO168 USB_SS_RX2P
USB 3.0
Y3 F14
AZ_SDIN2/GPIO169 USB_SS_RX2N
Y1
R620 @ USB_OC5# HDA_SYNC AZ_SDIN3/GPIO170 USB30_FTX_DRX_P1
1 2 10K_0402_5% <27> HDA_SYNC_AUDIO
R161 1 2 33_0402_5% AD6 F15 USB30_FTX_DRX_P1 <34>
R162 1 HDA_RST# AZ_SYNC USB_SS_TX1P USB30_FTX_DRX_N1
<27> HDA_RST_AUDIO# 2 33_0402_5% AE4 AZ_RST# USB_SS_TX1N G15 USB30_FTX_DRX_N1 <34>
R163 1 @ 2 10K_0402_5% USB_OC3#
USB_SS_RX1P
H13 USB30_FRX_DTX_P1
USB30_FRX_DTX_P1 <34>
LP2
R164 1 @ 2 10K_0402_5% H_THERMTRIP# G13 USB30_FRX_DTX_N1
USB_SS_RX1N USB30_FRX_DTX_N1 <34>
R169 1 @ 2 100K_0402_5% EC_LID_OUT# T61 K19 J16 USB30_FTX_DRX_P0
3 PS2_DAT/SDA4/GPIO187 USB_SS_TX0P USB30_FTX_DRX_N0 USB30_FTX_DRX_P0 <34> 3
T19 J19 H16
PS2_CLK/CEC/SCL4/GPIO188 USB_SS_TX0N USB30_FTX_DRX_N0 <34>
R170 1 @ 2 10K_0402_5% FCH_PCIE_WAKE# J21
SPI_CS2#/GBE_STAT2/GPIO166
USB_SS_RX0P J15 USB30_FRX_DTX_P0
USB30_FRX_DTX_P0 <34>
LP1
K15 USB30_FRX_DTX_N0
USB_SS_RX0N USB30_FRX_DTX_N0 <34>
GPIO189 D21
GPIO190 PS2KB_DAT/GPIO189 R165 10K_0402_5%
C20 PS2KB_CLK/GPIO190 SCL2/GPIO193 H19 1 2
+3VS 0_0402_5% 2 PX@ 1 R96 D23 G19 R167 1 2 10K_0402_5%
<15> PXS_RST# PS2M_DAT/GPIO191 EMBEDDED CTRL SDA2/GPIO194
0_0402_5% 2 PX@ 1 R97 C22 G22 R227 1 2 10K_0402_5%
<17,43> PXS_PWREN PS2M_CLK/GPIO192 SCL3_LV/GPIO195
G21 R228 1 2 10K_0402_5%
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197 E22
R171 1 2 2.2K_0402_5% FCH_SMCLK0 H22
EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2
F21 KSO_0/GPIO209 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 J22 EC_PWM2 <14> strap pin
1
R172 FCH_SMDAT0 D
1 2 2.2K_0402_5% PX@ E20 H21
KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200
<30> VGA_GATE# 2 F20 KSO_2/GPIO211
R175 1 2 10K_0402_5% WD_PWRGD G Q112 A22 K21
KSO_3/GPIO212 KSI_0/GPIO201
S 2N7002K_SOT23-3 E18 K22
3
R173 1 2 8.2K_0402_5% WLAN_CLKREQ# A20 F22
J18 KSO_6/GPIO215 KSI_3/GPIO204 F24
R176 1 2 8.2K_0402_5% LAN_CLKREQ# H18 E24
G18 KSO_8/GPIO217 KSI_5/GPIO206 B23
B21 C24
K18 KSO_10/GPIO219 KSI_7/GPIO208 F18
+3VALW +3VALW D19
KSO_11/GPIO220
A18
KSO_12/GPIO221
C18
KSO_13/GPIO222
B19 KSO_14/GPIO223
2 UMA@ 1
2 UMA@ 1
10K_0402_5%
10K_0402_5%
B17
KSO_15/GPIO224
A24 KSO_16/GPIO225
R685
R684
D17
KSO_17/GPIO226
4 4
R166 1 2 10K_0402_5% FCH_SMCLK1 GPIO189
GPIO190
R168 1 2 10K_0402_5% FCH_SMDATA1 BOARD
Config. GPIO189 GPIO190 Function
R177 1 2 2.2K_0402_5% EC_RSMRST#
PX@ 1
PX@ 1
10K_0402_5%
10K_0402_5%
0 0 PX4 Full Security Classification Compal Secret Data Compal Electronics, Inc.
R178 1 @ 2 10K_0402_5% HDA_BITCLK
R682
R683
0 1 PX4 low Issued Date 2011/10/12 Deciphered Date 2013/10/12 Title

R180 1 @ 2 10K_0402_5% HDA_SDIN0
1 0 UMA Low FCH-ACPI/USB/HDA/GPIO
2
R182 1 PX@ 2 10K_0402_5% PEG_CLKREQ#_R AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1 1 UMA Full Custom 0.1
LA8681P
A B C D E
A B C D E
+3VS +1.1VS
L4 U2C
1007mA
1 2 +VDDPL_33_SYS +VCC_VDDCR_11 1 2
MBK1608221YZF_2P 102mA HUDSON-2 R184 0_0805_5%
C181
2.2U_0402_6.3V6M
C182
0.1U_0402_16V7K
C183
0.1U_0402_16V7K
C184
0.1U_0402_16V7K
C185
1U_0402_6.3V6K
C186
1U_0402_6.3V6K
C177
10U_0603_6.3V6M
220 ohm 1 2 +VDDIO_33_PCIGP AB17 T14
+3VS VDDIO_33_PCIGP_1 VDDCR_11_1
22U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 R185 0_0603_5% AB18 T17 1 1 1 1 1
VDDIO_33_PCIGP_2 VDDCR_11_2
C176
C178
C187
C179
AE9 T20
PCI/GPIO I/O
1 1 1 1 AD10 VDDIO_33_PCIGP_4 VDDCR_11_4 U16
AG7 VDDIO_33_PCIGP_5 VDDCR_11_5 U18
2 2 AC13 V14 2 2 2 2 2
CORE S0
AB12 VDDIO_33_PCIGP_7 VDDCR_11_7 V17
2 2 2 2 AB13 V20
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9 Y17
1
AB16 +1.1VS_CKVDD +1.1VS 1
VDDIO_33_PCIGP_10 42ohm @ 100MHz
47mA 340mA
del +VDDPL_33_MLDAC power plane H24 H26 +1.1VS_CKVDD 1 2
+VDDPL_33_SYS VDDPL_33_SYS VDDAN_11_CLK_1
20mA J25 R187 0_0603_5%
VDDAN_11_CLK_2
demo board connect to GND
C189
0.1U_0402_16V7K
C190
0.1U_0402_16V7K
C191
1U_0402_6.3V6K
C192
1U_0402_6.3V6K
C193
22U_0603_6.3V6M
V22 K24
CLKGEN I/O
VDDPL_33_DAC VDDAN_11_CLK_3
12mA VDDAN_11_CLK_4
L22 1 1 1 1 1
U22 M22
VDDPL_33_ML VDDAN_11_CLK_5
30mA VDDAN_11_CLK_6
N21
T22 N22
VDDAN_33_DAC VDDAN_11_CLK_7 2 2 2 2 2
VDDPL_33_SSUSB_S 11mA VDDAN_11_CLK_8
P22
+VDDPL_33_SSUSB_S L18
For Hudson3 USB3.0 only VDDPL_33_SSUSB_S
For Hudson2, connect to GND 14mA
+VDDPL_33_USB_S D7 1088mA +1.1VS
VDDPL_33_USB_S +VDDAN_11_PCIE 42ohm @ 100MHz
11mA VDDAN_11_PCIE_1
AB24
+VDDPL_33_PCIE AH29 Y21 +VDDAN_11_PCIE 1 2
VDDPL_33_PCIE VDDAN_11_PCIE_2 R191 0_0805_5%
12mA AE25
PCI EXPRESS
VDDAN_11_PCIE_3
C195
0.1U_0402_16V7K
C196
1U_0402_6.3V6K
C197
22U_0603_6.3V6M
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA AG28 AD24
VDDPL_33_SATA VDDAN_11_PCIE_4
supply for the RGB outputs AB23 1 1 1
@ VDDAN_11_PCIE_5
AA22
VDDAN_11_PCIE_6
1 2 M31 AF26
C194 2.2U_0603_6.3V4Z LDO_CAP VDDAN_11_PCIE_7
AG27
VDDAN_11_PCIE_8 2 2 2
7mA
V21
VDDPL_11_DAC
demo board connect to GND

1337mA +1.1VS
AA21 +AVDD_SATA 42ohm @ 100MHz
VDDAN_11_SATA_1
del +FCH_VDDAN_33_DAC power plane 226mA VDDAN_11_SATA_4
Y20 1 2
Y22 AB21 R194 0_0805_5%
VDDAN_11_ML_1 VDDAN_11_SATA_2
C203
0.1U_0402_16V7K
C204
1U_0402_6.3V6K
C205
1U_0402_6.3V6K
C206
22U_0603_6.3V6M
V23 AB22
SERIAL ATA
MAIN LINK
V24 AC22 1 1 1 1
V25 AC21
AA20
VDDAN_11_SATA_7
AA18
2 VDDAN_11_SATA_8 2 2 2 2 2
AB20
VDDAN_11_SATA_9
AC19
VDDAN_11_SATA_10 +3VALW
AB10
VDDIO_33_GBE_S
59mA
AB11 N18 +VDDIO_33_S 1 2
VDDCR_11_GBE_S_1 VDDIO_33_S_1 R195 0_0402_5%
AA11 L19
GBE LAN
VDDCR_11_GBE_S_2 VDDIO_33_S_2
C207
1U_0402_6.3V6K
C208
1U_0402_6.3V6K
C209
2.2U_0402_6.3V6M
M18
VDDIO_33_S_3
1 2 AA9 V12 1 1 1
3.3V_S5 I/O
R196 0_0402_5% VDDIO_GBE_S_1 VDDIO_33_S_4
AA10 V13
+3VALW VDDIO_GBE_S_2 VDDIO_33_S_5
Y12
L8 VDDIO_33_S_6
470mA VDDIO_33_S_7
Y13
2 2 2
1 2 +VDDAN_33_USB G7 W11
VDDAN_33_USB_S_1 VDDIO_33_S_8
10U_0603_6.3V6M
10U_0603_6.3V6M
FBMA-L11-201209-221LMA30T_0805 H8
+3VALW VDDAN_33_USB_S_2 +3VALW
C212
C213
C214
1U_0402_6.3V6K
C215
1U_0402_6.3V6K
C216
0.1U_0402_16V7K
220 ohm/2A J8 +VDDXL_3.3V
L6 VDDAN_33_USB_S_3 L9
1 1 1 1 1 K8
VDDAN_33_USB_S_4 5mA Tie to +3.3V_S5 rail if USB3 Wake
1 2 +VDDPL_33_SSUSB_S K9
VDDAN_33_USB_S_5 VDDXL_33_S
G24 +VDDXL_3.3V 1 2 is supported; otherwise, tie to
MBK1608221YZF_2P M9 MBK1608221YZF_2P
VDDAN_33_USB_S_6 +3.3V_S0 rail.
C198
2.2U_0402_6.3V6M
C200
0.1U_0402_16V7K
C217
2.2U_0402_6.3V6M
2 2 2 2 2
M10
VDDAN_33_USB_S_7 220 ohm Hudson-2 designs: Tie to +3.3V_S0
220 ohm 1 1 N9
VDDAN_33_USB_S_8 1
N10 rail.
VDDAN_33_USB_S_9
M12
VDDAN_33_USB_S_10
N12
2 2 VDDAN_33_USB_S_11 2
M11
+1.1VALW VDDAN_33_USB_S_12
L11 140mA +1.1VALW
1 2 +VDDAN_11_USB_S U12 187mA
USB
MBK1608221YZF_2P VDDAN_11_USB_S_1 +VDDCR_1.1V
U13 VDDAN_11_USB_S_2 VDDCR_11_S_1 N20 1 2
C219
2.2U_0402_6.3V6M
C220
0.1U_0402_16V7K
C234
0.1U_0402_16V7K
220 ohm M20 R197 0_0603_5%

+VDDAN_33_USB VDDCR_11_S_2
C221
1U_0402_6.3V6K
C222
1U_0402_6.3V6K
1 1 1
L7 1 1
1 2 +VDDPL_33_USB_S @
MBK1608221YZF_2P
2 2 2
C210
2.2U_0402_6.3V6M
C211
0.1U_0402_16V7K
3 3
220 ohm 2 2
1 1
Add C234 follow AMD
+1.1VALW
reccommandation 10/28 +1.1VALW
L13 42mA
2 2 +VDDCR_11V_USB L14
1 2 T12
VDDCR_11_USB_S_1 70mA
MBK1608221YZF_2P T13 J24 +VDDPL_11_SYS_S 1 2
VDDCR_11_USB_S_2 VDDPL_11_SYS_S
C223
10U_0603_6.3V6M
C224
0.1U_0402_16V7K
C225
0.1U_0402_16V7K
220 ohm MBK1608221YZF_2P
0.1U_0402_16V7K
C226
2.2U_0402_6.3V6M
C228
1 1 1 220 ohm
1 1
+3VS
L10 2 2 2
1 2 +VDDPL_33_PCIE 2 2
MBK1608221YZF_2P
220 ohm +3VALW
+FCH_VDD_11_SSUSB_S
C218
2.2U_0402_6.3V6M
282mA 12mA
1 P16 M8 +VDDAN_33_HWM 1 2
+VDDAN_11_SSUSB VDDAN_11_SSUSB_S_1 VDDAN_33_HWM_S AMD reply:
40mils 1 R199 2 M14 VDDAN_11_SSUSB_S_2
R198 0_0402_5%
C232
2.2U_0402_6.3V6M
C233
0.1U_0402_16V7K
0_0603_5% N14 VDDAN_33_HWM_S: Please connect
VDDAN_11_SSUSB_S_3
C229
1U_0402_6.3V6K
C230
0.1U_0402_16V7K
C231
0.1U_0402_16V7K
P13 1 1 it to +3.3V_S5 directly if HWM is not used.

2 VDDAN_11_SSUSB_S_4
1 1 1 P14
VDDAN_11_SSUSB_S_5
USB SS
@ @
2 2
2 2 2
424mA
N16
+3VS VDDCR_11_SSUSB_S_1 +3VS
N17 VDDCR_11_SSUSB_S_2
L12 P17 26mA
+VDDPL_33_SATA VDDCR_11_SSUSB_S_3 +VDDIO_AZ VDDIO_AZ_S should be tied to
1 2 M17 VDDCR_11_SSUSB_S_4 VDDIO_AZ_S AA4 1 2
MBK1608221YZF_2P R200 0_0402_5% +3.3/1.5V_S5 rail if Wake on Ring
C227
2.2U_0402_6.3V6M
220 ohm POWER C236 1 2 2.2U_0402_6.3V6M is supported

4
1 4
2 L15 1 1 R201 2 +VDDCR_11_SSUSB
+1.1VALW S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38
0_0603_5%
C237
10U_0603_6.3V6M
C238
1U_0402_6.3V6K
C239
0.1U_0402_16V7K
C240
0.1U_0402_16V7K
FBMA-L11-201209-221LMA30T_0805
2
42 ohm/4A 1 1 1 1
2 2 2 2
FCH PWR
Custom 0.1
LA8681P
A B C D E
5 4 3 2 1
DEBUG STRAPS
U2E
HUDSON-2
STRAP PINS FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
A3 VSS VSS T25
A33 VSS VSS T27
B7 VSS VSS U6 PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0_EC LPC_CLK1 EC_PWM2 RTC_CLK PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
B13 VSS VSS U14
D9 VSS VSS U17
D D
D13 VSS VSS U20 PULL ALLOW USE NON_FUSION EC CLKGEN LPC ROM S5 PLUS USE PCI DISABLE USE FC USE DEFAULT DISABLE PCI
E5 VSS VSS U21
HIGH PCIE GEN2 DEBUG CLOCK MODE ENABLED ENABLED MODE PULL PLL ILA PLL PCIE STRAPS MEM BOOT
E12 U30
E16
VSS VSS
U32 STRAPS DISABLED HIGH AUTORUN
VSS VSS DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
E29 VSS VSS V11
F7 VSS VSS V16
F9 VSS VSS V18
F11 VSS VSS W4 PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS PULL BYPASS ENABLE BYPASS USE EEPROM ENABLE PCI
F13 W6 PCIE GEN1 DEBUG CLOCK DISABLED DISABLE MODE PCI PLL ILA FC PLL PCIE STRAPS MEM BOOT
F16
VSS VSS
W25
LOW LOW
VSS VSS STRAP MODE ENABLED AUTORUN
F17 VSS VSS W28
F19 Y14 DEFAULT DEFAULT DEFAULT DEFAULT
VSS VSS
F23 VSS VSS Y16
F25 VSS VSS Y18
F29 VSS VSS AA6
G6 VSS VSS AA12
G16 AA13 +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
VSS VSS
G32 VSS VSS AA14
R202 10K_0402_5%
R203 10K_0402_5%
R204 10K_0402_5%
R205 10K_0402_5%
R206 10K_0402_5%
R207 10K_0402_5%
R208 10K_0402_5%
H12 VSS VSS AA16
H15 VSS VSS AA17
1
GROUND
H29 VSS VSS AA25

J6 VSS VSS AA28
J9 AA30 @ @ @ @
VSS VSS <10> PCI_AD27
C J10 VSS VSS AA32 C
J13 AB25 <10> PCI_AD26
2
VSS VSS
J28 VSS VSS AC6
J32 VSS VSS AC18 <10> PCI_AD25
K7 VSS VSS AC28 <10> PCI_CLK1
K16 VSS VSS AD27 <10> PCI_AD24
K27 VSS VSS AE6 <10> PCI_CLK3
K28 VSS VSS AE15 <10> PCI_AD23
L6 VSS VSS AE21 <10> PCI_CLK4
L12 VSS VSS AE28
L13 VSS VSS AF8 <10,30> CLK_PCI_EC
R209 2.2K_0402_5%
R210 2.2K_0402_5%
R211 2.2K_0402_5%
R212 2.2K_0402_5%
R213 2.2K_0402_5%
L15 VSS VSS AF12
1
L16 VSS VSS AF16 <10> LPC_CLK1
L21 VSS VSS AF33
M13 AG30 @ @ @ @ @
VSS VSS <12> EC_PWM2
M16 VSS VSS AG32
M21 AH5 <10,30> RTC_CLK
2
VSS VSS
M25 VSS VSS AH11 R214 10K_0402_5%
R215 10K_0402_5%
R216 10K_0402_5%
R217 10K_0402_5%
R218 10K_0402_5%
R219 2.2K_0402_5%
R220 2.2K_0402_5%
N6 VSS VSS AH18
N11 VSS VSS AH19
1
1
N13 VSS VSS AH21
N23 VSS VSS AH23
N24 AH25 @ @ @
VSS VSS
P12 VSS VSS AH27
B P18 AJ18 B
2
2
VSS VSS
P20 VSS VSS AJ28
P21 VSS VSS AJ29
P31 VSS VSS AK21
P33 VSS VSS AK25
R4 VSS VSS AL18
R11 VSS VSS AM21
R25 VSS VSS AM25
R28 VSS VSS AN1
T11 VSS VSS AN18
T16 VSS VSS AN28
T18 VSS VSS AN33
N8 VSSAN_HWM VSSPL_DAC T21

VSSAN_DAC L28
K25 VSSXL VSSANQ_DAC K33
VSSIO_DAC N28
H25 VSSPL_SYS
EFUSE R6

A A

FCH-VSS/Strap
B 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
PCIE_CTX_GRX_P[3..0] U6A PX@ PCIE_CRX_GTX_P[3..0]

<6> PCIE_CTX_GRX_P[3..0] PCIE_CRX_GTX_P[3..0] <6>
PCIE_CTX_GRX_N[3..0] PCIE_CRX_GTX_N[3..0]
<6> PCIE_CTX_GRX_N[3..0] PCIE_CRX_GTX_N[3..0] <6>
LVDS Interface
PCIE_CTX_GRX_P0 AA38 Y33 PCIE_CRX_C_GTX_P0 0.1U_0402_16V7K 2 1 C241 PX@ PCIE_CRX_GTX_P0
PCIE_CTX_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_CRX_C_GTX_N0 0.1U_0402_16V7K PCIE_CRX_GTX_N0
Y37 PCIE_RX0N PCIE_TX0N Y32 2 1 C242 PX@ U6G PX@
D D
PCIE_CTX_GRX_P1 Y35 PCIE_RX1P PCIE_TX1P W33 PCIE_CRX_C_GTX_P1 0.1U_0402_16V7K 2 1 C243 PX@ PCIE_CRX_GTX_P1
PCIE_CTX_GRX_N1 W36 W32 PCIE_CRX_C_GTX_N1 0.1U_0402_16V7K 2 1 C244 PX@ PCIE_CRX_GTX_N1 LVDS CONTROL AK27
PCIE_RX1N PCIE_TX1N VARY_BL
DIGON AJ27
PCIE_CTX_GRX_P2 W38 PCIE_RX2P PCIE_TX2P U33 PCIE_CRX_C_GTX_P2 0.1U_0402_16V7K 2 1 C245 PX@ PCIE_CRX_GTX_P2
PCIE_CTX_GRX_N2 V37 U32 PCIE_CRX_C_GTX_N2 0.1U_0402_16V7K 2 1 C246 PX@ PCIE_CRX_GTX_N2
PCIE_RX2N PCIE_TX2N
TXCLK_UP_DPF3P AK35
PCIE_CTX_GRX_P3 V35 PCIE_RX3P PCIE_TX3P U30 PCIE_CRX_C_GTX_P3 0.1U_0402_16V7K 2 1 C247 PX@ PCIE_CRX_GTX_P3
TXCLK_UN_DPF3N AL36
PCIE_CTX_GRX_N3 U36 U29 PCIE_CRX_C_GTX_N3 0.1U_0402_16V7K 2 1 C248 PX@ PCIE_CRX_GTX_N3
PCIE_RX3N PCIE_TX3N
TXOUT_U0P_DPF2P AJ38
TXOUT_U0N_DPF2N AK37
U38 PCIE_RX4P PCIE_TX4P T33
T37 PCIE_RX4N PCIE_TX4N T32 TXOUT_U1P_DPF1P AH35
PCI EXPRESS INTERFACE

TXOUT_U1N_DPF1N AJ36
T35 PCIE_RX5P PCIE_TX5P T30 TXOUT_U2P_DPF0P AG38

R36 PCIE_RX5N PCIE_TX5N T29 TXOUT_U2N_DPF0N AH37
TXOUT_U3P AF35
R38 PCIE_RX6P PCIE_TX6P P33 TXOUT_U3N AG36
P37 PCIE_RX6N PCIE_TX6N P32
C C
LVTMDP
P35 PCIE_RX7P PCIE_TX7P P30
N36 PCIE_RX7N PCIE_TX7N P29 TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
N38 PCIE_RX8P PCIE_TX8P N33 TXOUT_L0P_DPE2P AW37

M37 PCIE_RX8N PCIE_TX8N N32 TXOUT_L0N_DPE2N AU35
TXOUT_L1P_DPE1P AR37
M35 PCIE_RX9P PCIE_TX9P N30 TXOUT_L1N_DPE1N AU39
L36 PCIE_RX9N PCIE_TX9N N29
TXOUT_L2P_DPE0P AP35
TXOUT_L2N_DPE0N AR35
L38 PCIE_RX10P PCIE_TX10P L33
K37 PCIE_RX10N PCIE_TX10N L32 TXOUT_L3P AN36
TXOUT_L3N AP37
K35 PCIE_RX11P PCIE_TX11P L30

J36 PCIE_RX11N PCIE_TX11N L29
J38 K33 ROBSON XT M2

PCIE_RX12P PCIE_TX12P
H37 PCIE_RX12N PCIE_TX12N K32
B B
H35 PCIE_RX13P PCIE_TX13P J33

G36 PCIE_RX13N PCIE_TX13N J32
G38 PCIE_RX14P PCIE_TX14P K30

F37 PCIE_RX14N PCIE_TX14N K29
R221 2 @ 1 0_0402_5%
F35 PCIE_RX15P PCIE_TX15P H33

E37 H32 +3VGS
PCIE_RX15N PCIE_TX15N
5
CLOCK U7
CLK_PCIE_VGA AB35 2
P
<10> CLK_PCIE_VGA PCIE_REFCLKP <12> PXS_RST# B
CLK_PCIE_VGA# AA36 4 GPU_RST#
<10> CLK_PCIE_VGA# PCIE_REFCLKN Y
<10,29> APU_PCIE_RST# 1 A
G
R222 0_0402_5%
2 @ 1 CALIBRATION PX@
3
Y30 1.27K_0402_1% 1 PX@ 2 R223 MC74VHC1G08DFT2G SC70 5P
PCIE_CALRP
R224 2 PX@ 1 AH16 Y29 2K_0402_1% 1 PX@ 2 R225 +1.0VGS
A 10K_0402_5% PWRGOOD PCIE_CALRN A
GPU_RST# AA30 PERSTB

1
PX@ Issued Date 2011/10/12 2013/10/12 Title

R226 ROBSON XT M2 Deciphered Date
100K_0402_5%
ATI_RobsonXT_M2_PCIE/LVDS
2
B 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
U6B CONFIGURATION STRAPS RECOMMENDED SETTINGS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE 0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET X = DESIGN DEPENDANT
AU24 NA = NOT APPLICABLE
TXCAP_DPA3P
AV23
TXCAM_DPA3N
AT25 RECOMMENDED
MUTI GFX TX0P_DPA2P STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
AR24 SETTINGS
DPA TX0M_DPA2N
AU26 0: 50% swing
TX1P_DPA1P TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING 1: Full swing X
AV25
TX1M_DPA1N
AR8 AT27 0: disable
DVPCNTL_MVP_0 TX2P_DPA0P TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS 1: enable X
AU8 AR26
DVPCNTL_MVP_1 TX2M_DPA0N
AP8
DVPCNTL_0 Advertises PCIE speed 0: 2.5GT/s
AW8 AR30
D DVPCNTL_1 TXCBP_DPB3P RSVD GPIO2 when compliance test 1: 5GT/s 0
D
AR3 AT29
DVPCNTL_2 TXCBM_DPB3N
AR1
DVPCLK
<20> VRAM_ID0 AU1 AV31
DVPDATA_0 TX3P_DPB2P RSVD GPIO8 RESERVED 0
<20> VRAM_ID1 AU3 AU30
DVPDATA_1 DPB TX3M_DPB2N
<20> VRAM_ID2 AW3
DVPDATA_2
AP6 AR32
DVPDATA_3 TX4P_DPB1P BIF_VGA DIS GPIO9 VGA ENABLED 0
AW5 AT31
DVPDATA_4 TX4M_DPB1N
AU5
DVPDATA_5
AR6 AT33
DVPDATA_6 TX5P_DPB0P RSVD GPIO21 RESERVED 0
AW6 AU32
DVPDATA_7 TX5M_DPB0N
AU6
DVPDATA_8 0: disable
AT7 AU14
DVPDATA_9 TXCCP_DPC3P BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 1: enable X
AV7 AV13
DVPDATA_10 TXCCM_DPC3N
AN7
DVPDATA_11
AV9 AT15
DVPDATA_12 TX0P_DPC2P ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT XXX
AT9 AR14
DVPDATA_13 TX0M_DPC2N
AR10
DVPDATA_14 DPC
AW10 AU16
DVPDATA_15 TX1P_DPC1P VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
AU10 AV15
AP10
DVPDATA_17
AV11 AT17
DVPDATA_18 TX2P_DPC0P RSVD H2SYNC 0
AT11 AR16
AR12
DVPDATA_20
AW12 AU20
DVPDATA_21 TXCDP_DPD3P RSVD GENERICC 0
AU12 AT19
DVPDATA_22 TXCDM_DPD3N
AP12
DVPDATA_23 AUD[1] AUD[0]
AT21
TX3P_DPD2P AUD[1] HSYNC 11
AJ21 AR20 0 0 No audio function
SWAPLOCKA TX3M_DPD2N
AK21 0 1 Audio for DisplayPort and HDMI if dongle is detected
SWAPLOCKB DPD AUD[0] VSYNC
AU22 1 0 Audio for DisplayPort only
TX4P_DPD1P
AV21 1 1 Audio for both DisplayPort and HDMI
TX4M_DPD1N +3VGS +3VGS
I2C AT23
TX5P_DPD0P
TX5M_DPD0N
AR22 AMD RESERVED CONFIGURATION STRAPS
STRAPS AK26 ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
1
SCL @ @ +1.8VGS
AJ26
+3VGS SDA R250 R265 RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
AD39 10K_0402_5% 10K_0402_5%
C
GENERAL PURPOSE I/O R NOT CONFLICT DURING RESET C
AD37 1 2
10K_0402_5% @ R229 GPU_GPIO0 GPU_GPIO0 RB L16 PX@
1 2 AH20
2
R230 GPU_GPIO1 GPU_GPIO1 GPIO_0
C274
C273
10K_0402_5% 1 PX@ BLM15BD121SN1D_0402 GPIO21 H2SYNC GENERICC GPIO2 GPIO8
C1033
2 AH18 AE36
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
10K_0402_5% R231 GPU_GPIO2 GPU_GPIO2 GPIO_1 G
1 PX@ 2 AN16 AD35 1 1 1
R1.0 VGA_SMB_DA2 GPIO_2 GB
AH23
RB751V_SOD323 VGA_SMB_CK2 GPIO_3_SMBDATA
AJ23 AF37
10K_0402_5% @ R232 GPU_GPIO5 D2 @ 1 GPU_GPIO5 GPIO_4_SMBCLK B
1 2 <30,38> ACIN 2 AH17
GPIO_5_AC_BATT BB
AE38 Transmitter Power Saving Enable
2 2 2
PX@
PX@
PX@
GPU_GPIO_6 AJ17 DAC1 TX_PWRS_ENB GPIO0 0: 50% Tx output swing for mobile mode
T49 R02 GPIO_6
AK17
GPIO_7_BLON HSYNC
AC36 1: full Tx output swing (Default setting for Desktop)
10K_0402_5% 1 @ 2 R234 GPU_GPIO8 GPU_GPIO8 AJ13 AC38
10K_0402_5% @ R236 GPU_GPIO9 GPU_GPIO9 GPIO_8_ROMSO VSYNC
1 2 AH15
GPIO_9_ROMSI PCI Express Transmitter De-emphasis Enable
AJ16
GPIO_10_ROMSCK
TX_DEEMPH_EN GPIO1 0: Tx de-emphasis diabled for mobile mode
10K_0402_5% 1 PX@ 2 R237 GPU_GPIO11 GPU_GPIO11 AK16 AB34 R238 1 PX@ 2 499_0402_1% 1: Tx de-emphasis enabled (Defailt setting for desktop)
10K_0402_5% @ R239 GPU_GPIO12 GPU_GPIO12 GPIO_11 RSET
1 2 AL16
10K_0402_5% @ R240 GPU_GPIO13 GPU_GPIO13 GPIO_12 +AVDD
1 2 AM16
GPIO_13 AVDD
AD34 (1.8V@65mA AVDD)
AM14 AE34
GPU_VID0 GPIO_14_HPD2 AVSSQ
<43> GPU_VID0 AM13
GPIO_16 GPIO_15_PWRCNTL_0 +VDD1DI
AK14
GPIO_16 VDD1DI
AC33 (1.8V@100mA VDD1DI) 1 2 +1.8VGS
T50 AG30 AC34 L17 PX@
GPIO_17_THERMAL_INT VSS1DI BLM15BD121SN1D_0402
C276
C277
C278
AN14
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
R241 1 @ GPIO_18_HPD3
2 10K_0402_5% AM17 1 1 1
GPU_VID1 GPIO_19_CTF
<43> GPU_VID1 AL13 AC30
GPIO21_BBEN GPIO_20_PWRCNTL_1 R2/NC
AJ14 AC31
+3VGS T51 AK13
GPIO_21_BB_EN
GPIO_22_ROMCSB
R2B/NC
2 2 2
+3VGS
Internal VGA Thermal Sensor
PX@
PX@
PX@
PEG_CLKREQ# AN13 AD30
<12> PEG_CLKREQ# GPIO_23_CLKREQB G2/NC
10K_0402_5% 1 @ 2 R242 GPIO24_TRSTB GPIO24_TRSTB AM23 AD31
10K_0402_5% @ JTAG_TRSTB G2B/NC
1 2 R243 GPIO25_TDI GPIO25_TDI AN23
10K_0402_5% @ GPIO27_TMS GPIO26_TCK JTAG_TDI +3VGS
1 2 R244 AK23 AF30
1
GPIO27_TMS JTAG_TCK B2/NC
AL24 AF31
10K_0402_5% @ JTAG_TMS B2B/NC
1 2 R245 GPIO26_TCK T52 GPIO28_TDO AM24 R246 R247
JTAG_TDO 10K_0402_5% 10K_0402_5%
AJ19
GENERICA
AK19 AC32
2
GENERICB C/NC
AJ20 AD32
2
GENERICC Y/NC
AK20 AF32
GENERICD COMP/NC +VDD2DI +1.8VGS VGA_SMB_CK2
AJ24 1 6 EC_SMB_CK2 <5,29,30>
GENERICE_HPD4 DAC2 Robson@L28 PX@
AH26
GENERICF_HPD5 2mA
5
AH24 AD29 GENLK_CLK T53 1 2 Q17A
B GENERICG_HPD6 H2SYNC/GENLK_CLK GENLK_VSYNC T54 BLM15BD121SN1D_0402 DMN66D0LDW-7_SOT363-6
B
AC29
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
V2SYNC/GENLK_VSYNC VGA_SMB_DA2
1 1 1 4 3 EC_SMB_DA2 <5,29,30>
C434
C435
C429
AK24
HPD1 PX@ Q17B
AG31 +VDD2DI
VDD2DI/NC Robson@ Robson@ Robson@ DMN66D0LDW-7_SOT363-6
AG32
VSS2DI/NC 2 2 2
0.60 V level, Please
VREFG Divider ans AG33 +A2VDD
+1.8VGS A2VDD/NC
PX@ cap close to ASIC AD33
+1.8VGS A2VDDQ/NC +A2VDDQ
2 R248 1 499_0402_1% +VREFG_GPU AH13
PX@ VREFG +A2VDD +3VGS
AF33
L18 PX@ A2VSSQ/TSVSSQ
75mA 2 R249 1 249_0402_1% 100mA Robson@L41
2 1 +DPLL_PVDD 1 2
BLM15BD121SN1D_0402 2 1 AA29 R330 1 Robson@2 BLM15BD121SN1D_0402
10U_0603_6.3V6M
1U_0402_6.3V4Z
0.1U_0402_10V6K
+DPLL_PVDD AM32 R2SET/NC
C280
C281
C282
C279 0.1U_0402_16V7K 715_0402_1% 1 1 1

10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
DPLL_PVDD
C437
C395
C380
1 1 1 PX@ AN32
DPLL_PVSS
DDC/AUX AM26 Robson@ Robson@ Robson@
+DPLL_VDDC AN31 PLL/CLOCK DDC1CLK 2 2 2
AN26
2 2 2 DPLL_VDDC DDC1DATA
PX@
PX@
PX@
AM27
XTALIN AUX1P
AV33 AL27
XTALOUT XTALIN AUX1N
AU34
XTALOUT
AM19
+1.0VGS DDC2CLK +A2VDDQ +1.8VGS
AL19
L19 PX@ DDC2DATA Robson@L27
125mA +DPLL_VDDC
AW34
XO_IN 130mA
2 1 XTALIN AUX2P
AN20 1 2
BLM15BD121SN1D_0402 Voltage Swing: 1.8 V AW35 AM20 BLM15BD121SN1D_0402
10U_0603_6.3V6M
0.1U_0402_10V6K
1U_0402_6.3V4Z
XO_IN2 AUX2N
C284
C285
C287
1 1 1
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
C430
C438
C436
1 1 1 AL30
DDCCLK_AUX3P
AM30
DDCDATA_AUX3N Robson@ Robson@ Robson@
AL29 2 2 2
2 2 2 DDCCLK_AUX4P
PX@
PX@
PX@
AF29 AM29
DPLUS THERMAL DDCDATA_AUX4N
AG29
DMINUS
AN21
DDCCLK_AUX5P
A AM21 A
T58 TS_FDO DDCDATA_AUX5N
AK32
TS_FDO
R254 AJ30
DDC6CLK
AL31 AJ31
XTALOUT PX@ XTALIN PX@ TS_A/NC DDC6DATA
(1.8V@20mA TSVDD)
L20 AK30
1M_0402_5% +TSVDD DDCCLK_AUX7P
+1.8VGS 1 2 AJ32 AK29
Y2 PX@ BLM15BD121SN1D_0402 TSVDD DDCDATA_AUX7N
AJ33
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V4Z
TSVSS
C288
C289
C290
2 1 1 1 1
27MHZ_16PF_X5H027000FG1H
ROBSON XT M2 PX@
PX@ C291 C292 PX@ 2 2 2 2011/10/12 2013/10/12 Title
Issued Date Deciphered Date
PX@
PX@
PX@
18P_0402_50V8J 18P_0402_50V8J
ATI_RobsonXT_M2_Main_MSIC
C 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
+3VGS +5VS +5VS
1
R256
0.1U_0402_16V7K
1
@ C293
1 10K_0402_5%
R257 PX@
10K_0402_5%
2
PX@ VDDC_ON#
2
2
1.0V_ON#
PX@
5
+3VGS 1 R259 2 U9
6
10K_0402_5% 2 PX@
P
B PX@ PX@
4
Y
1
G
D A Q68B Q68A
D
5 2
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
3
MC74VHC1G08DFT2G SC70 5P
1
1
D
2 Q24 C296 @
<18> PX_EN
G 2N7002K_SOT23-3 0.1U_0402_16V7K
S PX@ +3VGS 1 2 Q18 Q19 55mA@1.0V, in BACO mode
3
PX@ PX@
U10 +1.0VGS AO3414_SOT23-3 AO3414_SOT23-3
5
+BIF_VDDC
S
2 3 1 1 3
P
B PX_MODE
4 PX_MODE <43>
+3VGS Y
1
G
A
G
2
2
PX@ 1.0V_ON#
3
MC74VHC1G08DFT2G SC70 5P
1
@ Q22 Q23 1
R261 PX@ PX@ C294
20K_0402_5% +VGA_CORE AO3414_SOT23-3 AO3414_SOT23-3
PX@ 22U_0805_6.3V6M
2
S
3 1 1 3
2
PXS_PWREN 1 PX@ 2 RUNPWROK

R880
G
2
2
0_0402_5%
1 VDDC_ON#
@
C297
1U_0603_10V6K
2
C C
+1.8VS TO +1.8VGS +3.3VS TO +3.3VGS
+1.8VS +1.8VGS +3VS +3VGS +3VALW
J4 @ J2 @
1
2 1 2 1
PX@ 1 PX@ 1
C375 2MM C423 2MM R263 PX@
U13 PX@ 1 1 1 1 100K_0402_5%
1
1
10U_0603_6.3V6M AO4430L_SO8 PX@ PX@ @ R269 10U_0603_6.3V6M PX@ PX@ @ R268
2
2 8 1 C398 C399 2 C302 C303
7 2 10U_0603_6.3V6M 1U_0603_10V6K 470_0603_5% 3 1 10U_0603_6.3V6M 1U_0603_10V6K 470_0603_5% PXS_PWREN#
+VSB 6 3 2 2 +5VALW 2 2
5 Q26
2
1
Q27 PX@ DTC124EKAT146_SC59-3
AP2301GN-HF_SOT23-3
OUT
R270
4
2
@ Q33 PX@ @ Q29
1
1
R279 PX@ D D
1R370 PX@2 1 2 R271
PXS_PWREN#1 2 2 PXS_PWREN#1 2 2 PXS_PWREN 2
<12,43> PXS_PWREN IN
20K_0402_5% 47K_0402_5% @ R281 G 20K_0402_5% @ R272 G
GND
0_0402_5% 51K_0402_5% 0_0402_5%
S S
3
3
2N7002K_SOT23-3 PX@ 2N7002K_SOT23-3
1 1
1
1
D C357 PX@ D C304 PX@ PX@
3
PXS_PWREN# 2 0.1U_0603_25V7K PXS_PWREN 2 0.1U_0603_25V7K
G Q32 PX@ G Q30 PX@
S 2N7002K_SOT23-3 2 S 2N7002K_SOT23-3 2
3
3
B B
+1.05VS TO +1.0VGS
+1.5V +1.5VGS
J9 @
2 1 +1.05VS +1.0VGS
2MM J7 @
2 1
U12 PX@ PX@
+1.5VS TO +1.5VGS 10U_0603_6.3V6M AO4430L_SO8 C376
1
2MM
8 1 U14 PX@ 1 1
1
1 7 2 1 1 10U_0603_6.3V6M AO4430L_SO8 PX@ PX@ @ R277
1
C305 6 3 PX@ PX@ @ 2 8 1 C419 C421

PX@ 5 C306 C307 R274 7 2 10U_0603_6.3V6M 1U_0603_10V6K 470_0603_5%
10U_0603_6.3V6M 1U_0603_10V6K 470_0603_5% +VSB 6 3 2 2
2 2 2 5
4
2
1 2
+3VALW +VSB @ R282 D R862 PX@ @ Q38
1
PX_MODE# R309 PX@ D
1 2 2 1 2
PX@ G 39K_0402_5% PXS_PWREN#1 2 2
1
R275 0_0402_5% @ Q31 S 20K_0402_5% @ R310 G

3
PX@ 20K_0402_5% 2N7002K_SOT23-3 0_0402_5% S
3
R273 1 2N7002K_SOT23-3
R278
1
100K_0402_5% D C358 PX@

1 2 PXS_PWREN# 2 0.1U_0603_25V7K
2
1 G Q34 PX@
6
R280 PX@ S 2N7002K_SOT23-3 2

3
3
43K_0402_5% 0_0402_5% C308

PX@ PX@ @ 0.1U_0603_25V7K
A PX@ PX_MODE# 2 Q69A 2 A
1
PX_MODE 5 Q69B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6
1
1
PX@ R276
100K_0402_5%
2

ATI_RobsonXT_M2_BACO POWER
C 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
U6F
AB39 A3
PCIE_VSS#1 GND#1
E39 A37
PCIE_VSS#2 GND#2
F34 AA16
PCIE_VSS#3 GND#3
F39 AA18
PCIE_VSS#4 GND#4
G33 AA2
PCIE_VSS#5 GND#5
G34 AA21
PCIE_VSS#6 GND#6
H31 AA23
PCIE_VSS#7 GND#7
H34 AA26
D PCIE_VSS#8 GND#8 D
H39 AA28
PCIE_VSS#9 GND#9
J31 AA6
PCIE_VSS#10 GND#10
J34 AB12
PCIE_VSS#11 GND#11
K31 AB15
PCIE_VSS#12 GND#12
K34 AB17
PCIE_VSS#13 GND#13
K39 AB20
+DPAB_VDD18 +1.8VGS PCIE_VSS#14 GND#14
1.8V@300mA DPAB_VDD18) L31
PCIE_VSS#15 GND#15
AB22
L34 AB24
PCIE_VSS#16 GND#16
M34 AB27
+DPAB_VDD18 PCIE_VSS#17 GND#17
1 R283 2 M39 AC11
PCIE_VSS#18 GND#18
1 1 1 N31 AC13
PCIE_VSS#19 GND#19
C311
C312
C309
0_0402_5% N34 AC16
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
U6H PCIE_VSS#20 GND#20
PX@ P31 AC18
+1.8VGS +DPCD_VDD18 PCIE_VSS#21 GND#21
P34 AC2
DP C/D POWER DP A/B POWER @ 2 @ 2 @ 2 PCIE_VSS#22 GND#22
P39 AC21
PCIE_VSS#23 GND#23
130mA R34
PCIE_VSS#24 GND#24
AC23
1 R284 2 +DPCD_VDD18 AP20 AN24 T31 AC26
DPCD/DPC_VDD18#1 DPAB/DPA_VDD18#1 +DPAB_VDD10 PCIE_VSS#25 GND#25
AP21 AP24 T34 AC28
DPCD/DPC_VDD18#2 DPAB/DPA_VDD18#2 +1.0VGS PCIE_VSS#26 GND#26
C313
C314
C310
0_0402_5% 1U_0402_6.3V6K T39 AC6
10U_0603_6.3V6M
0.1U_0402_16V7K
+DPCD_VDD10 PCIE_VSS#27 GND#27
PX@ 1 1 1 (1.0V@220mA DPAB_VDD10) U31
PCIE_VSS#28 GND#28
AD15
110mA U34
PCIE_VSS#29 GND#29
AD17
@ @ @ AP13 AP31 +DPAB_VDD10 1 R285 2 V34 AD20
DPCD/DPC_VDD10#1 DPAB/DPA_VDD10#1 PCIE_VSS#30 GND#30
AT13 AP32 V39 AD22
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
2 2 2 DPCD/DPC_VDD10#2 DPAB/DPA_VDD10#2 PCIE_VSS#31 GND#31
C315
C316
C317
0_0402_5% W31 AD24
PCIE_VSS#32 GND#32
1 1 1 PX@ W34 AD27
PCIE_VSS#33 GND#33
AN17 AN27 Y34 AD9
DP/DPC_VSSR#1 DP/DPA_VSSR#1 @ @ @ PCIE_VSS#34 GND#34
AP16 AP27 Y39 AE2
DP/DPC_VSSR#2 DP/DPA_VSSR#2 PCIE_VSS#35 GND#35
AP17 AP28 AE6
DP/DPC_VSSR#3 DP/DPA_VSSR#3 2 2 2 GND#36
AW14 AW24 AF10
DP/DPC_VSSR#4 DP/DPA_VSSR#4 GND#37
AW16 AW26 AF16
DP/DPC_VSSR#5 DP/DPA_VSSR#5 GND#38
AF18
+DPCD_VDD18 +DPAB_VDD18 GND#39
AF21
+1.0VGS +DPCD_VDD10
AP22
DPCD/DPD_VDD18#1 DPAB/DPB_VDD18#1
AP25 130mA F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2
AP23 AP26 F17 AG20
+DPCD_VDD10 DPCD/DPD_VDD18#2 DPAB/DPB_VDD18#2 GND#101 GND#43
1 R286 2 F19 AG22
+DPCD_VDD10 +DPAB_VDD10 GND#102 GND#44
F21 AG6
0_0402_5% GND#103 GND#45
@ C318
@ C319
@ C320
C F23 AG9 C
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
GND#104 GND#46
PX@ 1 1 1 AP14 AN33 110mA F25 AH21
DPCD/DPD_VDD10#1 DPAB/DPB_VDD10#1 GND#105 GND#47
AP15 AP33 F27 AJ10
DPCD/DPD_VDD10#2 DPAB/DPB_VDD10#2 GND#106 GND#48
F29 AJ11
GND#107 GND#49
F31 AJ2
2 2 2 GND#108 GND#50
F33 AJ28
GND#109 GND#51
AN19 AN29 F7 AJ6
DP/DPD_VSSR#1 DP/DPB_VSSR#1 GND#110 GND#52
AP18 AP29 F9 AK11
AP19 AP30 G2 AK31
AW20 AW30 G6 AK7
AW22 AW32 H9 AL11
J2 AL14
GND#115 GND#57
J27 AL17
GND#116 GND#58
J6 AL2
150_0402_1% 2 PX@ GND#117 GND#59
1 R287 AW18 AW28 R288 1 PX@ 2 150_0402_1% J8 AL20
+1.8VGS DPCD_CALR DPAB_CALR GND#118 GND#60
K14 AL21 PX_EN <17>
+DPEF_VDD18 +DPAB_VDD18 GND#119 GND/PX_EN#61
K7 AL23
GND#120 GND#62
150mA DP E/F POWER DP PLL POWER 20mA L11 AL26
+DPEF_VDD18 GND#121 GND#63
1 R289 2 AH34 AU28 L17 AL32
1
DPEF/DPE_VDD18#1 DPAB_VDD18/DPA_PVDD GND#122 GND#64
AJ34 AV27 L2 AL6
0_0402_5% DPEF/DPE_VDD18#2 DP_VSSR/DPA_PVSS GND#123 GND#65 R290
@ C321
@ C322
@ C323
L22 AL8
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
+DPEF_VDD10 +DPAB_VDD18 GND#124 GND#66 4.7K_0402_5%

PX@ 1 1 1 L24 AM11
GND#125 GND#67 PX@
20mA L6 AM31
GND#126 GND#68
AL33 AV29 M17 AM9
2
DPEF/DPE_VDD10#1 DPAB_VDD18/DPB_PVDD GND#127 GND#69
AM33 AR28 M22 AN11
2 2 2 DPEF/DPE_VDD10#2 DP_VSSR/DPB_PVSS GND#128 GND#70
M24 AN2
+DPCD_VDD18 GND#129 GND#71
N16 AN30
GND#130 GND#72
N18 AN6
GND#131 GND#73
AN34 AU18 N2 AN8
DP/DPE_VSSR#1 DPCD_VDD18/DPC_PVDD GND#132 GND#74
AP39 AV17 N21 AP11
DP/DPE_VSSR#2 DP_VSSR/DPC_PVSS GND#133 GND#75
AR39 N23 AP7
DP/DPE_VSSR#3 +DPCD_VDD18 GND#134 GND#76
AU37 N26 AP9
DP/DPE_VSSR#4 GND#135 GND#77
N6 AR5
GND#136 GND#78
AV19 R15 B11
+DPEF_VDD18 DPCD_VDD18/DPD_PVDD GND#137 GND#79
AR18 R17 B13
DP_VSSR/DPD_PVSS GND#138 GND#80
20mA R2 B15
AF34 R20 B17
+1.0VGS +DPEF_VDD10 DPEF/DPF_VDD18#1 GND#140 GND#82
AG34 R22 B19
B DPEF/DPF_VDD18#2 GND#141 GND#83 B
AM37 R24 B21
+DPEF_VDD10 DPEF_VDD18/DPE_PVDD GND#142 GND#84
AN38 R27 B23
DP_VSSR/DPE_PVSS GND#143 GND#85
20mA R6 B25
1 R291 2 AK33 +DPEF_VDD18 T11 B27
DPEF/DPF_VDD10#1 GND#145 GND#87
AK34 T13 B29
DPEF/DPF_VDD10#2 GND#146 GND#88
@ C324
@ C325
@ C326
0_0402_5% AL38 T16 B31

10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
DPEF_VDD18/DPF_PVDD GND#147 GND#89

PX@ 1 1 1 AM35 T18 B33
DP_VSSR/DPF_PVSS GND#148 GND#90
T21 B7
GND#149 GND#91
AF39 T23 B9
DP/DPF_VSSR#1 GND#150 GND#92
AH39 T26 C1
2 2 2 DP/DPF_VSSR#2 GND#151 GND#93
AK39 U15 C39
AL34 U17 E35
AM34 U2 E5
U20 F11
GND#156 GND#97
U22 F13
GND#157 GND#98
U24
150_0402_1% PX@ 1 R292 GND#158
2 AM39 U27
DPEF_CALR GND#159
U6
GND#160
V11
ROBSON XT M2 GND#161
V16
PX@ GND#163
V18
GND#164
V21
GND#165
V23
GND#166
V26
GND#167
W2
GND#168
W6
GND#169
Y15
GND#170
Y17
GND#171
Y20
GND#172
Y22 A39 MECH#1
GND#173 VSS_MECH#1 T55 PAD
Y24 AW1 MECH#2
Y27 AW39MECH#3
U13
GND#152
V13
GND#162
ROBSON XT M2
PX@
A A

ATI_RobsonXT_M2_PWR_GND
C 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
(1.8V@504mA PCIE_VDDR) +1.8VGS

+1.5VGS U6E PX@ L21
For DDR3/GDDR5, MVDDQ = 1.5V +PCIE_VDDR 2 1
MEM I/O MBK1608121YZF_0603
PCIE
C330
C331
C332
C333
C334
C335
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
AC7
AD11
VDDR1#1 PCIE_VDDR#1
AA31
AA32
1 1 1 1 1 1 PCIE_VDDR CRB Design
VDDR1#2 PCIE_VDDR#2
0.1u 2 2
C336
C337
C338
C327
C339
C328
C340
C341
C329
C342
C343
C344
C345
C346
C347
C348
1 AF7 AA33
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
220U_B2_2.5VM_R35
D VDDR1#3 PCIE_VDDR#3 D
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AG10 AA34
VDDR1#4 PCIE_VDDR#4 2 2 2 2 2 2 1u 3 3
PX@
PX@
PX@
PX@
PX@
PX@
+ AJ7 V28
@ VDDR1#5 PCIE_VDDR#5
AK8 W29
AL9
VDDR1#6 PCIE_VDDR#6
W30
10u 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VDDR1#7 PCIE_VDDR#7
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
G11 Y31
VDDR1#8 PCIE_VDDR#8 +1.0VGS
G14 AB37
VDDR1#9 PCIE_VDDR/PCIE_PVDD
G17
VDDR1#10 (1.0V@1920mA PCIE_VDDC)
G20 G30
VDDR1#11 PCIE_VDDC#1
G23 G31
C349
C350
C351
C352
C353
C354
G26 H29
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
G29 H30 1 1 1 1 1 1
H10
J7
J29
J30
PCIE_VDDC CRB Design
J9
L28
2 2 2 2 2 2
1u 7 5 (1@)
PX@
PX@
PX@
PX@
PX@
K11 M28
K13
VDDR1#18
VDDR1#19
PCIE_VDDC#8
PCIE_VDDC#9
N28 10u 1 1
VDDR1 CRB Design K8
L12
R28
T28
0.1u 6 6 L16
U28
+VGA_CORE
L21
1u 10 5 L23
VDDR1#23
VDDR1#24
10u 6 5 L26
L7
VDDR1#25 CORE VDDC#1
AA15
AA17
VDDC CRB Design
VDDR1#26 VDDC#2
1u 30 25
C355
C356
C359
C360
C361
C362
C363
C364
C365
C366
C367
C368
C369
M11 AA20
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDDR1#27 VDDC#3
N11 AA22 1 1 1 1 1 1 1 1 1 1 1 1 1
VDD_CT CRB Design P7
VDDR1#28
VDDR1#29
VDDC#4
VDDC#5
AA24 10u 10 1
R11 AA27
0.1u 1 1 U11
VDDR1#30 VDDC#6
AB16
22u 0 1
+1.8VGS +VDDC_CT VDDR1#31 VDDC#7 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
U7 AB18
1u 3 3 Y11
VDDR1#32
VDDR1#33
VDDC#8
VDDC#9
AB21
PX@ L22 (1.8V@110mA VDD_CT) Y7 AB23
10u 1 1 1 2
VDDR1#34 VDDC#10
AB26
BLM15BD121SN1D_0402 VDDC#11
AB28
VDDC#12 +VGA_CORE
C370
C371
C372
C373
C374
AC17
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDC#13
1 1 1 1 1 AC20
LEVEL VDDC#14
VDDR3 CRB Design +3VGS TRANSLATION VDDC#15
AC22
AC24
VDDC#16
POWER
1u 3 3
C377
C378
C379
C381
C382
C383
C384
C385
C386
C387
C388
C389
C AF26 AC27 C
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PX@ 2 2 2 2 2 VDD_CT#1 VDDC#17
PX@
PX@
PX@
PX@
AF27 AD18 1 1 1 1 1 1 1 1 1 1 1 1
10u 1 1 AG26
VDD_CT#2
VDD_CT#3
VDDC#18
VDDC#19
AD21
C390
C391
C392
C393
AG27 AD23
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD_CT#4 VDDC#20
1 1 1 1 AD26
VDDC#21 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
AF17
I/O VDDC#22
VDDR4 CRB Design AF23
VDDC#23
AF20
AF22
2 2 2 2 VDDR3#1 VDDC#24
PX@
PX@
PX@
PX@
0.1u 1 1 AF24
VDDR3#2 VDDC#25
AG16
AG23 AG18
1u 1 1 +1.8VGS AG24
VDDR3#3
VDDR3#4
VDDC#26
VDDC#27
AG21 +VGA_CORE
AH22
PX@ L23 VDDC#28
AH27
+VDDR4 VDDC#29
MPV18 CRB Design 1 2 AF13
VDDR4#4 VDDC#30
AH28
C400
C394
BLM15BD121SN1D_0402 AF15 M26
10U_0603_6.3V6M
22U_0603_6.3V6M
VDDR4#5 VDDC#31
0.1u 2 1
C396
C397 AG13 N24 1 1

1U_0402_6.3V6K
0.1U_0402_16V7K
VDDR4#7 VDDC#32
1 1 AG15 N27
1u 2 1 VDDR4#8 VDDC/BIF_VDDC#33
VDDC#34
R18
R21
10u 1 1 VDDC#35 2 2
PX@
PX@
AD12 R23
2 2 VDDR4#1 VDDC#36
PX@
PX@
AF11 R26
VDDR4#2 VDDC#37
AF12 T17
VDDR4#3 VDDC#38 +BIF_VDDC
SPV18 CRB Design AG11
VDDR4#6 VDDC#39
T20
T22
+1.8VGS +1.8VGS VDDC#40
0.1u 1 1 VDDC#41
T24
T27
1u 1 1 (M97, Broadway and Madison: 1.8V@150mA MPV18)
VDDC/BIF_VDDC#42
VDDC#43
U16 For non-BACO designs, connect BIF_VDDC to VDDC.
C401
C402
L24 PX@ M20 U18
10u 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1 2 +MPV18 M21
NC_VDDRHA VDDC#44
U21 1 1 For BACO designs - see BACO reference schematics
MCK1608471YZF 0603 NC_VSSRHA VDDC#45
U23
L25 PX@ VDDC#46
VDDC#47
U26 VDDCI CRB Design
C403
C404
C405
SPV10 CRB Design 1 2 V12 V17

1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
NC_VDDRHB VDDC#48 2 2
1u 10 9
PX@
PX@
BLM15BD121SN1D_0402 1 1 1 U12 V20
NC_VSSRHB VDDC#49
0.1u 1 1 VDDC#50
V22
10u 3 2
C406
C407
C408
V24
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
1u 1 1 1 1 1 2 2 2
VDDC#51
VDDC#52
V27
22u 0 1
PX@
PX@
PX@
Y16
10u 1 1 PLL VDDC#53
Y18
B VDDC#54 B
Y21
2 2 2 VDDC#55
PX@
PX@
PX@
Y23
VDDC#56
H7 Y26
MPV18#1 VDDC#57
H8 Y28
MPV18#2 VDDC#58 +VGA_CORE
(GDDR3/DDR3 1.12V@4A VDDCI)
+1.0VGS
(1.8V@75mA SPV18) +SPV18 AM10 (GDDR5 1.12V@16A VDDCI)
PX@ L26 SPV18
AA13
+SPV10 VDDCI#1
1 2 (120mA SPV10) AN9
SPV10 VDDCI#2
AB13
C409
C410
C411
C412
C413
C414
C415
C416
C417
C418
C422
C425
MCK1608471YZF 0603 AC12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
22U_0603_6.3V6M
VDDCI#3
AN10 AC15 1 1 1 1 1 1 1 1 1 1 1 1
SPVSS VDDCI#4
C420
C424
C426
AD13
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDCI#5
1 1 1 AD16
VDDCI#6
M15
VDDCI#7 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
M16
VOLTAGE VDDCI#8
M18
2 2 2 VDDCI#9
PX@
PX@
PX@
SENESE M23
VDDCI#10
N13
VDDCI#11
<43> VCCSENSE_VGA AF28 N15
FB_VDDC VDDCI#12
N17
VDDCI#13
N20
AG28
VDDCI#14
N22
VDDCI and VDDC should have seperate regulators with a merge option on PCB
FB_VDDCI ISOLATED VDDCI#15 R12
CORE I/O VDDCI#16 R13
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
VDDCI#17
<43> VSSSENSE_VGA AH29 R16
FB_GND VDDCI#18
T12
VDDCI#19
T15
VDDCI#20
V15
VDDCI#21
Y13
VDDCI#22
ROBSON XT M2
PX@
A A

ATI_RobsonXT_M2_Power
C 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
U6C
DDR2 DDR2 U6D MDB[0..63]
GDDR3/GDDR5 GDDR5/GDDR3 DDR2 DDR2 <21> MDB[0..63]
DDR3 DDR3 GDDR3/GDDR5 GDDR5/GDDR3
C37 G24 DDR3 DDR3 MAB[12..0]
DQA0_0/DQA_0 MAA0_0/MAA_0 MAB[12..0] <21>
C35 J23 MDB0 C5 P8 MAB0
DQA0_1/DQA_1 MAA0_1/MAA_1 MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1 B_BA[2..0]
A35 H24 C3 T9 B_BA[2..0] <21>
DQA0_2/DQA_2 MAA0_2/MAA_2 MDB2 DQB0_1/DQB_1 MAB0_1/MAB_1 MAB2
E34 J24 E3 P9
MEMORY INTERFACE A
G32 H26 E1 N7
D33 J26 F1 N8
MEMORY INTERFACE B
F32 H21 F3 N9
E32 G21 F5 U9
D31 H19 G4 U8
F30 H20 H5 Y9
C30 L13 H6 W9
A30 G16 J4 AC8
DQA0_11/DQA_11 MAA1_3/MAA_11 +1.8VGS MDB11 DQB0_10/DQB_10 MAB1_2/MAB_10 MAB11
F28 J16 K6 AC9
C28 H16 K5 AA7
D DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 R293 X76@ 10K_0402_5% VRAM_ID0 MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12 B_BA2 D
A28 J17 1 2 VRAM_ID0 <16> L4 AA8
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 R294 X76@ 10K_0402_5% MDB14 DQB0_13/DQB_13 MAB1_5/BA2 B_BA0
E28 H17 1 2 M6 Y8
DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 R295 X76@ 10K_0402_5% VRAM_ID1 MDB15 DQB0_14/DQB_14 MAB1_6/BA0 B_BA1
D27 1 2 VRAM_ID1 <16> M1 AA9
DQA0_16/DQA_16 R296 X76@ 10K_0402_5% MDB16 DQB0_15/DQB_15 MAB1_7/BA1
F26 A32 1 2 M3 DQMB#[7..0] <21>
DQA0_17/DQA_17 WCKA0_0/DQMA_0 R297 X76@ 10K_0402_5% VRAM_ID2 MDB17 DQB0_16/DQB_16 DQMB#0
C26 C32 1 2 VRAM_ID2 <16> M5 H3
DQA0_18/DQA_18 WCKA0B_0/DQMA_1 R298 X76@ 10K_0402_5% MDB18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 DQMB#1
A26 D23 1 2 N4 H1
DQA0_19/DQA_19 WCKA0_1/DQMA_2 MDB19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 DQMB#2
F24 E22 P6 T3
DQA0_20/DQA_20 WCKA0B_1/DQMA_3 MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB#3
C24 C14 P5 T5
A24 A14 R4 AE4
E24 E10 T6 AF5
C22 D9 T1 AK6
A22 U4 AK5
DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 MDB25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
F22 C34 V6 QSB[7..0] <21>
DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 QSB0
D21 D29 V1 F6
DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 QSB1
A20 D25 V3 K3
F20
D19
DQA0_28/DQA_28
DQA0_29/DQA_29
EDCA0_2/QSA_2/RDQSA_2
E20
E16
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2 MDB28
MDB29
Y6
Y1
DQB0_27/DQB_27
DQB0_28/DQB_28
EDCB0_1/QSB_1/RDQSB_1
P3
V5
QSB2
QSB3
DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 MDB30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 QSB4
E18 E12 Y3 AB5
DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 K4W1G1646G-BC11 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 QSB5
C18 J10 Y5 AH1
A18
DQA1_0/DQA_32
DQA1_1/DQA_33
D7 64MX16 (512MB) Samsung 1Gb R293 R296 R298 MDB32 AA4
DQB0_31/DQB_31
DQB1_0/DQB_32
AJ9 QSB6
PN:SA00004GS40
F18 MDB33 AB6 AM5 QSB7
DQA1_2/DQA_34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 QSB#[7..0] <21>
D17 A34 1 0 0 MDB34 AB1
DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 H5TQ1G63DFR-11C MDB35 DQB1_2/DQB_34 QSB#0
A16 E30 AB3 G7
F16
DQA1_4/DQA_36
DQA1_5/DQA_37
DDBIA0_1/QSA_1B/WDQSA_1
E26 64MX16 (512MB) Hynix 1Gb R294 R295 R298 MDB36 AD6
DQB1_3/DQB_35
DQB1_4/DQB_36
DDBIB0_0/QSB_0B/WDQSB_0
K1 QSB#1
PN:SA000041S30
D15 C20 MDB37 AD1 P1 QSB#2
DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 0 1 0 MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 QSB#3
E14 C16 AD3 W4
DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 K4W2G1646C-HC11 MDB39 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 QSB#4
F14 C12 AD5 AC4
D13
DQA1_8/DQA_40
DQA1_9/DQA_41
J11 Samsung 256MB R293 R296 R297 MDB40 AF1
DQB1_7/DQB_39
DQB1_8/DQB_40
AH3 QSB#5
PN:SA000047Q10
F12 F8 128M16 (1GB) MDB41 AF3 AJ8 QSB#6
DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 1 0 1 MDB42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 QSB#7
A12 AF6 AM3
DQA1_11/DQA_43 H5TQ2G63BFR-11C/H5TQ2G63DFR-11C MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
D11 J21 AG4
F10
DQA1_12/DQA_44
DQA1_13/DQA_45
ADBIA0/ODTA0
ADBIA1/ODTA1
G19 Hynix 256MB R294 R295 R297 MDB44 AH5
DQB1_11/DQB_43
DQB1_12/DQB_44 ADBIB0/ODTB0
T7 ODTB0
ODTB0 <21>
PN:SA00003YO10/
A10 128M16 (1GB) MDB45 AH6 W7 ODTB1
DQA1_14/DQA_46 DQB1_13/DQB_45 ADBIB1/ODTB1 ODTB1 <21>
C10 H27 0 1 1 MDB46 AJ4
SA00003YO70
DQA1_15/DQA_47 CLKA0 MDB47 DQB1_14/DQB_46 CLKB0
G13 G27 AK3 L9 CLKB0 <21>
DQA1_16/DQA_48 CLKA0B MDB48 DQB1_15/DQB_47 CLKB0 CLKB0#
H13 AF8 L8 CLKB0# <21>
DQA1_17/DQA_49 MDB49 DQB1_16/DQB_48 CLKB0B
J13 J14 AF9
DQA1_18/DQA_50 CLKA1 MDB50 DQB1_17/DQB_49 CLKB1
C H11 H14 AG8 AD8 CLKB1 <21>
C
DQA1_19/DQA_51 CLKA1B MDB51 DQB1_18/DQB_50 CLKB1 CLKB1#
G10 AG7 AD7 CLKB1# <21>
DQA1_20/DQA_52 MDB52 DQB1_19/DQB_51 CLKB1B
G8 K23 AK9
DQA1_21/DQA_53 RASA0B MDB53 DQB1_20/DQB_52 RASB0#
K9 K19 AL7 T10 RASB0# <21>
DQA1_22/DQA_54 RASA1B MDB54 DQB1_21/DQB_53 RASB0B RASB1#
K10 AM8 Y10 RASB1# <21>
DQA1_23/DQA_55 MDB55 DQB1_22/DQB_54 RASB1B
G9 K20 AM7
DQA1_24/DQA_56 CASA0B MDB56 DQB1_23/DQB_55 CASB0#
A8 K17 AK1 W10 CASB0# <21>
DQA1_25/DQA_57 CASA1B MDB57 DQB1_24/DQB_56 CASB0B CASB1#
C8 AL4 AA10 CASB1# <21>
DQA1_26/DQA_58 MDB58 DQB1_25/DQB_57 CASB1B
E8 K24 AM6
DQA1_27/DQA_59 CSA0B_0 MDB59 DQB1_26/DQB_58 CSB0#_0
A6 K27 AM1 P10 CSB0#_0 <21>
DQA1_28/DQA_60 CSA0B_1 MDB60 DQB1_27/DQB_59 CSB0B_0
C6 AN4 L10
DQA1_29/DQA_61 MDB61 DQB1_28/DQB_60 CSB0B_1
E6 M13 AP3
DQA1_30/DQA_62 CSA1B_0 MDB62 DQB1_29/DQB_61 CSB1#_0
A5 K16 AP1 AD10 CSB1#_0 <21>
DQA1_31/DQA_63 CSA1B_1 MDB63 DQB1_30/DQB_62 CSB1B_0
AP5 AC10
DQB1_31/DQB_63 CSB1B_1
L18 K21
+1.5VGS MVREFDA CKEA0 CKEB0
L20 J20 U10 CKEB0 <21>
MVREFSA CKEA1 +VDD_MEM15_REFDB Y12 CKEB0 CKEB1
AA11 CKEB1 <21>
R299 1 @ MVREFDB CKEB1
2 240_0402_1% L27 K26 +VDD_MEM15_REFSB AA12
R300 1 PX@ MEM_CALRN0 WEA0B MVREFSB WEB0#
2 240_0402_1% N12 L15 N10 WEB0# <21>
R301 1 @ MEM_CALRN1 WEA1B WEB0B WEB1#
2 240_0402_1% AG12 AB11 WEB1# <21>
MEM_CALRN2 WEB1B
R304 1 PX@ 2 240_0402_1% M12 H23 PX@
MEM_CALRP1 MAA0_8
GDDR5
R302 1 @ 2 240_0402_1% M27 J19 R303 1 2 TESTEN AD28 T8 MAB13

MEM_CALRP0 MAA1_8 TESTEN MAB0_8 MAB13 <21>
GDDR5
R305 1 @ 2 240_0402_1% AH12 5.11K_0402_1% W8 MAB14
MEM_CALRP2 MAB1_8 MAB14 <21>
AK10
CLKTESTA DRAM_RST#_R
AL10 AH11
CLKTESTB DRAM_RST
ROBSON XT M2
ROBSON XT M2
PX@ PX@
1
Rosbon M2 @ @
C427 C428
R299 @ 0.1U_0402_16V7K 0.1U_0402_16V7K
2
B B
route 50ohms single-ended/100ohms diff
R300 POP This basic topology should be used for DRAM_RST for DDR3/GDDR5.These and keep short
Capacitors and Resistor values are an example only. The Series R and Debug only, for clock observation, if not needed, DNI
1
R301 @ || Cap values will depend on the DRAM load and will have to be 5mil 5mil
@ @
R302 @ calculated for different Memory ,DRAM Load and board to pass Reset R306 R307
Signal Spec. 51.1_0402_1% 51.1_0402_1%
R304 POP Place all these components very close to GPU (Within
2
25mm) and keep all component close to each Other (within
R305 @ 5mm) except Rser2
+1.5VGS
1
R308
4.7K_0402_5% +1.5VGS +1.5VGS
@
2
1
R311 R312
40.2_0402_1% 40.2_0402_1%
1 R313 2 1 R314 2 DRAM_RST#_R PX@ PX@
<21> DRAM_RST# 51.1_0402_1% 10_0402_5%
2
PX@ PX@
+VDD_MEM15_REFDB +VDD_MEM15_REFSB
2
1
PX@ PX@
1
C431 R317 C432 C433
120P_0402_50V9 4.99K_0402_1% R318 0.1U_0402_16V7K R319 0.1U_0402_16V7K
2
100_0402_1% PX@ 100_0402_1% PX@

1
2
PX@ PX@
2
A A

ATI_RobsonXT_M2_MEM IF
C 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
U17 U18 U19 U20
VREFC_A1_B M8 E3 MDB19 VREFC_A2_B M8 E3 MDB26 VREFC_A3_B M8 E3 MDB33 VREFC_A4_B M8 E3 MDB55

VREFD_Q1_B H1 VREFCA DQL0 MDB20 VREFD_Q2_B VREFCA DQL0 MDB30 VREFD_Q3_B VREFCA DQL0 MDB37 VREFD_Q4_B VREFCA DQL0 MDB50
F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 MDB22 VREFDQ DQL1 MDB24 VREFDQ DQL1 MDB35 VREFDQ DQL1 MDB54
F2 F2 F2 F2
MAB0 DQL2 MDB16 MAB0 DQL2 MDB29 MAB0 DQL2 MDB39 MAB0 DQL2 MDB51
N3 F8 N3 F8 N3 F8 N3 F8
MAB1 A0 DQL3 MDB23 MAB1 A0 DQL3 MDB27 MAB1 A0 DQL3 MDB32 MAB1 A0 DQL3 MDB53
P7 H3 P7 H3 P7 H3 P7 H3
P3 H8 P3 H8 P3 H8 P3 H8
N2 G2 N2 G2 N2 G2 N2 G2
P8 H7 P8 H7 P8 H7 P8 H7
MAB5 A4 DQL7 MAB5 A4 DQL7 MAB5 A4 DQL7 MAB5 A4 DQL7
P2 P2 P2 P2
MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
R8 R8 R8 R8
MAB7 A6 MDB0 MAB7 A6 MDB15 MAB7 A6 MDB44 MAB7 A6 MDB56
R2 D7 R2 D7 R2 D7 R2 D7
D MDB[0..63] MAB8 A7 DQU0 MDB4 MAB8 A7 DQU0 MDB10 MAB8 A7 DQU0 MDB41 MAB8 A7 DQU0 MDB59 D
T8 C3 T8 C3 T8 C3 T8 C3
<20> MDB[0..63] MAB9 A8 DQU1 MDB1 MAB9 A8 DQU1 MDB14 MAB9 A8 DQU1 MDB47 MAB9 A8 DQU1 MDB63
R3 C8 R3 C8 R3 C8 R3 C8
MAB10 A9 DQU2 MDB6 MAB10 A9 DQU2 MDB11 MAB10 A9 DQU2 MDB43 MAB10 A9 DQU2 MDB62
L7 C2 L7 C2 L7 C2 L7 C2
MAB11 A10/AP DQU3 MDB3 MAB11 A10/AP DQU3 MDB12 MAB11 A10/AP DQU3 MDB45 MAB11 A10/AP DQU3 MDB57
R7 A7 R7 A7 R7 A7 R7 A7
N7 A2 N7 A2 N7 A2 N7 A2
T3 B8 T3 B8 T3 B8 T3 B8
MAB[14..0] MAB14 A13 DQU6 MDB5 MAB14 A13 DQU6 MDB8 MAB14 A13 DQU6 MDB42 MAB14 A13 DQU6 MDB60
<20> MAB[14..0] T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15/BA3 +1.5VGS A15/BA3 +1.5VGS A15/BA3 +1.5VGS A15/BA3 +1.5VGS
M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2

<20> B_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 B_BA1 N8 D9 B_BA1 N8 D9 B_BA1 N8 D9
<20> B_BA1 BA1 VDD BA1 VDD BA1 VDD BA1 VDD
M3 G7 B_BA2 M3 G7 B_BA2 M3 G7 B_BA2 M3 G7
DQMB#[7..0] <20> B_BA2 BA2 VDD BA2 VDD BA2 VDD BA2 VDD
<20> DQMB#[7..0] K2 K2 K2 K2
VDD VDD VDD VDD
K8 K8 K8 K8
VDD VDD VDD VDD
N1 N1 N1 N1
VDD CLKB0 VDD VDD CLKB1 VDD
<20> CLKB0 J7 N9 J7 N9 <20> CLKB1 J7 N9 J7 N9
CK VDD CLKB0# CK VDD CK VDD CLKB1# CK VDD
<20> CLKB0# K7 R1 K7 R1 <20> CLKB1# K7 R1 K7 R1
CK VDD CKEB0 CK VDD CK VDD CKEB1 CK VDD
<20> CKEB0 K9 R9 K9 R9 <20> CKEB1 K9 R9 K9 R9
QSB[7..0] CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS
<20> QSB[7..0]
K1 A1 ODTB0 K1 A1 K1 A1 ODTB1 K1 A1
<20> ODTB0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ <20> ODTB1 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSB0#_0 L2 A8 L2 A8 CSB1#_0 L2 A8
<20> CSB0#_0 CS/CS0 VDDQ CS/CS0 VDDQ <20> CSB1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASB0# J3 C1 J3 C1 RASB1# J3 C1
<20> RASB0# RAS VDDQ RAS VDDQ <20> RASB1# RAS VDDQ RAS VDDQ
K3 C9 CASB0# K3 C9 K3 C9 CASB1# K3 C9
<20> CASB0# CAS VDDQ CAS VDDQ <20> CASB1# CAS VDDQ CAS VDDQ
L3 D2 WEB0# L3 D2 L3 D2 WEB1# L3 D2
QSB#[7..0] <20> WEB0# WE VDDQ WE VDDQ <20> WEB1# WE VDDQ WE VDDQ
<20> QSB#[7..0] E9 E9 E9 E9
VDDQ VDDQ VDDQ VDDQ
F1 F1 F1 F1
QSB2 VDDQ QSB3 VDDQ QSB4 VDDQ QSB6 VDDQ
F3 H2 F3 H2 F3 H2 F3 H2
QSB0 DQSL VDDQ QSB1 DQSL VDDQ QSB5 DQSL VDDQ QSB7 DQSL VDDQ
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
DQMB#2 E7 A9 DQMB#3 E7 A9 DQMB#4 E7 A9 DQMB#6 E7 A9

DQMB#0 DML VSS DQMB#1 DML VSS DQMB#5 DML VSS DQMB#7 DML VSS
D3 B3 D3 B3 D3 B3 D3 B3
DMU VSS DMU VSS DMU VSS DMU VSS
E1 E1 E1 E1
VSS VSS VSS VSS
G8 G8 G8 G8
QSB#2 VSS QSB#3 VSS QSB#4 VSS QSB#6 VSS
G3 J2 G3 J2 G3 J2 G3 J2
PX@ QSB#0 DQSL VSS QSB#1 DQSL VSS QSB#5 DQSL VSS QSB#7 DQSL VSS
C B7 J8 B7 J8 B7 J8 B7 J8 C
CLKB0 1 DQSU VSS DQSU VSS DQSU VSS DQSU VSS
2 M1 M1 M1 M1
R344 56_0402_1% VSS VSS VSS VSS
M9 M9 M9 M9
VSS VSS VSS VSS
P1 P1 P1 P1
PX@ VSS DRAM_RST# T2 VSS DRAM_RST# T2 VSS DRAM_RST# T2 VSS
<20> DRAM_RST# T2 P9 P9 P9 P9
CLKB0# 1 RESET VSS RESET VSS RESET VSS RESET VSS
2 T1 T1 T1 T1
R345 56_0402_1% VSS VSS VSS VSS
L8 T9 L8 T9 L8 T9 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
C481
1
1
0.01U_0402_16V7K J1 B1 J1 B1 J1 B1 J1 B1
PX@ R346 NC/ODT1 VSSQ R347 NC/ODT1 VSSQ R348 NC/ODT1 VSSQ R349 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
2
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ

240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1
PX@ NC/CE1 VSSQ PX@ NC/CE1 VSSQ PX@ NC/CE1 VSSQ PX@ NC/CE1 VSSQ
L9 D8 L9 D8 L9 D8 L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
PX@ VSSQ VSSQ VSSQ VSSQ
G9 G9 G9 G9
CLKB1 1 VSSQ VSSQ VSSQ VSSQ
2
R350 56_0402_1% 96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
PX@ H5TQ1G63DFR-11C H5TQ1G63DFR-11C H5TQ1G63DFR-11C H5TQ1G63DFR-11C
CLKB1# 1 2 X76@ X76@ X76@ X76@
R351 56_0402_1%
1
C482
0.01U_0402_16V7K
PX@
2
+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

B B
1
1
R352 R353 R354 R355 R356 R357 R358 R359
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
2
2
VREFD_Q1_B VREFC_A1_B VREFC_A2_B VREFD_Q2_B VREFC_A3_B VREFD_Q3_B VREFC_A4_B VREFD_Q4_B
C484
C485
C486
C487
C488
C489
C490
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C483
1 1 1 1 1 1 1
0.1U_0402_16V7K
1
1 R361 R362 R364 R365 R366 R367 R363

R360 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
4.99K_0402_1% PX@ PX@ PX@ PX@ PX@ PX@ PX@
2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2
2
2
PX@
2
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
C491
C492
C493
C494
C495
C496
C497
C498
C499
C500
C501
C502
C503
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C504
C505
C506
C507
C1048
C1049
C1050
C1051
C1052
C1053
C1054
C1055
C1056
C1057
C1058
C1059
C1062
C1063
C1060
C1061
C1064
C1065
C1066
C1067
1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
A A

ATI_RobsonXT_M2_VRAM_B
C 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT +LCDVDD +5VALW
+3VS
1
R381 R382 W=60mils
150_0603_1% 100K_0402_5%
1 2
C1068
2
R383
3
D 4.7U_0603_6.3V6K
Q35 2 1 2 2
D 2N7002K_SOT23-3 G 2 D
S 220K_0402_5%
3
Q36
1 AP2301GN-HF_SOT23-3
1
1
C1069
W=60mils
OUT
0.1U_0402_16V4Z
2 +LCDVDD +LCDVDD_CONN
L74
R389 1 2 0_0402_5% 2
<5> APU_ENVDD IN
1 2
GND
Q37 FBMA-L11-201209-221LMA30T_0805
1
DTC124EKAT146_SC59-3 1 1
3
C1070 C1071
R390 @ 4.7U_0603_6.3V6K
100K_0402_5% 0.1U_0402_16V4Z
2 2
2
R697 1 2 0_0402_5%
<30> EC_INVT_PWM
C C
R392 1 2 0_0402_5% INVTPWM

<5> APU_BLPWM
@
2
+LEDVDD B+
R395
100K_0402_5%
1 R822 2
1
1 1 0_0805_5%
@
C543 C542
680P_0402_50V7K 4.7U_0805_25V6-K
2 2
JLVDS1
1
1
2 31
2 G1
3 32
+3VS 3 G2
4 33
@ R982 4 G3
5 34
R698 1 5 G4
<30> BKOFF# 2 0_0402_5% 1 2 1 2 6
6
R984 0_0402_5% 10K_0402_5% DISPOFF# 7
INVTPWM 7
8
8
9
9
<5> LVDS_ACLK 10 10
R1007 1 2 10K_0402_5% 1 2 DISPOFF# 11
<5> LVDS_ACLK# 11
12
RB751V_SOD323 12
<5> LVDS_A2 13 13
D4 @ 14
<5> LVDS_A2# 14
<5> LVDS_A1 15 15
B B
<5> LVDS_A1# 16 16
R983 1 2 0_0402_5% 17
<5> APU_ENBKL ENBKL <30> <5> LVDS_A0 17
<5> LVDS_A0# 18 18
<5> EDID_DATA 19
19
<5> EDID_CLK 20 20
R396 +3VS 21
21
1 +LCDVDD_CONN 22 22
2 1 @ (60 MIL) 23
C544 23
+3VS 24 24
680P_0402_50V7K 25
100K_0402_5% 2 25
+3VS_CMOS 26 26
<12> USB20_P3 USB20_P3 27
USB20_N3 27
<12> USB20_N3 28 28
29
29
30 30
ACES_88341-3001
CMOS Camera ME@
Q39
AP2301GN-HF_SOT23-3
3 1 +CMOS_PW
+3VS
CMOS@ 1
1
C1090
0.1U_0402_16V4Z
2
R986 CMOS@
C1091 2
0_0603_5%
1 2 CMOS@
2
A A
0.1U_0402_16V4Z +3VS_CMOS
CMOS@ 1
2
10U_0603_6.3V6M
R987 C1092
10K_0402_5% CMOS@
CMOS@ 2

1
<30> CMOS_ON#
LVDS/CAMERA
B 0.1
LA8681P
5 4 3 2 1
5 4 3 2 1
EMI request
@L75
@ L75
<5> HDMI_CLKP R988 HDMI@ 1 2 0_0402_5% HDMI_CLK+_CONN HDMI_CLKP 1 2 HDMI_CLK+_CONN @ C1025 1 2 10P_0402_50V8J
1 2
<5> HDMI_CLKN R989 HDMI@ 1 2 0_0402_5% HDMI_CLK-_CONN HDMI_CLKN 4 3 HDMI_CLK-_CONN @ C1026 1 2 10P_0402_50V8J
4 3
D WCM-2012-900T_4P D
@L33
@ L33
<5> HDMI_TX0P R412 HDMI@ 1 2 0_0402_5% HDMI_TX0+_CONN HDMI_TX0P 1 2 HDMI_TX0+_CONN @ C1027 1 2 10P_0402_50V8J
1 2
R991 HDMI@ 1 2 0_0402_5% HDMI_TX0-_CONN HDMI_TX0N 4 3 HDMI_TX0-_CONN @ C1028 1 2 10P_0402_50V8J

<5> HDMI_TX0N 4 3
WCM-2012-900T_4P
@L34
@ L34
R414 HDMI@ 1 2 0_0402_5% HDMI_TX1+_CONN HDMI_TX1P 1 2 HDMI_TX1+_CONN @ C1029 1 2 10P_0402_50V8J
<5> HDMI_TX1P 1 2

<5> HDMI_TX1N 4 3
WCM-2012-900T_4P
@L35
@ L35
<5> HDMI_TX2P R994 HDMI@ 1 2 0_0402_5% HDMI_TX2+_CONN HDMI_TX2P 1 2 HDMI_TX2+_CONN @ C1031 1 2 10P_0402_50V8J
1 2

<5> HDMI_TX2N 4 3
WCM-2012-900T_4P
C C
HDMI@ HDMIDAT_R
HDMI_CLK+_CONN 2 R418 1 499_0402_1%
HDMI@ HDMICLK_R
HDMI_CLK-_CONN 2 R252 1 499_0402_1% +5VS @R429
@ R429
ESD
HDMI@ 3
2
HDMI_TX0+_CONN 2 R253 1 499_0402_1% 0_0805_5%
D5 @ 1 HDMI_HPD
HDMI@ PJDLC05_SOT23-3
HDMI_TX0-_CONN 2 R255 1 499_0402_1% 2 @ +5VS_HDMI_F 1 2 +5VS
D8
HDMI@ BAT54S-7-F_SOT23-3
RB491D_SC59-3
2
HDMI_TX1+_CONN 2 R258 1 499_0402_1%
HDMI@ D7 HDMI@
HDMI@ F1
1
HDMI_TX1-_CONN 2 R260 1 499_0402_1% 1.1A_6V_SMD1812P110TF
ESD
1
HDMI@ +5VS_HDMI
HDMI_TX2+_CONN 2 R262 1 499_0402_1%
1 C1093
HDMI@ 0.1U_0402_16V4Z
2
HDMI_TX2-_CONN 2 R264 1 499_0402_1% HDMI@
HDMI@ HDMI@
R430 R431 2
1
D 2K_0402_5% 2K_0402_5%
+5VS 2 Q42
1
G 2N7002K_SOT23-3
1
B HDMI@ B
S
3
@
R970
100K_0402_5% JHDMI1
NEAR CONNECTOR HDMI_HPD 19
2
R451 HDMI@ HP_DET

18
0_0402_5% +5V
17 DDC/CEC_GND
2 1 HDMICLK_R HDMIDAT_R 16
<5> HDMI_CLK SDA
HDMICLK_R 15 SCL
14
R452 HDMI@ Reserved
13 CEC
0_0402_5% HDMI_CLK-_CONN 12 20
HDMIDAT_R CK- GND
<5> HDMI_DATA 2 1 11 CK_shield GND 21
HDMI_CLK+_CONN 10 22
HDMI_TX0-_CONN CK+ GND
9 D0- GND 23
R450 HDMI@ 8
0_0402_5% HDMI_TX0+_CONN D0_shield
7 D0+
2 1 HDMI_HPD HDMI_TX1-_CONN 6
<5> HDMI_DET D1-
5 D1_shield
1
HDMI_TX1+_CONN 4
HDMI@ HDMI_TX2-_CONN D1+
3 D2-
R974 2
100K_0402_5% HDMI_TX2+_CONN D2_shield
1 D2+
2
SUYIN_100042GR019M23DZL
ME@
A A

HDMI Connector
Custom 0.1
LA8681P
5 4 3 2 1
A B C D E
FCM1608CF-121T03 0603
1 DAC_RED 1 2 RED 1
<5> DAC_RED
L36
FCM1608CF-121T03 0603
DAC_GRN 1 2 GREEN
<5> DAC_GRN
L37
FCM1608CF-121T03 0603 D2107 @
DAC_BLU 1 2 BLUE BLUE 6 3 GREEN
<5> DAC_BLU I/O4 I/O2
L38
1
+5VS
1 1 1 1 1 1
R975 R976 R977 C1094 C1103 C1104 C1105 C1106 C1107 5 2
150_0402_1% 150_0402_1% 150_0402_1% 10P_0402_50V8J 10P_0402_50V8J VDD GND
2 2 2 2 2 2
2
2
10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J 4 1 RED
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
D2108 @
CRT_DDC_DATA_R 6 3 JVGA_HS
I/O4 I/O2
+CRT_VCC +5VS
R978
1 2 5 VDD GND 2
1
C1108 1K_0402_5%
0.1U_0402_16V4Z CRT_DDC_CLK_R 4 1 JVGA_VS
2 2 I/O3 I/O1 2
5
OE#
P
2 4 CRT_HSYNC_1 1 2 JVGA_HS
<5> CRT_HSYNC A Y L39
G
U23 FCM1608CF-121T03 0603

SN74AHCT1G125DCKR_SC70-5 1
3
@
C1120
10P_0402_50V8J
+CRT_VCC 2
R979
1 2
1
C1109 1K_0402_5%
0.1U_0402_16V4Z
2
5
1
OE#
P
2 4 CRT_VSYNC_1 1 2 JVGA_VS
<5> CRT_VSYNC A Y L40
G
U24 FCM1608CF-121T03 0603 1

SN74AHCT1G125DCKR_SC70-5 @
3
C1110 +CRT_VCC
10P_0402_50V8J +5VS
2 D14
F2
2 1 1 2
3
1 3
RB491D_SC59-3
+CRT_VCC 1.1A_6V_SMD1812P110TF C568
0.1U_0402_16V4Z
2
1
R980 R981
4.7K_0402_5% 4.7K_0402_5%
JCRT1
2
6
11
RED 1
7
<5> CRT_DDC_DATA R104 1 2 0_0402_5% CRT_DDC_DATA_R CRT_DDC_DATA_R 12
GREEN 2
8 G 16
JVGA_HS 13 17
BLUE G
3
9
JVGA_VS 14
4
<5> CRT_DDC_CLK R109 1 2 0_0402_5% CRT_DDC_CLK_R 10
CRT_DDC_CLK_R 15
1 1 5
@ @ 1
C1112 C1121 C1122 CONTE_80431-5K1-152
100P_0402_50V8J 68P_0402_50V8K ME@
2 2 100P_0402_50V8J
4 2 4

CRT Connector
Custom 0.1
LA8681P
Date: W ednesday, November 30, 2011 Sheet 24 of 48
A B C D E
5 4 3 2 1
Layout Notice : Place as close

chip as possible.
+3VALW +3V_LAN
J3
1 1 2 2
D D
+LAN_VDD10 JUMP_43X79
@
U44 8105@ L76 AO3413_SOT23
+LAN_REGOUT 1 2
D
2.2UH +-5% NLC252018T-2R2J-N 3 1
R145
2
Layout Note: L39 must be @ Q150 @
G
2
RTL8105E-VL-CGT within 200mil to Pin36, C1125 C738 2 1
C700,C738 must be within <30> LAN_PWR_ON#
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 2
1
200mil to LL1 X5R
+LAN_REGOUT: Width 10K_0402_5% C1021
=60mil
0.1U_0402_16V7K
U41 1
@
C1126 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P0 22 31 Layout Notice : Place as close
<10> PCIE_FRX_DTX_P0 HSOP LED3/EEDO
37 LAN_LINK# 11/08 Increase for LAN S5 power saving
C1127 1 PCIE_PRX_C_DTX_N0 LED1/EESK LAN_ACTIVITY#
LAN_LINK# <26> chip as possible.
<10> PCIE_FRX_DTX_N0 2 0.1U_0402_16V7K 23 HSON LED0 40 LAN_ACTIVITY# <26>
Rising time (10%~90%)1mS <Rising time <100mS
17 30 R571 2 1 10K_0402_5% +LAN_VDD10 +LAN_EVDD10
<10> PCIE_FTX_C_DRX_P0 HSIP EECS
18 32 R573 2 1 10K_0402_5%
<10> PCIE_FTX_C_DRX_N0 HSIN EEDI
2 1 Close to Pin 12,27,39,42,47,48
0_0603_5% L48
2
16 1 MDI0+
<12> LAN_CLKREQ# CLKREQB MDIP0 MDI0+ <26>
2 MDI0- C732 C695
MDIN0 MDI0- <26> +3V_LAN
25 4 MDI1+ 1U_0402_6.3V4Z 0.1U_0402_16V4Z
<10,30> PLT_RST# MDI1+ <26>
1
PERSTB MDIP1 MDI1-
MDIN1 5 MDI1- <26>
19 7 MDI2+
<10> CLK_PCIE_LAN REFCLK_P NC/MDIP2 MDI2+ <26>
20 8 MDI2- Close to Pin 21 1 2
<10> CLK_PCIE_LAN# REFCLK_N NC/MDIN2 MDI2- <26>
C 10 MDI3+ 0.1U_0402_16V4Z C745 C
NC/MDIP3 MDI3+ <26>
11 MDI3- 1 2
Pin 16 and Pin 28 are OD pins NC/MDIN3 MDI3- <26>
LAN_XTALI 43 0.1U_0402_16V4Z C1128
CKXTAL1
1 2
LAN_XTALO 44 13 0.1U_0402_16V4Z C742
CKXTAL2 DVDD10 +LAN_VDD10
DVDD10 29 1 2
41 GIGA@ 0.1U_0402_16V4Z C1129
PCIE_WAKE#_R DVDD10 +3V_LAN +LAN_VDDREG
<30> LAN_WAKE# 1 R1370 2 0_0402_5% 28 LANW AKEB 1 2
<12,29> FCH_PCIE_WAKE# 1 R1369 2 0_0402_5% GIGA@ 0.1U_0402_16V4Z C731
@ ISOLATEB 26 27 2 1 1 2
ISOLATEB DVDD33 +3V_LAN
39 0_0603_5% L77 GIGA@ 0.1U_0402_16V4Z C1130
DVDD33
2
14 12 +3V_LAN C1131 C1132
GIGA@ 2 R569 NC/SMBCLK AVDD33
1 10K_0402_5% 15 42 4.7U_0603_6.3V6K 0.1U_0402_16V4Z
1
+3V_LAN GIGA@ 1 R577 NC/SMBDATA AVDD33
+3V_LAN 2 1K_0402_5% 38 GPO/SMBALERT AVDD33 47 X5R
AVDD33 48
ENSWREG 33 ENSW REG
1
EVDD10 21 +LAN_EVDD10
R570 +LAN_VDDREG 34 VDDREG Close to Pin 3,6,9,13,29,41,45
10K_0402_5% 35 VDDREG AVDD10 3 +LAN_VDD10
6 +LAN_VDD10
@ AVDD10
9
2
AVDD10 +3VS +3V_LAN

1 2 46 RSET AVDD10 45 1 2
R575 2.49K_0402_1% 0.1U_0402_16V4Z C737
LAN_CLKREQ# 24 36 +LAN_REGOUT 1 2
GND REGOUT
1
49 0.1U_0402_16V4Z C1133
PGND R576 R572 1 2
1K_0402_1% 0_0402_5% 0.1U_0402_16V4Z C694
RTL8111F-CGT_QFN48_6x6 1 2
B B
GIGA@ GIGA@ 0.1U_0402_16V4Z C743
2
ISOLATEB ENSWREG 1 2
GIGA@ 0.1U_0402_16V4Z C741
SA00004Y700 1 2
R574 GIGA@ 0.1U_0402_16V4Z C739
R578 0_0402_5% 1 2
15K_0402_5% @ GIGA@ 0.1U_0402_16V4Z C740
LAN_XTALI
Y6 LAN_XTALO H: Enable internal Regular

4 3
NC OSC L: Disable
1 OSC NC 2
27P_0402_50V8J
27P_0402_50V8J
1 25MHZ_20PF_FSX3M-25.M20FDO 1
C1134
C1135
R02
2 2
A A

LAN-RTL8111F/8105E
Custom 0.1
LA-7984P
5 4 3 2 1
5 4 3 2 1
MDI3-
MDI3+
T2
MDI3+ 1 16 MDO3+
<25> MDI3+ TD+ TX+
MDI3- MDO3-
10
<25> MDI3- 2 TD- TX- 15
6
7
8
9
3 14 MCT3 1 2
D CT CT R1374 75_0603_5% D
4 13
6
7
8
9
10
NC NC
11 GND 5 NC NC 12 GIGA@
6 11 MCT2 1 2
RCLAMP3304N.TCT_SLP2626P10-10 MDI2+ CT CT MDO2+ R1375 75_0603_5%
<25> MDI2+ 7 RD+ RX+ 10
D69 @
5
4
3
2
1
MDI2- 8 9 MDO2- GIGA@
5 <25> MDI2- RD- RX-
4
3
2
1
BOTHHAND_NS0013LF
GIGA@
MDI2-
R02 1 2
MDI2+
T1 C973
1000P_1206_2KV7K
Place Close to T2 MDI0+ 1 16 MDO0+
<25> MDI0+ TD+ TX+
MDI1- MDI0- 2 15 MDO0-
<25> MDI0- TD- TX-
3 14 MCT0 1 R1376 2
CT CT 75_0603_5%
4 NC NC 13
MDI1+ 5 12
NC NC MCT1
1 6 CT CT 11 1 R1377 2
MDI1+ 7 10 MDO1+ 75_0603_5%
<25> MDI1+ RD+ RX+
C1136 MDI1- 8 9 MDO1-
<25> MDI1- RD- RX-
0.01U_0402_16V7K
10
6
7
8
9
2
C C
BOTHHAND_NS0013LF
6
7
8
9
10
11 GND
RCLAMP3304N.TCT_SLP2626P10-10
D68 @
5
4
3
2
1
5
4
3
2
1
Reserve gas tube for EMI go rural solution

MDI0-
Place Close to T1,T2
MDI0+
Place Close to T1 JRJ1
LAN_LINK# R1449 2 1 510_0402_5% 9
<25> LAN_LINK# Green LED- MCT3
+3V_LAN 10 Green LED+ MCT2
1 MDO0+ 1 PR1+ MCT1
C1137 @ MDO0- 2
470P_0402_50V7K PR1- MCT0
2 MDO1+ 3 PR2+
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
LSE-200NX3216TRLF_1206-2
B MDO2+ 4 B
PR3+
2
MDO2- 5 PR3-
DL1
DL2
DL3
DL4
MDO1- 6 PR2-
MDO3+ 7 14 @ @ @ @
PR4+ G2
Overclocking mode stick
1
MDO3- 8 13
PR4- G1
LAN_ACTIVITY# R1448 2 1 510_0402_5% 11
<25> LAN_ACTIVITY# Yellow LED-
+3V_LAN 12 Yellow LED+

1 SANTA_130452-D ME@
@
C1138
470P_0402_50V7K
2 Reserve for EMI go rural solution
A A

LAN_Transformer
B 0.1
LA-7984P
5 4 3 2 1
5 4 3 2 1
+3VS
CX20671
High Definition Audio Codec SoC
1
HDA_RST_AUDIO#
With Integrated Class-D Stereo
HDA_SYNC_AUDIO
EMI R837 @
4.7K_0402_5%
Amplifier.
HDA_SDOUT_AUDIO
An integrated 5 V to 3.3 V Low-dropout
2
voltage regulator (LDO). 1 R838
0_0402_5%
2 HDA_BITCLK_AUDIO HDA_RST_AUDIO#
An integrated 3.3 V to 1.8V Low-dropout @

C990 @
1
1 1 1 1
voltage regulator (LDO).
C987
C988
C989
C991
100P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
2
D 2 2 2 2 D
@ @ @ @
ESD Reserve
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
1 1 1
C978
C979
C980
+LDO_OUT_3.3V
+3VS 2 2 2
1U_0603_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
@ 1 1 1 1 AVDD_3.3 pinis output of
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
C983
C984
C985
C986
1 1 internal LDO. NOT connect
C981
C982
to external supply.
2 2 2 2
2 2
Layout Note:Path from +5VS to LPWR_5.0
RPWR_5.0 must be very low
resistance (<0.01 ohms)
R839 0_0402_5%
+3VS 1 2
1U_0603_10V4Z
0.1U_0402_16V4Z
+5VS
+3VALW 1R840 @ 2 0_0402_5% 1 1
C992
C993
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
+5VS
1 1 Sense resistors must be
C994
C995
10 mils connected same power
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2
1 1 1 1 that is used for VAUX_3.3
C996
C999
C1000
C1001
@
10U_0603_6.3V6M
0.1U_0402_16V4Z
2 2
1 1
C997
C998
@ @
2 2 2 2 R996 1 2 5.11K_0402_1% +3VS
C Port B C
0.1U_0402_16V4Z
2 2 SENSE_A R997 2 20K_0402_1% MIC_JD Port A
18
29
27
28
26
1 1
3
7
2
U45
C1002
R998 1 2 39.2K_0402_1% PLUG_IN_R
FILT_1.8
VAUX_3.3
DVDD_3.3
FILT_1.65
AVDD_3.3
VDD_IO
AVDD_5V
AVDD_HP
@ Please bypass caps very close to device.
12 2
LPWR_5.0 +MICBIASB
15
HDA_RST_AUDIO# RPWR_5.0 AN@ AN@
<12> HDA_RST_AUDIO# 9 17
RESET# CLASS-D_REF R999 2K_0402_5% R1000 4.7K_0402_5%
HDA_BITCLK_AUDIO 5 2 1 2 1
<12> HDA_BITCLK_AUDIO BIT_CLK
HDA_SYNC_AUDIO 8 36 SENSE_A R1001 0_0402_5%
<12> HDA_SYNC_AUDIO SYNC SENSE_A
R841 1 2 33_0402_5% 6 1 2 2.2U_0603_6.3V4Z @
<12> HDA_SDIN0
HDA_SDOUT_AUDIO 4
SDATA_IN R1000 & R700 for App & Nokia combo ear phone un-pop
<12> HDA_SDOUT_AUDIO SDATA_OUT
35 C1003 1 2 R1002 100_0402_1% EXT_MIC
PORTB_R EXT_MIC <32>
34 C1004 1 2
PORTB_L
PC_BEEP B_BIAS
33 +MICBIASB
2.2U_0603_6.3V4Z
External MIC
10
PC_BEEP
32 +MICBIASC
C_BIAS MIC_INR
31
PORTC_R MIC_INL
<32> CX_GPIO0
0_0402_5% @ CX_GPIO0 PORTC_L
30 Internal MIC
<30> EAPD 1 2 R1003 38
GPIO0/EAPD#
<30> EC_MUTE# 2 1 37
0_0402_5% R850 GPIO1/SPK_MUTE# R1005 15_0402_5%
23 1 2 HP_OUTR <32>
PORTA_R R1006 15_0402_5%
EAPD active low PORTA_L
22 1 2 HP_OUTL <32> Headphone
0=power down ex AMP 40
DMIC_CLK
1=power up ex AMP 1
DMIC_1/2 NC
24 Changed from 5.1ohm to 15ohm
25 for "zi zi"noise.
NC
39
SPK_L2+ NC
11
SPK_L1- LEFT+
13
LEFT-
Internal SPEAKER AVEE
21
19
SPK_R2+ FLY_P
16 20 1 2
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
SPK_R1- RIGHT+ FLY_N C1005 1U_0603_10V4Z
14 1 1
RIGHT-
C1006
C1007
Short GND and GNDA on
GND
B GND1 & GND2 on layout

@
2 2
Combo Jack detect (normal close) B
R853 @ CX20671-21Z_QFN40_6X6 MIC_JD

41
1 2
R861 @ 0_0402_5%
1 2
R863 @ 0_0402_5%
1
Q107 D 33K_0402_5%
1 2
R867 @ 0_0402_5% LBSS138LT1G_SOT-23-3 2 R854 1 2 EXT_MIC
1 2 G
1
0_0402_5% S
3
C1008 +5VS PLUG_IN_R
1
1U_0402_6.3V6K
2
R855
PLUG_IN_R 10K_0402_5%
GND GNDA
1
D
2
R856 2 Q108
R857 47K_0402_5% <32> PLUG_IN 20K_0402_5% G 2N7002_SOT23
Place colose to Codec chip CX_GPIO0 1 2 S
3
1 @
C1011
PC Beep @
0.1U_0402_16V4Z
C1009 1 2 2
EC Beep <30> BEEP#
0.1U_0402_16V4Z +MICBIASC
R858
C1010 PC_BEEP1 PC_BEEP
ICH Beep <12> FCH_SPKR 1 2 1 2
1
33_0402_5%
0.1U_0402_16V4Z R860
close to Codec
1
2.2K_0402_5% JSPK1
@ SPK_R1- L70 1 2 FBMA-L11-160808-121LMT_0603 SPK_R1-_CONN 1
R859 SPK_R2+ L71 FBMA-L11-160808-121LMT_0603 SPK_R2+_CONN 1
1 2 2
2
10K_0402_5% MIC1 SPK_L1- L72 FBMA-L11-160808-121LMT_0603 SPK_L1-_CONN 2

1 2 3
C1012 1 3
1 2 2.2U_0603_6.3V4Z MIC_INR SPK_L2+ L73 1 2 FBMA-L11-160808-121LMT_0603 SPK_L2+_CONN 4
2
GNDA 4
2
1 1 MIC_INL 5
wide 30MIL GND1
2
A WM-64PCY_2P 6 A
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
220P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45@ GND2
1 1 1 1
C1013
C1014
C1015
C1016
ACES_88231-04001
2 2 @ ME@
C1017
C1018
2 2 2 2 @ D41 D42 @
1
TVNST52302AB0 C/C SOT523 TVNST52302AB0 C/C SOT523
@ @
@ @ @

CX20671 Codec
Custom 0.1
LA8681P
5 4 3 2 1
A B C D E F G H
HDD CONN BT MODULE CONN

JHDD1
1 GND
C161 1 2 0.01U_0402_16V7K SATA_FTX_DRX_P0 2
<11> SATA_FTX_C_DRX_P0 SATA_FTX_DRX_N0 RX+
C162 1 2 0.01U_0402_16V7K 3
<11> SATA_FTX_C_DRX_N0 RX-
4 GND
C1075 1 2 0.01U_0402_16V7K SATA_FRX_DTX_N0 5
<11> SATA_FRX_C_DTX_N0 C1074 1 SATA_FRX_DTX_P0 TX-
2 0.01U_0402_16V7K 6 TX+
<11> SATA_FRX_C_DTX_P0
7 GND
1 BT@ BT@ 1
R814 C929
100K_0402_5% 0.1U_0402_16V4Z
+5VS +5VS_HDD 1 2 1 2
<11> BT_ON#
8
@ J10 3.3V +3VS_BT
+3VS 9
3.3V
1 2 10
1 2 3.3V +3VS
11
GND
JUMP_43X79
12
GND
0_0603_5% 30mils
13 R815 BT@
GND
D
14 3 1 +3VS_BT_R 2 1
5V
+5VS_HDD 15 1
5V Q81 0.1U_0402_16V4Z
16
5V PMV65XP_SOT23-3~D C930
G
17
2
GND BT@ BT@
18
Reserved 2
19
+5VS_HDD +3VS GND JBT1
20 23
12V GND
21 24 1
12V GND 1
22 2
12V 2
1 1 1 1 1 <12> USB20_P6 3
@ SUYIN_127043FB022G278ZR 3
<12> USB20_N6 4
4
C1076 C616 C617 C1079 C620 ME@ BTON_LED:NC 5
5 G1
7
1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0603_10V6K 10U_0603_6.3V6M 0.1U_0402_16V4Z <29> BT_ACTIVE 6 8
2 2 2 2 2 6 G2
ACES_87213-0600G
ME@
2
ODD CONN 15'' 2
JODD1
15@ 1
C969 1 0.01U_0402_16V7K SATA_FTX_DRX_P1_15 1
<11> SATA_FTX_C_DRX_P1 2 2
C968 1 0.01U_0402_16V7K SATA_FTX_DRX_N1_15 2
<11> SATA_FTX_C_DRX_N1 2 3
3
15@ 4
4 short J12, no zero power ODD function
C934 1 15@2 0.01U_0402_16V7K SATA_FRX_DTX_N1_15 5
<11> SATA_FRX_C_DTX_N1 C935 1 0.01U_0402_16V7K SATA_FRX_DTX_P1_15 5
<11> SATA_FRX_C_DTX_P1 2 6
6
@ R819 1 15@ 2 0_0402_5% ODD_DETECT# 7 @ J12
+5V_ODD 7
8 1 2
R873 1 @ 8 1 2
2 0_0402_5% 9
9
<12> ODD_DETECT# R820 1 ODD_DA#_R +5V_ODD
2 0_0402_5% 10
<30> ODD_DA# @ 10 +5VS JUMP_43X79
11
R821 1 GND
+3VS 2 10K_0402_5% 12
GND
D
@ 3 1
1 1
1
@ Q46 2N7002_SOT23 ACES_87056-01001-001 Q82
@ PMV65XP_SOT23-3~D C936 C932
G
2
1 3 R817 @ 10U_0603_6.3V6M 0.1U_0402_16V4Z
D
<12> ODD_DA#_FCH ME@ 10K_0402_5% 2 2

@
2
1 R818 2
G
2
100K_0402_5%
1
+3VS 1
@
OUT
3 C937 3
0.01U_0402_16V7K
2 2
<11> ODD_EN IN
ODD CONN 14''
GND
Q83
DTC124EKAT146_SC59-3
3
@
JODD2 ME@
14@ 1
SATA_FTX_C_DRX_P1 C967 1 0.01U_0402_16V7K SATA_FTX_DRX_P1_14 GND
2 2 RX+
SATA_FTX_C_DRX_N1 C966 1 2 0.01U_0402_16V7K SATA_FTX_DRX_N1_14 3
14@ RX-
4 GND
SATA_FRX_C_DTX_N1 C965 1 14@2 0.01U_0402_16V7K SATA_FRX_DTX_N1_14 5
SATA_FRX_C_DTX_P1 C964 1 0.01U_0402_16V7K SATA_FRX_DTX_P1_14 TX-
2 6 TX+
14@ 7
GND
ODD_DETECT# 8
+5V_ODD DP
9 +5V
10
ODD_DA#_R +5V
11 MD
12 14
GND GND1
13 GND GND2 15
TYCO_2-1759838-8~D
4 4

HDD/ODD/BT
B 0.1
LA8681P
A B C D E F G H
A B C D E
Mini-Express Card for WLAN/WiMAX(Half)

+1.5VS +3VS_WLAN +1.5VS
+3VS +3VS_WLAN
J5 1 1 1 1
1
@ @ @
1 2 J6 C1081 C1023 C1036 C1037
1
1 2 4.7U_0603_6.3V6K
<12,25> FCH_PCIE_WAKE# R480 1 2 0_0402_5% WLAN_WAKE# JUMP_43X79 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
@
JUMP_43X79
2
<28> BT_ACTIVE R481 1 @ 2 0_0402_5%
@
JWLN1
2
1 2
1 WAKE# 3.3V 1
3 4
R525 1 NC GND +1.5VS_WLAN
<11> BT_DISABLE# 2 0_0402_5% 5 6
NC 1.5V LPC_FRAME#_R
<12> WLAN_CLKREQ# 7 8
CLKREQ# NC LPC_AD3_R
9 10
GND NC LPC_AD2_R
<10> CLK_PCIE_WLAN# 11 12
REFCLK- NC LPC_AD1_R
<10> CLK_PCIE_WLAN 13 14
REFCLK+ NC LPC_AD0_R
15 16
PCI_RST#_R GND NC
17 18
CLK_PCI_DB NC GND
19 20 WL_OFF# <11>
NC NC
21 22 APU_PCIE_RST# <10,15>
GND PERST# R484 1 @ 0_0402_5%
<10> PCIE_FRX_DTX_N1 23 24 2 +3VALW
PERn0 +3.3Vaux R485 1 0_0402_5%
<10> PCIE_FRX_DTX_P1 25 26 2 +3VS_WLAN
PERp0 GND
27 28
GND +1.5V R486 1
29 30 2 @ 0_0402_5% FCH_SMCLK0 <8,9,12>
GND SMB_CLK R487 1
<10> PCIE_FTX_C_DRX_N1 31 32 2 @ 0_0402_5% FCH_SMDAT0 <8,9,12>
PETn0 SMB_DATA
<10> PCIE_FTX_C_DRX_P1 33 34
PETp0 GND
35 36 USB20_N2 <12>
+3VS_WLAN GND USB_D-
37 38 USB20_P2 <12>
NC USB_D+
39 40
NC GND
41 42
NC LED_WWAN#
43 44
100_0402_1% NC LED_WLAN#
45 46
R490 NC LED_WPAN#
47 48
NC +1.5V
<30,31> EC_TX_P80_DATA 1 2 49 50
NC GND
<30,31> EC_RX_P80_CLK 1 2 51 52
R491 NC +3.3V
100_0402_1% 53 54
GND GND
TAITW_PFPET0-AFGLBG1ZZ4N0
2
For EC to detect ME@
R492
debug card insert. 100K_0402_5%
1
2 2
Reserve for SW mini-pcie debug card.

Series resistors closed to KBC side.
LPC_FRAME#_R R493 1 @ 2 0_0402_5% LPC_FRAME#
LPC_FRAME# <10,30>
LPC_AD3_R R494 1 @ 2 0_0402_5% LPC_AD3
LPC_AD3 <10,30>
LPC_AD2_R R495 1 @ 2 0_0402_5% LPC_AD2
LPC_AD2 <10,30>
LPC_AD1_R R496 1 @ 2 0_0402_5% LPC_AD1
LPC_AD1 <10,30>
LPC_AD0_R R497 1 @ 2 0_0402_5% LPC_AD0
LPC_AD0 <10,30>
PCI_RST#_R R498 1 @ 2 0_0402_5% APU_PCIE_RST#
CLK_PCI_DB CLK_PCI_DB <10>
3 3
Close U33
REMOTE1+ +3VS
Fintek thermal sensor REMOTE1+
Close to DDR
1
1
1
1
C782
2200P_0402_50V7K +3VS placed near by VRAM R674 C783
@
2
C
Q72
2 REMOTE1- 100P_0402_50V8J B MMST3904-7-F_SOT323-3
10K_0402_5%
@ 2 E
3
U33 REMOTE1-
2
REMOTE2+ 1 10 EC_SMB_CK2 <5,16,30>

VDD SMCLK
1
@ REMOTE1+ 2 9 EC_SMB_DA2 <5,16,30>
C784 DP1 SMDATA
2200P_0402_50V7K
2
REMOTE1- 3 8 REMOTE2+
Under WLAN
2 REMOTE2- C785 DN1 ALERT#
1
1
0.1U_0402_16V4Z REMOTE2+ 4 7 @ C
1 DP2 THERM# C786 Q73 @
2
REMOTE2- 5 6 100P_0402_50V8J B MMST3904-7-F_SOT323-3
DN2 GND 2 E
3
REMOTE2-
EMC1403-2-AIZL-TR_MSOP10
Address 1001_101xb REMOTE1,2+/-:

Trace width/space:10/10 mil
Change from SA000029210 to SA000046C00 for main source Trace length:<8"
4 4

Mini PCIE/Thermal IC
0.1
LA8681P
A B C D E
+3VALW
+EC_AVCC +5VS
+3VLP
1 1 1 1 1 1
0.1U_0402_16V4Z
C1038
0.1U_0402_16V4Z
C1039
0.1U_0402_16V4Z
C1040
0.1U_0402_16V4Z
C1041
1000P_0402_50V7K
C1095
1000P_0402_50V7K
C1096
L45 1 2 TP_CLK R499 1 2 4.7K_0402_5%
+3VALW +EC_AVCC
FBM-11-160808-601-T_0603 2 1
TP_DATA R500 1 2 4.7K_0402_5%
C1042 2 2 2 2 2 2
0.1U_0402_16V4Z C1113
111
125
1000P_0402_50V7K U31
22
33
96
67
9
1 2 1 ECAGND 2
L46 FBM-11-160808-601-T_0603 BATT_TEMP 1 2
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
C1114 100P_0402_50V8J
ACIN 1 2
C1115 100P_0402_50V8J
1 GATEA20/GPIO00 GPIO0F 21
<12> GATEA20 BEEP#
<12> KBRST# 2 KBRST#/GPIO01 BEEP#/GPIO10 23 BEEP# <27>
<10> SERIRQ 3 SERIRQ GPIO12 26 NOVO# <32>
4 27 ACOFF
<10,29> LPC_FRAME# LPC_AD3 LPC_FRAME# ACOFF/GPIO13 ACOFF <38>
5 +5VALW
<10,29> LPC_AD3 LPC_AD2 LPC_AD3
<10,29> LPC_AD2 7
LPC_AD2 PWM Output
LPC_AD1 8 63 BATT_TEMP
<10,29> LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP <37>
@ LPC_AD0 10 LPC & MISC 64 USB_ON# R504 1 2 10K_0402_5%
<10,29> LPC_AD0 LPC_AD0 GPIO39
2 1 2 @ 1 65
ADP_I/GPIO3A ADP_I <37,38>
C1116 22P_0402_50V8J R501 10_0402_5% 12 AD Input 66
<10,14> CLK_PCI_EC CLK_PCI_EC GPIO3B
13 75 BRDID +3VALW
<10,25> PLT_RST# PCIRST#/GPIO05 GPIO42
1 2 EC_RST# 37 76 Ra
+3VALW EC_RST# IMON/GPIO43 T59
R502 47K_0402_5% EC_SCI# 20
<12> EC_SCI# EC_SCII#/GPIO0E BRDID
2 38 R505 1 2 100K_0402_5%
<37> BATT_LEN# GPIO1D
68
C1117 DAC_BRIG/GPIO3C R506 1
70 2 33K_0402_5%
0.1U_0402_16V4Z EN_DFAN1/GPIO3D
1
DA Output IREF/GPIO3E
71
KSI0 55 72 +3VALW Rb
KSI1 KSI0/GPIO30 CHGVADJ/GPIO3F
56
KSI2 KSI1/GPIO31 EC_MUTE# R503 1 10K_0402_5%
57 2
KSI3 KSI2/GPIO32
58 83 EC_MUTE# <27>
KSI4 KSI3/GPIO33 EC_MUTE#/GPIO4A USB_ON#
59
KSI4/GPIO34 USB_EN#/GPIO4B
84 USB_ON# <32,33,34> ID BRD ID Ra Rb Vab
KSI5 60 85 INT#
KSI6 KSI5/GPIO35 CAP_INT#/GPIO4C
61
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D
86 EAPD <27>
KSO[0..17] KSI7 62 87 TP_CLK 0 R10 MP x 0 0V
<32> KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <32>
KSO0 39 88 TP_DATA
KSI[0..7] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <32>
KSO1 40
<32> KSI[0..7] KSO2 KSO1/GPIO21
41
KSO2/GPIO22 1 R03 PVT 100K 8.2K 0.25V
KSO3 42 97
KSO4 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 VGATE <44>
43 98
KSO5 KSO4/GPIO24 WOL_EN/GPXIOA01
KSO5/GPIO25 Int. K/B 2 R02 DVT 100K 18K 0.5V
44 99 T60
KSO6 HDA_SDO/GPXIOA02
45 109
KSO7 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 NTC_V <37>
46
KSO7/GPIO27 SPI Device Interface
KSO8 47 3 R01 EVT 100K 33K 0.82V
KSO9 KSO8/GPIO28
48 119
KSO10 KSO9/GPIO29 SPIDI/GPIO5B
49 120
KSO11 KSO10/GPIO2A SPIDO/GPIO5C
50
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
126
KSO12 51 128
+3VALW KSO13 KSO12/GPIO2C SPICS#/GPIO5A +3VS
52
KSO14 KSO13/GPIO2D
53
KSO15 KSO14/GPIO2E ENBKL
54 73 ENBKL <22>
KSO15/GPIO2F ENBKL/GPIO40
1
@ R507 1 2 47K_0402_5% KSO1 KSO16 81
KSO16/GPIO48 PECI_KB930/GPIO41
74 RST#
KSO17 82 89
KSO17/GPIO49 FSTCHG/GPIO50 LAN_PWR_ON# <25>
@ R508 1 2 47K_0402_5% KSO2 BATT_CHG_LED#/GPIO52
90 BATT_CHG_LED# <32> 11/08 Increase for LAN S5 power saving R509
91 CAPS_LED# 10K_0402_5%
CAPS_LED#/GPIO53 CAPS_LED# <32>
EC_SMB_CK1 77 GPIO 92
2
<37,38> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_LED# <32> EC_TACH
<37,38> EC_SMB_DA1 78 93 BATT_LOW_LED# <32>
EC_SMB_CK2 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 SYSON
79 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56
95 SYSON <35,40>
EC_SMB_DA2 80 121 @ R1450
EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VSB_ON_R VR_ON <44> SUSP#
127 2 1 VSB_ON <37>
PM_SLP_S4#/GPIO59
1
0_0402_5% @
6 100 C1043
<12> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_LID_OUT# EC_RSMRST# <12>
14 101 @ 1000P_0402_50V7K
<12> PM_SLP_S5# EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 Turbo_V EC_LID_OUT# <12> 2
15 102 R757
<12> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 H_PROCHOT#_EC Turbo_V <37>
<22> CMOS_ON# 16 103 2 1 PROCHOT <37>
+3VS GPIO0A H_PROCHOT#_EC/GPXIOA06 0_0402_5%
17 104 MAINPWON <37,39>
GPIO0B VCOUT0_PH/GPXIOA07 BKOFF#
18
GPIO0C GPO BKOFF#/GPXIOA08
105 BKOFF# <22>
19 GPIO 106 PBTN_OUT#
<28> ODD_DA# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <12>
1
<22> EC_INVT_PWM 25 107

EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10
<31> EC_TACH 28 108 VGA_GATE# <12>
R512 EC_PME# FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
29 EC_PME#/GPIO15
10K_0402_5% EC_TX_P80_DATA 30
<29,31> EC_TX_P80_DATA EC_RX_P80_CLK EC_TX/GPIO16 ACIN
@ 31 110
2
EC_FAN_PWM <29,31> EC_RX_P80_CLK EC_RX/GPIO17 AC_IN/GPXIOD01 EC_ON ACIN <16,38>

<12,44> FCH_PWRGD 32 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 112 EC_ON <32,39> H_PROCHOT# <5,10,37>
<31> EC_FAN_PWM 34 114 ON/OFF <32>
SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 LID_SW#
36 NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 115 LID_SW# <32>
1
SUSP# D
SUSP#/GPXIOD05 116 SUSP# <35,40,41,43>
117 H_PROCHOT#_EC 2 Q109
GPXIOD06 G 2N7002H_SOT23-3
PECI_KB9012/GPXIOD07 118
AGND/AGND
T98 XCLKI 122 S +3VALW
3
+3VALW XCLKO XCLKI/GPIO5D V18R
GND/GND
GND/GND
GND/GND
GND/GND
<10,14> RTC_CLK 1 2 123 XCLKO/GPIO5E V18R 124

R513 0_0402_5% 1
2
GND0
R518 EC_SMB_CK1
2.2K_0402_5% C1118 R517
4.7U_0603_6.3V6K 10K_0402_5%
2
R519 EC_SMB_DA1 2
11
24
35
94
113
69
2.2K_0402_5% R516 C1119
1
100K_0402_5% 20P_0402_50V8 KB9012QF A3 LQFP 128P_14X14 1 2 EC_PME#
2
<25> LAN_WAKE#
ECAGND
R520 0_0402_5%
+3VS
1
POP for susclk implemented

20100810 JCAP1
1
R523 R524 RST# 1
2 2
2.2K_0402_5% 2.2K_0402_5% +3VS 3
EC_SMB_DA2 3
4 4
EC_SMB_CK2 5
EC_SMB_CK2 5
EC_SMB_CK2 <5,16,29> 6 6
EC_SMB_DA2 INT# 7
EC_SMB_DA2 <5,16,29> 7
1 1 +5VS 8
@ @ 8
C1123 C1124
100P_0402_50V8J 100P_0402_50V8J 9
2 2 GND1
10 GND2
ACES_50521-0084N-P01
ME@
For Cap sensor function

KB9012/Cap sensor
Custom 0.1
LA8681P
5 4 3 2 1
D D
FAN CONN
EC DEBUG PORT
+5VS
JFAN1 JECDP1
1 1 +3VALW 1 1
<30> EC_TACH 2 2 <29,30> EC_TX_P80_DATA 2 2
1 <30> EC_FAN_PW M 3 3 <29,30> EC_RX_P80_CLK 3 3
4 4 4 4
C1082 5
10U_0603_6.3V6M G5 ACES_85205-0400
6 G6
2
ME@
ACES_85205-04001
ME@
C C
CPU VGA_L VGA_R

H1 H2 H3
HOLEA HOLEA HOLEA H4 H5
HOLEA HOLEA FD1 FD2 FD3 FD4
1
H_3P8 H_3P8 H_3P8
H_3P3 H_3P3
A B
M/B
L

R
M/B
H6 H7 H8 H9 H10 H11 H12 H13 H14 H17
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA H15 H16 HOLEA
HOLEA HOLEA
B B
1
1
1
H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_3P0X4P0N H_3P0X4P0N H_3P0N
2P8 * 9 pcd E
A A

FAN/SCREW/EC Debug
B 0.1
LA8681P
5 4 3 2 1
ON/OFF switch KSI[0..7]
INT_KBD Conn. JKB1
KSI[0..7] <30> FOR 14"
KSI1 1
+3VLP +3VALW KSO[0..17] KSO16 C938 1 1
KSO[0..17] <30> 2 @ 100P_0402_50V8J KSI7 2 JKB2
KSI6 2
3 26
SW3 @ KSO17 C939 1 3 GND2
2 @ 100P_0402_50V8J KSO9 4 25
SMT1-05_4P KSI4 4 GND1
5
2
KSO2 C940 1 KSO1 KSI5 5 KSI1
1 3 2 @ 100P_0402_50V8J C941 1 2 @ 100P_0402_50V8J 6 24
KSO0 6 KSI7 24
7 23
Power Button 2 4 R701 R535 @ KSO15 C942 1 2 @ 100P_0402_50V8J KSO7 C943 1 2 @ 100P_0402_50V8J KSI2 8
7 KSI6 22
23
100K_0402_5% 100K_0402_5% KSI3 8 KSO9 22
9 21
KSO6 C944 1 KSI2 KSO5 9 KSI4 21
2 @ 100P_0402_50V8J C945 1 2 @ 100P_0402_50V8J 10 20
6
5
1
KSO1 10 KSI5 20
11 19
R720 KSO8 C946 1 11 19
2 @ 100P_0402_50V8J KSO5 C947 1 2 @ 100P_0402_50V8J KSI0 12 KSO0 18
TOP Side J13
KSO2 13
12 KSI2 17
18
KSO13 C948 1 13 17
1 2 1 2 2 @ 100P_0402_50V8J KSI3 C949 1 2 @ 100P_0402_50V8J KSO4 14 KSI3 16
0_0402_5% KSO7 14 KSO5 16
15 15
SHORT PADS KSO12 C950 1 KSO14 KSO8 15 KSO1 15
2 @ 100P_0402_50V8J C951 1 2 @ 100P_0402_50V8J 16 14
Bottom Side KSO6 17
16 KSI0 13
14
D24 @ KSO11 C952 1 KSI7 KSO3 17 KSO2 13
2 @ 100P_0402_50V8J C953 1 2 @ 100P_0402_50V8J 18 12
KSO12 18 KSO4 12
3 ON/OFF <30> 19 11
ON/OFFBTN# KSO10 C954 1 KSI6 KSO13 19 KSO7 11
1 2 @ 100P_0402_50V8J C955 1 2 @ 100P_0402_50V8J 20 10
KSO14 20 KSO8 10
2 51_ON# <36> 21 9
KSO3 C956 1 21 9
2 @ 100P_0402_50V8J KSI5 C957 1 2 @ 100P_0402_50V8J KSO11 22 KSO6 8
DAN202UT106_SC70-3 KSO10 22 KSO3 8
23 7
KSO4 C958 1 23 7
2 @ 100P_0402_50V8J KSI4 C959 1 2 @ 100P_0402_50V8J KSO15 24 KSO12 6
KSO16 24 KSO13 6
25 5
KSI0 C960 1 KSO9 KSO17 25 KSO14 5
2 @ 100P_0402_50V8J C961 1 2 @ 100P_0402_50V8J 26 4
26 KSO11 4
27 3
KSO0 C962 1 KSI1 27 KSO10 3
2 @ 100P_0402_50V8J C963 1 2 @ 100P_0402_50V8J 28 2
28 2
1
D KSO15
29 31 1
@ 29 GND 1
<30,39> EC_ON 2 30 32
Q106 30 GND ACES_88514-2401
G CONN PIN define need double check Reserve for ESD.
S 2N7002_SOT23-3 ACES_88514-3001 ME@
3
2
@ ME@
R641
10K_0402_5%
1
Power Button Board Conn. 8pin
+3VLP +3VALW
+5VALW
JPWRB1
2
ME@
R642
R532@ 100K_0402_5% 1
100K_0402_5% NOVO_BTN# 1
2
ON/OFFBTN# 2
3 5
1
D26 3 G1
4 6
NOVO# 4 G2
<30> NOVO# 2
2
1 NOVO_BTN# E-T_7182K-F04N-00R
3
R725
ON/OFF 10_0402_5% 2 D25 @
DAN202UT106_SC70-3
PJSOT24C 3P C/A SOT-23
51_ON# 1 2
1
R722 @
0_0402_5%
IO board USB port

FOR 14" +USB_VCCA
J14 @
+USB_VCCB Card Reader/Audio Jack SB CONN
+5VALW +USB_VCCB 2 1
2MM check BOM structure JCR1

White LED1 14@ 0.1U_0402_16V4Z U42 check U40 ! <27> HP_OUTR 1
AN@ 1
1 8 <27> HP_OUTL 2
PWR_LED# GND VOUT 2
<30> PWR_LED# 1 2 2 R644 1 14@ +5VALW C1020 2 7 +5VS 2 R894 1 0_0402_5% CR_GND 3
300_0402_5% VIN VOUT 3
2 1 3 6 <27> EXT_MIC 4
VIN VOUT 4
<30,33,34> USB_ON# 4 5 USB_OC2# <12> 2 R895 1 0_0402_5% <27> PLUG_IN 5
19-213A-T1D-CP2Q2HY-3T_WHITE EN FLG 5
+3VS 6
6
G547I2P81U_MSOP8 1 @ A@ <12> USB20_N1 2 R687 1 0_0402_5% USB20_N1_R 7
7
BATT_LOW_LED# Orange LED2 14@ C1019
<12> USB20_P1 2 R686 1 0_0402_5% USB20_P1_R 8
1000P_0402_50V7K 8
9
BATT_LOW_LED# CR_GND 9
<30> BATT_LOW_LED# 1 2 2 R764 1 14@ +3VALW 10
470_0402_5% 2 +USB_VCCB R534 10
<12> USB20_N5 2 1 0_0402_5% USB20_N5_R 11
11
2nd source SC500005910 S
<12> USB20_P5 2 R533 1 0_0402_5% USB20_P5_R 12
LED LTST-C191KFKT-5A 0603 ORANGE HT-191UD5_AMBER 12
13
13
EMI request 14
14
White LED5 14@ 2 R690AN@1 0_0402_5%
BATT_CHG_LED# L47 @ L57 @
<27> CX_GPIO0
2 R689AN@1 0_0402_5%
15
16
15
1 +MICBIASB 16
<30> BATT_CHG_LED# BATT_CHG_LED# 1 2 2 R765 1 14@ +5VALW USB20_N1 1 2 USB20_N1_R USB20_N5 1 2 USB20_N5_R 1 2 R699A@ 1 0_0402_5%
300_0402_5% 1 2 1 2 C734 + C733 A@ 1 0_0402_5%
2 17
220U_6.3V_M 470P_0402_50V7K R691 GND
18
19-213A-T1D-CP2Q2HY-3T_WHITE USB20_P1 USB20_P1_R USB20_P5 USB20_P5_R 6.3 * 5.9 GND
4 3 4 3
4 3 4 3 SF000001500 2 2 ACES_51524-0160N-001
White LED6 14@ WCM-2012-900T_4P WCM-2012-900T_4P ME@
<30> CAPS_LED# CAPS_LED# 1 2 2 R8 1 14@ +5VS

300_0402_5% reserve for EMI, which follow GIWG5/6
19-213A-T1D-CP2Q2HY-3T_WHITE
pin 6 5 4 3 2 1
+VCC_LID
FOR 15" 14 VDD CLK DAT L R GND To TP/B Conn.
+3VALW 2 1 1 R616 2
R615 100K_0402_5% 15 VDD CLK DAT GND L R +5VS 2 R889 1 0_0402_5%
0_0402_5% nonBBH@
LED B/D Conn BB-H VDD CLK DAT GND NC NC
+3VS 2 R890 1 0_0402_5% JTP1
2
JLED1 BB-L VDD CLK DAT GND L R BBH@ 8

GND
1 1 7
VDD
+5VALW 1 GND
14@ +3VALW 2
C716 2 C696 0.1U_0402_16V4Z
+5VS 3 6
0.1U_0402_16V4Z LID_SW# LID_SW# 3 TP_CLK 6
3 LID_SW# <30> 4 <30> TP_CLK 5
2 OUTPUT 4 TP_DATA 5
5 <30> TP_DATA 4
PWR_LED# 5 TP_3 4
6 1 1 3
GND
BATT_LOW_LED# 6 @ @ TP_2 3
2 7 2
14@ BATT_CHG_LED# 7 C697 C698 TP_1 2
8 1
Lid Switch C717 CAPS_LED# 9
8 100P_0402_50V8J 100P_0402_50V8J 1
1
10P_0402_50V8J SW_R 9 2 2 ACES_88058-060N

10
2
1 SW_L 10
C541
C540
U37 14@ 11 ME@
0.1U_0402_10V6K
0.1U_0402_10V6K
11
12 1 1
12 @ 15@
13
S-5711ACDL-M3T1S_SOT23-3 GND D15 TP_3
14 2 R643 1
GND PSOT24C_SOT23-3 0_0402_5% @ @
ACES_88058-120N 2 2
1
ME@ 2 R619 1 TP_1
0_0402_5%
L R628 nonBBH@
R R626 nonBBH@
14@
0_0402_5% 0_0402_5%
SW4 14@ 2 1 TP_2 SW5 14@ 2 1 TP_1
SMT1-05_4P SMT1-05_4P
5
6
5
6
R629 14@ R627 14@

4 2 0_0402_5% 4 2 0_0402_5%
SW_L 2 1 TP_3 SW_R 2 1 TP_2
3 1 3 1 Security Classification Compal Secret Data Compal Electronics, Inc.
2011/10/12 2013/10/12 Title
Issued Date Deciphered Date KBD/PWR/CR/LED/TP Conn.
C 0.1
LA8681P
A B C D E
1 1
+5VALW +USB_VCCA
@
U40
1 GND VOUT 8
C976 2 7
VIN VOUT
2 1 0.1U_0402_16V4Z 3 VIN VOUT 6
<30,32,34> USB_ON# 4 EN FLG 5 USB_OC1# <12>
@ G547I2P81U_MSOP8
1 @
C977
1000P_0402_50V7K
2
2 2
Right Ext.USB FFC Conn.
ME@
WCM-2012-900T_4P W=80mils ACES_88058-060N
USB20_P0 4 3 USB20_P0_R 1
4 3 1
2 2
R836 2 1 0_0402_5% USB20_P0_R 3
<12> USB20_P0 3
USB20_N0 1 2 USB20_N0_R R835 2 1 0_0402_5% USB20_N0_R 4
1 2 <12> USB20_N0 4
5 5
L69 6 6
2
Update to SM070001S00 for EMI request
3 7 GND 3
8 GND
JUSB4
PJDLC05_SOT23-3 D40 @
1
+USB_VCCA
+USB_VCCA
1
C974 1
+
220U_6.3V_M C975
470P_0402_50V7K
2 2
6.3 * 5.9
SF000001500
4 4

USB cable port
B 0.1
LA8681P
A B C D E
5 4 3 2 1
For EMI/ESD request
@ D23
D22
U3RXDN1 9 1U3RXDN1 @
U2DP1 3 6
U3RXDP1 8 I/O2 I/O4
2U3RXDP1
U3TXDN1 7 4U3TXDN1

D +5VALW W=80mils +USB3_VCCA +USB3_VCCA 2 5
D
GND VDD +5VALW
U3TXDP1 6 5U3TXDP1
C692 U39
0.1U_0402_16V7K 1 8 3
GND VOUT
470P_0402_50V7K
C748
C749
1 2 2 7 1 4 U2DN1
VIN VOUT 8 I/O1 I/O3
3 VIN VOUT 6 1
220U_6.3V_M
<30,32,33> USB_ON# 4 EN FLG 5 USB_OC0# <12> 1
+ AZC099-04S.R7G_SOT23-6
G547I2P81U_MSOP8 1 @ YSCLAMP0524P_SLP2510P8-10-9
C1024
1000P_0402_50V7K 2 2 @ D29
2A/Active Low D30
U3RXDN2 9 1U3RXDN2 @
2 3 6 U2DN2
U3RXDP2 8 I/O2 I/O4
2U3RXDP2
U3TXDN2 7 4U3TXDN2

2 GND VDD 5 +5VALW
U3TXDP2 6 5U3TXDP2
3
U2DP2 1 4
8 I/O1 I/O3
C C
YSCLAMP0524P_SLP2510P8-10-9
<12> USB30_N10 <12> USB30_N11
<12> USB30_P10 <12> USB30_P11
C847 1 2 U3TXDP1_L C848 1 2 U3TXDP2_L WCM-2012-900T_4P WCM-2012-900T_4P

<12> USB30_FTX_DRX_P0 <12> USB30_FTX_DRX_P1
0.1U_0402_16V7K 0.1U_0402_16V7K U3TXDN1_L 1 2 U3TXDN1 U3TXDN2_L 1 2 U3TXDN2
C849 1 U3TXDN1_L C850 1 U3TXDN2_L 1 2 1 2
<12> USB30_FTX_DRX_N0 2 <12> USB30_FTX_DRX_N1 2
0.1U_0402_16V7K 0.1U_0402_16V7K
U3TXDP1_L 4 3 U3TXDP1 U3TXDP2_L 4 3 U3TXDP2
<12> USB30_FRX_DTX_P0 <12> USB30_FRX_DTX_P1 4 3 4 3
L49 @ L53 @
<12> USB30_FRX_DTX_N0 <12> USB30_FRX_DTX_N1
WCM-2012-900T_4P WCM-2012-900T_4P
USB30_FRX_DTX_N0 1 2 U3RXDN1 USB30_FRX_DTX_N1 1 2 U3RXDN2
LP1 LP2 1 2 1 2
USB30_FRX_DTX_P0 4 3 U3RXDP1 USB30_FRX_DTX_P1 4 3 U3RXDP2

+USB3_VCCA +USB3_VCCA 4 3 4 3
W=80mils W=80mils L50 @ L54 @
B B
JUSB2 JUSB3 WCM-2012-900T_4P WCM-2012-900T_4P
U3TXDP1 9 U3TXDP2 9 USB30_N10 1 2 U2DN1 USB30_P11 1 2 U2DP2
SSTX+ SSTX+ 1 2 1 2
1 VBUS 1 VBUS
U3TXDN1 8 U3TXDN2 8
U2DP1 SSTX- U2DP2 SSTX- USB30_P10 4 U2DP1 USB30_N11 U2DN2
3 D+ 3 D+ 4 3 3 4 4 3 3
7 GND 7 GND
U2DN1 2 10 U2DN2 2 10 L51 @ L55 @
U3RXDP1 D- GND U3RXDP2 D- GND
6 SSRX+ GND 11 6 SSRX+ GND 11
4 GND GND 12 4 GND GND 12
U3RXDN1 5 13 U3RXDN2 5 13 U3TXDN1_L 1 R544 2 U3TXDN1 U3TXDN2_L 1 R631 2 U3TXDN2
SSRX- GND SSRX- GND 0_0402_5% 0_0402_5%
TAITW_PUBAU1-09FNLSCNN4H0 TAITW_PUBAU1-09FNLSCNN4H0 U3TXDP1_L 1 R545 2 U3TXDP1 U3TXDP2_L 1 R632 2 U3TXDP2
ME@ ME@ 0_0402_5% 0_0402_5%
USB30_FRX_DTX_N0 1 R546 2 U3RXDN1 USB30_FRX_DTX_N1 1 R633 2 U3RXDN2
0_0402_5% 0_0402_5%
USB30_FRX_DTX_P0 1 R547 2 U3RXDP1 USB30_FRX_DTX_P1 1 R634 2 U3RXDP2
0_0402_5% 0_0402_5%
USB30_P10 1 R550 2 U2DP1 USB30_P11 1 R635 2 U2DP2
0_0402_5% 0_0402_5%
USB30_N10 1 R551 2 U2DN1 USB30_N11 1 R636 2 U2DN2
0_0402_5% 0_0402_5%
A A

Left USB3.0
B 0.1
LA8681P
5 4 3 2 1
A B C D E
+5VALW TO +5VS +3VALW TO +3VS +1.5V to +1.5VS

+1.5V Q55 +1.5VS
+5VALW U34 +5VS +3VALW U35 +3VS 3 1

DMN3030LSS-13_SOP8L-8 DMN3030LSS-13_SOP8L-8 1 1 1
1
8 1 8 1
1 7 2 1 1 1 7 2 1 1 C699 AP2301GN-HF_SOT23-3 C700 C701
1
6 3 6 3 10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0603_10V6K R581
2
C702 C703 C704 C705 C706 C707 2 2 2 470_0603_5%
5 5
10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0603_10V6K R582 10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0603_10V6K R583 @
2
1 2 2 2 2 2 2 1
470_0603_5% 470_0603_5%
4
@ @
1 2
1 2
1
+VSB +VSB +5VALW D
D D
2 SUSP
1
2 SUSP 2 SUSP G
1
G G S Q58
3
S Q56 R585 S Q57 2N7002_SOT23
3
R584 2N7002_SOT23 47K_0402_5% 2N7002_SOT23 100K_0402_5% @
20K_0402_5% @ @ R586 R588
2
R668
22K_0402_1%
2
5VS_GATE2 R587 15VS_GATE_R 3VS_GATE 1 2 3VS_GATE_R 1 1.5VS_GATE 1 21.5VS_GATE_R
10K_0402_5% 1 1 1 1 1
1
1
D D C709 @ D
SUSP Q59 C1 C708 @ SUSP 43K_0402_5% C2 0.1U_0603_25V7K SUSP# 2 Q61 C3 C711 @
2 2
G 2N7002K_SOT23-3 0.1U_0402_25V6 0.1U_0603_25V7K G Q60 0.1U_0402_25V6 2 G 2N7002K_SOT23-3 0.1U_0402_25V6 0.1U_0603_25V7K
S 2 2 S 2N7002K_SOT23-3 2 S 2 2
3
3
+1.1VALW to +1.1VS
+1.1VALW U36 +1.1VS +RTCBATT +5VALW
DMN3030LSS-13_SOP8L-8 +5VALW
8 1
1
1 7 2 1 1
1
2 6 3 R591 @ 2
C712 5 C713 C714 220K_0402_5% R592 @
10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0603_10V6K R590 100K_0402_5% R593
2 2 2 470_0603_5% 100K_0402_5%
4
2
@ SUSP
<42> SUSP
2
2
SYSON#
1 Q63
1
+VSB D DTC124EKAT146_SC59-3
2 SUSP
OUT
OUT
G
1
S Q62 @ Q64
3
2N7002_SOT23 2 SYSON 2 DTC124EKAT146_SC59-3

75K_0402_5% <30,40,41,43> SUSP# IN <30,40> SYSON IN @
GND
GND
R594
R669
2
1.1VS_GATE 1 2 1.1VS_GATE_R
3
1 1
1
D
SUSP 160K_0402_1% C4 C715 @
2
G Q65 0.1U_0402_25V6 0.1U_0603_25V7K
S 2N7002K_SOT23-3 2 2
3
3 3
+1.5V +0.75VS
1
R597 R598
470_0603_5% 470_0603_5%
@ @
1 2
1 2
D D
2 SYSON# 2 SUSP
G G
S Q66 S Q67
3
2N7002_SOT23 2N7002_SOT23
@ @
4 4

DC Interface
Custom 0.1
LA8681P
A B C D E
5 4 3 2 1
DC030006J00 VIN
PF101 PL101
7A_24VDC_429007.WRML SMB3025500YA_2P
4 APDIN 1 2 APDIN1 1 2
4
3 3
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
2 2
1
D D
1 1
2
4602-Q04C-09R 4P P2.5
PC101
PC102
PC103
PC104
JDCIN1
ME@
Unpop for KB9012 VIN
LL4148_LL34-2
2
PD103 @
@ PD104 PJ101
1
LL4148_LL34-2 @ JUMP_43X39 51ON-1
C
BATT+ 2 1 1
1 2
2 C
1
68_1206_5%
68_1206_5%
PR118
PR119
@ PQ104
TP0610K-T1-E3_SOT23-3
@PR120
@ PR120 @ @
2
200_0603_5%
CHGRTCP 1 2 51ON-2 3 1
VS
0.22U_0603_25V7K
100K_0402_1%
0.1U_0603_25V7K
1
PR123 @
1
@ PC112
PC113
1
2
@ PR124 @
2
22K_0402_1%
1 2 51ON-3
+3VLP <32> 51_ON#
2
0_0402_5%
PR127
RTCVREF
1
200_0603_5%
PR128
@ PU102
1
APL5156-33DI-TRL_SOT89-3
3.3V
2@
3 2 CHGRTCIN
VOUT VIN
1U_0805_25V6K
10U_0603_6.3V6M
1
GND
@ PC114
@ PC115
B B
1
2
+CHGRTC
- JRTC2 + PR131
560_0603_5%
PR132
560_0603_5%
PD109
RB751V-40_SOD323-2
2 1 1 2 1 2 2 1 +RTCBATT
@ MAXEL_ML1220T10 1 2
RTCVREF
PD108
RB751V-40_SOD323-2
RTC Battery
A A

PWR DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
5 4 3 2 1
5 4 3 2 1
VMB2 VMB
PF201 PL201
JBATT1 12A_65V_451012MRL SMB3025500YA_2P
1 1 1 2 1 2 BATT+
2 2
3 EC_SMCA
3 EC_SMDA
4 4
5 5
1
6 6
7 PC201 PC202
7 1000P_0402_50V7K 0.01U_0402_25V7K
8
2
GND
1
D D
GND 9
100_0402_1%
100_0402_1%
TYCO_1775789-1
@
ADP_I need to write Charge Options Register (0x12H)=> bit6=1
PR201
PR202
2
2
0: IOUT is the 20x current amplifier output <default @ POR>
1: IOUT is the 40x current amplifier output
EC_SMB_CK1 <30,38>
For KB930 --> Keep PU201 circuit
PH1 under CPU botten side :
(Vth = 0.825V)
EC_SMB_DA1 <30,38> CPU thermal protection at 93 +-3 degree C
For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206
Recovery at 56 +-3 degree C
PH201, PR205, PR211,PQ201,PR208,PR212
1 2
JBATT2 PR203
+3VALW VL
1
1
2
6.49K_0402_1% +3VLP
2 <30,38> ADP_I
21.5K_0402_1%
3
3
1
402_0402_1%
12.7K_0402_1%
4
4
PR206
PR207
5
5 1 2 BATT_TEMP <30> A/D
PR205
6 PR204
6
1
7 10K_0402_5%
7
8 PC203 +3VS @
2
GND 0.1U_0603_16V7K PU201
9
2
GND NTC_V_2
1 8
TYCO_1775789-1 VCC TMSNS1
100K_0402_1%
C OTP_N_002 C
@ 2 7 2 1
GND RHYST1
PR208
PR209
3 6 Turbo_V_2 10K_0402_1%
<5,10,30> H_PROCHOT# OT1 TMSNS2
2
PR210
ADP_OCP_2 1 PR228
100K_0402_1%_NCP15WF104F03RC
4 5 2
1
OT2 RHYST2
PH201
PQ201 PR227 0_0402_5%
2
D
10K_0402_1%
G718TM1U_SOT23-8 5.11K_0402_1% @
PR211
2 ADP_OCP_1 0_0402_5%
1
OTP_N_003
G
S SSM3K7002FU_SC70-3 +3VLP @ +3VLP
2
1
MAINPWON <30,39>
PR212
@ 0_0402_5% 2 1
<30> PROCHOT 1 2 2 1 PR230 2 1
47K_0402_1% PR229
PR213 0_0402_5% 47K_0402_1%
PR231
2 1
@
0_0402_5%
<30>
<30>
Turbo_V
NTC_V
B B
P2
PQ205
+3VLP +3VALW
0.01U_0402_25V7K
TP0610K-T1-E3_SOT23-3
1
PC204
B+ 3 1 +VSBP
2
VMB2
100K_0402_1%
0.22U_0603_25V7K
PR214 PR215
2
1
100K_0402_1% 100K_0402_1%
1
PR216
PC205
PR217 PR218 <BOM Structure>
2
768K_0402_1% 10M_0402_5% PC206

1
1 2 0.1U_0603_25V7K
2
BATT_OUT <38>
PR219
2
10K_0402_1% PR220
8
1 2 PQ202 VL 22K_0402_1%
1
D 2N7002KW_SOT323-3
3 1 2
P
+
O 1 2
2
PR221 2 G
-
G
2
221K_0402_1% PU202A S PR222

3
LM393DG_SO8 100K_0402_1%
4
+3VLP PR224
1
PQ203 1K_0402_5% D PJ201

1
D 2N7002KW_SOT323-3 PQ204 @ JUMP_43X39

<39,41> SPOK 1 2 2
2 1 2 G 2N7002W-T/R7_SOT323-3 1 1
2VREF_8205 +VSBP 2 2 +VSB
2
1U_0402_6.3V6K
G S
3
1
PC207
PR223 PR226 S
3
10K_0402_1% 100K_0402_1%
2 1
2
RTCVREF <30> VSB_ON

1
A PR225 A
10K_0402_1%
@
<30> BATT_LEN#

PWR-BATTERY CONN/OTP
5 4 3 2 1
5 4 3 2 1
P3
B+
P2
PQ301 PQ302
AO4407A_SO8 AO4423L SO8
PR302
VIN 8 1 1 8
0.01_1206_1% B+
7
6
2
3
2
3
7
6
SH00000AA00
5 5 1 2 1 4 PQ303
AO4407A_SO8
PL301 2 3 1 8
4
1UH_PCMB061H-1R0MS_7A_20% 2 7
10U_0805_25V6K
10U_0805_25V6K
3 6
2200P_0402_50V7K
PQ304
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
D 5 D
47K_0402_5%
1 2
1
2
200K_0402_1%
0.1U_0603_25V7K
PC307
4
1
PR301
PC302
PC315
PC303
PC305
PC306
DTA144EUA_SC70-3 PC304 DISCHG_G
PC301
PR303
5600P_0402_25V7K
1
PR304
47K_0402_1%
2
2
2 1 2
2
ACN VIN
2ACOFF-1
1SS355_SOD323-2
2
1
ACP PR305
1DISCHG_G-1
10K_0402_1%
1
2
PD301
P2-1 PR306
0.1U_0603_25V7K
1
2 200K_0402_1%
PQ305 PQ306
1
+3VALW PC308 PC309 DTC115EUA_SC70-3
1
DTC115EUA_SC70-3 +3VALW
PR307 <39> ACPRN PD302
1 2 2 1
3
20K_0402_1% 1SS355_SOD323-2
100K_0402_1%
1 2 0.1U_0603_25V7K 2 1 2
6
10K_0603_1%
PQ308
1
1
D
150K_0402_1%
2N7002KW _SOT323-3 PC310 PQ309
2
PR308
PR309
PR310
PQ307A 2 BATT_OUT <37>
2 2N7002KDW -2N_SOT363-6 G 0.1U_0603_25V7K P2 2N7002W -T/R7_SOT323-3
1
D
0.1U_0603_25V7K
S
3
@ 2 1 2 PACIN
1
PR313
1
PC311
VIN @ PR312 @ @ G
1
10K_0402_5%
10K_0402_5%
2 1 1 2 S
3
2
2
390K_0603_1% 4.7M_0603_1%
2
1
P2-2
PR315
PR316
10_1206_5%
39.2K_0402_1%
5
6
7
8
C C
PR314
2N7002KDW-2N_SOT363-6
PQ310
PR319
AO4466L_SO8
3
PQ307B
<BOM Structure>
ACOK
CMPIN
CMPOUT
ACP
ACN
1
1
PR318 <30,37> ADP_I
2
47K_0402_1% PR317 21
1
PACIN TP
PACIN 1 2 5 1 2 @ @ 6 ACDET PC313 4
1
64.9K_0603_1% PC312 20 BQ24727VCC1 2

4
PC323 VCC PL302

ACON 1 2 7 IOUT
0.1U_0603_25V7K 4.7U_LF919AS-4R7M-P3_5.2A_20% PR320
2
3
2
1
1U_0603_25V6K
1
PQ311 100P_0603_50V8 19 0.01_1206_1%

PHASE
DTC115EUA_SC70-3 <30,37> EC_SMB_DA1 8 SDA
PU301 BATT+
BQ24727RGRR_VQFN20_3P5X3P5 LX_CHG 1 2 CHG
1 4
PR321 18 DH_CHG
HIDRV
5
6
7
8
2ACOFF-12 <30,37> EC_SMB_CK1
<30> ACOFF 1 9 SCL SA000051W00 2 3
1
PQ312
10K_0402_5% PR324 PC314
AO4466L_SO8
4.7_1206_5%
PR322
PR323 2.2_0603_5% 0.047U_0603_25V7M
1
BST_CHG SRP SRN
10U_0805_25V6K
10U_0805_25V6K
1 2 10 ILIM BTST 17 1 2 2 1
1
16251_SN
PR325 +3VALW 316K_0402_1%
3
PD303
PR326
LODRV
0_0402_5% 4
1
PC316
PC317
100K_0402_1% 16 2 1
GND
SRN
SRP
REGN
BM
2N7002KW_SOT323-3
2
2
PQ313 RB751V-40_SOD323-2
680P_0603_50V7K
11
1 12
13
14
15
3
2
1
1
1
D
PC319
10_0603_5%
6.8_0603_5%
2
PR328
2 PC318
<37> BATT_OUT BQ24727VDD
PR327
G 1U_0603_25V6K
2
S
3
2
2
PC320 DL_CHG
B 0.1U_0603_25V7K B
2 1
1
1
PC321 @
0.1U_0603_25V7K PC322
2
2 0.1U_0603_25V7K
BQ24727VDD
PR337
10K_0402_1%
1
1 2 ACIN <16,30>
PR336
PR335 10K_0402_1%
47K_0402_1%
PACIN
2
1 2
ACPRN <39> PR339

2
12K_0402_1%
2
PQ316
A DTC115EUA_SC70-3 A
3

CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
5 4 3 2 1
5 4 3 2 1
Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO
2VREF_8205 PJ402
+3VALW P 2 2 1 1 +3VALW
@ JUMP_43X118
1U_0603_10V6K
D D
1
PJ403
PC401
+5VALW P 2 1 +5VALW
2
2 1
@ JUMP_43X118
PR401 PR402
13K_0402_1% 30K_0402_1%
1 2 1 2
PR403 PR404
RT8205_B+ 20K_0402_1% 19.6K_0402_1% RT8205_B+
1 2 1 2
PJ401 Typ: 175mA
B+ 2 1 +3VLP
0.1U_0603_25V7K
2 1
ENTRIP2
ENTRIP1
@ JUMP_43X118 PR405 PR406
PC405
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
130K_0402_1% 66.5K_0402_1%
PC402
PC410
1 2 1 2
4.7U_0805_10V6K
1
1
PC403
PC404
PC406
PC407
PC408
PC409
2
8
7
6
5
5
6
7
8
PU401
2
2
PC411
TONSEL
ENTRIP2
FB2
FB1
ENTRIP1
REF
1
C PQ401 C
TPC8065-H_SO8
PQ402
25 P PAD
AO4466L_SO8
2
4 4
7 VO2 VO1 24
SPOK <37,41>
8 23 PR408 PC413
PR407 VREG3 PGOOD 2.2_0603_5% 0.1U_0603_25V7K
1
2
3
3
2
1
1 2 1 2 BST_3V 9 BOOT2 BOOT1 22 BST_5V 1 2 1 2
2.2_0603_5%
PL401 PC412 UG_3V 10
VFB=2.0V 21 UG_5V PL402
4.7UH +-20% PCMC063T-4R7MN 5.5A 0.1U_0603_25V7K UGATE2 UGATE1 4.7UH_PCMB104E-4R7MS_10A_20%
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1
8
7
6
5
1
LG_3V LG_5V
4.7_1206_5%
4.7_1206_5%
12 LGATE2 LGATE1 19
5
6
7
8
PQ403
PR409
PR410
SKIPSEL
AO4712_SO8
VREG5
PQ404
GND
VIN
NC
RT8205EGQW _W QFN24_4X4
EN
1 1
2
2
4
+ PC415 4 + PC417
13
14
15
16
17
18
1
1
150U_B2_6.3VM_R45M PR411 150U_B2_6.3VM_R45M
680P_0603_50V7K
TPC8A03-H_SO8
499K_0402_1%
680P_0603_50V7K
2 2
PC418
PC419
1 2
2
1
2
3
2
B+
3
2
1
1
100K_0402_1%
1U_0603_10V6K
VL
1
PC420
1
PR412
PC421
Typ: 175mA
4.7U_0805_10V6K
B B
2
ENTRIP1 ENTRIP2
2
2
For KB9012 RT8205_B+
<30,32> EC_ON
6
PR418
1
10K_0402_5% PQ405B
2 1 PQ405A 2N7002KDW -2N_SOT363-6
0.1U_0603_25V7K
2N7002KDW -2N_SOT363-6 2 5 2VREF_8205 +3.3VALWP OCP(min)=5.81A
2
PC422
+5VALWP OCP(min)=8.44A
<30,37> MAINPWON
1
PR413
0_0402_5%
2 1
PR414
100K_0402_1%
VL 2 1
1
2N7002W-T/R7_SOT323-3
PR415
1
200K_0402_1% D
<38> ACPRN 2 1 2 1 2 2 PQ406
G VS DTC115EUA_SC70-3
PQ407
S PR416
40.2K_0402_1%
4.7U_0603_6.3V6M
3
A A
1
100K_0402_1%
1
1
PR417
PC423
@ @
3
2
<30,32> EC_ON
2
2
PQ408
DTC115EUA_SC70-3
@ @
For KB9012 3VALWP/5VALWP

3
@ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
A B C D
PJ501
1.5V_B+ 2 2 1 1 B+
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
5
6
7
8
@ JUMP_43X118
1
PC502
PC503
PC504
PC505
PQ501
TPC8065-H_SO8
2
4
3
2
1
1
PR503 PC506 PL501 1
100K_0402_1% PU501 0_0603_5% 0.22U_0603_16V7K 1UH_PCMC063T-1R0MN_11A_20%

PR505 1 PGOOD VBST 10 BST_1.5V 1 2BST_1.5V-1 1 2 1 2 +1.5VP
PR501 2 1 2 9 DH_1.5V
0_0402_5% TRIP DRVH
LX_1.5V
4.7_1206_5%
1 2 3 EN SW 8
1
<30,35> SYSON 1
5
6
7
8
PR504
4 VFB V5IN 7 +5VALW
2
+
47K_0402_5%
PQ502 PC507
.1U_0402_16V7K
1
PC501 @
PR502
1 PR5062 5 6 DL_1.5V 220U_6.3V_M +1.5VP OCP(min)=15.6A

RF DRVL
1
PC508
2
470K_0402_1% 1U_0603_10V6K 2
PR507 11
2
TP PJ502
1000P_0603_50V7K
4
1
2 1 2 TPS51212DSCR_SON10_3X3 2 2 1 1
PC509
VFB=0.7V
@ JUMP_43X118
11.5K_0402_1%
1
TPC8A03-H_SO8
3
2
1
2
PJ503 +1.5V
PR508 +1.5VP 2 1
10K_0402_1% 2 1
@ JUMP_43X118
2 2
PU502 PL503
4
PJ505 1UH_PH041H-1R0MS_3.8A_20%
2 1 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
+5VALW
PG
2 1 PVIN LX +1.8VSP
@ JUMP_43X118
68P_0402_50V8J
9 PVIN LX 3
1
680P_0603_50V7K 4.7_1206_5%
22U_0603_6.3V6K
1
1
PC511
8 SVIN
PC510
PR509
PR510
6 20K_0402_1%
2
2
FB
22U_0603_6.3V6K
22U_0603_6.3V6K
5
1 2
2
EN
1
NC
NC
PJ504
TP
3 3
PC513
PC514
FB=0.6Volt +1.8VSP 2 1 +1.8VS
2 1
PC512
11
2
1 PR511 2 EN_1.8VSP @ JUMP_43X118
2
<30,35,41,43> SUSP#
0.1U_0402_10V7K
47K_0402_5%
2
SY8033BDBC_DFN10_3X3
1
PC515
PR512 1.8VSP max current=4A

1M_0402_5%
1.8VSP_FB
2
1
1
PR513
10K_0402_1% 2
4 4

PWR-+1.5VP/+1.8VSP
A B C D
5 4 3 2 1
D D
PR601
<37,39> SPOK 1 2
@
0_0402_5%
0.1U_0402_10V7K
1
PR602
PC602
1M_0402_5%
2
PU601
1
SY8809DFC_DFN8_2X2
1 8
PJ601 EN FB PL603
2 1 2 7 1UH_PCMC063T-1R0MN_11A_20%
+5VALW 2 1 IN PG
1.1V_LX 3 6 1.1V_LX 1 2
22U_0603_6.3V6K
+1.1VALWP
1
@ JUMP_43X118 LX LX
1
PC601
4 5
4.7_1206_5%
GND GND
22U_0603_6.3V6K
22U_0603_6.3V6K
2
1
PR603
22U_0805_6.3V6M
PC605
PC606
PC627
<BOM Structure>
1 2
2
C C
680P_0603_50V7K
PC603
2
PR604
@
8.25K_0402_1%
1 2 +1.1VALWP PJ602 +1.1VALW

2 1
2 1
1
PC604 JUMP_43X118
PR605 @ 1 2 @
10K_0402_1%
2
68P_0402_50V8J
PJ603
+1.2VSP_B+ 2 1
2 1 B+
JUMP_43X118
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
6
7
8
0.1U_0402_25V6
1
1
PQ603
PC612
@
TPC8065-H_SO8
PC611
PC613
PC614
2
2
B B
PC615
0.1U_0603_25V7K 4
PR609
1 2 1 2
0_0603_5%
PU602
1 10 BST_+1.0VSP
3
2
1
PGOOD VBST
PR610
1 2 TRIP_+1.0VSP 2 9 UG_+1.0VSP PL602
TRIP DRVH 1UH_PCMC063T-1R0MN_11A_20%
75K_0402_1%
EN_+1.0VSP 3 8 SW_+1.0VSP 1 2
PR611 EN SW +1.05VSP
1 2 FB_+1.0VSP 4 7 +1.0VSP_5V
<30,35,40,43> SUSP# VFB V5IN +5VALW
RF_+1.0VSP 5 6 LG_+1.0VSP
0.1U_0402_16V7K
160K_0402_1% RF DRVL
1
5
6
7
8
1
PC616
47K_0402_1%
4.7_1206_5%
1
1
PR612
PR614
11
TPC8A03-H_SO8
1U_0603_10V6K
1
TP
220U_D2_4VY_R15M
PC617 +
PQ604
PC618
PC619
2
TPS51212DSCR_SON10_3X3 1U_0603_6.3V6M
2
@ @
2
2
PR613 4 2 +1.05VSP PJ604 +1.05VS
470K_0402_1% 2 1
1
2 1
PC620
680P_0603_50V7K
2
JUMP_43X118
3
2
1
2
@ @
PR615
5.1K_0402_1%
2 1
A A
2
PR616
10K_0402_1%
1

PWR +1.1VALWP/+1.0VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
5 4 3 2 1
5 4 3 2 1
D D
+1.5V
1
PJ701
1
JUMP_43X118
@
2
2
PU701
1 VIN NC 8 +3VALW PJ702
+0.75VSP 2 2 1 1 +0.75VS
PC702 2 7
GND NC
1
4.7U_0805_6.3V6K @ JUMP_43X118
1
3 6 PC703
PR702 VREF VCNTL
2
1K_0402_1% 4 5 1U_0603_10V6K
VOUT NC
9
2
PQ701 TP
2N7002W -T/R7_SOT323-3 APL5336KAI-TRL_SOP8P8
PR701
.1U_0402_16V7K
+0.75VSP
1
49.9K_0402_1% D
10U_0603_6.3V6M
<35> SUSP
PC704
1K_0402_1%
1 2 2
10U_0603_6.3V6M
1
1
PC705
PC706
G
2
C S PR703 C
0.1U_0402_10V7K
2
1
PC701
B B
A A

PWR +0.75VSP
5 4 3 2 1
A B C D
<19> VCCSENSE_VGA @ PJ801

VGA_CORE_B+ 2 1
2 1 B+
JUMP_43X118
1 1
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
0.1U_0402_25V6
1
1
PR802
PC803
PC802
PC804
PC805
0_0402_5%
2
5
PC806
TPCA8065-H_SOP-ADV8-5
10P_0402_25V8J
2 1
PQ801
2
2
4700P_0402_25V7K
10P_0402_25V8J PR803
PC801
4
41.2K_0402_1%
2
PR801
0_0402_5%
PC807
1
<19> VSSSENSE_VGA 1 2
19 1
3
2
1
PL801
21
20
18
17
16
PU801 0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
PAD
GND
SLEW
VSNS
TRIP
MODE
+VGA_COREP
PR804
2 1
1 15 +5VALW
2
100K_0402_1% GSNS V5IN

11.8K_0402_1%
1
PR805
<BOM Structure> 1 1 1
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
TPCA8057-H 1N PPAK56-8
TPCA8057-H 1N PPAK56-8
2 14 PC808 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
V3 DRVL 1U_0603_10V6K PR806 + + +
PC809
PC810
PC811
PC812
PC813
PC814
5.11K_0402_1%
2
4.7_1206_5%
PQ802
PQ803
21
2
UGATE2_VGA 2 2 @ 2 2 2 2
PR807
3 13 4 4
V2 TPS51518RUKR_QFN20_3X3 DRVH
1
PC815
4 12 680P_0603_50V7K
21
V1 SW PR808 PC816
7.68K_0402_1%
3
2
1
3
2
1
2
2.2_0603_5% 0.1U_0603_25V7K
PR809
5 BOOT2_VGA
11 2 1 BOOT2_2_VGA1 2
V0 BST @
PGOOD
2 2
1 1
VREF
VID0
VID1
EN
97.6K_0402_1%
LGATE2_VGA
PR810
10
+VGA_COREP
2
Iocp=32.5A
0.1U_0402_10V7K
1
+3VS
PC817
2
PJ802
1
2 1
10K_0402_1%
+VGA_COREP 2 1 +VGA_CORE
PR811
Seymour
PR812 @ JUMP_43X118
0_0402_5%
<12,15,17> VGA_PWRGD 1 2 GPU_VID1 GPU_VID0 Core Voltage Level
2
PJ803
2 1
<16> GPU_VID0 2 1
1 1 0.9V
PR822 @ JUMP_43X118
10k_0402_5%
1 2 1 0 1.0V
<16> GPU_VID1
PR823 0 1 1.05V
10k_0402_5%
1 2
0 0 1.12V
PR813 33K_0402_5%
1 2VRON_VGA
<17> PX_MODE PR814
0_0402_5%
1 2
2
<30,35,40,41> SUSP# +1.5V

@
3 3
PJ805
1
+5VALW
1
PC818 @ 2 1
PJ804
+VGA_PCIEP 2 1 +1.0VGS
0.1U_0402_16V7K
1
JUMP_43X79 JUMP_43X79
+5VALW
1
2
PC819 @
1U_0402_6.3V6K
2
2
1
@ PR820
1
10k_0402_5% PR815 PC820
+3VS 1 2 GPU_VID0 @ PD801 0_0402_5% 4.7U_0805_6.3V6K
6
PU802
2
RB751V-40_SOD323-2 5
VCNTL
2
@ VIN
1 2 7
PR821 POK
4 +VGA_PCIEP
10k_0402_5% VOUT
+3VS 1 2 GPU_VID1 @ PR816 3
22U_0603_6.3V6K
VOUT
1
40.2K_0402_1%
PXS_PWREN
PC823
<12,17> PXS_PWREN 1 2 8 2
1
EN FB PR817
GND
0.1U_0603_25V7K
2
1
1.15K_0402_1%
PC822
9
@ PR818 VIN
2
20K_0402_1% APL5912-KAC-TRL_SO8 VGA_PCIE 1.0V 1.1 V
2
1
2
PC821
1
0.01U_0402_25V7K
PR819 4.53K 3K
PR819
4.53K_0402_1%
2
4 4

PWR-VGA_CORE/VGA_PCIE
A B C D
A B C D E
PL901
CPU_B+ HCB2012KF-121T50_0805
PC901 2 1 B+
33P_0402_50V8J
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2 1 1
5
6
7
8
220U_25V_M
PC924
+
1
1
PC904
2 1 2 1
PC905
PR901 PC902 2
2
2
44.2K_0402_1% 1000P_0402_50V7K UGATE_NB 4 PQ901
PR902 AO4466L_SO8
1 2_0603_5% 1
1 2 PC906 PL902
+5VS 1000P_0402_50V7K 3.3UH_PCMB104E-3R3MS_11A_20%
3
2
1
2 1 PHASE_NB 1 2 +APU_CORE_NB
PR903
5
6
7
8
1
PC907 PR904 2.2_0603_1%
0.1U_0603_16V7K 22K_0402_1% BOOT_NB 1 2 1 2 PQ902 @PR905
2 1 4.7_1206_5% 1
2
@ PR907 PC908
10_0402_5% 0.22U_0603_25V7K + PC909
1 2
1 2 +APU_CORE_NB LGATE_NB 4 220U_D2_4VM
1 2 PR908 @ PC910
CPU_B+ 2
0_0402_5% 680P_0603_50V7K
PR906 2 1
2
APU_VDDNB_RUN_FB_H <5>
2_0603_5% PR909 AO4712L_SO8
3
2
1
+5VS +3VS 0_0402_5%
2 1 APU_VDD0_RUN_FB_L
PR911 1 @ PR9102
1
PC911 27.4K_0402_1% 10_0402_5% CPU_B+
0.1U_0603_25V7K 2 1 PHASE_NB
1
2
PR912 @ PR913 LGATE_NB
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0_0402_5% 105K_0402_1%
5
PHASE_NB
PQ903
S TR AON7518 1N DFN
2
2
1
1
PC912
PC913
PC914
UGATE_NB
@ PR915 PR939
PR914 10K_0402_1% 0_0603_5%
2
105K_0402_1% UGATE0 1 2 4
1
48
47
46
45
44
43
42
41
40
39
38
37
2
@ PR916 PU901 PL903

2 105K_0402_1% PHASE0 2
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
LGATE_NB
UGATE_NB
PGND_NB
PHASE_NB
VIN
VCC
FB_NB
PR918 0.36UH_ETQP4LR36WFC_24A_20%
3
2
1
2.2_0603_5%
2
<30> VGATE 1 36 BOOT_NB BOOT0 1 2 1 2 1 4 +APU_CORE

OFS/VFIXEN BOOT_NB
1 2
<12,30> FCH_PWRGD @ PR917 100K_0402_5% 2 35 BOOT0 PC915 2 3
PGOOD BOOT0
5
1 2 0.22U_0603_25V7K
1
<5,10> APU_PWRGD
PQ904
TPCA8059-H_SOP-ADVANCE8-5
PR919 100K_0402_5% ISL6265_PWROK 3 34 UGATE0
PWROK UGATE0
2
@ PR920
<5> APU_SVD 2 1 4 33 PHASE0 4.7_1206_5% PR922
<5> APU_SVC PR921 SVD PHASE0 9.31K_0402_1%
0_0402_5%2 1 5 32 4
1 2
<30> VR_ON PR923 SVC PGND0 +5VS
1
PR924 PR925 2 10_0402_5% 6 31 LGATE0 @PC916
@PC916 PC917
21.5K_0402_1% 95.3K_0402_1% PR938 ENABLE ISL6265CHRTZ-T_TQFN48_6X6 LGATE0 680P_0603_50V7K 2 1
2 1 2 1 0_0402_5% 7 30
3
2
1
2
RBIAS PVCC 0.1U_0603_16V7K
8 29
OCSET LGATE1
1
PC918 2 1
9 28 1U_0603_16V6K LGATE0
VDIFF0 PGND1 PR926
ISN0
ISP0
10 27 5.11K_0402_1%
FB0 PHASE1
11 26
COMP0 UGATE1
12 25
VW0 BOOT1
COMP1
VDIFF1
VSEN0
VSEN1
2 VSEN1
RTN0
RTN1
ISN0
ISN1
ISP0
VW1
ISP1
FB1
TP
PR927
+APU_CORE 2 1
13
14
15
16
17
18
19
20
21
22
23
24
49
10_0402_5% PR928
3 0_0402_5% ISP0 3
VSEN1
ISN0
<5> APU_VDD0_RUN_FB_H PR929
1
ISN0
ISP0
2 1 VSEN0
0_0402_5%
0_0402_5% +VDDNBP
2 1 RTN0
Iocp~15A
<5> APU_VDD0_RUN_FB_L PR930
2
10_0402_5%
+1.5VS 2 1
PR932
PR931 +CPU_CORE
0_0402_5%
Iocp~15A
1
DIFF_0 VW0
PR933 PC919
255_0402_1% 2200P_0402_25V7K
2 1 2 1 FB_0 2 1 COMP0 2 1
PC920 PC921
180P_0402_50V8J 1000P_0402_50V7K
4 PR934 PR936 4
1K_0402_5% PR935 PC922 6.81K_0402_1%
2 1 2 1 2 1 2 1
54.9K_0402_1% 1200P_0402_50V7K
1
@ PR937
36.5K_0402_1%
+CPU_CORE/VDDNBP
2
A B C D E
5 4 3 2 1
+CPU_CORE +CPU_CORE_NB
+APU_CORE_NB
+APU_CORE
D D
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
1
1
PC1001
PC1002
PC1003
PC1004
PC1005
PC1006
PC1007
PC1008
2
2
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
1
1
PC1009
PC1010
PC1011
PC1012
PC1013
PC1014
PC1015
PC1016
2
2
220U_D2_4VM
1
1 1 1 1
330U_D2_2V5M_R9M
330U_D2_2V5M_R9M
330U_D2_2V5M_R9M
330U_D2_2V5M_R9M
+
PC1022
+ + + +
PC1017
PC1018
PC1019
PC1020
C 2 C
2 2 2 2
+1.05VS +1.8VS
330U_D2_2VM_R7M
1
330U_D2_2VM_R7M
10U_0603_6.3V6K
10U_0603_6.3V6K
1
1
+ +
PC1023
PC1025
PC1024
PC1026
2
2
2 2
B B
A A

PWR - PROCESSOR DECOUPLING
5 4 3 2 1
5 4 3 2 1
9HUVLRQFKDQJHOLVW3,5/LVW 3DJHRI

IRU3:5
,WHP 5HDVRQIRUFKDQJH 3* 0RGLI\/LVW 'DWH 3KDVH
&38&25(9''1%395B21 35

D
D

APU_CORE_NB....PC1021

C C

B B

A A

PIR (PWR)
5 4 3 2 1
5 4 3 2 1
QAWGE Power Sequence (AC mode)
EC -> PWR EC_ON

+3VALW
+5VALW
T1
1ms< T1 < 100ms : +3VALW rising time, for LAN chip request
+3VALW need rampe up before +1.1VALW or at the same time.
D PWR -> PWR SPOK D
+1.1VALW
Switch -> EC ON/OFFBTN#
EC -> FCH EC_RSMRST# T2 < 50ms : EC_RSMRST# rising time

T2 +3VALW need rampe up before EC_RSMRST# de-assertion at least 10ms
T3 +1.1VALW need rampe up before EC_RSMRST# de-assertion
FCH -> EC RTC_CLK T3 > 16ms : EC_RSMRST# de-assert to start RTCCLK
EC -> FCH PBTN_OUT#

PM_SLP_S5# T13
FCH -> EC PM_SLP_S3# T13 > 200ns : PBTN_OUT# to SLP_S3#/S5# de-assertion
EC -> PWR SYSON
1.5V
EC -> PWR SUSP#
+1.8VS
+1.5VS
+1.05VS
C C
+5VS
+3VS
+1.1VS +3VS need rampe up before +1.1VS or at the same time.
+0.75VS
DIS sequence The time delay between PXS_PWREN assertion

PXS_PWREN and PXS_RST# de-assertion must be more than 100ms.
+3VGS
+1.0VGS
+1.5VGS
+VGA_CORE
+1.8VGS
CLK_PCIE_VGA CLK_PCIE_VGA should be 100us earlier than PXS_RST# de-assert.
PXS_RST#
B B
EC -> PWR VR_ON
+APU_CORE
+APU_CORE_NB
PWR -> EC VGATE
EC -> FCH FCH_PWRGD

APU_CLK T11
FCH -> APU DISP_CLK T11< 32ms : FCH_POK assertion to clock out
T7
FCH -> APU APU_PWRGD 98ms< T7< 150ms : FCH_POK assertion to APU_PWRGD
FCH -> EC KB_RST# KB_RST# should be de-asserted before FCH_POK

A_RST# T9
FCH -> Device (PLT_RST#) 101ms< T9< 113ms :
FCH_POK assertion to A_RST# de-assertion
FCH -> APU APU_RST#
A A

PWR - PROCESSOR DECOUPLING
5 4 3 2 1

Pal - Pawge QAWGE - La 8681P.rev.1.0.Schematics

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Pal - Pawge QAWGE - La 8681P.rev.1.0.Schematics

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A B C D E

AMD APU Zacate-FT1 + FCH Hudson-M3L + GPU RobsonXT

Security Classification Compal Secret Data Compal Electronics, Inc.

LVDS Conn. LS7981P CardReader/B

USB PORT 2.0 x2(Left) page 33

SPI ROM WLAN/WiMAX

SATA3.0 HDD CONN

Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails FCH Hudson-M3L Brazos FCH Hudson-M3L

2 Port9 NC BOM Structure 2

Security Classification Compal Secret Data Compal Electronics, Inc.

ss/ s K&& K&&

Global ASIC Reset

Security Classification Compal Secret Data Compal Electronics, Inc.

AAAU6 PCB@ AAAU22 E1200@ BBBU22 E1800@

PCB 0R3 LA-8681P REV0 M/B EM1200GBB22GV EM1800GBB22GV

1K_0402_5% check the connect need or not

APU_THERMTRIP# 3 1 H_THERMTRIP# <12>

R427 @ 0_0402_5% 3 4 APU_TMS R844 2 1 1K_0402_5%

need to pop for HDT debug

APU_TRST# R846 1 20_0402_5% APU_TRST#_R 9 10 APU_PWRGD

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR SYSTEM MEMORY

Place within 1000 mils to APU

11A U22C 2A L29

GPU AND NB CORE

VDDCR_NB_8 VSS_25 VSS_74

VDDIO_MEM_S_7 VSS_48 VSS_97

By case (Along split)

Near CPU Socket

+3VS 199 VDDSPD SDA 200 FCH_SMDAT0 <9,12,29>

R446 205 206

LCN_DAN06-K4406-0103 DDR3 SO-DIMM A DDR3 SODIMM-I Socket

DDR_A_D32 129 130 DDR_A_D36 Place near JDIMM2

PCI EXPRESS INTERFACES

T101 APU_RST# F26 APU_RST# <5>

4MB SPI ROM

& Non-share ROM. SPI_CLK_FCH

+3VS 10K_0402_5% 1 @ 2 R133 AD22

T48 AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2 1 2

S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38

Security Classification Compal Secret Data Compal Electronics, Inc.

ACPI / WAKE UP EVENTS

0 1 PX4 low Issued Date 2011/10/12 Deciphered Date 2013/10/12 Title

demo board connect to GND

demo board connect to GND

220 ohm M20 R197 0_0603_5%

220 ohm MBK1608221YZF_2P

P13 1 1 it to +3.3V_S5 directly if HWM is not used.

220 ohm POWER C236 1 2 2.2U_0402_6.3V6M is supported

H29 VSS VSS AA25

N8 VSSAN_HWM VSSPL_DAC T21

S IC 218-0755091 A13 HUDSON-M3L FCBGA 656P C38

Security Classification Compal Secret Data Compal Electronics, Inc.

PCIE_CTX_GRX_P[3..0] U6A PX@ PCIE_CRX_GTX_P[3..0]

PCI EXPRESS INTERFACE

T35 PCIE_RX5P PCIE_TX5P T30 TXOUT_U2P_DPF0P AG38

N38 PCIE_RX8P PCIE_TX8P N33 TXOUT_L0P_DPE2P AW37

K35 PCIE_RX11P PCIE_TX11P L30

J38 K33 ROBSON XT M2

H35 PCIE_RX13P PCIE_TX13P J33

G38 PCIE_RX14P PCIE_TX14P K30

F35 PCIE_RX15P PCIE_TX15P H33

ss/ s K&& K&&