Effects of channel thickness on film thickness : 165 nm

38 nm 55 nm

1 (nm)

2 (nm)
characteristics of HZO-TFTs fabricated at
low temperature

0
film thickness : 88 nm 1 0 1 0

J. Wu, D.D. Han✉, Y.Y. Cong, N.N. Zhao, Z.F. Chen,

1 1
(mm) (mm)

J.C. Dong, F.L. Zhao, S.D. Zhang, L.F. Liu, X. Zhang and film thickness : 55 nm 88 nm 165 nm
Y. Wang

4 (nm)
2 (nm)
The channel process to further improve the performance of bottom gate

0
film thickness : 38 nm 0 1 0
hafnium-doped zinc oxide (HZO) thin-film transistors (TFTs) is opti- 1
1 1

mised. The effects of channel thickness on the electrical performances (mm) (mm)

of HZO TFTs is studied. The results show that the extracted saturation 30 32 34 36 38 40 42 44
mobility increases first and then decreases with the increase of HZO 2q, deg
a b
film thickness, reaching maximum when the channel thickness is
optimum. The dependence of the optimum thickness on channel
length is studied and it is found that optimum thickness increases Fig. 2 XRD and AFM results of HZO films with different thickness
with the increase of channel length. a XRD images for different thicknesses of HZO film
b AFM images for different thicknesses of HZO film

Introduction: For many years, silicon-based TFTs have been the key 10–3
components of the electronic flat-panel-display industry. However,
10–4
with the development of high-resolution, high-frame-rate and high-size
AMLCD and the emerging market of AMOLED, the performance of 10–5
silicon-based TFTs are not enough to satisfy the demand of industry 10–6
[1]. Oxide semiconductor TFTs are promising candidates for better per- 10–7

ID, A
formance than silicon-based TFTs and potential application for W/L = 100 mm/10 mm
10–8
AMOLEDs and high-end AMLCDs. Oxide semiconductor materials 38 nm

10–9 55 nm
have quite high electron mobility to drive the high-end AMLCDs and
88 nm
AMOLEDs. In addition, most oxide semiconductor TFTs are transpar- 10–10
165 nm
ent devices in the visible light region. Oxide semiconductor TFTs can 10–11
be used to realise transparent displays.
10–12
Oxide semiconductor TFTs have been the mainstream of the industry,
especially ZnO-based TFTs. ZnO TFTs have high performance and high 10–13
–5 0 5 10 15 20
light transmittance for a wide bandgap of 3.4 eV. However, ZnO film is VG, V
polycrystalline and hence the off-state current is high and the uniformity
is poor. Doped ZnO can solve these problems. Hafnium doped ZnO Fig. 3 Transfer characteristics of HZO TFTs with different channel thick-
TFTs have many advantages: Hf has high oxygen bonding ability and nesses: 38, 55, 88 and 165 nm with W/L = 100 μm/10 μm for VD = 5 V
it is easy to improve stability of HZO TFTs; Hf will supress the colum-
nar growth and change the material’s crystal structure [2]; Hf is environ-
10–3
mentally friendly but In and Ga in IGZO film are toxicants. Our group
10–4
has successfully fabricated high-performance HZO TFTs [3]. In this
work, we will optimise the channel process to further improve the per- 10–5

formance of the devices. 10–6

10–7
W/L = 100 mm/50 mm
ID, A

Experiments: HZO TFTs are fabricated on glass substrate as shown in
Fig. 1. The ITO deposited at room temperature (RT) by RF magnetron
sputtering is as a gate and S/D electrode. The 200 nm-thick SiO2 formed
by plasma enhanced CVD at 80°C is as the gate insulator. A lift-off
process is used to form the pattern. An HZO layer is deposited at RT
by RF magnetron sputtering. When depositing HZO, we use a ZnO:
Hf target as the source and the Hf concentration of ZnO:Hf target is
3%. We have four samples with different HZO thickness which are
38, 55, 88 and 165 nm. Other process conditions remain the same: the
oxygen partial pressure is 12%, the sputtering pressure is 1.2 Pa and
the sputtering power is 70 W. The highest temperature in the process
of lithography is 100°C. Hence all the process steps mentioned here
can be carried out on flexible substrate.
The HZO thin-film characterisation is researched by atomic force
microscopy (AFM) and X-ray diffraction (XRD). Electrical perform-
ance of HZO TFTs is tested by a semiconductor parameter analyser
(Agilent4156C) at RT.
ITO
ITO
HZO
SiO2
ITO
glass
a b
Fig. 1 Structure of HZO TFTs
a Cross-section view
b Top view picture of TFTs on glass substrate
10–8
38 nm
10–9 55 nm
88 nm
10–10 165 nm
10–11
10–12
–5 0 5 10 15 20
VG, V
Fig. 4 Transfer characteristics of HZO TFT with different channel thick-
nesses: 38, 55, 88 and 165 nm with W/L = 100 μm/50 μm for VD = 5 V
Results and discussion: Fig. 2a illustrates the XRD images of different
thickness HZO films on glass substrate. A sharp peak at 2θ ≈ 34.2° is
observed and the sharp peak is very close to that of ZnO film. The
peak position shows that the HZO film is just as the same with ZnO
film and crystallised in the hexagonal structure with a preferred c-axis
orientation, which reveals that Hf took the position of Zn in ZnO with
little change to the original crystal structure. The average grain size is
calculated using the Scherer formula [4] from the XRD peak width.
The grain size increases from 18 to 30 nm with the increase of film
thickness from 38 to 165 nm, which can be explained by the van der
Drift model [5]. At the initial stage of deposition, the nuclei were devel-
oped at random orientation. However, then there was a competitive
growth stage and the vertical growth rate was larger than others.
Finally, the crystals will be vertically oriented grains for a greater
growth rate at this orientation and larger grains are obtained over the
deposition time [6]. The increased grain size implied that the grain
boundaries as electron scattering centres could be smaller in the
thicker film [7]. Therefore it is expected that the electron mobility

ELECTRONICS LETTERS 28th May 2015 Vol. 51 No. 11 pp. 867–869

would increase because of the lower scattering centres as the HZO film
thickness increases.
Fig. 2b shows the AFM images of the HZO films with different thick-
nesses. The root-mean-square roughness increases from 0.18 to 0.61 nm
with increasing film thickness from 38 to 165 nm, which can be
explained by the increase of grain size.
Figs. 3 and 4 shows the transfer characteristics of HZO TFTs with
different channel thicknesses: 38, 55, 88 and 165 nm with VD = 5 V.
Figs. 3 and 4 illustrate TFTs with W/L = 100/10 and W/L = 100/50 sep-
arately. From the transfer characteristics, we can extract electrical par-
ameters of HZO TFTs. The saturation mobility (μsat) can be extracted
from the curves of I1/2 D against VG in the saturation regime when
VD = 5 V using
W msat CG
ID = (VG − VT )
2L
In (1), ID is drain current in the saturation region, W and L are width and
length of the measured TFT, CG is gate capacitance, VG is gate voltage
and VT is threshold voltage.
Fig. 5 shows the relationship of the extracted saturation mobility and
active channel thickness. It can be clearly seen that the extracted satur-
ation mobility increases first and then decreases with the increase of
HZO film thickness, hence optimum thickness exists. However, for
different channel length, there is different optimum thickness. The
optimum thickness values for L = 10 μm and L = 50 μm were 55 nm
and 88 nm separately. As expected from the XRD results, the thicker
film has higher electron intrinsic mobility because of the lower scatter-
ing centres as the HZO film thickness increases. However, as the film
thickness increases, the influence of the source and drain series resist-
ances on the TFT behaviour becomes more significant, which will
lead to low extracted mobility. To verify this point, we extract
the source and drain series resistances using TFTs with L = 10 μm and
L = 50 μm. The extraction of source and drain series resistances is
rather straightforward using a series of TFTs with different channel
lengths from
L − DL
Rtot = + RDS
mCG W (VG − VT )
W/L = 100 mm/50 mm
250
W/L = 100 mm/10 mm
200
msat, cm2/Vs
150
100
50
0
20 40 60 80 100 120 140 160 180
thickness, nm
Fig. 5 Relationship of channel thickness and saturation mobility μsat
In this equation, Rtot is the total resistances and RDS is the source and
drain series resistance. For a given channel thickness, TFTs with differ-
ent channel length (L = 10 μm and L = 50 μm) are electrically measured.
The curves of Rtot against L with different VG will intersect at (ΔL, RDS).
Furthermore, we can extract the channel resistance with VG = 20 V by
using the equation VD/ID − RDS as we have extracted the source and
drain series resistances. The extracted source and drain series resistances
for 38, 55, 88 and 165 nm are approximately equal to 800, 1000, 3000,
5000 Ω, respectively. The channel resistances we extract for 38, 55, 88
and 165 nm-thick TFTs with W/L = 100/10 μm are approximately equal
to 16.5 Ω, 1.24 Ω, 970 Ω and 900 Ω. We can know that the channel
resistance decreases with increasing channel thickness, but the source
and drain series resistance increases with increasing channel thickness,
as shown in Fig. 6a. The total resistance will first decrease and then
increase, as shown in Fig. 6b. For longer channel length, such as L =
50 μm, the channel resistance will be larger (the extracted results for
38, 55, 88 and 165 nm-thick TFTs with W/L = 100/50 μm are approxi-
mately equal to 55.5 kΩ, 13.7 kΩ, 3.4 kΩ and 3 kΩ, as shown in
Fig. 6a) and the effect of the source and drain series resistances on
total resistance will be smaller. As shown in Fig. 6b, the minimum
ELECTRONICS LETTERS 28th May 2015 Vol. 51 No. 11 pp. 867–869
Rtot for long-channel TFTs appears in thicker channel film, which
results in a larger optimum thickness [8].
80 8 60
70
WL = 100 mm/10 mm
7
50
S/D series resistance, kW
channel resistance, kW
60 WL = 100 mm/50 mm 6 WL = 100 mm/10 mm
total resistance, kW
50 40 WL = 100 mm/50 mm
5
40
4 30
30
3
20
20
10
2
10
0
1
20 40
0
60 80 100 120 140 160 180
0
20 40 60 80 100 120 140 160 180
channel thickness, nm
channel thickness, nm
a b
(1) Fig. 6 Extracted resistances
a S/D series resistances and channel resistances
b Total resistance for different channel length
Conclusion: Our experiment studies the effect of channel thickness on
the characteristics of HZO TFT. We have successfully found that there is
optimum channel thickness for a given channel length. The increase of
channel thickness results in high intrinsic mobility for the lower scatter-
ing centres in thicker film. However for thicker channel layers, the influ-
ence of the S/D series resistances on the TFT behaviour becomes more
significant and low extracted mobility is obtained. We have also found
that optimum thickness increases with the increase of channel length. As
we have extracted, RDS increases and channel resistance decreases with
increasing channel thickness. However, there is a larger channel resist-
ance for longer channel and the minimum total resistance is obtained in
the thicker channel, resulting in a larger optimum thickness.
Acknowledgements: Our work was supported by the National Natural
Science Foundation of China with grant 61275025 and by the
National Basic Research Program of China with grant 2011CBA00600.
© The Institution of Engineering and Technology 2015
(2)
29 January 2015
doi: 10.1049/el.2015.0362
One or more of the Figures in this Letter are available in colour online.
J. Wu, N.N. Zhao, Z.F. Chen, J.C. Dong, F.L. Zhao and S.D. Zhang
(Shenzhen Graduate School, Peking University, Shenzhen, 518055,
People’s Republic of China)
J. Wu, D.D. Han, Y.Y. Cong, N.N. Zhao, Z.F. Chen, J.C. Dong, F.L.
Zhao, L.F. Liu, X. Zhang and Y. Wang (Institute of Microelectronics,
Peking University, Beijing, 100871, People’s Republic of China)
✉ E-mail: handedong@pku.edu.cn
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