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ULTRA STEP UP DC-DC CONVERTER WITH
REDUCED SWITCH STRESS
Mini Project Report
Submitted in partial fulfillment of the requirements

for the award of Degree of BACHELOR OF TECHNOLOGY
in
ELECTRICAL & ELECTRONICS ENGINEERING
of the Cochin University of Science & Technology
Submitted by
1. AKSHAY VISHNU Reg. No.: 19152003

2. NIVED SOMAN Reg. No.: 19152028
3. ATHIRA D S Reg. No.: 19152046
4. DRISHYA DINESH Reg. No.: 19152048
5. SAPTHA BALAN K V Reg. No.: 19152059
Department of Electrical & Electronics Engineering

COLLEGE OF ENGINEERING THALASSERY
MARCH 2017
Certificate
This is to certify that the report titled “ULTRA STEP-UP
DC-DC CONVERTER WITH REDUCED SWITCH
STRESS” is a bonafide record of the Mini Project done by
AKSHAY VISHNU (19152003) under our guidance towards
the partial fulfillment of the requirements for the award of B.Tech.
Degree in Electrical & Electronics Engineering of the Cochin
University of Science & Technology.
Guide : Mini Project Coordinator:
Ms. Arathi M Nair Ms. Lakshmi S Suresh

Asst. Professor Asst. Professor
Dept. of Electrical & Electronics Engg. Dept. of Electrical & Electronics Engg.
College of Engineering Thalassery College of Engineering Thalassery
HEAD OF THE DEPARTMENT
Dr. Reeda Kunhimangalam

Associate Professor
Dept. of Electrical & Electronics Engg
College of Engineering Thalassery
Certificate
NIVED SOMAN (19152028) under our guidance towards the
partial fulfillment of the requirements for the award of B.Tech.


Associate Professor
Certificate
ATHIRA D.S (19152046) under our guidance towards the
partial fulfillment of the requirements for the award of B.Tech.


Associate Professor
Certificate
DRISHYA DINESH (19152048) under our guidance towards
the partial fulfillment of the requirements for the award of B.Tech.


Associate Professor
Certificate
SAPTHA BALAN K V (19152059) under our guidance
towards the partial fulfillment of the requirements for the award of
B.Tech. Degree in Electrical & Electronics Engineering of the
Cochin University of Science & Technology.


Associate Professor
ACKNOWLEDGEMENT
All glory and honors to the Almighty who showered his grace on us to
make this endeavor a success.
We express our sincere gratitude to Dr. Sajeev V, Principal, College of

Engineering Thalassery for his kind co-operation and help throughout the course. We
would also like to remember Dr. Reeda Kunhimangalam, Head of the Department,
Electrical and Electronics Engineering, for her valuable support. We are also grateful to
our Mini Project Co-ordinator Ms.Lakshmi S Suresh, Asst. Professor, Dept of Electrical
and Electronics Engineering, for her valuable guidance, advice and co-operation
throughout our project without which this project would not have been a success. We are
highly indebted to our Guide, Ms.Arathi M Nair who guided us throughout the project.
Here we would also like to extend my sincere thanks to other staff of the
Department of Electrical and Electronics Engineering, College of Engineering,
Thalassery and all our friends who have patiently extended all sorts of help for
accomplishing this undertaking.
ABSTRACT
High gain dc-dc converters are gaining importance due to the latest trends in
extracting power from renewable energies. The most commonly available renewable
energy resources are wind and solar. The voltage developed while tapping energy from
these sources are very low. Often the load requires larger than the voltage developed by
the renewable sources which necessitates a high gain DC-DC converter with moderate
duty ratio. Conventional boost converter cannot achieve ultra high voltage gain at
moderate duty ratio. The aim of designing engineers is to obtain converters with high gain
with moderate duty ratio, reduced switch stress, and cost. Here a single switch non
isolated dc-dc converter with capacitor-diode voltage multiplier topology is presented. A
30W prototype of the converter is designed.
CONTENTS
LIST OF FIGURES
LIST OF TABLES
CHAPTER NO. CONTENTS PAGE NO.
1 INTRODUCTION 01
2 PROPOSED CONVERTER 04
3 SIMULATION RESULTS 13
4 HARDWARE AND SOFTWARE
REQUIREMENTS 16
5 EXPRERIMENTAL SETUP 25
6 CONCLUSION 26
REFERENCES 27
APPENDIX 28
LIST OF FIGURES
FIGURE NO. FIGURE NAME PAGE NO.
2.1 ULTRA STEP UP DC-DC CONVERTER
WITH REDUCED SWITCH STRESS 4
2.2 CCM STAGE 1 5
2.3 CCM STAGE 2 6
2.4 KEY WAVEFORMS OF PROPOSED
CONVERTER IN CCM 7
2.5 EQUIVALENT CIRCUIT IN DCCM AND
INDUCTOR CURRENT WAVEFORM 9
3.1 SIMULATION DIAGRAM OF PROPOSED
CONVERTER 13
3.2 INPUT WAVEFORM 14
3.3 OUTPUT WAVEFORM ACROSS
LOAD RESISTOR 14
3.4 VOLTAGE WAVEFORM ACROSS
MOSFET SWITCH 15
4.1 POWER MOSFET STP75NF75 17
4.2 SCHOTTKY RECTIFIERS 19
4.3 INDUCTOR 21
4.4 CAPACITOR 21
4.5 RESISTOR 22
4.6 VOLTAGE REGULATOR 22
4.7 CRYSTAL OSCILLATOR 23

LIST OF TABLES
TABLE NO. TABLE NAME PAGE NO.
4.1 HARDWARE COMPONENTS 16
4.2 VOLTAGE REGULATOR RATING 23

ULTRA STEP UP DC-DC CONVERTER WITH REDUCED MINI PROJECT
SWITCH STRESS 2017
CHAPTER 1
INTRODUCTION
Recent trends in renewable energy technology motivate designing engineers to

obtain boost converter with high gain. But the objective must be high gain at moderate
duty ratio, current and voltage stress reduction on the active switches.
By reducing the switch stress it is possible to use MOSFET switch with low drain
to source resistance. MOSFET with low RDS-ON can reduces the power dissipation and
correspondingly reduces the size of heat sink hence converter cost and size can be
reduced. Inductors are main energy storing and transferring component in a boost
converter. So the switching frequency must be a key factor for a converter. As the
switching frequency increases the size of the inductor is reduced and the converter
bulkiness can be reduced. But at higher switching frequency the switching loss will be
high. So a compromise has to be made between switching losses and inductor size.
Switching converters with transformer isolation can generate higher voltage from low-
level input voltage but the efficiency is reduced due to transformer leakage inductance,
and the size and cost proportionally increases. Converters with coupled inductor can also
increase the boost level and reduces the switch stress, and size but the coupling
coefficient cannot be ideal.
1.1 CONVENTIONAL TOPOLOGIES:

The recent increase in fossil fuel cost and new regulations to reduce CO2
emissions have increased the interest in renewable energy resources in general. Fuel cells
and photovoltaics (PVs) have been gaining a lot of interest as leading renewable energy
technologies. A fuel cell voltage typically varies by a factor of 2:1, and a PV output
voltage is a function of sunlight, which causes it to also vary. The low variable voltage of
these renewable energy technologies calls for a high-efficiency high-ratio dc–dc
converter. Practical considerations limit the output voltage of a conventional boost
converter to be approximately six times its applied voltage. In order to supply a high
output voltage, the conventional boost converter must operate at extremely high duty
cycle ratios. Extreme duty cycles impose inefficiently small off times or low switching
DEPT. OF EEE 1 COLLEGE OF ENGINEERING THALASSERY

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frequencies. Small off times cause a severe diode reverse-recovery current which will
increase the electromagnetic interference (EMI) levels [1].Lower switching frequency
causes higher ripple current and increases magnetic components. Moreover, an extreme
duty cycle is not desirable since no room is left for control to compensate changes in a
load or a line. Furthermore, a conventional high step-up boost converter requires a high-
current and voltage-rated MOSFET; hence, it will require a MOSFET with a higher
RDS−ON. The drawbacks of this are increased size, cost, and degradation of the overall
converter efficiency. In order to increase the conversion efficiency and voltage gain, a
number of high step-up converter topologies have been proposed. The cascade boost
converter in [1] can meet the requirements of supplying a high output voltage with a
relatively high efficiency. The major drawbacks of this solution are the complexity and
higher cost resulting from using two dc–dc converters. The two power switches in the
cascade converter must be synchronized to avoid the beat frequency, and the stability of
the converter is also a concern. Quadratic converters can provide large step-up voltage
conversion ratios; however, the switch voltage stress in quadratic converters is equal to
the output voltage. Thus, no advantage over the conventional boost converter is achieved.
Converters with coupled inductors can achieve a high step-up voltage gain , but their
efficiency is degraded due to the losses associated with leakage inductors. Moreover,
these converters require a high-voltage-rated switch and suffer from EMI problems.
Converters with an active-clamp circuit can effectively recycle the leakage energy and yet
reduce the main switch voltage stress. This can be achieved at the expense of circuit
complexity, as well as introducing extra losses related to the clamp circuit. The topologies
presented in [3] overcome the aforementioned drawbacks, but they present high
resonating currents through both the magnetizing inductance and the power switch. An
improved active clamp gives better performance than its active-clamp counterparts
presented in [3]. Topologies based on a capacitor–diode voltage multiplier can eliminate
the aforementioned drawbacks, reduce the size and cost, and increase the efficiency and
reliability . However, these topologies cannot provide ultrahigh voltage gains at moderate
duty cycles. Utilizing multiplier cells and inductor coupling can also result in high step-up
gain .However, cascading several voltage multiplier cells can significantly increase the
voltage gain without a high-duty cycle operation but at the expense of increased system
size and cost. The aforementioned and related drawbacks associated with existing high
step-up boost converters encourage a search for a high step-up converter topology which

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enables the use ofa lower voltage rated and lower RDS−ON MOSFET inorder to provide
better efficiency by reducing both conduction and switching losses. One possible solution
for this problem is to use the voltage lift. These converters have higher voltage gains with
smaller ripples than the exiting conventional dc–dc step-up converters. Other advantages
include high power density, high efficiency, and cheap topology in a simple structure. In
this paper, a new single-switch non isolated dc–dc converter with high voltage transfer
gain and reduced semiconductor voltage stress is proposed. The proposed topology
utilizes a hybrid switched-capacitor technique for providing a high voltage gain.
The proposed converter has the following advantages:
1. a high-ratio gain at a moderate duty cycle;

2. relatively low MOSFET stress which enables the use of a lower voltage
and RDS−ON MOSFET switch so as to reduce cost, switch conduction, and
turn-on losses;
3. low voltage stress across the diodes allows the use of Schottky rectifiers
for alleviating the reverse-recovery current problem, leading to a further
reduction in the switching, and conduction losses.
4. coupled magnetic can be utilized to further improve the power density of
the converter.
The principle of operation is illustrated together with the steady-state analysis.

The capability of the proposed converter is verified by comparing it to other similar high-
gain single switch non isolated converters.. Finally, simulation and experimental results
are presented in order to demonstrate the effectiveness of the proposed scheme.

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CHAPTER 2
PROPOSED CONVERTER
2.1 CIRCUIT DIAGRAM
Fig.2.1 Ultra step up dc-dc converter with reduced switch stress
The converter proposed in [1] is shown in fig: 2.1 which can be viewed as a single
switch topology with capacitor diode voltage multiplier .The converter consists of one
active switch(S) which is a power MOSFET. At the input section there are two identical
inductors La ,Lb and a capacitor Cin also there are two identical diodes Di1 and Di2.The
output section of the converter is a capacitor diode voltage multiplier which consists of
two identical capacitors Ca,Cb and two identical diodes Da,Db. Also there is diode Dc a
filter capacitor Cf and Load resistance Ro. The converter operation can be described as
follows.
During the switch on period of the power switch(S) La ,Lb and Cin are charged in
parallel combination by source Vin, at the same time Ca and Cb discharges through
source and load in series combination until Vin is greater than Vo. During switch off
period the stored energy in La, Lb and Cin discharges the stored energy equally between
Ca and Cb through Da and Db. The converter has a voltage gain of around 12 and the
switch voltage is only one half of the output voltage during off condition.

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ASSUMPTIONS:
 Converter is operating in steady state.
 In one switching cycle, Input voltage is purely dc.
 All components are ideal(100% efficiency).
 Capacitors are having small voltage ripple at switching frequency.
2.2 MODES OF OPERATION

The operation of the circuit is explained by two modes.
1. Continuous conduction mode(CCM).
2. Discontinuous conduction mode(DCCM).
2.2.1 CONTINOUS CONDUCTION MODE (CCM):

When the converter operates in CCM, the current ripples through L1 and L2 are
assumed as negligible.
One switching cycle can be divided into two stages.
STAGE 1:
Fig.2.2 CCM Stage 1
[t0, t1] [Fig. 2.2]: When the power switch Q is turned on, diodes D1,D2 and D3
are turned on simultaneously, while diodesDo1 andDo2 are turned off by the negative
voltage (VC1 −Vo) across them. The voltages across L1, L2, and C are the same, and it is
equal to the input voltage Vg. On the other hand, the voltage (Vo−Vg) is divided equally
between the two capacitors C1 and C2. Thus, in this stage, both C1 and C2 are charging

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the load, while the input voltage Vg is charging capacitor C. At the end of this interval,
the switch Q is turned off, initiating the next subinterval.
STAGE 2:
Fig.2.3 CCM Stage 2
[t1, Ts] [Fig2.3]: At the instant t1, switch Q is turned off; both diodes Do1 and
Do2 are turned on simultaneously, providing a path for the inductor currents iL1 and iL2.
DiodeD3 is reversed biased by the negative voltage (VC1 −Vo) across it, while D1 and
D2 are reversed biased by the negative voltage (−VC1 −VC)/2 across them. In this stage,
the two capacitors C1 and C2 are effectively in parallel; hence, they are being charged
equally. Note that, in this stage, the voltages across inductors L1 and L2 are also the
1
same, and it is equal to (VC −VC1). Consequently, they can be magnetically coupled
2
into a single magnetic core. As a consequence, the size, the cost, and the power loss of the
magnetic devices are greatly reduced, allowing higher power density as compared to
using two separate inductors.
From Fig. 2(a), we have
VC =Vg (2.1)
1
VC1 =VC2 = (Vo −Vg) (2.2)
2

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Fig. 2.4 Key waveforms of proposed converter in CCM
From Fig. 2.4, the volt–second balance principle of inductor L1 (or L2) gives the
following relations:
1
Ton*(Vg) = -Toff (Vo-V1)
2

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1
Ton*(Vg) = -(T-Ton) (Vo-V1)
2
1
DT*(Vg) = -(T-DT)(Vo-V1)
2
1
DT*(Vg) = -T(1-D)(Vo-V1)
2
1
DVg +D(VC −VC1) =0 (2.3)
2
Where D=1−D is the normalized switch-off time. From (1)–(3), the input-to-
output voltage transfer ratio of the proposed converter can be determined as
M = Vo/Vg = Ig/Io = (3+D)/D’ (2.4)
where Ig is the steady-state average value of the input current.
2.2.2 DISCONTINOUS CONDUCTION MODE:

To simplify the analysis, it is assumed that the two inductors have the same
inductance value (L1 = L2). Based on this assumption, discontinuous-inductor-
conduction mode (DICM) operation for the converter in Fig.1 is defined when the
inductor currents iL1 and iL2 reach zero during the switch-off time. Thus, in DICM, a
third topological stage exists where all the semiconductors are off as shown in Fig. 2.5(a).
The current waveforms of iL1 at the boundary of CCM/DICM and in DICM are shown in
Fig. 2.5(b) and 2.5(c), respectively. The gain of converters can also be used by adding
additional multiplier cells or additional inductor cells.

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Fig. 2.5 (a) Equivalent circuit in DCCM; Inductor current iL1 waveform:
(b) at the boundary of CCM/DCCM (c) in DCCM
2.3 CONVERTER DESIGN:

The design of the converter is done under the assumption that
1. Converter is operating in continuous conduction mode.

2. All the circuit components are ideal.
3. Input voltage is constant.
4. Output capacitor is large enough to keep the output voltage constant.
Also let
1. D is the duty ratio and Ts is the switching period

2. La=Lb, Ca= Cb
Here 30W prototype of the proposed converter is designed by considering an input

of 12V,with switching frequency 40 KHz and duty ratio D as 0.692.

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For Vin = 12V with a conversion ratio of 12

The output voltage Vo = 144V
Vo 3  D
We have M    12
Vin 1 - D
3  D  12(1 - D)
9
D   0.692
13
Po  Vo  Io
Po 30
Io    0.208A
Vo 144
Under the assumption of ideal condition we can take
input power, Pin = output power, Po
Vin  Iin  Vout  Iout
(Vout  Iout) (144  0.208)
Iin    2.5A
Vin 12
Vo 144
The load resistance, Ro    692.3 
Io 0. 208
take Ro  692 
diL
We have , VL  L  Vin
dt
L  Vin  D  Ts
Let inductor current ripple be 1A.
1
T  2.5  10 5 sec
40  10 3
L  12  0.692  2.5  10 5  207.6 H
The capacitors can be designed as follows :
Let the peak to peak ripple in output voltage be 0.05%of output voltage.
The proposedconverter is a boost converter with capacitor diode voltage multiplier .
The formula for output capacitor can be written as
DTs 0.692  2.5  10 5
CO    50  10 6 F
R  0.0005 692  0.0005
CO  50 F
Take C  C1  C2  CO  68F

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2.4 INDUCTOR DESIGN:

We have, L  207.6H
Let the inductor current ripple iL be 10% of Io .

ie, iL = 0.1 0.208  0.0208A
Step 1: To find Area Product, Ap
Maximum current through inductor,

iL 0.0208
Im  Io   0.208   0.2184 A
2 2
Maximum voltage that inductor should store in it is given by,
1 1
EL  L Im2   207.6 106  0.21842  2.47 106 J
2 2
2 EL
Then area product, Ap  AwAc 
KwKcJB m
where Kw , J and Bm are design parameters
for high frequency operation, we need a high resistivity material. So we choose ferrite as
the core material.
For ferrite core, Bm  0.27T , J  3 106 A / m2 and Kw  0.6 .
Im 0.2184
Kc    1.05
Io 0.208
2  2.47 106
 Ap   1.05 1011 m 4  10.5mm4
0.6 1.05  3 10  0.25
6
From datasheet, a material of area product greater than the measured value is taken.
ie, E 20/10/15 EE is selected.
For E 20/10/15 EE , Ap  1481mm 4 , Aw  47.8mm4 , Ac  31mm4 , lm  42.8mm
Mean length per turn= 38mm

Step 2: To find Permeance, 
To calculate permeance, relative permeability of the material is taken from the datasheet,
r  2000  25%
Here r  1500
Let air gap length= 0.5mm
orAc 4 107 1500  3.1106

   7.37 108 H / mm2
lm  rlg 42.8 10  1500  0.5 10
3 3

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Step 3: To calculate no. of turns
L 207.6 106
No. of turns, N  
 7.37 108
N=53.07
Step 4: To find Wire guage
Irms 0.208
Area of cross section of wire, a=   6.93 108 m 2
J 3 10 6
a=0.0463 mm2
from the datasheet a guage with area greater than the measured value is taken.
ie, SWG=30 with a=0.07791 mm 2

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CHAPTER 3
SIMULATION RESULTS
3.1 SIMULATION DIAGRAM:
Here MATLAB SIMULINK is used to verify the circuit and obtain an

approximate output from the proposed circuit. A DC voltage source is given with an input
voltage 12V. We use MOSFET as the switch. The gate trigger for MOSFET is given by
Pulse generator. Instead of Schottky Rectifiers, we used Diodes. Inductors, capacitors and
load resistor are given by RLC branch. Designed values for 12V input were given to all
components. Duty cycle was taken as 0.692. Converter frequency is set at 40KHz. And
then open loop simulat on time basis using a voltage measurement block and waveforms
are seen on scope. Also a voltage measurement block and scope is connected across
MOSFET switch also. This to obtain the voltage across switch.
Fig 3.1 Simulation diagram of proposed converter

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3.2 INPUT WAVEFORM
Fig 3.2 Input Waveform
An input voltage 12V is applied using a DC source.
3.3 OUTPUT WAVEFORM
Fig 3.3 Output waveform across the load resistor

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We have assumed a conversion ratio of 12. And the obtained waveform shows
that the amplitude is approximately 128V. Ie, Vo = 144±12% V.
.
3.4 VOLTAGE ACROSS SWITCH
Fig 3.4 Voltage waveform across MOSFET switch
The voltage across the swcitch MOSFET is obtained as shown. The magnitude of the
voltage is almost half the output voltage. This shows a reduced switch stress from other
topologies.

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CHAPTER 4
HARDWARE AND SOFTWARE

REQUIREMENTS
4.1 HARDWARE REQUIREMENTS
Table 4.1: Hardware components

SL. COMPONENT SPECIFICATION
NO.
1 MOSFET STP75NF75 75A 75V
2 SCHOTTKY RECTIFIER MBRB8H100T4G 10A 100V

3 PIC 16F877A
4 INDUCTOR 207.6μF
5 CAPACITOR 22pF, 68μF
6 RESISTOR 10K,1K
7 VOLTAGE REGULATOR LM 7805
8 CRYSTAL OSCILLATOR 20MHz
9 DC SOURCE 9V
10 BATTERY 0-30V

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4.1.1 MOSFET STP75NF75:
Fig. 4.1 Power MOSFET STP75NF75
A power MOSFET is a specific type of metal oxide semiconductor field-effect

transistor (MOSFET) designed to handle significant power levels. Compared to the
other power semiconductor devices, for example an insulated-gate bipolar transistor
(IGBT) or a thyristor, its main advantages are high switching speed and good efficiency
at low voltages. It shares with the IGBT an isolated gate that makes it easy to drive. They
can be subject to low gain, sometimes to degree that the gate voltage needs to be higher
than the voltage under control. The design of power MOSFETs was made possible by the
evolution of CMOS technology, developed for manufacturing integrated circuits in the
late 1970s. The power MOSFET shares its operating principle with its low-power
counterpart, the lateral MOSFET. The power MOSFET is the most widely used low-
voltage (that is, less than 200 V) switch. It can be found in most power supplies, DC to
DC converters, and low voltage motor controllers.
4.1.2 SCHOTTKY RECTIFIER :MBRB8H100T4G
The primary advantages are switching speeds that approach zero time and very
low forward voltage drop. The reverse recovery time of Schottky diodes provides
extremely fast recovery characteristics. What little reverse recovery time they exhibit is

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dictated by their capacitance instead of minority carrier recombination such as in

conventional PN junction rectifiers. This offers very little reverse current overshoot when
switching the Schottky from a forward conducting mode to a reverse blocking state.
There are many different kinds of Schottky rectifiers. At Future Electronics we

stock many of the most common types categorized by maximum average rectified
current, maximum reverse voltage, maximum peak current, forward voltage, packaging
type and maximum reverse current. The parametric filters on our website can help refine
your search results depending on the required specifications.
The most common values for maximum average rectified current are 1 A, 2 A, 3
A and 10 A. We also carry Schottky rectifiers with maximum average rectified current up
to 400 A. Maximum reverse voltage can have a range from 8 V to 1200 V, with the most
common values being 30 V, 40 V, 60 V and 100 V.
Features:
• Guard ring for Stress Protection

• Low Forward Voltage
• 175°C Operating Junction Temperature
Mechanical Characteristics:
• Weight: 1.7 grams (approximately)
• All External Surfaces Corrosion Resistant and Terminal Leads are Readily
Solderable
• Lead and Mounting Surface Temperature for Soldering Purposes: 260°C Max.
for 10 Seconds
Applications for Schottky Rectifiers:
Schottky rectifiers are ideal for output stages of switching power supplies. The very fast
switching speed of Schottky rectifiers allows them to be used in very high frequency
applications such as very low power signals and switching diode requirements of less
than 100 picoseconds. Other applications include power management circuits and other
various rectifier circuits.

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Fig 4.2 Schottky Rectifiers
4.1.3 PIC16F877A:
The PIC16F877A is a low power high performance CMOS 8 bit microcontroller

with 8k words of of flash programmable and erasable read only memory(PEROM). It is a
powerful microcomputer which provides a highly flexible and cost effective solution for
mini embedded control applications.
Working of PIC
In the main circuit PIC16F877A, microcontroller constitutes a network controller

stage which control all other blocks. It is achieved through its inbuilt port pins.There are 5
ports named A,B,C,D and E having 33 pins.Port 8A-6 pins,port B-8 pins,port C-8
pins,port D-8 pins and port E-3 pins.All these port pins are bidirectional and bit
addressable.By utilizing its port features,any device can control by any port,thus hardware
design become very simple.
Pin 13 and 14 of controller are connected to crystal,which generates system

clock,Oscillator circuit is on chip and it requires crystal and decoupling capacitors only.It
is the essential external circuit for the controller.It’s maximum frequency is upto 20MHz
and can use any frequency below the value.The 22 pt disc capacitors connected across
crystal pins and GND are for cancelling harmonic noises.This value of capacitor are taken
according to the direction given in datasheet.
Reset pin is the first pin of this controller,and is used to restart the system without
power off. It is an active low pin and kept high using a resistor across a pin and VCC. Pin
11,32,12,31, are power pins and connected to 5 volt and ground respectively.

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The initialization of different ports and pins of the microcontroller chip in our
circuit is described below.
Memory Organisation
There are 3 memory blocks in each of the PIC16F87X MCUs.
Program Memory Organisation
The PIC16F87X devices have a 13 bit program counter capable of addressing an

8K*14 program memory space. The PIC16F877/876 devices have 8K*14words of flash
program memory and the PIC16F873/874 devices have 4K*14.Accessing a location
above the physically implemented address will cause a wraparound.
Data Memory Organisation
The data memory is partitioned into multiple banks which contain the general
purpose registers and special function registers. All implemented banks contains special
function registers,some frequently used special function registers from one bank may be
mirrored in another bank for cod reduction and quicker access.
Data Eeprom And Flash Program Memory
The data EEPROM and flash program memory are readable and writtable during
normal operation over the entire VDD range,these operations take place on a single byte
for data EEPROM memory and a single word for program memory.
I/O Ports
Some ports for these i/o ports are multiplexed with an alternate function for the
peripheral features on the device.
PORT A AND THE TRISA REGISTER- Port A is a 16 bit wide bidirectional port the
corresponding data direction register is a TRISA .
PORTB AND THE TRISB REGISTER- PORTB is an 8-bit wide, bidirectional port.
PORT C AND THE TRISC REGISTER- PORTC is an 8 bit wide, bidirectional port.
PORT D AND THE TRISD REGISTER- PORTD is an 8-bit port with Schmitt Trigger
input buffers.

SWITCH STRESS 2017
PORT E AND TRISE REGISTER- PORT E has three pins (RE0/RD/AN5,

RE1/WR/AN6 and RE2/CS/AN7) which are individually configurable as inputs or
outputs.
4.1.4 INDUCTOR=207.6 H
Fig 4.3 Inductor
An inductor also called a coil or reactor, is a passive two-terminal electrical

component that stores electrical energy in magnetic a magnetic field when electric current
is flowing through it. It typically consist of a wire wound on a coil. When the current
flowing through the inductor changes the time varying magnetic field induces the voltage
in the conductor.
4.1.5 CAPACITOR=68μf &22pF
Fig 4.4 Capacitor
A capacitor is a two terminal passive electronic component that stores electric energy in
an electric field. Effect of a capacitor is known as capacitance. The energy can be
completely recovered by discharging the device. If discharged through a resistive device
the power given off as heat will come from the stored charge in the capacitor.

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4.1.6 RESISTORS:690Ω &10K
Fig 4.5 Resistor
A resistor is a passive two terminal electrical component that implements

electrical resistance as a circuit element. Fixed resistors have resistances that only change
slightly with temperature, time or operating voltages ,variable resistors can be used to
adjust circuit elements or as sensing devices for heat ,humidity, light, force or chemical
activity.
4.1.7 VOLTAGE REGULATOR
Fig 4.6 Voltage Regulators
Voltage regulator IC maintains the output voltage at a constant value. 7805,

a voltage regulator integrated circuit (IC) is a member of 78xx series of fixed linear
voltage regulator ICs used to maintain such fluctuations. The xx in 78xx indicates the
fixed output voltage it provides. IC 7805 provides +5 volts regulated power
supply with provisions to add heat sink as well.

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PIN
PIN FUNCTION DESCRIPTION
NO
In this pin of the IC positive

1 INPUT Input voltage (7V-35V) unregulated voltage is given in
regulation.
In this pin where the ground is given.

2 GROUND Ground (0V) This pin is neutral for equally the input
and output.
Regulated output; 5V The output of the regulated 5V volt is

3 OUTPUT
(4.8V-5.2V) taken out at this pin of the IC regulator.
Table 4.2 Voltage Regulator Rating
IC 7805 Rating
• Input voltage range 7V- 35V

• Current rating Ic = 1A
• Output voltage range VMax=5.2V ,VMin=4.8V
4.1.8 CRYSTAL OSCILLATOR- 20MHz
Fig.4.7 Crystal Oscillator
A crystal oscillator is an electronic oscillator circuit that uses the

mechanical resonance of a vibrating crystal of piezoelectric material to create an electrical
signal with a precise frequency. This frequency is commonly used to keep track of time,
as in quartz wristwatches, to provide a stable clock signal for digital integrated circuits,

SWITCH STRESS 2017
and to stabilize frequencies for radio transmitters and receivers. The most common type
of piezoelectric resonator used is the quartz crystal, so oscillator circuits incorporating
them became known as crystal oscillators, but other piezoelectric materials including
polycrystalline ceramics are used in similar circuits.
4.2 SOFTWARE REQUIREMENTS
4.2.1 MP LAB
MP LAB is proprietary free ware integrated development environment for the

development of embedded applications on pic and ds pic microcontrollers, and is
developed by microchip technology.MP LAB X is the latest edition of the MP LAB, and
is developed on the net beams platform.MP LAB and MP LAB X support project
management, code editing, debugging, and programming of microchip 8bit, 16 bit and 32
bit pic microcontrollers.MP LAB is designed to work with MP LAB certified devices
such as the MP LAB ICD3 and MP LAB REAL ICE, programming and debugging pic
microcontrollers using a personal compuer.PIC kit programmers are also supported by
MP LAB.
Here its used to provide a delay program for the turn on and turn off of MOSFET
switch. The program is then burned to PIC16F877A.
4.2.2 MATLAB SIMULINK
MATLAB SIMULINK is used for the checking the accuracy of the circuit and
approximate output. Open loop simulation was done.

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CHAPTER 5
EXPERIMENTAL SETUP
A 40-W experimental prototype of the proposed converter in Fig. 2.1 has been
built to confirm the theory and to validate the simulations results. The converter is
designed for a nominal voltage conversion ratio M = Vo/Vg = 120 V/10 V = 12 and with
fs= 40 kHz. The converter is simulated in MATLAB/Simulink environment to get a
regulated output voltage even though there are variations in load conditions.
5.1 RESULTS
The software and hardware results justifies that converter selected is optimum for the
design we considered. From the simulation result it is clear that the converter has higher
voltage gain at moderate duty ratio. Also the stress across the switch is only half the
ouput voltage. The proposed converter is also well suitable for higher power applications
since it allows the use of low-voltage high-performance semiconductor devices.

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CHAPTER 6
CONCLUSION
A high step-up single-switch converter with high voltage gain and reduced switch
voltage stress has been proposed. Features of the proposed converters and their operating
principles have been discussed Compared to the previous single-switch high step-up
topologies, the proposed converters have a higher voltage gain (for D ≤0.82), as well as a
lower blocking voltage across the controlled switch which allows the utilization of a
MOSFET switch with a lower drain-to-source resistance. Therefore, the proposed
converters are a competitive alternative for practical applications where a high voltage
transfer gain is demanded, such as renewable energy systems, with a simple structure
and a high efficiency. Finally, the simulation and experimental results prove their
functionality and confirm the theoretical analysis presented.
FUTURE SCOPE:
The gain of converters can also be used by adding additional multiplier cells or
additional inductor cells.

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REFERENCES
[1] Abbas A. Fardoun,Esam H. Ismail,”Ultra Step-Up DCDC Converter With
Reduced Switch Stress”, IEEE Trans. Ind. Appl., vol. 46, no. 4, Sep./Oct. 2010
[2] Sreehari G Nair, Reshma M, Kshemada Devi .V, Sheeja G, “High gain DC-DC
converter with load regulation”.
[3] Q. Zhao, F. Tao, and F. C. Lee, “High-efficiency, high step-up dc–dc converters,”
IEEE Trans. Power Electron., vol. 18, no. 1, pp. 65–73, Jan. 2003.
[4] M. Prudente, L. L. Pfitscher, G. Emmenderfer, E. F. Romaneli, and R. Gules,”
Voltage multiplier cells applied to non-isolated DC- DC converters” ,IEEE Trans.
Power Electron., vol. 23, no. 2, pp. 871 -887, Mar. 2008

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APPENDIX

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DELAY PROGRAM:
#include<pic.h>
void interrupt timer(unsigned int count);
int main(void){
int count=0;
TRISB=0X00;
PORTB=0X00;
TRISC=0X00;
PORTC=0X00;
TMR0IF=0;
GIE=1;
PEIE=1;
TMR0IE=1;
T0CS=0;
PSA=0;
PS2=1;
PS1=1;
PS0=1;
TMR0IF=0;
TMR0=254;
while(1);
void interrupt timer(unsigned int count){

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TMR0IF=0;
count++;
if(count==1)
RB0=~RB0;
RC0=~RC0;
if(count==2)
RB1=~RB1;
RC1=~RC1;
else if(count==2)
RB2=~RB2;
RC2=~RC2;
else if(count==3)
RB3=~RB3;
RC3=~RC3;
else if(count==4)
RB4=~RB4;

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RC4=~RC4;
else if(count==5)
RB5=~RB5;
RC5=~RC5;
count=0;
TMR0=254;

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ULTRA STEP UP DC-DC CONVERTER WITH

REDUCED SWITCH STRESS

Mini Project Report

Submitted in partial fulfillment of the requirements

1. AKSHAY VISHNU Reg. No.: 19152003

Department of Electrical & Electronics Engineering

COLLEGE OF ENGINEERING THALASSERY

Guide : Mini Project Coordinator:

Ms. Arathi M Nair Ms. Lakshmi S Suresh

HEAD OF THE DEPARTMENT

Dr. Reeda Kunhimangalam

COLLEGE OF ENGINEERING THALASSERY

Guide : Mini Project Coordinator:

Ms. Arathi M Nair Ms. Lakshmi S Suresh

HEAD OF THE DEPARTMENT

Dr. Reeda Kunhimangalam

COLLEGE OF ENGINEERING THALASSERY

Guide : Mini Project Coordinator:

Ms. Arathi M Nair Ms. Lakshmi S Suresh

HEAD OF THE DEPARTMENT

Dr. Reeda Kunhimangalam

COLLEGE OF ENGINEERING THALASSERY

Guide : Mini Project Coordinator:

Ms. Arathi M Nair Ms. Lakshmi S Suresh

HEAD OF THE DEPARTMENT

Dr. Reeda Kunhimangalam

COLLEGE OF ENGINEERING THALASSERY

Guide : Mini Project Coordinator:

Ms. Arathi M Nair Ms. Lakshmi S Suresh

HEAD OF THE DEPARTMENT

Dr. Reeda Kunhimangalam

We express our sincere gratitude to Dr. Sajeev V, Principal, College of

4 HARDWARE AND SOFTWARE

2.1 ULTRA STEP UP DC-DC CONVERTER

WITH REDUCED SWITCH STRESS 4

2.2 CCM STAGE 1 5

2.3 CCM STAGE 2 6

2.4 KEY WAVEFORMS OF PROPOSED

2.5 EQUIVALENT CIRCUIT IN DCCM AND

INDUCTOR CURRENT WAVEFORM 9

3.1 SIMULATION DIAGRAM OF PROPOSED

3.2 INPUT WAVEFORM 14

3.3 OUTPUT WAVEFORM ACROSS

3.4 VOLTAGE WAVEFORM ACROSS

4.1 POWER MOSFET STP75NF75 17

4.2 SCHOTTKY RECTIFIERS 19

4.6 VOLTAGE REGULATOR 22

4.7 CRYSTAL OSCILLATOR 23

4.1 HARDWARE COMPONENTS 16

4.2 VOLTAGE REGULATOR RATING 23

Recent trends in renewable energy technology motivate designing engineers to

1.1 CONVENTIONAL TOPOLOGIES:

DEPT. OF EEE 1 COLLEGE OF ENGINEERING THALASSERY

DEPT. OF EEE 2 COLLEGE OF ENGINEERING THALASSERY

The proposed converter has the following advantages:

1. a high-ratio gain at a moderate duty cycle;

The principle of operation is illustrated together with the steady-state analysis.

DEPT. OF EEE 3 COLLEGE OF ENGINEERING THALASSERY

Fig.2.1 Ultra step up dc-dc converter with reduced switch stress

DEPT. OF EEE 4 COLLEGE OF ENGINEERING THALASSERY

2.2 MODES OF OPERATION

2.2.1 CONTINOUS CONDUCTION MODE (CCM):

One switching cycle can be divided into two stages.