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Cce 10 TopStar X03 REV A PDF
Cce 10 TopStar X03 REV A PDF
Board name: Mother Board Schematic 1. System Block Diagram & Schematic page description;
Project name: X03 2. Power Block Diagram & Discription;
Version: Ver A 3. Annotations & information;
Initial Date: 4. Schematic modify Item and history;
New update: 5. Power on & off Sequence;
6. ACPI Mode Switch Timings;
7. Power On Sequence Map;
8. CLOCK Distribution;
C C
9. Power Distribution;
Topstar Confidential
Hardware drawing by: 许许许 Hardware check by: EMI Check by:
B B
A A
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name Title
Size Project Name Rev
A3 X03
A
Date: Thursday, April 29, 2010 Sheet 1 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
CONTENT
Topstar Confidential
ShenZhen Topstar Industry Co.,LTD 1 Title
D 2 System Block & Sch Page D
Speaker
BIOS
8Mbit
A A
+V3.3AL TOPSTAR TECHNOLOGY
Swain Xu(许许许)
PG 25
SD/MMC/MS/XD CARD Page Name System Block & Index
D
P02H POWER BLOCK Ver:A D
1.1V,6A
Switch
Chipset Power
Always power ISL6545 DDR Power GFX Power
ISL62382 ISL6545 ISL6545
+V1.8 6A +0.89S 3A
+V3.3AL,5A
/+V5AL,4A +V1.05S,4A
B B
MOSFET
Switch
+V3.3S,4A
MOSFET
/+V5S,4A Switch LDO LDO
A A
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name PWR Block & description
Size Project Name Rev
A3 P01
A
Date: Thursday, April 29, 2010 Sheet 3 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
Voltage Rails
I2C SMB Address
+VDC Primary DC system power supply (6V-9.5V)
Device Address Hex Master
+VBATTERY Battery Power supply (6-8.4V) Clock Generator 1101 001x D2 ICH7-M
D D
+VCC_CORE Core Voltage for CPU
SO-DIMM0 1010 000x A0 ICH7-M
CPU Thermal Sensor 1001 100x 98 KBC
+V1.05S 1.05V for Calistoga & ICH7M core / FSB VTT Smart Battery 0001 011x 16 KBC
+V1.8 1.8V power rail for DDR2
PCIE Slot TBD TBD ICH7-M
PCB Layers
Top(Signal1)
VCC 2
Wake up Events
Signal 3 Trace Impedence:55ohm +/-15%
LID switch from EC
Signal4
Power switch from EC
Ground 5
Bottom(Signal6)
B B
PCB Footprints
3 5 4
USB Table
SOT23 SOT23_5
USB Port# Function Description
1 2 1 2 3
0 Standard USB2.0 Port
1 Standard USB2.0 Port
2 Standard USB2.0 Port
3 MINICARD_USB ns: Component marked "ns" is not stuff
4 CAM_USB
5 MINICARD_USB
A 6 CR_USB TOPSTAR TECHNOLOGY A
Swain Xu(许许许)
7 NC Page Name
NOTE
Size Project Name Rev
A3 P01
A
Date: Thursday, April 29, 2010 Sheet 4 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
P02 VerB
2009-8-21
D D
PG13: Add SM_VREF circuit
PG20: change SIMCARD connector to 621200700002
2009-8-24
PG25: Stuff TPCLK TPDAT pull up resistors
2009-8-27
PG31: Delete 0.89S reserved circuit
PG33: Delete 1.2S reserved circuit
2009-9-7
PG18: change IT1337E power rail to +V3.3AL follow demo
2009-9-8
PG6: Delete Clock Generator SMBUS 0ohm resistors
PG10: Delete 1.8S 1.2S colay circuit,change net name
C C
PG11: Delete reserved 0ohm resistors that connect GND and GND_VGA
PG13: change 2.2uF capacitors from 0805 to 0603 for layout issue
2009-9-9
PG25: Delete keyboard scanin pull up RN
PG25: Delete A20gate RCIN# reserved 2N7002
PG31: Delete colay +V5S
PG35: Delete IMVP_PWRGD reserved circuit
2009-9-14
PG6: change PCI clcok,ICH 14.318MHz clock source resistors from 22ohm
to 33ohm for SI issue
2009-9-15
PG6: change Clock Generator Crystal Y3 to TFL small package for layout issue
B PG16: change boardid from vera to verb B
2009-9-17
PG6: BUS Frequence controlled by CPU
P02 VerC
2009-10-23
PG23: ADD MSI wifi/bt 2in1 module connector and peripheral circuit
PG25: ADD MSI wifi/bt 2in1 module 3 control signals to EC gpio
2009-10-26
A PG29: delet open points of +V3.3AL and +V5AL A
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
2009-10-27 Page Name Sch Modify and history
PG19: change part reference of pcie nut to PCIE_NUT2 Size Project Name Rev
A3 P01
A
2009-10-28 Date: Thursday, April 29, 2010 Sheet 5 of 39
PG25: Colay small package EC PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
U14 +V1.05S 7,10,15,16,24,31,32,34
SLG8SP510T
+V3.3S FB7 TSSOP64_0D5_6D1
100ohm@100MHz,3A
FB0805 2 VDD_PCI
SMBUS ADD:1101 001X
1 2 +V3.3S_CK_VDD 9 48
VDD_48 IO_VOUT DEL 0 ohm resistors 090908
16 VDD_PLL3
C117 C116 C118 61 63
VDD_REF SMB_DATA SMB_DATA_S 13,16,19
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 64
SMB_CLK SMB_CLK_S 13,16,19
C0402 C0402 C0402 39 VDD_SRC
D 55 VDD_CPU D
+V3.3S_CK_VDD 38 R372 0 R0402
SRC5/PCI_STOP# PM_STP_PCI# 15
+VDDIO_CLK 12 37 R373 0 R0402
VDD_IO SRC5#/CPU_STOP# PM_STP_CPU# 15
C98 C103 C93 +VDDIO_CLK 20
10UF/6.3V,X5R 4.7UF/10V,Y5V 0.047uF/16V,X7R +VDDIO_CLK VDD_PLL3_IO
26 VDD_SRC_IO_1 CPU0 54 CLK_CPU_BCLK 7
C0805 C0805 C0402 36 53
VDD_SRC_IO_2 CPU0# CLK_CPU_BCLK# 7
45 VDD_SRC_IO_3
+VDDIO_CLK 49 51
VDD_CPU_IO CPU1 CLK_MCH_BCLK 9
CPU1# 50 CLK_MCH_BCLK# 9
1 PCI0/OE#_0/2_A
SRC8/CPU2_ITP 47
3 PCI1/OE#_1/4_ASRC8#/CPU2#_ITP 46
+V3.3S change from 22ohm to 33ohm for SI issue 090914
TME 4 34
PCI2/TME SRC10 CLK_PCIE_EXPCARD 19
SRC10# 35 CLK_PCIE_EXPCARD# 19
R313 33 R0402 5
25 PCI_CLK_EC PCI3/FSD
2
PCIF5/ITP_EN SRC9
SRC9# 31 CLK_MCH_EXP# 7
CLK_XTAL_IN 60
+VDDIO_CLK R299 10K R0402 XTAL_IN
SRC7/OE#_8 44
C100 C119 Set to SRC8 CLK_XTAL_OUT 59 43
10UF/6.3V,X5R 0.1uF/10V,X5R No more than 500 milXTAL_OUT SRC7#/OE#_6
C0805 C0402 18 CR_USB48 R316 22 R0402 41
SRC6 DREFSSCLK 9
R310 22 R0402 10 40
14 CLK_USB48 USB_48/FSA SRC6# DREFSSCLK# 9
+VDDIO_CLK CLK_BSEL0 R304 2.2K R0402 27
SRC4 CLK_PCIE_ICH 14
C C99 C120 CLK_BSEL1 57 28 C
FSB/TEST_MODE SRC4# CLK_PCIE_ICH# 14
10UF/6.3V,X5R 0.1uF/10V,X5R CLK_BSEL2 R384 10K R0402 62
C0805 C0402 REF0/FSC/TEST_SEL
SRC3/OE#_0/2_B 24 CLK_PCIE_LAN 26
ns R395 33 R0402 25
15 CLK_ICH14 SRC3#/OE#_1/4_B CLK_PCIE_LAN# 26
change from 22ohm to 33ohm for SI issue 090914 8 21
VSS_PCI SRC2/SATA CLK_ICH_SATA 15
+VDDIO_CLK 11 22
VSS_48 SRC2#/SATA# CLK_ICH_SATA# 15
C105 C94 C115 C96 15
10UF/6.3V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R VSS_IO
19 VSS_PLL3 SRC1/SE1 17
C0805 C0402 C0402 C0402 52 18
VSS_CPU SRC1#/SE2
23 VSS_SRC_1
29 VSS_SRC_2 SRC0/DOT96 13 DREFCLK 9
58 VSS_REF SRC0#/DOT96# 14 DREFCLK# 9
+VDDIO_CLK 42
C95 C303 VSS_SRC3 VR_CLK_EN R385 0 R0402
CK_PWRGD/PWRDWN# 56 CK505_CLK_EN# 15,35
0.1uF/10V,X5R 27pF/50V,NPO CLK_XTAL_IN
C0402 C0402
1
Remove 4P2R resistor.
Y3 许许许 100315
14.318180MHz
XS2_3D3 Add R385 at CK_PWRGD for Power solution update
C301 许许许 100315
2
27pF/50V,NPO CLK_XTAL_OUT
C0402 CLK_ICH14 C313 10PF/50V,NPO ns
C0402
+V3.3S CLK_USB48 C295 10PF/50V,NPO ns
C0402
PCI_CLK_DEBUG C291 10PF/50V,NPO ns
C0402
B R131 PCI_CLK_EC C292 10PF/50V,NPO ns B
10K C0402
R0402 PCI_CLK_ICH C294 10PF/50V,NPO ns
ns C0402
VR_CLK_EN
3
R139 Q2
1K 2N7002 +V3.3S
R0402 SOT23 C129 R130
1 ns 0.1uF/10V,X5R 10K
15,35 CK505_CLK_EN#
CLK_BSEL0 R271 1K R0402 ns C0402 R0402 MCH_CLKREQ R315 10K R0402
7 CPU_BSEL0 MCH_BSEL0 9 ns ns
2
CLK_BSEL1 R272 1K R0402 MPCIE_CLKREQ R389 10K R0402
7 CPU_BSEL1 MCH_BSEL1 9
CLK_BSEL2 R273 1K R0402
7 CPU_BSEL2 MCH_BSEL2 9
TME R314 10K R0402
+V3.3S
0:Normal mode
1:No Overclocking
Swain Xu(许许许)
0.1UF/10V,X5R 0.1UF/10V,X5R
Page Name
1 0 1 100MHz R300
C0402 C0402 CK505M
10K Size Project Name Rev
R0402 A3 P01 A
0 1 1 166MHz Date: Thursday, April 29, 2010 Sheet 6 of 39
PROPERTY NOTE: this document contains information confidential and property to
EMI CAP TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V1.05S 6,10,15,16,24,31,32,34
PINEVIEW_M PINEVIEW_M +V3.3S 6,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
U3D U3A
? +V3.3AL 12,14,15,16,18,19,23,25,26,27,28,29,30,31,32,33,35
?
REV = 1.1
U25 E7 REV = 1.1
12 LVD_A_CLK_DN LVD_A_CLKM SMI_B H_SMI# 15
U26 H7 C22 0.1uF/10V,X5R F3 G2 R28 0 R0402
+V3.3S 12 LVD_A_CLK_DP LVD_A_CLKP A20M_B H_A20M# 15 14 DMI_TXP0 DMI_RXP_0 DMI_TXP_0 DMI_RXP0 14
R23 H6 C21 0.1uF/10V,X5R F2 G1 R29 0 R0402
12 LVD_A_DATA0_DN LVD_A_DATAM_0 FERR_B H_FERR# 15 14 DMI_TXN0 DMI_RXN_0 DMI_TXN_0 DMI_RXN0 14
R24 F10 C28 0.1uF/10V,X5R H4 H3 R39 0 R0402
12 LVD_A_DATA0_DP LVD_A_DATAP_0 LINT00 H_INTR 15 14 DMI_TXP1 DMI_RXP_1 DMI_TXP_1 DMI_RXP1 14
ICH
N26 F11 C26 0.1uF/10V,X5R G3 J2 R45 0 R0402
12 LVD_A_DATA1_DN LVD_A_DATAM_1 LINT10 H_NMI 15 14 DMI_TXN1 DMI_RXN_1 DMI_TXN_1 DMI_RXN1 14
12 LVD_A_DATA1_DP N27 LVD_A_DATAP_1 IGNNE_B E5 H_IGNNE# 15
DMI
R26 F8 R258 0 R0402
H_STPCLK# 15
R37 R50 12 LVD_A_DATA2_DN R27
LVD_A_DATAM_2 STPCLK_B
D 2.2K 2.2K 12 LVD_A_DATA2_DP LVD_A_DATAP_2
D
R0402 R0402 G6
DPRSTP_B H_DPRSTP# 15
LCTLA_CLK LVD_IBG R22 G10 N7 L10
LVD_IBG DPSLP_B H_DPSLP# 15 6 CLK_MCH_EXP# EXP_CLKINN EXP_RCOMPO
LCTLA_DATA J28 G8 N6 L9
LVD_VBG INIT_B H_INIT# 15 6 CLK_MCH_EXP EXP_CLKINP EXP_ICOMPI
LVD_VREFH_OUT_R N22 E11 H_BPM4_PRDY# L8
LVD_VREFL_OUT_R N23 LVD_VREFH PRDY_B H_BPM5_PRDQ# EXP_RBIAS
F15 R10
LVDS
LVD_VREFL PREQ_B RSVD_R10
12,25 LVDS_BKLTEN L27 LBKLT_EN R9 RSVD_R9 RSVD_TP_N11 N11
12 LBKLT_CTL L26 LBKLT_CTL N10 RSVD_N10 RSVD_TP_P11 P11
LCTLA_CLK L23 LCTLA_CLK THERMTRIP_B E13 PM_THRMTRIP# 15,24 PWROK 预预0 ohm N9 RSVD_N9
R277 R278
LCTLA_DATA K25 电电,以以debug用 49.9,1% 750
LCTLB_CLK
K23 R0402 R0402
12 LDDC_CLK
K24
LDDC_CLK R245 68 R0402 许许许
12 LDDC_DATA LDDC_DATA +V1.05S K2 K3
H26 ns RSVD_K2 RSVD_K3
12 LVDD_EN LVDD_EN VR_PROCHOT# J1 L2
C18 RSVD_J1 RSVD_L2
PROCHOT_B R62 0 R0402 M4 M2
CPUPWRGOOD W1 H_PWROK 15 Remove R232 L3
RSVD_M4 RSVD_M2
N2
许许许 100315 RSVD_L3 RSVD_N2
NOTE
Place Resistor close to PNV PNV_22MM_REV1P10
+V1.05S
A13 GTLREF_EA 1 OF 6
GTLREF PNV_22MM_REV1P10 ?
R55 2.37K,1% LVD_IBG H27
R0402 VSS
CPU
B20 BPM_2_1#/RSVD BSEL_2 K6 CPU_BSEL2 6
H_BPM2_N2 C20 976,1% R0402
H_BPM2_N3 BPM_2_2#/RSVD T6 ICTP ns R0402 GTLREF_EA
B21 BPM_2_3#/RSVD VID_0 H30
H29 T5 ICTP ns EXTBGREF
VID_1 T7 ICTP ns C221
VID_2 H28
1uF/10V,X5R
G30 T4 ICTP ns C238 C220 C0402 R252
VID_3
1uF/10V,X5R
CPU_RSVD G5 G29 T3 ICTP ns C0402 R269 C0402 2K,1%
RSVD_G5 VID_4 R0402
220pF/50V,X7R
H_TDI D14 F29 T2 ICTP ns 3.32K,1%
H_TDO TDI VID_5 T1 ICTP ns
D13 TDO VID_6 E29 R0402
H_TCK B14
H_TMS TCK
C14 TMS RSVD_L7 L7
H_TRST# C16 D20
TRST_B RSVD_D20
RSVD_H13 H13
RSVD_D18 D18
H_THERMDA D30
H_THERMDC THRMDA_1
E30 THRMDC_1 RSVD_TP_K9 K9
RSVD_TP_D19 D19
K7 EXTBGREF
+V1.05S EXTBGREF
R15 +V3.3S
R257 ns 51 R0402 H_BPM_N0 220
R249 ns 51 R0402 H_BPM_N1 R0402
R238 ns 51 R0402 H_BPM_N2 C30
R250 ns 51 R0402 H_BPM_N3 RSVD_C30
D31 RSVD_D31
R246 ns 51 R0402 H_BPM2_N0 C17
R243 ns 51 R0402 H_BPM2_N1 0.1uF/10V,X5R
B R234 ns 51 R0402 H_BPM2_N2 4 OF 6 C0402 B
R233 ns 51 R0402 H_BPM2_N3 ?
R255 ns 51 R0402 H_BPM4_PRDY# H_THERMDA
1
R244 51 R0402 H_BPM5_PRDQ#
EC SMBUS ADD:1001 100X
VCC
R266 62 R0603 CPU_RSVD C20 2 8
DXP SMBCLK I2C_CLK 25
R236 51 R0402 H_TDI 2200pF/25V,X7R
R248 51 R0402 H_TMS C0402 3 7
DXN SMBDATA I2C_DATA 25
R254 51 R0402 H_TDO
H_THERMDC G781
ADM1032AR 6
LM86CIM ALERT# OVT_SHUTDOWN# 24
MAX6657MSA 4 THERM# R27 0 R0402
GND
SOIC-8 THERM# PM_THRM# 15
ns
C18 C19
R251 51 R0402 H_TCK U2 R31 R26 27pF/50V,NPO 27pF/50V,NPO
5
R247 51 R0402 H_TRST# F75393S 10K 10K C0402 C0402
SO8_50_150 R0402 R0402
+V3.3AL NOTE
1.H_THERMDA/C线线10 MILS,并并并并线,
然然然然然然然. +V3.3S
R229
10K
R0402
2.H_THERMDA/C并线走走19V及VGA或或或线并线
EC_PROCHOT# 25
A A
+V1.05S TOPSTAR TECHNOLOGY
Q16 R235
MMBT3904-F 1K Swain Xu(许许许)
2
13
PINEVIEW_M
MA_A_A[14:0]
MA_A_A0 AH19 AD2 MA_DQS#0
MA_A_A1 DDR_A_MA_0 DDR_A_DQSB_0
AJ18 DDR_A_MA_1 DDR_A_DM_0 AD4 MA_DM0
MA_A_A2 AK18
MA_A_A3 DDR_A_MA_2 MA_DATA0
AK16 DDR_A_MA_3 DDR_A_DQ_0 AC4
5
5
4
4
DDR_A_DQ_23
AK24 DDR_A_ODT_0
AH26 DDR_A_ODT_1 DDR_A_DQS_3 AK5 MA_DQS3
AH24 DDR_A_ODT_2 DDR_A_DQSB_3 AK3 MA_DQS#3
AK27 DDR_A_ODT_3 DDR_A_DM_3 AJ3 MA_DM3
AH1 MA_DATA24
DDR_A_DQ_24 MA_DATA25
DDR_A_DQ_25 AJ2
AG15 AK6 MA_DATA26
DDR_A_CK_0 DDR_A_DQ_26 MA_DATA27
AF15 DDR_A_CKB_0 DDR_A_DQ_27 AJ7
AD13 AF3 MA_DATA28
DDR_A_CK_1 DDR_A_DQ_28 MA_DATA29
AC13 DDR_A_CKB_1 DDR_A_DQ_29 AH2
AL5 MA_DATA30
DDR_A_DQ_30 MA_DATA31
DDR_A_DQ_31 AJ6
AC15 DDR_A_CK_3
AD15 DDR_A_CKB_3 DDR_A_DQS_4 AG22 MA_DQS4
AF13 DDR_A_CK_4 DDR_A_DQSB_4 AG21 MA_DQS#4
AG13 DDR_A_CKB_4 DDR_A_DM_4 AD19 MA_DM4
M_CKE0
M_CKE1
M_CS#0
M_CS#1
M_ODT0
M_ODT1
AG27 MA_DQS#5
MA_A_WE#
DDR_A_DQSB_5
MA_A_BS#0
MA_A_BS#1
MA_A_BS#2
MA_A_CAS#
MA_A_RAS#
AB4 VSS DDR_A_DM_5 AJ27 MA_DM5
AK8
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR0
M_CLK_DDR1
RSVD_AK8
13
13
13
13
13
13
13
13
13
13
13
13
3
3
AG25 MA_DATA41
13
13
13
13
DDR_A_DQ_41
DDR_A_DQ_42 AD25 MA_DATA42
AB11 RSVD_TP_AB11 DDR_A_DQ_43 AD24 MA_DATA43
AB13 RSVD_TP_AB13 DDR_A_DQ_44 AC22 MA_DATA44
R72
DDR_RPU AJ26
DDR_RPU
5.6K,1%
AG31 MA_DATA48
5.6K,1%
DDR_A_DQ_48
DDR_A AG30 MA_DATA49
+V1.5
DDR_A_DQ_49
DDR_A_DQ_50 AD30 MA_DATA50
ns
AD29 MA_DATA51
10K
R71
DDR_A_DQ_51
R0402
AJ30 MA_DATA52
R0402
DDR_A_DQ_52
DDR_A_DQ_53 AJ29 MA_DATA53
DDR_A_DQ_54 AE29 MA_DATA54
DDR_A_DQ_55 AD28 MA_DATA55
许许许 100315
DDR3_DRAM_RST# 13
?
?
DDR3_DRAM_PWROK 25,30,32
U3B
2 OF 6
REV = 1.1
Note:
DDE_RPD
DDR_RPU
PNV_22MM_REV1P10
DDR_VREF
A3
Size
Date:
R81
R82
C65
Page Name
C0402
13 MA_DQS[7:0]
13 MA_DM[7:0]
13 MA_DATA[63:0]
13 MA_DQS#[7:0]
Project Name
0.1UF/10V,X5R
R0402
R0402
80.6,1%
80.6,1%
+V1.5
+V1.5
R0402
1K,1%
R0402
1K,1%
R83
R84
C0402
+V1.5
P01
1
1
Sheet
Swain Xu(许许许)
10,13,30,32,33,34
8
TOPSTAR TECHNOLOGY
Diamondville (PWR&GND)(2of2)
of 39
to others or used for any purpose other than that for which it was obtained without
PROPERTY NOTE: this document contains information confidential and property to
A
Rev
+V3.3S 6,7,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
PINEVIEW_M Note:
U3C HSYNC/VSYNC: Locate series
? esistor strsps within 750 mil of MCH
D12 REV = 1.1
6 MCH_BSEL0 XDP_RSVD_00 R0402 10 R42
6 MCH_BSEL1 A7 XDP_RSVD_01 CRT_HSYNC M30 CRT_HSYNC 11
D6 M29 R0402 10 R41 CRT_VSYNC 11
6 MCH_BSEL2 XDP_RSVD_02 CRT_VSYNC
C5 XDP_RSVD_03
D D
C7 XDP_RSVD_04
XDP_RSVD_5 C6 N31
XDP_RSVD_05 CRT_RED CRT_RED 11 +V3.3S
D8 XDP_RSVD_06 CRT_GREEN P30 CRT_GREEN 11
B7 XDP_RSVD_07 CRT_BLUE P29 CRT_BLUE 11
VGA
A9 XDP_RSVD_08 CRT_IRTN N30
XDP_RSVD_9 D9 XDP_RSVD_09 R30 10K R0402 PM_EXTTS0#
C8 XDP_RSVD_10
XDP_RSVD_11 B8 XDP_RSVD_11
C10 XDP_RSVD_12 CRT_DDC_DATA L31 CRT_DDC_DATA 11
D10 XDP_RSVD_13 CRT_DDC_CLK L30 CRT_DDC_CLK 11
B11 XDP_RSVD_14
B10 XDP_RSVD_15 DAC_IREF P28 DACREFSET R70 665,1%R0402 R779 为T 物物, 需需需需 +V3.3S
B12
XDP_RSVD_17 C11
XDP_RSVD_16
Y30 许许许 090513
XDP_RSVD_17 DPL_REFCLKINP DREFCLK 6
DPL_REFCLKINN Y29 DREFCLK# 6
DPL_REFSSCLKINP AA30 DREFSSCLK 6 需为R0402,重重重重物重 090910
DPL_REFSSCLKINN AA31 DREFSSCLK# 6
R35 R36
L11 2.2K 2.2K
RSVD_L11 R0402 R0402
CRT_DDC_DATA
3 OF 6 K29 R33 0 R0402
PNV_22MM_REV1P10 PM_EXTTS#_1/DPRSLPVR? PM_DPRSLPVR 15
J30 CRT_DDC_CLK
C PM_EXTTS#_0 PM_EXTTS0# 13 C
PWROK L5 IMVP_PWRGD 15,25,35
RSTINB AA3 BUF_PLT_RST# 15,19,25,26
HPL_CLKINN W8 CLK_MCH_BCLK# 6
HPL_CLKINP W9 CLK_MCH_BCLK 6
AA7
MISC
RSVD_TP_AA7
AA6 RSVD_TP_AA6
R5 R54 150,1% R0402 CRT_BLUE
RSVD_TP_R5
R6 RSVD_TP_R6 R60 150,1% R0402 CRT_GREEN
AA21 RSVD_TP_AA21
W21 R48 150,1% R0402 CRT_RED
RSVD_TP_W21
T21 RSVD_TP_T21
V21 RSVD_TP_V21 150ohm电电电GMCH
并线电走37.5ohm
R240 1K,1% R0402 ns XDP_RSVD_5
150ohm电电电VGA口
R256 1K,1% R0402 XDP_RSVD_9 并线电走50ohm
R239 1K,1% R0402 ns XDP_RSVD_11
PLACE 150 OHM
B RESISTORS CLOSE TO B
R237 1K,1% R0402 ns XDP_RSVD_17
GMCH
TOPSTAR TECHNOLOGY
A Swain Xu(许许许) A
Page Name Calistoga(HOST)
Size Project Name Rev
B P01 A
Date: Thursday, April 29, 2010 Sheet 9 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
PINEVIEW_M
U3F
?
+V3.3S 6,7,9,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
+V0.89S +VCC_CORE A11 REV = 1.1
U3E
+V1.5 8,13,30,32,33,34 VSS VSS F24
? +V1.05S 6,7,15,16,24,31,32,34 A16 VSS VSS F28
PINEVIEW_M +V1.5S 14,16,19,23,33,34 A19 VSS VSS F4
REV = 1.1 A23 A29
+V0.89S VCC +VCC_CORE 32,35 RSVD_NCTF VSS G15
C247 C257 C246 C248 VCC A25
A27
6.04A +V0.89S 31,34 A3
A30
RSVD_NCTF VSS G17
VCC +V1.8S 31,32 RSVD_NCTF VSS G22
C0402
C0402
C0402
C0402
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
VCC B23 A4 RSVD_NCTF VSS G27
T13 VCCGFX VCC B24 AA13 VSS VSS G31
2.64A T14
T16
VCCGFX VCC B25
B26
AA14
AA16
VSS VSS H11
D
VCCGFX VCC VSS VSS H15 D
T18 VCCGFX VCC B27 AA18 VSS VSS H2
T19 VCCGFX VCC C24 AA2 VSS VSS H21
+V0.89S V13 C26 AA22
VCCGFX VCC VSS VSS H25
V19 VCCGFX VCC D23 AA25 VSS VSS H8
W14 VCCGFX VCC D24 AA26 VSS VSS J11
W16 D26 +VCC_CORE AA29
VCCGFX VCC VSS VSS J13
W18 VCCGFX VCC D28 AA8 VSS VSS J15
GFX/MCH
C250 C254 C255 W19 E22 AB19
VCCGFX VCC VSS VSS J4
VCC E24 AB21 VSS VSS K11
C0603
C0402
C0402
1uF/10V,X5R
1uF/10V,X5R
CPU
VCC C0402 C0402 C0402 C0402 C0805 VSS
VCC F21 AB29 VSS VSS K19
F22 ns AB30
VCC VSS VSS K26
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
10uF/6.3V,X5R
ns F25 AC10
VCC VSS VSS K27
VCC G19 AC11 VSS VSS K28
VCC G21 AC19 VSS VSS K30
GND
+V1.5 G24 AC2
VCC VSS VSS K4 6 OF 6
VCC H17 AC21 PNV_22MM_REV1P10
VSS VSS K8
H19 AC28 ?
+V1.5 VCC VSS VSS L1
VCC H22 AC30 VSS VSS L13
5 OF 6 H24 C359 C360 Gerber Footprint为C1206,实实实物为0805 AD26
C271 C276 C269 C277
PNV_22MM_REV1P10 ? VCC 2010.03.23王王王 VSS VSS L18
VCC J17 AD5 VSS VSS L22
C0402 C0402 C0402 C0402 AK13 J19 AE1
VCCSM VCC VSS VSS L24
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
0.1uF/10V,X5R
U7 VCCA_DDR
length AH8 VSS VSS P21
U8 VCCA_DDR AJ1 RSVD_NCTF VSS P3
U9 VCCA_DDR AJ16 VSS VSS P4
C229 C242 C153 C253 V2 Route VCCSENSE and VSSSENSE AJ31
C0805 C0805 C0805 C0402 VCCA_DDR traces at 27.4 Ohms with 50 VSS VSS R25
V3 VCCA_DDR AK1 RSVD_NCTF VSS R7
mil spacing
1uF/10V,X5R
4.7uF/10V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
0.1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
+V1.8S C0402 C0402 C47 600ohm@100MHz,1.5A C51 C25
L1 C0805 C0402 VSS VSS Y4
C31
LVDS
FB0805 RSVD_NCTF
1uF/10V,X5R
1 2 T30 ns D22
EXP\CRT\PLL
+V1.05S
0.35A B2
C2
VCCRING_WEST
P2 T8 ICTP ns +V1.8S
F17
F19
VSS
VCCRING_WEST RSVD VSS
A21 VCC_LGI_VID VCCSFR_DMIHMPLL AA1
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
A
1uF/10V,X5R A
ns TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name Calistoga(Graphic)
Size Project Name Rev
A3 P01 A
+V5S 12,16,17,21,22,23,25,31,33,34,35
+V3.3S 6,7,9,10,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
D3 FB2
FB5 1 2 1 2
47ohm@100MHz,500mA GND_VGA +V3.3S +V3.3S
FB0603 1N5819HW-F 100ohm@100MHz,3A
1 2 ROUT SOD123 R264
9 CRT_RED FB0805 100K
3
R0402 VGA
17
R63 C44 C45 D8 R276 R265
150,1% BAT54S 1K 1K
R0402 5.6pF/50V NPO 15pF/50V,NPO SOT23 6 GND
CONNECTOR TOP VIEW R0402 R0402
C0402 ROUT GND_VGA 1 R NC
11 ns ns
7 GND
2
FB4 GOUT SDA 5VDDCDA
2 G 12
47ohm@100MHz,500mA
GND_VGA 8 GND
FB0603 GND_VGA +V3.3S BOUT 3 B HSYNC 13 CRT_HSYNC
CRT_HSYNC 9
1 2 GOUT 9 NC
9 CRT_GREEN
4 NC VSYNC 14 CRT_VSYNC
CRT_VSYNC 9
3
10 GND
R47 GND CLK 5VDDCCK
C29 C30 5 15
150,1% D7 shell
R0402 5.6pF/50V NPO 15pF/50V,NPO BAT54S shell
C0402 SOT23 C10518-11505-L
16
VGADMF C252 C239 C235 C227
2
FB3 GND_VGA 15PF/50V,NPO 100pF/50V,NPO 100pF/50V,NPO 15PF/50V,NPO
47ohm@100MHz,500mA C0402 C0402 C0402 C0402
C FB0603 GND_VGA +V3.3S ns ns C
1 2 BOUT
9 CRT_BLUE
3
GND_VGA
R32 C24 C25 GND_VGA
150,1% D4
R0402 5.6pF/50V NPO 15pF/50V,NPO BAT54S No external level shifter for HSync & VSync at PINEVIEW
C0402 1 SOT23 许许许 090605
2
150ohm电电电 GND_VGA +V3.3S
并线电走50ohm GND_VGA
+V3.3S +V5_VGA
R267 R263
2.2K Q17 2.2K
R0402 2N7002 R0402
2 3 5VDDCCK
9 CRT_DDC_CLK
3
+V3.3S D26
1
+V3.3S +V5_VGA BAT54S
B SOT23 B
2
R281 R282
2.2K Q18 2.2K +V5_VGA
R0402 2N7002 R0402 GND_VGA
2 3 5VDDCDA
9 CRT_DDC_DATA
3
+V3.3S D29
1
BAT54S
+V3.3S +V3.3S SOT23
2
D28
D27
2
C241 2 +V5_VGA
CRT_HSYNC 3 0.1uF/10V,X5R GND_VGA
C0402 CRT_VSYNC 3 C237
1 0.1uF/10V,X5R
1 C0402
BAT54S
SOT23 GND_VGA BAT54S
SOT23 GND_VGA
A A
TOPSTAR TECHNOLOGY
+V3.3AL 14,15,16,18,19,21,23,25,26,27,28,29,30,31,32,33,35
+V3.3S 6,7,9,10,11,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
+V5AL 16,21,29,30,31,32,33
+VDC 19,21,27,29,30,31,32,33,34,35
+V5S 11,16,17,21,22,23,25,31,33,34,35
R1
100K
R0402 D1
High : Enable BAT54A
Low : Disable SOT23
+V3.3S
LCDVDD +V3.3S
D 7,25 LVDS_BKLTEN 1
500mA D
3 R5
1K LDDC_CLK R43 2.2K R0402
2 R0402 CLOSE TO INTCON LCDCON
21,25 LIDR# 88242-4001 LDDC_DATA R34 2.2K R0402
BKLT_ON CNS40_LCD_R1
25 HW_OFF_BKLT# 1 41 41
LCDVDD 1 2
C5 1 2
3 3 3 4 4
1000pF/50V,X7R 5 6
C0402 7 LVD_A_DATA1_DN 5 6 LVD_A_DATA0_DN7
15,25 PM_SUS_STAT# 2 7 LVD_A_DATA1_DP 7 7 8 8 LVD_A_DATA0_DP7
9 9 10 10
D16 11 12
7 LVD_A_CLK_DP 11 12 LVD_A_DATA2_DN7
BAT54A 13 14
SOT23 7 LVD_A_CLK_DN 13 14 LVD_A_DATA2_DP7
15 15 16 16
ns LCD Back light on function Add LCD Back light on function EDID_PWR 17 18
Swain 080820 许许许 0801222 17 18 LDDC_CLK 7
+V5AL_CAM 19 19 20 20 LDDC_DATA 7
BKLT_PWM 21 22
BKLT_ON 21 22
23 23 24 24 USB_CAM_PN5 14
25 IVT_I_ADJ 25 25 26 26 USB_CAM_PP5 14
27 27 28 28
Q11 +VDC FB1 0 R0805 INVT_VDD 29 30 BT_PWR
+V3.3AL +V3.3S AO6409 29 30
31 31 32 32
TSOP6_0D95_1D6 +V5S FB21 0 R0805 33 34
33 34 BT_DISABLE 22 Add R698,R701 at SM BUS
C3 35 36
0.1UF/25V,Y5V 35 36 许许许 081218
ns 37 37 38 38
4
5
6
USB_BT_PN7 23
C R208 500mA 42 42
C
10K
D
R0402
G
R209 0.1uF/10V,X5R 10UF/6.3V,X5R 2.2K R221 +VDC Update LCDCON fot 40 pin pannle conn
100K C0402 C0805 R0402 100 许许许 081111
R0402 ns R0603
ns
C210
3
3
2N7002 2N7002 100K
SOT23 ns SOT23 ns +V3.3AL +V3.3S
1 Q14 R894 0
7 LVDD_EN 2N7002E-T1 0.1UF/10V,X5R LVDD_EN R0603 BT
100pF/50V,NPO
1 1
SOT23 C0402 Q23
2
2
100K 100K
R0402 ns ns R514 0 R0603 2 3 BT_PWR
BT ns
SPWG Require LCDVDD rising time R515 0 R0603
ns C260
is 0.5-10ms,1-10ms is better 1000pF/50V,X7R
1
ns
R517
100K
ns
B B
BT_ON# R516 ns 1K
22 BT_PWRON
+V5AL +V5S
R213 R212
0 0
R0805 R0805
25 EC_BKLT_PWM R4 0 R0402 ns
R2 C4 2 3
500mA
10K 100pF/50V,NPO R224
R0402 C0402 10K Q13 C211 C213
R0402 SOT23 0.1uF/10V,X5R 10UF/6.3V,X5R
ns AO3415 C0402 C0805
1
ns
R223 10K
R0402
ns
3
+V0.75S 30,34
+V1.5 8,10,30,32,33,34
+V3.3S 6,7,9,10,11,12,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
+V0.75S +V1.5
SO-DIMM
0
Layout note:电电电电DDR slot VDD PIN
204
203
100
105
106
111
112
117
118
123
124
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
75
76
81
82
87
88
93
94
99
DIM1
8 MA_A_A[14:0]
VTT2
VTT1
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
MA_DATA[63:0] 8
D +V1.5 D
MA_A_A0 98 5 MA_DATA0
MA_A_A1 A0 D0 MA_DATA1
97 A1 D1 7
MA_A_A2 96 15 MA_DATA2
A2 D2
1
MA_A_A3 95 17 MA_DATA3 C264 C282 C286 C267
MA_A_A4 A3 D3 MA_DATA4
92 4 + C280 10uF/6.3V,X5R 10uF/6.3V,X5R 2.2UF/10V,X5R
1
A4 D4 0.1uF/10V,X5R
MA_A_A5 91 6 MA_DATA5 220UF/6.3V,OSCON C0805 C0805 C0402 C0603
MA_A_A6 A5 D5 MA_DATA6 CAP6_6x7_3 ns
90 16
2
MA_A_A7 A6 D6 MA_DATA7 ns
86 A7 D7 18
MA_A_A8 89 21 MA_DATA8
MA_A_A9 A8 D8 MA_DATA9
85 A9 D9 23
MA_A_A10 107 33 MA_DATA10 +V1.5
MA_A_A11 A10/AP D10 MA_DATA11
84 A11 D11 35
MA_A_A12 83 22 MA_DATA12
MA_A_A13 A12/BC# D12 MA_DATA13
119 A13 D13 24
MA_A_A14 80 34 MA_DATA14 C90 C85 C287 C86 C89
ns ICTP A14 D14 MA_DATA15 0.1uF/10V,X5R 2.2UF/10V,X5R 0.1uF/10V,X5R 2.2UF/10V,X5R 0.1uF/10V,X5R
T93 78 A15 D15 36
39 MA_DATA16 C0402 C0603 C0402 C0603 C0402
D16 MA_DATA17 ns ns
8 MA_A_BS#0 109 BA0 D17 41
108 51 MA_DATA18
8 MA_A_BS#1 BA1 D18
79 53 MA_DATA19
8 MA_A_BS#2 BA2 D19
40 MA_DATA20 +V1.5
D20 MA_DATA21
8 M_CS#0 114 CS0 D21 42
121 50 MA_DATA22
8 M_CS#1 CS1 D22 MA_DATA23
D23 52
MA_DM0 11 57 MA_DATA24 C88 C91 C281 C285 C273
MA_DM1 DQM0 D24 MA_DATA25 2.2UF/10V,X5R 0.1uF/10V,X5R 2.2UF/10V,X5R 0.1uF/10V,X5R 2.2UF/10V,X5R
28 DQM1 D25 59
MA_DM2 46 67 MA_DATA26 C0603 C0402 C0603 C0402 C0603
MA_DM3 DQM2 D26 MA_DATA27 ns
63 DQM3 D27 69
C MA_DM4 136 56 MA_DATA28 C
MA_DM5 DQM4 D28 MA_DATA29
153 DQM5 D29 58
MA_DM6 170 68 MA_DATA30
8 MA_DM[7:0] MA_DM7 DQM6 D30 MA_DATA31
187 DQM7 D31 70
MA_DATA32
DDRIII
D32 129
113 131 MA_DATA33
8 MA_A_WE# WE D33 Ns C
115 141 MA_DATA34 +V0.75S
8 MA_A_CAS# CAS D34
110 143 MA_DATA35
8 MA_A_RAS# RAS D35
130 MA_DATA36
D36 MA_DATA37
8 M_CKE0 73 CKE0 D37 132
74 140 MA_DATA38
8 M_CKE1 CKE1 D38 C70 C69 C68 C67
142 MA_DATA39
D39 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R
101 147 MA_DATA40
8 M_CLK_DDR0 CK0 D40 C0402 C0402 C0402 C0402
103 149 MA_DATA41 ns
8 M_CLK_DDR#0 CK0 D41 MA_DATA42
8 M_CLK_DDR1 102 CK1 D42 157
104 159 MA_DATA43
8 M_CLK_DDR#1 CK1 D43 MA_DATA44
D44 146
116 148 MA_DATA45
8 M_ODT0 ODT0 D45
120 158 MA_DATA46
8 M_ODT1 ODT1 D46
160 MA_DATA47
MA_DQS0 D47 MA_DATA48
12 DQS0 D48 163
MA_DQS1 29 165 MA_DATA49
MA_DQS2 DQS1 D49 MA_DATA50
47 DQS2 D50 175
MA_DQS3 64 177 MA_DATA51 +V1.5 +V1.5
MA_DQS4 DQS3 D51 MA_DATA52
137 DQS4 D52 164
MA_DQS5 154 166 MA_DATA53
MA_DQS6 DQS5 D53 MA_DATA54
8 MA_DQS[7:0] 171 DQS6 D54 174
MA_DQS7 188 176 MA_DATA55
DQS7 D55 MA_DATA56
D56 181
B MA_DATA57 R505 R502 B
6,16,19 SMB_DATA_S 200 SDA D57 183
202 191 MA_DATA58 1K,1% 1K,1%
6,16,19 SMB_CLK_S SCL D58 MA_DATA59 R0402 R0402
D59 193
R298 10K R0402 197 180 MA_DATA60 VREF_CA VREF_DQ
+V3.3S R297 10K R0402 SA0 D60 MA_DATA61
1010 000x 201 SA1 D61 182
MA_DATA62
D62 192
199 194 MA_DATA63 C197 C83
VDDSPD D63 C130 R508 C82 R503
VREF_DQ 1 10 MA_DQS#0 0.1UF/10V,X5R 2.2UF/10V,X5R 1K,1% 0.1UF/10V,X5R 2.2UF/10V,X5R 1K,1%
C80 VREF_CA VREF_DQ DQS#0 MA_DQS#1 C0402 C0603 R0402 C0402 C0603 R0402
126 VREF_CA DQS#1 27
C81 45 MA_DQS#2
0.1UF/10V,X5R 2.2UF/10V,X5R DQS#2 MA_DQS#3
9 PM_EXTTS0# 198 EVENT# DQS#3 62 close to DDR pin close to DDR pin
C0402 C0603 30 135 MA_DQS#4
8 DDR3_DRAM_RST# RESET# DQS#4
152 MA_DQS#5
DQS#5 MA_DQS#6
77 NC1 DQS#6 169
122 186 MA_DQS#7
NC2 DQS#7
125
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
NCTEST MA_DQS#[7:0] 8
GND1
GND2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
205
206
DDR3_SODIMM204_0
每2个电电个个0.1UF电电
A A
TOPSTAR TECHNOLOGY
leixiaoyu
Page Name DDRII SODIMM0
Size Project Name Rev
A3 P02H
A
Date: Thursday, April 29, 2010 Sheet 13 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
+V3.3AL 12,15,16,18,19,21,23,25,26,27,28,29,30,31,32,33,35
+V1.5S 10,16,19,23,33,34
U18B TGP
DMI
7 DMI_TXN1 DMI1TXN USBP3N USB_PORT_PN1 21 IRDY# AD4
T25 K5 R348 8.2K PCI_IRDY# C22 C19
7 DMI_TXP1 DMI1TXP USBP3P USB_PORT_PP1 21 PME# AD5
T19 K1 PCI_SERR# B11 B18
DMI2RXN USBP4N USB_CAM_PN5 12 R329 8.2K PCI_SERR# PCI_STOP# F14 SERR# AD6
T18 DMI2RXP USBP4P K2 STOP# AD7 B19
U23 L2 USB_CAM_PP5 12 R330 8.2K PCI_STOP# PCI_LOCK# A8 D16
DMI2TXN USBP5N MINICARD_USB_PN4 19 R349 8.2K PCI_LOCK# PCI_TRDY# A10 PLOCK# PCI
AD8
U24 DMI2TXP USBP5P L3 TRDY# AD9 D15
V21 M6 MINICARD_USB_PP4 19 R328 8.2K PCI_TRDY# PCI_PERR# D10 A13
DMI3RXN USBP6N USB_CR_PN6 18 R351 8.2K PCI_PERR# PCI_FRAME# A16 PERR# AD10
V20 DMI3RXP USBP6P M5 FRAME# AD11 E14
V24 N1 USB_CR_PP6 18 R354 8.2K PCI_FRAME# H14
DMI3TXN USBP7N USB_BT_PN7 23 R333 8.2K PCI_REQ#1 AD12
V23 DMI3TXP USBP7P N2 AD13 L14
USB_BT_PP7 23 R337 8.2K PCI_REQ#2 J14
R355 8.2K ns FLASH_SEL0 AD14
A18 GNT1# AD15 E10
R323 8.2K ns FLASH_SEL1
USB
OC0# D4 USB_PORT_OC0# 21 E16 GNT2# AD16 C11
26 PCIE_RXN0_LAN K21 PERN1 OC1# C5 AD17 E12
K22 D3 R345 8.2K PCI_PIRQ#0 PCI_REQ#1G16 B9
26 PCIE_RXP0_LAN PERP1 OC2# REQ1# AD18
C304 0.1UF/10V,X7R J23 D2 R325 8.2K PCI_PIRQ#1 PCI_REQ#2 A20 B13
26 PCIE_TXN0_LAN PETN1 OC3# REQ2# AD19
C305 0.1UF/10V,X7R J24 E5 R364 R324 8.2K PCI_PIRQ#2 L12
26 PCIE_TXP0_LAN PETP1 OC4# AD20
M18 E6 10K R115 8.2K PCI_PIRQ#3 B8
19 PCIE_RXN1_SLOT PERN2 OC5#/GPIO29 AD21
M19 C2 R0402 R327 8.2K PCI_PIRQ#4 FLASH_SEL0 G14 A3
19 PCIE_RXP1_SLOT PERP2 OC6#/GPIO30 GPIO48/ STRAP1# AD22
C307 0.1UF/10V,X7R K24 C3 +V3.3AL R347 8.2K PCI_PIRQ#5 FLASH_SEL1 A2 B5
19 PCIE_TXN1_SLOT PETN2 OC7#/GPIO31 GPIO17/ STRAP2# AD23
C309 0.1UF/10V,X7R K25 R116 8.2K PCI_PIRQ#6 GPIO22 C15 A6
19 PCIE_TXP1_SLOT PETP2 GPIO22 AD24
L23 R326 8.2K PCI_PIRQ#7 C9 G12
PERN3 25 EC_RUNTIME_SCI# GPIO1 AD25
L24 R117 8.2K RSVD_K9 H12
PERP3 R114 8.2K RSVD_M13 R332 R346 AD26
L22 PETN3 USBRBIAS G2 AD27 C8
PCI-E
B B
SPI_POWER
+V3.3S+V3.3AL
R320 R376
R321 R322 10K 8.2K R318
0 0 R0402 R0402 8.2K
R0402 R0402 ns ns R0402
ns ns U16 ns
W25X40
SO8_50_150 ns
8 5 SPI_SI R377 22 R0402 ns SPI_SI_ICH
VDD SI SPI_SI_ICH 15
2 SPI_SO R319 22 R0402 ns SPI_SO_ICH
SO SPI_SO_ICH 15
R317 3.3K R0402 SPI_WP# 3 1 SPI_CE# SPI_CE#_ICH
WP# CE# SPI_CE#_ICH 15
ns 6 SPI_SCK R378 22 R0402 ns SPI_SCK_ICH
SCK SPI_SCK_ICH 15
R379 3.3K R0402 SPI_HD# 7
ns HOLD#
VSS 4
C306
0.1uF/10V,X5R
C0402
ns SPI_POWER 8 1 SPI_CE#
SPI_HD# VCC CS# SPI_SO
A 7 HOLD# Q 2 NS SPI ROOM at ICH7 A
SPI_SCK 6 3 SPI_WP# Swain 081113 TOPSTAR TECHNOLOGY
SPI_SI CLK W#
5 D VSS 4
Swain Xu(许许许)
U15 Page Name
W25X80A ICH7_M(1 of 4)
SOIC8_50_208 Size Project Name Rev
ns A3 P01
SPI ROOM used +3.3S, reserved 3.3AL A
Swain 080815 Date: Thursday, April 29, 2010 Sheet 14 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,16,17,19,21,22,23,24,25,26,31,32,33,34,35
TGP +V5S 11,12,16,17,21,22,23,25,31,33,34,35 +V1.05S 6,7,10,16,24,31,32,34
U18C +V3.3A_RTC 16
EC_RTC 29
TGP +V3.3AL 12,14,16,18,19,21,23,25,26,27,28,29,30,31,32,33,35
R12 U1LB AE6 +V3.3S U18D
RSVD03 SATA0RXN SATA_RXN0 17
AE20 RSVD04 SATA0RXP AD6 SATA_RXP0 17
AD17 AC7 C0402 0.01uF/25V,X7R C327 R414 10K R0402 AA5 U1LB T15 GPIO0
RSVD05 SATA0TXN SATA_TXN0 17 LDRQ1#/GPIO23 BM_BUSY#/GPIO0
AC15 AD7 C0402 0.01uF/25V,X7R C326 ns V6 W16
RSVD06 SATA0TXP SATA_TXP0 17 19,25 LPC_AD0 LAD0/FWH0 GPIO6
LPC
AD18 RSVD07 SATA1RXN AE8 19,25 LPC_AD1 AA6 LAD1/FWH1 GPIO7 W14
Y12 AD8 Y5 K18 GPIO8
RSVD08 SATA1RXP 19,25 LPC_AD2 LAD2/FWH2 GPIO8
AA10 AD9 R433 W8 H19 GPIO9
RSVD09 SATA1TXN 19,25 LPC_AD3 LAD3/FWH3 GPIO9
AA12 AC9 0 +V3.3S R434 10K R0402 Y8 M17
RSVD10 SATA1TXP LDRQ0# GPIO10 EXT_SMI# 25
ns GPIO12
SATA
Y10 RSVD11 R0402 19,25 LPC_FRAME# Y4 LFRAME# GPIO12 A24
D AD15 C23 GPIO13 D
RSVD12 R394 33 R0402 GPIO13 GPIO14
W10 RSVD13 22 HDA_BITCLK P6 HDA_BIT_CLK GPIO14 P5
V12 R397 33 R0402 U2 E24 GPIO15
AUDIO
RSVD14 22 HDA_RST# HDA_RST# GPIO15
AE21 RSVD15 22 HDA_SDATA_IN0 W2 HDA_SDI0 DPRSLPVR AB20 PM_DPRSLPVR 9
AE18 RSVD16 V2 HDA_SDIN1 STP_PCI# Y16 PM_STP_PCI# 6
AD19 RSVD17 P8 HDA_SDIN2 STP_CPU# AB19 PM_STP_CPU# 6
U12 R412 33 R0402 AA1 R3 T23 ICTPns
RSVD18 22 HDA_SDOUT R405 33 R0402 HDA_SDOUT GPIO24 GPIO25 R496 R500
SATA_CLKN AD4 CLK_ICH_SATA# 6 22 HDA_SYNC Y1 HDA_SYNC GPIO25 C24
AC17 AC4 AA3 D19 T15 ICTPns 10K 10K
RSVD19 SATA_CLKP CLK_ICH_SATA 6 6 CLK_ICH14 CLK14 GPIO26
AB13 D20 T18 ICTPns R0402 R0402 +V3.3S
RSVD20 R0402 24.9,1% R435 GPIO27 T19 ICTPns ns ns
AC13 AD11 U3 F22
EPROM
RSVD21 SATARBIAS# EE_CS GPIO28
AB15 RSVD22 SATARBIAS AC11 AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN# 25
Y14 RSVD23 SATALED# AD25 HDD_LED# 23 T6 EE_DOUT GPIO33 U14
V3 EE_SHCLK GPIO34 AC1 BOARDID_0 16
AB16 RSVD24 GPIO38 AC23 BOARDID_1 16
AE24 RSVD25 T4 LAN_CLK GPIO39 AC24 BOARDID_2 16
AE23 RSVD26 P7 LANR_STSYNC
R340 0 R0402 B23 AB22
+V1.05S LAN_RST# CPUPWRGD/GPIO49 H_PWROK 7
+V3.3S AA2
LAN
LAN_RXD0 PM_THRM#
AA14 RSVD27 A20GATE U16 H_A20GATE 25 AD1 LAN_RXD1 THRM# AB17 PM_THRM# 7
V14 Y20 AC2 V16 VRM_PWRGD
RSVD28 A20M# H_A20M# 7 LAN_RXD2 VRMPWRGD
MISC
Y21 CPUSLP# T24 ns W3 AC18 ICH_SYNC#
CPUSLP# R404 R445 LAN_TXD0 MCH_SYNC#
IGNNE# Y18 H_IGNNE# 7 T7 LAN_TXD1 PWRBTN# E21 PM_PWRBTN# 25
AD21 T25 ns 56 10K U4 H23 PM_RI#
+V3.3S AD16 INIT3_3V# R0402 LAN_TXD2 RI#
RSVD29 AC25 H_INIT# 7 R0402 G22 PM_SUS_STAT# 12,25
AB11 INIT# RTCX1 SUS_STAT#/LPCPD# ICH_SUSCLK T16 ICTPns
RSVD30 AB24 W4 D22
RTC
HOST
SMB
V18 SMB_DATA E23 AC3 RSMRST#
STPCLK# H_STPCLK# 7 16 SMB_DATA SMBDATA RSMRST#
AA20 R442 0 R0402 SMB_LINK_ALERT# H21 AD3 ICH_INTVRMEN
THERMTRIP# PM_THRMTRIP# 7,24 SMLALERT# INTVRMEN
SMLINK0 F25 J16
SMLINK0 SPKR PC_BEEP 22
SMLINK1 F24
TGP SMLINK1
? R441 H20
SLP_S3# PM_SLP_S3# 25,32 需要EC
56 SPI_SO_ICH R2 E25
3 14 SPI_SO_ICH TGP
SPI_MISO SLP_S4# PM_SLP_S4# 25,34
R0402 SPI_SI_ICH T1 ? F21 PM_SLP_S5# T17 ICTPns
14 SPI_SI_ICH SPI_MOSI SLP_S5#
SPI
SPI_CE#_ICH M8
14 SPI_CE#_ICH SPI_CS#
+V3.3S SPI_SCK_ICH P9 B25 PM_BATLOW#
14 SPI_SCK_ICH SPI_CLK BATLOW# PM_BATLOW# 25
R4 AB23 R409 0 R0402
SPI_ARB DPRSTP# H_DPRSTP# 7
+V1.05S AA18 R438 0 R0402
DPSLP# H_DPSLP# 7
RSVD31 F20
R144 R440 +V1.05S
56nsR0402
10K +V3.3AL R407 56nsR0402
R0402
5
1 0.1uF/10V,X5R R431
6,35 CK505_CLK_EN#
ns C0402 VCC 1 PLT_RST# 10K
ns ns 4 R0402
9,19,25,26 BUF_PLT_RST#
2
+V3.3A_RTC 2
GND
EC_RTC U7
3
B C358 R162 74AHC1G08GV B
R12 0.1uF/10V,X5R
100K SOT23_5
332K,1% C0402 R0402 ns
R11 R0402 ns ns
1K
R0402 ICH_INTVRMEN +V3.3S
1 +V3.3A_RTC
R10 C317
3 0 18pF/50V,NPO RTCX1
R0402 C0402 +V3.3AL R126 10K R0402 SMB_LINK_ALERT# C171
2 D2 C13 ns R368 10K R0402 SMLINK0 0.1uF/10V,X5R
BAT54C 1uF/10V,X7R R365 10K R0402 SMLINK1 C0402
1
5
SOT23 C0603 R356 10K R0402 SMB_ALERT#
CMOS Settings J1 3 Y4 R400 R343 10K R0402 PM_BATLOW# 1 VCC
25 EC_MAIN_PWROK
R9 Clear CMOS Shunt 32.768KHz 10M R358 1K R0402 PCIE_WAKE# 4 PM_ICH_PWROK
1K R458 Keep CMOS Open Assy xd3_2X6 R0402 R118 10K R0402 SYS_RST# 2
9,25,35 IMVP_PWRGD
2
3
18pF/50V,NPO RTCX2 74AHC1G08GV 10K
1
A
SM_INTRUDER# A
+V3.3S R439 1K R0402 ICH_SYNC# TOPSTAR TECHNOLOGY
R437 10K R0402 PM_THRM#
R443 8.2K R0402PM_CLKRUN# Swain Xu(许许许)
R436 4.7K R0402 INT_SERIRQ Page Name ICH7_M(2 of 4)
ns R410 1K R0402 HDA_SDOUT
ns R408 1K R0402 HDA_SYNC Size Project Name Rev
R145 1K R0402 GPIO0 A3 P01
A
R344 1K R0402 GPIO25 Date: Friday, April 30, 2010 Sheet 15 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,17,19,21,22,23,24,25,26,31,32,33,34,35
+V3.3AL 12,14,15,18,19,21,23,25,26,27,28,29,30,31,32,33,35
+V5S 11,12,17,21,22,23,25,31,33,34,35
+V3.3AL +V5AL
+V3.3A_RTC 15
+V3.3S +V5S
+V1.5S 10,14,19,23,33,34
+V1.05S 6,7,10,15,24,31,32,34
D11
+V5AL 12,21,29,30,31,32,33
D10 1N4148WS R121
1
1N4148WS R119 SOD323 10
1
SOD323 100 R0402
R0402
TGP U1LB
Y6
45mA R150 0 R0805 VSS B20
B24
VCCSATAPLL +V3.3A_RTC VSS
AE3
6uA OPTION FOR FB VSS E18
F16
VCCRTC C154 C158 VSS
24mA VCCDMIPLL +V1.5S C328 C325 C0402 C0805 VSS G4
10uF/6.3V,X5R
VCCDMIPLL Y25 VSS G8
C0402 C0402 ns
0.1uF/10V,X5R
H1
VCCUSBPLL F6 10mA 0.1UF/10V,X5R 0.1UF/10V,X5R VSS
VSS H4
ns H5
+V1.05S VSS
VSS K4
C138 C110 C156 C134 C155
14mA C0402 C0402 C0805 C0402 C0402 +V1.5S VSS K8
10uF/6.3V,X5R
0.1UF/10V,X5R
0.1UF/10V,X5R
V_CPU_IO W18 VSS K11
1uF/10V,X5R
1uF/10V,X5R
ns ns K19
ns VCCDMIPLL R148 0 R0805 VSS
VSS K20
L4
VCC1_5_1 AA8 1.5A OPTION FOR FB VSS
VSS M7
M9 C149 M11
VCC1_5_2 C0402 VSS
0.01uF/25V,Y5V
VCC1_5_3 M20 C148 VSS N3
+V1.05S
VCC1_5_4 N22 1A 4.7uF/10V,Y5V VSS N12
N13
C0805 VSS
POWER
VSS N14
C128 ns N23
C132 C146 C0805 VSS
10uF/6.3V,X5R
C P11 C
VSS
1uF/10V,X5R
1uF/10V,X5R
C0402 C0402 P13
VSS
VCC1_05_1 J10 VSS P19
VCC1_05_2 K17 VSS R14
P15 +V3.3S R22
VCC1_05_3 VSS
V10 T2
VCC1_05_4 0.22A VSS
VSS T22
VSS V1
VSS V7
C127 C141 C145 C112 C162 V8
C0402 C0402 C0402 C0402 C0402 VSS
0.1UF/10V,X5R
0.1UF/10V,X5R
VCC3_3_1 H25 VSS V19
1uF/10V,X5R
1uF/10V,X5R
1uF/10V,X5R
VSS AD24
1uF/10V,X5R
1uF/10V,X5R
VSS G24
VSS AE13
VSS F2
A3 P01
A
Date: Thursday, April 29, 2010 Sheet 16 of 39
PROPERTY NOTE: this document contains information confidential and property to
+V5S TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V5S 11,12,16,21,22,23,25,31,33,34,35
+V3.3S 6,7,9,10,11,12,13,14,15,16,19,21,22,23,24,25,26,31,32,33,34,35
D D
SATA HDD
+V5S V_HDD
SATA_HDD
FB20 0 R0805 Close to connector as possible SATA CONN
the same distance to connector SATA_D_50B_1
C320 C318 C319 2
15 SATA_TXP0 TX
4.7uF/10V,Y5V 0.1UF/10V,X5R 0.1UF/10V,X5R 3 1
15 SATA_TXN0 TX# GND0
C0805 C0402 C0402 C297 0.01uF/25V,X7R C0402 5 4
15 SATA_RXN0 RX# GND1
C298 0.01uF/25V,X7R C0402 6 7
15 SATA_RXP0 RX GND2
SATA_B1 SATA_B2
B B
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name SATA HDD
A A
Size Project Name Rev
A4 P01
A
Date: Friday, April 30, 2010 Sheet 17 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3AL 12,14,15,16,19,21,23,25,26,27,28,29,30,31,32,33,35
REG18V
D3.3V
D D
R165 R168 0 R0402
30K R167 R0402 0 ns
R0402 C187
C180 2.2UF/10V,X5R C182
RST 4.7uF/10V,X5R C0603 0.1UF/10V,X5R
C190 REG3.3V C175 C0805
REG18V
C0402
0.1UF/10V,X5R 4.7uF/10V,X5R
DGND
DGND
C0402 C0805 GND_USB GND_USB
GND_USB
U8
36
35
34
33
32
31
30
29
28
27
26
25
GND_USB GND_USB
REG18Vout
VSS
REG33Vout
REG33Vin
SM/SD/MS D7
GPIO6
SM/SD/MS D6
GPIO5
SM/SD/MS D5
GPIO1
GPIO4
TC
REG3.3V
OLD 2IN1 CONN.
R504 0 +V3.3AL
R0603
37 GPIO7 REG5Vin 24
Clk12M-out 38 23 C177
SM_CE Clk12M_out GPIO0/LED
39 SM_CE/SD_WP SM/SD/MS D4 22 0.1UF/10V,X5R
SM_WP 40 21 RST C0402
DGND SM_WP/SD_CLK/MS_CLK RST
41 VSS GPIO3 20
ClkSel
EE_SDA
42
43
SM_WR IT1337E-48 ClkSel 19
18 SM_D3
GND_USB
PWR_SW2
EE_SCL EE_SDA SM/SD/MS D3 PWR_SW2
44 SD/MS/xD 17
SM_WP_SW/SD_CMD/MS_BS
0.1UF/10V,X5R 8
SM_RD/MS_INS
SM_D2 DAT1
GND_USB 9 12
SM/SD/MS D0
SM/SD/MS D1
SM/SD/MS D2
C0402 DAT2 G1
SM_D3 1 13
CD/DAT3 G2
GND_USB G3 14 GND_USB GND_USB
SM_CLE
xD_CD
VDD18
CLK G4
XTALI
SM_CE 11 SD_WP
QFPS48_0D5_1D6 SD_MMC
SM_WPSW
CR_USB48
SM_RNB
SM_D0
SM_D1
SM_D2
XTALO
VDD18
XTALI
VDD18
B B
GND_USB
CR_USB48 6
C0402 ns
ns S-24CS02AFJ-TB-G R189 use 12Mhz crystal
SO8_50_150 0 R190 Y5 07 SM_RNB SD_CD
R0402 0 12.000MHz
GND_USB S0=P12=EEP_SDA R0402 XS2_3D3 08 SM_D0 SD_D0 MS_D0
ns ns
1
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,21,22,23,24,25,26,31,32,33,34,35
+V3.3AL 12,14,15,16,18,21,23,25,26,27,28,29,30,31,32,33,35
+V1.5S 10,14,16,23,33,34
+VDC 12,21,27,29,30,31,32,33,34,35
+DATA4
-DATA4
change pcie nut part reference 091027
D D
+V3.3S +V3.3AL +V3.3S
PCIE_NUT2
1
D40 D39
ESDPAD_R0603 ESDPAD_R0603
EGA1-0603-V05 EGA1-0603-V05 R155
ns ns 0
2
R0603 R459 R451 R452 MINI_HOLE
ns 0 0 0 +V1.5S
R0603 R0603 R0603 th_230_118_6
ns
1
2
3
4
5
6
7
+V3.3S_PCIE +V3.3AL_PCIE
1
2
3
4
5
6
7
MPCIE2
MINIPCIE_TEMP1
52
24
48
28
2
6
Keep USB2.0 Signal stub short
+3.3VAUX
+3.3V0
+3.3V1
+1.5V0
+1.5V1
+1.5V2
R453 0 R0402 +V3.3S +V3.3AL
R454 0 R0402
CHK5
90ohm@100M0.33A
l4_0805 ns R488 R487
3 4 -DATA4 36 46 ns ICTP 10K 10K
14 MINICARD_USB_PN4 USB_D- LED_WPAN# T28
2 1 +DATA4 38 44 ns ICTP R0402 R0402
14 MINICARD_USB_PP4 USB_D+ LED_WLAN# T32
42 ns ICTP ns ns
T27
14 PCIE_TXN1_SLOT 31 PETN0
33 32 R456 0 R0402 ns
14 PCIE_TXP1_SLOT PETP0 SMB_DATA SMB_DATA_S 6,13,16
30 R457 0 R0402 ns
SMB_CLK SMB_CLK_S 6,13,16
23 +V3.3AL
14 PCIE_RXN1_SLOT PERN0
14 PCIE_RXP1_SLOT 25 PERP0
CHANNEL_CLK 5
3 R0402
R477 0 R0402 ns CHANNEL_DATA 10K
+VDC 17 RESERVED0
R478 0 R0402 Debug 19 R460
9,15,25,26 BUF_PLT_RST# RESERVED1
R489 0 R0402 20 R461 0 R0402
RESERVED_DISABLE HW_RATIO_OFF1# 25
R493 0 R0402 Debug 37
6 PCI_CLK_DEBUG RESERVED_PCIE0
PICE_39 39 RESERVED_PCIE1
WIFI Option和Debug Option R484
R485
0
0
R0402
R0402 Debug
41 RESERVED_PCIE2 RESERVED_SIM0 16 ns
T29
R464 ICTP
0 R0402 ns
43 14
不不以不不实 15,25 LPC_FRAME#
R480 0 R0402 Debug 45
RESERVED_PCIE3 RESERVED_SIM1
12 R463 0 R0402 ns
PWR_SW_VCC2 21,29
15,25 LPC_AD0 RESERVED_PCIE4 RESERVED_SIM2 EC_DEBG_UTXD 25
R481 0 R0402 Debug 47 10 R462 0 R0402 ns
15,25 LPC_AD1 RESERVED_PCIE5 RESERVED_SIM3 EC_DEBG_URXD 25
R482 0 R0402 Debug 49 8 ns
15,25 LPC_AD2 RESERVED_PCIE6 RESERVED_SIM4 T26
R483 0 R0402 Debug 51 ICTP
15,25 LPC_AD3 RESERVED_PCIE7
GND10
GND11
GND12
GND13
B
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9 +V3.3S_PCIE +V3.3AL_PCIE B
+V1.5S
D D
C C
B B
A A
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name
Blank
Size Project Name Rev
A3 X03 A
Date: Thursday, April 29, 2010 Sheet 20 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
S2
+V5AL_USB1 Change C289 to F source 1.6A
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,22,23,24,25,26,31,32,33,34,35
Swain 080814 FUSE1812
+V3.3AL 12,14,15,16,18,19,23,25,26,27,28,29,30,31,32,33,35
1 2 +V5AL
+V5S 11,12,16,17,22,23,25,31,33,34,35
1
+V5AL 12,16,29,30,31,32,33
D36 C302 R361 560K R0402
C101 +VDC 12,19,27,29,30,31,32,33,34,35
ESDPAD_R0603 330PF/50V,X7R + R366 Install C429 for OC# issue
EGA1-0603-V05 C0402 100uF/10V 300K C300 Swain 080815
2
ns ct7343_28 R0402 1000pF/50V,X7R
C0402 GND_USB
USB2 GND_USB GND_USB USB_PORT_OC0#14
VCC1 4 Keep USB2.0 Signal CHK4 ns
5 HOLE0
D 6 HOLE1 -DATA1 3 -DATA0 stub short 1 2 USB_PORT_PN0 14
+V3.3AL D
7 2 +DATA0 4 3
HOLE2 +DATA1 USB_PORT_PP0 14
8 HOLE3
1 l4_0805 PR138
GND 90ohm@100M0.33A 20K
1
SINGLE USB PORT D33 D34 R0402
USB1G_1 ESDPAD_R0603 ESDPAD_R0603 R336 0 R0603 PWR_SW
EGA1-0603-V05 EGA1-0603-V05 Button_4P
PWRSW# 25
R335 0 R0603 BUTTON4_S
3
DEL 2 hole 090908
GND_USB 1 2 SWVCC1 PR1 10K R0402 PQ37 +V3.3AL
1 2 Isense_SYSP 27,36
GND_USB GND_USB 2N7002E-T1
3 4 SWVCC2_SW PR2 100K R0402 1 SOT23
3 4
+V5AL_USB1 PC95
2
PC2 PR137 1000pF/50V,X7R
2
1000pF/50V,X7R 1M C0402 PD16
PC1 C0402 PZ1 R0402 BAT54S
C290 1000pF/50V,X7R BZT52C5V6S 3 SOT23
1
330PF/50V,X7R
+ C84 D32 C0402 SOD323 ns
1
C0402 100uF/10V ESDPAD_R0603
ns ns ct7343_28 EGA1-0603-V05
USB1 ns
1
VCC1 4 PWR_SW_VCC2 19,29
5 GND_USB GND_USB CHK3 L4_0805 ns
HOLE0 -DATA1
6 HOLE1 -DATA1 3 GND_USB 3 4 USB_PORT_PN1 14
7 2 +DATA1 2 1
HOLE2 +DATA1 USB_PORT_PP1 14
8 HOLE3
GND 1
C R291 0 R0603 C
1
GND 3
1
C1 ESD1
R73 R67 R68 1000pF/50V,X7R EGA1-0603-V05
10K 10K 10K C0402 ESDPAD_R0603
ns ns
2
ns
FAN_BACK 25
3
+V3.3S +V5S GND_USB
R66 1K FAN_TACH_ON
1 Q1
ns 2N2222 R74
C57 SOT23
2
ns 0
B C468 1000pF/50V,X7R B
R69
10K 2.2uF/10V,X5R ns
ns
8 GND EN/FON# 1
CPUFAN1
7 GND VIN 2
6 3 Vfan 1 4
GND VOUT 1 4
2
5 GND VSET 4 2 2
D9 C64 3 5
U21 3 5
P2793A 1N4148WS
2.2uF/10V,X5R Econn
SO8_50_150 +V3.3S SOD323 CNS3_R GND_USB
1
FAN_FB
R86
4.7K
R0402
R293
FAN1_V 25
200K R0402
C284
C283
4.7UF/10V,Y5V 0.1UF/10V,X5R
C0805 C0402
A A
TOPSTAR TECHNOLOGY
FAN1_V=3.30V,Vfan=5V Swain Xu(许许许)
FAN1_V=2.65V,Vfan=4V Page Name Output Board
Size
FAN1_V=1.98V,Vfan=3V A3
Project Name
P01
Rev
A
Date: Friday, April 30, 2010 Sheet 21 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,23,24,25,26,31,32,33,34,35
+V5S 11,12,16,17,21,23,25,31,33,34,35
Headphone Jack
VCC5CDC +V5S
FB16
INPUT:HEADPHONE/LINE-OUT
+V3.3S 1 2 300ohm@100MHz,2A
FB0805
OUTPUT:FRONT L/R
C351 C354 C355 C357 C345 C340 C199
C0402 C0402 C0805 C0402 C0402 C0805
0.1UF/10V,X5R 0.1UF/10V,X5R 10UF/6.3V,X5R 0.1UF/10V,X5R 0.1UF/10V,X5R 10UF/6.3V,X5R 0.1UF/10V,X5R
C0402
D
U19 Cross moat place LINE_OUT1 D
ALC662 HP_OUT_L R152 75 R0402 FB12 1 2 300ohm@100MHz,2A
25
38
GND_AUD 1 L
1
9
QFPS48_0D5_1D6 FB0805 4
HP_OUT_R R149 75 R0402 FB11 1 2 300ohm@100MHz,2A 2
VDD1
VDD2
AVDD1
AVDD2
FB0805 5 R
T31 ICTP ns A_GPIO0 2 35 C353 4.7uF/10V,X5R C0805 HP_OUT_L HP_JD 6
GPIO0 FRONT-OUT-L
3
ns A_GPIO1 3 36 C356 4.7uF/10V,X5R C0805 HP_OUT_R ESDPAD_R0603 7
GPIO1 FRONT-OUT-R
1
T30 ICTP D38 0.1UF/10V,X5R D14 D13 8
37 C315 C168 C161 ESDPAD_R0603 ESDPAD_R0603
LINE1-VREFO-R C349 0.1UF/10V,X5R C0402 EGA1-0603-V05 C0402 EGA1-0603-V05 EGA1-0603-V05 AZALIAJACK
GND_AUD
100pF/50V,NPO 100pF/50V,NPO AUDIO8B
2
27 C346 10UF/6.3V,X5R C0805 C0402 C0402
VREF
11 28 VREFOUT R473 4.7K R0402 INT_MIC_L_R
15 HDA_RST# REST# MIC1-VREFO-L ns
15 HDA_BITCLK 6 BITCLK ??
LINE1-VREFO-L 29
10 GND_AUD
15 HDA_SYNC SYNC R474 2.2K R0402 MIC2_REF
MIC2-VREFO 30
15 HDA_SDOUT 5 SDOUT
LINE2-VREFO 31
R472 33 R0402 8
15 HDA_SDATA_IN0 SDIN
MIC1-VREFO-R 32 R476 4.7K R0402 INT_MIC_L_R Stereo Microphone Jack
R471 51K R0402 C348 1uF/10V,Y5V C0603 C352 10pF/50V,NPO C0402
ns 12 33 R475 10K R0402
D41
1N4148WS
INPUT:STEREO MIC-IN
25 BTL_BEEP PC-BEEP DCVOL VCC5CDC
JACK_DET_A
ns
JACK_DET_B
MIC2_REF 1 2
SOD323
OUTPUT:CENT/LFE
13 JD1 JD2 34 D42
R469 75K R0402 C347 1uF/10V,Y5V C0603 C350 1N4148WS
15 PC_BEEP 14 LINE2-L CEN-OUT 43 1 2
100pF/50V,NPO SOD323
C0402 15 44
LINE2-R LFE-OUT R156 R153
R470 R468 MIC2_L C342 4.7uF/10V,X5R C0805 16 ALC662 45 4.7K 4.7K
4.7K 4.7K MIC2-L SIDESURR-OUT-L R0402 R0402
R0402 R0402 MIC2_R C341 4.7uF/10V,X5R C0805 17 MIC_IN1
MIC2-R SIDESURR-OUT-R 46
MIC2_L R466 75 R0402 FB14 1 2 300ohm@100MHz,2A 1 L
C 18 47 EAPD R495 0 R0402 SHUTDOWN# FB0805 4 C
CD-L SPDIFI/EAPD ns MIC2_R R465 75 R0402 FB13 1 2 300ohm@100MHz,2A 2
REMOVE SHUTDOWN# 20 48 FB0805 5 R
CD-R SPDIFO MIC2_JD 6
INT_MIC_L C344 1uF/10V,X7R C0603 21 3
MIC1-L SURR_OUT_L
SURR-OUT-L 39 7
1
update internal MIC circuit C343 1uF/10V,X7R C0603 22 D43 C339 C173 C169 D19 D18 8
MIC1-R R494 20K,1% R0402 ESDPAD_R0603 ESDPAD_R0603 ESDPAD_R0603
JDREF 40 GND_AUD
23 EGA1-0603-V05 C0402 100pF/50V,NPO 100pF/50V,NPO EGA1-0603-V05 EGA1-0603-V05 AZALIAJACK
LINE1-L SURR_OUT_R 0.1UF/10V,X5R C0402 C0402 AUDIO8B
Layout Note: 41
2
SURR-OUT-R
CD-GND
24
AGND1
AGND2
All of JD resistors should be LINE1-R
GND1
GND2
placed as close as possible to
the sense pin of codec.
4
7
19
26
42
GND_AUD
GND_AUD
JACK_DET_B R479 20K,1% R0402 MIC2_JD
VCC5CDC VCC5CDC
HP_OUT_L GND_AUD HP_OUT_R GND_AUD JACK_DET_A R467 5.11K,1% R0402 HP_JD
GAIN0 GAIN1 Av(inv)
R180 R185 Q9 Q6
0 0 6dB
6
3
10K 10K 2N7002DW 2N7002DW
D20
R0402 R0402 SC70_6 SC70_6
ns 0 1 10dB AMP_SHDW 2 5 AMP_SHDW 2 5
GAIN0 1 2 JOPEN_3
1 0 15.6dB
1
4
GAIN1 Adjust Gain to 10dB ns
BY K' 080118
1 1 21.6dB R157 0 R0402
R181 R183 ns
B B
10K 10K
R0402 R0402 R182 0 R0402
ns VCC5CDC
SHUTDOWN# 0.1UF/10V,X5R
De-pop Solution
Layout Note:
3
FB15 1 2 300ohm@100MHz,2A
Q10 Tied at three points under the FB0805 ns
2N7002
R194 1K R0402 1
codec and near the codec C136 C0402 ns
25 AMP_SHDW
R179 0.1UF/10V,X5R
2
R195 100K
10K R0402
R0402
GND_AUD
Onboard Amp
GND_AUD
C194 U9
0.22uF/10V,X7R APA2031
onboard stereo
SURR_OUT_R
C0603
R184 20K R0402
sop20_0d65_4d4g
INTSPR+
INTSPK1
INT_spkR 4Pin INT_MIC_L_R
microphone
17 RIN- ROUT+ 18
CNS4_R
7 14 INTSPR- INTSPL- 4 4 6 6 MIC1
RIN+ ROUT- INTSPL+ Microphone
3 3
GND_AUD
C179 0.22uF/10V,X7R R166 10K R0402
C0603
9 LIN+ LOUT+ 4 INTSPL+ INTSPR+
INTSPR-
2 2
INT_MIC_L
R146
1K
FB10 + BZ_D6027
1 1 5 5 1 2 300ohm@100MHz,2A 1 ASSY
C178 0.22uF/10V,X7R 10 8 INTSPL- R0402 FB0805 2
GND_AUD BYPASS LOUT-
C0603 VCC5CDC
1
+V5S 11,12,16,17,21,22,25,31,33,34,35
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,24,25,26,31,32,33,34,35
+V3.3AL 12,14,15,16,18,19,21,25,26,27,28,29,30,31,32,33,35
+V3.3S +V1.05S 6,7,10,15,16,24,31,32,34
+V1.5S 10,14,16,19,33,34
R447
LED 10K 1 1 +V5S
D R0402 2 2 D
7 7 3 3 TPCLK 25
+V3.3S ns 4
4 TPDAT 25
8 8 5 5
6 6
R196 220 R0402 IDE+ 1 2 ns TP_HDD_LED#
HDD_LED# 15 CNS6_0D5_RA1
ns
HDD INT_spkR 6Pin
BL-HB335A-TRB TP
TCHARGE
+V3.3AL LED4_1210B
HA1B333B AMP&BLUE
Blue Color
B
R203 220 R0402 CHARGE_LED 4 2 TP_CHG_LED#
CHG_LED# 25
R
R202 220 R0402 BAT_STATE_LED 3 1 TP_BTL_LED#
BTL_LED# 25
C198 Orange color H6 H3 H9 H2
0.1UF/10V,X5R H11
C0402
R204 220 R0402 PWR+ 1 2 TP_POWERLED#
POWERLED# 25
POWER
BL-HB335A-TRB
C C
HOLE HOLE HOLE HOLE
1
HOLE TH_256_100 TH_256_100
1
TH_S276_256_100
ns ns ns ns
TP_HDD_LED# TESD6 ns
1 2 EGA1-0603-V05 GND_BAT
ns ESDPAD_R0603 TH_256_100A TH_256_100A
+V3.3AL
HOLE HOLE HOLE HOLE HOLE
1
IDE+ ns C201 1000pF/50V,X7R C0402 TP_CHG_LED# R200 10K R0402 TH_256_100 TH_256_100 TH_S276_256_100
ns
CHARGE_LED C203 1000pF/50V,X7R C0402
TP_BTL_LED# R199 10K R0402 ns ns ns ns ns
GND_AUD
BAT_STATE_LED C204 1000pF/50V,X7R C0402 ns
TH_256_100A TH_276X236_100
PWR+ C200 1000pF/50V,X7R C0402 TP_POWERLED# R201 10K R0402
ns 机机需机版H4,H4 footprint需变TH_315_100
许许许 080820
B B
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS
ns ns ns ns ns ns ns ns
+V3.3AL
C222
0.1UF/10V,X5R
A C0402 A
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name
LED/WIFI/BT
Size Project Name Rev
A3 P01 A
Date: Thursday, April 29, 2010 Sheet 23 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V1.05S 6,7,10,15,16,31,32,34
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,25,26,31,32,33,34,35
D D
+V3.3S
+V1.05S
R186
10K R192
R0402 4.7K
R0402
ns
SHDN_LOCK#
R173
10K R193
6
R0402 100
5 2 R170 R0402
7 OVT_SHUTDOWN#
Q8 4.7K ns
C185 MMDT3904 R0402
SHDN_LOCK# 32
1
R172 1000pF/50V,X7R SC70_6 ns
C 100K C0402 R171 R191 C
R0402 470 1K
6
R0402 R0402
5 2 ns
3 7,15 PM_THRMTRIP#
ns
Q5 Q7 C196
1
2N7002E-T1 R169 C184 MMDT3904
1 SOT23 100K 0.1uF/10V,X5R SC70_6 2.2uF/10V,X7R
25 ALT_ON R0402 C0402 ns C0805
ns ns ns
2
R178
100K
R0402
OVP CIRCUIT
B VIN B
CPU
THRMTRIP# SHDN#
AND
THERM_ALERT#
VDC
Thermal
sensor
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name MDC&BT/FAN/OTP
A A
Size Project Name Rev
A4 P01
A
Date: Thursday, April 29, 2010 Sheet 24 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,26,31,32,33,34,35
+V3.3AL 12,14,15,16,18,19,21,23,26,27,28,29,30,31,32,33,35
EC_V3.3AL
+V5S 11,12,16,17,21,22,23,31,33,34,35
+V3.3S
EC_V3.3AL
R128 FB9
10K 120ohm@100MHz,500mA R136 +V3.3AL C150 C102 C160 C159 C126 C157 C144
R367 C142 R0402 FB0603 0 10UF/6.3V,X5R 0.1UF/10V,X5R 0.1UF/10V,X5R 0.1UF/10V,X5R 0.1UF/10V,X5R 0.1UF/10V,X5R 0.1UF/10V,X5R
8.2K 4.7UF/10V,Y5V 1 2 EC_V3.3AL R0805 C0805 C0402 C0402 C0402 C0402 C0402 C0402
R0402 C0805 EC_RESET# ns ns
V18R
15 H_A20GATE R141
3
SOD323 100,1% Q3 C0402 C0402
D
EC Output Signal! 1 MMBT3904-F C152 PM_SLP_S4# GPXIOA00 R417 10K R0402 D
R0402 SOT23 0.1UF/10V,X5R C151
124
111
125
C0402 PM_SLP_S3# HDD_ZOUT R357 10K R0402
67
96
33
22
1uF/10V,X7R
9
del 2n7002 090909 R137 C125 U17 C0603 HDD_YOUT R363 10K R0402
10K 0.01uF/25V,X7R HDD_XOUT R369 10K R0402
V18R
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
R0402 C0402 C111 C137
+V3.3S 100pF/50V,NPO 100pF/50V,NPO CHG_ON R122 10K R0402
63 C0402 C0402 SYS_I_Sense C299 3300pF/50V,X7R
AD0/GPI38 SYS_I_Sense 36
ADC
64 HDD_ZOUT C0402
A20GATE AD1/GPI39 HDD_YOUT
1 GA20/GPIO00 AD2/GPI3A 65
R359 RCIN# 2 66 HDD_XOUT
KBRST#/GPIO01 AD3/GPI3B
MSIC
10K 20 ns SPI pull up +V3.3AL
14 EC_RUNTIME_SCI# SCI#/GPIO0E
R0402 D35 EC_RESET# 37
ns 1N4148WS RCIN# ECRST# EC_SPI_CS# R334 10K R0402 ns
15 H_RCIN# 1
SOD323 EC Output Signal! EC_SPI_MOSI R306 10K R0402 ns
EC_SPI_MISO R430 10K R0402 ns
12 21 EC_SPI_SCK R305 10K R0402 ns
6 PCI_CLK_EC PCICLK PWM0/GPIO0F BTL_BEEP 22
PWM
3 23 I2C_CLK R133 4.7K R0402
15 INT_SERIRQ SERIRQ PWM1/GPIO10 POWERLED# 23
4 25 I2C_DATA R138 4.7K R0402
15,19 LPC_FRAME# LFRAME# PWM2/GPIO11 SET_I 36
10 34 SM_BAT_SDA2 R129 5.6K R0402
15,19 LPC_AD0 LAD0 PWM3/GPIO19 EC_BKLT_PWM 12
8 SM_BAT_SCL2 R125 5.6K R0402
15,19 LPC_AD1 LAD1 LIDR# R401 10K R0402
LPC
15,19 LPC_AD2 7 LAD2
1 5 EC_IMVP_PD_IN# R127 10K R0402 ns
1 15,19 LPC_AD3 LAD3
2 EC_PCI_RST# 13 28
2 PCIRST#/GPIO05 FANFB0/GPIO14 FAN_BACK 21
FAN
3 SCANOUT15 38 29 PCIE_WAKE#_EC R393 10K R0402
3 15 PM_CLKRUN# CLKRUN#/GPIO1D FANFB1/GPIO15 BT_DISABLE 23
4 SCANOUT14 26 ALT_ON R147 10K R0402 ns
4 FANPWM0/GPIO12 FAN1_V 21
27 5 SCANOUT13 27 PWRSW# R163 10K R0402
27 5 FANPWM1/GPIO13 IVT_I_ADJ 12
28 6 SCANOUT12 EC_IMVP_PD_OUT R123 10K R0402 ns
28 6 SCANOUT11 SCANIN7 TPCLK R140ns 10K R0402
7 7 62 KSI7/GPIO37
8 SCANOUT10 +V3.3AL SCANIN6 61 TPDAT R142 10K R0402
8 SCANOUT9 SCANIN5 KSI6/GPIO36 ADD R140 R142
9 9 60 KSI5/GPIO35
C 10 SCANOUT8 SCANIN4 59 leixy 090824 C
10 SCANOUT7 SCANIN3 KSI4/GPIO34
11 11 58 KSI3/GPIO33
12 SCANOUT6 R396 4.7K R0402 EC_PCI_RST# SCANIN2 57 83
12 KSI2/GPIO32 PSCLK1/GPIO4A/P80CLK TPCLK 23
13 SCANOUT5 ns SCANIN1 56 84
13 KSI1/GPIO31 PSDAT1/GPIO4B/P80DAT TPDAT 23
14 SCANOUT4 EC_BUF_PLT_RST# R399 0 R0402 SCANIN0 55 85 EC_ICH_PWROK R390 0 R0402 ns
14 KSI0/GPIO30/E51_TXD(ISP) PSCLK2/GPIO4C EC_MAIN_PWROK 15
15 SCANIN0 86 MAIN_PWROK R154 0 R0402
15 PSDAT2/GPIO4D HW_RATIO_OFF1# 19
PS2
16 SCANOUT3 Connect PLTRST to EC_PCI_RST# 82 87 EC_ICH_PWROK
16 SCANIN1 Swain 080819 KSO17/GPIO49 PSCLK3/GPIO4E EC_SMI# ns R0402 0 R398 ICH_PWROK from EC
KB3926
17 17 81 KSO16/GPIO48 PSDAT3/GPIO4F 88 EXT_SMI# 15
18 SCANIN2 SCANOUT15 54 Swain 080819
18 SCANOUT2 SCANOUT14 KSO15/GPIO2F/E51_RXD(ISP)
19 19 53 KSO14/GPIO2E
20 SCANOUT1 SCANOUT13 52
KB
20 SCANIN3 SCANOUT12 KSO13/GPIO2D
21 21 51 KSO12/GPIO2C
22 SCANIN4 SCANOUT11 50
22 SCANIN5 SCANOUT10 KSO11/GPIO2B +V3.3AL
23 23 49 KSO10/GPIO2A
24 SCANOUT0 SCANOUT9 48
24 SCANIN6 SCANOUT8 KSO9/GPIO29
25 25 47 KSO8/GPIO28
SMBUS
26 SCANIN7 SCANOUT7 46 80
26 KSO7/GPIO27 SDA1/GPIO47 I2C_DATA 7
SCANOUT6 45 79 R308
KSO6/GPIO26 SCL1//GPIO46 I2C_CLK 7
SCANOUT5 44 78 4.7K +V3.3AL
CNS26_1_R_UP KSO5/GPIO25 SDA0/GPIO45 SM_BAT_SDA2 28
R424 0 R0402 EC_BUF_PLT_RST# SCANOUT4 43 77 R0402
Econn 9,15,19,26 BUF_PLT_RST# KSO4/GPIO24 SCL0/GPIO44 SM_BAT_SCL2 28
SCANOUT3 42 8 1 EC_SPI_CS# R309 4.7K R0402 ns
KBCON1 SCANOUT2 KSO3/GPIO23/TP_ISP EC_SPI_HOLD# 7 VCC CS# EC_SPI_MISO
41 KSO2/GPIO22/TP_ANA_TEST HOLD# Q 2
SCANOUT1 40 EC_SPI_SCK 6 3 EC_SPI_WP# R307 4.7K R0402
SCANOUT0 KSO1/GPIO21/TP_PLL GPXIOA00 EC_SPI_MOSI CLK W#
39 KSO0/GPIO20/TP_TEST GPXIOA00/SDICS# 97 5 D VSS 4
Fuction P.M2 P.M1 P.M0 98 C296
GPXIOA01/SDICLK CHG_LED# 23
99 U13 1uF/10V,X7R
GPXIOA02/SDIMOSI
GPXIOA
R402 1K R0402 6 100 R0402 0 R418 W25Q80BV C0603
VerA 0 0 0 12,21 LIDR#
R391 0 R0402 PCIE_WAKE#_EC14 GPIO04 GPXIOA03 PM_PWRBTN# 15
SOIC8_50_208
15,19,26 PCIE_WAKE# GPIO07/i_clk_8051 GPXIOA04 101 AMP_SHDW 22
VerB 0 0 1 ns 15 102
27 AC_IN GPIO08/i_clk_peri GPXIOA05 EC_IMVP_PD_OUT 35
16 103 U20
28 BATT_IN# GPIO0A GPXIOA06 CHG_ON 36
+V3.3AL Verc 0 1 0 17 104 +V3.3AL W25X40
15,32 PM_RSMRST# GPIO0B/ESB_CLK GPXIOA07
B R387 1K R0402 18 105 PROCHOT# SO8_50_150 ns B
21 PWRSW# GPIO0C/ESB_DAT_O/ESB_DAT_I GPXIOA08
19 106 8 5 EC_SPI_MOSI
15,32 PM_SLP_S3# GPIO0D GPXIOA09 HW_OFF_BKLT# 12 VDD SI
32 107 2 EC_SPI_MISO
15,34 PM_SLP_S4# GPIO18 GPXIOA10 CAM_PWRON 12 SO
R0402 0 R360 36 108 EC_SPI_WP# 3 1 EC_SPI_CS#
15 SYS_RST# GPIO1A/NUMLED# GPXIOA11 BTL_LED# 23 WP# CE#
R450 R449 R448 73 6 EC_SPI_SCK
8,30,32 DDR3_DRAM_PWROK GPIO40 SCK
GPIO
10K 10K 10K R374 1K R0402 74 EC_SPI_HOLD# 7
35 IMVP_ON GPIO41 HOLD#
R0402 R0402 R0402 24 ALT_ON 89 4
ns ns ns GPIO50 VSS
31 V1_05S_ON 127 GPIO59/TEST_CLKSPICLKI GPXIOD0/SDIMISO 109
PCB_Mark0 110 EC_PM_SUS_STAT#
R0402 0 R420
GPXIOD1 PM_SUS_STAT# 12,15
GPXIOD
PCB_Mark1 68 112 PCB_Mark0 1K R419 +V3.3AL
colay small package EC 091028
30 V0_75S_ON GPO3C GPXIOD2
PCB_Mark2 70 114 PCB_Mark1 R0402
29 ALWAYS_ON GPO3D GPXIOD3
71 115 PCB_Mark2
33 MAIN_ON GPO3E GPXIOD4
30 V1_5_ON 72 GPO3F GPXIOD5 116 LVDS_BKLTEN 7,12
R423 R422 R421 117
LABEL1 GPXIOD6 EC_IMVP_PD_IN# 35
10K 10K 10K 76 118 EC_BUF_PLT_RST# C164
32 MAIN_PWROK GPI43 GPXIOD7
R0402 R0402 R0402
Topstar Soft 75 18pF/50V,NPO 32XCLKI
9,15,35 IMVP_PWRGD GPI42
BIOS Ver: X.XX C0402
EC Ver: X.XX 119 R0402 0 R425 EC_SPI_MISO
MISO
SPI
BIU configuration 90 120 R0402 0 R296 EC_SPI_MOSI R151
should match flash XXXX年XX月XX日 33 V1_5S_ON E51CS#/GPIO52 MOSI
1
19 EC_DEBG_UTXD 30 126 R0402 0 R427 EC_SPI_SCK 10M
speed used EC/BIOS Label E51TXD/GPIO16 SPICLK/GPIO58 R0402 0 R428 EC_SPI_CS# Y1 R0402
19 EC_DEBG_URXD 31 E51RXD/GPIO17/E51CLK SPICS# 128 3
740601900104 29 ALW_PWROK 92 32.768KHz
E51TMR0/GPIO54/WDT_LED# Assy
31 V1.8S_ON 93 xd3_2X6
2
E51INT0/GPIO55/SCROLED#
8051
R0402 0 R403 91
15 PM_BATLOW# E51TMR1/GPIO53/CAPSLED#
95 121 C167
31 V0_89S_ON E51INT1/GPIO56 XCLK32K/GPIO57 BT_PWRON 23
CLK
Q24 晶晶需变晶晶晶
GND
GND
GND
GND
GND
SOT23
A EC output Signal! KB3310B A
69
113
94
35
24
11
ns
2 3 PROCHOT# TOPSTAR TECHNOLOGY
7 EC_PROCHOT#
Swain Xu(许许许)
The 0ohm RES will across the isolate Page Name KBC(KB3310B)
R406 0 R0402 island of anolog GND and digital GND
Size Project Name Rev
R120 0 R0603 Custom P01
A
Date: Friday, April 30, 2010 Sheet 25 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3AL 12,14,15,16,18,19,21,23,25,27,28,29,30,31,32,33,35
VDD3D3_LAN
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,31,32,33,34,35
VDD3D3_LAN
U5 ns FB18 FB0805
EECS 1 8 +V3.3AL 1 2
R89 EESK CS VCC C63
2 SK NC1 7
1K EEDI/AUX 3 6 0.1uF/10V,X5R 300ohm@100MHz,2A Place close to VDD33_LAN PINS.
DI NC2 VDD3D3_LAN
VDD3D3_LAN
VDD3D3_LAN
VDD3D3_LAN
VDD3D3_LAN
D R0402 EEDO 4 5 C0402 D
DO GND
VDD10
XTAL2
XTAL1
FB17 FB0805
RSET
93C46 +V3.3S ns 1 2
EESK
so8_50_150
300ohm@100MHz,2A C36 C34 C55 C61 C279
0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R 0.1uF/10V,X5R
C0402 C0402 C0402 C0402 C0402
U4 48 ns
47
46
45
44
43
42
41
40
39
38
37
G1 VDD3D3_LAN VDDREG
LED1/EESK
RSET
GPO/SMBALERT
AVDD33_3
AVDD33_2
AVDD10_5
CKXTAL2
CKXTAL1
AVDD33_1
DVDD10_3(NC)
LED0
DVDD3_2
G1
G2 G2 R90 0 R0603
REGOUT 1
R92 0 R0603
SMBCLK(NC)
G9
REFCLK_N
G9
REFCLK_P
DVDD10_1
CLKREQB
GND
ns
G3
G4
G5
G6
G7
13
14
15
16
17
18
19
20
EVDD10 21
22
23
24
G3
G4
G5
G6
G7
XTAL1
XTAL2
QFNS48_0D4_1G
EVDD10
VDD10 Y2
CLKREQ# 25MHz R91 0 R0603
XS2_3D3
14 PCIE_TXP0_LAN 1 2 C40 C62
14 PCIE_TXN0_LAN 1uF/10V,X5R 0.1uF/10V,X5R
6 CLK_PCIE_LAN C0402 C0402
6 CLK_PCIE_LAN# C50 C46
14 PCIE_RXP0_LAN C59 0.1UF/10V,X7RC0402 27pF/50V,NPO 27pF/50V,NPO
14 PCIE_RXN0_LAN C60 0.1UF/10V,X7RC0402 C0402 C0402
RN1
0x4
U11 VDD3D3_LAN RA0603_8 CASE_GND
TRAN16_50_272 1 2
B PCIE_WAKE# R689 10K R0402 J4 B
13 N4 N2 5 3 4
12 4 5 6 RJ45
N3 N1
9
CLKREQ# R691 10K R0402 7 8 RJ45_SB
LAN_TX0+ 9 8 TX0+ RJ45
TD- TX-
11 6 MCT1 10K ohm close to Host side CHK2 RJ45_TX0+ 1 TX0+
TDC CMT ns RJ45_TX0- 2 TX0- TX0+
LAN_TX0- 10 7 TX0- RSET R0402 2.49K,1% R59 TX0+ 4 5 RJ45_TX0+ RJ45_TX1+ 3 TX1+ TX0-
TD+ 1CT:1CT TX+ TX0- L2+ L3+ RJ45_TX0- MCT3 TX1+
3 L2- L3- 6 4 TX2+
TX2+
LAN_TX1+ 15 2 TX1+ TX1+ 2 7 RJ45_TX1+ 5 TX2- TX2-
RD- RX- TX1- L1+ L4+ RJ45_TX1- RJ45_TX1-
1 L1- L4- 8 6 TX1- TX1-
14 3 MCT2 VDD3D3_LAN 7 TX3+ TX3+
RDC RXC 100MHz0.5A MCT4 TX3-
8 TX3-
LAN_TX1- 16 1 TX1- CMC8
C223 RD+ 1CT:1CT RX+
0.01uF/25V,X7R C39
C0402 0.1uF/10V,X5R
10
C0402
MCT1
MCT2
MCT3
MCT4
LAN_TX1+ LAN_TX1-
CASE_GND
LD1
AZC099-04S
4
ns
PR17
10
PR177
R0402 PR176 R0402
30K R0402
S_Bot 200KS_Bot
ALW_EN
ALW_EN 29
PC115 PQ4
PJ1 0.1uF/25V,X7R AO4419
DC JACK 5P AD+ C0603 SO8_50_150
4
PWR5P_DC3 PF2 PR16
G
7A 0.025,1%
PFB3 D
5 1 1
FUSE1206
2 3A 2 1 3A 1
PD20
3A R2512
5A 3
S 5
6
5A
SHLD2 AD+ BATT+
2 7
4 SBM54PT 1 8
SHLD1 100ohm@100MHz,3A
SMB
3 FB0805
AD-2
SBM54PT SMA
SMB PC13
100ohm@100MHz,3A 0.1uF/25V,Y5V
FB0805 21,36 Isense_SYSP
C0402
PC113 PC114
28,32,36 Isense_SYSN
1uF/25V,Y5V 1uF/25V,Y5V
C0805 C0805
5A 1 8
5A
+VDC
2 7
connect Jack_GND to GND 090915 240mil 3 6
PQ7 S 5
PR3 ns 0 R0402 AO4419 D
PR5 ns 0 R0402 SO8_50_150 G
PR4 ns 0 R0402 PC37
4
0.01uF/25V,X7R
PR54 510K C0402
Jack_GND R0402
PC40
0.1uF/25V,X7R
C0603
ns PR55
AD+ +V3.3AL PR62 100K,1%
51K R0402
R0402
PR174
3
3
510K
R0402 PQ44 PQ11
2N7002 2N7002
1 SOT23 1 SOT23
28,32 SHDN#
0815VB:Change PR9 to 51K
2
2
PR175
AC_IN 25
510K
R0402 PR179 PR60 PC46
Update PR175 TO 30k PR178 1K 100K 1000pF/50V,X7R
bobo100315
1000pF/50V,X7R
TOPSTAR TECHNOLOGY
Liu JX
PFB2
100ohm@100MHz,3A
1 2 FB0805
Battery connector没宽没没没没
PF1
7A BATCON1
5A PFB1
100ohm@100MHz,3A
1 2 FB0805
5A FUSE1206
1 2 1 BATT+
BATT+
PC20 C9
1000pF/50V,X7R GND_BAT GND_BAT 0.1uF/25V,Y5V KEY
C0402
SM_BAT_SDA2 PR7 100 R0402 SM_BAT_SDA ns 2 SDAT
25 SM_BAT_SDA2
SM_BAT_SCL2 PR10 100 R0402 SM_BAT_SCL 3 SCLK
25 SM_BAT_SCL2
4 GND PZD2
SOT23
5 GND +V3.3AL BAT54S
BAT_CON_1X5 2
BATT+ +V3.3AL
3 SM_BAT_SDA
PR213 PC5
47K GND_BAT 0.1UF/10V,X5R 1
PR202 R0402 C0402
510K
R0402 PR215 1K
BATT_IN# 25
R0402 GND_BAT
3
PC145
1000pF/50V,X7R
1 C0402
PQ56
2N7002
2
SOT23 PZD1
PR216 +V3.3AL SOT23
510K BAT54S
R0402
2
3 SM_BAT_SCL
PC3
0.1UF/10V,X5R 1
SM_BAT_SDA2 C0402
SM_BAT_SCL2
GND_BAT
PR15 0 R0402 ns
PC4 PC6
5.6pF/50V,NPO 5.6pF/50V,NPO PR11 0 R0402 ns
内内内内并线,线宽宽宽宽240mils.
C0402 C0402
PR6 0 R0402 ns
GND_BAT GND_BAT
GND_BAT
GND_BAT
TOPSTAR TECHNOLOGY
Liu JX
Page Name BATTERY IN
Size Project Name Rev
A3 P01
A
Date: Friday, April 30, 2010 Sheet 28 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+V3.3AL 12,14,15,16,18,19,21,23,25,26,27,28,30,31,32,33,35
+VDC 12,19,21,27,30,31,32,33,34,35
AD+ 27,33
+V5AL 12,16,21,30,31,32,33
EC_RTC 15
1.输入电容要靠近MOSFET漏极
D +V3.3AL 2.MOS管尽量靠近IC芯片
D
3.芯片的Thermal
PR253 GND用至少5个过孔连到信号地,用来散热
51K 4.信号地和电源地在输出电容的负极连到一起
R0402
S_Top +VDC
25 ALW_PWROK
+VDC
VDC2
TestP 2A 2A
TPC60
ns
GND_TPS51125
T 物物
PC211 PC244 PC189 PC243 PC188 PC242 PC143
10uF/ 25V 0.1uF/25V,X7R 1000pF/50V,X7R PR51 1000pF/50V,X7R 0.1uF/25V,X7R 10uF/ 25V,X7R 4.7uF/25V,X7R
C1210 C0603 C0402 PR252 5.11K,1% PR56 7.68K,1% PR203 C0402 C0603 C1210 C1206
10K,1% R0402
PC78 15K,1%
PR248 0.22uF/16V,X7R R0402
PR272
100K C0603
GND_TPS51125 ENTRIP1 0
R0402
PC193 R0402
VREF ENTRIP1
1
EC_RTC
10uF/6.3V,X5R
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
VREF
C0805
C 7 VO2 VO1 24 C
5
6
7
8
8 23 PQ85
VREG3 PGOOD
D
PC253 PC252 AO4468
0.1uF/25V,X7R 0.1uF/25V,X7R SO8_50_150
2
9 22 4
+V3.3AL VBST2 VBST1 +V5AL
G
PQ75 D1 D1 C0603
PR246 PR240
S
AO4932 8 C0603 PL17
V3.3AL SO8_50_150 1G PR250 10 PU9 21 5.2uH/5.5A V5AL
3
2
1
TestP 10K DRVH2 DRVH1 LS2_1051 PC239 TestP
S1 RT8205B
TPC60 R0402 4.7 4.7 PR243 S_Bot 4.7uF/25V,X7R TPC60
5A ns 7 5 11
S_Top
20 10K LL2 C1206
5A ns
1 LL2 LL1 1
PL13 R0402
3.3uH/4.8A PR260 6
2
SKIPSEL
5
6
7
8
2
PZ16 220UF/6.3V,OSCON ns PR247 0 R0805 PZ17
4.7uF/25V,X7R
VREG5
D
VCLK
BZT52C3V6S-F/3.6 CAP6_6x7_3 G2 G1 ns + BZT52C5V6S-F/5.6
GND
1
2
EN0
GND2 GND1
VIN
SOD323 PD32 S2 G2 R0402 SOD323
1
ns 1N5819 PR249 0 4 ns
4
2
G
SOD123 GND_TPS51125 R0402 PC144
1
1
13
14
15
16
17
18
1
S
ns PQ86 PD33
PC147 PC153 GND_TPS51125 AO4468 1N5819 1000pF/50V,X7R
3
2
1
1000pF/50V,X7R 1000pF/50V,X7R SO8_50_150 SOD123
C0402 C0402 PR254 S_Top C0402 PC139
ns
3A ns PC190 1000pF/50V,X7R
1 PR58 ns PR232
19,21 PWR_SW_VCC2
510K 1K
R0402 R0402
PD12 VREG5
2 PR209 ENTRIP1
25 ALWAYS_ON
1K PC154
3 PR255 0 R0402 R0402 0.1uF/25V,Y5V
ns PR207 C0402
3
1 47K ns
27 ALW_EN
PC57 R0402 PQ84
PR99 0.022uF/16V,X7R S_Top 2N7002
BAT54C 100K C0402 PR204 1 SOT23
SOT23 R0402 ns 1K PC146
R0402 0.1uF/25V,Y5V
2
3
C0402
ns 1 PQ81
MMBT3904-F
GND_TPS51125 GND_TPS51125
2
PR251 0 PR231
R0402 30K
R0402
A GND_TPS51125 A
TOPSTAR TECHNOLOGY
Liu JX
Page Name +V3.3AL/+V5AL
Size Project Name Rev
Custom P01
A
Date: Thursday, April 29, 2010 Sheet 29 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V0.75S 13,34
+V5AL 12,16,21,29,31,32,33
+V3.3AL 12,14,15,16,18,19,21,23,25,26,27,28,29,31,32,33,35
+VDC 12,19,21,27,29,31,32,33,34,35
+V1.5 8,10,13,32,33,34
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34,35
+V5AL
+V3.3AL
D D
+VDC
PR194 tps51218
PR193
0
PC56
4.7uF/25V,X7R 2A
1K PU10 R0402 PC61 C1206
R0402 PC62 1000pF/50V,X7R
5
6
7
8
S_Top PC248 0.1uF/25V,X7R C0402
TPS51218
D
1 10 0.1uF/25V,X7R PR201 C0603
8,25,32 DDR3_DRAM_PWROK PGOOD VBST C0603 0
R0402 4 AO4468
G
R940 130K 2 9 V1_5
TRIP DRVH PQ53
S
R0402 PR50 PL7 TestP
10K SO8_50_150 2.2UH/14A TPC60
3
2
1
25 V1_5_ON
PR195
R0402
1K 3 EN SW 8 LS2_6530
5A ns
5A
1 +V1.5
5
6
7
8
PR940 PC59 4 7 PR200 PC63
VFB V5IN
2
D
100K 0.022uF/16V,X7R 0 C0402
R0402 C0402 R0402 PD25 PR262 0.1uF/10V,X7R
1
ns 5 6 4 SSM34PT 2.2 PZ2
GND
RF DRVL
G
SMA R0805 BZT52C2V0S-F/2.0V
1
+
1
S
PC72 ns SOD323
1
4.7uF/10V,X5R PQ54 PC136 ns
11
3
2
1
2
PR86 C0805 AO4468 220UF/6.3V,OSCON
PR80 470K SO8_50_150 PC135 CAP6_6x7_3
10K,1% Set Fsw 290K 1000pF/50V,X7R
C0402
ns
C C
Update PD13 to 1N5819 for EMI request
许许许 090917
PR263
11.5K,1%
PC60 PR68
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
PU7
AP1250
SOP8_1D27_4G
2A 1 8
+V1.5 VIN NC3
PC66 PR98 2 7 +V3.3AL
C0805 10K,1% GND NC2
4.7uF/10V,X5R
PC64 3 6
0.1UF/10V,X7R REFEN VCNTL
PGND
C0402 4 5
VOUT NC1 PC65
PR100 4.7uF/10V,X5R
10K,1% C0805
9
B PC67 B
0.1UF/10V,X7R
C0402
+V3.3AL
V0_75S
ns
PR106 TestP
3
47K TPC60
R0402 PQ22
2N7002 +V0.75S
PR112 1 SOT23
1K
R0402
2A
2
3
PC70 PC69
1 PQ24 10uF/6.3V,X5R 10uF/6.3V,X5R
25 V0_75S_ON
MMBT3904-F C0805 C0805
ns
2
PC76
PR110 C0402
30K 0.1UF/10V,X5R
R0402 ns
A A
TOPSTAR TECHNOLOGY Mayc
Liu JX
Page Name +V1.5/+V0.75S DDR
Size Project Name Rev
A3 P02
A
Date: Friday, April 30, 2010 Sheet 30 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
5 4 3 2 1
+V3.3AL 12,14,15,16,18,19,21,23,25,26,27,28,29,30,32,33,35
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,32,33,34,35
+VDC 12,19,21,27,29,30,32,33,34,35
+V1.5S 10,14,16,19,23,33,34
+V1.05S 6,7,10,15,16,24,32,34
+V5AL 12,16,21,29,30,32,33
+V0.89S 10,34
+V1.8S 10,32
+V5S 11,12,16,17,21,22,23,25,33,34,35
D D
+V5S +VDC
+V3.3S 1.5A
PC249
0.1uF/25V,X7R
PR190 C0603
PR89 PR189 PC51 PC53 PC68
47K PU14 0 0 1000pF/50V,X7R 0.1uF/25V,X7R
R0402 R0402 R0402 C0402 C0603 C1206
ns TPS51218 4.7uF/25V,X7R
32 +V0.89SPWROK 1 10
PGOOD VBST
1
PR236 ns
PR234 D1 D1 PQ6 3.3uH/4.8A
32 +V1.05SPWROK 1
1K PR264 100K,1% 2 9 PR257 8 AO4932 PL6 LS2_8836
0 R0402 R0402 R0402 TRIP DRVH SO8_50_150
10K G1
R0402 S1 PL15 080716VA:Co_lay.
25 V0_89S_ON 3 EN SW 8
5 7
2.2UH/14A
LS2_6530
2A
PR942 1 +V0.89S
4 7 PR183 6 ns
100K VFB V5IN
1
0
R0402
2
J7 PC73 R0402 D2 V0_89S
1
JOPEN 0.022uF/16V,X7R 5 6 3 TestP
GND
RF DRVL PU11
RESISTOR_1 PD30 PR265 PD23 TPC60
1
+ AP1250
1
C0402
ns PC49 G2 S2 1N5819 2.2 SOD323 ns SOP8_1D27_4G
2
11
1
tps51218 C0805 ns ns ns
PR79 PR266 2A 1 8
+V3.3AL 10K,1% 470K PC127 PC126 +V3.3S VIN NC3
R0402 R0402 C0402 0.1uF/10V,X5R PR226 +V3.3AL
2 GND NC2 7
0.01uF/25V,X7R C0402 10K,1%
ns PC138 PC45 R0402 3 REFEN VCNTL 6
220UF/6.3V,OSCON 4.7uF/10V,X5R
PGND
CAP6_6x7_3 C0805 4 VOUT NC1 5
PR57 PC55 PC75
0.1UF/10V,X7R 4.7uF/10V,X5R
2.74K,1% C0402 PR228 C0805
9
PC71 12.1K,1%
Update PC138 to 533115722001 for Buyer request 0.1UF/10V,X7R
C 许许许 090917 C0402 C
PC42 PR53
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
TPC60
+V3.3AL TestP
V1_8S
ns
PR224
3
47K
R0402
S_Bot
PQ83
L2N7002LT1G
2A +V1.8S
PR256 0 1 SOT23
R0402 PC152
25 V1.8S_ON 0.1UF/10V,X5R
ns
2
3
C0402 PC50 PC52
PR227 ns PQ80 10uF/6.3V,X5R 10uF/6.3V,X5R
32 +V1.05SPWROK
1
R0402 1K MMBT3904-F C0805 C0805
2
ns
PR225
30K
R0402
+V5S
+VDC
+V3.3S 1.5A
PC250
0.1uF/25V,X7R PC131
C0603 PC77 PC137 4.7uF/25V,X7R
PR90 PR187 1000pF/50V,X7R 0.1uF/25V,X7R C1206
47K PU3 0 PR198 C0402 C0603
R0402 0
S_Top R0402 R0402
B 32 +V1.05SPWROK
TPS51218 B
1 PGOOD VBST 10
PR267
5
6
7
8
PL11
D
25 V1_05S_ON 3 EN SW 8 R0402
S
1
5
1K 4 7 PR237 PL5
100K VFB V5IN
4A
D
2
0.022uF/16V,X7R 5 6 4 R0805 V1_05S
GND
RF DRVL
G
J8 PD31 ns TestP
1
1
C0402
S
3
2
1
2
ns PR268
tps51218 PC79 SO8_50_150 220UF/6.3V,OSCON ns
2
1
PR87 470K 4.7uF/10V,X5R CAP6_6x7_3 PC124 SOD323
10K,1% R0402 C0805 PC74 0.1uF/10V,X5R BZT52C2V0S-F/2.0V
R0402 1000pF/50V,X7R C0402
+V3.3AL C0402
ns
PR69
5.11K,1%
R0402
PC41 PR43
0.022uF/16V,X7R 20K
C0402 ns R0402 ns
A A
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,33,34,35
+V5AL 12,16,21,29,30,31,33
+V3.3AL 12,14,15,16,18,19,21,23,25,26,27,28,29,30,31,33,35
+V1.05S 6,7,10,15,16,24,31,34
+V1.8S 10,31
+VCC_CORE 10,35
+V1.5 8,10,13,30,33,34
+VDC 12,19,21,27,29,30,31,33,34,35
Power Good Logic CIRCUIT
D D
+V3.3S
PR130
47K
R0402
S_Top
PR81
1K
R0402
31 +V0.89SPWROK
27,28 SHDN#
31 +V1.05SPWROK 1
3 MAIN_PWROK 25
PD11 PR320
2 BAT54A 51K
8,25,30 DDR3_DRAM_PWROK
SOT23 PR323 R0402
C 100 PQ69 C
2
PR307 0 R0402 MMBT2907
R0402 1 SOT23
24 SHDN_LOCK#
15,25 PM_RSMRST# 1 PZ9
BZT52C5V6S-F/5.6
3
PR128 3 SOD323 PQ66 PQ112
1K PD13 2 1 MMBT3904-F MMBT3904-F
+V5AL
R0402 2 BAT54A SOT23 SOT23
15,25 PM_SLP_S3#
3
SOT23
PC88 2 1 1 1
+V3.3AL
0.1uF/10V,X7R
C0402 PZ8
2
BZT52C3V6S-F/3.6 PR304
SOD323 100 PR313 PC217
PC203 R0402 20K 0.1uF/16V,X7R
1uF/10V,X7R R0402 C0402
C0603
B B
A A
TOPSTAR TECHNOLOGY
Liu JX
Page Name Power Good logic/OVP
Size Project Name Rev
A3 P02
A
Date: Thursday, April 29, 2010 Sheet 32 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+VDC 12,19,21,27,29,30,31,32,34,35
+V5S 11,12,16,17,21,22,23,25,31,34,35
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,34,35
+V5AL 12,16,21,29,30,31,32
+V3.3AL 12,14,15,16,18,19,21,23,25,26,27,28,29,30,31,32,35
+V1.5S 10,14,16,19,23,34
+V1.5 8,10,13,30,32,34
AD+ 27
BATT+ 27,28,36
+VDC
+V3.3AL
PR274
1K
2 3 R0402
PQ50 PD27
DTB114EK 1N4148WS
PR172 SOT23 +V5AL SOD323
5
6
7
8
100K PC162 1
D
R0402 0.01uF/25V,X7R V3_3S1
C0402 PR245 TestP
51K 4 TPC60
G
R0402 ns
5
6
7
8
S
PR208 PR173 PR276 AO4468
D
PR206 100K 33K 51K PQ52
4A
3
2
1
1K R0402 R0402 R0402 +V3.3S
R0402 4 PC81
SO8_50_150
G
V5S1 0.1uF/25V,X7R
S
MAIN_PWR_DN AO4468 TestP C0603
34
PQ55 TPC60 PC166
3
2
1
3
ns +V5S 1uF/10V,X7R
PQ51 SO8_50_150 C0603
2N7002
1 PC80
25 MAIN_ON
0.1uF/25V,X7R PC179
PR278 SOT23 C0603 1uF/10V,X7R
2
1K PR205 C0603
R0402 510K
R0402
PR275
0
R0402
+V1.5
PR141 PD34
5
6
7
8
100K 1N4148WS
D
R0402 SOD323
+VDC
4 V1_5S
G
TestP
S
AO4468 TPC80 ns
PQ34
2A
3
2
1
+V1.5S
PR273 PQ65 SO8_50_150
3
100K 2N7002
R0402 SOT23 PC149
ns ns 0.1UF/25V,X7R
1 C0603
PC148
1uF/10V,X7R
2
C0603
3
PR244 ns
100K
R0402
ns
TOPSTAR TECHNOLOGY
Liu JX
Page Name V5S/ V3.3S/ V1.5S Power
Size Project Name Rev
A3 P02
A
Date: Thursday, April 29, 2010 Sheet 33 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,35
+V1.05S 6,7,10,15,16,24,31,32
+V1.5S 10,14,16,19,23,33
+V1.5 8,10,13,30,32,33
+V0.75S 13,30
+VDC 12,19,21,27,29,30,31,32,33,35
+V5S 11,12,16,17,21,22,23,25,31,33,35
+V0.89S 10,31
+V1.5S
+V5S +V3.3S +V0.89S
+V1.05S
30mA
100mA 70mA
2
2
2
PR217
2
100 PR170 PR171 PR168 PR169 PR214
PR222
R0402 100 100 100 100 100
100
R0402 R0402 R0402 R0402 R0402
R0402
1
1
1
PQ61 PQ42 PQ41 PQ64
3
3
2N7002 2N7002 2N7002 2N7002
SOT23 SOT23 SOT23 PQ60 SOT23
2N7002
1 1 1 1 SOT23 1 33
MAIN_PWR_DN
2
2
+V0.75S
2
+V1.5 PR212 +VDC
100
R0402
1
2
PR221 PQ63
3
100 2N7002
R0402 SOT23 PR219
V1_5DISCHG 510K
1
1 R0402
2
PQ62 PQ59
3
2N7002 2N7002
SOT23 SOT23
PR211
200K
R0402
TOPSTAR TECHNOLOGY
Liu JX
Page Name Discharge Circuit
Size Project Name Rev
A3 P02
A
Date: Thursday, April 29, 2010 Sheet 34 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
+VDC 12,19,21,27,29,30,31,32,33,34
+V5S 11,12,16,17,21,22,23,25,31,33,34
+VCC_CORE 10,32
+V3.3S 6,7,9,10,11,12,13,14,15,16,17,19,21,22,23,24,25,26,31,32,33,34
+V3.3AL 12,14,15,16,18,19,21,23,25,26,27,28,29,30,31,32,33
D D
+VDC
+V3.3S
PC133
PR188 4.7uF/25V,X7R
2.2 PC251 C1206
PR94 0.1uF/25V,X7R PC129 PC132 PC120
47K PU1 R0402 C0603 1000pF/50V,X7R 0.1uF/25V,X7R 10uF/25V,X5R
R0402 C0402 C0603 C1210
S_Top ns
TPS51218
5
6
7
8
CK505_CLK_EN# R509 0 R0402 1 10
PGOOD VBST
D
PQ47
PR196
AO4468 PL12
PR269 200K 2 9 4 SO8_50_150 2.2UH/14A
TRIP DRVH
G
R0402 LS2_6530
S
2.2 PR259 1 080716VA:Co_lay.
25 IMVP_ON 3 8 R0402 10K
3
2
1
EN SW +V5S PL16
PR181
PR941 R0402 7A
100K 1 +VCC_CORE
5
6
7
8
1K R0402 4 7 PR192 3.3uH/4.8A
VFB V5IN
D
R0402 0 R939 LS2_8836
PC141 R0402 2.2
1
2
5 6 4 R0805 ns
GND
0.1UF/10V,X5R RF DRVL
G
J9 PD26 PC142 + VCORE
1
C0402
S
JOPEN ns PC134 AO4468 SSM34PT220UF/6.3V,OSCON PD29 TestP
RESISTOR_1 4.7uF/10V,X5R PQ48 SMA CAP6_6x7_3 BZT52C2V0S-F/2.0V TPC60
1
11
3
2
1
2
C ns tps51218 C0805 SOD323 ns C
2
1
PR97 PR270 SO8_50_150 PC128 PC130 ns
10K,1% 470K 1000pF/50V,X7R 0.1uF/10V,X5R
R0402 R0402 C0402 C0402
+V3.3AL
B B
PR114 PR191
+VCC_CORE 20K 20K PR113
R0402 R0402 CK505_CLK_EN# Pull high to +3.3AL 20K
ns ns Swain 080815 R0402 R510 0 R0402
mayc 0812 for power sequence EC_IMVP_PD_OUT 25
ns
CK505_CLK_EN# 6,15 IMVP_PWRGD 9,15,25
PR182
10K
3
R0402 R511 0 R0402
EC_IMVP_PD_IN# 25
ns PR199 PQ74
3
75K 2N7002
1 PQ49 R0402 ns 1 SOT23
MMBT3904-F 6,15 CK505_CLK_EN# ns
SOT23
2
2
PR180 PC125 ns 预预预内版PGOOD 要 CLK_EN
20K 0.22uF/10V,X7R 许许许 090723 PC122
R0402 C0603 0.22uF/10V,X7R
ns ns C0603
ns
A A
TOPSTAR TECHNOLOGY
Liu JX
Page Name +VCC CORE
Size Project Name Rev
A3 P01
A
Date: Thursday, April 29, 2010 Sheet 35 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1
BATT+ 27,28,33
PU2
PC121
1.5A
1uF/10V,X7R VDDP 15 2 Isense_SYSN 27,28,32
CHG_GND VDDP ACSET
C0603
PR186
4.7 5V_internal_LDO PC36
R0402 1 0.1uF/25V,Y5V PC12 PC11 PC15 PC14
PC35 VDD C0402 PD21 SOD323 1000pF/50V,X7R 0.1uF/25V,X7R 10uF/ 25V 4.7uF/25V,X7R
1uF/10V,X7R 24 1N4148WS/75V/150mA C0402 C0603 C1210 C1206
C0603 DCIN 1
ns ns
21,27 Isense_SYSP 19 CSIP PR184 0
PR37 PC25 R0402 070906VA:Co-lay。
0.1uF/25V,Y5V 20 17 PR24
27,28,32 Isense_SYSN CSIN UGATE
C0402 R0402 0
10 R0402
PD22
1
PC31 PC27
1000pF/25V,X7R 5600pF/50V,Y5V 5 16 VDDP D1 D1 PQ1
ICOMP BOOT 1
C0402 C0603 ISL6251HAZ
1N4148WS/75V/150mA PR27
8 AO4932
SO8_50_150 PL1 PR185
8.4V
G1
SSOP24_25_150 PC18 SOD323 10K S1 15uH/3.6A 50mOHM,1% PC118 BATT+
PR35 PC24
C0402
0.01uF/25V,X7R 6 VCOMP
0.1uF/25V,Y5V
C0402
R0402 2Aphase LS2_1040 2A R2512 2A 0.1uF/25V,X7R
C0603 VBATS1
5 7 1
R0402 10K 18 TestP
PHASE TPC60
6
CHG_GND 3.3V 11 VADJ
R941 PC117 ns
D2 2.2 PC119 PC34
14 3 R0805 4.7uF/25V,X7R 10uF/ 25V 1uF/25V,Y5V
LGATE ns PC150 C1206 C1210 C0805
1
3
Change from 10k to 6.98k 25 CHG_ON EN G2 S2 1N5819 C0402 ns
13 SOD123 ns
4
PGND PD3 1000pF/50V,X7R
PR14 9 ns
25 SET_I CHLIM
R0402 21 PR47 2.2
10K CSOP R0402
PR12 PC32
PC7 15.4K,1% 2.39V_Vref 8 1uF/10V,X7R
1uF/10V,X7R R0402 VREF C0603
CSON 22
1
C0603 ns
PR23 10 ACLIM
10K,1%
R0402 4
CELLS PR26
23
2
R0402
SET_I 充电电流
CHG_GND
0V 0A CHG_GND
1V 1A
TOPSTAR TECHNOLOGY
1B 2A 2B
BATT+ +V5_STBY
PQ1 ALW_PWROK EC_RTC
3A 5B
PD1
1A +VDC
AD+
D
Always_On 4B +V3.3AL D
PQ2 Power +V5AL
ISL62382 2A
PWRSWVCC2 11
V1_8_PWROK
ALWAYS_ON
7
DDR_PWROK 11 12
+V5S
ALW_EN System Power 11 +V3.3S KIA1117 +V2.5S
3B 5A +V_S +V5S
PWRSWVCC2 PWRSW# DDR POWER 10 MAIN_ON
10
AD+ ISL6545 +V1.8
7B 6A
13 V0_9S_ON 13 DDR_PWG 14
ALW_PWROK 5B 3A APL5331 +V0.9S
V1_8_ON
PM_SLP_S4# 8
MAIN_ON 10
PM_SLP_S3# 8
DDR_PWG 11
C PM_RSMRST# 4A 6B EC_KBC 16 CHIPPWROK 15 C
MAIN_PWROK PU7
KB3310B SET_I
TigerPoint 7 PM_PWRBTN# PM_RSMRST# 5A 6B
CHG_ON
PM_SLP_S3# 8
7 ALWAYS_ON
V1_5S_ON
IMVP_ON
SYS_I_Sense
V1_05S_ON
V0_89S_ON
ICH_POWGD
VR_PWRGD_EN
MAIN_PWROK
to IMVP_ON
Delay 100mS SYS_I_Sense AC_IN
+V3.3S
17
9 V1_5S_ON 13 +V1.5S 14
APL5331 +V1.5S Charge BATT+
+VDC
14 Chipset PWR ISL6251
PLT_RST#
+V1.05S
+V0.89S ISL6545*2
21 19 SET_I
H_PWRGD
CHG_ON
22 22
V1_05S_ON 15
CHIPPWROK
B
+V1.5S B
Note:
*A:For adapter in
*B:For battery only
VR_PWRGD_CLK_EN 19 Clock * :For all
IMVP_ON
17 CK410M
20 IMVP_PWRGD
VCC_CORE
ISL6545 VR_PWRGD 19
18
PineViwe
+VCC_CORE CLK_EN 19
H_PWRGD MAIN_PWROK
ICH_POWGD
21
20 IMVP_PWRGD
+VCC_CORE
CPU
A A
TOPSTAR TECHNOLOGY
CPURST# CPURST#
T15 T15
PCIRST# PCIRST#
PLTRST#
T14 T14
SUS_STAT# SUS_STAT#
D T17 T17 D
T23 T23
(CPU PWRGD) (CPU PWRGD)
H_PWRGD T10 H_PWRGD
T10
PM_ICH_PWROK (Input to ICH) PM_ICH_PWROK (Input to ICH)
IMVP_PWRGD IMVP_PWRGD
CK505_CLK_EN# CK410_CLK_EN#
+VCC_CORE +VCC_CORE
T08 T08
130ms 130ms
V1_8_ON(EC Output)
V0_9S_ON(EC Output)
+V3.3S,+V5S,+V2.5S,+V1.5S,+V1.05S,+V1.8,
+V1.8S,+V0.9S,+V0.89S V1_8_ON(EC Output)
+V3.3S,+V5S,+V2.5S,+V1.5S,+V1.05S,+V1.8,
+V0.9S
T22a
ALWAYS_ON(EC Output)
ALWAYS_ON(EC Output)
T22c
+V3.3AL,+V5AL
IacN
RSMRST#(Input to EC)
A IacN A
ACIN
Touchpad
D TR1 TR2 D
1K 1K
R0402 R0402
LEFT RIGHT
TP TP TFD2 TFD1
3 4
3 4 1 1 1 1
1
TC1 TESD1
1
100pF/50V,NPO ESDPAD_R0603 TC2 TESD2 FMARKS FMARKS
TP EGA1-0603-V05 100pF/50V,NPO EGA1-0603-V05 ns ns
1 2 ns TP ESDPAD_R0603
2
L_SW 1 2 ns
2
TD-13XA
BUTTON4_S R_SW
TD-13XA
TP BUTTON4_S TH2 TH1 TH3
TP_+V5S
TP
C TC3 TC4 C
0.1UF/10V,X5R 0.1UF/10V,X5R
C0402 C0402
TP TP HOLE HOLE HOLE
1
TH_315_410_230 TH_R217X268_100 TH_R217X268_100
ns ns ns
TP_CAP1
12 RIGHT
TP1 12
11 11
INT_spkR 6Pin 14 10
CNS6_0D5_RA1 1410 LEFT
9 9
8 8
6 6 TP_+V5S 7 7
B 8 8 5 5 6 6 B
4 TP_TPCLK 5 TP_TPCLK
4 TP_TPDAT 5
7 7 3 3 4 4
2 13 3 TP_TPDAT
2 13 3
1 1 2 2
1 1 TP_+V5S
TP
TPCON_USB
CNS12_0D5_RA1
TP
ns ns ns
EMIPOINT EMIPOINT EMIPOINT
TOPSTAR TECHNOLOGY
Swain Xu(许许许)
Page Name Touchpad Board
A A
Size Project Name Rev
A4 P01
A
Date: Friday, April 30, 2010 Sheet 39 of 39
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5 4 3 2 1