VLSI Testing

Sequential
Sequential Circuits
Circuits with
with
Combinational
Combinational TG
TG complexity
complexity

Virendra Singh
Indian Institute of Science
Bangalore
virendra@computer.org

E0-286: Testing and Verification of SoC Design

Lecture – 19
Mar 11, 2008 E0-286@SERC 1
 Scan
Scan Circuit
Circuit

R3
R1 C2

C1
C4

R2 C3 R4

R5
R6

Mar 11, 2008 E0-286@SERC 2

 Partial
Partial Scan
Scan

R3
R1 C2

C1
C4

R2 C3 R4

R5
R6

Mar 11, 2008 E0-286@SERC 3

 Partial
Partial Scan
Scan

R3
R1 C2

C1
C4

R2 C3 R4

SI
R5
R6
SO
Mar 11, 2008 E0-286@SERC 4
 Balanced
Balanced Circuit
Circuit
A synchronous sequential circuit S is
said to be balanced sequential
circuit if
1. It is an acyclic circuit, and
2. For any pair of PI and PO in S, the
sequential depth of all paths
connecting them are equal

Mar 11, 2008 E0-286@SERC 5

 Classification
Classification

Sequential Circuit of
Acyclic structure

Sequential Circuit of
Balance Structure

Mar 11, 2008 E0-286@SERC 6

 Balanced
Balanced Circuit
Circuit
Transformation
• Retiming

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 Transformation
Transformation

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 TG
TG for
for Balance
Balance Circuit
Circuit

Mar 11, 2008 E0-286@SERC 9

 TG
TG for
for Balance
Balance Circuit
Circuit

Mar 11, 2008 E0-286@SERC 10

 Thank You

Mar 11, 2008 E0-286@SERC 11