Wistron BOLSENA-Acer Aspire 5020 PDF

5 4 3 2 1
See 'TEXT' in 0MEMO or 1MEMO property in component

Dummy when 'USE EZ4'
Dummy when 'NO EZ4' Bolsena Block Diagram 91.4C501.001 (04243)
Dummy when use '10/100' 200-PIN DDR SODIMM

Dummy when use 'GIGA' CLK GEN AMD CPU DDR 333/400
IDT CV1373 DDR x2
Dummy when use 'UMA' 35W/25W
D D
Dummy when use 'DIS' 8,9,10
LEDs 17
Dummy when use 'SATA' 4,5,6,7
RTC BAT. 18
Dummy when use 'IDE'
BUTTONs 35 SVIDEO/COMP
HyperTransport TVOUT 16
Dummy when use ''M26'
6.4GB/S 16b/8b
LVDS
PWR SW ATI LCD 17
TSP2220A RS480M Power Block Diag -> Page 40
28
TI
PCMCIA AGTL+ CPU I/F + UMA
PCI 7411
SLOT PCI Express x16 ATI
PCMCIA I/F 1* Slot Cardbus 11,12,13,14 RGB CRT
Support 1* 1394 M26/M24 CRT 16
TypeII CardReader 50,51,52
C
28 MS/xD CH7301C 15 C
SM/MMC/SD PCI-Express
1394 4pin 5 in 1 28 x2 VRAM x4 TMDS DVI-D
Conn 28 26,27 (M26/M24 diff.) 53,54 (EZ4 only ) 15
ATI BlueTooth
SB400 miniUSB
Mini-PCI PCI Bus / 33MHz 24
ACPI 2.0 6xUSB 2.0
USB x 4
802.11a/b/g PCI 24
31 CODEC Line In 33
AC97 ALC655 MIC In
32
6-CH
1000Mb AC97 2.2
RJ45 TXFM PCI LAN Line Out33
30 30
MODEM RJ11
Realtek OP AMP
MDC Card CONN
RTL8110SBL 30 G1421
24 33
1000/100/10 Int. SPKR33
TXFM 10/100Mb
B
RTL8100C B
30
100/10 29 LPC Bus / 33MHz
LPC I/F
ATA 133 18,19,20,21,22
Thermal XBUS
NS SIO KBC
& Fan
PIDE
SIDE
PC87392 KB3910
37
G792 23 34
DVD/
SATA HDD
CD-RW
25 25 25 Touch Int.
ISA ROM
Pad KB
FIR 35 35 36
37
A <Variant Name> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Port Replicator 4 (124 PIN) Taipei Hsien 221, Taiwan, R.O.C.
Title
AC RJ45-11 SEARIAL PRINTER PS2 MIC LINE IN LINE TV DVI PCIeX2 SMBUS BLOCK DIAGRAM
IN PORT CRT OUT OUT Size
A3
Document Number Rev
-1
Bolsena
Date: Tuesday, April 12, 2005 Sheet 1 of 58
5 4 3 2 1
5 4 3 2 1
PCI Routing
IDSEL IRQ REQ/GNT
MiniPCI 21 F 0
LAN 23 H 2
D D
7411 22 E (CardBus) 1
7411 22 G (1394) 1
7411 22 E (FlashMedia) 1
C C
B B
Ref. function schematic BOM
-------------------------
U81 cpu socket 62.10055.091 (DON'T CHANGE) (3mm high)
U80 north bridge 71.RS48M.00U 71.RS48M.B0U (ver A22)
U43 south bridge 71.SB400.B0U 71.SB400.D0U (ver A32)
U32 clock gen. 71.00137.A0W 71.00137.B0W
---
U70 VGA M24 71.0M26P.00U 71.00M24.C0U
U64 VRAM FOR M24 72.55732.B0U 72.52832.E05
U65 VRAM FOR M24 72.55732.B0U 72.52832.E05
U69 VRAM FOR M24 72.55732.B0U 72.52832.E05
U71 VRAM FOR M24 72.55732.B0U 72.52832.E05
---
U70 VGA M26 71.0M26P.00U (DON'T CHANGE)
U64 VRAM FOR M26 72.55732.B0U (DON'T CHANGE)
---
U66 BIOS SOCKET 72.39040.G03 62.10002.032 (NO NEED WHEN PD)
U66 BIOS IC 72.39040.G03 72.39040.H03 (DIP STAGE IN LAB, SMT IN PD)
A --- <Variant Name> A
LOUT1 AUDIO 22.10257.001 22.10147.031 (NO SPDIF)
---
U75 GIGA LAN 71.08110.00G 71.08110.A0G Wistron Corporation
U75 10/100 LAN 71.08110.00G 71.08100.C0G Taipei Hsien 221, Taiwan, R.O.C.
---
HDD1 20.80175.044 20.80592.044 Title
SATA1 20.F0614.022 20.F0665.022 CHANGE HISTORY
EZ4 20.80579.120 20.80591.120 (AFTER SB) Size Document Number Rev
A3 Bolsena -1
Date: Thursday, March 31, 2005 Sheet 2 of 58

5 4 3 2 1
A B C D E
3D3V_S0
3D3V_S0 3D3V_CLK_VDD 3D3V_CLK_VDDA
1 L14 2 1 L12 2
0R0603-PAD 0R0603-PAD
1
SC 0308
C421 C423 C397 C398 C415 C418 C414
SC 0308 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC10U10V5ZY SCD1U16V SC10U10V5ZY
2
RN56
2 3 SRN33-2-U2 SBLINK_CLK# 13
3D3V_CLK_VDDA 1 4 SBLINK_CLK 13
1
1
4 1 4 RN45 SBSRC_CLK# 18 4
C416 C417 C420 C419 3D3V_S0 3D3V_CLK_VDD 2 3 SBSRC_CLK 18
SCD1U16V SCD1U16V SCD1U16V SCD1U16V U32 SRN33-2-U2
2
2
1 L13 2 3D3VDD48_S0 3 33 SRC_CLK0# RN46
0R0603-PAD VDD_48 SRCC0 SRC_CLK0
39 VDDA SRCT0 34 1 4 CLK_PCIE_DOCK1# 57
1
32 25 SRC_CLK3# 2 3 CLK_PCIE_DOCK1 57
SC 0308 C399 VDD_SRC SRCC3 SRC_CLK3
SRCT3 24
SC2D2U16V5ZY 21 23 SRC_CLK4# SRN33-2-U2
2
VDD_SRC SRCC4 SRC_CLK4
14 22 RN47
VDD_SRC SRCT4 SRC_CLK5#
35 VDD_SRC SRCC5 19 1 4 CLK_PCIE_DOCK2# 57
18 SRC_CLK5 2 3 CLK_PCIE_DOCK2 57
SRCT5
56 VDD_REF SRCC6 17
51 16 SRN33-2-U2
VDD_PC1 SRCT6
1 2 C400 XI_CLK 43 VDD_CPU SRCC7 13 Dummy when no EZ4
Dummy when 'NO EZ4' SC33P50V2JN 48 VDD_HTT SRCT7 12
1
2
R278 40
57 SMBC_SB_EZ4 X2 DUMMY-R3 CPUC1
57 SMBD_SB_EZ4 1 XIN CPUT1 41
X-14D318MHZ-1-U1 2 44 CPUCLKJ_CY 1 R296 2 15R2J CPUCLK# 6
XOUT CPUC0 CPUCLK_CY
45 1 R297 2 15R2J CPUCLK 6
1
CPUT0
2
1
USB_48M 4
2
RN120 USB_48
1 2 C422 XO_CLK SMBC_CLK 7 SCL
RN55
SC33P50V2JN SMBD_CLK 8 29 ATI_CLK0# 2 3 NBSRC_CLK# 13
SRN33-2-U2 R264 2 22R2 SDA SRCC1 ATI_CLK0
26 CLK48_CARDBUS 1 SRCT1 30 1 4 NBSRC_CLK 13
1 R263 2 22R2 10 28 ATI_CLK1#
21 CLK48_USB CLKREQ0# SRCC2 ATI_CLK1
11 27 SRN33-2-U2
3
4
R261 CLKREQ1# SRCT2

8,21 SMBC_SB 1 2 33R2
1 2 RN44 CLK_PCIE_DOCK1# 1 R253 2
3 8,21 SMBD_SB R260 33R2 SC 0309 FS2 49D9R2F 3
9 SEL24/24_48# VSS_SRC 36 1 4 GFX_CLK# 49
SC 0309 1 R277 2 FS1 53 20 2 3 CLK_PCIE_DOCK1 1 R254 2
13 CLK14_NB REF1 VSS_SRC GFX_CLK 49
1 R279 2 33R2 FS0 54 15 49D9R2F
21 SB_OSC_CLK 33R2 REF0 RESET# CLK_PCIE_DOCK2#
TURBO1 26 SRN33-2-U2 1 R255 2
1 R274 2 CLK_REF2 52 49D9R2F
37 CLK14_SIO REF2
R280 13 HTREF_CLK R273 2
33R2
CLK_HTT66 47 VSS_CPU 42 Dummy when use UMA CLK_PCIE_DOCK2 1 R256 2
49D9R2F
32 CLK14_AUDIO 1 2 1 HTT66 VSS_PCI 49
33R2 75R2F 50 PCI0 VSS_HTT 46
SBLINK_CLK#
Dummy when
R294
no EZ4
VSS_SRC 31 1 2
IREF_CLKGEN 37 38 49D9R2F
IREF VSSA SBLINK_CLK
1 VSS_48 5 1 R295 2
1
6 55 49D9R2F
R298 R272 NC#6 VSS_REF SBSRC_CLK# 1 R251 2
100R2F 475R2F 49D9R2F
IDTCV137PAG SBSRC_CLK 1 R252 2
CHANGE TO 71.00137.B0W 49D9R2F
2
2
GFX_CLK# 1 R249 2
49D9R2F
GFX_CLK 1 R250 2
SB 0219 49D9R2F
Dummy when use UMA
2 2
NBSRC_CLK# 1 R292 2
49D9R2F
NBSRC_CLK 1 R293 2
49D9R2F
3D3V_CLK_VDD
DY
1 R281 2 FS0
2K2R2
1 2
DUMMY-R2
R299
1 R275 2 DY FS1
2K2R2
1 2
DUMMY-R2
R276
1 <Variant Name> 1
1 R257 2 DY FS2
2K2R2
1 2 Wistron Corporation
DUMMY-R2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R258 Taipei Hsien 221, Taiwan, R.O.C.
for ICS
Title
CLKGEN_IDTCV137
Size Document Number Rev
A3 -1
Bolsena
A B C D E
A B C D E
4 4
HTT for CPU sideA HTT for CPU sideB

Transmit power Receive power
and NB sideA Receive and NB sideA
power Transmit power
1D2V_S0 U81A 1D2V_HT0B_S0
D29 VLDT0_A VLDT0_B AH29 LAYOUT: Place bypass cap on topside of board near
D27 AH27
VLDT0_A VLDT0_B HTT power pins that are not connected directly to
1
1
D25 VLDT0_A VLDT0_B AG28
3 C244 C245 C246 C247 C28 AG26 C242 downstream HTT device, but connected internally to 3
SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY SCD22U16V3ZY VLDT0_A VLDT0_B SC4D7U10V5ZY
C26 AF29
other HTT power pins.
2
2
VLDT0_A VLDT0_B
B29 VLDT0_A VLDT0_B AE28
B27 VLDT0_A VLDT0_B AF25
NB0CADOUT15 T25 N26 CPUCADOUT15 CPUCADOUT[15..0] 11
11 NB0CADOUT[15..0] NB0CADOUTJ15 L0_CADIN_H15 L0_CADOUT_H15 CPUCADOUTJ15
11 NB0CADOUTJ[15..0] R25 L0_CADIN_L15 L0_CADOUT_L15 N27 CPUCADOUTJ[15..0] 11
NB0CADOUT14 U27 L25 CPUCADOUT14
NB0CADOUTJ14 L0_CADIN_H14 L0_CADOUT_H14 CPUCADOUTJ14
U26 L0_CADIN_L14 L0_CADOUT_L14 M25
Used SideB Power Plane NB0CADOUT13 V25 L26 CPUCADOUT13 Used SideA Power Plane
U25 L0_CADIN_L13 L0_CADOUT_L13 L27
NB0CADOUT12 W27 J25 CPUCADOUT12
W26 L0_CADIN_L12 L0_CADOUT_L12 K25
NB0CADOUT11 AA27 G25 CPUCADOUT11
AA26 L0_CADIN_L11 L0_CADOUT_L11 H25
NB0CADOUT10 AB25 G26 CPUCADOUT10
AA25 L0_CADIN_L10 L0_CADOUT_L10 G27
NB0CADOUT9 AC27 E25 CPUCADOUT9
AC26 L0_CADIN_L9 L0_CADOUT_L9 F25
NB0CADOUT8 AD25 E26 CPUCADOUT8
AC25 L0_CADIN_L8 L0_CADOUT_L8 E27
NB0CADOUT7 T27 N29 CPUCADOUT7
T28 L0_CADIN_L7 L0_CADOUT_L7 P29
NB0CADOUT6 V29 M28 CPUCADOUT6
U29 L0_CADIN_L6 L0_CADOUT_L6 M27
NB0CADOUT5 V27 L29 CPUCADOUT5
V28 L0_CADIN_L5 L0_CADOUT_L5 M29
NB0CADOUT4 Y29 K28 CPUCADOUT4
W29 L0_CADIN_L4 L0_CADOUT_L4 K27
2 NB0CADOUT3 CPUCADOUT3 2
AB29 L0_CADIN_H3 L0_CADOUT_H3 H28
NB0CADOUTJ3 AA29 H27 CPUCADOUTJ3
NB0CADOUT2 L0_CADIN_L3 L0_CADOUT_L3 CPUCADOUT2
AB27 L0_CADIN_H2 L0_CADOUT_H2 G29
NB0CADOUTJ2 AB28 H29 CPUCADOUTJ2
AD29 L0_CADIN_H1 L0_CADOUT_H1 F28
NB0CADOUTJ1 AC29 F27 CPUCADOUTJ1
AD27 L0_CADIN_H0 L0_CADOUT_H0 E29
NB0CADOUTJ0 AD28 F29 CPUCADOUTJ0
L0_CADIN_L0 L0_CADOUT_L0
NB0HTTCLKOUT1 Y25 J26 CPUHTTCLKOUT1 CPUHTTCLKOUT1 11
11 NB0HTTCLKOUT1 NB0HTTCLKOUTJ1 L0_CLKIN_H1 L0_CLKOUT_H1 CPUHTTCLKOUTJ1
11 NB0HTTCLKOUTJ1 W25 L0_CLKIN_L1 L0_CLKOUT_L1 J27 CPUHTTCLKOUTJ1 11
NB0HTTCLKOUT0 Y27 J29 CPUHTTCLKOUT0 CPUHTTCLKOUT0 11
1D2V_HT0B_S0 11 NB0HTTCLKOUT0 NB0HTTCLKOUTJ0 L0_CLKIN_H0 L0_CLKOUT_H0 CPUHTTCLKOUTJ0
11 NB0HTTCLKOUTJ0 Y28 L0_CLKIN_L0 L0_CLKOUT_L0 K29 CPUHTTCLKOUTJ0 11
1 R176 2 49D9R2F CPUHTTCTLIN1 R27 N25

R177 2 49D9R2F CPUHTTCTLINJ1 L0_CTLIN_H1 L0_CTLOUT_H1
1 R26 L0_CTLIN_L1 L0_CTLOUT_L1 P25
NB0HTTCTLOUT T29 P28 CPUHTTCTLOUT0 CPUHTTCTLOUT0 11
11 NB0HTTCTLOUT NB0HTTCTLOUTJ L0_CTLIN_H0 L0_CTLOUT_H0 CPUHTTCTLOUTJ0
11 NB0HTTCTLOUTJ R29 L0_CTLIN_L0 L0_CTLOUT_L0 P27 CPUHTTCTLOUTJ0 11
62.10055.091
SB 0127
ME : 60.10055.091
(3MM HEIGHT)
1 <Variant Name> 1
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(1/4)_HyperTransport I/F
A3 -1
Bolsena
A B C D E
A B C D E
VREF_DDR_MEM
NOTE: Test with passive probes only. 1D25V_S3
2D5V_S3
NOTE: Install to bypass op-amp TPAD30 TP47 U81B
DDRVTT_SENSE AE13 D17

VTT_SENSE VTT_A
4
VTT_A A18 4
1
VREF_DDR_CLAW B17
2D5V_S3 VTT_A C266 C267
AG12 MEMVREF1 VTT_A C17
1
AF16 SCD1U SC1000P50V2KX
2
R291 C441 VTT_B
1 R206 2 34D8R2F MEMZN D14 MEMZN VTT_B AG16
100R2F SCD1U 1 R205 2 34D8R2F MEMZP C14 AH16
2
VREF_DDR_MEM MEMZP VTT_B

VTT_B AJ17
For REGISTED DIMM Only
2
AG10 MEMRESET#
MEMRESET_L UNBUFFER DIMM NC
AE8 M_CKE#0 M_CKE#0 8,9
1 MEMCKEA
1
AE7 M_CKE#1 M_CKE#1 8,9
9 M_DATA[63..0] MEMCKEB
1
C440 C439 M_DATA63 A16

R290 SCD1U SC1000P50V2KX M_DATA62 MEMDATA63 M_CLK7
B15 D10 M_CLK7 8
2
2
100R2F M_DATA61 MEMDATA62 MEMCLK_H7 M_CLK#7
A12 MEMDATA61 MEMCLK_L7 C10 M_CLK#7 8
M_DATA60 B11 E12 M_CLK6 M_CLK6 8
M_DATA59 MEMDATA60 MEMCLK_H6 M_CLK#6
A17 E11 M_CLK#6 8
2
M_DATA58 MEMDATA59 MEMCLK_L6 M_CLK5

A15 MEMDATA58 MEMCLK_H5 AF8 M_CLK5 8
LAYOUT: Locate close to DIMMs.
M_DATA57 C13 AG8 M_CLK#5 M_CLK#5 8
M_DATA56 MEMDATA57 MEMCLK_L5 M_CLK4 2D5V_S3
A11 MEMDATA56 MEMCLK_H4 AF10 M_CLK4 8
M_DATA55 A10 AE10 M_CLK#4 M_CLK#4 8
M_DATA54 MEMDATA55 MEMCLK_L4
B9 V3 RN36
C7 MEMDATA53 MEMCLK_L3 V4 8 1
M_DATA52 A6 K5 M_CLK#0 7 2
NOTE: Remove to bypass op-amp M_DATA51
M_DATA50
C11
A9
MEMDATA52
MEMDATA51
MEMDATA50
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
K4
R5 M_CLK1
M_CLK1
M_CLK0
6
5
3
4
M_DATA49 A5 P5 M_CLK#1
M_DATA48 MEMDATA49 MEMCLK_L1 M_CLK0
B5 P3 SRN10K-2
C5 P4
VREF_DDR_CLAW
3 M_DATA46 MEMDATA47 MEMCLK_L0 3
A4 MEMDATA46
M_DATA45 E2 D8 M_CS#7
M_DATA44 MEMDATA45 MEMCS_L7 M_CS#6
E1 MEMDATA44 MEMCS_L6 C8
M_DATA43 A3 E8 M_CS#5
B3 MEMDATA42 MEMCS_L4 E7
2D5V_S3 M_DATA41 E3 D6 M_CS#3
MEMDATA41 MEMCS_L3 M_CS#3 8,9
M_DATA40 F1 E6 M_CS#2 M_CS#2 8,9
G2 MEMDATA39 MEMCS_L1 C4 M_CS#1 8,9
M_DATA38 G1 E5 M_CS#0 M_CS#0 8,9
M_DATA37 MEMDATA38 MEMCS_L0
L3 MEMDATA37
1
M_DATA36 L1 H5 M_ARAS# M_ARAS# 8,9

R197 C309 M_DATA35 MEMDATA36 MEMRASA_L M_ACAS#
G3 MEMDATA35 MEMCASA_L D4 M_ACAS# 8,9
100R2F SCD1U VREF_DDR_CLAW M_DATA34 J2 G5 M_AWE# M_AWE# 8,9
2
M_DATA33 MEMDATA34 MEMWEA_L

L2 MEMDATA33
M_DATA32 M1 K3 M_ABS#1 M_ABS#1 8,9
2
M_DATA31 MEMDATA32 MEMBANKA1 M_ABS#0

W1 MEMDATA31 MEMBANKA0 H3 M_ABS#0 8,9
M_DATA30 W3 MEMDATA30
1
M_DATA29 AC1 E13 RSVD_M_AA15

C311 C312 M_DATA28 MEMDATA29 NC_E13 RSVD_M_AA14
AC3 MEMDATA28 NC_C12 C12 M_AA[13..0] 8,9
1
SCD1U SC1000P50V2KX M_DATA27 W2 E10 M_AA13

2
R198 M_DATA26 MEMDATA27 MEMADDA13 M_AA12

Y1 MEMDATA26 MEMADDA12 AE6
100R2F M_DATA25 AC2 AF3 M_AA11 AMD suggested M_AA13
M_DATA24 MEMDATA25 MEMADDA11 M_AA10
AD1 M5
MEMDATA24 MEMADDA10 connect to DIMM pin123
LAYOUT: Locate close to CPU.
M_DATA23 AE1 AE5 M_AA9
2

AE3 MEMDATA22 MEMADDA8 AB5
M_DATA21 AG3 AD3 M_AA7
AJ4 MEMDATA20 MEMADDA6 Y5
M_DATA19 AE2 AB4 M_AA5 M_DQS8
MEMDATA19 MEMADDA5 TP86 TPAD30
M_DATA18 AF1 Y3 M_AA4 M_ADM8
2 MEMDATA18 MEMADDA4 TP87 TPAD30 2
M_DATA17 AH3 V5 M_AA3
AJ3 MEMDATA16 MEMADDA2 T5
M_DATA15 AJ5 T3 M_AA1
AJ6 MEMDATA14 MEMADDA0 N5
M_DATA13 AJ7
M_DATA12 MEMDATA13 M_BRAS#
AH9 MEMDATA12 MEMRASB_L H4 M_BRAS# 8,9
M_DATA11 AG5 F5 M_BCAS# M_BCAS# 8,9 MEMRESET#
MEMDATA11 MEMCASB_L TP44 TPAD30
Place it near CPU M_DATA10 AH5 F4 M_BWE# M_BWE# 8,9 M_CS#7
MEMDATA10 MEMWEB_L TP53 TPAD30
M_DATA9 AJ9 M_CS#6
MEMDATA9 TP54 TPAD30
M_DATA8 AJ10 L5 M_BBS#1 M_BBS#1 8,9 M_CS#5
MEMDATA8 MEMBANKB1 TP49 TPAD30
M_DATA7 AH11 J5 M_BBS#0 M_BBS#0 8,9 M_CS#4
MEMDATA7 MEMBANKB0 TP61 TPAD30
M_DATA6 AJ11 RSVD_M_AA15
MEMDATA6 TP50 TPAD30
M_DATA5 AH15 E14 RSVD_M_BA15 RSVD_M_AA14
R203 MEMDATA5 NC_E14 TP55 TPAD30
1 2 M_CLK7 M_DATA4 AJ15 D12 RSVD_M_BA14 M_BA[13..0] 8,9 RSVD_M_BA15
121R2F MEMDATA4 NC_D12 TP51 TPAD30
M_CLK#7 M_DATA3 AG11 E9 M_BA13 RSVD_M_BA14
MEMDATA3 MEMADDB13 TP52 TPAD30
M_DATA2 AJ12 AF6 M_BA12
M_DATA1 MEMDATA2 MEMADDB12 M_BA11
AJ14 MEMDATA1 MEMADDB11 AF4 AMD suggested M_BA13
1 R204 2 M_CLK6 M_DATA0 AJ16 M4 M_BA10
121R2F M_CLK#6 MEMDATA0 MEMADDB10
AD5 M_BA9 connect to DIMM pin123
M_ADM8 MEMADDB9 M_BA8
9 M_ADM[7..0] R1 MEMDQS17 MEMADDB8 AC5
M_ADM7 A13 AD4 M_BA7
M_ADM6 MEMDQS16 MEMADDB7 M_BA6
A7 MEMDQS15 MEMADDB6 AA5
1 R199 2 M_CLK5 M_ADM5 C2 AB3 M_BA5
121R2F M_CLK#5 M_ADM4 MEMDQS14 MEMADDB5 M_BA4
H1 Y4
M_ADM3
M_ADM2
AA1
MEMDQS13
MEMDQS12
MEMADDB4
MEMADDB3 W5 M_BA3
M_BA2
NOT SUPPORT ECC CHECK
AG1 MEMDQS11 MEMADDB2 U5
1 R200 2
121R2F
M_CLK4
M_CLK#4
M_ADM1
M_ADM0
AH7
AH13
MEMDQS10 MEMADDB1 T4
M3
M_BA1
M_BA0
AMD suggested remove
M_DQS8 MEMDQS9 MEMADDB0
1 9 M_DQS[7..0] M_DQS7
T1
A14
MEMDQS8
MEMDQS7 MEMCHECK7 N3 CB7 PULL-HI
<Variant Name> resistor. 1
M_DQS6 A8 N1 CB6 TP60 TPAD30

M_DQS5 MEMDQS6 MEMCHECK6 CB5 TP90 TPAD30
M_DQS4
D1
J1
MEMDQS5
MEMDQS4
MEMCHECK5
MEMCHECK4
U3
V1 CB4 TP59 TPAD30 Wistron Corporation
M_DQS3 AB1 N2 CB3 TP83 TPAD30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M_DQS2 MEMDQS3 MEMCHECK3 CB2 TP89 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
AJ2 MEMDQS2 MEMCHECK2 P1
M_DQS1 AJ8 U1 CB1 TP88 TPAD30
M_DQS0 MEMDQS1 MEMCHECK1 CB0 TP84 TPAD30 Title
AJ13 MEMDQS0 MEMCHECK0 U2
TP85 TPAD30
CPU(2/4)_DDR
A3 -1
Bolsena
A B C D E
A B C D E
2D5V_CPUA_S0
2D5V_VDDA_S0
1
DY
1
3D3V_S0 R604 R1
Iomax=120mA C733 20KR2F
SC22P50V2JN-1
Vout = 1.25*(1+ R1/R2)
U73
2
1 5 2D5V_VDDA_VREF
SHDN# SET
2 GND DY
1
2D5V_S0 AMD SUGGEST TO USE 100 ~ 300UH 3 4
IN OUT R152
4 SC 0308 20KR2F R2 4
1
G913C-U DY
1 R173 2 C210 C734
2
0R0603-PAD SC1U10V3KX SC1U10V3KX
2
DY
1
2D5V_CPUR_S0
C239
SC10U10V5ZY DY DY
2
Change
L270H 2D5V_VDDA_S0 LAYOUT: Route trace 50 mils wide and LAYOUT: Route VDDA trace approx.
500 to 750 mils long between these 50 mils wide (use 2x25 mil traces to
2D5V_CPUA_S0 U81C
caps. exit ball field) and 500 mils long.
1 R174 2 1 R175 2 AH25 A20 THERMTRIP#
0R3-U 0R0805-PAD VDDA1 THERMTRIP_L
AJ25 VDDA2
1
1
THERMDA A26 THERMDP 23
DY TC3 SC 0308 C240 C243 C241 AF20 A27 THERMDN 23
ST100U4VBM-U SC4D7U10V5ZY SC3300P50V2KX SCD22U16V3ZY13,18 LDT_RST# AE18
RESET_L THERMDC
VID[4..0] 41
2
2
1D2V_HT0B_S0 18 SB_CPUPWRGD PWROK VID4
13,18 LDT_STP# AJ27 LDTSTOP_L VID4 AG13
AF14 VID3
VID3
1 R153 2 44D2R2F L0_REF1 AF27 L0_REF1 VID2 AG14 VID2
AMD SUGGEST TO USE 2D5V_CPUA_S0 1 R154 2 44D2R2F L0_REF0 AE26 L0_REF0 VID1 AF15 VID1
AE15 VID0
VID0
1
41 COREFB COREFB A23
C211 C212 COREFB# COREFB_H NC_AG18 TP37 TPAD30
41 COREFB# A24 COREFB_L NC_AG18 AG18
KEMET,NT:5.7, B2 size SC1000P50V2KX SC1000P50V2KX CORE_SENSE B23 AH18 NC_AH18 TP36 TPAD30
2
CORE_SENSE NC_AH18 NC_AG17
AG17
ST100U4VBM-1 (80.10716.321) VDDIOFB AE12
NC_AG17
AJ18 NC_AJ18
VDDIOFBJ VDDIOFB_H NC_AJ18
Iripple=1.1A,ESR=70mohm AF12 VDDIOFB_L
VDDIOSENSE
3
AMD suggest voltege AE11 VDDIO_SENSE LAYOUT: Route FBCLKOUT_H/L 3
SANYO, NT$:6.1 from 2D5V_S0 to 2D5V_S3 3 CPUCLK 1 2 C790 CLKIN AJ21 differentially impedance 80
Iripple=1.1A,ESR=70mohm CLKIN_H
1
SC3900P50V3KX FBCLKOUT
3.5/2.8/2.0
differentially impedance 100 R618
AH21 CLKIN_L
1
169R2F
77.21071.031 2D5V_S3 AJ23 AH19 R617
NC_AJ23 FBCLKOUT_H 80D6R2F
3 CPUCLK# 1 2 C789 CLKIN# AH23 AJ19
2
SC3900P50V3KX NC_AH23 FBCLKOUT_L
1 R616 2 820R3 NC_AJ23
1 R605 2 820R3 NC_AH23
2
NC_AE24 AE24 FBCLKOUTJ
1D25V_S3 NC_AF24 NC_AE24
AF24 NC_AF24
C16 VTT_A
2D5V_S0 AG15 R191
VTT_B DBREQJ
DBREQ_L AE19 1 2
LDT_RST# R189 1 2 680R3F DBRDY AH17 DUMMY-R3
SB_CPUPWRGD R190 DBRDY
1 2 680R3F NC_D20 D20 NC_D20
LDT_STP# R606 1 2 680R3F NC_C15 C15 C21 NC_C21
NC_C15 NC_C21 NC_D18
NC_D18 D18
TMS E20 C19 NC_C19
TCK TMS NC_C19 NC_B19
E17 TCK NC_B19 B19
TRST_L B21
2D5V_S0 TDI TRST_L TDO
A21 TDI TDO A22
1 R193 2 NC_C18 C18

2D5V_S0 680R3F NC_C18
1 R194 2 NC_A19 A19 AF18
680R3F NC_A19 NC_AF18 2D5V_S3
A28 KEY1 Connect to VDDIO for AMD suggest.
8
7
6
5
2 RN28 2
AJ28 KEY0
1
NC_D22 D22
DY C160 DY R155 R156 NC_AE23 AE23 C22
SCD1U 680R3F 680R3F NC_AF23 NC_AE23 NC_C22
AF23 THERMTRIP#Level shift to SB400
2
SRN680-U DY DY NC_AF22 NC_AF23 2D5V_S0

AF22 NC_AF22
NC_AF21 AF21
1
2
3
4
DBREQJ NC_AF21
8
7
6
5
1
DBRDY RN32
TCK C1 R192
TMS NC_C1 680R3F
J3 NC_J3 NC_B13 B13
TDI R3 B7
TRST_L NC_R3 NC_B7
AA2 C3
2
TDO NC_AA2 NC_C3 THERMTRIP#
DY D3 K1 2 3 CPU_THERMTRIP# 23
1
2
3
4 NC_D3 NC_K1
SRN680-U AG2 R2 Q10
NC_AG2 NC_R2 MMBT3904-U1
2D5V_S3 1 R207 2 B18 NC_B18 NC_AA3 AA3
680R3F AH1 F3
1
DY NC_AH1 NC_F3 2D5V_S0
AE21 NC_AE21 NC_C23 C23
C20 NC_C20 NC_AG7 AG7
CHANGE FROM 1KR3 TO 680R2 FOR AMD AG4 AE22 NS3 1 R195 2
NC_AG4 NC_AE22 1KR2
C6 C24
Validation Test Points

CHECK LIST AG6
NC_C6 NC_C24
A25
RN31 SRN680-U NC_AG6 NC_A25
AE9 NC_AE9 NC_C9 C9
1 8 AG9 NC_AG9
NC_AG17
NC_AJ18
2
3
7
6
LAYOUT: Place close to the CPU.
NC_D18 4 5 LDT_RST# SB 0201
CLKIN TP38 TPAD30
CLKIN# TP34 TPAD30
NC_B19 1 8 CORE_SENSE TP35 TPAD30
1 <Variant Name> 1
NC_C19 2 7 NC_C15 VDDIOFB TP43 TPAD30
NC_D20 3 6 NC_AE23 TP56 TPAD30 VDDIOFBJ TP46 TPAD30
NC_C21 NC_AF23 TP42 TPAD30 VDDIOSENSE TP45 TPAD30
4 5
NC_AF22 TP39 TPAD30 NC_AE24 TP48 TPAD30 Wistron Corporation
RN33 SRN680-U NC_AF21 TP41 TPAD30 NC_AF24 TP27 TPAD30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
TP40 TPAD30 TP26 TPAD30 Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU(3/4)_Control & Debug
A3 -1
Bolsena
A B C D E
A B C D E
U81E
N20 VCC_CORE_S0 2D5V_S3
VSS U81D
Y17 VSS VSS L20
K17 VSS VSS J20
H17 VSS VSS AF19 L7 VDD VDDIO E4
F17 VSS VSS AD19 AC15 VDD VDDIO G4
E18 VSS VSS AB19 H18 VDD VDDIO J4
AJ26 VSS VSS Y19 B20 VDD VDDIO L4
AE29 VSS VSS K19 E21 VDD VDDIO N4
AC16 VSS VSS H19 H22 VDD VDDIO U4
AA16 VSS VSS F19 J23 VDD VDDIO W4
J16 VSS VSS D19 H24 VDD VDDIO AA4
G16 VSS VSS AC18 F26 VDD VDDIO AC4
E16 VSS VSS AA18 N7 VDD VDDIO AE4
4 AH14 VSS VSS G18 L9 VDD VDDIO D5 LAYOUT: Place in uPGA socket cavity. 4
AD15 B16 V10 AF5 VCC_CORE_S0
VSS VSS VDD VDDIO
AB15 VSS VSS AD17 G13 VDD VDDIO F6 0.22u x 6 10u x 4
K15 VSS VSS AB17 K14 VDD VDDIO H6
E15 VSS VSS H15 Y14 VDD VDDIO K6
1
D16 VSS VSS F15 AB14 VDD VDDIO M6
AE14 G28 G15 P6 C271 C269 C791 C316 C318 C818 C315 C272 C817 C793
VSS VSS VDD VDDIO
SC10U10V5ZY
SC10U10V5ZY
SC10U10V5ZY
SC10U10V5ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
AC14 D28 J15 T6
2
VSS VSS VDD VDDIO
AA14 VSS VSS B28 AA15 VDD VDDIO V6
J14 VSS VSS C27 H16 VDD VDDIO Y6
G14 VSS VSS AH26 K16 VDD VDDIO AB6
AF17 VSS VSS AF26 Y16 VDD VDDIO AD6
AD13 VSS VSS AD26 AB16 VDD VDDIO D7
AB13 VSS VSS Y26 G17 VDD VDDIO G7
Y13 VSS VSS T26 J17 VDD VDDIO J7 LAYOUT: Place on backside of processor.
K13 VSS VSS M26 AA17 VDD VDDIO AA7
H13 H26 AC17 AC7 VCC_CORE_S0
VSS VSS VDD VDDIO
F13 VSS VSS D26 AE17 VDD VDDIO AF7
AH12 VSS VSS B26 F18 VDD VDDIO F8
AC12 VSS VSS C25 K18 VDD VDDIO H8
1
AA12 VSS VSS B25 Y18 VDD VDDIO AB8
G12 AJ24 AB18 AD8 C816 C813 C794 C815 C814 C792
VSS VSS VDD VDDIO
SC10U10V5ZY
SC10U10V5ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
B12 AG24 AD18 D9
2
VSS VSS VDD VDDIO
AD11 VSS VSS AC24 AG19 VDD VDDIO G9
AB11 VSS VSS AA24 E19 VDD VDDIO AC9
Y11 VSS VSS W24 G19 VDD VDDIO AF9
K11 VSS VSS U24 AC19 VDD VDDIO F10
H11 VSS VSS R24 AA19 VDD VDDIO AD10 DY
3
F11 VSS VSS N24 J19 VDD VDDIO D11 0.22u x 4 10u x 2 3
AH10 VSS VSS J24 F20 VDD VDDIO AF11
AC10 VSS VSS G24 H20 VDD VDDIO F12
W10 E24 K20 AD12 DY DY
VSS VSS VDD VDDIO 2D5V_S3 DY
U10 VSS VSS AG23 M20 VDD VDDIO D13
R10 AD23 P20 AF13 2D5V_S3
VSS VSS VDD VDDIO
N10 VSS VSS AB23 T20 VDD VDDIO F14
L10 VSS VSS Y23 V20 VDD VDDIO AD14
1
J10 VSS VSS V23 Y20 VDD VDDIO F16
1
G10 T23 AB20 AD16 C268 C340 C339 C273 C319 C341
VSS VSS VDD VDDIO C320 C313 C314 C365 C317 C367 C366
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
SCD22U16V3ZY
B10 P23 AD20 D15
2
VSS VSS VDD VDDIO VCC_CORE_S0
SC10U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
AD9 K23 G21 R4
2
VSS VSS VDD VDDIO
Y9 VSS VSS H23 J21 VDD
V9 VSS VSS F23 L21 VDD VDD N28
T9 VSS VSS D23 N21 VDD VDD U28
P9 VSS VSS AJ22 R21 VDD VDD AA28
M9 VSS VSS AH22 U21 VDD VDD AE27 10u x 1 4.7u x 6
K9 VSS VSS AG22 W21 VDD VDD R7
H9 VSS VSS AC22 AA21 VDD VDD U7
F9 AA22 AC21 W7 1D25V_S3 1D25V_S3
VSS VSS VDD VDD
AH8 VSS VSS AG29 F22 VDD VDD K8
AC8 VSS VSS U22 K22 VDD VDD M8
W8 VSS VSS R22 M22 VDD VDD P8
1
U8 VSS VSS N22 P22 VDD VDD T8
R8 L22 T22 V8 C275 C274 C276 C265
VSS VSS VDD VDD
SCD22U16V3ZY
SCD22U16V3ZY
SC4D7U10V5ZY
SC4D7U10V5ZY
N8 J22 V22 Y8
2
2
VSS VSS VDD VDD
L8 VSS VSS G22 Y22 VDD VDD J9
J8 VSS VSS E22 AB22 VDD VDD N9
G8 VSS VSS B22 AD22 VDD VDD R9
B8 VSS VSS AG21 E23 VDD VDD U9
2 2
AD7 VSS VSS AD21 G23 VDD VDD W9
AB7 VSS VSS Y21 L23 VDD VDD AA9 0.22u x 2 4.7u x 2
V7 VSS VSS V21 N23 VDD VDD H10
T7 VSS VSS T21 R23 VDD VDD K10
P7 VSS VSS P21 U23 VDD VDD M10
M7 VSS VSS M21 W23 VDD VDD P10
K7 VSS VSS K21 AA23 VDD VDD T10
H7 VSS VSS H21 AC23 VDD VDD Y10
F7 VSS VSS F21 B24 VDD VDD AB10
AH6 VSS VSS D21 D24 VDD VDD G11
AC6 VSS VSS AJ20 F24 VDD VDD J11
AA6 VSS VSS AG20 K24 VDD VDD AA11
U6 VSS VSS AE20 M24 VDD VDD AC11
R6 VSS VSS AC20 P24 VDD VDD H12
N6 VSS VSS AA20 T24 VDD VDD K12
L6 VSS VSS W20 V24 VDD VDD Y12
J6 VSS VSS U20 Y24 VDD VDD AB12
G6 VSS VSS R20 AB24 VDD VDD J13
B6 VSS VSS G20 AD24 VDD VDD AA13
AH4 VSS VSS J18 AH24 VDD VDD AC13
B4 VSS VSS AE16 AE25 VDD VDD H14
AH2 VSS VSS Y15 K26 VDD VDD AB26
AD2 VSS VSS B14 P26 VDD VDD E28
AB2 VSS VSS J12 V26 VDD VDD J28
Y2 VSS VSS AA10
V2 VSS VSS AB9
T2 VSS VSS AA8
P2 VSS VSS Y7
1 M2 VSS VSS W6 <Variant Name> 1
K2 VSS VSS AF2
H2 VSS VSS D2
F2
C29
VSS
VSS
VSS
VSS
AG27
AG25 Wistron Corporation
AH28 L24 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VSS VSS Taipei Hsien 221, Taiwan, R.O.C.
AF28 VSS VSS M23
AC28 VSS VSS W22
W28 AB21 Title
VSS VSS
R28
L28
VSS VSS AH20
B2
CPU(4/4)_Power
VSS VSS Size Document Number Rev
A3 -1
Bolsena
A B C D E
A B C D E
DDR1 DDR2
M_AA0 112 121 M_CS#0 5,9 M_BA0 112 121 M_CS#2 5,9
M_AA1 A0 /CS0 M_BA1 A0 /CS0
111 A1 /CS1 122 M_CS#1 5,9 111 A1 /CS1 122 M_CS#3 5,9
M_AA2 110 M_BA2 110
M_AA3 A2 M_CKE#0 M_BA3 A2
109 A3 CKE0 96 M_CKE#0 5,9 109 A3 CKE0 96 M_CKE#1 5,9
M_AA4 108 95 M_BA4 108 95
M_AA5 A4 CKE1 M_BA5 A4 CKE1
107 A5 107 A5
M_AA6 106 11 M_DQS_R0 M_BA6 106 11 M_DQS_R0 ! NOT THIS LIBRARY
M_AA7 A6 DQS0 M_DQS_R1 M_BA7 A6 DQS0 M_DQS_R1
105 A7 DQS1 25 105 A7 DQS1 25
M_AA8 102 47 M_DQS_R2 M_BA8 102 47 M_DQS_R2
M_AA9 A8 DQS2 M_DQS_R3 M_BA9 A8 DQS2 M_DQS_R3
101 A9 DQS3 61 101 A9 DQS3 61
M_AA10 115 133 M_DQS_R4 M_BA10 115 133 M_DQS_R4
M_AA11 A10 / AP DQS4 M_DQS_R5 M_BA11 A10 / AP DQS4 M_DQS_R5
100 A11 DQS5 147 100 A11 DQS5 147
4 M_AA12 99 169 M_DQS_R6 M_BA12 99 169 M_DQS_R6 4
A12 DQS6 M_DQS_R7 A12 DQS6 M_DQS_R7
DQS7 183 DQS7 183
M_ABS#0 117 77 M_BBS#0 117 77
BA0 DQS8 BA0 DQS8 M_ADM_R[7..0] 9
M_ABS#1 116 M_BBS#1 116
BA1 M_ADM_R0 BA1 M_ADM_R0
DM0 12 M_ADM#0 DM0 12 M_ADM#0 M_DATA_R_[63..0] 9
M_DATA_R_0 5 26 M_ADM_R1 M_ADM#1 M_DATA_R_0 5 26 M_ADM_R1 M_ADM#1
M_DATA_R_1 DQ0 DM1 M_ADM_R2 M_DATA_R_1 DQ0 DM1 M_ADM_R2
7 DQ1 DM2 48 M_ADM#2 7 DQ1 DM2 48 M_ADM#2 M_DQS_R[7..0] 9
17 DQ3 DM4 134 M_ADM#4 17 DQ3 DM4 134 M_ADM#4 M_AA[13..0] 5,9
8 DQ5 DM6 170 M_ADM#6 8 DQ5 DM6 170 M_ADM#6 M_ABS#[1..0] 5,9
M_DATA_R_7 DQ6 DM7 M_DATA_R_7 DQ6 DM7
18 DQ7 DM8 78 18 DQ7 DM8 78 M_BA[13..0] 5,9
M_DATA_R_8 19 M_DATA_R_8 19
M_DATA_R_9 DQ8 M_DATA_R_9 DQ8
23 DQ9 CK0 35 M_CLK5 5 23 DQ9 CK0 35 M_CLK4 5 M_BBS#[1..0] 5,9
M_DATA_R_10 29 37 M_CLK#5 5 M_DATA_R_10 29 37 M_CLK#4 5
M_DATA_R_11 DQ10 /CK0 M_DATA_R_11 DQ10 /CK0
31 DQ11 CK1 160 M_CLK7 5 31 DQ11 CK1 160 M_CLK6 5
M_DATA_R_12 20 158 M_CLK#7 5 M_DATA_R_12 20 158 M_CLK#6 5
M_DATA_R_13 DQ12 /CK1 DDR_CLK0 M_DATA_R_13 DQ12 /CK1 DDR_CLK1
24 DQ13 CK2 89 24 DQ13 CK2 89
M_DATA_R_14 30 91 DDR_CLK#0 M_DATA_R_14 30 91 DDR_CLK#1
M_DATA_R_15 DQ14 /CK2 M_DATA_R_15 DQ14 /CK2
32 DQ15 32 DQ15
M_DATA_R_16 41 195 SMBC_SB M_DATA_R_16 41 195 SMBC_SB 3,21
M_DATA_R_17 DQ16 SCL SMBD_SB M_DATA_R_17 DQ16 SCL
43 193 43 193
M_DATA_R_18
M_DATA_R_19
M_DATA_R_20
49
53
DQ17
DQ18
DQ19
REVERSE TYPE 5.2MM SDA
SA0 194
M_DATA_R_18
M_DATA_R_19
M_DATA_R_20
49
53
DQ17
DQ18
DQ19
SDA
SA0 194
SMBD_SB 3,21
DM_SA0 1 R312
2
4K7R2 3D3V_S0
42 196 42 196
REVERSE TYPE 9.2MM

M_DATA_R_21 DQ20 SA1 M_DATA_R_21 DQ20 SA1
44 DQ21 SA2 198 44 DQ21 SA2 198
M_DATA_R_22 50 M_DATA_R_22 50
M_DATA_R_23 DQ22 M_DATA_R_23 DQ22 2D5V_S3
54 DQ23 VDD 9 54 DQ23 VDD 9
3 M_DATA_R_24 55 10 M_DATA_R_24 55 10 3
M_DATA_R_25 DQ24 VDD M_DATA_R_25 DQ24 VDD
59 21 59 21 RN62
M_DATA_R_26 DQ25 VDD M_DATA_R_26 DQ25 VDD DDR_CLK#1
65 DQ26 VDD 22 65 DQ26 VDD 22 8 1
M_DATA_R_27 67 33 M_DATA_R_27 67 33 DDR_CLK#0 7 2
M_DATA_R_28 DQ27 VDD M_DATA_R_28 DQ27 VDD DDR_CLK1
56 DQ28 VDD 34 56 DQ28 VDD 34 6 3
M_DATA_R_29 60 36 M_DATA_R_29 60 36 DDR_CLK0 5 4
66 DQ30 VDD 45 66 DQ30 VDD 45
M_DATA_R_31 68 46 M_DATA_R_31 68 46 SRN10K-2
127 DQ32 VDD 57 127 DQ32 VDD 57
M_DATA_R_33 129 58 M_DATA_R_33 129 58
135 DQ34 VDD 69 135 DQ34 VDD 69
M_DATA_R_35 139 70 M_DATA_R_35 139 70 SB 0203
128 DQ36 VDD 81 128 DQ36 VDD 81
M_DATA_R_37 130 82 M_DATA_R_37 130 82
136 DQ38 VDD 92 136 DQ38 VDD 92
M_DATA_R_39 140 93 M_DATA_R_39 140 93
141 94 141 94
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
145
151
DQ40
DQ41
DQ42
VDD
VDD
VDD
113
114
M_DATA_R_41
M_DATA_R_42
M_DATA_R_43
145
151
DQ40
DQ41
DQ42
VDD
VDD
VDD
113
114
AMD CPU
153 DQ43 VDD 131 153 DQ43 VDD 131
M_DATA_R_44 142 132 M_DATA_R_44 142 132
146 DQ45 VDD 143 146 DQ45 VDD 143
M_DATA_R_46 152 144 M_DATA_R_46 152 144
154 DQ47 VDD 155 154 DQ47 VDD 155
M_DATA_R_48 163 156 M_DATA_R_48 163 156
165 DQ49 VDD 157 165 DQ49 VDD 157
M_DATA_R_50 171 167 M_DATA_R_50 171 167
175 DQ51 VDD 168 175 DQ51 VDD 168
M_DATA_R_52 164 179 M_DATA_R_52 164 179
2 M_DATA_R_53 DQ52 VDD M_DATA_R_53 DQ52 VDD 2
166 DQ53 VDD 180 166 DQ53 VDD 180
M_DATA_R_54 172 191 M_DATA_R_54 172 191 MD63 SMA10
176 DQ55 VDD 192 2D5V_S3 176 DQ55 VDD 192 2D5V_S3
SMA11 SMA0 SMA14
M_DATA_R_56 177 M_DATA_R_56 177 SMA12 MD0
M_DATA_R_57 DQ56 M_DATA_R_57 DQ56
181 DQ57 VSS 3 NOT SUPPORT ECC CHECK 181 DQ57 VSS 3
M_DATA_R_58 187 4 M_DATA_R_58 187 4
M_DATA_R_59 189
DQ58 VSS
15 AMD suggested pull-low M_DATA_R_59 189
DQ58 VSS
15
M_DATA_R_60 DQ59 VSS M_DATA_R_60 DQ59 VSS
178 DQ60 VSS 16 178 DQ60 VSS 16
M_DATA_R_61 182 27 M_DATA_R_61 182 27
M_DATA_R_62 DQ61 VSS M_DATA_R_62 DQ61 VSS
188 DQ62 VSS 28 188 DQ62 VSS 28
M_DATA_R_63 190 38 M_DATA_R_63 190 38
DQ63 VSS DQ63 VSS
VSS 39 VSS 39
71 CB0 VSS 40 71 CB0 VSS 40 Pin 199 Pin 1
73 51 73 51
79
CB1
CB2
VSS
VSS 52 79
CB1
CB2
VSS
VSS 52 DDR1(Reverse 5.2mm)
83 CB3 VSS 63 83 CB3 VSS 63 Pin 200 Pin 2
72 CB4 VSS 64 72 CB4 VSS 64
74 75 1ST 62.10017.701 - 2ND 62.10017.201 74 75
CB5 VSS CB5 VSS
80 CB6 VSS 76 80 CB6 VSS 76
84 CB7 VSS 87 84 CB7 VSS 87
VSS 88 VSS 88
85 NC#85 VSS 90 85 NC#85 VSS 90
86 NC#86/(RESET#) VSS 103 86 NC#86/(RESET#) VSS 103 Pin 199 Pin 1
97 104 97 104
M_AA13
98
NC#97/A13
NC#98/BA2
VSS
VSS 125
M_BA13
98
NC#97/A13
NC#98/BA2
VSS
VSS 125 DDR2(Reverse 9.2mm)
123 NC#123 VSS 126 Part Number = 62.10017.201 123 NC#123 VSS 126 Pin 200 Pin 2
124 NC#124 VSS 137 124 NC#124 VSS 137
DDR-SODIMM-R-U2
200 NC#200 VSS 138
149
200 NC#200 VSS 138
149
(Bottom view)
1 VSS VSS <Variant Name> 1
5,9 M_ARAS# 118 /RAS VSS 150 5,9 M_BRAS# 118 /RAS VSS 150
5,9 M_ACAS# 120 /CAS VSS 159 5,9 M_BCAS# 120 /CAS VSS 159
119 161 119 161
5,9 M_AWE# /WE VSS
VSS 162
5,9 M_BWE# /WE VSS
VSS 162 62.10017.391 Wistron Corporation
VREF_DDR_MEM 1 173 VREF_DDR_MEM 1 173 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VREF VSS VREF VSS Taipei Hsien 221, Taiwan, R.O.C.
2 VREF VSS 174 2 VREF VSS 174 ME : 62.10017.391
Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185 Layout trace 20 mil 3D3V_S0 197 VDDSPD VSS 185
1
199 186 199 186 Title

C458 C456 VDDID VSS C497 C498 VDDID VSS
SCD1U SCD1U 201 202 ME : 62.10017.201 SCD1U SCD1U 201 202
DDR SO-DIMM SKT
2
TP62 GND GND TP63 GND GND Size Document Number Rev
TPAD30 2nd :62.10017.701 TPAD30 A3 -1
Bolsena
SKT-SODIMM2006U1 Date: Thursday, March 31, 2005 Sheet 8 of 58
A B C D E
A B C D E
SERIES DAMPING PARALLEL TERMINATION

PLACE RNs CLOSE TO FIRST DIMM, < 0.75" PULL HIGH STUBS < 0.8", PLACE RPs CLOSE TO SECOND DM ( DM2 )
STRICT EQUAL LENGTH LIMITATION WITH DQS, NO EQUAL LENGTH LIMITATION
CB PINS RN52 SRN10-1 1D25V_S3 1D25V_S3
SRN10J-3 M_DATA37 SRN68J-1
4 5 M_DATA_R_37
M_DATA4 8 9 M_DATA_R_4 M_DATA36 3 6 M_DATA_R_36 M_ADM_R1 8 9 4 5 M_DATA_R_32
SRN47J M_ADM_R[7..0] 8
M_DATA5 7 10 M_DATA_R_5 M_ADM4 2 7 M_ADM_R4 M_DATA_R_13 7 10 3 6 M_DATA_R_33
M_ADM0 6 11 M_ADM_R0 M_DATA39 1 8 M_DATA_R_39 M_DATA_R_12 6 11 2 7 M_DQS_R4 M_CKE#0 1 4 M_ADM[7..0] 5
M_DATA6 5 12 M_DATA_R_6 M_DATA_R_7 5 12 1 8 M_DATA_R_35 M_AA12 2 3
M_DATA7 4 13 M_DATA_R_7 M_DATA_R_6 4 13
RN66 SRN68-1 RN57 M_DATA[63..0] 5
M_DATA13 3 14 M_DATA_R_13 M_DATA32 4 5 M_DATA_R_32 M_ADM_R0 3 14
M_DATA12 M_DATA_R_12 M_DATA33 M_DATA_R_33 M_DATA_R_5 SRN47J
4 2 15 3 6 2 15 M_DATA_R_[63..0] 8 4
M_ADM1 1 16 M_ADM_R1 M_DQS4 2 7 M_DQS_R4 M_DATA_R_4 1 16 4 5 M_DATA_R_36 M_BA12 1 4
M_DATA34 1 8 M_DATA_R_34 3 6 M_DATA_R_37 M_BA5 2 3
RN49 RN113 M_DQS[7..0] 5
2 7 M_ADM_R4
RN41 SRN10-1 M_DATA_R_38 RN63
1 8 M_DQS_R[7..0] 8
SRN10J-3 SRN10J-3
M_DATA1 M_DATA_R_1 M_DATA35 M_DATA_R_35 RN110SRN68-1 SRN47J-1-U
8 9 8 9 M_AA[13..0] 5,8
M_DATA0 7 10 M_DATA_R_0 M_DATA41 7 10 M_DATA_R_41 M_AA11 8 9
M_DQS0 6 11 M_DQS_R0 M_DATA40 6 11 M_DATA_R_40 M_AA9 7 10 M_ABS#[1..0] 5,8
M_DATA2 5 12 M_DATA_R_2 M_DQS5 5 12 M_DQS_R5 M_AA7 6 11
M_DATA3 4 13 M_DATA_R_3 M_DATA42 4 13 M_DATA_R_42 M_AA5 5 12 M_BA[13..0] 5,8
M_DATA8 3 14 M_DATA_R_8 M_DATA43 3 14 M_DATA_R_43 M_AA4 4 13
M_DATA9 2 15 M_DATA_R_9 M_DATA49 2 15 M_DATA_R_49 M_AA8 3 14 M_BBS#[1..0] 5,8
M_DQS1 M_DQS_R1 M_DATA48 M_DATA_R_48 SRN68J-1 SRN68J-1 M_AA6
1 16 1 16 2 15
M_DATA_R_1 8 9 8 9 M_DATA_R_48 M_AA3 1 16
RN38 RN42 M_DATA_R_0 M_DATA_R_49
7 10 7 10 M_AWE# 5,8
M_DQS_R0 M_DATA_R_43 RN64SRN47-1
6 11 6 11 M_ACAS# 5,8
SRN10J-3 SRN10J-3 M_DATA_R_2 M_DATA_R_42 M_CS#3
5 12 5 12 4 5 M_ARAS# 5,8
M_DATA14 8 9 M_DATA_R_14 M_DATA38 8 9 M_DATA_R_38 M_DATA_R_3 4 13 4 13 M_DQS_R5 M_BCAS# 3 6
M_DATA15 7 10 M_DATA_R_15 M_DATA45 7 10 M_DATA_R_45 M_DATA_R_8 3 14 3 14 M_DATA_R_41 M_BRAS# 2 7 M_BWE# 5,8
M_DATA21 6 11 M_DATA_R_21 M_DATA44 6 11 M_DATA_R_44 M_DATA_R_9 2 15 2 15 M_DATA_R_40 M_BBS#1 1 8 M_BCAS# 5,8
M_DATA20 5 12 M_DATA_R_20 M_ADM5 5 12 M_ADM_R5 M_DQS_R1 1 16 1 16 M_DATA_R_34 M_BRAS# 5,8
M_ADM2 M_ADM_R2 M_DATA47 M_DATA_R_47 RN109
4 13 4 13
M_DATA23 M_DATA_R_23 M_DATA46 M_DATA_R_46 RN59 RN68
3 14 3 14
M_DATA22 M_DATA_R_22 M_DATA53 M_DATA_R_53 SRN68J-1 SRN68J-1
2 15 2 15 M_CS#0 5,8
M_DATA28 1 16 M_DATA_R_28 M_DATA52 1 16 M_DATA_R_52 M_DATA_R_28 8 9 8 9 M_DATA_R_39 RN67 SRN47J M_CS#1 5,8
M_DATA_R_23 7 10 7 10 M_DATA_R_44 M_AWE# 1 4 M_CS#2 5,8
RN50 RN53 M_DATA_R_22 M_DATA_R_45 M_ABS#0
6 11 6 11 2 3 M_CS#3 5,8
M_ADM_R2 5 12 5 12 M_ADM_R5
3 SRN10J-3 SRN10J-3 M_DATA_R_21 M_DATA_R_46 RN70 3
4 13 4 13
M_DATA11 8 9 M_DATA_R_11 M_DQS6 8 9 M_DQS_R6 M_DATA_R_20 3 14 3 14 M_DATA_R_47 SRN47J
M_DATA10 7 10 M_DATA_R_10 M_DATA50 7 10 M_DATA_R_50 M_DATA_R_15 2 15 2 15 M_DATA_R_52 M_BA3 1 4 5,8 M_CKE#0 M_CKE#0
M_DATA17 6 11 M_DATA_R_17 M_DATA51 6 11 M_DATA_R_51 M_DATA_R_14 1 16 1 16 M_DATA_R_53 M_BA7 2 3
M_DATA16 M_DATA_R_16 M_DATA56 M_DATA_R_56 SRN47J-1-U M_CKE#1
5 12 5 12 5,8 M_CKE#1
M_DQS2 M_DQS_R2 M_DATA57 M_DATA_R_57 RN114 RN111 M_AA1
4 13 4 13 8 9
M_DATA19 M_DATA_R_19 M_DQS7 M_DQS_R7 SRN68J-1 SRN68J-1 M_AA10
3 14 3 14 7 10
M_DATA18 2 15 M_DATA_R_18 M_DATA58 2 15 M_DATA_R_58 M_DATA_R_11 8 9 8 9 M_DATA_R_59 M_AA2 6 11
M_DATA25 1 16 M_DATA_R_25 M_DATA59 1 16 M_DATA_R_59 M_DATA_R_10 7 10 7 10 M_DATA_R_58 M_AA0 5 12
M_DATA_R_16 6 11 6 11 M_DQS_R7 M_ABS#1 4 13
RN39 RN43 M_DATA_R_17 M_DATA_R_57 M_ARAS#
5 12 5 12 3 14
M_DQS_R2 4 13 4 13 M_DATA_R_56 M_CS#2 2 15
RN51 SRN10-1 SRN10J-3 M_DATA_R_19 M_DATA_R_51 M_BA13
3 14 3 14 1 16
M_DATA29 4 5 M_DATA_R_29 M_ADM6 8 9 M_ADM_R6 M_DATA_R_18 2 15 2 15 M_DATA_R_50
M_ADM3 RN65
3 6 M_ADM_R3 M_DATA54 7 10 M_DATA_R_54 M_DATA_R_24 1 16 1 16 M_DQS_R6
M_DATA31 SRN47J-1-U
2 7 M_DATA_R_31 M_DATA55 6 11 M_DATA_R_55
M_DATA30 RN60 RN69
1 8 M_DATA_R_30 M_DATA61 5 12 M_DATA_R_61 M_BA9 8 9
M_DATA60 M_DATA_R_60 RN61 SRN68-1 SRN68J-1 M_BA6
4 13 7 10
M_DATA24 4 5 M_DATA_R_24 M_ADM7 3 14 M_ADM_R7 M_DATA_R_27 1 8 8 9 M_ADM_R6 M_BA10 6 11
M_DQS3 3 6 M_DQS_R3 M_DATA62 2 15 M_DATA_R_62 M_DATA_R_26 2 7 7 10 M_DATA_R_54 M_BA1 5 12
M_DATA26 2 7 M_DATA_R_26 M_DATA63 1 16 M_DATA_R_63 M_DQS_R3 3 6 6 11 M_DATA_R_55 M_BA2 4 13
M_DATA27 1 8 M_DATA_R_27 M_DATA_R_25 4 5 5 12 M_DATA_R_60 M_BA0 3 14
RN54 M_DATA_R_61 M_BBS#0
4 13 2 15
RN40 SRN10-1 3 14 M_ADM_R7 M_BWE# 1 16
M_DATA_R_31 4 5 2 15 M_DATA_R_62
M_DATA_R_30 M_DATA_R_63 RN71
3 6 1 16
M_ADM_R3 SRN47-1
2 7
M_DATA_R_29 RN112 M_BA4
1 8 4 5
M_BA8 3 6
2 RN115SRN68-1 M_BA11 2
2 7
M_CKE#1 1 8
RN108
SRN47-1
M_AA13 4 5
M_CS#0 3 6
M_CS#1 2 7
M_ACAS# 1 8
RN58
1 <Variant Name> 1
Wistron Corporation
Title
05/10
Remove the damping resistor for AMD suggest.
DDR DAMPING & TERMINATION
A3 -1
Bolsena
A B C D E
A B C D E
4 4
LAYOUT:Place altemating caps to GND and 2D5_S3
2D5V_S3
1D25V_S3
1
1
C873 C875 C877 C867 C869 C871 C363 C364 C388 C407 C406 C438 C338 C454 C387 C310 C455
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2
2
DY DY DY DY DY DY
1
1
2
2
DY DY DY DY DY DY
3 3
2D5V_S3
1D25V_S3
1D25V_S3
1
1
1
2
2
C460 C459 C462 C463 C457 C502 C465
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2
DY DY DY DY DY DY
DY DY DY DY DY DY DY
1
1
2
2
DY DY DY DY DY DY
2 2
LAYOUT:Place close to Power Pin of DDR socket.
LAYOUT:Place at end of the DIMMs 2D5V_S3 2D5V_S3
1D25V_S3
1 2 C445 1 2 C464
SCD22U16V3ZY SCD22U16V3ZY
1
1 2 C443 1 2 C501
TC17 TC26 C892 C865 C891 C866 SCD22U16V3ZY SCD22U16V3ZY
ST100U4VBM-U SE100U10VM SC10U10V5ZY SC10U10V5ZY SC10U10V5ZY SC10U10V5ZY DY
2
1 2 C446 DY 1 2 C500
79.10711.4C1
DY DY DY
1 2 C444 1 2 C461
1 2 C442 1 2 C499
SB SCD22U16V3ZY SCD22U16V3ZY
0.22u x 10
1 <Variant Name> 1
Wistron Corporation
Title
DDR DECOUPLING
A3 -1
Bolsena
A B C D E
A B C D E
4 4
CLAW HAMMER TO NB NB TO CLAW HAMMER

4 CPUCADOUT[15..0] U80A
4 CPUCADOUTJ[15..0]
NB0CADOUT[15..0] 4
CPUCADOUT15 T26 R24 NB0CADOUT15 NB0CADOUTJ[15..0] 4
CPUCADOUTJ15 HT_RXCAD15P HT_TXCAD15P NB0CADOUTJ15
CPUCADOUT14
R26 HT_RXCAD15N PART 1OF6 HT_TXCAD15N R25
NB0CADOUT14
U25 HT_RXCAD14P HT_TXCAD14P N26
CPUCADOUTJ14 U24 P26 NB0CADOUTJ14
CPUCADOUT13 HT_RXCAD14N HT_TXCAD14N NB0CADOUT13
V26 HT_RXCAD13P HT_TXCAD13P N24
CPUCADOUTJ13 U26 N25 NB0CADOUTJ13
W25 HT_RXCAD12P HT_TXCAD12P L26
CPUCADOUTJ12 W24 M26 NB0CADOUTJ12
AA25 HT_RXCAD11P HT_TXCAD11P J26
CPUCADOUTJ11 AA24 K26 NB0CADOUTJ11
AB26 HT_RXCAD10P HT_TXCAD10P J24
CPUCADOUTJ10 AA26 J25 NB0CADOUTJ10
3 CPUCADOUT9 HT_RXCAD10N HT_TXCAD10N NB0CADOUT9 3
AC25 HT_RXCAD9P HT_TXCAD9P G26
CPUCADOUTJ9 AC24 H26 NB0CADOUTJ9
AD26 HT_RXCAD8P HT_TXCAD8P G24
CPUCADOUTJ8 AC26 G25 NB0CADOUTJ8
HT_RXCAD8N HT_TXCAD8N
CPUCADOUT7 R29 L30 NB0CADOUT7
R28 HT_RXCAD7N HT_TXCAD7N M30
CPUCADOUT6 T30 L28 NB0CADOUT6
R30 HT_RXCAD6N HT_TXCAD6N L29
CPUCADOUT5 T28 J29 NB0CADOUT5
HT_RXCAD5P HT_TXCAD5P
HYPER TRANSPORT CPU I/F

CPUCADOUTJ5 T29 K29 NB0CADOUTJ5
V29 HT_RXCAD4P HT_TXCAD4P H30
CPUCADOUTJ4 U29 H29 NB0CADOUTJ4
Y30 HT_RXCAD3P HT_TXCAD3P E29
CPUCADOUTJ3 W30 E28 NB0CADOUTJ3
1D2V_S0 CPUCADOUT2 HT_RXCAD3N HT_TXCAD3N NB0CADOUT2
Y28 HT_RXCAD2P HT_TXCAD2P D30
CPUCADOUTJ2 Y29 E30 NB0CADOUTJ2
AB29 HT_RXCAD1P HT_TXCAD1P D28
CPUCADOUTJ1 AA29 D29 NB0CADOUTJ1
AC29 HT_RXCAD0P HT_TXCAD0P B29
1
CPUCADOUTJ0 AC28 C29 NB0CADOUTJ0

C221 C222 HT_RXCAD0N HT_TXCAD0N
SCD1U16V SCD1U16V CPUHTTCLKOUT1 Y26 L24 NB0HTTCLKOUT1 NB0HTTCLKOUT1 4
2
4 CPUHTTCLKOUT1 CPUHTTCLKOUTJ1 HT_RXCLK1P HT_TXCLK1P NB0HTTCLKOUTJ1

4 CPUHTTCLKOUTJ1 W26 HT_RXCLK1N HT_TXCLK1N L25 NB0HTTCLKOUTJ1 4
CPUHTTCLKOUT0 W29 F29 NB0HTTCLKOUT0 NB0HTTCLKOUT0 4
4 CPUHTTCLKOUT0 CPUHTTCLKOUTJ0 HT_RXCLK0P HT_TXCLK0P NB0HTTCLKOUTJ0
4 CPUHTTCLKOUTJ0 W28 HT_RXCLK0N HT_TXCLK0N G29 NB0HTTCLKOUTJ0 4
DY CPUHTTCTLOUT0 P29 M29 NB0HTTCTLOUT NB0HTTCTLOUT 4
2 4 CPUHTTCTLOUT0 CPUHTTCTLOUTJ0 HT_RXCTLP HT_TXCTLP NB0HTTCTLOUTJ 2
4 CPUHTTCTLOUTJ0 N29 HT_RXCTLN HT_TXCTLN M28 NB0HTTCTLOUTJ 4
AROUND NB 1D2V_S0 1 R162 2 49D9R2F HT_RXCALN D27 HT_RXCALN HT_TXCALP B28 HT_TXCALP 1 R583 2
100R2F
1 R161 2 49D9R2F HT_RXCALP E27 HT_RXCALP HT_TXCALN A28 HT_TXCALN
CHANGE TO 71.RS48M.B0U (VER A22)
1 <Variant Name> 1
Wistron Corporation
Title
ATI-RS480M (1 of 4) HT
A3 -1
Bolsena
A B C D E
A B C D E
49 PEG_TXP[15..0]
49 PEG_TXN[15..0]
49 PEG_RXP[15..0]
49 PEG_RXN[15..0]
4 U80B 4
U80C
AF17 AF28
PART 2 OF 6
MEM_A0 MEM_DQ0 PEG_TXP15 PEG_RXP15_NB C742 PEG_RXP15
AK17 MEM_A1 PART 3 OF 6 MEM_DQ1 AF27
PEG_TXN15
D8 GFX_RX0P GFX_TX0P A7
PEG_RXN15_NB C743
1 2
SCD1U16V PEG_RXN15
AH16 MEM_A2 MEM_DQ2 AG28 D7 GFX_RX0N GFX_TX0N B7 1 2
AF16 AF26 PEG_TXP14 D5 B6 PEG_RXP14_NB C744 1 2 SCD1U16V PEG_RXP14
MEM_A3 MEM_DQ3 PEG_TXN14 GFX_RX1P GFX_TX1P PEG_RXN14_NB C745 SCD1U16V PEG_RXN14
AJ22 MEM_A4 MEM_DQ4 AE25 D4 GFX_RX1N GFX_TX1N B5 1 2
AJ21 AE24 PEG_TXP13 E4 A5 PEG_RXP13_NB C746 1 2 SCD1U16V PEG_RXP13
AH20 MEM_A6 MEM_DQ6 AF24 F4 GFX_RX2N GFX_TX2N A4 1 2
AH21 AG23 PEG_TXP12 G5 B3 PEG_RXP12_NB C748 1 2 SCD1U16V PEG_RXP12
AK19 MEM_A8 MEM_DQ8 AE29 G4 GFX_RX3N GFX_TX3N B2 1 2
AH19 AF29 PEG_TXP11 H4 C1 PEG_RXP11_NB C751 1 2 SCD1U16V PEG_RXP11
MEM_A9 MEM_DQ9 GFX_RX4P GFX_TX4P
LANE REVERSE
AJ17 AG30 PEG_TXN11 J4 D1 PEG_RXN11_NB C750 1 2 SCD1U16V PEG_RXN11
MEM_A10 MEM_DQ10 PEG_TXP10 GFX_RX4N GFX_TX4N PEG_RXP10_NB C774 SCD1U16V PEG_RXP10
AG16 MEM_A11 MEM_DQ11 AG29 H5 GFX_RX5P GFX_TX5P D2 1 2
SCD1U16V
LANE REVERSE
AG17 AH28 PEG_TXN10 H6 E2 PEG_RXN10_NB C772 1 2 PEG_RXN10
AH17 MEM_A13 MEM_DQ13 AJ28 G1 GFX_RX6P GFX_TX6P F2 1 2
AJ18 AH27 PEG_TXN9 G2 F1 PEG_RXN9_NB C776 1 2 SCD1U16V PEG_RXN9
MEM_DQ15 AJ27 K5 GFX_RX7P GFX_TX7P H2 1 2
AG26 AE23 PEG_TXN8 K4 J2 PEG_RXN8_NB C773 1 2 SCD1U16V PEG_RXN8
MEM_DM0 MEM_DQ16 PEG_TXP7 GFX_RX7N GFX_TX7N PEG_RXP7_NB C781 SCD1U16V PEG_RXP7
AJ29 MEM_DM1 MEM_DQ17 AG22 L4 GFX_RX8P GFX_TX8P J1 1 2
AE21 AF23 PEG_TXN7 M4 K1 PEG_RXN7_NB C780 1 2 SCD1U16V PEG_RXN7
AH24 MEM_DM3 MEM_DQ19 AF22 N5 GFX_RX9P GFX_TX9P K2 1 2
AH12 AE20 PEG_TXN6 N4 L2 PEG_RXN6_NB C771 1 2 SCD1U16V PEG_RXN6
AG13 MEM_DM5 MEM_DQ21 AG19 P4 GFX_RX10P GFX_TX10P M2 1 2
AH8 AF20 PEG_TXN5 R4 M1 PEG_RXN5_NB C778 1 2 SCD1U16V PEG_RXN5
PCIE I/F TO VIDEO

AE8 MEM_DM7 MEM_DQ23 AF19 P5 GFX_RX11P GFX_TX11P N1 1 2
AH26 PEG_TXN4 P6 N2 PEG_RXN4_NB C801 1 2 SCD1U16V PEG_RXN4
MEM_DQ24 PEG_TXP3 GFX_RX11N GFX_TX11N PEG_RXP3_NB C807 SCD1U16V PEG_RXP3
AF25 MEM_DQS0P MEM_DQ25 AJ26 P2 GFX_RX12P GFX_TX12P R1 1 2
AH30 AK26 PEG_TXN3 R2 T1 PEG_RXN3_NB C803 1 2 SCD1U16V PEG_RXN3
3 MEM_DQS1P MEM_DQ26 PEG_TXP2 GFX_RX12N GFX_TX12N PEG_RXP2_NB C797 SCD1U16V PEG_RXP2 3
AG20 MEM_DQS2P MEM_DQ27 AH25 T5 GFX_RX13P GFX_TX13P T2 1 2
AJ25 AJ24 PEG_TXN2 T4 U2 PEG_RXN2_NB C800 1 2 SCD1U16V PEG_RXN2
R634 2 IDCKP_1 MEM_DQS3P MEM_DQ28 PEG_TXP1 GFX_RX13N GFX_TX13N PEG_RXP1_NB C805 SCD1U16V PEG_RXP1
15 IDCKP 1 AH13 MEM_DQS4P MEM_DQ29 AH23 U4 GFX_RX14P GFX_TX14P V2 1 2
33R2 AF14 AJ23 PEG_TXN1 V4 V1 PEG_RXN1_NB C806 1 2 SCD1U16V PEG_RXN1
MEM_DQS5P MEM_DQ30 PEG_TXP0 GFX_RX14N GFX_TX14N PEG_RXP0_NB C802 SCD1U16V PEG_RXP0
AJ7 MEM_DQS6P MEM_DQ31 AH22 W1 GFX_RX15P GFX_TX15P Y2 1 2
AG8 AK14 PEG_TXN0 W2 AA2 PEG_RXN0_NB C798 1 2 SCD1U16V PEG_RXN0
MEM_DQS7P MEM_DQ32 GFX_RX15N GFX_TX15N
AH14 DVO_MDA33 SCD1U16V
Dummy when use UMA
MEM_A I/F
MEM_DQ33 DVO_MDA34
AG25 MEM_DQS0N MEM_DQ34 AK13
AH29 AJ13 DVO_MDA35 AE1 AD2
MEM_DQS1N MEM_DQ35 DVO_MDA36 GPP_RX0P/SB_RX2P GPP_TX0P/SB_TX2P
AF21 MEM_DQS2N MEM_DQ36 AJ11 AE2 GPP_RX0N/SB_RX2N GPP_TX0N/SB_TX2N AD1
AK25 AH11 DVO_MDA37
R636 2 IDCKN_1 MEM_DQS3N MEM_DQ37 DVO_MDA38
15 IDCKN 1 AJ12 MEM_DQS4N MEM_DQ38 AJ10 AB2 GPP_RX1P/SB_RX3P GPP_TX1P/SB_TX3P AA1
33R2 AF13 AH10 DVO_MDA39 AC2 AB1
MEM_DQS5N MEM_DQ39 GPP_RX1N/SB_RX3N GPP_TX1N/SB_TX3N
AK7 MEM_DQS6N MEM_DQ40 AE15
AF9 AF15 57 PCIE_RXP0 AB5 PCIE I/F TO SLOT Y5 PCIE_TXP0_NB C826 1 2 PCIE_TXP0 57
MEM_DQS7N MEM_DQ41 GPP_RX2P GPP_TX2P
MEM_DQ42 AG14 57 PCIE_RXN0 AB4 GPP_RX2N GPP_TX2N Y6 PCIE_TXN0_NB C827 1 2 SCD1U16V PCIE_TXN0 57
AE17 AE14 SCD1U16V
MEM_RAS# MEM_DQ43 PCIE_TXP1_NB C804 1
AH18 MEM_CAS# MEM_DQ44 AE12 57 PCIE_RXP1 Y4 GPP_RX3P GPP_TX3P W5 2 PCIE_TXP1 57
AE18 MEM_WE# MEM_DQ45 AF12 57 PCIE_RXN1 AA4 GPP_RX3N GPP_TX3N W4 PCIE_TXN1_NB C808 1 2 SCD1U16V PCIE_TXN1 57
AJ19 AG11 SCD1U16V
MEM_CS# MEM_DQ46
AF18 MEM_CKE MEM_DQ47 AE11
DVO_MDA48 SB_TX0P C829 1
Dummy when no EZ4
MEM_DQ48 AJ9 18 PCIE_RX0P_SB AG1 SB_RX0P SB_TX0P AF2 2 PCIE_TX0P_SB 18
Dummy when 'USE DVO' AK16 MEM_CKP MEM_DQ49 AH9 DVO_MDA49
DVO_MDA50 18 PCIE_RX0N_SB AH1 SB_RX0N SB_TX0N AG2 SB_TX0N C828 1 2 SCD1U16V
SCD1U16V
PCIE_TX0N_SB 18
AJ16 MEM_CKN MEM_DQ50 AJ8
DVO_MDA51
PCIE I/F TO SB SB_TX1P C830 1
MEM_DQ51 AK8 18 PCIE_RX1P_SB AC5 SB_RX1P SB_TX1P AC4 2 PCIE_TX1P_SB 18
MEM_DQ52 AH7 DVO_MDA52
18 PCIE_RX1N_SB AC6 SB_RX1N SB_TX1N AD4 SB_TX1N C831 1 2 SCD1U16V PCIE_TX1N_SB 18
AJ6 DVO_MDA53 SCD1U16V
SC 0308 C823 SCD47U16V3ZY MEM_DQ53 DVO_MDA54
MEM_DQ54 AH6 1 R620 2 10KR2 PCE_ISET AH3 PCE_ISET PCE_PCAL AH2 PCE_PCAL 1 R632 2 150R2F
1 2MEM_CAP1 AE28 MEM_CAP1 MEM_DQ55 AJ5 DVO_MDA55 1 2 PCE_TXISET AJ3
PCE_TXISET PCE_NCAL AJ2 PCE_NCAL 1 R631 2 100R2F
1D2V_S0
2 R633 8K25R3F 2
1 2MEM_CAP2 AJ4 MEM_CAP2 MEM_DQ56 AG10
MEM_DQ57 AF11
C832 SCD47U16V3ZY AF10
MEM_DQ58
MEM_DQ59 AE9
RS480_MEM_VMODE AJ20 AG7 CHANGE TO 71.RS48M.B0U (VER A22)
MEM_VMODE MEM_DQ60
MEM_DQ61 AF8
AF7 1D8V_S0 DVO_MDA33
MEM_DQ62 DVO_MDA33 15
MEM_VREF AK20 AE7 DVO_MDA34 DVO_MDA34 15
MEM_VREF MEM_DQ63 1D8V_S0 DVO_MDA35 DVO_MDA35 15
1D8V_S0 1 R217 2 MPVDD_PLL AJ15 MPVDD MEM_COMPP AH5 MEM_COMPP 1 R211 2 61D9R2F DVO_MDA36 DVO_MDA36 15
0R0603-PAD AJ14 AD30 MEM_COMPN 1 R630 2 61D9R2F DVO_MDA37 DVO_MDA37 15
MPVSS MEM_COMPN
1
DVO_MDA38 DVO_MDA38 15
1
SC 0308
C324
SC1U10V3KX Dummy when 'NO DVO' R209
2
1D8V_S0 CHANGE TO 71.RS48M.B0U (VER A22) 1KR2

SC 0308
2
Dummy when 'NO DVO'
1
RS480_MEM_VMODE
R208
1KR2F DVO_MDA48 DVO_MDA48 15
2
2
MEM_VREF R210 DVO_MDA51 DVO_MDA51 15

1KR2 DVO_MDA52 DVO_MDA52 15
1
1
1 <Variant Name> 1
R214
1KR2F Dummy when 'USE DVO'
NO DVO: WITH DVO:
MEM_COMPP = NC MEM_COMPP = 61.9 OHM TO GND
Wistron Corporation
2

MEM_COMPN = NC MEM_COMPN = 61.9 OHM TO VDD_MEM Taipei Hsien 221, Taiwan, R.O.C.
SC 0308
MEM_CAP1 = 470nF MEM_CAP1 = NC Title
MEM_CAP2 = 470nF MEM_CAP2 = NC
MEM_VMODE = GND (IF VDD_MEM = 2.5V) MEM_VMODE = 1.8V(IF VDD_MEM = 1.8V) ATI-RS480M (2 of 4) PCIE
MEM_VREF = VDD_MEM / 2 MEM_VREF = VDD_MEM / 2 A3 -1
Bolsena
A B C D E
A B C D E
3D3V_S0 AVDD TXACLK+ 5 4

1D8V_S0 AVDDQ TXACLK- LCD_TXACLK+ 17,54
6 3 LCD_TXACLK- 17,54
TXAOUT2+ 7 2 LCD_TXAOUT2+ 17,54
1 R584 2 TXAOUT2- 8 1 LCD_TXAOUT2- 17,54
1 R610 2 0R0603-PAD
0R0603-PAD RN90 SRN0-1-U
1
1
C769 C766 TXAOUT1+ 5 4
SC 0308 SC 0308 C735 TXAOUT1- LCD_TXAOUT1+ 17,54
6 3 LCD_TXAOUT1- 17,54
SC2D2U16V5ZY
SCD1U16V
1D8V_S0 TXAOUT0+
SC10U10V5ZY
7 2
2
2
TXAOUT0- LCD_TXAOUT0+ 17,54
8 1 LCD_TXAOUT0- 17,54
SC 0308
RN89 SRN0-1-U
4 1 R164 2 1D8VAVDDD1_S0 TXBOUT1+ 5 4 LCD_TXBOUT1+ 17,54 4
0R0603-PAD TXBOUT1- 6 3
TXBOUT0+ LCD_TXBOUT1- 17,54
DY 7 2 LCD_TXBOUT0+ 17,54
1
TXBOUT0- 8 1
C220 LCD_TXBOUT0- 17,54
SC2D2U16V5ZY RN95 SRN0-1-U
2
U80D TXBCLK+ 5 4 LCD_TXBCLK+ 17,54
150R2F R588
150R2F R587
150R2F R589
B27 PART 4 OF 6 TXBCLK- 6 3
AVDD1 LCD_TXBCLK- 17,54
R585 1 102R2F 2
R586 1 102R2F 2
R165 1 102R2F 2
2
2
2
C27 D18 TXBOUT0+ TXBOUT2+ 7 2
AVDDQ AVDD2 TXOUT_U0P TXBOUT0- TXBOUT2- LCD_TXBOUT2+ 17,54
D26 AVSSN1 TXOUT_U0N C18 8 1 LCD_TXBOUT2- 17,54
D25 B19 TXBOUT1+
AVSSN2 TXOUT_U1P TXBOUT1- RN94 SRN0-1-U
C24 AVDDDI TXOUT_U1N A19
1
B24 D19 TXBOUT2+
1
1
1
SC 0301 C254 AVSSDI TXOUT_U2P TXBOUT2- LCDVDD_ON
TXOUT_U2N C19 2 R184 1 LCD_VDD_ON 17,54
SC1U10V3ZY E24 D20 TXBOUT3+ 0R2-0
2
AVDDQ TXOUT_U3P
D24 AVSSQ TXOUT_U3N C20 TXBOUT3-
Dummy when use Discrete
Dummy when use Discrete TXAOUT0+ TP28
57 UMA_CRMA B25 C TXOUT_L0P B16
A25 A16 TXAOUT0- TP22
57 UMA_LUMA Y TXOUT_L0N
CRT/TVOUT
57 UMA_COMP A24 D16 TXAOUT1+
COMP TXOUT_L1P TXAOUT1-
TXOUT_L1N C16
57 UMA_R C25 B17 TXAOUT2+ 1D8V_S0
RED TXOUT_L2P TXAOUT2-
57 UMA_G A26 GREEN TXOUT_L2N A17
57 UMA_B B26 E17 TXAOUT3+
1D8V_S0 BLUE TXOUT_L3P
D17 TXAOUT3-
LVDS
PLVDD 16 UMA_VS TXOUT_L3N
16 UMA_HS A11 R592
DAC_VSYNC TP30
1 R163 2 B11 DAC_HSYNC TXCLK_UP B20 TXBCLK+ 1 2
R593 634R3F SC 0228 IRSET_NB C26 A20 TXBCLK- TP29 BLM11A121S
RSET TXCLK_UN
1
1 2 E11 B18 TXACLK+
16 UMA_CRT_DDC_C DAC_SCL TXCLK_LP
3 BLM11A121S F11 C17 TXACLK- C739 C227 3
16 UMA_CRT_DDC_D DAC_SDA TXCLK_LN
1
C740 C741 C717
SC1U10V3ZY
SC2D2U16V5ZY
2
2
E18 1D8VLPVDD_S0
LPVDD
SCD1U16V
SC10U10V5ZY
SC2D2U16V5ZY
F17
2
LPVSS R591
A14 PLLVDD LVDDR18D E19
1D8V_S0 B14 G20 LVDDR18D_S0 1 2
HTPVDD PLLVSS LVDDR18A_1 BLM11A121S
PLL PWR
LVDDR18A_2 H20
1
M23 HTPVDD
L23 G19 LVDDR18A_S0 C738 C225
HTPVSS LVSSR1
SCD1U16V
SC1U10V3ZY
1 2 E20
2
R609 LVSSR2
LVSSR3 F20
1
150R5F C768 C767 C765 H18 R590

RS480_RST# LVSSR4
D14 SYSRESET# LVSSR5 G18 1 2
BLM11A121S
SCD1U16V
SCD1U16V
SC 0308
SC10U10V5ZY
39 NB_PWRGD B15 F19

2
POWERGOOD LVSSR6
1
PM
6,18 LDT_STP# B12 LDTSTOP# LVSSR7 H19
C12 F18 C737 C226
18 ALLOW_LDTSTOP ALLOW_LDTSTOP LVSSR8
SCD1U16V
NB_SUS_STAT#
SC1U10V3ZY
AH4
2
SUS_STAT# LVDS_DIGON
LVDS_DIGON E14
1D8V_S0 3D3V_S0 F14 LVDS_BLON
LVDS_BLON LVDS_BLEN_NB TP31 TPAD30
H13 VDDR3_1 LVDS_BLEN F13
1 R188 2 3D3VDDR_S0 H12 VDDR3_2
0R0603-PAD B8 NBSRC_CLK 3
GFX_CLKP
1
3 CLK14_NB A13 OSCIN GFX_CLKN A8 NBSRC_CLK# 3

1
SC 0308 C259 1 R594 2 NB_OSC_OUT B13

R635 SC1U10V3ZY 21 SB_OSC_INT 22R2 OSCOUT
P23 HTTST_CLK 1 R196 2
CLOCKs
2
4K7R2 HTTSTCLK 10KR2

N23 HTREF_CLK 3
DY HTREFCLK
E8 SBLINK_CLK 3
2
NB_SUS_STAT# R595 2 10KR2 SB_CLKP

1 B9 TVCLKIN SB_CLKN E7 SBLINK_CLK# 3
2 2
DO NOT SUPPORT SIDEPORT MEMORY
DO NOT SUPPORT SERIAL STRAP ROM TPAD30 TP32 DFT_GPIO0 F12 C13 DFT_GPIO3 TP81 TPAD30
DUMMY IT TPAD30 TP24 DFT_GPIO1 DFT_GPIO0/RSV DFT_GPIO3/RSV DFT_GPIO4 TP80 TPAD30
E13 DFT_GPIO1/RSV DFT_GPIO4/RSV C14
TPAD30 TP23 DFT_GPIO2 D13 C15 DFT_GPIO5 TP79 TPAD30
DFT_GPIO2/RSV DFT_GPIO5/RSV
15 RS480_CLK
3D3V_S0 A10 TMDS_UMA_HPD 15
TMDS_HPD
RN106 18 BMREQ# F10
RS480_CLK BMREQb
4 1 C10 I2C_CLK STRP_DATA E10
3 2 RS480_DAT C11 TP33 TPAD28
RN107
3 SRN0-2-U 2
SRN10KJ AF4
AE4
I2C_DATA
THERMALDIODE_P MIS. DDC_DATA B10 DDC_DATA DDC_DATA 15
17,49 EDID_CLK THERMALDIODE_N
17,49 EDID_DAT 4 1 TESTMODE E12 TESTMODE_NB
CHANGE TO 71.RS48M.B0U (VER A22)
VCC_CORE_S0
R183 2
DY
1 GMODULE_RST# 34
2
1
0R2-0
3D3V_S5 R759 R186
0R2-0 R185 DUMMY-R2
2 1 C968
SCD1U16V U22A
DY Place close the two resistor LVDS_DIGON
3D3V_S5
1 2
0R2-0
14
SC 0310
U22BDY
1 2
14
6,18 LDT_RST# 1
3 1 R760 2 AG_RST# 49
39 ALL_PWROK 2 33R2 4 TSLCX08MTC-U R187
6 LCDVDD_ON 4K7R2
<Variant Name>
1
NB_PWRGD 5 1
7
TSLCX08MTC-U 3D3V_S5
2
SC 0307 U22D
14
Wistron Corporation
7
18,34,37 LPC_RST# 1 R159 2 RS480_RST# 12 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
33R2 11 1 R607 2 Taipei Hsien 221, Taiwan, R.O.C.
BL_ON 34,49
1
LVDS_BLON 13 0R2-0
1
2
C251 Title
DUMMY-C3 R608 TSLCX08MTC-U R739
ATI-RS480M (3 of 4) LVDS CRT
7
1KR2
Dummy when use Discrete 10KR2
A3 -1
Bolsena
2
1
SB 0201
A B C D E
A B C D E
VSS89
VSS30
AG27
AG24
AG12
AG15
AG21
AG18
AD28
AD21
AC13
AC21
AC11
AC19
AD17
AD23
AD19
AD16
AD13
AD11
AC23
AC16
AD25
AD24
AC27
AD27
AD29
AE27
AE26
AK29
AK22
AK10
AA28
AB25
AB28
AF30
AJ30
W19
W15
W17
W13
W27
AG9
AG6
AG5
AD7
AD8
M16
M12
M14
M18
AC9
AD9
G28
G16
G17
G30
G11
G13
G14
G15
G12
G10
AK5
R27
U19
N17
U13
R13
R17
U17
N13
N15
R15
U15
D10
H14
H16
H10
H17
H11
D11
C28
R19
D12
D15
P16
V16
V18
P18
P12
P14
V12
V14
E15
E16
B30
Y27
Y23
Y24
F27
F24
T27
T18
T12
T16
T14
F15
F26
T24
F25
F16
D9
E9
U80F
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
4 4
PAR 6 OF 6
GROUND
VSSA68
VSSA67
VSSA66
VSSA65
VSSA64
VSSA63
VSSA62
VSSA61
VSSA60
VSSA59
VSSA58
VSSA57
VSSA56
VSSA55
VSSA54
VSSA53
VSSA52
VSSA51
VSSA50
VSSA49
VSSA48
VSSA47
VSSA46
VSSA45
VSSA44
VSSA43
VSSA42
VSSA41
VSSA40
VSSA39
VSSA38
VSSA37
VSSA36
VSSA35
VSSA34
VSSA33
VSSA32
VSSA31
VSSA30
VSSA29
VSSA28
VSSA27
VSSA26
VSSA25
VSSA24
VSSA23
VSSA22
VSSA21
VSSA20
VSSA19
VSSA18
VSSA17
VSSA16
VSSA15
VSSA14
VSSA13
VSSA12
VSSA11
VSSA10
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSSA9
VSSA8
VSSA7
VSSA6
VSSA5
VSSA4
VSSA3
VSSA2
VSSA1
R23
V28
V25
U28
K25
E26
P28
P25
N28
H24
M27
L27
T23
K28
N19
J28
M24
H28
F28
T8
L5
E5
U6
U5
E6
F6
V7
M7
AJ1
L6
AG3
C2
H8
V6
M3
H7
K7
AD6
Y7
T7
AB8
K3
C4
D6
AD5
J3
R6
J5
C7
C9
AA5
P7
B4
G3
AB7
M5
AF3
AE3
F3
V8
AD3
C8
J6
P8
AB3
A2
AA3
C6
D3
K8
W3
C3
V3
Y8
M8
F8
C5
M6
T3
AA6
R3
F5
F7
N3
V5
AE5
R5
VSSA59
VSSA22
1D2V_S0 1D2V_S0
3 U80E 3
PART 5 OF 6 VDDA_12_14 H9 1D2V_VDDA_RS480_S0 1 L10 2 VDDA12_13
N27 AA7 MLB-201209-11
VDD_HT1 VDDA_12_1
1
U27 VDD_HT2 VDDA_12_2 G9
1
V27 U8 C261 C263 C304 C301 C299 C305 TC9 C264

C284 C253 C252 C257 C255 C223 C224 VDD_HT3 VDDA_12_3 SC1U10V3KX
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC10U10V5ZY SC4D7U10V5ZY
G27 N7 ST100U6D3VDM-5
2
SC10U10V5ZY
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V VDD_HT4 VDDA_12_4 VSSA22
V24 N8
2
VDD_HT5 VDDA_12_5
H27 VDD_HT6 VDDA_12_6 U7
DY DY K24 VDD_HT7 VDDA_12_7 F9 DY
AB24 VDD_HT8 VDDA_12_8 AA8 SB 0127
P27 G8 VDDA18_13
VDD_HT9 VDDA_12_9
J27 VDD_HT10 VDDA_12_10 G7
1
AA27 VDD_HT11 VDDA_12_11 J8
K27 J7 1D8V_VDDA 1D8V_S0 C334
VDD_HT12 VDDA_12_12 VDDA12_13 SC4D7U10V5ZY
P24 B1
2
VDD_HT13 VDDA_12_13 L9 2 VSSA59
AB27 VDD_HT14 VDDA_18_1 AG4 1
1
AB23 R8 MLB-201209-11
VDD_HT15 VDDA_18_2
1
C278 C280 C281 C282 C283 C279 C277 V23 AC8
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V VDD_HT16 VDDA_18_3 C332 C302 C303 C262 C300 TC10 VDDHT30
G23 AC7
2
VDD_HT17 VDDA_18_4 SC1U10V3KX

SCD1U16V SCD1U16V SCD1U16V SCD1U16V
E23 AF6 ST100U6D3VDM-5
2
VDD_HT18 VDDA_18_5
1
DY W23 VDD_HT19 VDDA_18_6 AE6 DY
K23 L8 C736
VDD_HT20 VDDA_18_7 SC4D7U10V5ZY
J23 W8
2
VDD_HT21 VDDA_18_8 VSS30
H23 VDD_HT22 VDDA_18_9 W7
U23 VDD_HT23 VDDA_18_10 L7
1D8V_S0 AA23 R7
VDD_HT24 VDDA_18_11 VDDHT31
D23 VDD_HT25 VDDA_18_12 AF5
F23 AK2 VDDA18_13
VDD_HT26 VDDA_18_13
1
C23 VDD_HT27 VDD_CORE1 N16
2 C796 2
B23 VDD_HT28 VDD_CORE2 M13
1
A23 M15 1D2V_S0 SC4D7U10V5ZY
2
C821 C825 C285 C330 C287 C323 C328 C345 VDDHT30 VDD_HT29 VDD_CORE3 VSS89
A29 VDD_HT30 VDD_CORE4 W16
SC10U10V5ZY
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
SCD1U16V
VDDHT31 AC30 N18

2
VDD_HT31 VDD_CORE5
VDD_CORE6 P19
AK23 VDD_MEM1 VDD_CORE7 N12
1
AK28 VDD_MEM2 VDD_CORE8 P15
AK11 N14 C289 C294 C295 C256 C260 C296
VDD_MEM3 VDD_CORE9 SC10U10V5ZY
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
AK4 M17
2
VDD_MEM4 VDD_CORE10
AE30 VDD_MEM5 VDD_CORE11 T19
AC14 VDD_MEM6 VDD_CORE12 G22
AD12 VDD_MEM7 VDD_CORE13 R12
AC18 VDD_MEM8 VDD_CORE14 P13
1
AC20 VDD_MEM9 VDD_CORE15 R14

C326 C293 C329 C325 C331 C344 C327 C333 AD10 V19
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V VDD_MEM10 VDD_CORE16 DY DY
AD14 R18
2
VDD_MEM11 VDD_CORE17
AD15 VDD_MEM12 VDD_CORE18 U16
DY DY AD20 VDD_MEM13 VDD_CORE19 U12
1
1
AC10 VDD_MEM14 VDD_CORE20 T13
AD18 U14 C292 C290 C286 C297 C298
VDD_MEM15 VDD_CORE21 SC10U10V5ZY
SCD1U16V SCD1U16V SCD1U16V SCD1U16V
AC12 T17
2
2
AD22 VDD_MEM17 VDD_CORE23 U18
1D8V_S0 AC22 E22
AH15 VDD_MEMCK VDD_CORE25 R16
L11 V13
1D8VDD_S0 VDD_CORE26
1 2 H15 VDD_18_1 VDD_CORE27 T15
BLM11A121S AC17 P17
POWER
VDD_18_2 VDD_CORE28 DY
1
C346 C258 C291 C288 AC15 W18

VDD_18_3 VDD_CORE29
1
1 VDD_CORE30 D22 <Variant Name> 1

SC1U10V3KX
SCD1U16V
SCD1U16V
SCD1U16V
R216 DY B21 W12

2
R215 1D2V_S0 VDD_CORE47 VDD_CORE31

DY C21 VDD_CORE46 VDD_CORE32 V15
0R2-0 0R2-0 A22 W14
3D3V_S0 B22
VDD_CORE45 VDD_CORE33
V17 Wistron Corporation
2
VDD_CORE44 VDD_CORE34 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

C22 VDD_CORE43 VDD_CORE35 M19
F21 H22 Taipei Hsien 221, Taiwan, R.O.C.
3
F22 VDD_CORE41 VDD_CORE37 H21

1 2 1 2 E21 D21 Title
G21 VDD_CORE39 ATI-RS480M (4 of 4) PWR, GND
U24 U25 Size Document Number Rev
BAV99-1 BAV99-1 A3 -1
DY DY CHANGE TO 71.RS48M.B0U (VER A22) Bolsena
A B C D E
A B C D E
3D3V_S0 5V_S0
1
2
1
2
RN16 RN15
TMDS_EZ4_TX2- 49,57
TMDS_EZ4_TX2+ 49,57
TMDS_EZ4_TX1- 49,57
SRN10KJ SRN10KJ TMDS_EZ4_TX1+ 49,57
4 U11 4
4
3
4
3
2N7002DW
4 3 To EZ4 (5V level) TMDS_EZ4_TX0- 49,57
To Discrete DVI_D_1 EZ4_DVI_DDC_D 57
TMDS_EZ4_TX0+ 49,57
5 2 TMDS_EZ4_TXC+ 49,57
TMDS_EZ4_TXC- 49,57
RN20 6 1
49 DIS_DVI_DDC_D 3 2
49 DIS_DVI_DDC_C 4 1
TMDS_EZ4_TXC+
TMDS_EZ4_TX0+
TMDS_EZ4_TX1+
TMDS_EZ4_TX2+
TMDS_EZ4_TXC-
TMDS_EZ4_TX0-
TMDS_EZ4_TX1-
TMDS_EZ4_TX2-
SRN0-2-U EZ4_DVI_DDC_C 57
DVI_C_1
Dummy when use UMA
SB 0202
21
22
24
25
27
28
30
31
U10
To UMA DVO_MDA33 50 9 TMDS_UMA_HPD
TDC0#
TDC0
TDC1#
TDC1
TDC2#
TDC2
TLC#
TLC
12 DVO_MDA33 D11 HPDET
RN21 12 DVO_MDA34 DVO_MDA34 51
DVO_MDA35 D10
13 DDC_DATA 3 2 12 DVO_MDA35 52 D9 BCO 47
4 1 12 DVO_MDA36 DVO_MDA36 53
13 RS480_CLK D8 SB change much in this page 0127
12 DVO_MDA37 DVO_MDA37 54 48
DVO_MDA38 D7 C/HSYNC
SRN0-2-U 12 DVO_MDA38 55
DVO_MDA48 D6
12 DVO_MDA48 58 D5 CVBS 36
DVO_MDA39 59 3D3V_S0
12 DVO_MDA39 D4 R726 75R2F
3
12 DVO_MDA51 DVO_MDA51 60 37 DY 1 2 R34 3
DVO_MDA50 D3 Y/G
12 DVO_MDA50 61 D2 R728 75R2F 2 1
12 DVO_MDA49 DVO_MDA49 62 38 DY 1 2 BLM11A121S
D1 C/R
1
12 DVO_MDA52 DVO_MDA52 63 D0 R727 75R2F
39 DY 1 2 C51 C52 C24
CVBS/B
SC2200P50V2KX
SCD1U10V2MX
SC10U10V5ZY
12 IDCKN 56
2
XCLK# 3D3V_DVI_DVDD_S0
12 IDCKP 57 XCLK DVDD 1
12 R54
DVO_MDA53 DVDD 1D8V_DVI_DVDDV_S0
12 DVO_MDA53 2 DE DVDD 49 2 1 1D8V_S0
BLM11A121S
1
SCD1U10V2MX
46 P-OUT/TLDET# DGND 6
11 C953 C954 D51
DVO_MDA54 DGND SC10U10V5ZY
12 DVO_MDA54 4 64 1 2
2
DVO_MDA55 H DGND
12 DVO_MDA55 5 V
1
45 SSM5817S
3D3V_S0 R733 2 0R2-0 DVDDV C57 C56 C55
18,26,28,29,31,57 PCIRST_BUF# 1 13 RESET#
SC2200P50V2KX
SCD1U10V2MX
SC10U10V5ZY
RN118 SRN0-2-U 23
2
TVDD
1
DVI_D_1 3 2 CH7301_DATA 14 29 3D3V_DVI_TVDD_S0

SPD TVDD
1
C955 DVI_C_1 4 1 CH7301_CLK 15 20

SPC TGND
DUMMY-C2
R720 SB 0128 26
10KR2 3D3V_S0 R721 1 TGND
DY 2 0R2-0 DVI_GIPO0 8 GPIO0 TGND 32
DY R722 1 2 0R2-0 DVI_GIPO1 7 R40
DY GPIO1/TLDET#
18 3D3V_DVI_AVDD_S0 2 1
2
DVI_AS AVDD BLM11A121S

10 AS AVDD 44
1
AGND 16
1
1 R724 2 140R2F-GP DVI_ISET 35 17 3D3V_S0 C30 C29 C28

ISET AGND
SC2200P50V2KX
SCD1U10V2MX
R723 R39
SC10U10V5ZY
41
2
1D8V_S0 R725 1 DVI_VSWING AGND 3D3V_DVI_VDD_S0
330R2 2 19 VSWING VDD 33 2 1
2K4R2F 34 BLM11A121S
GND
1
XI/FIN
2 1KR2 2 R36 1 VREF_DVI C27 C26 2
3 40
2
VREF GND
SC2200P50V2KX
SCD1U10V2MX
1KR2 2 R35 1
XO
2 1
2
SCD1U10V2MX C25 CH7301C-T
42
43
3D3V_S0 R4
SB 0127 1 2 DVI_EZ4_HPD 57
To Discrete 10KR2
1
1
49 DVI_HPD 1 R42 2 TMDS_HPD R43 R56
0R2-0 10KR2
Dummy when use UMA 10KR2
2
2
3
1 R41 2
13 TMDS_UMA_HPD 0R2-0 Q3 1
1
To UMA & CH7301 Dummy when use Discrete CHT2222A
2
R3
Q4 1 100KR2
CHT2222A
SB 0127
2
2
Dummy when no EZ4

1 <Variant Name> 1
Place Near Dock
Wistron Corporation
Title
UMA DVI - CH7301C
A3 -1
Bolsena
A B C D E
A B C D E
3D3V_S0
CRT CONN
200mA Rating/Spec 500mA
5V_CRT_S0
1
2
RN82
To SYS and EZ4 CRT Both
1
2
RN1
U1
5V_S0 4 3 2N7002DW
SRN10KJ
5 2 SRN10KJ
4
3
4
3
4 6 1 4
U2A RN3
14
To SYS and EZ4 CRT Both
1
3 2 CRT_DDC_D_1 SYS_CRT_DDC_D5
13 UMA_CRT_DDC_D
RN6 13 UMA_CRT_DDC_C 4 1 CRT_DDC_C_1 SYS_CRT_DDC_C5
13 UMA_HS 3 2 HSYNC_5_1 2 3 HSYNC_5 1 R1 2 SYS_HS SRN0-2-U
4 1VSYNC_5_1 10R3 RN2
13 UMA_VS
SRN0-2-U U2B TSAHCT125
Dummy when use Discrete 3 2 EZ4_CRT_DDC_D 57
14
4 1 EZ4_CRT_DDC_C 57
7
4
VSYNC_5 R2 SYS_VS
RN4 SRN0-2-U Dummy when no EZ4
5 6 1 2 49 DIS_CRT_DDC_D 3 2
10R3 4 1
49 DIS_CRT_DDC_C
SRN0-2-U
TSAHCT125 5V_S0
7
1
C3 C2
SC 0308
RN5
Dummy when use UMA D28
DUMMY-C2
5V_CRT_S0
DUMMY-C2
3 2 EZ4_HS 57 1 2
RN7 4 1 EZ4_VS 57
1
49 DIS_HS 3 2 RB751V-40-U
49 DIS_VS 4 1 SRN0-2-U C657
2
Dummy when no EZ4 SCD01U50V2ZY
2
SRN0-2-U
Dummy when use UMA
3 L22 3
57 CRT_R_SYS 1 2 BLM18BB750SN1D CRT_R CRT1

17
L23 SYS_CRT_DDC_D5
57 CRT_G_SYS 1 2 BLM18BB750SN1D CRT_G 6
CRT_R 1 11
L24 SYS_HS
57 CRT_B_SYS 1 2 BLM18BB750SN1D CRT_B 7
CRT_G 2 12 SYS_CRT_DDC_D5
1
SYS_VS 8
1
C666 C667 C668 C652 C653 C654 CRT_B 3 13 SYS_HS
SC47P50V2JN
SC47P50V2JN
SC47P50V2JN
SC8D2P50V2CC 5V_CRT_S0 9
SC8D2P50V2CC
SC8D2P50V2CC
2
1
150R2FR504
R504
150R2FR505
150R2FR505
150R2FR506
150R2FR506
SYS_CRT_DDC_C5 4 14 SYS_VS
2
2
10
150R2F
C659 5 15 SYS_CRT_DDC_C5
1
C655 C656
C658 16
2
SC 0228
SC100P50V2JN
SC100P50V2JN
SC10P50V2JN-1
2
SC10P50V2JN-1
3
3
DY DY DY D27 D26 D25 20.20378.015
SC 0228
VIDEO-15-42
ME : 20.20378.015
2
SC 0228
5V_S0
BAV99-2 BAV99-2 BAV99-2
2 2
DY DY DY
1 2 C232 D34
SC47P50V2JN 2 3D3V_S0
L6
57 TV_LUMA_SYS 1 2
IND-1D2UH
TV_LUMA_CON 3 DY
TV CONN
1
1
C236 C235
SC100P50V2JN SC270P50V BAV99-2
2
1 2 C233 D35
SC47P50V2JN 2 TV1 CHROMA LUMA
L7 3D3V_S0
8
1 2 TV_COMP_CON 3 DY 1
57 TV_COMP_SYS IND-1D2UH
1
1 TV_LUMA_CON 4 6 5 4
C237 C234 2
SC100P50V2JN SC270P50V BAV99-2 5
2
TV_COMP_CON 7 3 7 2 1
TV_CRMA_CON 6
1 2 C231 D36 3
SC47P50V2JN 2 9
L8 3D3V_S0
1 2 TV_CRMA_CON 3 DY MINDIN7-11 COMPOSIT
57 TV_CRMA_SYS IND-1D2UH
1 <Variant Name> 1
1
1 22.10021.D81
150R2F R172
150R2F R171
150R2F R151
C238 C209
2
SC270P50V
SC100P50V2JN
BAV99-2 ME : 22.10021.D81 Wistron Corporation

2

1
Title
SC 0302 CRT / TV
SC 0302 A3 -1
Bolsena
A B C D E
A B C D E
LEDs NUM_LED#
D6 LED-G-31
5V_S0 SC 0302
1 R17 2 1 2 on KB Cover
330R2
D5 LED-G-31
CAP_LED# 1 R16 2 1 2 on KB Cover
330R2
D4 LED-G-31
MAIL_LED# 1 R14 2 1 2 on KB Cover
330R2
4 D7 LED-G-31 4
MEDIA_LED# 1 R19 2 1 2 on KB Cover
330R2
D24 LED-Y-22
WLAN_LED# 1 R483 2 1 2 on Front Panel
330R2
D3 LED-G-31
SC 0302 1 R10
?modify R 2
330R2
1 2 on KB Cover
Dummy when use IDE FRONT_PWRLED# 1 R497
D50 LED-G-31
2 1 2
?half light 330R2
on Front Panel
1 R22 2 5V_S5
19 SATA_LED# 0R2-0 D48 LED-G-31
D8 DC_BATFULL# 1 R495 2 1 2 on Front Panel
1 R21 2 2 330R2
25 HDD_LED#_5 0R2-0 MEDIA_LED#
3
Dummy when use SATA SC 0308
25 CDROM_LED#_5 1
BAW56
5V_S0
D23
BLT_LED# 1 R480 2 2 1 on Front Panel
34 NUM_LED# 330R2
34 CAP_LED#
LED-B-27-U-GP
34 MAIL_LED# 5V_S5 SC 0302
34 BLT_LED# D49 LED-Y-22
31 WLAN_LED# STDBY_LED#
3
34 STDBY_LED# 1 R496 2 1 2 on Front Panel 3
330R2
34 CHARGE_LED# D47 LED-Y-22
34 DC_BATFULL# CHARGE_LED# 1 R494 2 1 2 on Front Panel
330R2
34 FRONT_PWRLED#
RC2 SRC100P50V-U on KB cover SC 0302
NUM_LED# 1 8 LED V V V V V
CAP_LED# 2 7
MAIL_LED# 3 6 Button V V V V V
MEDIA_LED# 4 5
POWER1 E-MAIL INTERNET e-BTN PROGRAM CAPS NUM HDD
RC9 SRC100P50V-U
WLAN_LED# 1 8
Front panel
STDBY_LED# 2 7
BLT_LED# 3 6
CHARGE_LED# 4 5 LED V V V V Charger: Power2:
C644SC100P50V2JN Button V V Green : DC only or Battery full with DC Green : S0
DC_BATFULL# 1 2 Orange : Charging Orange : S3
C229SC100P50V2JN
BlutTooth Wireless Charger Power2 Orange Blink : Battery low Orange Blinking : Enter S4
FRONT_PWRLED# 1 2
(Please See M.E. drawing LED position)
2 2
LCD CONN LCDPOWER_S0
SC 0310 LCD1
LCD POWER
SC10U10V5ZY
1
42 C39 C37 C38

2 1
SCD1U
Layout 40 mil
2
LCDPOWER_S0 3D3V_S0
SCD1U
4 3
6 5
8 7 DY DY
10 9 LCD_TXBCLK+ 13,54
3D3V_S0 12 11 U13
LCD_TXBCLK- 13,54
14 13 LCD_TXBOUT2+ 13,54
13,49 EDID_CLK 16 15 LCD_TXBOUT2- 13,54 1 OUT IN 6
13,49 EDID_DAT 18 17 LCD_TXBOUT1+ 13,54 EVEN CHANNEL 2 GND GND 5
20 19 LCD_TXBOUT1- 13,54 13,54 LCD_VDD_ON 1 R50 2 LCDVDD_ON_1 3 ON/OFF# IN 4
22 21 1KR2
LCD_TXBOUT0+ 13,54
1
24 23 LCD_TXBOUT0- 13,54
34 BRIGHTNESS 26 25 LCD_TXACLK+ 13,54 C40 C42 C43
SC1U10V3KX
28 27 SCD1U AAT4280IGU-3-T1 SC1U10V3KX
LCD_TXACLK- 13,54
2
34 FPBACK DCBATOUT 30 29 LCD_TXAOUT2+ 13,54
32 31 LCD_TXAOUT2- 13,54
34 33 LCD_TXAOUT1+ 13,54 ODD CHANNEL
2
C663 C665 C651 C664 36 35 LCD_TXAOUT1- 13,54

1
1
SCD1U
SC100P50V2JN
SC100P50V2JN
38 37
SC10U35V0ZY-U
LCD_TXAOUT0+ 13,54
40 39 LCD_TXAOUT0- 13,54
1
41
2
2
SB 0202
1 <Variant Name> 1
JST-CONN40A-2
20.F0439.040 Wistron Corporation

1ST 20.F0687.040 - 2ND 20.F0439.040
Title
LCD / LEDs
A3 -1
Bolsena
A B C D E
A B C D E
5V_S5
32K suspend clock output
1
U44A
14
R365
8K2R2 1
21,34,38,39,43,44,55,57 PM_SLP_S3# R349 2
3 1 CLK32_G791 23
U43A 2 10R3
2
22 RTC_CLK
?3.9p need app PN A_RST# AH8
SB400 SB PCICLK0 L4
L3 PCI_CLK1_R 1 22R2 2 R400 CLK33_CBUS TSAHCT08-U
7
A_RST# PCICLK1 PCI_CLK2_R 22R2 CLK33_LAN
Part 1 of 4 PCICLK2 L2 1 2 R397
L27 L1 PCI_CLK3_R 1 22R2 2 R396 CLK33_MINI
CHANGE TO - 3.9P -> 78.3R974.1F1 3 SBSRC_CLK PCIE_RCLKP PCICLK3 PCI_CLK4_R 22R2 CLK33_KBC
M27 M4 1 2 R402
3 SBSRC_CLK# PCIE_RCLKN PCICLK4
1 2 C579 PCICLK5 M3 PCI_CLK5_R 1 22R2 2 R401 CLK33_SIO
4 SC12P50V2JN-1 C478 1 2 SCD01U16V2KX TX0P M30 M2 PCI_CLK6_R 1 22R2 2 R398 CLK33_LPCROM 4
12 PCIE_RX0P_SB C481 SCD01U16V2KX TX0N PCIE_TX0P PCICLK6 CLK33_CBUS
1 2 N30 M1 PCI_CLK7 22 CLK33_CBUS 26
PCI CLKS
12 PCIE_RX0N_SB C476 SCD01U16V2KX TX1P PCIE_TX0N PCICLK7 CLK33_LAN
12 PCIE_RX1P_SB 1 2 K30 PCIE_TX1P PCICLK8 N4 PCI_CLK8 22 CLK33_LAN 22,29
3
1
R382 R381 C477 1 2 SCD01U16V2KX TX1N L30 N3 PCI_CLK9_R 1 R399 2 CLK33_MINI CLK33_MINI 22,31
X5 20MR3 12 PCIE_RX1N_SB PCIE_TX1N PCICLK9 PCI_CLK9_FB 22R2
H30 PCIE_TX2P PCICLK_FB N2 1 2 C588 CLK33_KBC CLK33_KBC 22,34
J30 SC100P50V2JN CLK33_SIO
PCIE_TX2N CLK33_SIO 22,37
SC 0307 F30 AJ7 PCIRST# CLK33_LPCROM
PCIE_TX3P PCIRST# PCI_AD[31..0] 22,26,29,31 CLK33_LPCROM 22
XTAL-32D768K-4P 20MR3 G30 W3 PCI_AD0
2
2
PCIE_TX3N AD0/ROMA18 PCI_AD1
Y2 DY
2
32K_X1 AD1/ROMA17 PCI_AD2

12 PCIE_TX0P_SB M29 PCIE_RX0P AD2/ROMA16 W4
N29 Y3 PCI_AD3
12 PCIE_TX0N_SB PCIE_RX0N AD3/ROMA15
1 2 C566 32K_X2
12 PCIE_TX1P_SB M28 PCIE_RX1P AD4/ROMA14 V1 PCI_AD4
SC12P50V2JN-1 N28 Y4 PCI_AD5
12 PCIE_TX1N_SB PCIE_RX1N AD5/ROMA13
1
CHANGE TO - 3.9P -> 78.3R974.1F1 J29 V2 PCI_AD6
SB PCIE_RX2P AD6/ROMA12 PCI_AD7 C591 C585 C584 C593 C592 C587
MAIN SOURCE: 82.30001.031 EPSON K29
J28
PCIE_RX2N AD7/ROMA11 W2
AA4 PCI_AD8 DUMMY-C2 DUMMY-C2 DUMMY-C2 DUMMY-C2 DUMMY-C2 DUMMY-C2
PCIE_PVDD PCIE_RX3P AD8/ROMA9
1D8V_S0
2ND SOURCE: 82.30001.341 KDS K28 PCIE_RX3N AD9/ROMA8 V4 PCI_AD9
AA3 PCI_AD10
L16 AD10/ROMA7
1 R304 2 150R2F PCIE_CALRP G27 U1 PCI_AD11
2
PCIE_CALRP AD11/ROMA6
1 2 PCIE_VDDR 1 R305 2 150R2F PCIE_CALRN H27 PCIE_CALRN AD12/ROMA5 AA2 PCI_AD12
U2 PCI_AD13 3D3V_S0
PCI EXPRESS INTERFACE

AD13/ROMA4
1
MLB-201209-11 1 R303 2 4K12R2F PCIE_CALI G28 AA1 PCI_AD14

C479 C480 C485 PCIE_CALI AD14/ROMA3 PCI_AD15 RN78 RN80 RN77 RN79
AD15/ROMA2 U3
SC1U10V3KX
SCD1U16V
A11, A12 4K53 1% PCIE_PVDD PCI_AD16

SC10U10V5ZY
R30 T4
2
PCIE_PVDD AD16/ROMD0
R403
A21, A22 5K5 1% AC1 PCI_AD17
AD17/ROMD1
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
A23 4K12 1% F26 R2 PCI_AD18
PCIE_VDDR_1 AD18/ROMD2
1
PA_IXP400AC10.PDF R29 AD4 PCI_AD19
PCIE_VDDR_2 AD19/ROMD3 PCI_AD20 3D3V_S0
G26 PCIE_VDDR_3 AD20/ROMD4 R3
P26 AD3 PCI_AD21
3 PCIE_VDDR_4 AD21/ROMD5 PCI_AD22 3
K26 PCIE_VDDR_5 AD22/ROMD6 R4
1D8V_S0 PCIE_VDDR L26 AD2 PCI_AD23 RN74
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
PCIE_VDDR_6 AD23/ROMD7
8K2R2
P28 P2 PCI_AD24 SRN10K-2 SRN10K-2 SRN10K-2 SRN10K-2 LPC_LAD0 1 8
PCIE_VDDR_7 AD24 PCI_AD25 LPC_LAD3 2
N26 PCIE_VDDR_8 AD25 AE3 7
1 L15 2 P27 PCIE_VDDR_9 AD26 P3 PCI_AD26 LPC_LAD2 3 6
0R0603-PAD AE2 PCI_AD27 LPC_LAD1 4 5
AD27
1
1
H28 P4 PCI_AD28
SC 0308 C475 C486 C450 C483 C482 PCIE_VSS_1 AD28 PCI_AD29
F29 AF2 SRN10K-2
PCIE_VSS_2 AD29
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
PCI_AD30
SC10U10V5ZY
H29 N1
2
2
PCIE_VSS_3 AD30 PCI_AD31
H26 PCIE_VSS_4 AD31 AF1
DY F27 PCIE_VSS_5 CBE0#/ROMA10 V3 PCI_CBE#0 26,29,31
DY DY G29 AB4 PCI_CBE#1 26,29,31
PCI INTERFACE
PCIE_VSS_6 CBE1#/ROMA1
L29 PCIE_VSS_7 CBE2#/ROMWE# AC2 PCI_CBE#2 26,29,31
J26 PCIE_VSS_8 CBE3# AE4 PCI_CBE#3 26,29,31
L28 PCIE_VSS_9 FRAME# T3 PCI_FRAME# 26,29,31
J27 PCIE_VSS_10 DEVSEL#/ROMA0 AC4 PCI_DEVSEL# 26,29,31
RP4 3D3V_S0 N27 AC3 PCI_IRDY# 26,29,31
INT_PIRQA# PCIE_VSS_11 IRDY#
1 10 M26 PCIE_VSS_12 TRDY#/ROMOE# T2 PCI_TRDY# 26,29,31
INT_PIRQB# 2 9 INT_PIRQG# K27 U4
PCIE_VSS_13 PAR/ROMA19 PCI_PAR 26,29,31
INT_PIRQC# 3 8 INT_PIRQD# P29 T1
PCIE_VSS_14 STOP# PCI_STOP# 26,29,31
INT_PIRQH# 4 7 INT_PIRQE# P30 AB2
PCIE_VSS_15 PERR# PCI_PERR# 26,29,31
5 6 INT_PIRQF# AB3
3D3V_S0 SERR# PCI_SERR# 26,29,31
TP72 SB_CPUSTP# AJ8 AF4 PCI_REQ#0 31
5V_S0 TP71 SB_PCISTP# CPU_STP#/DPSLP# REQ0#
SRP10K AK7 AF3 PCI_REQ#1 26
INT_PIRQA# PCI_STP# REQ1#
AG5 INTA# REQ2# AG2 PCI_REQ#2 29
INT_PIRQB# AH5 AG3 PCI_REQ#3
INT_PIRQC# INTB# REQ3#/PDMA_REQ0# PCI_REQ#4
AJ5 INTC# REQ4#/PLL_BP33/PDMA_REQ1# AH1
U2D INT_PIRQD# PCI_REQ#5
14
13
AH6 INTD# REQ5#/GPIO13 AH2

INT_PIRQE# AJ6 AH3 PCI_REQ#6
2 26 INT_PIRQE# INTE#/GPIO33 REQ6#/GPIO31 2
INT_PIRQF# AK6 AJ2 PCI_GNT#0 31
26,31 INT_PIRQF# INTF#/GPIO34 GNT0#
A_RST# 12 11 RSTDRV#_R 1 R13 2 RSTDRV#_5 25 INT_PIRQG# AG7 AK2 PCI_GNT#1 26
33R2 26 INT_PIRQG# INTG#/GPIO35 GNT1#
INT_PIRQH# AH7 AJ3 PCI_GNT#2 29
29 INT_PIRQH# INTH#/GPIO36 GNT2#
AK3 PCI_GNT#3
TSAHCT125 GNT3#/PLL_BP66/PDMA_GNT0# PCI_GNT#4 TP105
AG4
7
GNT4#/PLL_BP50/PDMA_GNT1# PCI_GNT#5 TP104

GNT5#/GPIO14 AH4
AJ4 PCI_GNT#6 TP106
GNT6#/GPIO32 PM_CLKRUN# 26,29,31,34,37
32K_X1 B2 AG1 TP107
X1 CLKRUN# PCI_LOCK# RTC_AUX_S5
LOCK# AB1
SC 0310
2
32K_X2 B1 DY
XTAL
X2 LPC_LAD[0..3] 34,37
1
R362 EC61
LPC_LAD0 1KR2 SC470P50V2KX
PCIRST# 3V to 5V level shift for HDD & CDROM LAD0 AG25
LPC_LAD1
AH25
2
3D3V_S5 TP66 SB_C29 LAD1 LPC_LAD2 SC 0308
C29 AJ25
1
TP64 SB_A28 CPU_PG LAD2 LPC_LAD3 RTC_AUX_S5_1 3D3V_S0
SB400 asserts PLTRST# to reset A28 INTR/LINT0 LAD3 AH24
TP94 H_NMI C28 AG24 LPC_LFRAME# 34,37 Pull up 100k to 3D3V_S0
devices on the platform. NMI/LINT1 LFRAME#
LPC
U51A TP65 FWH_INIT#

14
B29 INIT# LDRQ0# AH26 LPC_LDRQ0# 37

TP68 SB_D29 D29 AG26 LPC_LDRQ1# P_SERIRQ 1 R326
2
SMI# LDRQ1#
1
2
3
4
1 E4 10KR2
6,13 LDT_STP# TP67 SLP#/LDT_STP# P_SERIRQ 26,34,37
3 PLT_RST#_R 1 R368 2 SB_B30 B30 AK27 Close to chip DY LPC_LDRQ1#1 R306 2
CPU
LPC_RST# 13,34,37 IGNNE# SERIRQ

A_RST# 2 33R2 TP93 H_A20M# F28 3D3V_AUX_S5 10KR2
TP92 H_FERR# A20M# LPC_LDRQ0#1 R327
E28 FERR# 2
TSLCX08-U E29 10KR2
7
13 ALLOW_LDTSTOP STPCLK#/ALLOW_LDTSTP RTC1 SCON3

6 SB_CPUPWRGD D25 LDT_PG/SSMUXSEL/GPIO0 RTCCLK C2 RTC_CLK 22 21.D0010.103
2
TP91 H_DPRSLP# E27 F3 AUTO_ON# 22 ME : 21.D0010.103
DPRSLPVR RTC_IRQ#/ACPWR_STRAP
13 BMREQ# D27 BMREQ#
1
3D3V_S5 D28 A2 VBAT 3 SC 0310

R367 6,13 LDT_RST# LDT_RST# VBAT
RTC
1 RTC_GND A1 <Variant Name> 1
1
8K2R2 C565 C561 U47
U51B CHANGE TO 71.SB400.D0U (VER A32) BAT54C-U
14
1
SC1U10V3KX
SCD1U16V
SB400-1
Wistron Corporation
2
2
4 RTC_AUX_S5_1 RTC_AUX_S5
6 PCI_RST# 1 R366 2 PCIRST_BUF# 15,26,28,29,31,57 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCIRST# 5 10R3 Taipei Hsien 221, Taiwan, R.O.C.
5
1
2
3
RTC2 EC91
TSLCX08-U SC 0228 SC470P50V2KX Title
7
ATI-SB400 (1 of 5) PCI, PCIE

2
Secondary PCI Bus reset signal.

SCON3 21.D0010.103 A3
SC 0310 Bolsena -1
A B C D E
A B C D E
SC 0308
U43B
4 4
25 SATA_TXP0 1 2 C515 SCD01U50V3KX SATA_TP0 AK22
SATA_TX0+ SB400 SB
25 SATA_TXN0 1 2 C516 SCD01U50V3KX SATA_TN0 AJ22
SATA_TX0- PIDE_IORDY AD30 PIDE_IORDY 25 R463
Part 2 of 4 AE28 PIDE_IRQ14 25 0R0402-PAD
PIDE_IRQ
25 SATA_RXN0 1 2 C622 SCD01U50V3KX SATA_RN0 AK21
SATA_RX0- PIDE_A0 AD27 PIDE_A0 25 2 1 PIDE_DACK# 25
25 SATA_RXP0 1 2 C621 SCD01U50V3KX SATA_RP0 AJ21
SATA_RX0+ PIDE_A1 AC27 PIDE_A1 25
PIDE_A2 AD28 PIDE_A2 25
AK19 SATA_TX1+ PIDE_DACK# AD29 PDACK# 22
Close to SouthBridge AJ19 SATA_TX1- PIDE_DRQ AE27 PIDE_DREQ 25
PIDE_IOR# AE30 PIDE_IOR# 25 also strap function
AK18 SATA_RX1- PIDE_IOW# AE29 PIDE_IOW# 25
AJ18 SATA_RX1+ PIDE_CS1# AC28 PIDE_CS#0 25
PIDE_CS3# AC29 PIDE_CS#1 25
AK14 SATA_TX2+
AJ14 AF29 PIDE_D0
SATA_TX2- PIDE_D0
PRIMARY ATA 66/100

AF27 PIDE_D1
PIDE_D1 PIDE_D2
AK13 AG29
SERIAL ATA
SATA_RX2- PIDE_D2 PIDE_D3
AJ13 SATA_RX2+ PIDE_D3 AH30
AH28 PIDE_D4
PIDE_D4 PIDE_D5
Close to SouthBridge AK11
AJ11
SATA_TX3+ PIDE_D5 AK29
AK28 PIDE_D6
SATA_TX3- PIDE_D6 PIDE_D[15..0] 25
AH27 PIDE_D7
PIDE_D7 PIDE_D8
AK10 SATA_RX3- PIDE_D8 AG27
1 R342 2 AJ10 AJ28 PIDE_D9
1KR2F SATA_RX3+ PIDE_D9 PIDE_D10
PIDE_D10 AJ29
1 2 C542 AJ15 SATA_CAL PIDE_D11 AH29 PIDE_D11
SCD01U50V3KX AG28 PIDE_D12
SATA_X1 PIDE_D12 PIDE_D13
AJ16 SATA_X1 PIDE_D13 AG30
AF30 PIDE_D14
3 SATA_X2 PIDE_D14 PIDE_D15 3
AK16 SATA_X2 PIDE_D15 AF28
17 SATA_LED# AK8 SATA_ACT# SIDE_IORDY V29 SIDE_IORDY 25

1D8V_SP_S0 T27
SIDE_IRQ SIDE_IRQ15 25
AH15 PLLVDD_SATA SIDE_A0 T28 SIDE_A0 25
1D8V_SX_S0 U29
SIDE_A1 SIDE_A1 25
AH16 XTLVDD_SATA SIDE_A2 T29 SIDE_A2 25
1D8V_SATA_S0 V30
SIDE_DACK# SIDE_DACK# 25
SATA_X2 1 2 C545 AG10 U28 SIDE_DREQ 25
SC27P50V2JN AVDD_SATA_1 SIDE_DRQ
AG14 AVDD_SATA_2 SIDE_IOR# W29 SIDE_IOR# 25
2
X4 AH12 W30 SIDE_IOW# 25

AVDD_SATA_3 SIDE_IOW#
AG12 AVDD_SATA_4 SIDE_CS1# R27 SIDE_CS#0 25
AG18 AVDD_SATA_5 SIDE_CS3# R28 SIDE_CS#1 25
X-25MHZ-11-U AG21
1
SATA_X1 AVDD_SATA_6
1 2 C544 AH18 AVDD_SATA_7 SIDE_D0/GPIO15 V28 SIDE_D0
SC27P50V2JN AG20 W28 SIDE_D1
AVDD_SATA_8 SIDE_D1/GPIO16 SIDE_D2
SIDE_D2/GPIO17 Y30
SIDE_D3
SECONDARY ATA 66/100
AG9 AVSS_SATA_1 SIDE_D3/GPIO18 AA30

AF10 Y28 SIDE_D4
AVSS_SATA_2 SIDE_D4/GPIO19 SIDE_D5
AF11 AVSS_SATA_3 SIDE_D5/GPIO20 AA28
Dummy when use IDE AF12 AVSS_SATA_4 SIDE_D6/GPIO21 AB28 SIDE_D6
SIDE_D7
AF13 AVSS_SATA_5 SIDE_D7/GPIO22 AB27
SERIAL ATA POWER
AF14 AB29 SIDE_D8 SIDE_D[15..0] 25

AF16 Y27 SIDE_D10
1D8V_SATA_S0 AF18 W27 SIDE_D12
SATA_X1 AVSS_SATA_10 SIDE_D12/GPIO27 SIDE_D13
AF19 AVSS_SATA_11 SIDE_D13/GPIO28 Y29
AF20 V27 SIDE_D14
2 AVSS_SATA_12 SIDE_D14/GPIO29 SIDE_D15 2
AF21 AVSS_SATA_13 SIDE_D15/GPIO30 U27
1
AF22 AVSS_SATA_14
R344 R328 AH9
0R2-0 0R2-0 AVSS_SATA_15
AG11 AVSS_SATA_16 AVSS_SATA_33 AG13
AG15 AVSS_SATA_17 AVSS_SATA_34 AH22
AG17 AK12
2
AVSS_SATA_18 AVSS_SATA_35
AG22 AVSS_SATA_20 AVSS_SATA_37 AJ17
AF9 AVSS_SATA_22 AVSS_SATA_39 AH19
AH17 AVSS_SATA_23 AVSS_SATA_40 AJ20
AH23 AVSS_SATA_24 AVSS_SATA_41 AH21
AH13 AVSS_SATA_25 AVSS_SATA_42 AJ9
AH20 AVSS_SATA_26 AVSS_SATA_43 AG16
AK9 AVSS_SATA_27 AVSS_SATA_44 AK15
AJ12 AVSS_SATA_28 AVSS_SATA_45 AK20
Dummy when use SATA AK17 AVSS_SATA_29
AK23 AVSS_SATA_30
AH10 AVSS_SATA_31
AJ23 AVSS_SATA_32
SB400-1
CHANGE TO 71.SB400.D0U(VER A32)
1D8V_S0 1D8V_SATA_S0 1D8V_S0 1D8V_SP_S0 1D8V_S0 1D8V_SX_S0
1 R343 2 1 L19 2 1 L20 2

1
0R5J-1 0R3-U 0R3-U <Variant Name> 1
1
C546 C541 C518 C543 C540 C548 C547

SC2D2U16V5ZY SC2D2U16V5ZY Wistron Corporation
SC10U10V5ZY
SCD1U50V5ZY
SCD1U50V5ZY
SCD1U50V5ZY
SCD1U50V5ZY
2

Capacitor PLACE NEAR Capacitor PLACE NEAR Title

THE ACCORDED BALLS THE ACCORDED BALLS ATI-SB400 (2 of 5) IDE
Dummy when use IDE A3
Bolsena -1
A B C D E
A B C D E
1D8V_S0
3D3V_SB_S0 U43C
A30 VDDQ_1 SB400 SB VSS_12 E19

1
1
D30 VDDQ_2 VSS_13 E22
C507 C505 C529 C550 C484 C474 C506 E24 Part 3 of 4 E23
VDDQ_3 VSS_14
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SC10U10V5ZY
SC10U10V5ZY E25 E26

2
2
VDDQ_4 VSS_15
SCD1U16V
J5 VDDQ_5 VSS_16 E30
K1 VDDQ_6 VSS_17 F1
4 DY K5 VDDQ_7 VSS_18 F4 4
N5 VDDQ_8 VSS_19 G5
P5 VDDQ_9 VSS_20 H5
DY DY DY DY R1 VDDQ_10 VSS_21 J1
U5 VDDQ_11 VSS_22 J4
U26 VDDQ_12 VSS_23 K4
U30 VDDQ_13 VSS_24 L5
1
1
V5 VDDQ_14 VSS_25 M5
C451 C469 C509 C519 C468 C549 C489 V26 P1
VDDQ_15 VSS_26
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
Y1 R5
2
2
VDDQ_16 VSS_27
Y26 VDDQ_17 VSS_28 R26
AA5 VDDQ_18 VSS_29 T5
AA26 VDDQ_19 VSS_30 T26
AB5 VDDQ_20 VSS_31 T30
AC30 VDDQ_21 VSS_32 W1
DY DY DY AD5 VDDQ_22 VSS_33 W5
AD26 VDDQ_23 VSS_34 W26
AE1 VDDQ_24 VSS_35 Y5
3D3V_SB_S0 AE5 AB26
3D3V_S0 VDDQ_25 VSS_36
AE26 VDDQ_26 VSS_37 AB30
AF6 VDDQ_27 VSS_38 AC5
2 R404 1 AF7 AC26
0R0805-PAD VDDQ_28 VSS_39
AF24 VDDQ_29 VSS_40 AD1
1
AF25 VDDQ_30 VSS_41 AF5

C595 C590 C514 C491 C586 C594 C567 SC 0308 AK1 AF8
VDDQ_31 VSS_42
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SC10U10V5ZY
AK4 AF23
2
VDDQ_32 VSS_43
AK26 VDDQ_33 VSS_44 AF26
1D8V_S0 AK30 AG8
VDDQ_34 VSS_45
POWER
VSS_46 AJ1
3 M12 AJ24 3
VDD_1 VSS_47
M13 VDD_2 VSS_48 AJ30
DY M18 VDD_3 VSS_49 AK5
M19 VDD_4 VSS_50 AK25
N12 VDD_5 VSS_51 M14
1
1
C568 C487 C490 C517 C470 C569 C473 C597 C488 C589 C471 N19 M17
VDD_8 VSS_54
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
V12 N14
2
2
VDD_9 VSS_55
V13 VDD_10 VSS_56 N15
V18 VDD_11 VSS_57 N16
V19 VDD_12 VSS_58 N17
W12 VDD_13 VSS_59 P12
W13 VDD_14 VSS_60 P13
DY DY DY DY W18 VDD_15 VSS_61 P14
3D3V_SB_S5 W19 P15
VDD_16 VSS_62
VSS_63 P16
3D3V_SB_S5 A3 P17
3D3V_S5 S5_3.3V_1 VSS_64
A7 S5_3.3V_2 VSS_65 P18
E6 S5_3.3V_3 VSS_66 P19
2 R383 1 E7 R12
0R0805-PAD S5_3.3V_4 VSS_67
E1 S5_3.3V_5 VSS_68 R13
1
1D8V_S5 F5 R14
C581 C583 C563 C582 C558 C578 SC 0308 S5_3.3V_6 VSS_69
VSS_70 R15
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SC10U10V5ZY
E9 R16
2
1D8V_S5 3D3V_S5 S5_1.8V_1 VSS_71

E10 S5_1.8V_2 VSS_72 R17
E20 S5_1.8V_3 VSS_73 R18
DY 1D8V_S5 E21 R19
S5_1.8V_4 VSS_74
2
DY D16
VSS_75 T12
2
1 2 E13 USB_PHY_1.8V_1 VSS_76 T13
DY E14 USB_PHY_1.8V_2 VSS_77 T14
RB751V-40-U E16 T15
1D2V_S0 USB_PHY_1.8V_3 VSS_78
E17 USB_PHY_1.8V_4 VSS_79 T16
1D8V_S5 1D8V_S5 SC 0308 T17
VSS_80
1 R302 2 CPU_1D2V C30
CPU_PWR VSS_81 T18
0R0402-PAD T19
1D8V_S0 V5_VREF AG6 VSS_82
V5_VREF VSS_83 U12
VSS_84 U13
1
1 L17 2 1D8VAVDDCK_S0 A24 U14

C559 C532 C564 C562 C539 C512 C537 C560 MLB-201209-11 AVDDCK VSS_85
B24 AVSSCK VSS_86 U15
1
1
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SC10U10V5ZY
U16
2
5V_S0 C510 C508 C513 C472 VSS_87

SCD1U16V
A4 VSS_1 VSS_88 U17

SC10U10V5ZY
SC1U10V3KX
SCD1U16V SCD1U16VA8 U18
2
2
VSS_2 VSS_89
A29 VSS_3 VSS_90 U19
1
D18 V5_VREF B28 VSS_4 VSS_91 V14

MIN 4.5 C1 VSS_5 VSS_92 V15
DY DY DY E5 VSS_6 VSS_93 V16
RB751V-40-UNORMAL 5.0 E8 V17
VSS_7 VSS_94
DY Vf = 0.38v (@1mA) MAX 5.5 E11 W14
2
VSS_8 VSS_95
1v (@40mA) E12 VSS_9 VSS_96 W15
DY E15 VSS_10 VSS_97 W16
1 R405 2 V5_VREF E18 VSS_11 VSS_98 W17
1KR2
1
3D3V_S0
C598 C596 SB400-1
SC1U10V3KX

SCD1U16V
D17
2
1 2
1 <Variant Name> 1
RB751V-40-U
Wistron Corporation
Title
ATI-SB400 (3 of 5) POWER
A3
Bolsena -1
A B C D E
A B C D E
DY DY SC 0303
R324
R325
8
7
6
5
3D3V_S5 RN72
R384
R378
R379
R386
CLK48_USB 3
R363 1
1
1
1
1
1
1
2
3
4
8
7
6
5
8
7
6
5
R317
RN75 RN76 SRN10K-2 KBC_SLP_WAKE U43D 1 R341
2
GPIO1 DY 0R2-0
GPIO6 Part 4 of 4 SB 0211
C6
SB400 SB 48M_X1/USBCLK A15
B15
2
10KR22
2
10KR22
10KR22
10KR22
23 PM_THRM# TALERT#/TEMP_ALERT#/GPIO10 48M_X2
10KR2
10KR2
4 GPM6# D5 C15 USB_PCOMP 1 R337 2 4
BLINK/GPM6# USB_RCOMP
1
1
C4 D16 USB_VREFOUT TP102 11K8R3F
1
2
3
4
1
2
3
4
SRN4K7 RI# 29,34 PME#_SB RI# PCI_PME#/GEVENT4# USB_VREFOUT USB_TE1 TP101
SRN4K7 D3 RI#/EXTEVNT0# USB_ATEST1 C16
S3_STATE PM_SLP_S3#_SB B4 D15 USB_TE0 TP100
PM_SLP_S5# LUSB2# SLP_S3# USB_ATEST0
34,44,57 PM_SLP_S5# E3 SLP_S5# USB_OC0#/GPM0# B8 USB_OC#01 24
PCIE_WAKE# PM_SUS_STAT# SB 0202 B3 C8 RP3 3D3V_S5
2
10KR22
34 PM_PWRBTN# PWR_BTN# USB_OC1#/GPM1#
ACPI / WAKE UP EVENTS

10KR2
PME#_SB KA20GATE C3 C7 USB_OC#2 USB_OC#01 1 10
PM_SLP_S3#_SB KBRCIN# 39 SB_PWRGD PWR_GOOD USB_OC2#/FANOUT1/GPM2# USB_OC#3 USB_OC#2 24 USB_OC#2
34,37 PM_SUS_STAT# D4 SUS_STAT# USB_OC3#/GPM3# B7 USB_OC#3 24 2 9 USB_OC#5
GPM6# ECSCI#_KBC 1 R390 2 10KR2 F2 B6 USB_OC#4 USB_OC#4 3 8 LUSB1#
SYS_REST ECSMI#_KBC TEST1 USB_OC4#/GPM4# SC 0308
1 R388 2 10KR2 E2 TEST0 USB_OC5#/GPM5# A6 USB_OC#5 USB_OC#3 4 7
PM_PWRBTN# 34 KA20GATE AJ26 B5 USB_OC#6 1 R361 2 ECSWI# 5 6 USB_OC#6
GA20IN USB_OC6#/FAN_ALERT#/GEVENT6# 3D3V_S5
PM_THRM# AJ27 A5 SB_LUSB1# 0R0402-PAD 1 R744 2 LUSB1# 57
R743 2 1KR2 34 KBRCIN# SB_LUSB2# KBRST# USB_OC7#/CASE_ALERT#/GEVENT7# 1KR2
57 LUSB2# 1 D6 SRP10K
R364 2 0R0402-PAD ECSCI# SMBALERT#/THRMTRIP#/GEVENT2#
34 ECSCI#_KBC 1 C5 LPC_PME#/GEVENT3# USB_HSDP7+ A11 USB_PP7 TP70
SB 0202 SC 0308 1 R320 2 0R0402-PAD ECSMI# A25 B11 USB_PN7 TP69
34 ECSMI#_KBC ECSWI# R380 0R2-0 S3_STATE LPC_SMI#/EXTEVNT1# USB_HSDM7- SB 0202
34 ECSWI# 1 2 D8 VOLT_ALERT#/S3_STATE/GEVENT5#
3 SB_OSC_CLK 1 R323 2 DY SYS_REST D7 SYS_RESET#/GPM7# USB_HSDP6+ A10 USB_PP6 TP114
0R0402-PAD 1 R319 2 PCIE_WAKE# D2 B10 USB_PN6 TP115 SB 0201
13 SB_OSC_INT 0R2-0 DY WAKE#/GEVENT8# USB_HSDM6-
USB INTERFACE
SC 0308 D1 A14 USB_PP5 TP96
34,46 RSMRST#_KBC RSMRST# USB_HSDP5+
USB_HSDM5- B14 USB_PN5 TP97
1 2 C511 XI_CLK_SB14 2 R318 1 X1_CLK_SB14_1 A23 14M_X1/OSC
SC33P50V2JN 0R2-0 A13 USB_PP4
Use CLK GEN REF USB_HSDP4+ USB_PP4 24
XO_CLK_SB14_1 B23 B13 USB_PN4 BlueTooth
DY 14M_X2 USB_HSDM4- USB_PN4 24
2
14.318M CLK to SB
CLK / RST
OSCIN DY X3
R338 SIO_CLK_SB AK24 A18 USB_PP3
DUMMY IT 1MR2 SIO_CLK USB_HSDP3+ USB_PP3 24
TP95 B18 USB_PN3
USB_HSDM3- USB_PN3 24
X-14D318MHZ-1-U1 3D3V_S5 GPIO1 B25
1
GPIO6 ROM_CS#/GPIO1 SB 0201

R339 C25 A17 USB_PP2 24
2
GHI#/GPIO6 USB_HSDP2+ AVDD_USB

3 1 2 C534 XO_CLK_SB14 2 1 39,41 VRM_PWRGD C23 VGATE/GPIO7 USB_HSDM2- B17 USB_PN2 24
3
SC33P50V2JN 0R2-0 1 R301 2 10KR2 AGP_STP# D24 3D3V_S5
DY AGP_STP#/GPIO4
DY DY 1 R300 2 10KR2 AGP_BUSY# D23 AGP_BUSY#/GPIO5 USB_HSDP1+ A21 USB_PP1 24
DY 34 KBC_SLP_WAKE A27 FANOUT0/GPIO3 USB_HSDM1- B21 USB_PN1 24 1 L21 2
3D3V_S0 32 SPKR_SB C24 0R0603-PAD
SPKR/GPIO2
1
SMBC_SB 1 R321 2 33R2 SMBC_SB_1 A26 A20 C530
USB_PP0 24
GPIO
SMBD_SB SCL0/GPOC0# USB_HSDP0+ SC 0308
1 R322 2 33R2 SMBD_SB_1 B26 SDA0/GPOC1# USB_HSDM0- B20 USB_PN0 24
C580 C536 C531
SCD1U16V
SCD1U16V
DDC1_SCL
SC10U10V5ZY
SCD1U16V
B27
2
DDC1_SCL/GPIO9
8
7
6
5
RN73 DDC1_SDA C26

DDC2_SCL DDC1_SDA/GPIO8
C27 DDC2_SCL/GPIO11 AVDDTX_0 C21 AVDD_USB
DDC2_SDA D26 C18
DDC2_SDA/GPIO12 AVDDTX_1
AVDDTX_2 D13
AVDDTX_3 D10
D20
1
2
3
4
SRN10K-2 AVDDRX_0
J2 NC1 AVDDRX_1 D17
K3 NC4 AVDDRX_2 C14 DY
J3 C11
(NOT USED)
NC3 AVDDRX_3
K2 NC2
DDC1_SCL A16
AVDDC 3D3V_AVDDC
DDC1_SDA
1
DDC2_SCL B16
DDC2_SDA SC 0308 AVSSC C533 C538
SC10U10V5ZY
SCD1U16V
A9 DY
2
R394 2 0R0402-PAD AC_BITCLK AVSS_USB_1
32 AC97_BITCLK_SB 1 G1 AC_BITCLK AVSS_USB_2 A12
22,24,32 AC97_DOUT 1 R392 2 33R2 AC_SDOUT G2 AC_SDOUT AVSS_USB_3 A19
32 AC97_DIN0 H4 AC_SDIN0 AVSS_USB_4 A22
24 AC97_DIN1 G3 AC_SDIN1 AVSS_USB_5 B9
AC97_DIN2 G4 B12
3D3V_S5 TP103 R395 AC_SYNC AC_SDIN2 AVSS_USB_6
24,32 AC97_SYNC 1 2 H1 AC_SYNC AVSS_USB_7 B19
AC97
2 3D3V_AVDDC 2
USB PWR
33R2 H3 B22
24,32 AC97_RST# AC_RST# AVSS_USB_8 L18
22 SPDIF_OUT_STRAP H2 SPDIF_OUT AVSS_USB_9 C9
AVSS_USB_10 C10 1 2
1
C12 MLB-201209-11
AVSS_USB_11
1
R393 C13
680R2 AVSS_USB_12 C527 C528 C535
AVSS_USB_13 C17
C19 SC10U10V5ZY
SC1U10V3KX
SCD1U16V
2
AVSS_USB_14
C20
2
AVSS_USB_15
AVSS_USB_16 C22
AC97_RST# D9 DY
AVSS_USB_17
AVSS_USB_18 D11
AVSS_USB_19 D12
AVSS_USB_20 D14
AVSS_USB_21 D18
AVSS_USB_22 D19
3D3V_S0 D21
AVSS_USB_23
AVSS_USB_24 D22
SB400-1
1
1
R262 R259
2K2R2 2K2R2
3D3V_S5
2
2
U22C
14
1 <Variant Name> 1
SMBC_SB 9
3,8 SMBC_SB SMBD_SB
3,8 SMBD_SB 8 PM_SLP_S3# 18,34,38,39,43,44,55,57
PM_SLP_S3#_SB 10
Wistron Corporation
TSLCX08MTC-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7
Title
ATI-SB400 (4 of 5) USB GPIO
A3
Bolsena -1
A B C D E
A B C D E
3D3V_S5 3D3V_S0 3D3V_S5 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
1
R391 R424 R385 R426 R429 R428 R439 R438 R433 R432 R436
10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
2
18 AUTO_ON#
21,24,32 AC97_DOUT DY DY DY DY DY
18 RTC_CLK Place these R close to
4 21 SPDIF_OUT_STRAP SouthBridge if possible 4
18,29 CLK33_LAN
18,31 CLK33_MINI
18,34 CLK33_KBC
18,37 CLK33_SIO
18 CLK33_LPCROM
18 PCI_CLK7
18 PCI_CLK8
1
R389 R423 R387 R425 R430 R427 R440 R437 R434 R431 R435
10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
2
DY DY DY DY DY DY
SB400 version A31/A32
not the same!
REQUIRED SYSTEM STRAPS ACPWRON AC_SDOUT RTC_CLK SPDIF_OUT PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 PCI_CLK6 PCI_CLK7 PCI_CLK8
48MHZ- USB PHY 14MHZ ROM TYPE
MANUAL SIO 24MHz Clock PWRDOWN USB INT OSC
STRAP PWR ON USE DEBUG PLL48 CPU I/F=K8 H,H=PCI (X Bus) ROM
Input DISABLE MODE
3 HIGH STRAPS INTERNAL RTC
Buffer DEFAULT H,L=LPC ROM I
3
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
AUTO IGNORE EXTENNAL SIO 48MHz USB PHY USB 14MHZ L,H=LPC ROM II
STRAP PWR DEBUG RTC (NOT 48MHZ PWRDOWN EXT. XTAL CPU I/F=P4
LOW ON STRAPS SUPPORTED -Crytsal Pad ENABLE 48MHZ MODE L,L=Firmware Hub ROM
DEFAULT W/IT8712) DEFAULT
3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0 3D3V_S0
1
1
R462 R647 R628 R646 R625 R644 R621 R642 R622 R640
10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
2
2
19 PDACK#
18,26,29,31 PCI_AD31 DY DY DY DY DY
18,26,29,31 PCI_AD30
18,26,29,31 PCI_AD29
18,26,29,31 PCI_AD28
2 18,26,29,31
18,26,29,31
PCI_AD27
PCI_AD26
2
18,26,29,31 PCI_AD25
18,26,29,31 PCI_AD24
18,26,29,31 PCI_AD23
1
1
R464 R648 R627 R645 R626 R643 R624 R641 R623 R639
1KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2 10KR2
2
2
DEBUG STRAPS
DY DY DY DY DY
PDACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
BYPASS BYPASS IDE PLL USE RESERVED
USE LONG PCI PLL BYPASS ACPI BCLK EEPROM
STRAP RESET RESERVED RESERVED RESERVED RESERVED <Variant Name>
PCIE
1 HIGH 1
STRAPS
DEFAULT
Wistron Corporation
USE 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
USE SHORT USE PCI USE ACPI USE Taipei Hsien 221, Taiwan, R.O.C.
DEFAULT
STRAP RESET PLL BCLK IDE PCIE Title
LOW PLL STRAPS ATI-SB400 STRAPPING(5 of 5)
DEFAULT DEFAULT DEFAULT DEFAULT
A3 -1
Bolsena
FAN1_VCC
*Layout* 15 mil 5V_S0
1
D10
1
C214 C213 C215
SCD1U SC10U10V5ZY SC2200P50V2KX R137
2
S1N4148-U *Layout* 15 mil 10KR2
1
FAN1_VCC FAN1
2
1
FAN1_FB 2
3
1
CON3-4
C161 20.D0012.103
SC1000P50V2KX
2
ME : 20.D0012.103
*Layout* 30 mil
5V_S0
5V_S0 U21
1 R181 2 5V_G792_S0 6 1
200R3 VCC FAN1
20 DVCC FG1 4
1
5V_S0 14
CLK CLK32_G791 18
1
1
C248 16 THERMDP 6
SDA SMBD_G792 34
SCD1U R182 C216 C217 C218 7 18
2
DXP1 SCL SMBC_G792 34
1
10KR2
SCD1U
SCD1U
SC4D7U10V5ZY
9 19 To CPU
2
2
R158 DXP2 NC C249
11 DXP3
DY 10KR2 SC2200P50V2KX
2
2
SB 0307 5
DGND THERMDN 6
ALERT# 15 17 THERM_SYS_DP
2
PR_HW_SDN# ALERT# DGND
13 THERM#
3
V_DEGREE 3 8 C306
THERM_SET SGND1
39 RUNPWROK 1 2 G792_RST# 2 RESET# SGND2 10 C250 1 Q31
1
R178 0R2-0 12 SC2200P50V2KX MMBT3904-U1
2
R180 SGND3 THERM_SYS_DN SC470P50V2KX
Setting T8 as
2
1
49K9R2F
100 Degree DY R179 SD 0325
G792SFX VGA_THERM_DP 3904 on system
3
10KR2
2
(Thermal Sensor)
1
C219 1 Q27
SB SC2200P50V2KX C716 MMBT3904-U1
2
2
DXP1:108 Degree USE 0R2 63.R0034.1D1 WHEN UMA SC470P50V2KX
2
V_DEGREE DXP2:H/W Setting
2
=(((Degree-72)*0.02)+0.34)*VCC G12 G13 To VGA
DXP3:88 Degree VGA_THERM_DN DY DY SC 0311
GAP-CLOSE
GAP-CLOSE
HW thermal shut down tempature place back side of GPU
ALERT# 1 R157 2
setting 95 degree . Put Near CPU . 0R2-0
PM_THRM# 21
1
DY
RN119
Put RN near thermal diode
3 2 VGA_LOCAL_DP 49,54
4 1 VGA_LOCAL_DN 49,54
Dummy when G792 enhanced T8 function SRN0-2-U
T8_RSET:27K SET TO 80°C

Dummy when use UMA
5V_AUX_S5
T8_RSET:20K SET TO 90°C By Sourcer requset:
T8_RSET:15K SET TO 100°C
1
Main souce 74.00709.07F
R202
150R2F Second souce
U23 74.00710.03P
74.06509.07F
2
T8_SET 1 5 5V_G709_AUX_S5
SET VCC
2 GND 74.06510.A7P
3 OUT# HYST 4
1
R201 C270
20KR2F G709T1U SC4D7U10V5ZY
2
2
Put under CPU Socket

3D3V_AUX_S5 PURE_THRM_SDN#
6 CPU_THERMTRIP#
2
D43
3
D38
1
R611 RSMRST# 34
3
10KR2 3D3V_AUX_S5
BAW56
U77 <Variant Name>
2
BAT54-1 1 5
A VCC
1
BAW56
2
C782
34 S5_ENABLE B Wistron Corporation
3
SCD1U16V 3 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

S5PWR_ENABLE 43,44
2
GND Y Taipei Hsien 221, Taiwan, R.O.C.

DY NC7S08-U
DY Title
D39
THERMAL G792
2
(dummy, KBC already delay)

48 LOW3_OFF SD 0324 Size Document Number Rev
Custom -1
Bolsena
100 mil
5V_USB0_S0
5V_USB0_S0 5V_USB1_S0
USB PORT 5V_USB0_S0
USB_0-
5V_S5 21 USB_PN0 USB2
U90
1 R734 6
1
1 8 1 1KR2 2 1
GND OC1# USB_OC#01 21
2
TC24 C836 C812 2 7 TR4
VCC OUT1
SCD1U
SC1000P50V2KX
SE150U10VM 3 6 R735 USB_0- 2
2
2
EN1#/EN1 OUT2 1KR2 2 USB_0+
34 USB_PWR_EN# 4 EN2#/EN2 OC2# 5 1 USB_OC#2 21 3
DY 4
1
5
G5258B2 C957 C956
SCD1U
SCD1U
100 mil L-63UH 68.03216.20B SKT-USB-97-U
3
G5258B2 Active Low 1.5A
5V_USB1_S0
SB 0127
21 USB_PP0
USB_0+ 22.10218.H01
5V_S0
1
RN34
TC15 C435 C846 SB 0127 3 2
1
SE100U10VM
SCD1U
SC1000P50V2KX
4 1 5V_USB0_S0
2
D52
SSM5817-U SRN0-2-U
5V_S5 U59 5V_USB2_S0
2
1 8 USB_1- USB3
GND OUT 21 USB_PN1
2 IN OUT 7 6
3 IN OUT 6 1
USB_PWR_EN# 4 5 R736 1 1KR2 2
EN#/EN FLG USB_OC#3 21
2
100 mil TR5 USB_1- 2
USB_1+ 3
1
5V_USB2_S0 SB 0127 G528P1U 4
C958 DY 5
SCD1U
G528P1U Active Low
2
SKT-USB-97-U
1
L-63UH 68.03216.20B
3
TC1 C6 C5
SE100U10VM
SCD1U
SC1000P50V2KX
22.10218.H01
2
USB_1+
SB 0127 21 USB_PP1
RN37
3 2
4 1
SRN0-2-U 5V_USB1_S0
USB_2-
21 USB_PN2 USB4
6
1
BLUETOOTH MODULE
2
TR6
USB_2- 2
3D3V_S0 USB_2+ 3
U9 DY 4
3D3V_BT_S0 5
2 GND IN 5
3 L-63UH 68.03216.20B SKT-USB-97-U
3
NC 3D3V_BT_S0
4 ON/OFF# OUT 1
34 BLUETOOTH_EN
21 USB_PP2
USB_2+ 22.10218.H01
AAT4250-U
RN48
BLUE1 3 2
10 4 1
SRN0-2-U
8 BT_AUX TP2 TPAD30
7 BT_GPIO2 1 R48 2 0R2-0 DY USB_3-
BT_COEX2 31 21 USB_PN3 5V_USB2_S0
6 BT_GPIO1 1 R25 2 0R2-0 DY BT_COEX1 31
5 BT_LINK_LED
4 USB_PN4 21
2
3 USB_PP4 21 TR1
2 TP1 USB1
1
1 3D3V_BT_S0 TPAD30 DY DY SB 0131 6

ME : 20.D0012.108 EC3 EC4 DY 1
SC1000P50V2KX
SC1000P50V2KX
9
2
2ND : 20.D0122.108 USB_3- 2

20.D0012.108 MOLEX-CON8-2 L-63UH 68.03216.20B USB_3+ 3
3
4
20.D0122.108 - 2ND 5
USB_3+
21 USB_PP3
SKT-USB-97-U
MDC 1.5 CONNECTOR 3
RN88
2 22.10218.H01
4 1
MDC1 SRN0-2-U
13 15
MH1 14 ME : 22.10218.H01
1 2 TP76 TPAD30
2ND : 22.10218.C91
3 4 TP77 TPAD30
21,22,32 AC97_DOUT
5 6 3D3V_LAN_S5
21,32 AC97_SYNC 7 8
21 AC97_DIN1 2 R105 1 AC97_DIN1_MDC 9 10
33R2 <Variant Name>
21,32 AC97_RST# 11 12 AC97_BITCLK 32
MH2 17
16 18
Wistron Corporation
1
C128 AMP-CONN12A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
SC22P50V2JN-1 R556 Taipei Hsien 221, Taiwan, R.O.C.

2
2ND : 20.F0604.012 100KR2 C710

20.F0582.012 SC4D7U10V5ZY Title
2
DY USB / MDC / BLUETOOTH

2
ME : 20.F0582.012
2ND : 20.F0604.012 A3
Bolsena -1
A B C D E
HDD
19 PIDE_D[15..0]
HDD1
46
44 43 5V_S0
18 RSTDRV#_5 PIDE_D7 PIDE_D8
42 41
4
PIDE_D6
PIDE_D5
PIDE_D4
40
38
36
39
37
35
PIDE_D9
PIDE_D10
PIDE_D11
CDROM 4
1
PIDE_D3 34 33 PIDE_D12
PIDE_D2 32 31 PIDE_D13 R465
PIDE_D1 30 29 PIDE_D14 4K7R2
PIDE_D0 28 27 PIDE_D15
26 25
2
24 23 PIDE_IORDY
19 PIDE_DREQ
19 PIDE_IOW# 22 21
19 PIDE_IOR# 20 19
19 PIDE_IORDY 18 17
19 PIDE_DACK# 16 15
19 PIDE_IRQ14 14 13
19 PIDE_A1 12 11
19 PIDE_A0 10 9 PIDE_A2 19
8 7 PIDE_CS#1 19 19 SIDE_D[15..0] ODD1
19 PIDE_CS#0
17 HDD_LED#_5 6 5 PWR TRACE 100mil 51
5V_S0 4 3 5V_S0 32 CD_AUDR 2 1 CD_AUDL 32
2
5V_S0
1
R461 C641 C624 2 1 4 3 CD_AGND 32

4K7R2 45 SIDE_D8 6 5 RSTDRV#_5
1
SIDE_D9 SIDE_D7
SCD1U
SC10U10V5ZY
8 7
2
SPD-CONN44D-7-U1 SIDE_D10 10 9 SIDE_D6 R212

1
5V_S0 SIDE_D11 SIDE_D5 4K7R2

20.80175.044 SIDE_D12
12 11
SIDE_D4
14 13
CHANGE TO 20.80592.044 SIDE_D13 16 15 SIDE_D3
2
SIDE_D14 18 17 SIDE_D2 SIDE_IORDY
Dummy when use SATA SIDE_D15 20 19 SIDE_D1
SIDE_D0
3
ME : 20.80592.044 19 SIDE_DREQ 22 21
3
24 23
(DIFFERENT FROM ORCAD P/N) 19 SIDE_IOR#
26 25 SIDE_IOW# 19
19 SIDE_DACK# 28 27 SIDE_IORDY 19
TPAD30 TP57 BAY_ID0 30 29 SIDE_IRQ15 19
TPAD30 TP58 BAY_ID1 32 31 SIDE_A1 19
19 SIDE_A2 34 33 SIDE_A0 19
19 SIDE_CS#1 36 35 SIDE_CS#0 19
38 37 CDROM_LED#_5 17
40 39 1 R213 2
42 41 4K7R2
5V_S0 5V_S0
44 43
46 45
48 47 CSEL
1
50 49
C307 C336 C335 52
SCD1U
SCD1U
SC10U10V5ZY
2
2
For HDD & SATA both STC-CONN50-4R
20.80251.050
PIN 49,50 DON'T USE

SATA Connector 5V_S0
2
D20 ME : 20.80251.050
TC19 C623
SCD1U
ST100U6D3VDM-5
2
3D3V_S0
B240LA
2 2
1
TC18 C620 SC 0308

ST22U6D3VBM SCD1U16V
2
SATA1
23
MH1
1
19 SATA_TXP0 2
19 SATA_TXN0 3
4
19 SATA_RXN0 5
19 SATA_RXP0 6
7
8
9
10
11
5V_S0 12
13
14
PWR TRACE 100mil 15
16
1 17 <Variant Name> 1
18
19
20
21 Wistron Corporation
22 CHANGE TO 20.F0665.022 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
MH2 Taipei Hsien 221, Taiwan, R.O.C.
24
Title
ME : 20.F0665.022 HDD / CDROM / SATA
20.F0614.022 (DIFFERENT FROM ORCAD P/N) Size Document Number Rev
Dummy when use IDE A3
Bolsena -1
A B C D E
A B C D E
3D3V_S0 U97A 1 of 4
4 4
W3 VCCP MFUNC0 N3 INTA# INT_PIRQE# 18 INTA# CARBUS 1 (INT_PIRQE#)

W10 U1-1 M5 INTB#
VCCP MFUNC1 INT_PIRQF# 18,31 INTB# (WIFI) (INT_PIRQF#)
18,22,29,31 PCI_AD[31..0] MFUNC2 P1 INTC# INT_PIRQG# 18 INTC# 1394 (INT_PIRQG#)
MFUNC3 P2 P_SERIRQ 18,34,37
PCI_AD31 U2 P3 INTD# INTD# CardReader (INT_PIRQE#) share
PCI_AD30 AD31 MFUNC4 CB_MFUNC5 R698 2
V1 AD30 MFUNC5 N5 1 3D3V_S0
PCI_AD29 V2 R1 4K7R2
AD29 MFUNC6 PM_CLKRUN# 18,29,31,34,37
PCI_AD28 U3
PCI_AD27 W2 AD28
PCI_AD26 AD27
V3 AD26 CLK_48 M1 CLK48_CARDBUS 3
PCI_AD25 U4 G46
PCI_AD24 AD25 3D3V_PLL_S0
V4 AD24 1 2
PCI_AD23 V5
PCI_AD22 AD23
U5 R13 GAP-CLOSE
PCI_AD21 AD22 U1-7 AVDD 1394_AGND
R6 AD21 AVDD R14
PCI_AD20 P6 V17 SC 0308
PCI_AD19 W6 AD20 AVDD
PCI_AD18 AD19 VDPLL R709 2 0R0402-PAD
V6 AD18 VDPLL_33 V19 1
PCI_AD17 U6 P14
PCI_AD16 AD17 VSSPLL
R7 AD16
PCI_AD15 V9 T18 7420_FILTER0 1 2 C928
PCI_AD14 AD15 VDPLL_15 SCD1U
U9 AD14 VSSPLL T17
PCI_AD13 R9
PCI_AD12 AD13
N9 AD12
PCI_AD11 V10 U18 1394_R0 1 R708 2 1394_AGND
CARD BUS
PCI_AD10 U10 AD11 R0 1394_R1 6K34R2F
AD10 R1 U19
PCI_AD9 R10
3 PCI_AD8 AD9 3
N10 AD8 TPBIAS0 U15 1394_TPBIAS0 28
PCI_AD7 V11 Bypass/Decupoling Capacitors
PCI_AD6 AD7
U11 AD6 TPA0P V15 1394_TPA0P 28
PCI_AD5 R11 W15 Should be places as close to
AD5 TPA0N 1394_TPA0N 28
PCI_AD4 W12
PCI_AD3 AD4
V12 V14 PCI7411 as possible
1394
AD3 TPB0P 1394_TPB0P 28
PCI_AD2 U12 W14
AD2 TPB0N 1394_TPB0N 28 3D3V_S0
PCI_AD1 N11
PCI_AD0 W13 AD1 1394_PHYTEST
AD0 PHY_TEST_MA R17 1 R707 2
M11 4K7R2 3D3V_S0
18,29,31 PCI_CBE#[3..0] CPS
PCI_CBE#0 W11 P15 1394_CNA 1 R706 2
PCI_CBE#1 W9 C/BE0# CNA 4K7R2
PCI_CBE#2 W7 C/BE1# 1394_XO C917 3D3V_S0
C/BE2# XO R19 1 2
1
PCI_CBE#3 W4 R18 1394_XI SC22P50V2JN-1
C/BE3# XI
2
X8 C934 C901 C935
R12 SC1000P50V2KX SCD1U SCD1U
2
PC0(TEST1)
18,29,31 PCI_PAR P9 PAR PC1(TEST2) U13
18,29,31 PCI_FRAME# V7 V13 82.30023.181
1
FRAME# PC2(TEST3)
1
2
18,29,31 PCI_TRDY# R8 TRDY# 1 2 C929 RN116
U7 X-24D576M-2 SC22P50V2JN-1
18,29,31 PCI_IRDY# IRDY# 3D3V_S0
18,29,31 PCI_STOP# W8 STOP# AGND N12
18,29,31 PCI_DEVSEL# N8 U14 1394_AGND
PCI_AD22 DEVSEL# AGND
1 R716 2 7411_IDSEL W5
IDSEL AGND U16 SRN10KJ
100R2F V8
18,29,31 PCI_PERR#
4
3
PERR#
1
18,29,31 PCI_SERR# U8 U17 1394_TPBIAS1
SERR# TPBIAS1 C933 C915 C936
18 PCI_REQ#1 U1 REQ# MC_PWR_CTRL 28
1
T2 V18 SC1000P50V2KX SCD1U SCD1U
18 PCI_GNT#1
2
GNT# TPA1P C930
18 CLK33_CBUS P5 PCLK TPA1N W18
R3 SCD1U
15,18,28,29,31,57 PCIRST_BUF#
2
2 PRST# 2
T1 GRST# TPB1P V16
T3 RI_OUT#/PME# TPB1N W16
1
C964 TP110
3
1 R717 1394_AGND
SC22P50V2JN-1
3D3V_S0 2 R2 SUSPEND#
10KR2 F1 MC_PWR_CTRL-0 1 Q32
2
U1-8 MC_PWR_CTRL_0 MC_PWR_CTRL-1 TP108 TPAD30 PDTC144EU

28 CB_DATA N1 DATA MC_PWR_CTRL_1 F2
28 CB_CLOCK L6
2
CLOCK
28 CB_LATCH N2 LATCH
32 CB_SPKR L7 SPKROUT SD_CD# E3 SD_CD# 28
SD/SDIO
3D3V_S0 MS_CD# F5 MS_CD# 28 MS/MS_pro

SC 0228 2 R697 1 F6
SM_CD# SM_CD# 28
47KR2 G5
MS_CLK/SD_CLK/SM_EL_WP# MS_CLK 28
1 4 E1 B_USB_EN# MS_BS/SD_CMD/SM_WE# F3 MSCBS 28
2 3 E2 U1-10
A_USB_EN# SM_D[4..7] 28
RN117 SRN10KJ 3D3V_S0 3D3V_PLL_S0
MS_DATA3/SD_DAT3/SM_D3 H5 MS_D3 28 MS_D[1..3] 28
M2 SDA MS_DATA2/SD_DAT2/SM_D2 G3 MS_D2 28 MS/MS_pro
M3 U1-5 G2 1 R715 2
SCL MS_DATA1/SD_DAT1/SM_D1 MS_D1 28
0R0603-PAD
UNUSED TERMINALS
1
MS_SDIO(DATA0)/SD_DAT0/SM_D0 G1 MSCSDIO 28
W17 J5 SC 0308 C932 C947 C949
NC#W17 SD_CLK/SM_RE# SDCCLK 28
T19 U1-6 J3 XD SC10U10V5ZY SC1000P50V2KX SC1U10V3KX
SDCCMD 28
2
RSVD SD_CMD/SM_ALE
P12 TEST0
SD_DAT0/SM_D4 H3 SM_D4 28
SD_DAT1/SM_D5 J6 SM_D5 28
CBUS_TP1 L5 J1 1394_AGND
RSVD SD_DAT2/SM_D6 SM_D6 28
TP112 L2 J2
RSVD U1-9 SD_DAT3/SM_D7 SM_D7 28
CBUS_TP2 K5
1 RSVD <Variant Name> 1
TP111 CBUS_TP3 K3 H7 SD_WP 28
TP113 RSVD SD_WP/SM_CE
K7 RSVD SM_CLE J7 SM_CLE 28
CBUS_TP4 L1 K1
TP109 L3
RSVD
RSVD
SM_R/B#
SM_PHYS_WP# K2
SM_R# 28
SM_PHYS_WP# 28
Wistron Corporation
PCI7411
Title
TI_PCI7411(1 of 2)
A3 -1
Bolsena
A B C D E
A B C D E
VCC_ASKT_S0
2 of 4 U97C 3 of 4
U97B 1 2 C903
SCD01U16V2KX
VCCA A5 RSVD D19
VCCA A11 CBB_D[0..15] 28 RSVD K19
CBB_A[0..25] 28
RSVD B15
A_CAD31/A_D10 D1 CBB_D10 28 RSVD A16
A_CAD30/A_D9 C1 CBB_D9 28 RSVD B16
A_CAD29/A_D1 D3 CBB_D1 28 RSVD A17
A_CAD28/A_D8 C2 CBB_D8 28 RSVD C16
4
A_CAD27/A_D0 B1 CBB_D0 28 RSVD D17 4
A_CAD26/A_A0 B4 CBB_A0 28 RSVD C19
A_CAD25/A_A1 A4 CBB_A1 28 RSVD D18
A_CAD24/A_A2 E6 CBB_A2 28 RSVD E17
A_CAD23/A_A3 B5 CBB_A3 28 RSVD E19
A_CAD22/A_A4 C6 CBB_A4 28 RSVD G15
A_CAD21/A_A5 B6 CBB_A5 28 RSVD F18
A_CAD20/A_A6 G9 CBB_A6 28 RSVD H14
A_CAD19/A_A25 C7 CBB_A25 28 RSVD H15
B7 U1-3 G17
A_CAD18/A_A7 CBB_A7 28 RSVD
A_CAD17/A_A24 A7 CBB_A24 28 RSVD K17
A_CAD16/A_A17 A10 CBB_A17 28 RSVD L13
A_CAD15/A_IOWR# E11 CBB_IOWR# 28 RSVD K18
A_CAD14/A_A9 G11 CBB_A9 28 RSVD L15
A_CAD13/A_IORD# C11 CBB_IORD# 28 RSVD L17
B11 L18
CARDBUS B
U1-2 A_CAD12/A_A11 CBB_A11 28 RSVD
A_CAD11/A_OE# C12 CBB_OE# 28 RSVD L19
A_CAD10/A_CE2# B12 CBB_CE2# 28 RSVD M17
A_CAD9/A_A10 A12 CBB_A10 28 RSVD M14
A_CAD8/A_D15 E12 CBB_D15 28 RSVD M15
A_CAD7/A_D7 C13 CBB_D7 28 RSVD N19
A_CAD6/A_D13 F12 CBB_D13 28 RSVD N18
A_CAD5/A_D6 A13 CBB_D6 28 RSVD N15
A_CAD4/A_D12 C14 CBB_D12 28 RSVD M13
CARDBUS A
A_CAD3/A_D5 E13 CBB_D5 28 RSVD P18

A_CAD2/A_D11 A14 CBB_D11 28 RSVD P17
A_CAD1/A_D4 B14 CBB_D4 28 RSVD P19
A_CAD0/A_D3 E14 CBB_D3 28
3 F15 3
RSVD
A_CC/BE3#/A_REG# C5 CBB_REG# 28 RSVD G18
A_CC/BE2#/A_A12 F9 CBB_A12 28 RSVD K14
A_CC/BE1#/A_A8 B10 CBB_A8 28 RSVD M18
A_CC/BE0#/A_CE1# G12 CBB_CE1# 28
RSVD K13
A_CPAR/A_A13 G10 CBB_A13 28
RSVD G19
A_CFRAME#/A_A23 C8 CBB_A23 28 RSVD H17
A_CTRDY#/A_A22 A8 CBB_A22 28 RSVD J13
A_CIRDY#/A_A15 B8 CBB_A15 28 RSVD J17
A9 H19 3D3V_S0
A_CSTOP#/A_A20 CBB_A20 28 RSVD
A_CDEVSEL#/A_A21 C9 CBB_A21 28 RSVD J19
E10 U97D 4 of 4
A_CBLOCK#/A_A19 CBB_A19 28 3D3V_S0
RSVD J18
A_CPERR#/A_A14 F10 CBB_A14 28 RSVD B18 H8 VCC
1
A_CSERR#/A_WAIT# B3 CBB_WAIT# 28 H9 VCC
1
E18 C919 H10
RSVD SCD1U16V VCC R695
E7 CBB_INPACK# 28 J15 H11 M19
2
A_CREQ#/A_INPACK# RSVD VCC VR_PORT 10KR2
A_CGNT#/A_WE# B9 CBB_WE# 28 H12 VCC VR_PORT H1
F14 J8 DY
RSVD VCC
B2 CBB_BVD1# 28 A18 M7
2
A_CSTSCHG/A_BVD1(STSCHG#/RI#) RSVD VCC
A_CCLKRUN#/A_WP(IOIS16#) C3 CBB_WP 28 RSVD H18 J12 VCC VR_EN# H2
A_CCLK/A_A16 E9 1 R688 2 CBB_A16 28 M9 VCC
1
33R2 B19 M10
RSVD VCC R696
C4 F17 M12
POWER TERMINALS
A_CINT#/A_READY(IREQ#) CBB_RDY 28 RSVD VCC
1
A_CRST#/A_RESET A6 CBB_RESET 28 RSVD C17 K8 VCC 1KR2
K12 C918 C916 from spec :
VCC
SCD1U16V
SCD1U16V
A2 N13 N7 this pin is
CBB_BVD2# 28
2
2 A_CAUDIO/A_BVD2(SPKR#) RSVD VCC active low 2
RSVD B17
A_CCD1#/A_CD1# C15 CBB_CD1# 28 RSVD C18
E5 F19 G7 SB 0201
A_CCD2#/A_CD2# CBB_CD2# 28 RSVD GND
A_CVS1/A_VS1# A3 CBB_VS1# 28 G8 GND
A_CVS2/A_VS2# E8 CBB_VS2# 28 RSVD N17 G13 GND
RSVD A15 H13 GND
A_RSVD/A_D14 B13 CBB_D14 28 RSVD K15 J9 GND
A_RSVD/A_D2 D2 CBB_D2 28 J10 GND Place it near to chip
A_RSVD/A_A18 C10 CBB_A18 28 J11 GND
PCI7411 K9 GND U1-4
K10 GND
K11 GND
PCI7411 L8 GND
L9 GND
L10 GND
L11 GND
L12 GND
M8 GND
PCI7411
1 <Variant Name> 1
Wistron Corporation
Title
TI_PCI7411(2 of 2)
A3 -1
Bolsena
A B C D E
A B C D E
PCMCIA Socket Cardbus I/F 1394 Connector

CBB_D[0..15] 27 26 1394_TPA0P
TR2
CBB_A[0..25] 27
1 4 ACM2012-900-2P-T 1394
CBB_IORD# 27 26 1394_TPA0N 6
PCH1 CBB_IOWR# 27 TPA0+ 4
CBB_OE# 27 2 3 TR3 TPA0- 3
1 CBB_WE# 27 26 1394_TPB0P 1 4 TPB0+ 2
35 CBB_REG# 27 TPB0- 1
CBB_D3 2 5
CBB_CD1# CBB_RDY 27
4 36 CBB_WP 27 26 1394_TPB0N 2 3 4
CBB_D4 3 CBB_RESET 27 AMP-CONN4A
1
CBB_D11 37 ACM2012-900-2P-T
CBB_D5 CBB_WAIT# 27 R711 R710 R714 R713 22.10245.141 - 2ND
4
CBB_D12 38
CBB_INPACK# 27 56R2F 56R2F 56R2F 56R2F 20.90036.001
CBB_D6 5
CBB_D13 39 CBB_CE1# 27
2
CBB_D7 6 CBB_CE2# 27 26 1394_TPBIAS0 1394_TPBIBS ME : 20.90036.001
CBB_D14 40 CBB_BVD1# 27 2ND : 22.10245.141
1
CBB_CE1# 7 CBB_BVD2# 27
1
CBB_D15 41 C948 R712
CBB_CD1# 27
SC220P50V2KX-U
CBB_A10 8 C931 4K99R2F
2
CBB_CE2# CBB_CD2# 27 SC1U10V3KX
42 CBB_VS1# 27
2
VCC_ASKT_S0 CBB_OE# 9 CBB_VS2# 27
2
CBB_VS1# 43
CBB_A11 10
CBB_IORD# 44
CBB_A9 11 1394_AGND 1394_AGND
CBB_IOWR# 45
CBB_A8 12
Close to the cardbus Controller.
1
C908 C906 CBB_A17 46

1
C905 CBB_A13 13
SCD1U CBB_A18 47
Power switch U53
2
CBB_A14 VCC_ASKT_S0
SC10U10V5ZY
SC10U10V5ZY
14
2
CBB_A19 48 PC1 3 9 VPP_ASKT_S0

C904 CBB_WE# 26 CB_DATA DATA AVCC
15 1 2 26 CB_CLOCK 4 CLOCK AVCC 10
1
SC1000P50V2KX CBB_A20 49 5
2
26 CB_LATCH LATCH
1
CBB_RDY 16 12 R421
CBB_A21 15,18,26,29,31,57 PCIRST_BUF# RESET# C605 100KR2
50 3 4 5V_S0 1 2 21 SHDN# AVPP 8 VPP_ASKT_S0
3 17 R422 10KR2 SCD1U16V 3
2
VPP_ASKT_S0 51 3D3V_S0
2
18 CARD-SKT18-U 13 15
3.3V OC#
52
CBB_A16 19 5V_S0
21.H0056.001
1
1
CBB_A22 53 1 VCC_ASKT_S0
C909 CBB_A15 C608 C619 5V
20 2 5V NC 24
SCD1U CBB_A23 54 SCD1U16V SC4D7U10V5ZY 23
2
2
CBB_A12 NC
21 NC 22
1
CBB_A24 55 ME : 21.H0056.001 7 19
CBB_A7 C606 C607 12V NC C618 C604
22 20 12V NC 18
CBB_A25 56 SCD1U16V SC1U10V3ZY 17 SCD1U16V SC4D7U
2
CBB_A6 NC DY
23 NC 16
CBB_VS2# 57 DY 11 14
CBB_A16 CBB_A5 SB 0202 GND NC
24 25 GND NC 6
CBB_RESET 58
CBB_A4 25
CBB_WAIT# 59 TSP2220A
CBB_A3 26
CBB_INPACK# 60 3D3V_CR_S0
CBB_A2 27
CBB_REG# 61 CARD1
Place close to pin 19. CBB_A1 28
1
CBB_BVD2# 62 40 2
XD-VCC SM-CD-COM
1
C907 CBB_A0 29 29 3 SM_CD#
DUMMY-C2 CBB_BVD1# C900 C914 C927 S.M-VCC SM-CD-SW SM_PHYS_WP#
63 20 MS-VCC SM-WP-SW 43
SCD1U16V
SCD1U16V
CBB_D0 30 9
2
CBB_D8 SD-VCC
SC1U10V3ZY
64 MS-BS 13 MSCBS 26
CBB_D1 31 17
2
2 CBB_D9 MSCSDIO MS-INS MS_CLK-R MS_CD# 26 2

65 7 SD-DAT0 MS-SCLK 19 1 R694 2 MS_CLK 26
CBB_D2 32 MS_D1 6 0R0402-PAD
CBB_D10 MS_D2 SD-DAT1 SC 0308
66 12 SD-DAT2 RSV#4 4
CBB_WP 33 MS_D3 11 39
Clock AC termination CBB_CD2# 67
SD-DAT3 XD-CD SM_CD# 26
33MHz clock for 32-bit 34 SD-CD-COM 41 SD_CD# 26

68 26 MSCSDIO 15 MS-DATA0 SD-CD-SW 42
MS_D1 SD_WP_R 1 R705 SD_WP
Cardbus card I/F VCC_ASKT_S0 MS_D2
14
16
MS-DATA1 SD-WP-SW 5
8
2
MS_CLK 0R0402-PAD
MS_D3 MS-DATA2 SD-CLK MSCBS SC 0308
PCMCIA-12-U 18 10
MS-DATA3 SD-CMD
1
38 SM_CLE 26
R420 62.10024.131 MS_D1 33
S.M#/XD-CLE
37 SDCCMD
DUMMY-R2 S.M/XD-D1 S.M#/XD-ALE SDCCMD 26
MS_D2 32 36 MSCBS
MS_D3 S.M/XD-D2 S.M#/XD-WE SC 0308
47K ME : 62.10024.131 31 S.M/XD-D3 S.M#/XD-CE 28 1 R685 2 SD_WP 26
SM_D4 21 27 0R0402-PAD SDCCLK 26
SM_D5 S.M/XD-D4 S.M#/XD-RE
22 26 SM_R# 26
2
SM_D6 S.M/XD-D5 S.M#/XD-R/B R686 2

23 S.M/XD-D6 S.M/XD-WP-IN 35 1 DY SM_PHYS_WP# 26
SM_D7 24 0R2-0
S.M/XD-D7
1
1 R687 2 MS_CLK-R
C603 46 0R0402-PAD
SCD01U16V2KX GND SC 0308
25 45
2
SM_CD# S.M-LVD GND

POWER SWITCH MSCSDIO
30
34
S.M-CD#
S.M-D0
GND
GND
44
1
SM_D[4..7] 26
MS_D[1..3] 26
U95 3D3V_S0 3D3V_CR_S0
2 5 SKT-MEMO-9-U1
GND IN
1 3 NC <Variant Name> 1
4 1
26 MC_PWR_CTRL ON/OFF# OUT 62.10051.331
ME : 62.10051.331
AAT4250-U Wistron Corporation
1
74.04250.03F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

C894 C893
SCD1U16V Taipei Hsien 221, Taiwan, R.O.C.
SC1U10V3ZY
2
Title
PCMCA / 1394 / CARD READER
A3 -1
Bolsena
A B C D E
A B C D E
18,26,31 PCI_CBE#[3..0]
TGP0 TGP1 TGP2 TGP3
CLOSE TO 18,22,26,31 PCI_AD[31..0]
LAN CHIP
TGN0 TGN1 TGN2 TGN3
1 R612 2 0R0402-PAD
1
100M_LED# 30
R571 R570 R573 R572 R577 R576 R579 R578 => LED1 : LINK
49D9R2F 49D9R2F 49D9R2F 49D9R2F 49D9R2F 49D9R2F 49D9R2F 49D9R2F D40 LAN_X2 1 2 C725
RTL_LED1# 1 6 SC12P50V2JN
2
X7
2
4 4
MID0X MID1X MID2X MID3X 2 5 1G_LED# 3 DY X-25MHZ-11-U
DY
1
1
1
LAN_X1 1 2 C759
C726 C727 C728 C729 RTL_LED2# 3 4 U78 SC12P50V2JN
1
SCD01U50V3KX SCD01U50V3KX SCD01U50V3KX SCD01U50V3KX BAT54C-L
2
2
RB731U
Dummy when use 10/100 10M_LED# 30,57
3D3V_LAN_S5
LAVDDH U79
DY LAN_EECS_3 1 8
CS VCC
1
LAN_X1 1 R614 2 10KR2 LAN_EESK 2 7
SC 0308 3D3V_LAN_S5 SK DC
1 R615 2 3K6R3D LAN_EEDI 3 6 C785
3D3V_LAN_S5 DI ORG SCD1U
LAN_X2 LAN_EEDO 4 5
2
DO GND
CTRL18 M93C46-W-3
ACT_LED# EEPROM LED OPTION USE '01'
ACT_LED# 30,57
LDVDD_A LDVDD
RTL_LED1# => LED0 : ACT (DEFINED IN SPEC)
Dummy when use Giga RTL_LED2#
1G_LED#
=> LED0 : ACT
LAN_EESK => LED1 : LINK
1 R569 2 LDVDD (BOTH 10/100 AND GIGA CHIP)
5K6R3F LAN_EEDI 45 Ohm,
LAN_EEDO
3D3V_LAN_S5 3D3V_LAN_S5 600mA LAVDDH
3D3V_LAN_S5
1 R568 2 LAN_EECS_3
2K49R3F
PCI_AD0 1 L5 2
3
Dummy when use 10/100 RSET PCI_AD1 0R0603-PAD 3
1
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U75 C787 C732 C207 C206 C784 C762 SC 0308 C203 C202 C757
SC10U10V5ZYSCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
2
VSS
VSS
VSS
EESK
EEDI
EECS
LANWAKE
RSET
VSSPST
AVDD18
CTRL18
XTAL2
XTAL1
LED0
VDD18
LED1
LED2
LED3
VDD18
EEDO
VDD33
PCIAD0
PCIAD1
AVDDH
GND
GND
Dummy when use Giga
0R2-0
CTRL25 1 R149 2
TGP0 1 102 PCI_AD2 3D3V_LAN_S5
30 TGP0 MDI0+ PCIAD2
30 TGN0 TGN0 2 101
LAVDDL MDI0- VSSPST
3 AVDDL GND 100
3
4 99 LDVDD
TGP1 VSS VDD18 PCI_AD3 Q9
30 TGP1 5 MDI1+ PCIAD3 98 1
TGN1 6 97 PCI_AD4 BCP69T1-U
30 TGN1 MDI1- PCIAD4
LAVDDL 7 96 PCI_AD5 CTRL18 1 2 45 Ohm,
2
AVDDL PCIAD5
Dummy when use 10/100 CTRL25 8 CTRL25 PCIAD6 95 PCI_AD6 R170 0R2-0
LDVDD 600mA
9 VSS VDD33 94
LAVDDH 1 R575 2
0R2-0
LAVDDH 10 AVDDH PCIAD7 93 PCI_AD7
PCI_CBE#0
Dummy when use 10/100 LDVDD_A
11 HSDAC+ CBEB0 92
LDVDD 1 R574 2 LV_12P 12 91 1 L4 2
0R2-0 HSDAC- VSSPST PCI_AD8 0R0603-PAD
13 VSS PCIAD8 90
Dummy when use Giga TGP2 14 MDI2+ PCIAD9 89 PCI_AD9
1
TGN2 15 88 C783 C786 C758 C731 C760 C761 C788 C201 C230 SC 0308
LAVDDL MDI2- M66EN PCI_AD10 C199
30 TGP2 16 AVDDL PCIAD10 87
17 86 PCI_AD11 SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U
30 TGN2
2
TGP3 VSS PCIAD11 PCI_AD12
30 TGP3 18 MDI3+ PCIAD12 85
2 3D3V_S0 TGN3 2
30 TGN3 19 MDI3- VDD33 84
1 LAVDDL 20 83 PCI_AD13
R580 2 1KR2 AVDDL PCIAD13 PCI_AD14
3 1 21 VSSPST PCIAD14 82
SC 0308 2 D53 BAT54-1 22 81
R581 2 ISOLATE# GND VSSPST
1 23 ISOLATE# GND 80
15KR2F LDVDD 24 79 PCI_AD15
INT_PIRQH# VDD18 PCIAD15 LDVDD
18 INT_PIRQH# 25 INTA# VDD18 78
26 77 PCI_CBE#1
3D3V_LAN_S5 VDD33 CBEB1
15,18,26,28,31,57 PCIRST_BUF# 27 76 PCI_PAR
PCIRST# PAR PCI_PAR 18,26,31 3D3V_LAN_S5
18,22 CLK33_LAN CLK33_LAN
PCI_GNT#2
28 PCICLK SERR# 75 PCI_SERR#
PCI_SERR# 18,26,31 Dummy when use Giga
18 PCI_GNT#2 29 GNT# NC#74 74
18 PCI_REQ#2 PCI_REQ#2 30 73
R582 2 PME#_LAN REQ# GND
21,34 PME#_SB 1 31 PME# NC#72 72
1
0R0402-PAD LDVDD 32 71
PCI_AD31 VDD18 VDD33 PCI_PERR# CTRL25 Q7 R150
33 PCIAD31 PERR# 70 PCI_PERR# 18,26,31 1
PCI_AD30 34 69 PCI_STOP# BCP69T1-U 0R3-U
SC 0308 PCIAD30 STOP# PCI_DEVSEL# PCI_STOP# 18,26,31
35 68 PCI_DEVSEL# 18,26,31
2
PCI_AD29 GND DEVSEL# PCI_TRDY# LAVDDL
36 67 PCI_TRDY# 18,26,31
2
PCIAD29 TRDY#
PCI_AD28 37 PCIAD28 VSSPST 66
PM_CLKRUN#
Dummy when use 10/100
38 VSSPST CLKRUN# 65 PM_CLKRUN# 18,26,31,34,37
PCIAD27
PCIAD26
PCIAD25
PCIAD24
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD18
PCIAD17
PCIAD16
FRAME#
VSSPST
C159 C204 C208 C205 C200

CBEB3
CBEB2
VDD33
VDD18
VDD18
VDD33
VDD18
1
IRDY#
IDSEL
GND
GND
GND
SCD1U
SCD1U
SCD1U
CLK33_LAN
SC10U10V5ZY
2
SCD1U
GIGALAN: RTL8110SBL
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1
RTL8110SBL
C730 (10/100) 71.08100.C0G - (GIGA ver:C) 71.08110.A0G
SC10P50V2JN-1
10/100 LAN:RTL8100C
1 <Variant Name> 1
2
PCI_AD27 LDVDD
PCI_AD26 PCI_IRDY#
PCI_IRDY# 18,26,31
PCI_FRAME#
3D3V_LAN_S5
PCI_AD25 PCI_CBE#2
PCI_FRAME# 18,26,31
Wistron Corporation
PCI_AD24 PCI_AD16 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PCI_CBE#3 PCI_AD17 Taipei Hsien 221, Taiwan, R.O.C.
LDVDD PCI_AD18
LAN_IDSEL G68 Title
PCI_AD23 3D3V_LAN_S5
PCI_AD23 1 R603 2 LAN_IDSEL PCI_AD19 1 2
100R2F PCI_AD22 LDVDD
3D3V_S5 3D3V_LAN_S5 RTL8110SBL/RTL8100C
PCI_AD21 PCI_AD20 GAP-CLOSE-PWR Size Document Number Rev
A3 -1
Bolsena
A B C D E
A B C D E
Link: Green - 10Mbps/802.11b Activity: Yellow Function SEL

Orange - 100Mbps/802.11a
Yellow - 1Gbps An to nB1 L
LAN1 An to nB2 H
9 22.10177.721 LAN switch
TIP RJ11_1
RING RJ11_2 22.10177.711 U12
LINK:GREEN ON LED COLOR CONN_PWR_B2
29,57 10M_LED# 10M_LED# A1 A1:GREEN CONN_PWR 2 48 S_TTGN0
29 TGN0 A0 0B1 S_TTGP0
29 TGP0 4 A1 1B1 47
1
3D3V_LAN_S5 2 R18 1CONN_PWR A2 8 42 S_RTGN1
470R2 EC1 EC2 29 TGN1 A2 2B1 S_RTGP1
29 TGP1 10 A3 3B1 41
A3:ORANGE SCD1U SCD1U S_TGN2
4 29 100M_LED# A3 15 35 SYSTEM 4
2
TDP_RJ45-1 29 TGN2 A4 4B1 S_TGP2
RJ45_1 29 TGP2 17 A5 5B1 34
TDN_RJ45-2 RJ45_2 21 29 S_TGN3
RDP_RJ45-3 29 TGN3 A6 6B1 S_TGP3
RJ45_3 29 TGP3 23 A7 7B1 28
RJ45-4 RJ45_4
RJ45-5 RJ45_5 45 D_TTGN0 D_TTGN0 57
RDN_RJ45-6 10M_LED# 0B2 D_TTGP0
RJ45_6 3 GND 1B2 44 D_TTGP0 57
RJ45-7 RJ45_7 100M_LED# 5 39 D_RTGN1 D_RTGN1 57
RJ45-8 ACT_LED# GND 2B2 D_RTGP1
RJ45_8 7 GND 3B2 38 D_RTGP1 57 DOCK
3D3V_LAN_S5 2 R20 1 CONN_PWR_B2 B1 9 GND 4B2 32 D_TGN2 D_TGN2 57
470R2 11 31 D_TGP2
GND 5B2 D_TGP2 57
1
29,57 ACT_LED# ACT_LED# B2 B2:YELLOW C14 C11 C10 13 26 D_TGN3 D_TGN3 57
GND 6B2 D_TGP3
10 16 GND 7B2 25 D_TGP3 57
SC1000P50V2KX
SC1000P50V2KX
SC1000P50V2KX
ACT:YELLOW BLINKING 18
2
GND
SKT-RJ45+RJ11-2 20
22.10177.711 - 2ND GND
22 GND NC 14
22.10177.721 27 GND DOCK_ON_1
30 GND SEL 24 DOCK_ON_1 57
3D3V_LAN_S5
ME : 22.10177.721 33 GND
37
2nd : (canceled) 40
GND
1
GND VDD
43 GND VDD 6
MDCW1 SC 0310 46 12
GND VDD
3
MLXCON2 19
L1 VDD
VDD 36
1 TIP_MDC 1 2 BLM18HG601SN1D TIP
1
2 RING_MDC 1 2 BLM18HG601SN1D RING
L2 PI3L301DA C31
RJ45-8 SCD1U10V2MX-1
2
3 RJ45-7 3
10/100M Lan Transformer
4
21.D0010.102 RJ45-5
U60
RJ45-4
Dummy when no EZ4
8
7
6
5
ME : 21.D0010.102 S_TTGP0 7 10 TDP_RJ45-1 RN13
S_TTGN0 TD+ TX+ TDN_RJ45-2
8 TD- TX- 9
1 S_RTGP1
RD+ S_RTGN1
6 CT RD- 2
MCT3 14
1
2
3
4
MCT4 CT RDP_RJ45-3 SRN0-1-U
11 CT RX+ 16
V_DAC 3 15 RDN_RJ45-6
CT RX- MCT1 MCT2
XFORM-112
68.0H80P.301 TGN0 3 RN98 2 SRN0-2-U S_TTGN0
Dummy when use Giga TGP0
TGN1
4
RN99
1
SRN0-2-U
S_TTGP0
S_RTGN1
CHANGE NETSWAP? 3 2
TGP1 S_RTGP1
LANKOM 68.0H80P.301 TGN2
4
3 RN100
1
2 SRN0-2-U S_TGN2
TGP2 4 1 S_TGP2
TGN3 3 RN101 2 SRN0-2-U S_TGN3
TGP3 4 1 S_TGP3
2 2
LANKOM 68.02402.30A Dummy when use EZ4
GIGA Lan Transformer netSWAP 68.62401.301 (GIGA ,Thick)
SC 0310
NETSWAP GIGA THICK PN IS 68.62401.301, DON'T USE NETSWAP THIN
U61
S_TGP3 2 23 RJ45-7
S_TGN3 TD1+ MX1+ RJ45-8
3 TD1- MX1- 22 1.route on bottom as differential pairs.
S_TGP2 5 20 RJ45-4 2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
S_TGN2 TD2+ MX2+ RJ45-5
6 TD2- MX2- 19 3.No vias, No 90 degree bends.
S_RTGP1 8 17 RDP_RJ45-3 4.pairs must be equal lengths.
S_RTGN1 TD3+ MX3+ RDN_RJ45-6
9 TD3- MX3- 16 5.6mil trace width,12mil separation.
S_TTGP0 11 14 TDP_RJ45-1 6.36mil between pairs and any other trace.
S_TTGN0 TD4+ MX4+ TDN_RJ45-2
12 TD4- MX4- 13 7.Must not cross ground moat,except
1 R517 2 V_DAC 1 24 MCT1 RJ-45 moat.
LAVDDL 0R2-0 TCT1 MCT1
4 21 MCT2
TCT2 MCT2 MCT3
7 TCT3 MCT3 18
10 15 MCT4
TCT4 MCT4
1
C32 C33 C36 C35 XFORM-153

8
7
6
5
SCD01U50V3KX
1 68.02402.30A RN12 1
SCD01U50V3KX
SCD01U50V3KX
SCD01U50V3KX
Dummy when use 10/100

2
Wistron Corporation
1

1
2
3
4
C34 C13 SRN75J Taipei Hsien 221, Taiwan, R.O.C.

SCD1U 2 1 LAN_TC_GND
2
SC1KP2KV Title
LAN CONN
Dummy when use 10/100 1 2 C12 DY
SC1000P50V2KX Size Document Number Rev
Dummy when use Giga A3
Bolsena -1
A B C D E
A B C D E
MINI-PCI
4 4
3D3V_S0
18,22,26,29 PCI_AD[31..0]
18,26,29 PCI_CBE#[3..0]
1
C809 C834 C810 C835
SC4D7U10V5ZY SCD1U SCD1U SCD1U
2
3D3V_S0
DY
2
R566
MINI1 10KR2
125 5V_S0
TIP 1 2 RING
1
3D3V_S0 WLAN_LED# 17
3 4
1
5 6 C833
2
SCD1U
7 8 DY
9 10 C811 R565
3
80211_ACTIVE 11 12 SC4D7U10V5ZY 10KR2
2
13 14 Q29
34 WIRELESS_EN
15 16 DTC124EUA-U1
1
MINI_P_IRQF# 17 18 DY
19 20 MINI_P_IRQF# 1 R629 2 INT_PIRQF# 18,26 22 K
3D3V_S0
21 22 0R0402-PAD 80211_ACTIVE 2
3 23 24 3
25 26 SC 0308
18,22 CLK33_MINI PCIRST_BUF# 15,18,26,28,29,57
27 28
18 PCI_REQ#0 29 30 PCI_GNT#0 18 22 K
31 32
PCI_AD31 33 34 PME#_MINI
1
PCI_AD29 35 36 BT_COEX1 24
37 38 PCI_AD30
PCI_AD27 39 40 TP82
PCI_AD25 41 42 PCI_AD28 TPAD30
43 44 PCI_AD26
24 BT_COEX2
PCI_CBE#3 45 46 PCI_AD24
3
PCI_AD23 47 48 MINI_IDSEL 1 R638 2 PCI_AD21
49 50 100R2F Q28
3D3V_S0 PCI_AD21 51 52 PCI_AD22 DTC124EUA-U1
PCI_AD19 53 54 PCI_AD20
55 56 PCI_PAR 18,26,29 22 K
PCI_AD17 57 58 PCI_AD18 WIRELESS_EN 2
1
PCI_CBE#2 59 60 PCI_AD16
R637 18,26,29 PCI_IRDY# 61 62
10KR2 63 64 PCI_FRAME# 18,26,29
18,26,29,34,37 PM_CLKRUN# 65 66 PCI_TRDY# 18,26,29 22 K
18,26,29 PCI_SERR# 67 68 PCI_STOP# 18,26,29
2
69 70
1
18,26,29 PCI_PERR# 71 72 PCI_DEVSEL# 18,26,29
PCI_CBE#1 73 74
77 78 PCI_AD13
PCI_AD12 79 80 PCI_AD11 SB 0214
2 PCI_AD10 2
81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_CBE#0
PCI_AD7 87 88
3
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4 Q30
93 94 PCI_AD2 DTC124EUA-U1
5V_S0 97 98 (VCC) 22 K
PCI_AD1 99 100 34 WLAN_TEST_LED 2
101 102
103 104 (M66EN)
105 106
107 108 22 K
109 110
111 112
1
113 114
115 116
117 118 SB 0214
119 120
121 122
123 124
126
PCIMODEM124A1U1
62.10032.001
1 <Variant Name> 1
ME : 62.10032.001
2ND : 62.10032.031
62.10032.031 - 2ND
Wistron Corporation
Title
MINI-PCI
A3 -1
Bolsena
A B C D E
5 4 3 2 1
5V_AUDIO_S0
DY R416 5V_S0
21 AC97_BITCLK_SB 1 R418 2 AC97_BITCLK_ALL 2 1
33R2 0R2-0
1
3D3V_S0
1
U52 R447
5 VCC 1 BITCLK_BUFF C611 28K7R2F
A
SC22P50V2JN-1
2
2 AC97_RST#
2
B
U55
D
24 AC97_BITCLK 1 R417 2 4 Y GND 3 1 SHDN# SET 5 5VA_SET D
33R2
33 VREFOUT1 5V_AUDIO_S0
NC7SZ08-U 2 GND
1
R419 SB 0219 C610 3 4
10KR2 IN OUT R446
1
SC1U10V3KX
G923-330T1U-1 10KR2F-U
DY
1
2 C613
2
SC10U10V5ZY
2
VREFOUT2 AUD_AGND
ADAF2 5V_AUDIO_S0 3D3V_S0
ADAF1 AUD_AGND
VREFOUT1
CODECVREF
1
C614 C617 DY
1
C616 C615 C602
1
SCD1U
SCD1U
C940 C941 C943 C942 C944 C945
2
C939 SCD1U SCD1U SCD1U
2
SC1000P50V2KX
SC1000P50V2KX
SC1U10V3KX
SCD1U
SCD1U
SCD1U
SC10U10V5ZY
2
2
DY DY
AUD_AGND
29
30
31
32
27
28
34
33
40
38
25
9
1
U98
C C
VRDA
VREF
AFILT1
AFILT2
VREFOUT
FRONT-MIC
VRAD
NC#33
NC#40
AVDD
AVDD
VDD
VDD
0R0402-PAD
14 2 XTALIN_CODEC 1 R689 2 CLK14_AUDIO 3
AUX-L XTL-IN
15 AUX-R XTL-OUT 3
0R0402-PAD
16 48 SPDIF_OUT 1 R449 2 SPDIF 33,57
JD2 SPDIFO
17 JD1/GPIO1 SPDIFI/EAPD 47 EAPD 33
C920 1 2 AUDLINL SC 0308
33 AUD_LINL C910
1
33 AUD_LINR C946 1 2 SC1U10V3KX AUDLINR
SC1U10V3KX 39 8 AC97_DATIN 1 2 EC5
SURR-OUT-L SDIN
SC1000P50V2KX
41 5
2
SURR-OUT-R SDOUT
33 AUD_LOL SC22P50V2JN
33 AUD_LOR 2 R690 1 AC97_DIN0 21
23 45 22R2
LINE-L JD0/GPIO0 AC97_DOUT 21,22,24
1
24 LINE-R XTLSEL 46 1 R450 2

C937 C938 0R0402-PAD
SC1000P50V2KX SC1000P50V2KX SC 0308 XTSEL HI: USE 24.576M XTAL
2
35 6 AC97_CBITCLK 2 R415 1 BITCLK_BUFF

AUD_AGND AUD_AGND 36
FRONT-OUT-L BITCLK
10 33R2 XTSEL LOW: USE 14.318M CLK FROM CLK GEN
FRONT-OUT-R SYNC R414 2
1
10KR2
DY
33 AUD_MICIN 2 1 C923 AUD_MICIN1 21 MIC1 RESET# 11 AC97_SYNC 21,24
SC1U10V3ZY 22
MONO-OUT-R
MIC2 AC97_RST# 21,24

CEN-OUT
PC-BEEP
LFE-OUT
CD-GND
B B
PHONE
AGND
AGND
CD-R
CD-L
GND
GND
ALC655-U
18
20
19
37
43
44
12
13
26
42
4
7
25 CD_AUDL 1 R700 2 CDAUDL 1 2 C924 CDAUD_L

75R2F SC1U10V3KX 1 R691 2 4K7R2 2 1 C911
AUD_AGND SC4D7U10V5ZY CB_SPKR 26
R451
25 CD_AGND 1 2 CDAGND 1 2 C925 CDAUD_GND
SC1U10V3KX AUD_PC_BEEP 2 1 C921 AUD_SYS_BEEP 1 R692 2 4K7R2 2 1 C912 G105 GAP-CLOSE
SCD1U SC4D7U10V5ZY SPKR_SB 21
GAP-CLOSE-PWR 2 1
25 CD_AUDR 1 R699 2 CDAUDR 1 2 C922 CDAUD_R
1
1
75R2F SC1U10V3KX 1 R693 2 4K7R2 2 1 C913 G106 GAP-CLOSE
KBC_BEEP 34
1
C926
SC2200P50V2KX R701 SC4D7U10V5ZY 2 1
R704 R703 R702 2K2R2
2
100KR2 100KR2 100KR2 G107 GAP-CLOSE

2 1
2
2
G108 GAP-CLOSE
2 1
AUD_AGND AUD_AGND
AUD_AGND
SC 0308
AUD_AGND
A <Variant Name> A
Wistron Corporation
Title
AUDIO (1/2) -- CODEC ALC655
A3 -1
Bolsena
5 4 3 2 1
A B C D E
5V_S0 5VA_OP_S0
1
G43
2
ALL AUD_AGND -> AMPGND SB 0203
G109 GAP-CLOSE
Internal Speaker
2 1
GAP-CLOSE-PWR SPK1
1
G110 GAP-CLOSE SPKR_L- 5
C612 1 2 C634 2 1 4
SC4D7U10V5ZY SPKR_L+ 3
2
SC220P50V2KX-U G111 GAP-CLOSE 2
2 1 SPKR_R+
AMPGND C636 1
1 2CSOUTL1 1 R479 2 HP_L 1 R478 2 G112 GAP-CLOSE SPKR_R- 6
10KR2 10KR2 2 1
1
SC2D2U16V5ZY ETY-CON4-S
C637 C638 C640 C639 20.D0122.104
SC680P50V2KX
SC680P50V2KX
SC680P50V2KX
SC680P50V2KX
4 AMPGND 4
2
SC 0308 2ND : 20.D0012.104
1 2 C632
SC220P50V2KX-U
C952 ME : 20.D0122.104
32 AUD_LOL 1 2CSOUTL2 1 R719 2 L_LINE_IN 1 R718 2
15KR2F 18KR2F D22 2ND : 20.D0012.104
SC2D2U16V5ZY 3 4 DOCK_JACK_IN 57
U57
SC 0309
5VA_OP_S0 4 3 SPKR_L+ 2 5 SYS_LOUT_IN
HP_L LLINEIN LOUT+ SPKR_L- SPKR_L+
5 LHPIN LOUT- 10 1 R477 2 SPKR_L_DOCK 57
L_BYPASS 6 0R2-0
LBYPASS HP_IN SPKR_R+
7 LVDD SE/BTL# 14 1 6 ENAUDIO# 37 1 R473 2 SPKR_R_DOCK 57
16 0R2-0
HP/LINE# AUD_MUTE
8 11 RB731U
SHUTDOWN MUTEIN
1
1
C951 C950 C633 HP_IN_1
2 TJ MUTEOUT 9
R454
Dummy when no EZ4
17 HP-IN GND/HS 1
SC1U10V3KX
100KR2
SCD1U
SC10U10V5ZY
AMPGND 23 12
2
VOL GND/HS 5VA_OP_S0

13
5VA_OP_S0 18
GND/HS
24
LINE IN/MIC IN
2
R_BYPASS RVDD GND/HS SC 0309
19 RBYPASS
1
2 HP_R 20 RHPIN ROUT- 15 SPKR_R-
SPKR_R+ AMPGND
Dummy when no EZ4 R466
MIC_JKIN#_1
21 22
GND
RLINEIN ROUT+
100KR2
R458 By GMT suggest. DOCK_LIN_R 57
1
AMPGND 10KR2 DOCK_LIN_L 57
Change from
1
G1421BF3U C647 LIN1
25
2
74.01421.01G C645 R487
SC1U10V3ZY
21
SC1U10V3ZY
5
2
E Q21 to 74.01421.A1G 1KR2
2
PDTA124EU 4
B
1 AMPGND 3
3
34 AMP_SHUTDOWN AMPGND 1 R486 2 AUD_LINE_R 3
32 AUD_LINR
1
C 1KR2 6
R457
10KR2 1 R484 2 AUD_LINE_L 2
3
32 AUD_LINL 1KR2
DY
1
1
R485
R488
C648 1
2
1
AMPGND C627 C646
SC100P50V2JN
CSOUTR1
1 R455 R_LINE_IN R471 2 EC8 EC7 AUDIO-JK30-U
SC100P50V2JN
1 2 2 1
SC330P50V2KX
15KR2F 18KR2F
SC330P50V2KX
10KR2
10KR2
AMPGND 22.10088.571
2
SC2D2U16V5ZY 1 2 C630
2
2
SC220P50V2KX-U
AMPGND
C626 R472 22.10271.011 - 2ND
32 AUD_LOR 1 2 CSOUTR2
1 2 HP_R 1 R470 2
10KR2 10KR2
AMPGND
SC2D2U16V5ZY 1 2 C628 ME : 22.10088.571
SC220P50V2KX-U
HP_IN_1 2ND : 22.10271.011
SC 0309 5VA_OP_S0 SYS_LOUT_IN#=LOW after PLUG-IN
LINE OUT
1
R456 ME : 22.10133.561
R_BYPASS
L_BYPASS 2ND : 22.10257.001
GAP-CLOSE SB 0127 2ND : 56.1549C.011
1
1
1
C635 C629 R732 R489

2K2R2 10KR2
SC4D7U10V5ZY
SC4D7U10V5ZY
2
2
AMPGND 3D3V_S0
2
2
AMPGND AMPGND SYS_LOUT_IN LOUT1
9
3
GND
8 VCC
32,57 SPDIF 7 VIN
Q33
79.10711.4C1 SB 0127
16
6
K 22 TC30 SYS_LOUT_IN# 5
2 SYS_LOUT_IN# SE100U10VM 4
2 DTC124EUA-U1 SPKR_L+ 1 2 SPKR_L+1 1 R492 2 SPKR_L_A1 2 2
22R2 3
SPKR_R+ 1 2 SPKR_R+1 1 R490 2 SPKR_R_A1 1
K 22 22R2
1
SB 0127 MINDIN10-1-U2
TC29 SE100U10VM R493R491 1ST CHANGE TO 22.10147.031 - 22.10251.031 2ND
1
1
1KR21KR2 C650 C649 EC6 EC9
79.10711.4C1 22.10257.001
SC680P50V2KX
SC680P50V2KX
SC330P50V2KX
SC330P50V2KX
AMPGND
AMPGND
2
2
AMPGND
Dummy when 'USE EZ4'
1 R467 2
0R2-0
SYS_EXT_MIC_IN 3 1 1 R452 2AUD_LINE_L

LEVEL SHIFT 300R2F
SB 0201
Internal Mic
22 K
5V_AUDIO_S0
22 K
MIC_JKIN# 37 INT_MIC_IN
5V_AUDIO_S0 MIC1
SC 0309 3
1
close to diode INT_MIC 1
3
SB 0201 R453 2
2
2
Q23 SC 0308 10KR2 Q22 4
DTC124EUA-U1 R445 DTC124EUA-U1 C1
Dummy when no EZ4 10KR2 R764 0R2-0 D21 CON2-10-U2
1
SC1000P50V2KX
2 1MIC_JKIN#_1 2 22 K ME : 20.D0012.102
DY 3 2 LOW OFF 20.D0012.102
2
5V_S0
1 SB 0204
32 VREFOUT1
34 KBC_MUTE
2
BAW56-1 22 K 1 R751 2 0R3-U

C631
14
10
2
SC4D7U10V5ZY Q20
1
1
3
1 U2C R475 DTC124EUA-U1 1

3 9 8 AUD_MUTE 2K2R2 AMPGND
BAT54C-U
<Variant Name>
U56
2
1 R468
2 SYS_EXT_MIC_IN 22 K
1
TSAHCT125 32 AUD_MICIN 0R0402-PAD 2

32 EAPD 2 R459 1 1 R469
2 INT_MIC_IN
57 DOCK_MIC_JKIN
Wistron Corporation
1
0R0402-PAD 0R0402-PAD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
1 R476 2 DOCK_EXT_MIC 57
SC 0308 R460 C625 0R0402-PAD 22 K
10KR2 SC3300P50V2KX Title
2
AUDIO (2/2)
2
AMPGND
Dummy when no EZ4 Size
Custom
Document Number Rev
Bolsena -1
AMPGND
A B C D E
5 4 3 2 1
3D3V_AUX_S5 KCOL[1..16] 35 5V_S0

KROW[8..1] 35 3D3V_AUX_S5
KBC_XO 1 2 C125
3D3V_AUX_S5 SC8D2P50V2CC
1
1
L3 3D3V_S0
3
C723 C124 C228 C153 C127 C152 1 2 3D3V_KBC_AUX_S5
3
4
2
1
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
SCD1U16V
BLM11P600S X6 RN103 RN102
2
BAT_SDA_5
BAT_SCL_5
X-32D768KHZ-12-U
KBC_SDA2
KBC_SCL2
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
2
1
1
C724 KBC_XI 1 2 C126 SRN10KJ
C709 SC8D2P50V2CC SRN10KJ U72 2N7002DW
2
1
3
4
SCD1U16V SCD1U16V
123
136
157
166
161
153
154
163
164
169
170
160
158
KBC_SCL2
16
34
45
95
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
71
72
73
74
77
78
79
80
D
23 SMBC_G792 4 3 D
U20 SMBC_G792
KBC_SCL2 5 2 SMBD_G792
VCCA
XCLKI
VCCBAT
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
SCL1
SDA1
SCL2
SDA2
XCLKO
VCC
VCC
VCC
VCC
VCC
VCC
VCC
KBC_SDA2
KBC_SDA2 6 1 SMBD_G792 23
18,37 LPC_LAD[0..3]
LPC_LAD0 15 155
LPC_LAD1 LAD0 GPIO29 MATRIXID2# 36 3D3V_AUX_S5
14 149
LPC_LAD2 13
LAD1
LAD2
KB Matrix GPIO28
GPIO27 148
MATRIXID1# 36
PRE_CHG 47
LPC_LAD3 10 119
LAD3 LPC GPIO26 BLT_BTN# 35
2
GPIO25 118 CHG_ON# 47
9 109 R148
18,37 LPC_LFRAME# LFRAME# GPIO24 A20 AD_OFF 48 3D3V_AUX_S5
18,22 CLK33_KBC 18 LCLK GPIO23 108 100KR2
7 107 E51TXD TP19 TPAD28 TP20 TPAD28
18,26,37 P_SERIRQ SERIRQ GPIO22 E51RXD TP21
106
1
GPIO21 E51CS#
GPIO20 105
KBCBIOS_RD# 150 86 3D3V_S0 SD 0324
36 KBCBIOS_RD# KBCBIOS_WE# RD# GPIO19 TP116 STDBY_LED# 17
36 KBCBIOS_WE# 151 WR# GPIO18 85
KBCBIOS_CS# 173 75 INTERNET# 35 RN104
36 KBCBIOS_CS# MEMCS# GPIO17
2
152 IOCS# GPIO16 70 MAIL# 35 48 BAT_SCL_5 2 3
TP15 69 PM_SLP_S5# 21,44,57 R562 1 4
36 KBC_D[0..7] GPIO15 48 BAT_SDA_5
KBC_D0 138 63 4S1P_I 47 1KR2
KBC_D1 D0 GPIO14
139 D1 GPIO13 62 1 R737 2 DY PM_SUS_STAT# 21,37 SRN8K2J
KBC_D2 140 55 2 1 0R2-0 SB 0128 SB 0213
PE_REQ1# 57
1
KBC_D3 D2 GPIO12 R563 10KR2 EZIN_EM#
141 D3 GPIO11 54 CAP_LED# 17 1 R166 2 100KR2
KBC_D4 144 48 FRONT_PWRLED# 17
KBC_D5 D4 GPIO10 R560 2 1KR2
145 22 1 EZ_PWROK 57 USB_PWR_EN#1 R731
KBC_D6 D5 GPIO09 2 100KR2
146 D6 GPIO08 21 KBC_MUTE 33
C KBC_D7 147 20 KEY5# 35
C
D7 GPIO07 FAN3FB DY
GPIO06 12
124 11 FAN3PWM SB 0201
36 A0 A0 X-bus GPIO05
36
36
36
A1
A2
A3
125
126
127
A1
A2
A3
ROM KB3910 GPIO04
GPIO03
GPIO02
8
6
5 2
KBCRST#
1
R738 10KR2
WIRELESS_BTN# 35
KA20GATE 21
2 1
R126 10KR2 KBRCIN# 21 PRE_CHG
2
36 A4 128 A4 GPIO01 4 KEY4# 35 EZ_PWROK
131 3 SB
36 A5 A5 GPIO00 BAT_THERMAL 47,48 SB 0201 R555
2
36 A6 132 A6 10KR2
36 A7 133 A7 GPIO0F 41 EZIN_EM# 57 100K PULL 3.3V R561
143 28 1 R740 2 1KR2 ECSMI#_KBC 21 1MR2
36 A8 A8 GPIO0E AT EZ4 SIDE
1
36 A9 142 A9 GPIO0D 27 WIRELESS_EN 31
36 A10 135 A10 GPIO0C 25 PM_CLKRUN# 18,26,29,31,37
SB 0201
1
36 A11 134 A11 GPIO0B 24 FPBACK 17
36 A12 130 A12 GPIO0A 23 NUM_LED# 17
36 A13 129 A13
121 98 3D3V_S5
36 A14 A14 GPIO1F BLUETOOTH_EN 24
36 A15 120 A15 GPIO1E 97 DC_BATFULL# 17
1
36 A16 113 A16 GPIO1D 94 BLT_LED# 17
112 93 WLAN_TEST_LED 31 R102
57 PS2_MDAT 36 A17 A17 GPIO1C 100KR2
57 PS2_MCLK 36 A18 104 A18 GPIO1B 92 MAIL_LED# 17
103 91 C123
57 PS2_KDAT A19 GPIO1A CHARGE_LED# 17
2
57 PS2_KCLK VCC3VSB
SC1U10V3ZY
GPIOI2D 168
5V_S0 117 175
35 TDATA_5 PSDAT3 GPIO2F
1
RN27 SRN47-1
35 TCLK_5 116 PSCLK3 GPIO2E 171 AMP_SHUTDOWN 33
8 1 4 5 115 165 KBC_PCIRST# 1 R103 2
7 2 3 6 114
PSDAT2 PS/2 GPIO2C
162 0R0402-PAD
LPC_RST# 13,18,37
BL_ON 13,49
2
PSCLK2 GPIO2B
6 3 2 7 111 PSDAT1 GPIO2A 156 CHK_PW# 36
B B
5 4 1 8 110 PSCLK1
SRN10K-2 RN26 3D3V_S5
5V_S0
BATGND
ECRST#
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7
ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
AGND
RN105 3D3V_AUX_S5
GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
1 4 TDATA_5
2
2 3 TCLK_5
KB3910SF
43
40
39
38
37
36
33
32
2
26
29
30
44
76
172
176
99
100
101
102
1
42
47
174
81
82
83
84
87
88
89
90
19
31
96
159
17
35
46
122
137
167
1
SRN10KJ CHANGE TO 71.03910.B0G
22 K
KBC_BB_ENABLE# R167
3D3V_AUX_S5
22 K
10KR2
BRIGHTNESS_DA
GMODULE_RST#
AC_VOL_SENSE
SC 0308 3D3V_AUX_S5
RSMRST#_KBC
BRIGHTNESS_PWM
1
BAT_SENSE
2
EC_RST#
KBC_PME#
SB 0201 R146 KBC_PME# 1 3

32 KBC_BEEP TP118 TP119 TP25 TP120 PME#_SB 21,29
1
10KR2
1
R134 R741 2 1KR2

AD_IA
21 ECSWI# 1 Q8
R133 R132 R124 1 R742 2 ECSCI#_KBC 21
2
10KR2 10KR2 R125 1KR2 DTC124EUA-U1
DUMMY-R2
1 R168
DUMMY-R2
DUMMY-R2
DY AD_IA 47 2 DY
DY SB 0201 0R2-0
KBC_BB_ENABLE# 36
2
1
A1
2
21 PM_PWRBTN#
2
A4 C198
A5 21,46 RSMRST#_KBC AD+ BT+ Q6 R145
SC10U10V5ZY
1 2 1 RSMRST# 23
2
FAN3PWM 23 S5_ENABLE CH3906 10KR2
17 BRIGHTNESS 1 R745 2
FAN3FB 0R0402-PAD
3
1
1
1
R599 R602
18,21,38,39,43,44,55,57 PM_SLP_S3#
1
R131 R130 R129 R128 100KR2F 560KR2F

A <Variant Name> A
10KR2 R127 35 KBC_PWRBTN#
DUMMY-R2
DUMMY-R2
10KR2 10KR2 47 AC_IN#

2
35 KBC_LID# AC_VOL_SENSE
Wistron Corporation
2
21 KBC_SLP_WAKE BRIGHTNESS 1 R746 2 0R2-0 DY BAT_SENSE

2
SB 0201 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

13 GMODULE_RST#
1
SC 0307
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable R600 R601 Title
A4 for DMRP==>High=Disable,Low=Enable 13K3R2F 100KR2F
A5 for EMWB==>High=Enable,Low=Disable 24 USB_PWR_EN# KBC KB3910
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) Size Document Number Rev
2
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended) SB 0201 A3

Bolsena -1
5 4 3 2 1
A B C D E
POWER BUTTON 3D3V_AUX_S5

Power Cover Up Switch 3D3V_S5
1
PWRBTN#_1
1
1 PWR1 2 R11
10KR2 R23
5 47KR2
SB 0204
2
3 4 PWRBTN#_1 1 R12 2 KBC_PWRBTN# 34 LID1
2
SW-TACT-34-U2 470R2 3
1
34 KBC_LID# 1 R24 2 LID_SW 1
62.40009.241 C8 100R2F 2
1
SCD1U 4
2
4 ME : 62.40009.241 C15 4
SC1000P50V2KX CON2-10-U2
2
(ALL 11 PCS) 20.D0012.102
3D3V_S5
Buttons ME : 20.D0012.102
1R754 2 10KR2 MAIL#_1 1 R47 2 470R2 5V_S0

1R753
1R755
2
2
10KR2
10KR2
KEY4#_1
KEY5#_1
1
1
R46
R45
2
2
470R2
470R2
MAIL# 34
KEY4# 34
KEY5# 34
TOUCH PAD
1R756 2 10KR2 INTERNET#_1 1 R44 2 470R2 5V_S0
INTERNET# 34
1
2
RN35 TPAD1
4
3
2
1
1
SB 0204
RC1 C347 C350
Mail Internet P1 P2 SRC100P50V-U SCD1U SC1U10V3KX
2
SRN10KJ MLX-CON12-7
14
5
6
7
8
4
3
MAIL#_1 INTERNET#_1 KEY4#_1 KEY5#_1 12
1 MAIL1 2 1 NET1 2 1 P1 2 1 P2 2 11
34 TDATA_5 1 R219 2 100R2F TP_DATA 10
5 5 5 5 34 TCLK_5 1 R218 2 100R2F TP_CLK 9
TP_SCROLL_UP 8
3 4 3 4 3 4 3 4 1 SCRL1 2 C348 C349 7
SW-TACT-34-U2 SW-TACT-34-U2 SW-TACT-34-U2 SW-TACT-34-U2 TP_RIGHT
SC47P50V2JN
SC47P50V2JN
6
1
5 TP_SCROLL_RIGHT 5
62.40009.241 62.40009.241 62.40009.241 62.40009.241 TP_SCROLL_UP 4
3 4 TP_SCROLL_LEFT 3
2
3 SW-TACT-34-U2 TP_SCROLL_DOWN 2 3
62.40009.241 TP_LEFT 1
13
BlueTooth ON/OFF Wireless ON/OFF TP_SCROLL_LEFT TP_SCROLL_RIGHT SB 0127
1 SCRL2 2 1 SCRL3 2
BLUE2 WLAN1 ?ESD ?

BLT_BTN#_1 WIRELESS_BTN#_1
5 5 20.K0063.012
1 2 1 2 ME : 62.40082.081
(2 PCS) 3 4 3 4 ME : 20.K0063.012
3 4 3 4 SW-TACT-34-U2 SW-TACT-34-U2
PUSH-SW89 PUSH-SW89
WIRELESS_BTN# SC 0310 62.40009.241 62.40009.241
BLT_BTN# TP_SCROLL_DOWN TP_LEFT TP_RIGHT
1
1 SCRL4 2 1 LEFT1 2 1 RIGHT1 2

C642 C643
SCD1U SCD1U SC 0310 3D3V_S5 5 5 5
2
RN81
SRN10KJ 3 4 3 4 3 4
1 R482 2 470R2 WIRELESS_BTN#_1 1 4 SW-TACT-34-U2 SW-TACT-34-U2 SW-TACT-34-U2
34 WIRELESS_BTN# 1 R481 2 470R2 BLT_BTN#_1 2 3
34 BLT_BTN# 62.40009.241 62.40009.241 62.40009.241
EMI Bypass cap.

Internal KeyBoard CONN KROW[8..1] 34
KCOL[1..16] 34 TP_RIGHT
EC13
1 2
SC1000P50V2KX
RC7
2 KROW7 2
Pin1 ==>*R01 1 8
Pin2 ==>*R02 KCOL11 2 7 DY
KB1 KCOL12 3 6 EC14 SC1000P50V2KX
1 25 26
Pin3 ==>*R03 KROW8 4 5 TP_SCROLL_RIGHT 1 2
NC#26 KROW1 Pin4 ==> C01
C01 1
........ 2 KROW2 Pin5 ==> C02 SRC100P50V-U
C02 KROW3
3 Pin6 ==> C03 RC5 DY
C03 KCOL1 KCOL5
R01 4 1 8
5 KCOL2 Pin7 ==>*R04 KCOL6 2 7 EC15 SC1000P50V2KX
R02
R03 6 KCOL3 Pin8 ==> C04 KCOL7 3 6 TP_SCROLL_UP 1 2
7 KROW4 Pin9 ==> C05 KCOL8 4 5
C04 KCOL4
R04 8 Pin10 ==> C06
9 KCOL5 SRC100P50V-U DY
R05 KCOL6 Pin11 ==> C07 EC16 SC1000P50V2KX
10 RC4
R06 KCOL7 KCOL2 TP_SCROLL_LEFT
R07 11 Pin12 ==> C08 1 8 1 2
12 KCOL8 Pin13 ==> C09 KCOL3 2 7
R08 KCOL9 KROW4
R09 13 3 6
14 KROW5 Pin14 ==>*R05 KCOL4 4 5
C05 DY
15 KCOL10 Pin15 ==> C10 EC17 SC1000P50V2KX
R10 KROW6 TP_SCROLL_DOWN
16 Pin16 ==>*R06 SRC100P50V-U 1 2
C06 KROW7
17 Pin17 ==>*R07 RC6
C07 KCOL11 KCOL9
R11 18 1 8
19 KCOL12 Pin18 ==> C11 KROW5 2 7
R12 DY
C08 20 KROW8 Pin19 ==> C12 KCOL10 3 6 EC18 SC1000P50V2KX SB 0203
21 KCOL13 Pin20 ==>*R08 KROW6 4 5 TP_LEFT 1 2
R13 KCOL14
R14 22 Pin21 ==> C13
23 KCOL15 SRC100P50V-U
R15 KCOL16 Pin22 ==> C14
24 RC3 DY
R16 KROW1
1 NC#25 25 Pin23 ==> C15 1 8 <Variant Name> 1
27 KROW2 2 7
NC#27 Pin24 ==> C16 KROW3 3 6
MLX-CON25 Pin25 ==> NC KCOL1 4 5
Wistron Corporation
SRC100P50V-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
20.K0090.025 RC8 Taipei Hsien 221, Taiwan, R.O.C.
KCOL13 1 8
ME : 20.K0090.025 KCOL14 2 7 Title
KCOL15 3 6
KCOL16 4 5
BUTTONs / KB / TOUCHPAD
SRC100P50V-U A3 -1
Bolsena
A B C D E
5 4 3 2 1
KBC_D[0..7] 34
34 KBCBIOS_WE#
34 KBCBIOS_RD#
34 KBCBIOS_CS#
A18 34
D A17 34 D
3D3V_AUX_S5 A16 34
1
C686 U66
SCD1U16V
32
22
24
31
30
2
2
CE#
OE#
WE#
A18
A17
A16
VDD
34 KBC_D0 13 DQ0 A15 3 A15 34
34 KBC_D1 14 DQ1 A14 29 A14 34
34 KBC_D2 15 DQ2 A13 28 A13 34
34 KBC_D3 17 DQ3 A12 4 A12 34
34 KBC_D4 18 DQ4 A11 25 A11 34
34 KBC_D5 19 DQ5 A10 23 A10 34
34 KBC_D6 20 DQ6 A9 26 A9 34
34 KBC_D7 21 DQ7 A8 27 A8 34
VSS
A0
A1
A2
A3
A4
A5
A6
A7
SST39VF040-70-1
16
12
11
10
9
8
7
6
5
(SOCKET) 62.10002.032 - (IC)72.39040.H03 IN DIP,SMT
C C
34 A0
34 A1
34 A2
34 A3
34
34
A4
A5
ROM SIZE MAX. 512KBYTE
34 A6
34 A7
PLCC32 Socket P/N:

3D3V_S0 SSKT3262.10002.032
3D3V_S0
SSKT32 62.10005.032
2
1
RN30
2
1
B RN29 B
SRN10KJ
SRN100KJ
3
4
3
4
SW1
34 KBC_BB_ENABLE# 1 8
34 CHK_PW# 2 7
34 MATRIXID1# 3 6
34 MATRIXID2# 4 5
SW-2184LPSTR
Keyboard matrix ( from vendor ) <Variant Name>

A A
US Jap Eur Other

Wistron Corporation
Low Bit MATRIXID1# 1 1 0 0
Title
High Bit MATRIXID2# 1 0 1 0 BIOS ROM

A3
Bolsena -1
5 4 3 2 1
PCIRST_BUF#_SIO 2 R63 1 LPC_RST# 13,18,34
18,22 CLK33_SIO 33R2
P_SERIRQ 18,26,34
LPC_LDRQ0# 18
3 CLK14_SIO LPC_LFRAME#_1 1 R62 2 0R0402-PAD LPC_LFRAME# 18,34
LPC_LAD0_1 1 R61 2 0R0402-PAD LPC_LAD0
SC 0308 LPC_LAD1
LPC_LAD2
LPC_LAD[0..3] 18,34
LPC_LAD3
1 2 R106 PM_SUS_STAT# 21,34
DUMMY-R2
C64 SIN1_5 57
C62 CTS1#_5 57
DSR1#_5 57
1 2 1 2 DCD1#_5 57
3D3V_S0
DUMMY-C2 RI1#_5 57
DUMMY-C2 3D3V_S0
LPCPD#
IRSL0_3
IRRX_3
IRTX_3
RP2
1
1 10
2 9 C89 C129 C63 C88
LPCPD# 3 8 SIO_PNF SC1U10V3ZY SCD1U16V SCD1U16V SCD1U16V
2
XFD_INST# U16
88
63
39
14
65
69
68
70
67
66
20
10
11
12
15
16
17
18
57
60
56
55
62
4 7
9
8
7
5 6 ENAUDIO#
IRTX
LCLK
IRRX1
IRRX2_IRSL0
IRSL1
PWUREQ#/IRSL3
LRESET#
SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LPCPD#
SIN1
CTS1#
DSR1#
DCD1#
RI1#
VDD
VDD
VDD
VDD
NC
CLKIN
SRP10K
SC 0310 3D3V_S0
PCB_VER0 3 71 ENAUDIO# 33
PCB_VER1 GPIO00/XD0/JOYABTN1 GPIO37/DR1#/IRSL2/XIORD#
2 GPIO01/XD1/JOYBBTN1 GPIO36/CLKRUN# 6 PM_CLKRUN# 18,26,29,31,34
1
1 GPI002/XD2/JOYAY GPIO35/SMI# 19
33 MIC_JKIN# 100 5 R104
GPIO03/XD3/JOYBY GPIO34/XRD#/WDO# 10KR2
99 GPIO04/XD4/JOYBX GPIO33/XA11/MDTX/XIOWR# 82
98 GPIO05/XD5/JOYAX GPIO32/XA10/MDRX/XIORD# 83 DY !for test, after ok, delete R
97 84
2
GPIO06/XD6/JOYBBTN0 GPIO31/XA9/PIRQD/MTR1#
96 GPIO07/XD7/JOYABTN0 GPIO30/XA8/PIRQC 85
SC 0310 81 61
GPIO10/XA12/RI2#/JOYABTN1 DTR1_BOUT1/BADDR DTR1_BOUT1_5 57
80 GPIO11/XA13/DTR2_BOUT2#/JOYBBTP1 RTS1#/TEST 58 RTS1#_5 57
79 GPIO12/XA14/CTS2#/JOYAY SOUT1/XCNF0 59 SOUT1_5 57
78 4
77
76
75
GPIO13/XA15/SOUT2/JOYBY
GPIO14/XA16/RTS2#/JOYBX
GPIO15/XA17/SIN2/JOYAX
GPIO16/XA18/DSR2#/JOYBBTN0
SIO PC87392 XWR#/XCNF1
XSTB1#/XCNF2/NC
XCS1#/MTR1#/DRATEO/XIOWR#
90
73
XFD_INST#
74 GPIO17/XA19/DCD2#/JOYABTN0 RDATA# 23
WDATA# 27
WGATE# 26
86 GPIO27/XA7/PIRQB HDSEL# 22
87 GPIO26/XA6/PIRQA/XSTB2# DIR# 29
72 GPIO25/XCS0#/XRDY/DR1# 28
AFD_DSTRB#/DENSEL/DRATE1
STEP#
91 GPIO24/XA4/XSTB0# TRK0# 25
92 GPIO23/XA3 INDEX# 32
93 GPIO22/XA2 DSKCHG# 21
94 GPIO21/XA1 WP# 24
3D3V_S0
SLIN_ASTRB#/STEP#
95 31
BUSY_WAIT#/MTR1#
GPIO20/XA0 MTR0#
DR0# 30
Board Version Setting DENSEL 33
PD4/DSKCHG#
SLCT/WGATE#
ERR#/HDSEL#
34
STB_WRITE#
DRATEO/IRSL2
PD3/RDATA#
PD6/DRATE0
PD0/INDEX#
PE/WDATA#
PD5/MSEN0
PD7/MSEN1
PNF/XRDY#
ACK#/DR1#
PD1/TRK0#
1
INIT#/DIR#
PCB_VER0 PCB_VER1
Ver.
PD2/WP#
R313 R315
10KR2 10KR2
SA 0 0 VSS
VSS
VSS
VSS
SB 0 1
2
PCB_VER0 PC87392-U
89
64
38
13
36
37
40
41
47
49
52
50
48
46
45
44
43
42
51
53
54
35
PCB_VER1
SC 1 0
SIO_PNF
1 1 1
1
R316 R314 STROB#_5 58

10KR2 10KR2 AUTOFD#_5 58
DY ERROR#_5 58
DY
2
SC 0308
EZ4_PD7
Infineon FIR Module
EZ4_PD6
EZ4_PD5 IR1
EZ4_PD[7..0] 58
EZ4_PD4 3D3V_S0 40mil
EZ4_PD3
EZ4_PD2 1
EZ4_PD1 VCC2/IRED_ANODE
2 IRED_CATHODE
1
EZ4_PD0 10mil IRTX_3 3
C860 C864 IRRX_3 TXD
PRINIT#_5 58 10mil 4 RXD
SC1U10V3KX SC4D7U10V5ZY 10mil IRSL0_3 5
SLCTIN#_5 58
2
SD
PRNACK#_5 58 6 VCC1
BUSY_5 58 1 R677 2 IRMODE 7
10KR2 MODE
PE_5 58 8 GND
SLCT_5 58 DY
FIR-TFDU6102
SC 0310
<Variant Name>
Wistron Corporation
Title
SUPER IO NC87392
A3 -1
Bolsena
A B C D E
Run Power
4 4
41 12VGATE_S0
DY C574 SCD1U 5V_S0 5V_S5
U49
DCBATOUT 1 2 1 8
S D
2 S D 7
Q18 3 S D 6
1 R412 2 PM_RUNCTL 2 1 TP0610T 4 5
2
G D
10KR2 D19
1
R409 AO4422
330KR2 C575
1
1 R411 2 PM_RUNCTL_G R413 SCD1U
2
MMGZ5242B
330KR2 47KR2
1
1
DY C601
SCD22U25V5ZY
2
2
R410 SB 0201
1KR2
2
SC 0308 3D3V_S0 3D3V_S5
C452 SCD1U U37
3
D 1 S D 8
1 Q19 1 2 2 S D 7
G 2N7002 3 6
S D
S DY 4 5
2
G D
1
AO4422
18,21,34,39,43,44,55,57 PM_SLP_S3# 1 2 1 Q17 C453
R408 1K5R3 PDTC144EU SCD1U
2
1
2
C600
SC1U10V3KX
SB 0201
2
3 3
2D5V_S0 2D5V_S3
DY C763 SCD1U U76

1 S D 8
1D8V_S0 2D5V_S0 1 2 2 S D 7
D37 3 S D 6
1 2 4 G D 5
1
SB 0201 RB751V-40-U AO4422
C795
SCD1U
2
SB 0201
1D8V_S0 1D8V_S5
DY C401 SCD1U U33

1 S D 8
1 2 2 S D 7
3 S D 6
4 5
2 G D 2
1
AO4422
C402
SCD1U
2
SB 0201
1 <Variant Name> 1
Wistron Corporation
Title
PWR CTL LOGIC / PWR PLANE
A3 -1
Bolsena
A B C D E
A B C D E
Reduce leakage 5V_S5

3D3V_AUX_S5 3D3V_AUX_S5
(WHEN 3D3V_AUX_S5 ON, 3D3V_S0 OFF) U44B
14
U54A U54B
14
14
18,21,34,38,43,44,55,57 PM_SLP_S3# 4
6 1D2V_S0_EN 1D2V_S0_EN 44
R442
1KR2 VRM_PWRGD 5
NB_PWRGD 1 2 NB_PWRGD_N 1 R441 2 3 4 1 2
270KR2F TSAHCT08-U
7
TSLCX14MTC-L-U 73.07408.0JB
7
7
1
4 TSLCX14MTC-L-U 4
1
R443
DY C609 3D3V_S5
SC1U10V3ZY
220KR2J
2
U51C
14
2
?U54 CHOOSE CHEAPER 9
SB_PWRGD IS 35MS 8 1 R406 2 SB_PWRGD 21
10 330R2
AFTER NB_PWRGD 13 ALL_PWROK
1
SD 0324
TSLCX08-U C599
7
DUMMY-C3
2
2D5V_S0 2D5V_S3
1
R345 R346 5V_S5 5V_S5
10KR2 10KR2 5V_S5
U44C
14
U44D
14
2
2
2D5V_S3_PG U41A
14
13
3D3V_S5 11 VDDA_2D5_PG 10
2D5V_S0_PG 12 8 VTT_VDDA_PG 1
SD 0325 SD 0324 9 3 VCORE_EN 41
1
TSAHCT08-U 2
7
R407 C552 C551 TSAHCT08-U
7
3 10KR2 SCD1U SCD1U 73.07408.0JB TSAHCT08-U 3
7
73.07408.0JB
5V_S5 PM_SLP_S3# 73.07408.0JB
2
1D8V_S0_PG DY 5V_S5
1
1D8V_S0_PG# 1 Q16
PDTC144EU SB 0201 R348
1
10KR2
2
R369 C570
4K7R2 SCD1U SB 0201
2
2
DY 5V_S5 1D25V_S3_PG
2
1
DY
1 R347 2 1D25V_S3_PG# 1 Q15 C554
DY 1D8V_S0 4K7R2 PDTC144EU SC1U10V3KX
2
1
1
DY
2
C553 C571
2
SCD1U SCD1U DY
2
R371 R373 DY
1MR2 0R2-0 U48 DY
DY DY
5V_S5 1 8 1D25V_S3 SB 0201
1
1D8V_S0_FB 1OUT VCC

2 1IN- 2OUT 7
1 R370 2 1D8V_PG_SET 3 6
27KR2F 1IN+ 2IN- R376 2
DY DY 4 GND 2IN+ 5 1
1
1
1MR2
DY R372 C572
10KR2 DY SC1U10V3KX
LM393ADR
2
2 2
2
5V_S5 DY
DY 1 R374 2 1D25V_PG_SET
47KR2
1
DY R375
10KR2
DY
2
3D3V_S5
SC 0307 U51D
14
5V_S5
13 ALL_PWROK 12
11 NB_PWRGD 13
1D8V_S0_PG 13
5V_S5
U41B 5V_S5 TSLCX08-U
14
7
U41C
14
VTT_VDDA_PG U41D
14
4
6 VTT_1D2V_PG 13
PM_SLP_S3# 5 11 VTT_VRM_PG 10
12 8 ALL_PWROK ALL_PWROK 13
TSAHCT08-U 9
7
TSAHCT08-U
7
73.07408.0JB TSAHCT08-U
1 <Variant Name> 1
7
73.07408.0JB
21,41 VRM_PWRGD VRM_PWRGD 23 RUNPWROK

Wistron Corporation
Title
POWERGOOD&ENABLES
Custom -1
Bolsena
A B C D E
A B C D E
CPU_CORE 5V_AUX_S5
MAX1544ETL DCBATOUT
INPUT
5V_AUX_S5
VID Setting Output Signal AUX_SD OUT
VID0_PWM SD
VID0(I / 3.3V) MAX1544_VRM
VROK()
VID1_PWM
VID1(I / 3.3V) LP2951ACM
4 VID2_PWM 4
VID2(I / 3.3V)
1D25V_S3
VID3_PWM 2D5V_S3
VID3(I / 3.3V) VIN
Output Power TI TPS5130
VID4_PWM 5V_S5 1D25V_S0
VID4(I / 3.3V) VCC_CORE_S0(Imax=27.3A) 2D5V/1D2V/1D8V VCNTL VOUT
VCC_CORE_PWR(O)
APL5331_1D25V_VREF
VREF
Input Signal Output Signal
APL5331KAC
Input Signal FOR
PM_SLP_S5# FAN5234_VGA_Core
VCORE_EN SS_STBY1(I / 5V) 2.5V
EN (I / 3.3V) Pull High (5V) 1D15V or 1D20V
1D2V_S0_EN FOR PGOUT(OD / 5V)
SS_STBY2(I / 5V) 1.2V
Voltage Sense S5PWR_ENABLE Input Power Output Power
SS_STBY3(I / 5V) FOR
COREFB 1.8V 5V_S0
VSEN(I / Vcore) VCC 1D15V (5.2A)
1D15V (O) or
COREFB# or
RGND(I / Vcore) GND STBY_LDO(I / 5V) DCBATOUT 1D20V (9A)
Output Power VIN 1D20V (O)
3 3
Input Power
DCBATOUT_5130 2D5V (9A)
DCBATOUT STBY_VREF5(I / 28V) 2D5(O)
VCC(I) Input Signal
DCBATOUT_5130 PM_SLP_S3#
5V_S0 STBY_VREF3.3(I / 28V) 1D2V (5A) EN
VCC(I) 1D2V(O)
3D3V_S0 Output Signal

VCC(I) Input Power 1D8V (5A)
1D8V(O) PG
DCBATOUT
VIN (I / 28V)
5V_S5 LDO(O)
REG5V_IN(I / 5V) Adapter
Max1999 5V_AUX_S5
5V_AUX_S5 Input Signal Output Signal AD_IN
5V/3D3V AD_OFF
(I) (O)
5V_S0
2
For PGOUT 2
Input Signal Output Signal
Input Power Output Power
SHUTDOWN_S5 PGOOD(OD / 5V) MAX1999_PGD Charger_Max8725 AD_JK AD+
ON3 VCC(I) VCC(O)
5V_AUX_S5
SHUTDOWN_S5 Input Signal Output Signal VCC(I)
ON5 CHARGE_OFF AD_IN
CLS (I / 3.3V) LDO (O / 5.4V)
Output Power
DCBATOUT BT_TH
SHDN# THM (I / 3.3V) CHARGE_LED#
XTAL2/PB4 (O/5V)
5V_S5 (6A) BAT+SENSE
PM_SLP_S3# 5V(O) BATT (I / 3.3V)
SKIP# XTAL1/PB3 (O/5V) BL2#
BT_SCL_5
SCL (IO / 5V)
3D3V_S5 (4A)
3D3V(O) BT_SDA_5
Input Power SDA (IO / 5V)
Output Power
FLASH_GPIO1 DCBATOUT
MAX1999_LDO5 (30mA) RESET#/PB5 (I/5V) VCC (O)
DCBATOUT LDO5(O)
V+ FLASH_GPIO2
1 PB0/MOSI/AIN0 BT+ <Variant Name> 1
VCC (O)
LDO3 (O) MAX1999_LDO3 (30mA) AC_IN
PB0/MOSI/AIN0
Wistron Corporation
Input Power
AD+ Title
DCIN (I) POWER BLOCK DIAGRAM
(Power Team) A3 -1
Bolsena
A B C D E
A B C D E
5V_S0
CPU_VCORE D42
MAX1544_BSTS
VID=1.20V 3
2
1
Iomax=27.3A (35W) DCBATOUT_MAX1544
R245
1 MAX1544_BSTM
10R3 BAW56-1
OCP=40A~45A MAX1544_VCC
2
2
1
4 R237 4
1
C396 R224
MAX1544_V+
0R0603-PAD
SC1U10V3KX
TABLE 1. VOLTAGE IDENTIFICATION CODES 100KR2
VID4 VID3 VID2 VID1 VID0 DAC VCORE_EN 39
2
MAX1544_DHS 42
2
0 0 0 0 0 1.550 MAX1544_V+ SC 0308
1544_AGND
MAX1544_SKIP#
0 0 0 0 1 1.525 MAX1544_CMN 42
MAX1544_VCC
MAX1544_CMP 42
1
0 0 0 1 0 1.500
0 0 0 1 1 1.475 R238 C391 C372 1 R239 2 MAX1544_VCC For Dummy Phase 2
1
12K7R2F
SC2D2U10V5KX
0 0 1 0 0 1.450 0R2-0
SC1U25V-U
DY MAX1544_CSP 42
0 0 1 0 1 1.425 DY MAX1544_CSN 42
2
0 0 1 1 0 1.400
0 0 1 1 1 1.375 U29
10
30
36
18
33
38
37
40
39
6
0 1 0 0 0 1.350
DHS
CMP
CSP
V+
SKIP#
SHDN#
VCC
VDD
CMN
CSN
0 1 0 0 1 1.325
0 1 0 1 0 1.300 SC
0 1 0 1 1 1.275 MAX1544_DLM 42
MAX1544_TIME 1 29 MAX1544_DHM 42
0 1 1 0 0 1.250 2
TIME DLM
28
TON DHM MAX1544_LXM 42,56
0 1 1 0 1 1.225 3 SUS
MAX1544_REF 1 R242 2 MAX1544_OFS 7 27 1 2 C373
0 1 1 1 0 1.200 121KR2F OFS LXM
2 R243 1 MAX1544_REF 8
REF BSTM 26 SCD22U16V3KX-1 MAX1544_BSTM
0 1 1 1 1 1.175 100KR2F MAX1544_CCI 14 R223 2
MAX1544_ILIM
CCI VROK 25 1 3D3V_S0
1
1 0 0 0 0 1.150 100KR2
R240 VID0_PWM 24 VRM_PWRGD 21,39
3 1 0 0 0 1 1.125 60K4R3F VID1_PWM 23
D0 3
D1
1 0 0 1 0 1.100 VID2_PWM 22 D2 CCV 12 MAX1544_CCV
MAX1544_VCC VID3_PWM 21 32
1 0 0 1 1 1.075 MAX1544_DLS 42
2
VID4_PWM D3 DLS
20 D4 LXS 34 MAX1544_LXS 42,56
1 0 1 0 0 1.050 1 R225 2 MAX1544_OVP19 9 MAX1544_ILIM
OVP ILIM
1 0 1 0 1 1.025 1 2 C424 MAX1544_BSTS
100KR2 SCD22U16V3KX-1
1 0 1 1 0 1.000
OAIN+
GNDS
PGND
OAIN-
BSTS
1544_AGND
GND
GND
1 0 1 1 1 0.975 1544_AGND
FB
S0
S1
1 1 0 0 0 0.950
16
17
4
5
15
35
13
31
41
11
1 1 0 0 1 0.925 MAX1544ETL
1 1 0 1 0 0.900
1
MAX1544_OAIN-
MAX1544_OAIN+
MAX1544_FB
MAX1544_BSTS
1 1 0 1 1 0.875 TON: Frequency: R244 C394
1
1 1 1 0 0 0.850 GND 550KHz 1544_AGND 26K7R2F SC270P50V
2
1
1 1 1 0 1 0.825 R241 MAX1544_GNDS
1
REF 300KHz C392 80K6R3F
2
1
1 1 1 1 0 0.800 SC100P C413 C395
SC
2
1 1 1 1 1 Shutdown OPEN 200KHz SCD22U16V3KX-1 SC1000P25V R247

2
1
100R2F
VCC 100KHz
SC SC
1
1544_AGND
2
1
1
1544_AGND C393 R248 1544_AGND
SC470P50V
1544_AGND R246 R228 1MR2
2
511R3F 511R3F COREFB# 6
1544_AGND
2
2
2
1
1
R271
1
2 R749 R227 R226 2
1 2
0R0402-PAD 1KR3F 1KR2F R750 1KR2F MAX1544_CCI For alone test==>short C395 pin1 and pin2
1KR3F
1544_AGND
2
2
MAX1544_CMP
SB SB
2
COREFB 6
12VGATE_S0 38
MAX1544_CSP
U28
1
2N7002DW MAX1544_FB
R230 VCC_CORE_S0
VID0_PWM 1 6 VID0 0R0402-PAD
MAX1544_CMN
2 5 SC 0308
2
MAX1544_CSN
VID3 3 4 VID3_PWM
U27 VCC_CORE_S0 feedback

2N7002DW
6 VID[4..0]
VID1_PWM 1 6 VID1
SC:
1. Change R246 and R228 to 511R3F(64.51105.651).
2 5
2. Change R224 to 26K7R2F(64.26725.6D1).
VID2 3 4 VID2_PWM
3. Cut off a trace between pin7 and pin8 of U29.
<Variant Name>
1 1
Wistron Corporation
1

G
VID4 VID4_PWM Title

From KBC 3 2
2N7002 CPU Vcore 1
D
Q12 Size Document Number Rev

A3 -1
Bolsena
(Power Team) Date: Thursday, March 31, 2005 Sheet 41 of 58
A B C D E
A B C D E
G69 GAP-CLOSE-PWR
1 2
G70 GAP-CLOSE-PWR
1 2
G71 GAP-CLOSE-PWR
C969
1 2
1 2
G72 GAP-CLOSE-PWR SC 0311
1 2 SC1U25V5ZY
G73 GAP-CLOSE-PWR 1 2 C822

4 1 2 SC10U35V0ZY-L VCC_CORE_S0 DY 4
DY
G74 GAP-CLOSE-PWR 1 2 C819
1 2 SC10U35V0ZY-L
1
G75 GAP-CLOSE-PWR 1 2 C820 TC5 TC23 TC7 TC4 TC6 TC8
ST330U3VDM-1-GP
ST330U3VDM-1-GP
ST330U3VDM-1-GP
ST330U3VDM-1-GP
ST330U3VDM-1-GP
ST330U3VDM-1-GP
1 2 DCBATOUT_MAX1544 SC10U35V0ZY-L
DCBATOUT
2
C824
1
C970 2 DUMMY-C3
SB 1
1
SC1U25V5ZY
TC25
2 SE100U25VM-1-U
5
6
7
8
SC 0310 SC 0310
D
D
D
D
SB
SC 0311 AO4422
U100
Panasonic 0.56uH, 10*10*4
G
S
S
S
KEMET 330uF / 3V / 80.3371X.L02
4
3
2
1
DCR=1.6mohm,
Imax=15A(0.56uH), 27A(0.5uH) ESR=9mohm / Iripple=3.7A
VCC_CORE_S0 7.3/4.3/1.9, NT:9.0
41 MAX1544_DHM L33
41,56 MAX1544_LXM 1 2 1 R619 2 D001R7520F
3 3
41 MAX1544_DLM L-D56UH-U
U101
5
6
7
8
1
D
D
D
D
R229
AO4430 0R0402-PAD
Place 0R0402-PAD close to the resistor
2
G
S
S
S
4
3
2
1
SB 0201
MAX1544_CMN 41
MAX1544_CMP 41
2 DCBATOUT_MAX1544 2
SC 0311
5
6
7
8
2 C960
D
D
D
D
1
SC10U35V0ZY-L
AO4422
U99
Panasonic 0.56uH, 10*10*4
G
S
S
S
DCR=1.6mohm,
SB
4
3
2
1
Imax=15A(0.56uH), 27A(0.5uH)
VCC_CORE_S0
41 MAX1544_DHS L34
41,56 MAX1544_LXS 1 2 1 R752 2
D001R7520F
41 MAX1544_DLS L-D56UH-U
1
U102 SB 0203
5
6
7
8
R282
D
D
D
D
0R0402-PAD
AO4430
2
1 <Variant Name> 1
G
S
S
S
4
3
2
1
MAX1544_CSN 41
MAX1544_CSP 41
Wistron Corporation
Title
CPU Vcore 2
(Power Team) A3 -1
Bolsena
A B C D E
A B C D E
SYSTEM DC/DC 1
G36
2
GAP-CLOSE-PWR
1
G98
2
GAP-CLOSE-PWR
3D3V_S5/5V_S5 DCBATOUT 1
G37
2
GAP-CLOSE-PWR
DCBATOUT_MAX1999 5V_DC_S5 1
G101
2
GAP-CLOSE-PWR
5V_S5
G90 G39 G104

1 2 1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR GAP-CLOSE-PWR

4 G89 G38 G103 4
1 2 1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR GAP-CLOSE-PWR

G87 G40 G102
3D3V_DC_S5 1 2 3D3V_S5 1 2 1 2
GAP-CLOSE-PWR DCBATOUT_MAX1999 GAP-CLOSE-PWR GAP-CLOSE-PWR

G92 MAX1999_LDO5 MAX1999_VCC G100
1 2 DCBATOUT_MAX1999 1 R336 2 DCBATOUT_MAX1999_1 1 2
4D7R5
GAP-CLOSE-PWR 1 R360 2 1 2 C556 DCBATOUT_MAX1999 GAP-CLOSE-PWR
G88 10R3 SC1U10V3KX G99
1
1 2 1 2
8
7
6
5
3
U39 C524 C523 78.47522.521
SCD1U
D
D
D
D
SC1U25V5ZY
GAP-CLOSE-PWR GAP-CLOSE-PWR
2
1
G91 G93
1 2 C495 84.04422.037 DY 1 2
1
SCD1U
2
1
1
5
6
7
8
GAP-CLOSE-PWR U50 C577 C557 GAP-CLOSE-PWR
C494 DY AO4422 MAX1999_BST3 MAX1999_BST5 SC4D7U25V6KX-U SCD1U
D
D
D
D
S
S
S
G
D15
2
R680
SC10U35V0ZY-L
2
1
2
3
4
8
7
6
5
1
BAW56-1
1
D
D
D
D
C493 C576
1
SB 0127 R311 R358 SC10U35V0ZY-L
84.04422.037
2
U38 SCD1U SB 0127 C555 AO4422 SB 0127
G
S
S
S
SCD1U
300KR2F
AO4406 U42
20
17
4
3
2
1
84.04406.037 GAP-CLOSE-PWR GAP-CLOSE-PWR
1
SC 0310
S
S
S
G
Iomax=5A
V+
VCC
2
3 3
Iomax=4.0A
1
2
3
4
SB 0202
56 MAX1999_LX3 MAX1999_BST3_1
28 BST3 BST5 14 MAX1999_BST5_1 SC 0310 OCP:8A~10A
OCP:7A~9A MAX1999_LX5 56 Imax=6.0A,
5V_DC_S5
3D3V_DC_S5 MAX1999_DH3 26 16 MAX1999_DH5 DCR=25mohm
L31 DH3 DH5 L32 12*12*3.9
1 2 MAX1999_LX3 27 15 MAX1999_LX5 1 2
IND-6D8UH-14 LX3 LX5 IND-6D8UH-14
1
68.6R810.10A MAX1999_DL3 24 19 MAX1999_DL5 68.6R810.10A

C862 DL3 DL5
Imax=6.0A,
5
6
7
8
1
C521 SC47P50V2JN U46
DCR=25mohm DY 22 21
2
OUT3 OUT5
1
C863 TC28
SC100P50V2JN
D
D
D
D
1
1
TC16 12*12*3.9 MAX1999_LX3_1 7 9 MAX1999_FB5 SC47P50V2JN 80.22715.191
2
FB3 FB5
1
C859 ST150U6D3VDM-9 DY DY C899 ST220U6D3VDM-4

2
SCD1U16V 80.15715.191 R679 44 5130_PGOUT 1 R309

2 0R2-0 MAX1999_LX5_1 SCD1U16V
2
2
R329 2MR2 SC 0308
SC 0308 6K65R2F MAX1999_REF R334 2 AO4422 SC 0308
DY 1 3
G
S
S
S
ON3
1
23,44 S5PWR_ENABLE 0R0402-PAD 4 10 MAX1999_PRO#1 R352 2
2
4
3
2
1
ON5 PRO#
1
1 100KR2 R681 R333 C522 KEMET, NT:8.22
2
NC
1
MAX1999_SHDN# 6 2MR2
KEMET, NT=6.35
SHDN#
DY 15KR2F ESR=25mohm
MAX1999_FB3 SC100P50V2JN Iripple=2.2A
2
ST150U6D3VDM-9
7.3/4.3/1.9
2
80.15715.191 11 MAX1999_ILIM5
ILIM5
1
ESR=40mohm R332 1 R357 2 MAX1999_TON 13

10K2R2F MAX1999_VCC 10KR2 TON
Iripple=1.7A 5 MAX1999_ILIM3 MAX1999_FB5
R356 ILIM3
1 2
7.3/4.3/1.9 DUMMY-R3
2
2 MAX1999_REF MAX1999_PGD R310 2 2

MAX1999_REF 8 REF PGOOD 2 1 MAX1999_LDO5
1
10KR2
1
1
DY Open Drian R353
C520 MAX1999_SKIP# R331 R354 9K76R2F
SCD22U16V3ZY
12 SKIP# GND 23
33KR2F SC
LDO3
LDO5
51K1R2F
2
2
1
Ton = VCC : 200KHz/300KHz R359
2
R682 MAX1999EEI MAX1999_ILIM5_3 1 2
25 MAX1999_VCC
18
Ton = GND : 400KHz/500KHz DUMMY-R3
OCP Setting GAP-CLOSE-PWR
(5V/3D3V) MAX1999_LDO3 MAX1999_LDO5
2
30mA MAX. 30mA MAX.

1
MAX1999_ILIM5_3
C526
1 R335
SC1U25V5ZY
2 5V_AUX_S5
2
0R3-U
MAX1999_SHDN#
DY
1
MAX1999_VCC MAX1999_VCC
1
C525 SB 0201
1
SC1U25V5ZY R678 C861
2
1
100KR2 SCD1U
R350 R355
2
100KR2 100KR2
2
U45 2N7002DW
2
1 6 MAX1999_SKIP# MAX1999_ILIM5
1 <Variant Name> 1
2 5 PM_SLP_S3# 18,21,34,38,39,44,55,57 MAX1999_ILIM3
MAX1999_SKIP 3 4
Wistron Corporation
1
R351 R330 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

10KR2F-U 10KR2F-U Taipei Hsien 221, Taiwan, R.O.C.
Title
2
Max1999 / 3D3V / 5V
Adjust 3V/5V current limit A3 -1
(Power Team) Bolsena
A B C D E
5 4 3 2 1
For 1.8V 1D8V_PWR

TI TPS5130 for 2.5V, 1.2V, 1.8V DCBATOUT DCBATOUT_5130
SETTING=1.8275V Vo=(R1*0.85)/R2+0.85 2D5V_OCP
1 R236 2 1 2 C360 G76
R662 2
680R3F SC5600P50V3KX (2D5V=>CH1 , 1D2V=>CH2 , 1D8V =>CH3) SC R221 DCBATOUT_5130 1 2
1
10KR2F-U 78.56224.2B1
For 1.2V 1D2V_PWR
1
18KR2F
2
GAP-CLOSE-PWR
1 R663 2 SETTING=1.2172V 5130_TRIP1 G82
1
11K5R2F 1 R654 2 1 2 C840 C352 1 2
R652 680R3F SC4700P50V3KX 1 2 OCP
2KR2F 1 R233 2 SCD1U GAP-CLOSE-PWR
D 10KR2F-U 5130_5V_LDO 12A=>R225=18K G78 D
close to IC 1 R653
2 18A=>R225=28K 1 2
close to IC
1 2
4K32R2F
1
GAP-CLOSE-PWR
C383 5130_INV3 R234 5130_5V_LDO G81
1D2V_OCP
2
SC3900P50V3KX 2KR2F D12 1 2
close to IC
2
5130_FB3 R220 DCBATOUT_5130

SC 1 2 GAP-CLOSE-PWR
1 2
83.00054.L03 11K3R2F G80
2
For 2.5V 5130_TRIP2 1 2
2D5V_PWR C378 5130_INV2 C351
SETTING=2.516V SC3300P50V3KX D11 1 2 OCP GAP-CLOSE-PWR
3
1 R232 2 1 2 C374 5130_FB2 BAT54-1 83.00054.L03 SCD1U G77
330R2 SC5600P50V3KX 5130_LH1 BAT54-1 8.4A=>R226=13K 1 2
1 R649 2 SC 0310 10A=>R226=22K
10KR2F-U 78.56224.2B1 close to IC GAP-CLOSE-PWR
3
1 R655 2 Condition Voltage 1 2 C353 5130_LL1 5130_LL1 45,56 G84
1
19K6R3F SCD1U50V3KX
R231
1D8V_OCP 1 2
2KR2F PWM_SEL H : Auto PWM/SKIP 2.2V(Min)~ 5130_OUT1U R222 DCBATOUT_5130 GAP-CLOSE-PWR
5130_OUT1U 45
5130_OUT1D G83
close to IC 5130_OUT1D 45 SC 1
12K1R2F
2
1 2
1 2
* L : PWM fixed (300KHz) ~0.3V(Max) 5130_TRIP3

5130_TRIP1 C359 GAP-CLOSE-PWR
C376 5130_INV1 DCBATOUT_5130 1 2 OCP
SC3900P50V3KX 5130_TRIP2 SCD1U
2
5130_FB1 8.4A=>R229=12.65K
5130_FLT 10A=>R229=22K G79
SB 0201 close to IC 1 2
1
C C375
5130_FLT
5130_INV1
5130_OUT2D 5130_OUT2D 45
GAP-CLOSE
C
SCD01U16V2KX ZZ.CON2C.XX1
2
U26
48
47
46
45
44
43
42
41
40
39
38
37
1 2
T(soft)=1.736ms C377 G113
3D3V_AUX_S5 SC1500P50V3KX C354 1 2
FLT
TRIP1
TRIP2
INV1
LH1
OUT1_U
LL1
OUTGND1
OUT1_D
VIN_SENSE12
OUTGND2
OUT2_D
U88 2N7002DW 5130_LH2 1 2 5130_LL2 5130_LL2 45,56
U54E 5130_3D3V_LDO SCD1U50V3KX GAP-CLOSE
14
TSLCX14MTC-L-U 4 3 5130_SS_STBY1 ZZ.CON2C.XX1

SC 0310 G114
1
11 10 PM_SLP_S5 5 2 1D2V_S0_EN# DCBATOUT_5130 1 2
21,34,57 PM_SLP_S5# R657 5130_FB1 1 36
close to IC
5130_SS_STBY2 6 100KR2 5130_SS_STBY1 FB1 LL2 5130_OUT2U
1 2 SS_STBY1 OUT2_U 35 5130_OUT2U 45 1 2 C355 5130_5V_LDO 5130_3D3V_LDO GAP-CLOSE
5130_INV2 3 34 SCD1U50V3KX ZZ.CON2C.XX1
7
5130_FB2 INV2 LH2 SC 0310

4 33
2
FB2 VIN
1
R658 5130_SS_STBY2 5 32
SS_STBY2 VREF3.3
1
R656 PM_SLP_S3# 1 2 5130_PWMSEL 6 31

C379 100KR2 5130_CT PWM_SEL VREF5 5130_REGIN
7 30 1 R651 2
CT
TPS5130 REG5V_IN 5V_S5
SC4700P50V3KX
DUMMY-R2 8 29 0R0805-PAD
2
GND LDO_IN
1
5130_REF 9 28 5130_3D3V_LDO
2
REF LDO_CUR SC 0308 C357 C356

10 STBY_VREF5 LDO_GATE 27
1 R235 2 STBY_REF 11 26 5V_AUX_S5 SC4D7U10V5ZY SC4D7U10V5ZY
DCBATOUT_5130
2
100KR2 5130_STBY_LDO STBY_VREF3.3 LDO_OUT
12 STBY_LDO INV_LDO 25 78.47593.411 78.47593.411
1 R650 2
LDO SETTING 0R3-U
VIN_SENSE3
3D3V_AUX_S5
PG_DELAY
SS_STBY3
OUTGND3
OUT3_U
OUT3_D
SB 0201
PGOUT
B B
TRIP3
INV3
LH3
FB3
LL3
U54D 5130_CT
14
TPS5130PT-U
13
14
15
16
17
18
19
20
21
22
23
24
9 8 1D2V_S0_EN# C380
39 1D2V_S0_EN SC47P50V2JN
2
78.47034.1F1 5130_SS_STBY3
TSLCX14MTC-L-U 5130_FB3
7
5130_INV3
5130_OUT3D 5130_OUT3D 45
5130_LL3
5130_OUT3U 5130_OUT3U 45
5130_LH3 1 2 C358 5130_LL3 45,56 Condition Voltage
5V_AUX_S5 U89 2N7002DW SCD1U50V3KX
5V_S0 SC 0310
D13 5130_5V_LDO PWM_SEL H : Auto PWM/SKIP 2.2V(Min)~
1 R664 2 TPS5130_1D8V_EN# 3 4
1
100KR2 1
2 5 R660 3 * L : PWM fixed (300KHz) ~0.3V(Max)
5130_PG_DELAY
S5PWR_ENABLE 23,43 10KR2 2

1 6 5130_SS_STBY3 DY 83.00054.L03
DCBATOUT_5130
2
BAT54-1
1
43 5130_PGOUT
C384
84.27002.03F SC1500P50V3KX 5130_TRIP3
2
SB 0201
A <Variant Name>
A
1
C382
SC2200P50V2KX
Wistron Corporation
2
18,21,34,38,39,43,55,57 PM_SLP_S3# 1 R659 2 5130_STBY_LDO 5130_REF DY

0R2-0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

1
DY C381
R661 SC1U10V3ZY SB 0201 Title
2
0R0402-PAD
TPS5130 1D2V/1D8V2D5V/ (1/2)
2
SC 0308 SB 0201 A3
(Power Team) Bolsena -1
5 4 3 2 1
TI TPS5130 for 2D5V, 1D2V, 1D8V
(2D5V=>CH1 , 1D2V=>CH2 , 1D8V =>CH3)
DCBATOUT_5130
2D5V_PWR 2D5V_S3
1
D C839 C841 1
G21
2
D
5
6
7
8
SCD1U SC10U35V0ZY-L SB 0127
2
U91 GAP-CLOSE-PWR
D
D
D
D
AO4422 G27
1 2
Imax=9.3A GAP-CLOSE-PWR
G 2D5V G28
S
S
S
4
3
Rdson=19.6~24mohm 1 2
2
1
5130_OUT1U L28
2D5V_PWR Iomax=9A GAP-CLOSE-PWR
44 5130_OUT1U
44,56 5130_LL1
5130_LL1 1 2 OCP>18A G22
IND-4D7UH-16-GP 1 2
68.4R71B.101
1
GAP-CLOSE-PWR
5
6
7
8
TC13 DY G26
U86 SC 0310 ST330U6D3VDM-7
D
D
D
D
1 2
2
1
AO4422
TC12 SC 0310 GAP-CLOSE-PWR
ST220U4VDM-10 G25
2
SC 0310
KEMET, NTD:10.5 (Q1) 1 2
G
S
S
S
SC 0310 ESR=25mohm GAP-CLOSE-PWR

4
3
2
1
Iripple=2.2A G23
1 2
5130_OUT1D 7.3*4.3*1.9
44 5130_OUT1D
GAP-CLOSE-PWR
G24
DCBATOUT_5130
C 1 2 C
GAP-CLOSE-PWR
1
1
C837 C838
5
6
7
8
SCD1U SC10U35V0ZY-L
2
2
U84 SB 0127 1D2V_PWR 1D2V_S0 1D2V_S0 1D2V_VGA_S0
D
D
D
D
AO4422 G20 G66

1 2 1 2
Imax=9.3A GAP-CLOSE-PWR GAP-CLOSE-PWR

G19
G
S
S
S
Rdson=19.6~24mohm 1 2 G65
4
3
2
1
1D2V_PWR
1D2V GAP-CLOSE-PWR
1 2
L27
44 5130_OUT2U
5130_OUT2U
5130_LL2
Iomax=5A G16 GAP-CLOSE-PWR
44,56 5130_LL2 1 2 1 2
OCP>10A
IND-3D3UH-35 GAP-CLOSE-PWR
Imax=6A G17
5
6
7
8
1 2
DCR=30mOhm
1
U87
D
D
D
D
AO4422 7*7*3.0 TC11 GAP-CLOSE-PWR

ST220U4VDM-10 SB 0127 G18
2
Imax=9.3A 1 2
Rdson=19.6~24mohm GAP-CLOSE-PWR
G
S
S
S
G14
4
3
2
1
1 2
B B
5130_OUT2D GAP-CLOSE-PWR
44 5130_OUT2D
G15
1 2
GAP-CLOSE-PWR
DCBATOUT_5130
1D8V_PWR 1D8V_S5
1
G35
C847 C848 1 2
5
6
7
8
SCD1U SC10U35V0ZY-L
2
U92 GAP-CLOSE-PWR
D
D
D
D
AO4422 SB 0127 G34

1 2
G33
G
S
S
S
Rdson=19.6~24mohm 1 2
4
3
2
1
1D8V_PWR
5130_OUT3U
L29 1D8V GAP-CLOSE-PWR
44 5130_OUT3U
44,56 5130_LL3
5130_LL3 1 2 Iomax=5A G32
1 2
IND-4D7UH-16-GP OCP>10A
5
6
7
8
G31
DCR=40mOhm
1
U93
D
D
D
D
1 2
AO4422 7*7*3.0 TC14
A ST220U4VDM-13 GAP-CLOSE-PWR
<Variant Name>
A
2
G30
Imax=9.3A KEMET, NTD:7.8 (Q1) 1 2
Wistron Corporation
G
S
S
S
Rdson=19.6~24mohm ESR=25mohm GAP-CLOSE-PWR 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4
3
2
1
Iripple=2.2A G29 Taipei Hsien 221, Taiwan, R.O.C.

1 2
5130_OUT3D 7.3*4.3*1.9 Title
44 5130_OUT3D
GAP-CLOSE-PWR
TPS5130 1D2V/1D8V2D5V/ (2/2)
(Power Team) A3 -1
Bolsena
A B C D E
3D3V_G913_S5 3D3V_G913_S5
C965
SC22P50V2JN-1
4 Rx 3D3V_AUX_S5 4
1
1
R761
18KR2F
5V_S5
2
U103 Output = 3.5V
2
output=1.25(1+(Rx/Ry)) 3D3V_AUX_S5
Ra change from 169K to 182K for output = 3.4827V
1 5 3D3V_G913_SET
2
SHDN# SET output=1.235(1+(Ra/Rb))
GND
3 IN OUT 4
1
1 2
C966 C967 R762 R135 182KR2F
1
1
3D3V_G913_S5 D54
SC1U10V3KX
SC1U10V3KX
G913C-U 10KR2F-U D55 Ra
Ry 1 2 2 1 3D3V_AUX_LP2951_S5 1 2 C156 LP2951ACM_FB
2
2
SC330P50V2KX
CH521S-30 CH521S-30 DCBATOUT
U19
1
1 OUT INPUT 8
C155 C154 2 7
SENSE FB
1
SC1U10V3ZY
SCD1U 3 6
2
SD 5V/TAP
1
4 100mA 5 C157 C158
GND ERROR R136 DUMMY-C5 SC1U50V5ZY
2
LP2951ACM 100KR2F 78.10594.411
Rb
2
21,34 RSMRST#_KBC DY
3 3
SD 0303
2D5V_S3
G95 GAP-CLOSE-PWR
1
5V_S5 1 2
C896 C895
SC10U10V5ZY SC10U10V5ZY
1D25V_S3
2
78.10693.411 78.10693.411 G97 GAP-CLOSE-PWR

1
1 2
2D5V_S3 DY C902 Iomax=1.5A
SCD1U
2
Vo(cal.)=1.250V G96 GAP-CLOSE-PWR

1
1 2
R683 1D25V_LDO 1D25V_S3
2 1KR2F U96 2
G94 GAP-CLOSE-PWR
1 4 1 2
2
APL5331_1D25V_VREF VIN VOUT

3 VREF
6 VCNTL NC 8
1
NC 7
1
R684 2 5 TC27 C898

1KR2F C897 GND NC SC22U10V6ZY-L
9 DY SE100U10VM SB 0127
2
SCD1U GND
79.10711.4C1
2
2
APL5331KAC-TR SB 0127 Trace Length=1cm (500mils)

KEMET Trace Width=8mils
SO-8-P 100uF / 4V / B2 Size / NTD:5.615 Trace Resistance>25mohm
Iripple=1.1A / ESR=70mohm
<Variant Name>
1 1
Wistron Corporation
Title
1D2V_S3 / 3D3V_AUX
A3 -1
A B C D E
BT+
DCBATOUT
DY
AD+ U62 Rx D01R2512F-1-GP U35
8 D S 1 AD+_TO_SYS 1 R518 2 1 S D 8
7 D S 2 2 S D 7
D S S D
6 3 For EMI 3 6
1
5 D G 4 4 G D 5
1
R513 C430 R285 DY
1
100KR2F AO4407 SCD1U DUMMY-R3 AO4407 C429
2
C687 U36 SCD1U
2
SC1U50V5ZY SC 0308 1 S D 8
2
G52 G51 2 S D 7
2
MAX1909_ACIN 3 S D 6
AC_IN Threshold 2.089V Max. MAX1909_PDL 4 G D 5
1
Close to GAP-CLOSE-PWR
GAP-CLOSE-PWR
1
AC_IN > 2.089V --> AC DETECT R514 AO4407
13K3R2F MAX1909 pin 24
ACOK is 17.8V
2
R283 DUMMY-R3
D46 1 2 DCBATOUT
1 2 AD+_TO_SYS
AD+
1
CH521S-30
C856 C855
SCD1U SCD1U MAX1909_LDO
2
1
1
C433 Near MAX1909
SCD1U C857
Pin 2
2
1
SCD1U
2
C425 C427 C426
4
3
2
1
2 C434 SCD1U SC10U25V6KX SC10U25V6KX
MAX1909_DHIV
1
2
SC1U10V3KX U34
G
S
S
S
MAX1909_LDO U94
26
25
SI4431BDY
1
84.04431.C37
R675
CSSP
CSSN
33R2
MAX1909_REF
D
D
D
D
1
1 MAX1909_PDS27 SC 0310
22
5
6
7
8
3D3V_S5 R268 R669 AD+_TO_SYS 24 PDS DHIV
SRC PDL 28 Near MAX1909
1
100KR2 100KR2 MAX1909_DC_IN

1 2
DCIN LDO Pin 21 CHG_PWR-3 56
R668 CHG_PWR-2 56 BT+
1
49K9R2F SC 0310
2
21 MAX1909_DLOV C858 SC 0310 L30

DLOV
1
Icharge=2.967A MAX1909_VCTL 11 SC1U10V3KX CHG_PWR-2 1 2 CHG_PWR-3 1 R284 2

2
2
R269 MAX1909_ICTL 10 VCTL IND-15UH-30 D015R2512F-1
ICTL
1
100KR2 MAX1909_MODE 7
MODE
1
R757 23 MAX1909_DHI
DHI
5
6
7
8
R667 33KR2F
2
D 51K1R2F U30
D
D
D
D
2N7002 3 ACIN
1
34 CHG_ON# 1 SI4800BDY D14
2
Q13 MAX1909_IINP 8 84.04800.B37 DY

G
2
IINP
1
S MAX1909_DLO
From KBC 20
2
DLO
2
MAX1909_CLS 9 B220LFA G41 G42 C428 C432 C431
CLS
SC10U25V6KX
SC10U25V0KX
SC10U25V0KX
SB 0202 SC 0310
2
G
S
S
S
3
D DY
4
3
2
1
2N7002
1
MAX1909_ACOK 6
GAP-CLOSE-PWR
GAP-CLOSE-PWR
34 4S1P_I 1 19
1
R270 Q34 ACOK PGND
G G86
2K8R3F-L CELL is 4 Cell S 29 1 2
2
PGND
SB 0213 18 GAP-CLOSE-PWR
3 2
PKPRES# CSIP
5 PKPRES
Pre charge=2.967A D
2N7002
34 PRE_CHG 1 SB 0127
Q14
G From Battery Connector
S MAX1909_CCV 13 17
2
MAX1909_CCI CCV CSIN

12 CCI BATT 16 BAT+SENSE 48
SB 0202 MAX1909_CCS 14 15
CCS GND
1
From Battery Connector

REF
R670 G115 GAP-CLOSE

10KR2 1 2
1
G85
4
1
34 AD_IA 1 2 C845 MAX8725ETI MAX1909_LDO

2
C843 SCD01U50V3KX V_REF :4.2235V (<500uA) G116 GAP-CLOSE

2
GAP-CLOSE-PWR SCD01U50V3KX 1 2
2
1
1
1
C844 R289
MAX1909_REF
1
R666 SCD1U16V3KX 68KR2F

2
C842 R674
10KR2F-U SCD1U16V3KX 49K9R2F
R286
2
2
2
2 1 PKPRES#
2
MAX1909_CLS 34,48 BAT_THERMAL
1
SC 0310 0R0402-PAD
1
R287
1
C854 100KR2
SC1U10V3KX R673
2
Rx 63K4R3F 90W ADAPTER
2
MAX1909_LDO 64.63425.651
2
3D3V_AUX_S5
1
R288
U54C 10KR2
14
ISOURCE_MAX = (0.075/Rx)*(VCLS/VREF)
<Variant Name>
2
6 5 MAX1909_ACOK TOTAL_POWER :
34 AC_IN#
Adapter=65W,Total_Power=58.5W
1
Wistron Corporation
1
TSLCX14MTC-L-U R665
7
C853 15KR2F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

SC1U10V3KX Taipei Hsien 221, Taiwan, R.O.C.
2
Title
SC 0302 CHARGER MAX8725
Custom
Bolsena -1
(Power Team) Date: Thursday, March 31, 2005 Sheet 47 of 58
A B C D E
Adaptor in to generate DCBATOUT

SB 0127
R8 0R5J-1
1 2
R729 0R5J-1
1 2
R730 0R5J-1
DOCK_AD+ AD_JK_1 1 2 D31 2
3
G48 GAP-CLOSE-PWR 1
1 2 Dummy when 'USE EZ4' AD+
PZM24NB1
G47 GAP-CLOSE-PWR D29 AD_JK_1
4 1 2 DC1 2 4
4 AD_JK DY
U63
G50 GAP-CLOSE-PWR 3 1 S D 8
1
1 2 2 S D 7
1 1 3 S D 6 C670
1
G49 GAP-CLOSE-PWR AD+_2 4 G D 5 SCD1U
2
1 2 C661 C662 SBM1040CT-13
Dummy when no EZ4
SCD1U50V3ZY
SCD1U50V3ZY
2 AO4407
1
R502
ID = -10A/70deg
1
3 100KR2
C7 Rds(ON) = 24mohm
2
5 SCD1U50V3ZY SO-8
2
6
E Q2
MH1 PDTA124EU
B
DC-JACK75-U 1
1
R503
22.10037.701 C
56KR3F
3
ME : 22.10037.701
3
Q1
2
DTC124EUA-U1
22 K
34 AD_OFF 2
1
R9
3 1KR2 22 K 3
1
5V_AUX_S5
BATTERY CONNECTOR
2
D45 D44
CHANGE TO 20.80605.007
BAT1
3
DY 1 SD 0324
83.00099.L01 83.00099.L01
DY
BAV99-2 BAV99-2 2
34 BAT_SCL_5 1 R671 2 BTSMCLK 3
1 R676 2 27R3F BTSMDATA 4
34 BAT_SDA_5
BT+ 34,47 BAT_THERMAL 27R3F 5
47 BAT+SENSE 1 R672 2 6
0R0402-PAD 7
SYN-CON7-9
1
2 EC12 EC11 2
SC10P50V2JN-1
SC10P50V2JN-1
C850 C851 C852 C849
20.80269.007
DY
2
SC1000P50V2KX
SC1000P50V2KX
Put close to battery connector
SCD1U50V3ZY
SCD1U50V3ZY
2
2
ME : 20.80269.007
SD 0324
MAX1999_LDO5
DCBATOUT
Low3 Circuit : DY 12.78V (High)

1
C403
R267 SCD1U10V2MX-1 Turn On
1MR2
2
DY
U31 11.25V (Low)
2
HTH 1 5 Turn Off

HTH VCC
L3# at 11.25V 2 GND
3 LTH RESET#/RESET 4 LOW3_OFF 23
1
DY
R266 G680LT1
1 <Variant Name> 1
15KR2F Output type: DY
Open-Drain RESET#
Wistron Corporation
2
HTH
DY Taipei Hsien 221, Taiwan, R.O.C.
1
R265 Title
110KR2F SB
AD/BATT CONN
2
A3 -1
Bolsena
A B C D E
5 4 3 2 1
U70A
PEG_RXP0 AH30 AJ5 VGA_GPIO0 3D3V_S0 SB 0215 3D3V_S0
PEG_RXN0 PCIE_RX0P Part 1 of 6 GPIO0 VGA_GPIO1 R758 2 10KR2 for REVERSE LANE
AG30 PCIE_RX0N GPIO1 AH5 1
Dummy when use UMA (WHOLE PAGE) 3D3V_S0
PEG_RXP1
PEG_RXN1
AG29 PCIE_RX1P GPIO2 AJ4 VGA_GPIO2
VGA_GPIO3 for EYE DIAGRAM SC 0219
VGA_GPIO0
VGA_GPIO4
1 R531 2 10KR2
R526 2 10KR2
AF29 PCIE_RX1N GPIO3 AK4 1
12 PEG_TXP[15..0] PEG_RXP2 AE29 AH4 VGA_GPIO4
PEG_RXN2 PCIE_RX2P GPIO4 VGA_GPIO5 VGA_GPIO2 R530 1
12 PEG_TXN[15..0] AE30 PCIE_RX2N GPIO5 AF4 2 DUMMY-R2
2
PEG_RXP3 AD30 AJ3 VGA_GPIO6
12 PEG_RXP[15..0] R534 PEG_RXN3 PCIE_RX3P GPIO6 VGA_GPIO7 VGA_GPIO3 R527 1
12 PEG_RXN[15..0] AD29 PCIE_RX3N GPIO7 AK3 2 DUMMY-R2
0R0805-PAD PEG_RXP4 AC29 AH3 VGA_GPIO8
PEG_RXN4 PCIE_RX4P GPIO8 VGA_GPIO9 TP10 VGA_GPIO5 R81 1
U14 AB29 PCIE_RX4N GPIO9 AJ2 MUST TO CHECK 2 DUMMY-R2
P2779A_XI PEG_RXP5 AB30 AH2 VGA_GPIO10
1
PCIE_RX5P GPIO10
1
2
X1 PEG_RXN5 AA30 AH1 VGA_GPIO11
PCIE_RX5N GPIO11 DVOMODE=VSS 3.3V MODE
1
R55 1 8 3D3V_SS_S0 SC 0308 PEG_RXP6 AA29 AG3 VGA_GPIO12 TP11

C58 XIN/CLKIN VDD P2779A_REF PEG_RXN6 PCIE_RX6P GPIO12 VGA_GPIO13 TP9
D 2 XOUT REF 7 Y29 PCIE_RX6N GPIO13 AG1 DVOMODE=VDDC to 1.8V 1.8V MODE D
1
1MR2 VGA_GPIO16 PEG_RXP7 VGA_ALERT#
SC27P50V2JN
X-27MHZ-7-U 3 6 W29 AG2 VGA_ALERT# 54

2
P2779A_XO PD# MODOUT C698 PEG_RXN7 PCIE_RX7P GPIO14 R82 1
DVO / EXT TMDS / GPIO

4 5 W30 AF3 2 GPIO_PWRCNTL 55 DVOMODE=GND NO USE DVPDATA
12
LF VSS SCD1U PEG_RXP8 PCIE_RX7N GPIO_PWRCNTL 0R0402-PAD

V30 AF2
2
PCIE_RX8P GPIO_MEMSSIN
1
C83 PEG_RXN8 V29 VGA_GPIO16 SC 0309
PCIE_RX8N
SC27P50V2JN
P2779A-08ST PEG_RXP9 U29 AE10 VGA_DVOMODE 1 R92 2 0R0402-PAD STRAPS PIN DEFAULT
2
71.02779.00A PEG_RXN9 PCIE_RX9P DVOMODE

T29 PCIE_RX9N
ORIGNAL R86 PEG_RXP10 T30 AH6 DVPDATA_0 R533 1 2 DUMMY-R2
180R2F PEG_RXN10 PCIE_RX10P DVPDATA_0 CHECK VRAM TYPE AND SIZE
P2779A-08TT R30 AJ6 CAL_BG_BACKUP GPIO0 1
2
R53 XTALIN_M24 PEG_RXP11 PCIE_RX10N DVPDATA_1 DVPDATA_1 R528 1 DUMMY-R2
1 2 USE W180-01 R29 PCIE_RX11P DVPDATA_2 AK6 2
620R2F PEG_RXN11 P29 AH7 CHECK VRAM TYPE AND SIZE 3D3V_S0 PLL_CAL_FORCE_EN GPIO1 1
GEOMETRY PCIE_RX11N DVPDATA_3
1
1
PEG_RXP12 N29 AK7 DVPDATA_2 1 R529 2
C54 C53 R85 PEG_RXN12 PCIE_RX12P DVPDATA_4 1KR2 SB 0219
N30 PCIE_RX12N DVPDATA_5 AJ7 PCIE_MODE(1:0) GPIO(3:2) 00
SCD01U16V2KX SC270P50V 105R3F PEG_RXP13 M30 AH8 CHECK VRAM TYPE AND SIZE
2
PEG_RXN13 PCIE_RX13P DVPDATA_6

M29 PCIE_RX13N DVPDATA_7 AJ8 CAL_OFF GPIO4 1
adjust SWING at 1.2v PEG_RXP14 L29 AH9 Dummy when use ''M24'
2
PEG_RXN14 PCIE_RX14P DVPDATA_8 SB 0219
K29 PCIE_RX14N DVPDATA_9 AJ9 BYPASS_PLL GPIO5 0
PEG_RXP15 K30 AK9 SC 0225
PEG_RXN15 PCIE_RX15P DVPDATA_10
J30 PCIE_RX15N DVPDATA_11 AH10 ICOMP GPIO6 0
DVPDATA_12 AE6 M26 : HYNIX 128MB 1.8V,64MB 1.8V
SCD1U16V AG6 DEBUG_ACCESS GPIO8 0
PEG_TXP0 1 2 C195 PEG_TXP0_VGA AF26
DVPDATA_13
AF6 M24 : HYNIX 64MB 1.8V
PCI EXPRESS
PEG_TXN0 C193 PEG_TXN0_VGA AE26 PCIE_TX0P DVPDATA_14 GPIO(9,13:11)
1 2 PCIE_TX0N DPVDATA_15 AE7 ROMIDCFG(3:0) 0000
PEG_TXP1 1 2 C194 PEG_TXP1_VGA AC25 AF7
PEG_TXN1 C192 PEG_TXN1_VGA AB25 PCIE_TX1P DVPDATA_16
1 2 PCIE_TX1N DVPDATA_17 AE8
PEG_TXP2 1 2 C190 PEG_TXP2_VGA AC27 AG8 VGA_SDA1 TP6 MULTIFUNC(1:0) LCDDATA(17:16) 00
PEG_TXN2 C188 PEG_TXN2_VGA AB27 PCIE_TX2P DVPDATA_18 VGA_SCL1 TP5
1 2 PCIE_TX2N DVPDATA_19 AF8
PEG_TXP3 1 2 C191 PEG_TXP3_VGA AC26 AE9 VIP_DEVICE LCDDATA(20) 0
PEG_TXN3 C189 PEG_TXN3_VGA AB26 PCIE_TX3P DVPDATA_20 3D3V_S0
C PEG_TXP4 1 2 C187 PEG_TXP4_VGA Y25 AG10 DWNGR0 LCDDATA(21) 0 C
PEG_TXN4 C185 PEG_TXN4_VGA W25 PCIE_TX4P DVPDATA_22 (internal pull-down)
1
PEG_TXP5 1 2 C183 PEG_TXP5_VGA Y27 SC 0308 1D8V_S0
PEG_TXN5 C181 PEG_TXN5_VGA W27 PCIE_TX5P
1 2 PCIE_TX5N DVPCNTL_0 AJ10 DVPCNTL0_VGA 1 R543 2 0R0402-PAD R84 ATI Ref. Datasheets(page 3-32)
PEG_TXP6 1 2 C186 PEG_TXP6_VGA Y26 AK10 DVPCNTL1_VGA 1 R532 2 0R0402-PAD 100R2F
PEG_TXN6 1 2 C184 PEG_TXN6_VGA W26 PCIE_TX6P DVPCNTL_1
AJ11 DVPCNTL2_VGA 1 R539 2 0R0402-PAD DOC.NO.:CHS-216M24-03
PEG_TXP7 C182 PEG_TXP7_VGA PCIE_TX6N DVPCNTL_2
1 2 U25 AH11 DVPCNTL3_VGA 1 R540 2 0R0402-PAD GPIO[0..13] are internal
2
PEG_TXN7 C180 PEG_TXN7_VGA T25 PCIE_TX7P DVPCNTL_3
1 2
PEG_TXP8 1 2 C178 PEG_TXP8_VGA U27
PCIE_TX7N
AG4 VGA_VREFG pull-down.
PEG_TXN8 C176 PEG_TXN8_VGA T27 PCIE_TX8P VREFG TMDS_DIS_TX0- R95 330R2 TMDS_DIS_TX0+
1 2 PCIE_TX8N 1 2
1
PEG_TXP9 1 2 C179 PEG_TXP9_VGA U26 C82 TMDS_DIS_TX1- 1 R96 2 330R2 TMDS_DIS_TX1+
PEG_TXN9 C177 PEG_TXN9_VGA T26 PCIE_TX9P R83 TMDS_DIS_TX2- R98 330R2 TMDS_DIS_TX2+
SCD1U16V
1 2 PCIE_TX9N TXOUT_L0N AH15 ATI_TXAOUT0- 54 1 2
100R2F
PEG_TXP10 1 2 C175 PEG_TXP10_VGA P25 AH16 ATI_TXAOUT0+ 54 TMDS_DIS_TXC- 1 R94 2 330R2 TMDS_DIS_TXC+
2
PEG_TXN10 C173 PEG_TXN10_VGA N25 PCIE_TX10P TXOUT_L0P
1 2 PCIE_TX10N TXOUT_L1N AJ16 ATI_TXAOUT1- 54
PEG_TXP11 1 2 C171 PEG_TXP11_VGA P27 AJ17 SC 0225
ATI_TXAOUT1+ 54
2
PEG_TXN11 C169 PEG_TXN11_VGA N27 PCIE_TX11P TXOUT_L1P
1 2 PCIE_TX11N TXOUT_L2N AJ18 ATI_TXAOUT2- 54
PEG_TXP12 1 2 C174 PEG_TXP12_VGA P26 AK18 ATI_TXAOUT2+ 54 DVPDATA_2, 1, 0
PEG_TXN12 C172 PEG_TXN12_VGA N26 PCIE_TX12P TXOUT_L2P ATI_TXAOUT3- TP74
1 2 PCIE_TX12N TXOUT_L3N AJ20 0 0 0 64MB Hynix
PEG_TXP13 1 2 C170 PEG_TXP13_VGA L25 AJ21 ATI_TXAOUT3+ TP17 0 0 1 64MB Samsung FOR M24
PEG_TXN13 C168 PEG_TXN13_VGA K25 PCIE_TX13P TXOUT_L3P
1 2 PCIE_TX13N TXCLK_LN AK19 ATI_TXACLK- 54 0 1 0 64MB X brand
3D3V_S0 PEG_TXP14 1 2 C166 PEG_TXP14_VGA L27 AJ19
PCIE_TX14P TXCLK_LP ATI_TXACLK+ 54 0 1 1 64MB Y brand
PEG_TXN14 1 2 C164 PEG_TXN14_VGA K27 AG16
LVDS
3D3V_S0 PCIE_TX14N TXOUT_U0N ATI_TXBOUT0- 54
PEG_TXP15 1 2 C167 PEG_TXP15_VGA L26 AG17 ATI_TXBOUT0+ 54 1 0 0 128MB Hynix
PEG_TXN15 C165 PEG_TXN15_VGA K26 PCIE_TX15P TXOUT_U0P
1 2 PCIE_TX15N TXOUT_U1N AF16 ATI_TXBOUT1- 54 1 0 1 128MB Samsung FOR M26
1
TXOUT_U1P AF17 ATI_TXBOUT1+ 54 1 1 0 128MB X brand

1
R123 AE18 ATI_TXBOUT2- 54

R118 DUMMY-R2 TXOUT_U2N 1 1 1 128MB Y brand
3 GFX_CLK AF27 PCIE_REFCLKP TXOUT_U2P AE19 ATI_TXBOUT2+ 54
10KR2 AE27 AF19 ATI_TXBOUT3- TP14
3 GFX_CLK# PCIE_REFCLKN TXOUT_U3N
AF20 ATI_TXBOUT3+ TP13
B TXOUT_U3P B
AG19 ATI_TXBCLK- 54
2
STERE0SYNC PWRGD_MASK 1D2V_VGA_S0 TXCLK_UN

1 R97 2 150R2F PCIE_CALP_VGA AC23 PCIE_CALRP TXCLK_UP AG20 ATI_TXBCLK+ 54 RN25
1 R144 2 100R2F PCIE_CALN_VGA AB24 PCIE_CALRN
TMDS_DIS_TX0- 1 8 TMDS_EZ4_TX0- 15,57
1
1 R110 2 10KR2F-U PCIE_CALI_VGA AB23 PCIE_CALI DIGON AE12 ATI_LCDVDD_ON 54

TMDS_DIS_TX0+ 2 7 TMDS_EZ4_TX0+ 15,57
R119 R121 AG12 TMDS_DIS_TXC+ 3 6 TMDS_EZ4_TXC+ 15,57
DUMMY-R2 R111 2 10KR2 PCIE_TESTIN BLON BL_ON 13,34 TMDS_DIS_TXC-
0R0402-PAD 1 AE25 PCIE_TESTIN 4 5 TMDS_EZ4_TXC- 15,57
SC 0308 AK13 TMDS_DIS_TX0-
TX0M TMDS_DIS_TX0+
AD25 AJ13 SRN0-1-U RN24
1
13 AG_RST# PWRGD_MASK PERSTb TX0P TMDS_DIS_TX1- TMDS_DIS_TX2-

The PERSTB must deplay 4ms from M24 bug. AD24 AJ14 1 8 TMDS_EZ4_TX2- 15,57
2
PERSTb_MASK TX1M TMDS_DIS_TX1+ TMDS_DIS_TX2+

TX1P AJ15 2 7 TMDS_EZ4_TX2+ 15,57
1 R101 2 715R3F AH21 R2SET TX2M AK15 TMDS_DIS_TX2- TMDS_DIS_TX1- 3 6 TMDS_EZ4_TX1- 15,57
AK16 TMDS_DIS_TX2+ TMDS_DIS_TX1+ 4 5 TMDS_EZ4_TX1+ 15,57
TX2P TMDS_DIS_TXC- SB 0213
57 DIS_LUMA AK21 Y_G TXCM AJ12
AJ22 TMDS AK12 TMDS_DIS_TXC+ SRN0-1-U
57 DIS_CRMA C_R_PR TXCP
57 DIS_COMP AK22 COMP_B_PB
2 150R2F 1 R551
2 150R2F 1 R542
R541
3D3V_S0 RN22 SRN10KJ AE13 DIS_DVI_DDC_C 15

DDC2CLK
4 1 AJ24 AE14 RN17
3 2 AK24
H2SYNC
V2SYNC
DDC2DATA DIS_DVI_DDC_D 15
Place Near To EZPORT4 1 8
1
AF12 DVI_HPD 15 2 7
DAC2
HPD1
150R2F
VGA_SMB_CLK AG22 VGA_GPIO11 3 6

54 VGA_SMB_CLK DDC3CLK
VGA_SMB_DAT AG23 AK27 VGA_GPIO10 4 5
54 VGA_SMB_DAT DDC3DATA R DIS_R 57
1
G AJ27 DIS_G 57
13,17 EDID_CLK RN23 3 SRN0-2-U 2 AJ26 R93 SRN10K-2
2
B DIS_B 57
13,17 EDID_DAT 4 1 1 R553 2 10KR2 VGA_SSIN AJ23 SSIN
100KR2 RN18
R554 1 102R2F 2
R549 1 102R2F 2
R550 1 102R2F 2
1 R120 2 10KR2 VGA_SSOUT AH24 SSOUT HSYNC AJ25 DIS_HS 16
VGA_GPIO9 1 8
AK25 VGA_GPIO6 2 7
CLK SS
2
VSYNC DIS_VS 16 VGA_GPIO7 3
DAC1
6
XTALIN_M24 AH28 AH26 1 R552 2 SC 0228 4 5
SB 0127 XTALIN RSET 470R2F SC 0228
A <Variant Name> A
AJ29 AG25 DIS_CRT_DDC_D 16 SRN10K-2
TP75 XTALOUT DDC1DATA
DDC1CLK AF24 DIS_CRT_DDC_C 16
1 R122 2 1KR2 TESTEN AH27 TESTEN GPIO_AUXWIN AG24
GPIO_AUXWIN 54
Wistron Corporation
1 R77 2 1KR2 E8 TEST_YCLK 1 R117 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 R69 2 1KR2 B6 10KR2 Taipei Hsien 221, Taiwan, R.O.C.
TEST_MCLK
AF25 PLLTEST DPLUS AF11 VGA_LOCAL_DP 23,54
THERM
TP18 AE11 VGA_LOCAL_DN 23,54 Title

DMINUS
STERE0SYNC AH25 STEREOSYNC Dummy when use ''M24' ATI M26 PCIE LVDS (1/3)
A3 -1
M26-P-1 Bolsena
(M24)71.00M24.C0U - (M26)71.0M26P.00U Date: Thursday, March 31, 2005 Sheet 49 of 58
5 4 3 2 1
A B C D E
Dummy when use UMA (WHOLE PAGE) D32
SSM5818SL
current of power to VDDC on M26 is up to DY
VGA_CORE_S0
10A + margin (25% or more). 3D3V_S0 1 2
U70D
1D8V_S0
T7 Part 4 of 6 AC13
VDDR1#T7 VDDC#AC13
1
R4 AD13 TC20
VDDR1#R4 VDDC#AD13
1
R1 AD15 C104 C101 C113 C114 C112 DY C105 C110 C98 C100 C106 C97 C99 C103 C714 C715
VDDR1#R1 VDDC#AD15
1
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
ST100U6D3VDM-5
SC10U10V5ZY
N8 AC15
2
VDDR1#N8 VDDC#AC15
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
C93 C94 C75 C92 C78 C136 C95 C76 N7 AC17
2
VDDR1#N7 VDDC#AC17
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SC1U10V3KX
SC1U10V3KX
M4
2
2
VDDR1#M4
L8 VDDR1#L8 VDD15#P8 P8
K23 Y8 3D3V_S0
VDDR1#K23 VDD15#Y8
4 K24
N4
VDDR1#K24 VDD15#AC11 AC11
AC20
4
VDDR1#N4 VDD15#AC20
J8 VDDR1#J8 VDD15#H20 H20
1
J7 H11 D33
VDDR1#J7 VDD15#H11
J4 VDDR1#J4 VDD15#M23 M23 DY
J1 Y23 SB
VDDR1#J1 VDD15#Y23 1D5V_VGA_S0
H10 SSM5818SL
VDDR1#H10
H13 AD7
2
VDDR1#H13 VDDR3#AD7
H15 VDDR1#H15 VDDR3#AD19 AD19
H17 VDDR1#H17 VDDR3#AD21 AD21
1
1
T8 AC22 DIODE SUPPLIES POWER
C77 C79 C74 C135 TC2 VDDR1#T8 VDDR3#AC22 3D3V_S0 C137 C96 C102 C109 TO VDDC RAIL
V4 VDDR1#V4 VDDR3#AC8 AC8
SC1U10V3KX
SC1U10V3KX
SC1U10V3KX
SC1U10V3KX
SC1U10V3KX
SC1U10V3KX
SC1U10V3KX
3D3V_VDDR3 1 R559 WHILE VDDC REGULATOR
SC10U10V5ZY
ST100U6D3VDM-5
V7 AC21 2
2
2
VDDR1#V7 VDDR3#AC21 0R0603-PAD STABALIZES DURING POWER ON
V8 VDDR1#V8 VDDR3#AC19 AC19
1
AA1 VDDR1#AA1
AA4 AG7 C722 C752 SC 0308
VDDR1#AA4 VDDR4#AG7 SC1U10V3KX
SC1U10V3KX
AA7 AD9
2
VDDR1#AA7 VDDR4#AD9
AA8 VDDR1#AA8 VDDR4#AC9 AC9
A3 VDDR1#A3 VDDR4#AC10 AC10
A9 VDDR1#A9 VDDR4#AD10 AD10
A15 VDDR1#A15
A21 AG26 3D3V_VDDR4 1 R80 2
VDDR1#A21 PCIE_VDDR_12#AG26 0R0603-PAD
A28 VDDR1#A28 PCIE_VDDR_12#AK29 AK29
1
2D8V_S0
B1 VDDR1#B1 PCIE_VDDR_12#AJ30 AJ30 PCIE_VDDR_12
B30 AG28 C80 C81 SC 0308
VDDR1#B30 PCIE_VDDR_12#AG29 1.6A + margin (transition, 4us duration) and
SC1U10V3KX
3D3V_S0 2D8V_S0
SC10U10V5ZY
DY U17 D26 AG27
2
VDDR1#D26 PCIE_VDDR_12#AH29 1.1A + margin (continuous).
D23 VDDR1#D23
VOUT 2 1 R546 2 D20 VDDR1#D20 PCIE_PVDD_12#N24 N24
3 0R3-U D17 N23 1D2V_VGA_S0
VIN VDDR1#D17 PCIE_PVDD_12#N23
3 C122
GND 1 C121
DY D14 VDDR1#D14 PCIE_PVDD_12#P23 P23 3
1
D11 1D2V_VGA_VDDR 2 R558 1

VDDR1#D11 0R0603-PAD
DY DY D8 VDDR1#D8 PCIE_PVDD_18#U23 U23
1
2D5V_S0
SC1U10V3KX
SC1U10V3KX
APL5308-15AC-TR D5 T23
2
VDDR1#D5 PCIE_PVDD_18#T23 C721 C196 C719 C146 C147C720 SC 0308

E27 VDDR1#E27 PCIE_PVDD_18#V23 V23
SC330P50V2KX
SC1U10V3KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
1 R544
SC10U10V5ZY
2 F4 W23
2
CHANGE TO 74.05308.E31 0R3-U VDDR1#F4 PCIE_PVDD_18#W23
G7 VDDR1#G7
1
G10 VDDR1#G10 NC#D9 D9

C115 G13 D13
VDDR1#G13 NC#D13
SCD1U16V
G15 D19 DIODE SUPPLIES POWER

2
VDDR1#G15 NC#D19 TO VDDC RAIL

G19 VDDR1#G19 NC#D25 D25
G22 E4 WHILE VDDC REGULATOR
SB 0201 VDDR1#G22 NC#E4 STABALIZES DURING POWER ON
G27 VDDR1#G27 NC#T4 T4
H22 AB4 1D2V_VGA_PVDD 2 R557 1
2D5V_2D8V_LVDDR_S0
VDDR1#H22 NC#AB4 0R0603-PAD

H19 VDDR1#H19
1
1D8V_S0 AD4 PCIE_PVDD_12 SC 0308
VDDR1#AD4 C197 C140 C141C718C139
L23 VDDR1#L23 M22 Power
150mA + margin (transition, 4us duration) andUP Squence
SC330P50V2KX
SCD01U16V2KX
SCD01U16V2KX
SCD01U16V2KX
SC10U10V5ZY
2
2
90mA + margin (continuous).
1 R99 2 3D3_VDDR3 T1 < 1mS
0R0603-PAD AD22
AVSSQ
1
SC 0308 3D3_VDDR4 T2 < 1mS

C116
SC100P50V2JN
AE16 AF18 2D5_VDDR1 T3 < 1uS

2
LVDDR_25#AE16 LVSSR#AF18
AE17 LVDDR_25#AE17 LVSSR#AH17 AH17
1 R100 2 AF15 AG15 1D2_VDDC T4 < 100nS
0R0603-PAD C118 C117 LVDDR_18#AF15 LVSSR#AG15 1D8V_S0
AE15 LVDDR_18#AE15 LVSSR#AG18 AG18
1
1
SC1U10V3KX
SC 0308 PCIE_VDDR_12 T5 < 100nS

SC100P50V2JN
1D8V_VGA_PVDD 2 R113 1
1D8V_TVDD_S0 AH19 AH18 0R0603-PAD PCIE_PVDD_12 T6 < 1uS
2 2
2
LPVDD LPVSS
1
AH13 AH12 C143 C142 C145
TPVDD TPVSS
SC330P50V2KX
SCD01U16V2KX
SCD01U16V2KX
C107 C144 SC 0308 VDD_15 T7 < 100nS
SC10U10V5ZY
SC10U10V5ZY
AF13 AH14
2
TXVDDR#AF13 TXVSSR#AH12 PCIE_PVDD_18
AF14 TXVDDR#AF14 TXVSSR#AG13 AG13
TXVSSR#AG14 AG14
2D5V_S0 1D8V_S0
1 R545 2 C119 C111 F18 VDDRH0 VSSRH0 F19
SC1U10V3KX
0R0603-PAD
SC10U10V5ZY
N6 VDDRH1 VSSRH1 M6
1
SC 0308 PCIE_PVDDR_18
AF21 AH20 800mA + margin (transition, 4us duration) and
2
1D8V_A2VDD_S0 A2VDD#AF21 A2VSSN#AH20

AE20 A2VDD#AE20 A2VSSN#AG21 AG21
330mA + margin (continuous).
I/O POWER
1 R116 2 1D8V_A2VDDQ_S0 AF23 AF22

0R0603-PAD A2VDDQ A2VSSQ
1 R115 2 1D8V_AVDD AH23 AVDD AVSSN AH22
0R0603-PAD C149 C148
1
1D8V_S0
SC1U10V3KX
SC 0308 1 R112 21D8V_DDQ AE23 AE24

0R0603-PAD VDD1DI VSS1DI
AE22 AE21
2
VDD2DI VSS2DI
SC 0308 ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED
1 R114 2 1D8V_PVDD_S0 AK28 PVDD PVSS AJ28 PLACED CLOSE TO THE POWER/GND PINS
0R0603-PAD C151 C150
WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC
1
SC1U10V3KX
A7 MPVDD MPVSS A6
SC 0308
2
M26-P-1
(M24)71.00M24.C0U - (M26)71.0M26P.00U
1 <Variant Name>
1
1 R67 2 1D8V_MPVDD_S0 Wistron Corporation
0R0603-PAD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC 0308
Title
ATI M26 POWER (2/3)
A3
Bolsena -1
A B 53 MDB[63..0]
C D E
Dummy when use UMA (WHOLE PAGE) U70C
52 MDA[63..0] U70B MDB0 MAB0 MAB[13..0] 53
MAA[13..0] 52 D7 DQB0 MAB0 N5
MDA0 H28 E22 MAA0 MDB1 F7 Part 3 of 6 M1 MAB1 VGA_CORE_S0
MDA1 DQA0 Part 2 of 6 MAA0 MAA1 MDB2 DQB1 MAB1 MAB2
H29 DQA1 MAA1 B22 E7 DQB2 MAB2 M3
MDA2 J28 B23 MAA2 MDB3 G6 L3 MAB3
MDA3 DQA2 MAA2 MAA3 MDB4 DQB3 MAB3 MAB4 U70F
J29 DQA3 MAA3 B24 G5 DQB4 MAB4 L2
MDA4 J26 C23 MAA4 MDB5 F5 M2 MAB5 P17 M16
MDA5 DQA4 MAA4 MAA5 MDB6 DQB5 MAB5 MAB6 VDDC#P17Part 6 of 6 VSS#M16
H25 DQA5 MAA5 C22 E5 DQB6 MAB6 M5 P18 VDDC#P18 VSS#N16 N16
MDA6 H26 F22 MAA6 MDB7 C4 P6 MAB7 P19 N15
MDA7 DQA6 MAA6 MAA7 MDB8 DQB7 MAB7 MAB8 VDDC#P19 VSS#N15
G26 DQA7 MAA7 F21 B5 DQB8 MAB8 N3 U12 VDDC#U12 VSS#P15 P15
MDA8 G30 C21 MAA8 MDB9 C5 K2 MAB9 U13 P16
MDA9 DQA8 MAA8 MAA9 MDB10 DQB9 MAB9 MAB10 VDDC#U13 VSS#P16
D29 DQA9 MAA9 A24 A4 DQB10 MAB10 K3 U14 VDDC#U14 VSS#R18 R18
4 MDA10
MDA11
D28
E28
DQA10 MAA10 C24
A25
MAA10
MAA11
MDB11
MDB12
B4
C2
DQB11 MAB11 J2
P5
MAB11
MAB12
U17
U18
VDDC#U17 VSS#R17 R17
R16
4
MDA12 DQA11 MAA11 MAA12 MDB13 DQB12 MAB12 MAB13 VDDC#U18 VSS#R16
E29 DQA12 MAA12 E21 D3 DQB13 MAB13 P3 U19 VDDC#U19 VSS#R15 R15
MDA13 G29 B20 MAA13 MDB14 D1 P2 V19 R14
MDA14 DQA13 MAA13 MDB15 DQB14 MAB14 DQMB#[7..0] 53 VDDC#V19 VSS#R14
G28 DQA14 MAA14 C19 DQMA#[7..0] 52 D2 DQB15 V18 VDDC#V18 VSS#R13 R13
MDA15 F28 MDB16 G4 E6 DQMB#0 V17 R12
DQA15 DQB16 DQMB#0 VDDC#V17 VSS#R12
CENTER ARRAY
MDA16 G25 J25 DQMA#0 MDB17 H6 B2 DQMB#1 V14 T13
MDA17 DQA16 DQMA#0 DQMA#1 MDB18 DQB17 DQMB#1 DQMB#2 VDDC#V14 VSS#T13
F26 DQA17 DQMA#1 F29 H5 DQB18 DQMB#2 J5 V13 VDDC#V13 VSS#T14 T14
MDA18 E26 E25 DQMA#2 MDB19 J6 G3 DQMB#3 V12 T15
MDA19 DQA18 DQMA#2 DQMA#3 MDB20 DQB19 DQMB#3 DQMB#4 VDDC#V12 VSS#T15
F25 DQA19 DQMA#3 A27 K5 DQB20 DQMB#4 W6 N18 VDDC#N18 VSS#W15 W15
MDA20 E24 F15 DQMA#4 MDB21 K4 W2 DQMB#5 N17 V16
MDA21 DQA20 DQMA#4 DQMA#5 MDB22 DQB21 DQMB#5 DQMB#6 VDDC#N17 VSS#V16
F23 DQA21 DQMA#5 C15 L6 DQB22 DQMB#6 AC6 N14 VDDC#N14 VSS#V15 V15
MDA22 E23 C11 DQMA#6 MDB23 L5 AD2 DQMB#7 W17 U15
MDA23 DQA22 DQMA#6 DQMA#7 MDB24 DQB23 DQMB#7 QSB[7..0] 53 VDDC#W17 VSS#U15
D22 DQA23 DQMA#7 E11 QSA[7..0] 52 G2 DQB24 W18 VDDC#W18 VSS#U16 U16
MDA24 B29 MDB25 F3 F6 QSB0 W12 T19
MDA25 DQA24 QSA0 MDB26 DQB25 QSB0 QSB1 VDDC#W12 VSS#T19
MEMORY INTERFACE B
C29 DQA25 QSA0 J27 H2 DQB26 QSB1 B3 W13 VDDC#W13 VSS#T18 T18
MEMORY INTERFACE A
MDA26 C25 F30 QSA1 MDB27 E2 K6 QSB2 W14 T17
MDA27 DQA26 QSA1 QSA2 MDB28 DQB27 QSB2 QSB3 VDDC#W14 VSS#T17
C27 DQA27 QSA2 F24 F2 DQB28 QSB3 G1 N13 VDDC#N13 VSS#T16 T16
MDA28 B28 B27 QSA3 MDB29 J3 V5 QSB4 N19
MDA29 DQA28 QSA3 QSA4 CKEA DQB29 QSB4 VDDC#N19
B25 DQA29 QSA4 E16 1 R90 2 MDB30 F1 DQB30 QSB5 W1 QSB5 M19 VDDC#M19
MDA30 C26 B16 QSA5 10KR2 MDB31 H3 AC5 QSB6 M18
MDA31 DQA30 QSA5 QSA6 MDB32 DQB31 QSB6 QSB7 VDDC#M18
B26 DQA31 QSA6 B11 U6 DQB32 QSB7 AD1 M12 VDDC#M12
MDA32 F17 F10 QSA7 CKEB 1 R78 2 MDB33 U5 N12
MDA33 DQA32 QSA7 10KR2 MDB34 DQB33 VDDC#N12
E17 DQA33 U3 DQB34 RASB# R2 RASB# 53 M13 VDDC#M13
MDA34 D16 A19 MDB35 V6 M14 W16
MDA35 DQA34 RASA# RASA# 52 MDB36 DQB35 VDDC#M14 VDDC1#W16
F16 DQA35 W5 DQB36 CASB# T5 CASB# 53 P12 VDDC#P12 VDDC1#M15 M15
MDA36 E15 E18 MDB37 W4 P13 R19
MDA37 DQA36 CASA# CASA# 52 MDB38 DQB37 VDDC#P13 VDDC1#R19
F14 DQA37 Y6 DQB38 WEB# T6 WEB# 53 P14 VDDC#P14 VDDC1#T12 T12
MDA38 E14 E19 MDB39 Y5 M17
DQA38 WEA# WEA# 52 DQB39 VDDC#M17
3 MDA39
MDA40
F13
C17
DQA39
E20
MDB40
MDB41
U2
V2
DQB40 CSB0# R5 CSB#0 53 W19 VDDC#W19 3
MDA41 DQA40 CSA0# CSA#0 52 MDB42 DQB41 CSB#1 M26-P-1
B18 DQA41 V1 DQB42 CSB1# R6 CSB#1 53
MDA42 B17 F20 CSA#1 MDB43 V3 (M24)71.00M24.C0U - (M26)71.0M26P.00U
MDA43 DQA42 CSA1# CSA#1 52 MDB44 DQB43 VGA_CORE_S0 VGA_CORE_VDDCI
B15 DQA43 W3 DQB44 CKEB R3 CKEB 53
MDA44 C13 B19 MDB45 Y2 R91 0R0603-PAD
MDA45 DQA44 CKEA CKEA 52 MDB46 DQB45
B14 DQA45 Y3 DQB46 CLKB0 N1 CLKB0 53 1 2
MDA46 C14 MDB47 AA2 N2
DQA46 DQB47 CLKB0# CLKB#0 53
1
MDA47 C16 B21 1D8V_S0 MDB48 AA6
MDA48 DQA47 CLKA0 CLKA0 52 MDB49 DQB48 SC 0308 C108
A13 DQA48 CLKA0# C20 CLKA#0 52 AA5 DQB49 CLKB1 T2 CLKB1 53
MDA49 A12 SB 0201 MDB50 AB6 T3 SC330P50V2KX
2
DQA49 DQB50 CLKB1# CLKB#1 53
1
MDA50 C12 C18 MDB51 AB5
MDA51 DQA50 CLKA1 CLKA1 52 R70 MDB52 DQB51
B12 DQA51 CLKA1# A18 CLKA#1 52 AD6 DQB52 M22,24,26P
MDA52 C10 100R2F MDB53 AD5 E3 TP3 TPAD30
MDA53 C9
DQA52 MDB54 AE5
DQB53 DIMB_0
AA3 TP4 TPAD30 :Not
MDA54 DQA53 MDB55 DQB54 DIMB_1 connected 1D8V_S0
B9 AE4
2
MDA55 DQA54 ATI_MVREFD 1D8V_S0 MDB56 DQB55
B10 DQA55 MVREFD B7 AB2 DQB56
MDA56 E13 MDB57 AB3 AF5 TP7 TPAD30 When use M22/24P
DQA56 DQB57 ROMCS# R74
1
MDA57 E12 B8 ATI_MVREFS MDB58 AC2 DY

DQA57 MVREFS DQB58
MDA58 E10 DQA58
R71 1 SB 0201 MDB59 AC3 DQB59 MEMVMODE_0 C6 1 2 PIN C6 C7
MDA59 F12 100R2F C73 MDB60 AD3 C7 10KR2
MDA60 DQA59 SCD1U16V DQB60 MEMVMODE_1
F11 D30 DIMA_0 MDB61 AE1 1.8V = PD PU
2
MDA61 DQA60 DIMA_0 DQB61

E9 B13 DIMA_1 TP16 MDB62 AE2 C8
2
DQA61 DIMA_1 DQB62 MEMTEST
1
MDA62 F9 TP12 MDB63 AE3 1 2 2.5V = PU PD
MDA63 DQA62 R68 DQB63 R73 10KR2
F8 DQA63 100R2F M26-P-1
1
M26-P-1 (M24)71.00M24.C0U - (M26)71.0M26P.00U
1
(M24)71.00M24.C0U - (M26)71.0M26P.00U R72 R51
MEMORY CHANNEL B
2
R75
2
MEMORY CHANNEL A M24 use 45ohm 1% R76 45R2F
10KR2
DY
10KR2
2
1
M22,24,26P 240R2F
M26 use 240ohm 1%
2
1
R89 As close to
:Not
2
connected
100R2F C91
SCD1U16V
CHIP as Dummy when use ''M26'
possible
2
*When use M26, pin C6 = GPIO_17, C7 = NC

2

AC12
AC14
AD16
AC16
AC18
AD18
AC28
AD28
AD26
AD27
AH29
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AE28
AF28
W24
W28
AC4
M27
M26
M24
M25
M28
AB8
AB7
AB1
AK2
N28
R25
R23
R24
R26
R27
R28
U28
K28
P28
V24
V26
V27
V25
V28
Y28
AJ1
T28
T24
L28
W7
W8
U4
U8
Y4
MVDDQ= VDDR1 MEMVMODE_0 MEMVMODE_1

U70E
1.8v/ 2.5v
VSS#U4
VSS#U8
VSS#W7
VSS#W8
VSS#Y4
VSS#AB8
VSS#AB7
VSS#AB1
VSS#AC4
VSS#AC12
VSS#AC14
VSS#AD16
VSS#AC16
VSS#AC18
VSS#AD18
VSS#AK2
VSS#AJ1
PCIE_VSS#K28
PCIE_VSS#L28
PCIE_VSS#M27
PCIE_VSS#M26
PCIE_VSS#M24
PCIE_VSS#M25
PCIE_VSS#M28
PCIE_VSS#P28
PCIE_VSS#N28
PCIE_VSS#R25
PCIE_VSS#R23
PCIE_VSS#R24
PCIE_VSS#R26
PCIE_VSS#R27
PCIE_VSS#R28
PCIE_VSS#T28
PCIE_VSS#T24
PCIE_VSS#U28
PCIE_VSS#V24
PCIE_VSS#V26
PCIE_VSS#V27
PCIE_VSS#V25
PCIE_VSS#V28
PCIE_VSS#Y28
PCIE_VSS#W23
PCIE_VSS#W28
PCIE_VSS#AA26
PCIE_VSS#AA27
PCIE_VSS#AA23
PCIE_VSS#AA24
PCIE_VSS#AA25
PCIE_VSS#AA28
PCIE_VSS#AB28
PCIE_VSS#AC28
PCIE_VSS#AD28
PCIE_VSS#AD26
PCIE_VSS#AD27
PCIE_VSS#AE28
PCIE_VSS#AF28
PCIE_VSS#AH29
1.8V GND +VDDC_CT
SB 0127
2.5V +VDDC_CT GND
Part 5 of 6
CORE GND
2.8V +VDDC_CT +VDDC_CT
SB 0127
VSS#AG11
VSS#AD12
VSS#AG5
VSS#AG9
VSS#G12
VSS#G16
VSS#G18
VSS#G21
VSS#G24
VSS#C28
VSS#C30
VSS#D27
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#D10
VSS#H27
VSS#H23
VSS#H21
VSS#H18
VSS#H16
VSS#H14
VSS#H12
VSS#A10
VSS#A16
VSS#A22
VSS#A29
VSS#F27
1 <Variant Name>
1
VSS#J23
VSS#J24
VSS#M7
VSS#M8
VSS#G9
VSS#C1
VSS#C3
VSS#D6
VSS#D4
VSS#H9
VSS#H8
VSS#H4
VSS#R7
VSS#R8
VSS#A2
VSS#P4
VSS#K1
VSS#K7
VSS#K8
VSS#T1
VSS#L4
Wistron Corporation
A2
A10
A16
A22
A29
C1
C3
C28
C30
D27
D24
D21
D18
D15
D12
D10
D6
D4
F27
G9
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
H9
H8
H4
J23
J24
AD12
AG5
AG9
AG11
R7
P4
M7
M8
L4
K1
K7
K8
R8
T1
Title
ATI M26 MEM (3/3)
A3
Bolsena -1
5 4 3 2 1
1D8V_S0
Dummy when use UMA (WHOLE PAGE) 1D8V_S0 SB 0201 SB 0201 U69A 1 of 5
All dampings in this page must near the VRAM. 51 MDA[63..0]

RASA# M2 D7
51 MAA[13..0] RAS# VDD
1
1
CASA# L2 D8
C90 C70 C68 C67 C41 C691 C704 C690 C705 C72 C133 WEA# CAS# VDD
51 DQMA#[7..0] L3 WE# VDD E4
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD01U16V2KX SCD1U16V SCD1U16V CSA#0 N2 E11
2
2
CSA#1 CS# VDD
51 QSA[7..0] M4 NC#M4 VDD L4
VDD L7
MAA0 N5 L8 SB 0201
A0 VDD 1D8V_S0
MAA1 N6 L11
MAA2 A1 VDD
M6 A2
D MAA3 N7 C3 D
MAA4 A3 VDDQ
N8 A4 VDDQ C5
1
1
MAA5 M9 C7
C134 C66 C131 C163 C712 C713 C138 C701 C162 C69 C71 MAA6 A5 VDDQ
N9 A6 VDDQ C8
1
SC330P50V2KX
SC330P50V2KX
SC330P50V2KX
SC330P50V2KX
SC330P50V2KX
SC330P50V2KX
SC330P50V2KX
SC330P50V2KX
SCD01U16V2KX
SC330P50V2KX SCD01U16V2KX MAA7 N10 C10 C692
2
2
MAA8 A7 VDDQ C702
N11 A8/AP VDDQ C12
MAA9
SC10U10V5ZY
SC10U10V5ZY
M8 E3
2
MAA10 A9 VDDQ
L6 A10 VDDQ E12
MAA11 M7 F4
A11 VDDQ
L9 NC#L9 VDDQ F11
U71B 2 of 5 U69B 2 of 5 G4
MAA12 VDDQ
N4 BA0 VDDQ G11
U71A 1 of 5 MDA12 B5 MDA45 B5 MAA13 M5 J4
MDA11 DQ3 MDA46 DQ3 BA1 VDDQ
C6 DQ1 C6 DQ1 M10 NC#M10 VDDQ J11
MDA9 B6 MDA43 B6 K4
MDA10 DQ2 MDA44 DQ2 VDDQ
51 RASA# M2 RAS# VDD D7 B7 DQ0 B7 DQ0 51 CKEA VDDQ K11
L2 D8 MDA13 D2 MDA42 D2 10R3 N12
51 CASA# CAS# VDD DQ6 DQ6 CKE
L3 E4 MDA8 D3 MDA40 D3 51 CLKA1 2 R66 1 VDDRA_CLK1+ M11
51 WEA# WE# VDD DQ5 DQ5 CLK
N2 E11 MDA15 C2 MDA47 C2 51 CLKA#1 2 R65 1 VDDRA_CLK1- M12 B4
51 CSA#0 CS# VDD DQ4 DQ4 10R3 CLK# VSSQ
M4 L4 MDA14 E2 MDA41 E2 B11
51 CSA#1 NC#M4 VDD DQ7 DQ7 VSSQ
VDD L7 VSSQ D4
MAA0 N5 L8 1D8V_S0 D5
CLOSE TO MEM !!
A0 VDD VSSQ
2
2
MAA1 N6 L11 DQMA#1 B3 DQMA#5 B3 R49 R64 D6
MAA2 A1 VDD QSA1 DM0 QSA5 DM0 VSSQ
M6 A2 B2 DQS0 B2 DQS0 VSSQ D9
MAA3 SB 0201
60D4R2F
60D4R2F
N7 A3 VDDQ C3 VSSQ D10
MAA4 N8 C5 D11
MAA5 A4 VDDQ VSSQ
M9 C7 HY5DS573222F-28 HY5DS573222F-28 E6
1
1
MAA6 A5 VDDQ (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U VSSQ
N9 A6 VDDQ C8 VSSQ E9
1
MAA7 N10 C10 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U U69C 3 of 5 F5
C MAA8 N11 A7 VDDQ C703 C711 U71C 3 of 5 VSSQ C
A8/AP VDDQ C12 VSSQ F10
MAA9 MDA49 K13
SC10U10V5ZY
SC10U10V5ZY
BC752_1
M8 E3 G5
2
MAA10 L6 A9 VDDQ MDA21 K13 MDA53 G13 DQ8 VSSQ
A10 VDDQ E12 G10
MAA11 M7 F4 MDA18 G13 DQ8 MDA54 G12 DQ12 VSSQ
H5
A11 VDDQ MDA17 G12 DQ12 MDA50 J13 DQ13 VSSQ
1
L9 NC#L9 VDDQ F11 F6 H10
G4 MDA22 J13 DQ13 MDA52 F13 DQ10 C65 F7
VSS_THERMAL VSSQ
J5
MAA12 VDDQ MDA19 F13 DQ10 MDA48 K12 DQ14 SCD1U16V VSS_THERMAL VSSQ
N4 G11 F8 J10
2
MAA13 BA0 VDDQ MDA23 K12 DQ14 MDA55 F12 DQ9 VSS_THERMAL VSSQ
M5 BA1 VDDQ J4 F9 K5
M10 J11 MDA16 F12 DQ9 MDA51 J12 DQ15 G6
VSS_THERMAL VSSQ
K10
NC#M10 VDDQ MDA20 J12 DQ15 DQ11 VSS_THERMAL VSSQ
VDDQ K4 DQ11 G7 VSS_THERMAL
51 CKEA VDDQ K11 G8 VSS_THERMAL VSS E5
R107 N12 DQMA#6 H12 G9 E7
CKE DM1 VSS_THERMAL VSS
51 CLKA0 2 R109 1 VDDRA_CLK0+
M11 CLK
DQMA#2 H12 DM1
QSA6 H13 DQS1 H6 VSS_THERMAL VSS E8
51 CLKA#0 2 10R3 1 VDDRA_CLK0- M12
CLK# VSSQ B4 QSA2 H13 DQS1 H7 VSS_THERMAL VSS E10
10R3 B11 H8 K6
VSSQ VSS_THERMAL VSS
VSSQ D4 HY5DS573222F-28 H9 VSS_THERMAL VSS K7
D5 HY5DS573222F-28 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U J6 K8
CLOSE TO MEM !!
VSSQ VSS_THERMAL VSS

2
2
R88 D6 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U J7 K9

R108 VSSQ U71D 4 of 5 U69D 4 of 5 VSS_THERMAL VSS SB 0201
60D4R2F
VSSQ D9 J8 VSS_THERMAL VSS L5

60D4R2F
VSSQ D10 J9 VSS_THERMAL VSS L10

D11 MDA6 G3 MDA37 G3
VSSQ MDA2 DQ18 MDA35 DQ18 1D8V_S0
E6 K3 K3 M13 N13
1
1
VSSQ DQ23 DQ23 MCL/DSF VREF
NC#C11
NC#H11
NC#L12
NC#L13
E9 MDA0 J3 MDA34 J3
NC#M3
NC#C4
NC#H4
NC#N3
VSSQ MDA7 DQ20 MDA39 DQ20
VSSQ F5 F3 DQ16 F3 DQ16
1
F10 MDA1 J2 MDA33 J2
VSSQ DQ21 DQ21
1
MDA4 MDA36 R520
BC751_1
VSSQ G5 G2 DQ19 G2 DQ19

G10 MDA5 F2 MDA38 F2 HY5DS573222F-28 C689 1KR2F
C4
C11
H4
H11
L12
L13
M3
N3
VSSQ MDA3 DQ17 MDA32 DQ17 SCD1U16V
H5 K2 K2
2
VSSQ DQ22 DQ22
1
F6 H10
2
B C132 VSS_THERMAL VSSQ B
F7 VSS_THERMAL VSSQ J5
SCD1U16V F8 J10 DQMA#0 H3 DQMA#4 H3 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U VDDR_VREF2
2
VSS_THERMAL VSSQ QSA0 DM2 QSA4 DM2

F9 VSS_THERMAL VSSQ K5 H2 DQS2 H2 DQS2
G6 VSS_THERMAL VSSQ K10
1
G7 VSS_THERMAL
G8 E5 HY5DS573222F-28 HY5DS573222F-28 C688 R519
VSS_THERMAL VSS SCD1U16V 1KR2F
G9 E7 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
2
VSS_THERMAL VSS (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
H6 VSS_THERMAL VSS E8 U71E 5 of 5 U69E 5 of 5
H7 E10
2
VSS_THERMAL VSS
H8 VSS_THERMAL VSS K6
H9 K7 MDA26 D12 MDA58 D12
VSS_THERMAL VSS MDA31 DQ26 MDA63 DQ26
J6 VSS_THERMAL VSS K8 D13 DQ25 D13 DQ25
J7 K9 MDA30 E13 MDA61 E13
VSS_THERMAL VSS SB 0201 MDA24 DQ24 MDA56 DQ24
J8 VSS_THERMAL VSS L5 C9 DQ30 C9 DQ30
J9 L10 MDA27 B10 MDA59 B10
VSS_THERMAL VSS MDA25 DQ28 MDA57 DQ28
1D8V_S0
B8 DQ31 B8 DQ31 Layout trace 20 mil
M13 N13 MDA29 C13 MDA62 C13
MCL/DSF VREF DQ27 DQ27
NC#C11
NC#H11
NC#L12
NC#L13
MDA28 B9 MDA60 B9
NC#M3
NC#C4
NC#H4
NC#N3
DQ29 DQ29
1
1
R547 DQMA#3 B12 DQMA#7 B12

HY5DS573222F-28 C708 1KR2F QSA3 DM3 QSA7 DM3
B13 B13
C4
C11
H4
H11
L12
L13
M3
N3
SCD1U16V DQS3 DQS3

2
HY5DS573222F-28 HY5DS573222F-28
(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U VDDR_VREF1 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
(M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
<Variant Name>
1
A A
C707 R548
CLOSE TO MEM SCD1U16V 1KR2F
Wistron Corporation
2

2
Title
Layout trace 20 mil ATI VRAM (1/2)

A3 -1
Bolsena
5 4 3 2 1
5 4 3 2 1
1D8V_S0
Dummy when use UMA (WHOLE PAGE) 51 MDB[63..0]
U65A 1 of 5
All dampings in this page must near the VRAM. SB 0201 51 MAB[13..0]
1D8V_S0 M2 D7
51 DQMB#[7..0] 51 RASB# RAS# VDD
1
SB 0201 L2 D8
51 CASB# CAS# VDD
C680 C18 L3 E4
SCD1U16V SCD1U16V 51 QSB[7..0] 51 WEB# WE# VDD
51 CSB#0 N2 E11
2
CS# VDD
1
1
51 CSB#1 M4 NC#M4 VDD L4
C47 C45 C17 C46 C44 C674 C16 C693 C671 L7
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD01U16V2KX MAB0 VDD
N5 L8 1D8V_S0
2
2
MAB1 A0 VDD
N6 A1 VDD L11
MAB2 M6
MAB3 A2
D N7 A3 VDDQ C3 D
MAB4 N8 C5 SB 0201
A4 VDDQ
1
MAB5 M9 C7
C22 C673 MAB6 A5 VDDQ
N9 A6 VDDQ C8
1
SC330P50V2KX SCD01U16V2KX MAB7 N10 C10
2
A7 VDDQ
1
1
MAB8 N11 C12 C684 C679
C694 C683 C48 C20 C130 C21 C49 C678 C50 MAB9 A8/AP VDDQ
SC10U10V5ZY
SC10U10V5ZY
M8 E3
2
SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SCD01U16V2KX MAB10 A9 VDDQ
L6 E12
2
2
U64B 2 of 5 U65B 2 of 5 MAB11 A10 VDDQ
M7 A11 VDDQ F4
L9 NC#L9 VDDQ F11
MDB7 B5 MDB32 B5 G4
MDB6 DQ3 MDB33 DQ3 MAB12 VDDQ
C6 DQ1 C6 DQ1 N4 BA0 VDDQ G11
MDB5 B6 MDB34 B6 MAB13 M5 J4
MDB4 DQ2 MDB35 DQ2 BA1 VDDQ
B7 DQ0 B7 DQ0 M10 NC#M10 VDDQ J11
MDB1 D2 MDB36 D2 K4
DQ6 DQ6 51 CKEB VDDQ
MDB0 D3 MDB38 D3 K11
U64A 1 of 5 MDB2 DQ5 MDB37 DQ5 VDDQ
C2 DQ4 C2 DQ4 N12 CKE
MDB3 E2 MDB39 E2 51 CLKB1 2 R31 1 10R3 VDDRC_CLK1+M11
DQ7 DQ7 R32 CLK
51 CLKB#1 2 1 10R3 VDDRC_CLK1- M12
CLK# VSSQ B4
RASB# M2 D7 B11
CASB# RAS# VDD DQMB#0 DQMB#4 VSSQ
L2 CAS# VDD D8 B3 DM0 B3 DM0 VSSQ D4
WEB# L3 E4 QSB0 B2 QSB4 B2 D5
WE# VDD DQS0 DQS0 VSSQ
2
2
CSB#0 N2 E11 D6
CLOSE TO MEM !!
CSB#1 CS# VDD R33 R30 VSSQ
M4 NC#M4 VDD L4 VSSQ D9
L7 60D4R2F 60D4R2F D10
VDD HY5DS573222F-28 HY5DS573222F-28 VSSQ
MAB0 N5 L8 1D8V_S0 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB)
(M24 72.55732.B0U
HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U D11
MAB1 A0 VDD U64C 3 of 5 U65C 3 of 5 VSSQ
N6 L11 E6
1
1
MAB2 A1 VDD VSSQ
M6 A2 VSSQ E9
MAB3 N7 C3 SB 0201 MDB28 K13 MDB63 K13 F5
C MAB4 A3 VDDQ MDB29 DQ8 MDB59 DQ8 VSSQ C
N8 A4 VDDQ C5 G13 DQ12 G13 DQ12 VSSQ F10
MAB5 MDB31 MDB58
BC754_1
M9 A5 VDDQ C7 G12 DQ13 G12 DQ13 VSSQ G5
MAB6 N9 C8 MDB25 J13 MDB60 J13 G10
A6 VDDQ DQ10 DQ10 VSSQ
1
MAB7 N10 C10 MDB26 F13 MDB56 F13 H5
1
MAB8 N11 C12 C672 C675 MDB27 K12 MDB62 K12 F6 VSS_THERMAL H10
MAB9 A8/AP VDDQ SC10U10V5ZY MDB24 DQ9 MDB57 DQ9 C23 VSSQ
SC10U10V5ZY
M8 E3 F12 F12 F7 VSS_THERMAL J5
2
SCD1U16V
MAB10 L6 E12 MDB30 J12 MDB61 J12 F8 VSS_THERMAL J10
2
MAB11 A10 VDDQ DQ11 DQ11 VSSQ
M7 A11 VDDQ F4 F9 VSS_THERMAL VSSQ K5
L9 NC#L9 VDDQ F11 G6 VSS_THERMAL VSSQ K10
G4 DQMB#3 H12 DM1 DQMB#7 H12 DM1 G7 VSS_THERMAL
MAB12 VDDQ QSB3 QSB7
N4 BA0 VDDQ G11 H13 DQS1 H13 DQS1 G8 VSS_THERMAL VSS E5
MAB13 M5 J4 G9 VSS_THERMAL E7
BA1 VDDQ VSS
M10 NC#M10 VDDQ J11 H6 VSS_THERMAL VSS E8
VDDQ K4 HY5DS573222F-28 HY5DS573222F-28 H7 VSS_THERMAL VSS E10
VDDQ K11 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB)
(M24 72.55732.B0U H8 VSS_THERMAL
HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U VSS K6
CKEB N12 U64D 4 of 5 U65D 4 of 5 H9 VSS_THERMAL K7
CKE VSS
51 CLKB0 2 R28 1 VDDRC_CLK0+M11
CLK J6 VSS_THERMAL VSS K8
51 CLKB#0 2 R29 110R3 VDDRC_CLK0- M12
CLK# VSSQ B4 MDB14 G3 DQ18 MDB43 G3 DQ18 J7 VSS_THERMAL VSS K9 SB 0201
10R3 B11 MDB9 K3 DQ23 MDB47 K3 J8 VSS_THERMAL L5
VSSQ MDB11 MDB45 J3 DQ23 VSS
VSSQ D4 J3 DQ20 J9 VSS_THERMAL L10
D5 MDB13 F3 DQ16 MDB42 F3 DQ20 VSS
CLOSE TO MEM !!
VSSQ DQ16
2
2
R26 D6 MDB10 J2 DQ21 MDB44 J2 DQ21 M13 MCL/DSF N13 1D8V_S0

VSSQ VREF
NC#C11
NC#H11
NC#L12
NC#L13
R27 D9 MDB15 G2 DQ19 MDB40 G2
NC#M3
NC#C4
NC#H4
NC#N3
60D4R2F 60D4R2F VSSQ MDB12 MDB41 F2 DQ19
VSSQ D10 F2 DQ17
MDB46 K2 DQ17
1
D11 MDB8 K2 DQ22
VSSQ DQ22
1
E6 R510
1
1
VSSQ C682 1KR2F

E9 HY5DS573222F-28
C4
C11
H4
H11
L12
L13
M3
N3
VSSQ DQMB#1 DQMB#5 SCD1U16V
F5 H3 H3 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
2
VSSQ QSB1 DM2 QSB5 DM2
F10 H2 H2
2
B VSSQ DQS2 DQS2 B
BC753_1
VSSQ G5
G10 VDDR_VREF4
VSSQ
VSSQ H5 HY5DS573222F-28 HY5DS573222F-28
1
F6 VSS_THERMAL VSSQ H10 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
1
C19 F7 J5 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
SCD1U16V VSS_THERMAL VSSQ U64E 5 of 5 U65E 5 of 5 C681 R509
F8 J10
2
VSS_THERMAL VSSQ SCD1U16V 1KR2F

F9 K5 CLOSE TO MEM
2
VSS_THERMAL VSSQ MDB20 MDB53
G6 VSS_THERMAL VSSQ K10 D12 DQ26 D12 DQ26
G7 MDB23 D13 MDB54 D13
2
VSS_THERMAL MDB22 DQ25 MDB52 DQ25
G8 VSS_THERMAL VSS E5 E13 DQ24 E13 DQ24
G9 E7 MDB16 C9 MDB51 C9 Layout trace 20 mil
VSS_THERMAL VSS MDB19 DQ30 MDB50 DQ30
H6 VSS_THERMAL VSS E8 B10 DQ28 B10 DQ28
H7 E10 MDB17 B8 MDB49 B8
VSS_THERMAL VSS MDB21 DQ31 MDB55 DQ31
H8 VSS_THERMAL VSS K6 C13 DQ27 C13 DQ27
H9 K7 MDB18 B9 MDB48 B9
VSS_THERMAL VSS DQ29 DQ29
J6 VSS_THERMAL VSS K8
J7 VSS_THERMAL VSS K9
J8 L5 DQMB#2 B12 DQMB#6 B12
VSS_THERMAL VSS QSB2 DM3 QSB6 DM3
J9 VSS_THERMAL VSS L10 B13 DQS3 B13 DQS3
M13 N13 1D8V_S0
MCL/DSF VREF
NC#C11
NC#H11
NC#L12
NC#L13
NC#M3
NC#C4
NC#H4
NC#N3
HY5DS573222F-28 HY5DS573222F-28
SB 0201 (M24 HYNIX 64MB) 72.52832.F0U - (M26 HYNIX 128MB) 72.55732.B0U
1

1
R516
HY5DS573222F-28 C676 1KR2F
C4
C11
H4
H11
L12
L13
M3
N3
SCD1U16V
2
A <Variant Name> A
VDDR_VREF3
Wistron Corporation
1
C677 R515 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

CLOSE TO MEM SCD1U16V 1KR2F Taipei Hsien 221, Taiwan, R.O.C.
2
Title
2
Layout trace 20 mil

ATI VRAM (2/2)
A3
Bolsena -1
5 4 3 2 1
5 4 3 2 1
D D
SB 0201
C C
SRN0-1-U
49 ATI_TXBCLK+ 4 5 LCD_TXBCLK+ 13,17

49 ATI_TXBCLK- 3 6 LCD_TXBCLK- 13,17
49 ATI_TXBOUT2+ 2 7 LCD_TXBOUT2+ 13,17
49 ATI_TXBOUT2- 1 8 LCD_TXBOUT2- 13,17
RN97
SRN0-1-U

RN96
SRN0-1-U
49 ATI_TXACLK+ 4 5 LCD_TXACLK+ 13,17

49 ATI_TXACLK- 3 6 LCD_TXACLK- 13,17
49 ATI_TXAOUT2+ 2 7 LCD_TXAOUT2+ 13,17
49 ATI_TXAOUT2- 1 8 LCD_TXAOUT2- 13,17
RN92
SRN0-1-U

B RN91 B
49 ATI_LCDVDD_ON 1 R160 2 LCD_VDD_ON 13,17

0R2-0
3D3V_S0
2
R521
2K2R2
3D3V_S0 3D3V_S0
U67
DY
1
23,49 VGA_LOCAL_DP
1
1 VCC SMBCLK 8 VGA_SMB_CLK 49
1
2 7 R536
DXP SMBDATA VGA_SMB_DAT 49 10KR2
C695 3 6
DXN ALERT# VGA_ALERT# 49
SC2200P50V2KX 4 5 To M24
2
THERM# GND
23,49 VGA_LOCAL_DN To M26
3 2
1
1 R535 2 GPIO_AUXWIN 49
DY C697 0R2-0
G781
SCD1U 1 DY Q26 DY
2
PDTC144EU
DY
2
SB 0201 DY
DY Dummy
<Variantwhen
Name> use ''M26'
A A
Dummy when use UMA
SB Wistron Corporation
Title
VGA SELECTOR
A3 -1
Bolsena
5 4 3 2 1
A B C D E
FAN5234 FOR VGA_Core DCBATOUT DCBATOUT_5234

VGA_CORE_S0 VGA_CORE_PWR VGA_CORE_S0
G7 G58 GAP-CLOSE-PWR
GAP-CLOSE-PWR
G63 GAP-CLOSE-PWR 1 2 1 2
1 2
GAP-CLOSE-PWR
Dummy when use 'UMA' (whole page) G8 GAP-CLOSE-PWR 1 2 1 2
1 2
GAP-CLOSE-PWR
G61 GAP-CLOSE-PWR 1 2 1 2
1 2
4 G59 GAP-CLOSE-PWR 4
G9 GAP-CLOSE-PWR 1 2
1 2
G54 GAP-CLOSE-PWR
1 2
G56 GAP-CLOSE-PWR
1 2
G55 GAP-CLOSE-PWR
1 2
DCBATOUT_5234
G53 GAP-CLOSE-PWR
1 2
5V_S5 G6 GAP-CLOSE-PWR
1 2
1
C86 C85 C87 G5 GAP-CLOSE-PWR
SC10U25V0KX
SC10U25V0KX
SCD1U 1 2
2
1
5
6
7
8
C59 C60 U18 G1 GAP-CLOSE-PWR
SC4D7U10V5ZY SCD1U16V
D
D
D
D
1 2
2
G4 GAP-CLOSE-PWR
1 2
C84 SB 0127
D9 FDS6612A SB 0127
G
S
S
S
2 1 5234_BOOT 1 2
5V_S0
4
3
2
1
3 3
SSM5818SL SCD1U25V3KX
18,21,34,38,39,43,44,57 PM_SLP_S3#
1
U68 1D2V or 1D15V

R524
DUMMY-R2
16 9
Iomax=10 or 5.2A
FPWM PGND
5234_SS
15
7
BOOT AGND 8 OCP>20A
5234_ILIM SS 1K2R2F SC 0303 VGA_CORE_PWR
2
4 ILIM L25
SB 0131 1 R525 2 5234_EN 3 12 5234_ISEN 1 R522 2
10KR2 EN ISNS 5234_SW
SW 13 1 2
DCBATOUT_5234
1
6 14 5234_HDRV IND-2D2UH-4
VSEN HDRV 5234_LDRV 5V_S0 R59
5 VOUT LDRV 10
1
1 R60 2 5234_VIN 1 U15 300KHz 464R3F
VIN
5
6
7
8
1
0R0603-PAD 11 2 R537
VCC PGOOD
1
FDS6690A C699 698R2F C706 TC22 TC21
D
D
D
D
2
1
SC 0308 R57 SCD01U16V2JX SCD1U ST330U2D5VDM-3 ST330U2D5VDM-3
2
C696 R523 FAN5234MTCX TP73 10KR2
2
1
SCD22U16V3ZY 40K2R2F TPAD30

2
DY C61
2
1
SCD1U25V3KX
2
G
S
S
S
3
C700 D KEMET V Size 330uF 2.5V
4
3
2
1
1
SC2200P50V2KX
R58 R538 Q5 1 GPIO_PWRCNTL 49 ESR=9mohm, Iripple=3.7A

2
2N7002 G
1
PWM Mode: S NTD:9.0
2
2KR2F R87
FPWM (High)=>Fixed PWM Mode. 10KR2
2
FPWM (Low)=>Hysteretic Mode. DUMMY-R3 KEMET B2 Size 220uF 2.5V
2
2 2
ESR=35mohm Iripple=1.6A
2
5234_VSEN NTD:6.0
Rilim=(11.2/Iilim)*((100+Rsense)/Rdson)
High(3.3V)=>Vo=1.0V Vout Setting:
Low(0V)=>Vo=1.2V 0.9V/Rlow=(Vout-0.9V)/Rhigh
M24/M26 POWER PLAY (GPIO_PWRCNTL)
high (3.3V) = set lower core voltage (VDDC = 1.0V)
3D3V_S0
low (0V) = set higher core voltage (VDDC = 1.2V)
1D5V_VGA_S0
1
G67
C754 C756 1D5V_VGA_1_S0 1 2
2
GAP-CLOSE-PWR
1
1
1
2
3
4
R597 C755 G64

<VGA> 8K66R2F SC10U25V6KX 1 2
BS
FB
VOUT
VIN
1 GAP-CLOSE-PWR <Variant Name> 1

2
NC#8
NC#7
NC#5
GND
GND
APL5332KAC
U74 C753 Wistron Corporation
1
1
SCD1U

8
7
6
5
9
R596 Taipei Hsien 221, Taiwan, R.O.C.

10KR2F-U
2
DY Title
VGA CORE 1D2V or 1D0V
2

A3 -1
A B C D E
5 4 HOLE13 HOLE24 HOLE1
3 HOLE4 HOLE23
HOLE5 HOLE7 HOLE8 2HOLE3 HOLE6 HOLE10 HOLE28 HOLE9 HOLE20 1HOLE18 HOLE2 HOLE22
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
HOLE HOLE HOLE HOLE HOLE
VGA_CORE_PWR 1D8V_S0 1D2V_S0 3D3V_S5
1
1
1
1
1
DY DY DY CHG_PWR-2 47
EC19 EC20 EC21 EC23 5V_AUX_S5 3D3V_LAN_S5 AD+
5130_LL1 44,45
2 SCD1U16V SCD1U16V SCD1U16V SCD1U16V 5130_LL2 44,45 5130_LL3 44,45
2
CHG_PWR-3 47
1
D EC75 EC76 EC77 EC78 EC79 EC80 EC81 EC82 D
SC1500P50V3KX
SC1000P50V2KX
SC1500P50V3KX
SC1000P50V2KX
SC1500P50V3KX
SC1000P50V2KX
SC1500P50V3KX
SC1000P50V2KX
EC68 EC69 EC70 EC71 EC72 EC73 EC74
2D5V_S3 2D5V_S0 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U SCD1U SCD1U
2
DY DY DY DY DY DY DY DY
SC 0310
1
1
DY DY DY DY
EC24 EC25 EC26 EC27 MAX1999_LX3 43 MAX1544_LXM 41,42
SCD1U16V SCD1U16V SCD1U16V SCD1U16V MAX1999_LX5 43 MAX1544_LXS 41,42
2
1
EC83 EC84 EC85 EC86 EC87 EC88 EC89 EC90
SC1500P50V3KX
SC1000P50V2KX
SC1500P50V3KX
SC1000P50V2KX
SC1500P50V3KX
SC1000P50V2KX
SC1500P50V3KX
SC1000P50V2KX
1D8V_PWR 2D5V_PWR 1D2V_PWR
2
DY DY DY DY DY DY DY DY
1
3D3V_S0 SC 0310
EC28 EC29 EC30
SCD1U16V SCD1U16V SCD1U16V
2
1
EC45
EC36 EC37 EC38 EC39 EC40 EC41 EC42 EC43 EC44
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
2D5V_S0 3D3V_BT_S0 3D3V_LAN_S5 DCBATOUT DCBATOUT DCBATOUT
2D5V_S0 3D3V_S5 5VA_OP_S0

1
1
DY DY DY DY DY DY DOCK_AD+
C EC31
SCD1U16V
EC32
SCD1U16V
EC33
SCD1U16V
EC34
SCD1U
EC35
SCD1U
EC22
SCD1U C
2
1
EC62
EC46 EC47 EC48 EC49 EC50 EC51 EC52 EC53 SCD1U
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
FAN1_VCC
FOR VGA CHIP
FOR MDC
1
EC63 HOLE12
SCD1U16V DCBATOUT
HOLE11
2
1
EC54 EC55 EC56 EC60 EC57 EC58 EC59 EC65 EC64 EC66
1
SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U SCD1U HOLE14
2
SC 0308 HOLE15
1
SCD1U => VOLTAGE 25V 34.42E05.001
IMPORTANT: HOLE16
SCD1U => VOLTAGE 25V 34.42E05.001
1
SCD1U16V => VOLTAGE 16V BT+
1
SC 0308
34.42E05.001
1
1
EC67 34.42E05.001
SCD1U
2
B SC 0309
SC 0301
34.42E05.001 B
GREEN COLOR FOR INSTALL
DY DY DY
ZZ.NDPAD.XXX
ZZ.NDPAD.XXX
3D3V_S5 3D3V_S5 FOR NORTH BRIDGE

GND19 GND22 GND21 GND23 GND24 GND15
GND13 GND14 SPRING-29 HOLE17
GNDPAD
GNDPAD
SPRING-23 SPRING-23 SPRING-23 SPRING-1 SPRING-23 U40A U40D

14
14
13
1
1
34.42T14.001
34.39S07.001
34.39S07.001
34.39S07.001
34.39S07.001
34.40V16.001
2 3 12 11 HOLE19
1
1
TSLCX125 TSLCX125
7
7 34.42E05.001
HOLE21
DY DY DY DY
1
GND20 GND18 GND16 GND17 GND3 GND1 GND2
SPRING-24 SPRING-1 SPRING-1 SPRING-1 SPRING-1

Dummy when no EZ4 34.42E05.001
34.45T31.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.49U24.001
34.49U24.001
1
3D3V_AUX_S5
1
<Variant Name> 34.42E05.001

A DY DY U54F A
14
GND5 GND4 GND7 GND6 GND8 GND10 GND11 GND12 GND9

Wistron Corporation
SPRING-1 SPRING-24 SPRING-24 SPRING-1 SPRING-1 SPRING-1 SPRING-1 SPRING-1 SPRING-1 13 12 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
34.45T31.001
34.45T31.001

34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
34.40V16.001
DY DY DY DY DY TSLCX14MTC-L-U Title
EMI
1

A3 -1
Bolsena
A B C D E
EZ1
126
PPD[7..0] 58
TV SWITCH 5V_S0
Function
A to B0
S
L
15,49 TMDS_EZ4_TX1- 91 1 D_TTGP0 D_TTGP0 30
15,49 TMDS_EZ4_TX1+ 92 2 D_TTGN0 D_TTGN0 30 A to B1 H
15,49 TMDS_EZ4_TX2+ 62 31 U3 NC7SB3157P6X-U
ACT_LED# 29,30
1
15,49 TMDS_EZ4_TX2- 61 32 LUSB1# 21 C9 TV_COMP 4 3 TV_COMP_DOCK
SCD1U16V A B0
93 3 5 2
2
D_RTGP1 VCC GND
15,49 TMDS_EZ4_TX0- 94 4 D_RTGP1 30 6 S B1 1 TV_COMP_SYS 16
15 DVI_EZ4_HPD 64 33 RN83
63 34 D_TGP2 D_TGP2 30 1 8 TV_COMP
D_RTGN1 49 DIS_COMP TV_LUMA
15,49 TMDS_EZ4_TX0+ 95 5 D_RTGN1 30 49 DIS_LUMA 2 7
4 96 6 3 6 TV_CRMA U4 NC7SB3157P6X-U 4
D_TGN2 49 DIS_CRMA
66 35 D_TGN2 30 4 5
15 EZ4_DVI_DDC_D 65 36 TV_LUMA 4 3 TV_LUMA_DOCK
A B0
15,49 TMDS_EZ4_TXC+ 97 7 FOR LINK LED (GREEN) SRN0-1-U 5 VCC GND 2
15,49 TMDS_EZ4_TXC- 98 8
D_TGP3
10M_LED# 29,30 Dummy when use UMA 6 S B1 1 TV_LUMA_SYS 16
34 EZIN_EM# 1 2 68 37 D_TGP3 30
R498 1KR2 67 38 D_TGN3 D_TGN3 30
15 EZ4_DVI_DDC_C SC 0309
99 9 PSTROB#
PSTROB# 58
100 10 PAUTOFD# U5 NC7SB3157P6X-U
PAUTOFD# 58
70 39 RN93
33 DOCK_LIN_R DOCK_JACK_IN TV_CRMA TV_CRMA_DOCK
33 DOCK_MIC_JKIN 69 40 DOCK_JACK_IN 33 1 8 4 A B0 3
TV_COMP_DOCK 101 11 PPD0 2 7 TV_LUMA 5 2
TV_LUMA_DOCK PERROR# 13 UMA_LUMA TV_CRMA VCC GND
102 12 PERROR# 58 13 UMA_CRMA 3 6 6 S B1 1 TV_CRMA_SYS 16
72 41 SPDIF 32,33 4 5 TV_COMP
13 UMA_COMP
33 DOCK_LIN_L 71 42 RI1#_5 37
TV_CRMA_DOCK 103 13 PPD1
PINIT#
SRN0-1-U Dummy when no EZ4
104 14 PINIT# 58
33 SPKR_R_DOCK 74 43 DTR1_BOUT1_5 37 Dummy when use Discrete TV_COMP
TV_LUMA
1 8
33 DOCK_EXT_MIC 73 44 CTS1#_5 37 2 7
105 15 PPD2 SC 0308 TV_CRMA 3 6
CRT_R_DOCK 106 16 PSLCTIN# 4 5
PSLCTIN# 58
76 45 SOUT1_5 37 0R0402-PAD
75 46 RTS1#_5 37 DOCK_ON_2# 1 R15 2 DOCK_TV_ON# RN84 SRN0-1-U
33 SPKR_L_DOCK CRT_G_DOCK
CRT_B_DOCK
107 17 PPD3
PPD4
Dummy when use EZ4
108 18
16 EZ4_HS 78 47 Function CRT TV
77
109
110
48
19
20
PPD5
PPD6
SIN1_5 37
DSR1#_5 37 CRT SWITCH 5V_S0
SYSTEM H H
3 3
16 EZ4_CRT_DDC_D 80 49 DCD1#_5 37 DOCK L L
1
16 EZ4_VS 79 50
5V_S0 12 PCIE_RXP0 111 21 PPD7 C4 U7 NC7SB3157P6X-U
112 22 PACK# SCD1U16V
12 PCIE_RXN0 PACK# 58
2
82 51 CRT_G_1 4 3 CRT_G_DOCK
PS2_KDAT 34 A B0
16 EZ4_CRT_DDC_C 81 52 PS2_KCLK 34 5 VCC GND 2
113 23 PBUSY 6 1 CRT_G_SYS 16
PBUSY 58 S B1
114 24 PPE
PPE 58
84 53 PS2_MDAT 34 RN86
83 54 1 8 CRT_R_1
SC 0309 3 SMBC_SB_EZ4 PS2_MCLK 34 49 DIS_R
12 PCIE_TXP0 115 25 PSLCT 2 7 CRT_G_1
PSLCT 58 49 DIS_G
1
12 PCIE_TXN0 116 26 3 6 CRT_B_1

R501 SUSON LUSB2# 21 49 DIS_B NC7SB3157P6X-U
86 55 3D3V_S0 4 5 U8
1KR2 3 SMBD_SB_EZ4 MAINON ?10K PULL TOO SLOW - 0324
34 EZ_PWROK 85 56 R5 1 10KR22
117 27 SRN0-1-U CRT_B_1 4 3 CRT_B_DOCK
A B0
SC 0309 118 28
1 R6 D2 Dummy when use UMA 5 2
2
2 1 VCC GND
88 57 1KR2 6 S B1 1 CRT_B_SYS 16
3 PCIRST_BUF# 15,18,26,28,29,31
34 PE_REQ1# 87 58
2 BAT54-1
3 CLK_PCIE_DOCK1 119 29 CLK_PCIE_DOCK2 3
3 CLK_PCIE_DOCK1# 120 30 CLK_PCIE_DOCK2# 3
12 PCIE_RXN1 90 59 PCIE_TXP1 12 RN85
12 PCIE_RXP1 89 60 PCIE_TXN1 12 1 8 CRT_G_1
13 UMA_G CRT_B_1 NC7SB3157P6X-U
123 122 2 7 U6
13 UMA_B CRT_R_1
124 121 DOCK_AD+ 13 UMA_R 3 6
4 5 CRT_R_1 4 3 CRT_R_DOCK
A B0
125 5 VCC GND 2
SRN0-1-U 6 1 CRT_R_SYS 16
S B1
FOX-CONN120-2-GP Dummy when use Discrete 0R0402-PAD
2 20.80591.120 DOCK_ON_2# 2
SB 0127 1 R7 2 DOCK_CRT_ON#
Dummy when no EZ4
ME : 20.80591.120 SC 0308 RN87 SRN0-1-U
3D3V_S5 CRT_G_1 1 8
CRT_B_1 2 7
CRT_R_1 3 6
4 5
1
3D3V_S5
R499
Function LAN 5V_S0
Dummy when use EZ4
10KR2 3D3V_S5
SYSTEM L EZIN_EM#
1
U58 DOCK H U40C
14
10
18,21,34,38,39,43,44,55 PM_SLP_S3#
2
DOCK_IN 1 5 R508
A VCC 10KR2
DY EZ_PWROK 2 CTS1#_5 3D3V_S5 9 8 MAINON
B
3
SIN1_5 EZIN_EM#
2
1
EZIN_EM# 1 Q24 DOCK_ON_2# DSR1#_5 U40B
14
3 GND Y 4 DOCK_ON_1 30
4
CHT2222A R500 DCD1#_5 TSLCX125
R507
7
3
1MR2 NC7SZ08-U
2
1 21 Q25 21,34,44 PM_SLP_S5# 5 6 SUSON

CHT2222A SOUT1_5
2
DTR1_BOUT1_5
2
10KR2 RI1#_5 TSLCX125
7
RTS1#_5
<Variant Name> Dummy when no EZ4

1 1
Dummy when no EZ4
4
3
2
1
4
3
2
1
RC14 RC15
Wistron Corporation
5
6
7
8
5
6
7
8
Title
SRC100P50V-U SRC100P50V-U
EASY PORT4 (1/2)
A3
Bolsena -1
Dummy when no EZ4 Date: Thursday, March 31, 2005 Sheet 57 of 58
A B C D E
PRINT PORT
PPD3
57 PPD[7..0]
PSLCTIN#
37 EZ4_PD[7..0]
PPD2
PINIT#
PSLCT
5V_S0 PPE
RN9 PBUSY
37 PRINIT#_5 1 8 PINIT# D30 PACK#
PINIT# 57
EZ4_PD2 2 7 PPD2 1 2 PRN5V 1 2 C685
3 6 PSLCTIN# SCD1U16V
37 SLCTIN#_5 PSLCTIN# 57
EZ4_PD3 4 5 PPD3 CH751H-40-U
4
3
2
1
4
3
2
1
1 2 C669 RC13 RC11
SRN33 RP5 SCD1U16V
RN11 EZ4_PD1 1 10
1 8 PACK# ERROR#_5 2 9 PRINIT#_5
37 PRNACK#_5 PACK# 57
2 7 PBUSY EZ4_PD0 3 8 EZ4_PD2
PBUSY 57
5
6
7
8
5
6
7
8
37 BUSY_5 PSLCT AUTOFD#_5 SLCTIN#_5
37 SLCT_5 3 6 PSLCT 57 4 7
4 5 PPE 5 6 EZ4_PD3 SRC100P50V-U SRC100P50V-U
37 PE_5 PPE 57
SRN33 SRP1K
37 STROB#_5 1 R511
2 PSTROB#
33R2 PSTROB# 57
PSTROB#
RP6 PPD6
RN10 PE_5 1 10 PPD7
1
EZ4_PD4 1 8 PPD4 SLCT_5 2 9 EZ4_PD4 PPD5
EZ4_PD5 2 7 PPD5 BUSY_5 3 8 EZ4_PD5 PPD4 C660
EZ4_PD7 3 6 PPD7 PRNACK#_5 4 7 EZ4_PD6 PPD1 SC100P50V2JN
2
EZ4_PD6 4 5 PPD6 5 6 EZ4_PD7 PERROR#
PPD0
SRN33 SRP1K PAUTOFD#
RN8
37 AUTOFD#_5 1 8 PAUTOFD# STROB#_5 1 R512 2
PAUTOFD# 57
4
3
2
1
4
3
2
1
EZ4_PD0 2 7 PPD0 1KR2 RC10 RC12
EZ4_PD1 3 6 PPD1
4 5 PERROR#
37 ERROR#_5 PERROR# 57
Place near Dock1
SRN33
5
6
7
8
5
6
7
8
SRC100P50V-U SRC100P50V-U
For EMI
Place near Dock1
Dummy when no EZ4

cap. between moat
(for UMA RGB signal)
1D2V_S0 1D8V_S0 5V_S0
C961 C962 C963

1 2 1 2 1 2
SCD1U16V SCD1U16V SCD1U16V
<Variant Name>
SB 0213
Wistron Corporation
Title
EASY PORT4 (2/2)
A3
Bolsena -1

Wistron BOLSENA-Acer Aspire 5020 PDF

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Wistron BOLSENA-Acer Aspire 5020 PDF

Uploaded by

Copyright:

Available Formats

5 4 3 2 1

See 'TEXT' in 0MEMO or 1MEMO property in component

Dummy when use '10/100' 200-PIN DDR SODIMM

ATA 133 18,19,20,21,22

Date: Thursday, March 31, 2005 Sheet 2 of 58

R261 CLKREQ1# SRCT2

HTT for CPU sideA HTT for CPU sideB

1D2V_S0 U81A 1D2V_HT0B_S0

1 R176 2 49D9R2F CPUHTTCTLIN1 R27 N25

DDRVTT_SENSE AE13 D17

AF16 SCD1U SC1000P50V2KX

VREF_DDR_MEM MEMZP VTT_B

C440 C439 M_DATA63 A16

M_DATA58 MEMDATA59 MEMCLK_L6 M_CLK5

M_DATA36 L1 H5 M_ARAS# M_ARAS# 8,9

M_DATA33 MEMDATA34 MEMWEA_L

M_DATA31 MEMDATA32 MEMBANKA1 M_ABS#0

M_DATA29 AC1 E13 RSVD_M_AA15

SCD1U SC1000P50V2KX M_DATA27 W2 E10 M_AA13

R198 M_DATA26 MEMDATA27 MEMADDA13 M_AA12

M_DATA22 MEMDATA23 MEMADDA9 M_AA8

M_DQS6 A8 N1 CB6 TP60 TPAD30

1 R193 2 NC_C18 C18

SRN680-U DY DY NC_AF22 NC_AF23 2D5V_S0

Validation Test Points

REVERSE TYPE 9.2MM

199 186 199 186 Title

SERIES DAMPING PARALLEL TERMINATION

LAYOUT:Place close to Power Pin of DDR socket.

LAYOUT:Place at end of the DIMMs 2D5V_S3 2D5V_S3

CLAW HAMMER TO NB NB TO CLAW HAMMER

HYPER TRANSPORT CPU I/F

CPUCADOUTJ0 AC28 C29 NB0CADOUTJ0

4 CPUHTTCLKOUT1 CPUHTTCLKOUTJ1 HT_RXCLK1P HT_TXCLK1P NB0HTTCLKOUTJ1

CHANGE TO 71.RS48M.B0U (VER A22)

PCIE I/F TO VIDEO

1D8V_S0 CHANGE TO 71.RS48M.B0U (VER A22) 1KR2

MEM_VREF R210 DVO_MDA51 DVO_MDA51 15

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

3D3V_S0 AVDD TXACLK+ 5 4

C740 C741 C717

150R5F C768 C767 C765 H18 R590

39 NB_PWRGD B15 F19

3 CLK14_NB A13 OSCIN GFX_CLKN A8 NBSRC_CLK# 3

SC 0308 C259 1 R594 2 NB_OSC_OUT B13

4K7R2 HTTSTCLK 10KR2

NB_SUS_STAT# R595 2 10KR2 SB_CLKP

V27 U8 C261 C263 C304 C301 C299 C305 TC9 C264

VDD_HT17 VDDA_18_4 SC1U10V3KX

A23 M15 1D2V_S0 SC4D7U10V5ZY

VDDHT31 AC30 N18

AC20 VDD_MEM9 VDD_CORE15 R14

C346 C258 C291 C288 AC15 W18

1 VDD_CORE30 D22 <Variant Name> 1

R216 DY B21 W12

R215 1D2V_S0 VDD_CORE47 VDD_CORE31

VDD_CORE44 VDD_CORE34 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

F22 VDD_CORE41 VDD_CORE37 H21

DVI_D_1 3 2 CH7301_DATA 14 29 3D3V_DVI_TVDD_S0

C955 DVI_C_1 4 1 CH7301_CLK 15 20

DVI_AS AVDD BLM11A121S

1 R724 2 140R2F-GP DVI_ISET 35 17 3D3V_S0 C30 C29 C28

Dummy when no EZ4

Layout 15 mil 5V_S0