Branden Willis

J00786902

Digital Logics Lab

Lab #7

Nov. 6, 2018
Objective
Create and test a binary half-adder using AND, OR and NOT logic gates.

THEORY
In this lab we were testing out half adder , which adds two one-bit binary numbers A and B. It

has two outputs, S and C (the value theoretically carried on to the next addition).
COMPONENTS
1 – 74xx04 Hex Inverting Buffer
1 – 74xx08 Quad AND Gate
1 – 74xx32 Quad OR Gate
2 – Light Emitting Diode
2 – Current Limiting Resistor

PROCEDURE
Sketch the schematic for a binary half adder using AND gates, OR gates, and Inverters.Label

each wire with the appropriate number from the IC pinout.Create a theoretical truth table for

half-adder circuit.After verifying the sketch with an instructor or teacher’s aid, assemble the

circuit.Test all input conditions and record the results. I noticed we were using basic gates for

half adder circuits.

CONCLUSION
In conclusion , I constructed and verified a half adder. The table was guidance for putting

together a circuit on a breadboard. A circuit that is combined with an exclusive OR gate made by

the 7486 integrated circuit and the AND gate which is provided by the 7408 integrated circuit

this circuit simulates the addition of two digits in the binary system.