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Kunlong Yang1, Sijian Yuan2, Yiqiang Zhan2, Lirong Zheng2, Fernando Seoane 3-5
1 School of Engineering Sciences in Chemistry, Biotechnology and Health, KTH Royal Institution of Technology, Stockholm,
Sweden. Email: kunyan@kth.se
2State Key Laboratory of ASIC and System, SIST, Fudan University, Shanghai, China.
3Department for Clinical Science, Intervention and Technology, Karolinska Institutet, Stockholm, Sweden.
4Department of Biomedical Engineering, Karolinska University Hospital, Stockholm, Sweden
5Swedish School of Textiles, University of Borås, Borås, Sweden.
0
1
Al2O3 2 H2 O/O2 SWCNT
PI -4 0 0
Vd>0
-8 0 0
Au Gate SWCNTs/F8T2 -6 -4 -2 0 2 4 6
V ds (V)
(b)
Fig. 1 (a) Schematic of the artificial synapse. (b) Pinched Ids-Vds Hysteresis loop. And the insets show the working principle.
800
SWCNT
H2 O/O2
400 3
Vd<0 4
I d s(n A )
0
1
2 H2 O/O2 SWCNT
-4 0 0
Vd>0
-8 0 0
-6 -4 -2 0 2 4 6
V ds (V)
characteristics of the device while Vg was set to 0V. The function was realized by training and processing of a
pinched hysteresis loop across the point I=0, V=0 can be neuromorphic network with 26 inputs and three outputs (Fig.
seen as a proof of memristive features [4]. The insets 3a). Thus 3*26 synapses were used to build this neural
illustrate the mechanism. The electrons can be trapped network, and each synapse consisted a differential pair, two
through the H2O/O2 redox couple near the channel-dielectric memristive transistors, one for potentiation and the other for
interface and induce electrical screen of the gate electrical depression, to make synaptic weights swing around zero. In
field thus change the channel current [5]. The population of this neuromorphic network, the Manhattan update rule was
trapped electrons was affected by the gate electrical field. chosen for training the system and updating synapse weights.
The long detrapping time was the source of the memory Fig. 3b shows the evolution of the outputs after each learning
44 Vds-write=-5V
epoch. After about 5 epochs, the system reached saturation
Vds-write=4V and correctly recognized each pattern (as an example, pattern
22 ‘A’ corresponds to outputs (0.85, -0.85, -0.85)) thus
Vds(V)
Vds-read=-0.1V
Vds (V)
-2 V write =4V
2
Conclusion
0
Vds(V)
-2
10
12 implemented based on a memristive transistor. The
|Ids| (nA)
Input Output
Weights Training
neurons neurons
Fig. 3a) Single-layer perceptron to classify 5*5 binary images. b) Classification results with training epochs.