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DC Reactor Type Transformer Inrush Curre PDF
DC Reactor Type Transformer Inrush Curre PDF
Abstract: A new inrush current limiter (ICL) is presented to limit the inrush current of transfor-
mers. The proposed ICL consists of three similar sets. Each set includes a diode-bridge and a
single DC reactor and is connected in series with the individual phases of transformer. The ICL
has almost no effect on normal operation of transformer. It needs no control, measurement and
gate driving system and has a simple power circuit topology. The equivalent instantaneous induc-
tance of transformer is used for analysis of circuit operation. The theoretical analysis, design
features, power losses and voltage distortion because of using ICL are presented. The proposed
method has been tested by simulation and laboratory experiments. Both results show that the pro-
posed ICL successfully limits the inrush current.
because they are almost negligible for large transformers where r ¼ rS þ rd þ re , L ¼ LS þ Ld þ Le . rS and LS stand
u1 for equivalent resistance and inductance of source and trans-
LM ¼ (3) mission line. From (5), the current equation in charging
diM =dt mode between t0 to t2 is shown by
Considering (3), it is possible to obtain LM by using the
(r=L)(tt0 ) V 2VDF
measured instantaneous primary and secondary windings i(t) ¼ e sin(vt0 u) þ
currents and primary winding voltage in the transformer z r
(6)
[8]. Considering this fact that the inrush current is a result V 2VDF
of the transformer core saturation shows that the iron core þ sin(vt u)
z r
alternates between the saturation and non-saturation p 2 2
during the inrush current. This will result in a drastic vari- where: z ¼ ðr þ (Lv) Þ, u ¼ tan1 (Lv=r), i(t0) ¼ 0,
ation of the IMI, as shown in Fig. 2b. In this figure, LNS i(t) ¼ id (t)
is the magnetising inductance when the iron core is not satu- The discharging mode begins at t ¼ t2 when the inrush
rated and LSa corresponds to a high degree of saturation in current reaches to its maximum value. As shown in
the iron core. Therefore the IMI variation is an inherent Fig. 4a, during this mode the inrush current is less than
feature of the inrush current, which can be used to detect DC reactor current and all of diodes turn on because of
and modelling the inrush current. In Fig. 2a, Zpr stands for charged current in DC reactor. Indeed, the DC reactor is
0 0
the primary side impedance and Z sec and Z load stand for short circuit by diodes and it has no effect on circuit oper-
the secondary and load impedances referred to primary ation as shown in Fig. 3b. In discharging mode, we have
side, respectively. The equivalent impedance of transformer
and load is as follows did (t)
Ld þ rd id (t) þ 2VDF ¼ 0 (7)
0 0
dt
Ze ¼ re þ jvLe ¼ {(Zsec þ ZLoad )k(jvLM )} þ Zpr (4)
4 Circuit analysis
1. Charging,
2. Discharging.
From (7), the DC reactor current in discharging mode is Using (12), it is possible to calculate the desired value of
Ld as follows
2V 2V
id (t) ¼ e(rd =Ld )(tt2 ) i2 þ DF DF (8) rT =4
rd rd Ld ¼ LS Le
ln (ðri2 VDS þ 2VDF Þ=ðVDS þ 2VDF )Þ
where i(t2) ¼ i2 . (13)
In this mode for inrush current we have
where T stands for period of power frequency.
di (t) Fig. 5 shows a typical characteristic of maximum inrush
V sin(vt) ¼ riL (t) þ L L (9) current magnitude against DC reactor inductance (using the
dt
data of simulation results in next part). This figure shows
At t ¼ ta , LM changes its value from LSa to LNS again. So that increasing of Ld results in decreasing of maximum
from (9) the inrush current between t2 and ta is inrush current. Obviously, the suitable value for Ld
depends on electrical parameters of utility and transformer.
From practical point of view, to avoid saturation effect
(r=L)(tt2 ) V
iL (t) ¼ e i2 sin(vt2 u) and getting the suitable value of Ld , the DC reactor may
z have a core with an air-gap or a non-saturated iron core.
(10)
V A non-saturated iron core (linear reactor) is used for analyti-
þ sin(vt u) cal, simulation and experimental results.
z
Obviously, it is possible to use a single-phase parallel
p circuit breaker with each phase of proposed ICL to bypass
where r ¼ rS þ re , L ¼ LS þ Le , z ¼ ðr2 þ (Lv)2 Þ, u ¼
1 it during steady-state operation of transformer and cancel-
tan (Lv=r), i(t2 ) ¼ i2 .
ling any possible voltage distortion and power loss of pro-
After t ¼ t2 and limiting inrush current by DC reactor, the
posed ICL [10]. However, the following parts describe the
DC reactor discharges because of its resistance and the
voltage distortion and power loss considerations of pro-
voltage drops of diodes and at t ¼ t3 the reactor current
posed ICL.
reaches again to load current as shown in Fig. 4b.
Fig. 6a shows the load voltage with proposed ICL. This
Between t2 and t3 , the DC reactor has no effect on circuit
figure shows a voltage distortion that is because of DC
operation because there is not any charging mode in its
reactor resistance and voltage drop on diodes. Fig. 6b
operation. Similarly, after t ¼ t3 , the ICL has almost no
shows the total harmonic distortion (THD) against resist-
effect on circuit operation because the DC reactor carries
ance of ICL for various value of VDF . This figure shows
almost DC current. So, the proposed ICL limits the inrush
that the THD increases by increasing the resistance of DC
current without any considerable effect on steady-state
reactor and VDF but it is in acceptable ranges for small
circuit operation.
values of rd . Fig. 6 is obtained by using parameters of
‘simulation results’ part of this article.
5 Design considerations
VDS 2VDF
i(t) ¼ 1 e(r=L)(tt0 )
r (11)
(r=L)(tt )
þ i0 e 0
L ri VDS þ 2VDF
t2 t0 ¼ ln 2 (12) Fig. 5 Maximum inrush current against inductance of DC
r VDS þ 2VDF
reactor
IET Electr. Power Appl., Vol. 1, No. 5, September 2007 811
From economical point of view, there are five basic items
that should be considered for all power-electronic-based
circuits:
Fig. 6 Distortion of load voltage with proposed ICL in steady 6 Simulation results
state
The simulation results are obtained by PSCAD/EMTDC
By considering a DC current with negligible ripple software [11] for three-phase power circuit topology of
through DC reactor as shown in Fig. 4b during steady Fig. 7. The parameters are given in Appendix 1.
state (after t3) we have
ir ’ 0 ¼) IDC ’ Imax (14)
where, ir , IDC and Imax stand for ripple current in DC
reactor, the average current in DC reactor and the
maximum of utility current in steady state, respectively.
In this way, the DC reactor power loss PDC is
2 2
PDC ¼ rd IDC ¼ rd Imax (15)
For power loss of diodes, Fig. 3a shows that in charging Fig. 7 Simulated power circuit topology
mode two diodes are in series and their current is IDC
(neglecting ripple current). In discharging mode all of
diodes are on and we have
IDC ¼ [iD1 (t) þ iD2 (t)] ¼ [iD3 (t) þ iD4 (t)] (16)
By assuming a constant VDF , the average power loss of
diode-bridge PBridge is
PBridge ¼ 2VDF IDC (17)
The total power loss of ICL in each phase would be the sum
of (15) and (17) and is
PTotal ¼ IDC [rd IDC þ 2VDF ] (18)
For example for a 20/0.4 kV transformer with primary rated
current Irms ¼ 50 (A), power factor ¼ 0.9 and installation of
ICL in high-voltage side with parameters rd ¼ 0.01 (Ohm)
and VDF ¼ 3 (V) we have
3PTotal
PTotal ¼ 474W ¼) ¼ 0:0009
PLoad
This shows that the power losses of proposed ICL are very
small percentage of overall distribution feeder rated power
PLoad and it can be acceptable for most of practical
applications. Fig. 8 Primary side current of transformer