AOT7S65L/AOB7S65L/AOTF7S65L/AOTF7S65

650V 7A α MOS TM Power Transistor

General Description Product Summary

The AOT7S65L & AOB7S65L & AOTF7S65L & AOTF7S65 VDS @ Tj,max 750V
have been fabricated using the advanced αMOS high
TM
IDM 30A
voltage process that is designed to deliver high levels of RDS(ON),max 0.65Ω
performance and robustness in switching applications.
Qg,typ 9.2nC
By providing low RDS(on), Qg and EOSS along with guaranteed
Eoss @ 400V 2µJ
avalanche capability these parts can be adopted quickly into
new and existing offline power supply designs.

100% UIS Tested

100% Rg Tested

Top View
TO-263
TO-220 TO-220F D2PAK D

D D

G
S S S
D D S
G G G
AOT7S65 AOTF7S65(L) AOB7S65

Absolute Maximum Ratings TA=25°C unless otherwise noted

Parameter Symbol AOT7S65L/AOB7S65L AOTF7S65 AOTF7S65L Units
Drain-Source Voltage VDS 650 V
Gate-Source Voltage VGS ±30 V
Continuous Drain TC=25°C 7 7* 7*
ID
Current TC=100°C 5 5* 5* A
C
Pulsed Drain Current IDM 30
Avalanche Current C IAR 1.7 A
Repetitive avalanche energy C EAR 43 mJ
Single pulsed avalanche energy G EAS 86 mJ
TC=25°C 104 35 27 W
PD
Power Dissipation B Derate above 25oC 0.8 0.3 0.2 W/ oC
MOSFET dv/dt ruggedness 100
H dv/dt V/ns
Peak diode recovery dv/dt 20
Junction and Storage Temperature Range TJ, TSTG -55 to 150 °C
Maximum lead temperature for soldering
J
purpose, 1/8" from case for 5 seconds TL 300 °C
Thermal Characteristics
Parameter Symbol AOT7S65L/AOB7S65L AOTF7S65 AOTF7S65L Units
Maximum Junction-to-Ambient A,D RθJA 65 65 65 °C/W
A
Maximum Case-to-sink RθCS 0.5 -- -- °C/W
Maximum Junction-to-Case RθJC 1.2 3.6 4.7 °C/W
* Drain current limited by maximum junction temperature.

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 Electrical Characteristics (TJ=25°C unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

STATIC PARAMETERS
ID=250µA, VGS=0V, TJ=25°C 650 - -
BVDSS Drain-Source Breakdown Voltage
ID=250µA, VGS=0V, TJ=150°C 700 750 - V
VDS=650V, VGS=0V - - 1
IDSS Zero Gate Voltage Drain Current µA
VDS=520V, TJ=150°C - 10 -
IGSS Gate-Body leakage current VDS=0V, VGS=±30V - - ±100 nΑ
VGS(th) Gate Threshold Voltage VDS=5V,ID=250µA 2.6 3.3 4 V
VGS=10V, ID=3.5A, TJ=25°C - 0.54 0.65 Ω
RDS(ON) Static Drain-Source On-Resistance
VGS=10V, ID=3.5A, TJ=150°C - 1.48 1.64 Ω
VSD Diode Forward Voltage IS=3.5A,VGS=0V, TJ=25°C - 0.82 1.2 V
IS Maximum Body-Diode Continuous Current - - 7 A
ISM Maximum Body-Diode Pulsed CurrentC - - 30 A
DYNAMIC PARAMETERS
Ciss Input Capacitance - 434 - pF
VGS=0V, VDS=100V, f=1MHz
Coss Output Capacitance - 30 - pF
Effective output capacitance, energy
Co(er) - 23 - pF
related H
VGS=0V, VDS=0 to 480V, f=1MHz
Effective output capacitance, time
Co(tr) - 80 - pF
related I
Crss Reverse Transfer Capacitance VGS=0V, VDS=100V, f=1MHz - 1 - pF
Rg Gate resistance VGS=0V, VDS=0V, f=1MHz - 17.5 - Ω
SWITCHING PARAMETERS
Qg Total Gate Charge - 9.2 - nC
Qgs Gate Source Charge VGS=10V, VDS=480V, ID=3.5A - 2.5 - nC
Qgd Gate Drain Charge - 2.7 - nC
tD(on) Turn-On DelayTime - 21 - ns
tr Turn-On Rise Time VGS=10V, VDS=400V, ID=3.5A, - 14 - ns
tD(off) Turn-Off DelayTime RG=25Ω - 55 - ns
tf Turn-Off Fall Time - 15 - ns
trr Body Diode Reverse Recovery Time IF=3.5A,dI/dt=100A/µs,VDS=400V - 224 - ns
Irm Peak Reverse Recovery Current IF=3.5A,dI/dt=100A/µs,VDS=400V - 19 - A
Qrr Body Diode Reverse Recovery Charge IF=3.5A,dI/dt=100A/µs,VDS=400V - 2.8 - µC
A. The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. L=60mH, IAS=1.7A, VDD=150V, Starting TJ=25°C
H. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS.
I. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS.
J. Wavesoldering only allowed at leads.

APPLICATIONS OR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT
ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE
PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

14 12

10V 7V
12 10
7V 10V
10 6V
6V
8
5.5V
8

ID (A)
ID (A)

5.5V 6
6 5V
4
4 5V VGS=4.5V
2
2 VGS=4.5V

0 0
0 5 10 15 20 0 5 10 15 20

VDS (Volts) VDS (Volts)

Figure 1: On-Region Characteristics@25°C Figure 2: On-Region Characteristics@125°C

100 1.5
VDS=20V -55°C
1.2
10
RDS(ON) (Ω)

125°C 0.9
ID(A)

1 VGS=10V

0.6

0.1 25°C
0.3

0.01 0.0
2 4 6 8 10 0 3 6 9 12 15

VGS(Volts) ID (A)
Figure 3: Transfer Characteristics Figure 4: On-Resistance vs. Drain Current and Gate
Voltage

3 1.2
Normalized On-Resistance

2.5
VGS=10V
ID=3.5A 1.1
BVDSS (Normalized)

1.5 1

1
0.9
0.5

0 0.8
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
Temperature (°C) TJ (oC)
Figure 5: On-Resistance vs. Junction Temperature Figure 6: Break Down vs. Junction Temperature

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1.0E+02 15

1.0E+01
12 VDS=480V
125°C ID=3.5A
1.0E+00
9
1.0E-01

VGS (Volts)
25°C
IS (A)

1.0E-02 6

1.0E-03
3
1.0E-04

1.0E-05 0
0.0 0.2 0.4 0.6 0.8 1.0 0 3 6 9 12 15
VSD (Volts) Qg (nC)
Figure 7: Body-Diode Characteristics (Note E) Figure 8: Gate-Charge Characteristics

10000 5

1000 Ciss 4
Capacitance (pF)

Eoss(uJ)

100 3
Coss Eoss

10 2

Crss
1 1

0 0
0 100 200 300 400 500 600 0 100 200 300 400 500 600

VDS (Volts) VDS (Volts)

Figure 9: Capacitance Characteristics Figure 10: Coss stored Energy

100 100

RDS(ON) RDS(ON) 10µs

10 10µs 10
limited limited
100µs
ID (Amps)

100µs
ID (Amps)

1 1
1ms 1ms
DC
10ms DC 10ms
0.1 0.1 0.1s
TJ(Max)=150°C TJ(Max)=150°C 1s
TC=25°C TC=25°C
0.01 0.01
1 10 100 1000 1 10 100 1000
VDS (Volts) VDS (Volts)
Figure 11: Maximum Forward Biased Safe Figure 12: Maximum Forward Biased Safe
Operating Area for AOT(B)7S65L (Note F) Operating Area for AOTF7S65 (Note F)

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

100 100

RDS(ON) 10µs 80
10 limited

EAS(mJ)
100µs
ID (Amps)

60
1
1ms
40
DC 10ms
0.1 0.1s
20
TJ(Max)=150°C 1s
TC=25°C
0.01 0
1 10 100 1000 25 50 75 100 125 150 175
VDS (Volts) TCASE (°C)
Figure 13: Maximum Forward Biased Safe Figure 14: Avalanche energy
Operating Area for AOTF7S65L (Note F)

6
Current rating ID(A)

0
0 25 50 75 100 125 150
TCASE (°C)
Figure 15: Current De-rating (Note B)

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TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

10
D=Ton/T In descending order
ZθJC Normalized Transient

TJ,PK=TC+PDM.ZθJC.RθJC D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

Thermal Resistance

RθJC=1.2°C/W
1

0.1
PD
0.01
Single Pulse Ton
T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10

Pulse Width (s)

Figure 16: Normalized Maximum Transient Thermal Impedance for AOT(B)7S65L (Note F)

10
D=Ton/T In descending order
ZθJC Normalized Transient

TJ,PK=TC+PDM.ZθJC.RθJC D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

Thermal Resistance

1 RθJC=3.6°C/W

0.1
PD
0.01
Ton
Single Pulse T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100

Pulse Width (s)

Figure 17: Normalized Maximum Transient Thermal Impedance for AOTF7S65 (Note F)

10
D=Ton/T In descending order
ZθJC Normalized Transient

TJ,PK=TC+PDM.ZθJC.RθJC D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

Thermal Resistance

1 RθJC=4.7°C/W

0.1
PD
0.01
Ton
Single Pulse T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100

Pulse Width (s)

Figure 18: Normalized Maximum Transient Thermal Impedance for AOTF7S65L (Note F)

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 Gate Charge Test Circuit & Waveform

Vgs
Qg

+ 10V
VDC
+ Vds Qgs Qgd
- VDC

DUT -
Vgs

Ig

Charge
Res istive Switching Test Circuit & Waveforms
RL
Vds
Vds

90%
DUT
+
Vgs VDC Vdd
Rg -
10%

Vgs Vgs t d(on) tr t d(off) tf

t on t off

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms

L 2
Vds EAR= 1/2 LI AR BVDSS

Id Vds

Vgs + Vdd I AR
Vgs VDC

Rg - Id

DUT
Vgs Vgs

Diode Recovery Tes t Circuit & Waveforms

Vds + Qrr = - Idt

DUT
Vgs

Vds - L Isd IF trr

Isd dI/dt
+ IRM
Vgs Vdd
VDC
Vdd
Ig
- Vds

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