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Digital Stopwatch Using 7 Segment display
Respected Madam,
We, the students of section A, were given a task to write a short report of the subject technical
report writing. In this report we have written about the Digital stopwatch. We also had written
about 7 segment and its decoder. 7 segment are widely used in the many digital components.
We hope that our report fulfills your need for the required data.
Sincerely,
Muhammad Umair
Muhammad Ali
Khubaib Ahmed
Moazzam Rasool
Ziagham illyas
1 Introduction:
Digital counters are needed everywhere in this digital world, and 7 segment display is one the
best component to display the numbers. Counters are needed in products counters, digital
stopwatches, calculators, timers etc. A digital stopwatch can be a circuit displaying the actual
time in minutes, hours and seconds or a circuit displaying the number of clock pulses. Here we
design the second type wherein the circuit displays count from 0 to 59, representing a 60
second time interval. In other words here the circuit displays the time in seconds only. This is a
simple circuit consisting of a 555 timer to produce the clock pulses and two counter ICs to carry
out the counting operation.
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1.1 Objectives:
2 Literature Review:
3 Methodology
A digital timer circuit was designed using a 555 timer, BCD4510 binary counters and 7 segment
display outputs. The proposed circuit was modelled using Proteaus and Digital Works, showing
that the concepts used in the design were sound. The circuit was then implemented and tested
on breadboard before a PCB implementation was prepared.
In the project circuit, the astable configuration is implemented. A square wave output is generated with
the configuration shown below, mainly by the use of an external capacitor charging and discharging.
Comparator circuits internal to the timer, compare the supply voltage and capacitor charge to produce
either a HIGH or LOW switching output. The duty cycle and frequency of the output pulses can be set
using external resistors and a capacitor.
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3.2 CD4033 counters
CD4033 is a Johnson counter IC commonly used in digital display. It has a 5 stage Johnson
decade counter with decoder which convert the Johnson code to a 7 segment decoded output.
Means it will convert the input into numeric display which can be seen on 7 segment display or
with the help of LED's.
Advantage of this IC is it can be operated at high voltage of 20V. But is highly sensitive, can
detect emf present in the atmosphere and is sensitive to static charge also. When you touch
your finger at its input terminal its counter get started therefore care should be taken while
using it. It can be used in various application like in 7 segment decimal display circuit, in clocks,
timer etc. To understand its working first have a look on its pin diagram.
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3.3 7 segment display
Seven segment displays are an arrangement of LEDs that simply accept a digital input to display
a digit from 0 to 9. The digits are made up of seven individually illuminated slots to display the
digits. The display can also illuminate a decimal point. Seven segment displays are one of the
oldest electronic methods for displaying numeric information but also one of the simplest.
There are two types of seven segment displays, common cathode and common anode displays.
In a common cathode display, the cathodes of the LEDs are joined together and the individual
segments illuminated by HIGH voltages. In a common anode display, the anodes of the LEDs are
joined together and the individual segments illuminated by LOW voltages. In this project,
common cathode seven segment displays were used, with the joined cathode connected to
ground.
4 Working
In this project we are using BCD4510 consists of a 5 stage Johnson decade counter and an output
decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a
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numerical display. This device is particularly advantageous in display applications where low power
dissipation and/or low package count is important. A high RESET signal clears the decade counter to its
zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT
signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high.
The CLOCK INHIBIT signal can be used as a negative-edge clock if the clock line is held high. Anti lock
gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (C-
out) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding
decade directly in a multi-decade counting chain. The seven decoded outputs (a, b, c, d, e, f, g) illuminate
the proper segments in a seven segment display device used for representing the decimal numbers 0 to
9. The 7 segment outputs go high on selection.
6 Conclusion:
Analogue electronics components were investigated and a 555 timer, a BCD counter, a BCD Decoder and
a seven segment display were combined to form a digital timer circuit. Different methods were analysed
to determine the best technique for creating an efficient timer until one was chosen and the circuit was
designed. The chosen circuit was verified through simulation using PSpice and Digital Works. This design
was then implemented and modified to suit the needs of the project. Problems were analysed and
repaired where necessary until it was concluded that the circuit had met the design criteria of the
project. Once the correct operation of the circuit was verified, a PCB implementation was designed in
order to make the circuit more concise and more accurate.
The PCB implementation did not perform as planned. Time restrictions meant that only track
connectivity issues on the PCB were investigated and while several problems were identified, correcting
these issues did not lead to normal operation of the circuit.
7 Acknowledgements:
This work would not be possible without my all group members. I am grateful to all with whom I
have had a pleasure to work during written this report. Each of the member of my report would
give me data on time and taught me well about this report. Special regards Hasnat Hassan.
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8 References:
1.Badri Ram, D.N. Vishwakarma, (2011)“Power system protection and switch gear” second
edition.
2.. Guo, X. Jiang, B. Chen, J. Mu. (2015) “Interruption Simulation at Different Arc Times For a
Puffer Type 252kV SF6 Circuit Breaker.”
3.Langstaff HAP, BP Baker (1943) Transactions of the American Institute of Electrical Engineers.
6.T. Ushio and Other (1971) “Practical Problems on SF6 Gas Circuit”