8086 microprocessor is a 16 bit microprocessor i.e.

its mostly operations are designed to work with 16

bit binary words.
PIN DIAGRAM of 8086 :
It is 40 pin I.C.

It has 16 bit data bus and 20 bit address bus. It

can perform bit, byte, word and string with
arithmetic and logical operations.
It operates in two modes:
1. Maximum mode
2. Minimum mode
Maximum mode

1. • Pin 1,20 (GND) : Connected to ground.

2. • Pin 2-16 (AD14-AD0), Pin 39 (AD15) : It
is Address/ Data Bus. It is bidirectional Input/
Output. Both address/data bus exist in Time
Multiplexed Mode.
3. • Pin 17 (NMI) : It is Non-Maskable Interrupt
reque
4. • Pin 18 (INTR) : It is interrupt control signal.
It is level triggered interrupt request. It is used
for hardware interrupt.
5. • Pin 19 (CLK) : It is clock input. It is used for
basic timing for various operation.
6. • Pin 21 (RESET) : When it is high it causes
microprocessor to terminate current activity and
start execution from FFFF0H.
7. • Pin 22 (READY) : It is active high input
signal from slow devices to inform the mp that
they have completed data transfer.
8. • Pin 23 (TEST) : It is unidiirectional control
input signal. It is examined by WAIT instruction.
If it is 1 then WAIT instruction waits for TEST to
become 0.
9. • Pin 24,25 (QS1,QS0) : It is Queue Status
signal. It is output signal. It reflect the status of
instruction queue in previous clock cycle. QS0
QS1 Status 0 0 No operation 0 1 First byte of
opcode from the queue 1 0 Empty the queue 1
1 Subsequent byte from the queue
10. • Pin 26-28 (S0-S2) : It is status line
which indicate type of operation. S2 S1 S0
CHARACTERISTICS 0 0 0 Interrupt acknowledge
0 0 1 Read I/O port 0 1 0 Write I/O port 0 1 1
Halt 1 0 0 Code access 1 0 1 Read memory 1 1
0 Write memory 1 1 1 Passive state
 11. • Pin 29 (LOCK) : It is input signal. It lock
peripherals off the system.
12. • Pin 30-31 (RQ/ GT 0-1) : It is Bus
Request/ Grant signal. It indicate function of
current bus cycle. It is similar to HOLD & HLDA.
13. • Pin 32 (RD) : It is read signal. The data
bus is receptive to data from memory I/ O
devices.
14. • Pin 33 (MN/MX) : It is
Minimum/Maximum mode. If it is high, then mp
is in minimum mode operation. If it is low, then
mp is in maximum mode.
15. • Pin 34 (BHE/S7) : It is Bus High
Enable/Status. It enables most significant data
bus bit during read/write.
16. • Pin 35-38 (A19-16, S6-3) : It is
Address/Status bus. It is unidirectional output
bus. A17/S4 A16/S3 FUNCTION 0 0 Extra
segment access 0 1 Stack segment access 1 0
Code segment access 1 1 Data segment access
17. • Pin 40 (Vcc) : Connected to +5V DC.

Minimum mode:
1. INTA : It is Interrupt Acknowledgement
output pin. It indicate interrupt request is
recognized.
2. HOLD : It is input control signal.
Microprocessor gives up control of buses to
DMA controller.
3. HLDA : It is Hold Acknowledgement signal.
If it is high, it indicate that request is granted.
4. ALE : It is Address Latch Enable control
signal. It is output signal.
5. DEN : It is Data Enable control signal. It
activate external data bus buffer.
6. DT/R : It is Data Transmit/Receive control
signal. If it is high, processor transmit the data.
If it is low, processor receive the data.
7. M/IO : It is Memory/ Input-Output control
signal. If it is high, then data transfer occurs
from memory otherwise from input-output
device.
8. WR : It is write control signal. If it is low
then data write into memory or I/O device &
memory bus contains valid address. It supports
multiprogramming. It use pipelining concept so
that it can fetch up to six instruction bytes from
memory and store in a queue.