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Introduction to Electronic Devices, Fall 2006, Dr. D.

Knipp

Introduction to Electronic Devices


(Course Number 300331) Fall 2006
Diode Information:
http://www.faculty.iu-
Dr. Dietmar Knipp bremen.de/dknipp/
Assistant Professor of Electrical Engineering
Source: Apple

Ref.: Apple

Ref.: IBM

Critical
10-8 10-7 10-6 10-5 10-4 10-3 10-2 10-1 1 101 dimension (m)
Ref.: Palo Alto Research Center

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3 Diodes
3.1 Introduction
3.2 Pn-junctions at zero bias
3.2.1 Semiconductor in Thermal Equilibrium
3.2.2 Pn-junctions in thermal equilibrium
3.2.3 The Space Charge Region
3.2.4 The Built-in voltage
3.2.5 Field and Potential Distribution
3.3 Pn-junctions under bias conditions
3.3.1 Diode under forward bias
3.3.2 The law of the Junction
3.3.3 Splitting of Quasi Fermi levels
3.3.4 The Shockley model of the pn-junction
3.3.4.1 The abrupt pn-junction
3.3.4.2 Carrier concentration at the boundaries
3.3.4.3 Low Injection
3.3.4.4 Constant current densities in the depletion region
3.3.5 Minority carrier in the neutral region of a pn-junction
3.3.6 Ideal diode equation
3.3.7 The asymmetric pn-junction / p+n diode

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.4 Deviations from the ideal Diode


3.4.1 Influence of Generation
3.4.2 Avalanche Breakdown
3.4.3 Influence of Recombination
3.4.4 Influence of High Injection
3.4.5 Series resistance and bulk region effects
3.4.6 Experimental behavior under forward bias
3.5 Equivalent circuits of a pn-junction
3.5.1 Series resistance
3.5.2 Shunt / leakage resistance
3.5.3 Differential Resistance
3.5.4 Differential Capacitance
3.5.4.1 Depletion capacitance
3.5.4.2 Diffusion capacitance

3.6 Hetero junctions


3.7 Metal Semiconductor Contacts
3.7.1 The Schottky Diode
3.7.2 The Ohmic Contact

References

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.1 Introduction
This chapter will deal with pn-junctions, metal-semiconductor junctions
(Schottky diodes) and ohmic contacts. Pn-junctions are of importance for
several modern electronic devices like diodes (e.g. Optical detectors, solar
cells, light emitting diodes, laser diodes), bipolar transistors, thyristor and field
effect transistors. In the following the operating principle of pn-junctions will be
discussed starting from the semiconductor materials. The ideal diode equation
will be derived. Furthermore, an equivalent circuit for pn-junctions will be
presented.
The main characteristic of a pn-junction or a diode is that for positive voltages
(forward bias) the diode is conduction, whereas for negative voltages (reverse
bias) the current flow is blocked. Due to this properties a diode can be used for
several applications like rectifiers, sampling circuits, demodulators, logic gates
and so on.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.1 Introduction
A silicon pn-junction can be realized by the formation of a junction between an
n-type and a p-type doped region. The junction can be formed by the
implantation or diffusion of dopants in an wafer. For example a silicon pn-
junction can be formed by the implantation of boron atoms in an n-type silicon
wafer.

Dopant concentration

p-type Silicon p+
Acceptors
n-type Silicon
Depth
n
Donors

Silicon pn-junction: (left) Fabricated by the implantation or diffusion of boron


atoms into an n-type (phosphorus doped) silicon wafer. (middle) Concentration
of donors and acceptors in the wafer. (right) Cross section of a pn-junction.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2 Pn-junctions at zero bias


3.2.1 Semiconductor in Thermal equilibrium
In order to understand the operating principle of a pn-junction we will start with
two separate n-type and p-type semiconductors. For the p-type semiconductor
the Fermi level is close to the valence band, whereas for the n-type
semiconductor the Fermi level is close to the conduction band.
In our case we assume that the
semiconducting materials are silicon
and the bandgaps for both pieces of
materials are equal. In this case we
speak about a homo-junction.
As the Fermi level in both pieces of
silicon is constant, the
semiconductors are in thermal
equilibrium.

Separated and uniformly doped p-type


and n-type semiconductors in thermal
equilibrium. Ref.: M.S. Sze, Semiconductor Devices
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.2 Pn-junctions in thermal


equilibrium F
When the p-type and the n-type semi-
conductors are jointed together a carrier
concentration gradient is observed at the
interface of the n- and p- region. The
gradient leads to the diffusion of carriers.
The diffusion occurs because the
concentration of electrons in the n-type
semiconductor is much higher than the
concentration of electrons in the p-type
semiconductor. The opposite behavior is
observed for the holes. The hole
concentration in the p-type semiconductor is
Formation of a space charge
much higher than the hole concentration in
region and energy band
the n-type semiconductor. Consequently,
diagram of a pn-junction in
holes from the p-side diffuse towards the n-
thermal equilibrium.
side and vice versa. Despite the flow of
electrons and holes the device is still in
Ref.: M.S. Sze, Semiconductor Devices
thermal equilibrium.
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.2 Pn-junctions in thermal equilibrium


Since holes leave the p-type region the negative acceptor ions near the junction
are left uncompensated and a space charge region is formed. This means that
the acceptor ions are localized, whereas the holes are mobile in the valence
band. The same applies for the electrons in the conduction band. The electrons
diffuse towards the interface and the localized donor states are uncompensated
in the p-type semiconductor. As a consequence a space charge region is
formed. In this particular case free carriers get removed from the space charge
region and the region gets depleted (depletion region).

p+ - + n

Charge SCR Charges in the space


ρ charge region of a pn-
junction at zero bias.
+ Position
x
-

-xp 0 xn

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.2 Pn-junctions in thermal equilibrium

The localized charges (acceptor


and donor ions) create a
potential barrier that prevents
more electrons and holes from
moving towards the space
charge region. As a
consequence of the distribution
of carriers throughout the pn-
junction an electric field is
created that maintains drift
fluxes of electrons and holes in
opposite direction. Therefore, a Energy band diagram of a pn-junction
drift current and a diffusion (silicon pn-junction) at zero bias.
current is flowing.

Ref.: M.Shur Introduction to Electronic Devices

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.2 Pn-junctions in thermal equilibrium


An equilibrium is reached, when the Fermi level throughout the entire sample
becomes constant. Since the semiconductor is still in thermal equilibrium (no
additional excitation of carriers and no temperature gradient throughout the
sample is assumed) the overall current flow through the sample is zero,
meaning the current flow for each position in the pn-junction is zero.
Therefore, the electron and the hole current has to be zero. This can only be
achieved if the drift current is equal to the diffusion current for each spatial
position throughout the device. This means that the current caused by the
electric field is compensated by the current caused by the carrier gradient. This
relationship can be derived from the current density equation for the electrons
and the holes (Homework).

The drift current is equal to the diffusion current


jn = 0 jndrift = − jndiff
for electrons in thermal equilibrium

The drift current is equal to the diffusion current


jp = 0 j drift
p = − j diff
p for holes in thermal equilibrium

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.2 Pn-junctions in thermal equilibrium


At zero bias the drift current (caused by the electric field) and the diffusion
current (caused by the gradient of the carrier concentration) compensate each
other. Therefore:

 dn  dEFn
jn = q ⋅  nµ n F + Dn  = qµ n n =0
 dx  dx
 dp  dEFp
j p = q ⋅  pµ n F − D p  = qµ p p =0
 dx  dx

The Fermi level is constant throughout the sample independent of the spatail
position.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.3 The Space Charge region

Let’s now have a closer look at the


carrier concentrations in the different
regions of the device. Far away from
the pn-junction the carrier
concentration in the n-region is given
by:

ni2
nn ≈ N D , pn =
ND
The carrier concentration in the p-
region is given by:

ni2
pp ≈ N A, np =
NA Energy band diagram and carrier
concentration for a silicon pn-junction
Ref.: M.Shur, Introduction to Electronic Devices
at zero bias.
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.3 The Space Charge region


In our model an abrupt transition
from a p-type to a n-type semi-
conductor (step junction) is p+ - + n
assumed. Further, it is assumed that
the charges in the space charge Charge SCR
ρ
region are determined by the
localized ions. The influence of free Position
+
charges on the charge distribution
Space x
are negletable. Therefore, - charge
ρ=0
− xp < x < 0 ρ p = −qN A
-xp 0 xn
0 < x < xn ρ = qN D
n

Due to charge neutrality the charge Charges in the space charge


per unit area in the p-region has to region of a pn-junction at zero
be equal to the charges per unit area bias.
in the n-region, so that

N A x p = N D xn Charge neutrality

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.4 The Built-in voltage


Vbi
In the next step the built-in
voltage is introduced. The
built-in voltage is the internal p+ - + n
voltage of a diode as a
consequence of the SCR
formation of a space charge Potential Energy
region. The built-in voltage ϕ E
is the difference between
EC
the bulk potential in the n-
Vbi
type and the p-type regions.
Further, the built-in voltage Ei
can be extracted from the 0 EF0 ϕbp
bending of the bands in the ϕbn
space charge region. EV

Vbi = ϕbn − ϕbp


Position
-xp 0 xn x
Built-in voltage
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.4 The Built-in voltage


By using the expression previously derived for the bulk potential,

 ND   NA 
ϕbn ≈ Vth ⋅ ln  ϕbp ≈ −Vth ⋅ ln 
 ni   ni 
the build-in voltage can be described as a function of the doping concentrations.

 ND N A 
Vbi ≈ Vth ⋅ ln 2
 Built-in voltage
 ni 

Therefore, the built-in voltage is determined by the product of the donor and
acceptor concentration. The intrinsic carrier concentration can be substituted by

 Eg 
ni = N C NV ⋅ exp −  Intrinsic carrier concentration
 2kT 

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.4 The Built-in voltage


so that the built-in voltage can be
described by the following equation,

Eg N N 
Vbi ≈ + Vth ⋅ ln D A 
q  N C NV 
Built-in voltage

where ND is the Donor and NA is


the acceptor concentration, NC and
NV are the effective densities of
states in the conduction and the
valence band. In order to increase
the build-in voltage the doping Influence of the acceptor concentration
concentration can be increased. on the build-in potential of a pn-junction.
This is for example of interest for
specific applications like solar cells. Ref.: M.Shur, Introduction to Electronic Devices

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.5 Field and Potential Distribution


The diode is still unbiased. In the next step the Poisson equation will be used to
calculate the electric field and the potential distribution for a silicon diode in
thermal equilibrium. The Poisson equation is given by

dF d 2ϕ 1
=− 2 = ρ Poisson Equation
dx dx ε 0ε r
Let’s start with the semiconductor material outside of the space charge region.
The charges outside of the space charge region are zero, ρ=0, so that the electric
field distribution is zero
Fn = Fp = 0 for x < − x p and x > xn
and subsequently the potential distribution for this region of the device results to

ϕ =0 for x < − x p and x > xn

Within the space charge region the space charge density is given by

ρ = q( p − n + N D − N A ) for − x p < x < xn


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3.2.5 Field and Potential Distribution


The space charge density for the p-type and the n-type regions of the depletion
region is given by
− qN A for − x p < x < 0
ρ = Space charge density
 qN D for 0 < x < xn
It is assumed that the pn-junction is an abrupt junction, so that the acceptor and
donor concentrations are constant throughout the p-region and the n-region of the
space charge region. This approximation is called depletion approximation. Based
on the depletion approximation the electric field can be calculated by

 qN A
 − for − xp < x < 0
dF  ε S
=
dx  qN D for 0 < x < xn
 ε S
Here, x=0 corresponds to the boundary between the p-type and the n-type region
and xp and xn are the depletion widths on both sides of the junction.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.5 Field and Potential Distribution


After the integration the electric field is given by

  x 
− Fm ⋅ 1 +  for − x p < x < 0
  xp 
F = Electric field distribution
 − F ⋅ 1 − x  for 0 < x < x
 m   n
  xn
where Fm is the maximum electric field. Further, it is assumed that F(x=-xp)=0 and
F(x=xn)=0. The maximum electric field is observed for Fm=F(x=0), where
qN D xn qN A x p
Fm = =
εS εS
so that electric field distribution results to

− ε ⋅ (x p + x ) for − x p < x < 0


 qN A
F = S Electric field distribution
qN D
 − ⋅ ( xn − x ) for 0 < x < xn
 εS
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.5 Field and Potential Distribution


The potential distribution is obtained by the integration of the electric field.
 qN A (x + x p )
2

− ϕ (− x p ) + for − x p < x < 0


 2ε S
ϕ = Potential distribution
 ϕ (x ) − qN D ( x − xn )2
for 0 < x < xn
 n
2ε S

where ϕ(-xp)=Vbi and ϕ(xn)=0. Due to charge neutrality, xpNA=xnND, the built-in
voltage can be calculated by
2
qN D xn2 qN A x p
Vbi = +
2ε S 2ε S

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.2.5 Field and Potential Distribution


Combining the expression for the charge neutrality with the built-in voltage
leads to the following terms for the width of the depletion region:

2ε S ND 1 Width of the space charge region in the


xp = ⋅ Vbi ⋅ ⋅ p-type semiconductor
q N A N A + ND
2ε S NA 1
xn = ⋅ Vbi ⋅ ⋅ Width of the space charge region in the
q ND N A + ND n-type semiconductor
The overall width of the depletion region is given by:

w = xn + x p

2ε S N + ND Width of the overall space charge


w= ⋅ Vbi ⋅ A region
q N A ⋅ ND
Again, it is obvious that these equations only apply for zero bias. Otherwise the
width of the depletion region has to be a function of the applied bias.

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3.2.5 Field and Potential Distribution


ρn
Summary of the Field and Potential Distribution

− qN A for − x p < x < 0


ρ = ρp ρ=0
 qN D for 0 < x < xn
-xP xn
Space charge density

− ε ⋅ (x p + x ) for − x p < x < 0


 qN A
F = S
qN D
− ⋅ ( xn − x ) for 0 < x < xn
 εS
-xP xn
Electric field distribution

 qN A (x + x p )
2

− Vbi + for − x p < x < 0


 2ε S
ϕ =
qN D ( x − xn )
2
 for 0 < x < xn
 2ε S -xP xn
Potential distribution
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3 Pn-junctions under bias conditions


What happens if we apply a voltage to a pn-junction? Before deriving a model for
a pn–junction under bias voltages the phenomenological behavior of the diodes
will be discussed. Under positive bias the diode operates in forward operation.
The build-in voltage of the diode is lowered and the width of the space charge
region is reduced. The opposite behavior is obtained for reverse bias. Here, the
internal electric field distribution is increased and the space charge region is
widened.
Forward Reverse
bias bias

Forward and reverse biasing of a pn junction: A positive (negative) voltage is


applied to the pn-junction which decreases (increases) the potential barrier
between the n- and the r-region. Ref.: M.S. Sze, Semiconductor Devices
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.1 Diode under forward bias


Due to the reduced electric field under forward bias the depletion region is
getting smaller and the diffusion and drift currents are reduced. The total
current is not zero anymore. The diffusion current is not completely
compensated by the drift current. The diffusion current is getting the dominate
current. Under non-thermal equilibrium more electrons flow from the n-region
to the p-region and more holes flow from the p-region to the n-region. As a
consequence a net current flow can be observed, which is a diffusion current.
There is an injection of electrons in the p-region and an injection of holes in the
n-region. The carrier concentration in the space charge region is not in thermal
equilibrium anymore. The quasi Fermi levels start to split up.

Depletion layer width and energy diagram of a pn-junction under two different
biasing conditions. (left) Thermal equilibrium, (right) Forward bias.
Ref.: M.S. Sze, Semiconductor Devices

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.2 The law of the Junction


An external voltage violates therium balance between the drift and the diffusion
current in thermal equilibrium. However, for small currents the net current is still
much smaller than the drift current and the diffusion current in the depletion
region. Therefore, the carrier concentration is still close to the equilibrium state
and the electron and hole densities can be described by the quasi Fermi levels.
Under forward bias the quasi Fermi levels shift towards the bands (injection of
carriers). Under such conditions the carrier concentration is given by

 EF(n ) − EC 
n = N C ⋅ exp  Quasi electron concentration
 kT 
 EV − EF( p ) 
p = NV ⋅ exp  Quasi hole concentration
 kT 
Under thermal equilibrium the quasi Fermi levels for electrons and holes are
identical, so that the Fermi potential is identical for electrons and holes. Under
non-equilibrium conditions EF(n) is not equal to EF(p) and both might be a function
of the position and the time.
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3.3.2 The law of the Junction


The splitting of the quasi Fermi levels
can be expressed in terms of the
applied bias.
qV = EFn − EFp
Using the pn product
(n ) ( p)
 E − E 
p ⋅ n = ni ⋅ exp
2 F F

 kT 
The following expression is
calculated for the product of
electrons and holes under quasi-
thermal equilibrium Energy band diagram for a silicon pn-
junction under zero bias (top) and
 qV  Law of forward bias (bottom). –xp and xn define
p ⋅ n = ni2 ⋅ exp 
 kT  the junction the boundary conditions between the
depletion and the neutral region. EFn
and EFp are nearly constant within the
Ref.: M.Shur, Introduction to Electronic Devices depletion region.
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.2 The law of the Junction


The splitting of the Fermi level occurs
not only in the depletion region of the
diode. The splitting exceeds into the n-
and the p-region of the pn-junction.
As a consequence of the splitting of the
Fermi levels the concentration of carriers
in the band is changed. The carrier
concentration is given by the law of the
junction.

 EFn − EFp 
n p = n p 0 ⋅ exp  Energy band diagram for a silicon
 kT  pn-junction under forward bias
(bottom). Note that the length
scale for the two band diagrams is
different.

Ref.: M.Shur, Introduction to Electronic Devices


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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.3 Splitting of Quasi


Fermi levels
The majority carrier
concentration in the p- and
the n-region is given by:
p p ≈ p p0 ≈ N A
nn ≈ nn 0 ≈ N D
The minority carrier
concentration at the
boundary x=-xp is given by
 qV 
n p = n p 0 ⋅ exp 
 kT 
ni2  qV 
= ⋅ exp 
NA  kT 

Energy band diagram and carrier concentration for


Ref.: M.S. Sze, Semiconductor Devices
a forward and reverse biased diode.
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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.3 Splitting of Quasi Fermi levels


and the minority carrier concentration at the boundary x=xn is given by
2
 qV  ni  qV 
pn = pn 0 ⋅ exp  = ⋅ exp  
 kT  N D  kT 
Under forward bias conditions V>0, so that the minority carrier concentration is
higher than the minority carrier concentration in thermal equilibrium. Under
reverse bias conditions V<0, so that the minority carrier concentration is lower
than the minority carrier concentration in thermal equilibrium.

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3.3.4 The Shockley model of the pn-junction


In order to derive an analytical model for a pn-junction the following
assumptions are introduced in order to simplify the description:
(1) An abrupt pn-junction is assumed. The semiconductor is neutral outside
of the space charge region.
(2) The carrier densities at the boundaries are related to the potential
distribution.
(3) Low injection conditions are assumed, which means that the injected
minority carrier density is small in comparison to the majority carrier
density. The changes of the majority carrier concentration at the
boundaries of the neutral regions can be ignored.
(4) Neither generation nor recombination takes place in the depletion region
and the electron and hole current densities are constant throughout the
depletion region.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.4 The Shockley model of the pn-junction


The assumptions of the Shockley model are illustrated in the figure.

Ref.: M.Shur, Introduction to Electronic Devices

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3.3.4.1 The abrupt pn-junction


Most of the applied voltage V will drop across the depletion region, because the
number of carriers, which contribute to the current flow, is lowest in the depletion
region. The remaining voltage will drop across the neutral region. The voltage
drop across the neutral regions will lead to a band bending in the neutral regions.
As the majority carrier concentrations in the neutral regions are very high, it can
be assumed that the voltage drop across the neutral regions is small in
comparison to the voltage drop across the depletion region.
For forward bias the applied voltage Vf is opposing the built-in voltage of the
diode. The potential across the space charge region is lowered by the applied
voltage. Therefore, the voltage drop across the space charge region of the pn-
junction in forward bias is given by VSCR=Vbi-Vf. In thermal equilibrium it is
VSCR=Vbi.
For reverse bias the applied voltage Vr the potential across the space charge
region is increased by the applied voltage. Therefore, the voltage drop across the
space charge region of the pn-junction in reverse bias is given by VSCR=Vbi+Vr.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.4.2 Carrier concentration at the boundaries


The carrier concentration at the boundary is given by the previously derived
equations. The important equations are here the expressions for the minority
carrier concentration.
The minority carrier concentration at the boundary x=-xp is given by

 qV 
n p = n p 0 ⋅ exp 
 kT 
The minority carrier concentration at the boundary x=xn is given by
 qV 
pn = pn 0 ⋅ exp  
 kT 
Therefore, the minority carrier concentration under bias (non-thermal equilibrium)
is expressed in terms of the carrier concentration under thermal equilibrium.

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3.3.4.3 Low Injection


In the following low injection is assumed. Under such conditions the quasi Fermi
levels will be very close to the Fermi level under thermal equilibrium. Based on
the assumption of quasi charge neutrality we introduced the quasi Fermi levels.

nn − nn 0 ≈ pn − pn 0 ∆n ≈ ∆p Quasi Charge neutrality

Low injection assumes now that the change of the minority carrier concentration
is smaller than the majority carrier concentration in thermal equilibrium. As a
consequence Fermi level for the majority carriers is assumed to be identical with
the Fermi level under thermal equilibrium.

∆pn < nn 0 EFn ≈ EF Low injection

Under the assumption of high injection the concentration of minority carriers is


getting that larger, so that the Fermi level of the majority carriers can not be
described by the Fermi level in thermal equilibrium anymore.

∆pn > nn 0 High injection

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.4.4 Constant current densities in the depletion region


Furthermore, Shockley assumed in his model of the pn-junction that generation
and recombination of carriers in the space charge region can be ignored. As a
consequence the electron and hole current densities are constant in the depletion
region. This assumption is reasonable if the diffusion length is much larger than
the width of the depletion region. As a consequence the current densities
throughout the device can be described by the current densities at the boundaries
between the neutral region and the space charge region.

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Introduction to Electronic Devices, Fall 2006, Dr. D. Knipp

3.3.4.5 Minority carriers in the neutral region of a pn-junction


Shockley assumed in his model (4. Shockley assumption) that the current
density in the space charge region is constant. As a consequence the
current densities in the space charge region can be described by the
current densities at the boundary between the neutral region and the space
charge region.
In a first step the carrier concentration in the neutral regions will be
calculated. The carrier concentration can be calculated by solving the
continuity equation.

∂F ∂pn ∂ 2 pn Continuity equation


pn µ n + µn F + Dn +G−R =0 for holes
∂x ∂x ∂x 2

The continuity equation can be simplified by assuming the diffusion current


to be the dominant current contribution. The drift current plays a minor role.
Therefore, it can be assumed that the contributions of the applied electric
field is ignored. Furthermore, it can be assumed that the generation rate G
is zero, so that the equation results to.
∂ 2 pn
Dn 2
−R=0
∂x
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3.3.5 Minority carriers in the neutral region of a pn-junction


To solve the differential equation we need a description of the
recombination rate. In the following we will assume band-to-band
recombination, which is the dominate recombination mechanism for indirect
semiconductors like silicon. In general band-to-band recombination is
described by the following recombination equation.

( )
R = A ⋅ np − ni2 = A ⋅ (nn pn − nn 0 p p 0 ) Recombination equation

The recombination rate is determined by the minority carrier concentrations,


which in our case is given by the concentration of the holes in an n-type
semiconductor. If holes are minority carriers (n=np<< p ≈ NA=pp, where NA
is the concentration of shallow acceptors (complete ionization)) the
recombination rate is given by:
pn − pn 0
R= Recombination rate
τ pl
The parameter tpl is the hole lifetime. The resulting equation is called the
Diffusion equation.

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3.3.5 Minority carriers in the neutral region of a pn-junction


The diffusion equation is usually stated for the minority carrier concentration.

∂ 2 pn pn − pn 0 Diffusion equation for holes


Dp − =0 (minority carriers)
∂x 2
τ pl
∂ 2n p np − n p0 Diffusion equation for electrons
Dn − =0
∂x 2 τ nl (minority carriers)

The Diffusion equation can be solved by using the following general solution.

 x−x   
pn ( x ) − pn 0 = A ⋅ exp n  + B ⋅ exp − x − xn 
 D pτ pl   D pτ pl 
   
To simply the equation the Diffusion Length for minority carriers is introduced.

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3.3.5 Minority carriers in the neutral region of a pn-junction

L p = D pτ pl Hole diffusion length

Ln = Dnτ nl Electron diffusion length

So that the general solution of the Diffusion equation results to

 x − xn   x − xn 
pn ( x ) − pn 0 = A ⋅ exp  + B ⋅ exp − 
 L   L 
 p   p 
The following boundary conditions can be used to determine the constants
A and B:
 qV 
pn ( x = xn ) = pn 0 ⋅ exp 
 kT 
pn ( x → ∞ ) = pn 0
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3.3.5 Minority carriers in the neutral region of a pn-junction


The following solution can be obtained by considering the boundary conditions:
  qV    x − xn 
pn ( x ) − pn 0 = pn 0 ⋅ exp  − 1 ⋅ exp − 
  kT   L 
 p 
The solution states that the minority
carrier concentration depends on
the applied bias voltage and the

Carrier Concentration (cm-3)


distance from the boundary. The
applied bias voltage directly controls
the minority carrier concentration at
the boundary between the neutral
region and the space charge region.

Electron (thin line) and hole (thick


line) concentration in a silicon pn-
junction for zero bias (solid lines ) and
forward bias (dashed lines).
Ref.: M.Shur, Introduction to Electronic Devices

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3.3.5 Minority carriers in the neutral region of a pn-junction


The variation of the carrier concentration is not noticeable on the scale of the
space charge region. The carrier concentrations decays on a scale determined by
the diffusion length.

3.3.6 Ideal diode equation


In the next step the current density for the holes in the neutral region is calculated
by
dp
j p = qµ p pF − qD p ⋅ Current density for holes
dx
The drift contribution can be neglect due to the dominance of the diffusion
current. Accordingly the following expression is obtained:

dpn qD p pn 0   qV    x − xn 
j p ≈ j pD = − qD p =  exp  − 1 ⋅ exp − 
dx L p   kT    LP 

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3.3.6 Ideal diode equation


The 3. Shockley assumption can be used to calculate the overall current follow
in the neutral region. If a quasi neutral semiconductor is assumed the quasi
charge neutrality condition applies:
∆n ≈ ∆p Quasi Charge neutrality
Quasi charge neutrality leads to the following relationship between the gradients
of the minority carrier concentration.
∂n p ∂p ∂ 2n p ∂ 2 pn
≈ n and ≈
∂x ∂x ∂x 2 ∂x 2
By using this simple relationship the electron diffusion current can be correlated
with the hole diffusion current.
∂nn ∂p D
jnD = qDn ≈ qD p n = − n j pD
∂x ∂x Dp
So that the total diffusion current jD in the n-type neutral region becomes
  qV    x − xn 
⋅ (D p − Dn )⋅ exp
qpn 0
jD = j pD + jnD ≈−  − 1 ⋅ exp − 

Lp   kT    L p 
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3.3.6 Ideal diode equation


The total current density in the neutral region is equal to the sum of the electron
diffusion current density and the hole diffusion current density.
We still get a function that varies with the distance from the boundary due to
recombination. However, the overall current of a diode is independent of the
position. Furthermore, the current density scales with the electron and the hole
diffusion length. The diffusion length is typically much larger than the width of
the depletion region
Ln >> xn + x p L p >> xn + x p
Therefore, the hole and the electron diffusion current densities remain nearly
constant throughout the depletion region. The total current density is given by

j = j pD + jnD x=− x p
x = xn

where jpD and jnD are the hole and the electron diffusion current densities at the
boundaries.

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3.3.6 Ideal diode equation

Injected minority carrier distribution


and current density distribution for a
forward biased (a) and a reverse
biased diode (b). The figures are
drawn based on the Shockley
assumptions. In reality the current
density is not constant throughout the
depletion region.

Ref.: M.S. Sze, Semiconductor Devices


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3.3.6 Ideal diode equation


The current is finally given by
 qD p pn 0 qDn n p 0    qV  
j = +  ⋅ exp
  − 1
 L 
Ln    kT  
 p
The equation can be rewritten in the form:

 D p ni2 Dn ni2    V  
j = q ⋅ +  ⋅ exp  − 1
V 
 L p N D Ln N A 
    th  
Leading to the Shockley / ideal diode equation

 Dp D   V  
I= qAni2 ⋅ + n  ⋅ exp  − 1
V 
Ideal diode equation /
L N L N  Shockley equation
 p D n A   th  

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3.3.6 Ideal diode equation


The current is finally given by

 V    Dp D 
I = I S ⋅ exp  − 1 IS = qAni2 ⋅ + n 
L N 
  Vth    p D Ln N A 
Ideal diode equation / Saturation current
Shockley equation

Current voltage curve using a linear (a) and a semilog (b) plot.

Ref.: M.S. Sze, Semiconductor Devices

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3.3.6 Ideal diode equation

Adding

Equations width of the space charge region

Carrier, electric field and potential distribution under biasing conditions

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3.3.7 Asymmetry pn-junction / p+n diode


In the case of a asymmetric pn-junction the analytical description of the diode
has to be modified. The example of a short p+-n diode will be discussed in the
following. P+ indicates that the doping concentration in the p-region is much
higher than the doping concentration in the n-region.
Furthermore, the overall diode is very short and the width of the n-type
depletion region is limited by the extension of the n-region. The overall width of
the n-region is given by Xn. The description of a short pn-diode is important for
the analysis of the bipolar transistor.

p-type Silicon Xn Short pn-junction


n-type Silicon with a highly
doped p-region.
Insulator
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3.3.7 Asymmetry pn-junction / p+n diode


In such a case the solution of the diffusion equation is given by

  qV    X n − x 
pn ( x ) − pn 0 ≈ pn 0 ⋅ exp  − 1 ⋅  
  kT    X n − xn 

and the hole concentration in the n-type region can be approximated by a


linear function of x. The overall current is given by

∂p qD p pn 0   qV  
j ≈ qD p n = ⋅ exp  − 1
∂x x = xn X n − xn   kT  
The electron diffusion current can be ignored, because the hole
concentration is much higher due to the highly doped p-region.

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3.4 Deviations from the ideal Diode


In many cases the ideal diode equation does not accurately describe the
current-voltage characteristic of a pn-junction diode in forward and reverse
bias. The deviations from the ideal diode equation will be discussed in the
following. The reasons for the deviations are the following:

Reverse Bias:
•Generation
•Avalanche Breakdown

Forward bias:
•Recombination
•High injection
•Series resistance and
bulk region effects Comparison of the ideal diode equation with a
non-ideal model of a diode.
Ref.: T. Fjeldly, T. Ytterdal, M. S. Shur, Introduction to device modeling and circuit simulation

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3.4.1 Influence of Generation


The generation current becomes important under reverse bias conditions. In
such a case the carriers in the depletion region are extracted due to the
applied reverse electric field. The carrier concentration can be described by:
p⋅n  V 
2
= exp − q  << 1
ni  kT 
In thermal equilibrium the thermal generation of electron-hole pairs is
balanced by the thermal recombination (G=R) of carriers. Under reverse
bias, the concentration of holes and electrons in the depletion region is low.
The recombination rate is close to zero (R≈0). Due to thermal activation
electron-hole pairs are continuously created.
The generation rate can be described by
ni
Gthermal = Generation rate
τ gen
where τgen is the effective generation time of an electron-hole pair in the
depletion region.

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3.4.1 Influence of Generation


As the saturation velocity of the carriers is in the order of 105 m/s
and the width of the depletion region is in the order of a few
microns, the transit time of the carriers under reverse bias is in the
order of 10ps.
The generation time varies between ms and ns, so that generation
time is the limiting the generation current and not the transit time.
The width of the depletion region under bias can be calculated by:

2ε s (Vbi − V ) 2ε s (Vbi − V )
xn = xp =
qN D (1 + N D N A ) qN A (1 + N D N A )

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3.4.1 Influence of Generation


The generation current in the depletion
region is given by

ni
jGen = q ⋅ w ⋅
τ gen

Generation current (A)


Generation current

where w is the width of the depletion


region w=xp+xn.
The generation current scales with the
intrinsic carrier concentration, which
depends on the bandgap of the
Energy Gap (eV)
material. As a consequence the
generation current for a silicon diode is Generation current (per µm3) versus
much higher than the generation current the energy gap.
of a GaAs diode.
Ref.: M.Shur, Introduction to Electronic Devices

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3.4.1 Influence of Generation


The charge is swept out of the depletion region by the electric field. The time
to sweep out the generated electrons and holes is given by
w
ttr ≈ Transit time
vs
where vs is the saturation velocity of the carriers. As the saturation velocity of
the carriers is in the order of 105 m/s and the width of the depletion region is in
the order of a few microns, the transit time of the carriers under reverse bias is
in the order of 10ps. The generation time varies between ms and ns, so that
generation time is the limiting the generation current and not the transit time.

The reverse current of the diode is calculated by:

I R = I s + I gen = A ⋅ ( jS + j gen ) Reverse current

The reverse current is the sum of the saturation and generation.

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3.4.2 Avalanche Breakdown


When a high reverse voltage is applied to the diode, the junction breaks and
conducts a very large current. Two mechanism lead to the breakdown:
Tunneling and the avalanche multiplication. Here we will concentrate only
on avalanche multiplication. Avalanche breakdown is caused by impact
ionization of electron-hole pairs. When applying a high electric field to the
diode, carriers gain kinetic energy and generate additional electron-hole pairs
through impact ionization.

Energy band diagrams


under junction-breakdown
conditions. (a) Tunneling
effect (b) Avalanche
multiplication.

Ref.: M.S. Sze, Semiconductor Devices

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3.4.2 Avalanche Breakdown


The number of electron/hole pairs
generated by an electron per unit distance
is called the ionization rate. The ionization
rate, α, is defined for electrons and holes.
The ionization rate for the electrons and
holes can be experimentally determined.

Measured ionization rate for silicon


and GaAs.
Ref.: M.S. Sze, Semiconductor Devices

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3.4.2 Avalanche Breakdown


In the next step the break down condition has to be derived for a pn-junction. The
break down is observed, if the multiplication of carriers in the space charge
region due to ionization reaches infinity. Accordingly a current can be defined for
which the break down is observed.

I  I 
d  n  =  n 0  ⋅ (α n dx ) Multiplication currrent
q  q 
Based on this equation for the multiplication current the condition for breakdown
can be derived.
w

∫ αdx = 1
0
Breakdown condition

Depletion region in a p-n


junction with multiplication
of an incident current.
Ref.: M.S. Sze, Semiconductor Devices

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3.4.2 Avalanche Breakdown


Based on the breakdown condition and the electric field dependence of the
ionization rate the critical electric field can be calculated for which the diode
breaks down. The break down voltage can be determined by solving the
Poisson’s equation.

FC w ε S FC2
VB = = Breakdown voltage
2 2qN B

Tunneling of charges is observed for high doping concentrations.

Critical electric field at


breakdown as a function of the
doping concentration for
silicon and GaAs (one-sided
abrupt junctions).

Ref.: M.S. Sze, Semiconductor Devices

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3.4.3 Influence of Recombination


Under forward bias conditions (V>0) excess carriers are injected in the depletion
region, where a certain fraction recombines. The recombination current is equal
to the total charge per unit area recombining in the depletion region per second.
If recombination via impurities or traps near the middle of the bandgap is
assumed the recombination current can be described by

 qV 
jrec = jrecs exp  Recombination current
 2 kT 

In reality traps levels may not only exist in the middle of the bandgap, which
leads to the following empirical equation:
 qV 
jrec = jrecs exp  Recombination current
 mr kT 
So that the overall forward current can be described by:
 qV   qV 
jF = js ⋅ exp +
 recs
j ⋅ exp  Forward bias current
 kT   mr kT 
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3.4.3 Influence of Recombination


The diffusion current is proportional to ni2, whereas the recombination current is
proportional to ni, so that the recombination current is getting more important
for large bandgap materials (GaAs, GaN, SiC), where ni is getting small.
For large forward voltages the diffusion current dominates the overall current.
Instead of using the two terms to described the current of a pn-diode in forward
direction the equation can be simplified by

 qV 
I F = I s _ eff ⋅ exp  (Empirical) Forward bias current
 nkT 

where Is_eff is the effective saturation current and n is the ideality factor.
Therefore, the ideality factor varies between 1 and 2 depending on the material
properties and the applied bias voltage. If the ideality factor shifts towards 2 for
higher applied voltages we can conclude that the properties materials are
reduced (materials with higher defect density).

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3.4.4 Influence of High Injection


At high forward bias (the voltage drop across the space charge region is getting
close to the build-in voltage) the injected minority carrier concentration becomes
comparable to the majority carrier concentration. As a consequence the
assumption of low injection is not valid any more. This means that the majority
carrier concentration at the boundary under high forward bias is not equal to the
majority carrier concentration in thermal equilibrium and/or low injection.
To derive an expression for the current we can start with charge neutrality:

p n + N D = nn + N A Charge neutrality

∆ p n + p n 0 + N D = ∆ nn + nn 0 + N A Charge neutrality

Carrier
concentration at
low-level injection
(a) and high-level
injection (b).

Ref.: G.W. Neudeck, The pn Junction diode


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3.4.4 Influence of High Injection


For low injection the following expressions can be derived:

∆pn < nn 0 Low injection


 qV 
p n nn = p n ⋅ N D = ni2 ⋅ exp  
 kT 
ni2  qV   qV 
pn ≈ ⋅ exp   I ∝ exp  
ND  kT   kT 

For high injection the following expressions can


be derived:
∆pn > nn 0 High injection

 qV 
p n nn = p n ⋅ ( N D + pn ) = ni2 ⋅ exp   Diode under forward bias.
 kT 
 qV   qV 
pn ≈ ni ⋅ exp   I ∝ exp  
 2 kT   2 kT  Ref.: G.W. Neudeck, The pn Junction diode
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3.4.5 Series resistance and bulk region effects


The ideal diode model assumes that the voltage drop in the neutral (bulk)
regions is ignored. Furthermore, the voltage drops across the metal
semiconductor interfaces are neglected. This is a very good assumption for
low levels of current. For higher levels of current these assumptions do not
apply anymore. Under high forward bias conditions the voltage drop across
the neutral region has to be considered. Also, the metal semiconductor
interface leads to a small additional voltage drop.

Both effects can be combined in a single series resistance. The I/V curve of a
diode can be described by:

  V − IRS  
I = I S ⋅ exp  − 1
  Vth  

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3.4.5 Series resistance and bulk region effects

For small series resistance the diode behaves like an ideal diode.

Influence of the series resistance on the I/V curve under forward bias.

Ref.: M.Shur, Introduction to Electronic Devices


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3.4.6 Experimental behavior under forward bias


Experimental forward bias currents of
silicon and GaAs pn-diodes are shown
in the graph. For lower bias voltages
the recombination current is dominant
for both diodes, whereas for
intermediate bias levels the
experimental results follow the ideal
diode equation. The diode current is a
pure diffusion current. For higher bias
voltages the overall current of the
diode is determined by high injection
and the series resistance.
As expected the non-ideal behavior is
more pronounced for the GaAs diode,
because the intrinsic carrier
concentration is lower due to the Silicon and GaAs diode under
higher bandgap. forward bias.

Ref.: M.S. Sze, Semiconductor Devices

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3.5 Equivalent circuits of a pn-junction


So far we tried to describe the pn-junction diode by deriving the diode equations
under ideal and non-ideal conditions. This description is essential to understand
the electronic transport of pn-junctions. In order to implement the diode as part of
a complex electronic circuit the diode has to be described in a different way. In
order to implement the diode in a circuit simulator like SPICE the diode has to be
described in the form of an equivalent circuit, which consists of current and
voltage sources, resistors and capacitors. The diode can be described by the
given equivalent circuit, which consists of the following components:

Rshunt • Series Resistance


• Shunt resistance
I(V)
• Differential resistance

Cd(V) Rseries
• Differential capacitance
+ -

Rd(V)

Internal diode
Small signal
equivalent circuit of a pn diode.

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3.5.1 Series resistance


The series resistance is caused by a voltage drop across the neutral regions of
the diode plus the voltage drop cross the contacts and the interconnects. See
as a reference section 3.4.7.2. The series resistance only influences the
admittance or impedance of a diode under high forward voltages. The series
resistance can be extracted from the following equation:

  V − IRS   V − IRs
I = I S ⋅ exp  − 1 + Diode current
  Vth   Rshunt

3.5.2 Shunt / leakage resistance


For practical devices the parallel leakage plays an important role. The leakage
or shunt resistance can be extracted by
V
I leakage = Leakage current
Rshunt
The leakage current is caused by the generation current and leakage effects.
The shunt resistance influences the I/V characteristic under reverse bias.
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3.5.3 Differential resistance


In the next step the differential resistance/admittance can be calculated. In
general the differential resistance is given by:

1 dI
= Gd = Differential resistance
Rd dV
Under reverse bias the differential admittance is

Differential admittance under


Gd ≈ 0 reverse bias
Under forward bias the differential admittance is
1 dI F I S V 
= Gd = = exp 
Rd dV Vth  Vth 
leading to

IF Differential admittance under


Gd = forward bias
Vth
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3.5.4 Differential Capacitance


The differential capacitance of a diode can be divided in two different
contributions: A depletion capacitance and a diffusion capacitance
The depletion capacitance is formed by the majority charges in the pn junction.
The depletion capacitance can be treated as a plate capacitor, where the
distance between the plates corresponds to the width of the depletion region.
Only majority carrier contribute to the depletion capacitance.
The second contribution is caused by the diffusion of carriers. The diffusion
capacitance caused only by the minority carriers. A diffusion capacitance is
observed only for positive voltages, when the minority carriers in the space
charge region exceeds the concentration for thermal equilibrium. In the following
expressions for the depletion and the diffusion capacitors will be derived.

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3.5.4.1 Depletion capacitance


The depletion capacitance of a diode is caused by the majority carriers, which
form the space charge region. The depletion capacitance can be treated as a
capacitance caused by a plate capacitor. The capacitance can be calculated by

εs εs
Cdep = A ⋅ = A⋅ Depletion capacitance of a
w x p + xn symmetric and abrupt pn-junction

where A is area of the diode, w is the width of the depletion region and εs is the
dielectric constant of the semiconductor. The width of the depletion region is the
sum of the depletion region in the n- and the p-region.

Schematic sketch of a pn-


junction including the distribution
of charges and the equivalent
depletion capacitor.

Ref.: M.Shur, Introduction to Electronic Devices

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3.5.4.1 Depletion capacitance


The width of the depletion region can be calculated by

2ε S N 1
xn = ⋅ (Vbi − V ) ⋅ D ⋅ Width of the space charge region
q N A N A + ND in the n-type region

2ε S N 1
xp = ⋅ (Vbi − V ) ⋅ A ⋅ Width of the space charge region
q ND N A + ND in the p-type region

w = xn + x p

2ε S N + ND
⋅ (Vbi − V ) ⋅ A
Width of the overall space
w= charge region
q N A ⋅ ND

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3.5.4.1 Depletion capacitance


Leading to the following expression of the depletion capacitance

dQd qε s N A N D
Cdep = =A Depletion capacitance
dV 2 ⋅ ( N A + N D ) ⋅ (Vbi − V )

The depletion capacitance is usually written in the following form

qε s N A N D 1 Cj
Cdep =A ⋅ =
2( N A + N D ) ⋅ Vbi 1 − V Vbi 1 − V Vbi
where Cj is the junction capacitor, which is independent of the applied
voltage. Therefore, the depletion capacitance of an abrupt pn-junction is
proportional to

1 1 − V Vbi

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3.5.4.1 Depletion capacitance


For large variations of the doping profile the voltage dependence of the depletion
capacitance has to be considered, which leads to the following empirical
equation of the depletion capacitance, where m is the grading coefficient.

C j0
Cdep = Depletion capacitance
(1 − V Vbi )
m

Calculated depletion capacitance of


a silicon diode.

Ref.: M.Shur, Introduction to Electronic Devices

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3.5.4.2 Diffusion capacitance


The diffusion capacitance can be calculated by solving the Diffusion equation in
a complex form (will not be discussed here). Here we will concentrate on a short
p+n-diode (much simpler description of the diffusion capacitance). The diffusion
capacitance is caused by an increase of the minority carrier concentration in the
neutral and the depletion region. The increase of the minority carrier
concentration is caused by the applied forward bias.
The diffusion capacitance in combination with the differential resistance can be
treated as an equivalent RC circuit. The corresponding time constant is in this
case the recombination time.
Depletion Region
Formation of the
diffusion capacitance in
the neutral region under
forward bias voltage.

Ref.: M. Shur, Introduction to Electronic Devices

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3.5.4.2 Diffusion capacitance


The RC time constant is given by
1 τ pl 1
Cdif = ⋅ = Gdτ pl Diffusion capacitance
2 Rd 2
where the factor ½ correspond to the ideality factor in the empirical diode
equation.
If the transit time of a carrier is much smaller than the recombination time (ttr <<
τpl), the recombination time can be expressed in terms of the transit time for
holes.

τ pl =
L2p

( X n − xn )
2
= 2t
tr
Dp Dp
This leads to the following expression for the diffusion capacitance

IF
Cdif = Gd ttr = ttr Diffusion capacitance
Vth

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3.5.4.2 Diffusion Capacitance


Based on the equation for the diffusion capacitance it would be obvious to
conclude that the diffusion capacitance increases as the forward diode current
increases. However, for high forward currents the diffusion capacitance is
limited by the maximum diffusion capacitance. The maximum diffusion
capacitance can be calculated by
εs A
Cd _ max = Maximum Diffusion capacitance
LDn + LDp
where LDn and LDp are the Debye lengths for holes and electrons. The Debye
length defines the minimum width of the depletion region.

ε sVth ε sVth
L Dn = L Dp = Debye length
qN D qN A

2ε sVbi 2ε sVbi Width of the depletion region in


xn = xp =
qN D qN A thermal equilibrium

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3.5.4 Differential capacitance


The differential capacitance of a pn junction can now be described in the
form

1
Cd =
1 (Cdep + Cdif ) + 1 Cd _ max
Differential capacitance

The differential capacitance of a diode is given in the graph.

Depletion (Cdep),
diffusion (Cdif),
maximum diffusion
(Cd_max) and differential
capacitance (Cd).

Ref.: M.Shur, Introduction to Electronic Devices

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3.5.4 Differential capacitance


The maximum of the differential capacitance is observed under forward
bias conditions. Under reverse bias conditions the differential capacitance
is determined by the depletion capacitance, which is more or less constant.
Under forward bias the depletion capacitance gets larger, because the
width of the depletion region is reduced, so that the differential capacitance
is increased. The diffusion capacitance is zero for reverse bias. Only under
forward bias the diffusion capacitance contributes to the differential
capacitance. The diffusion capacitance increases as the minority carrier
concentration increases in the neutral regions. The differential capacitance
of the diode is limited by a maximum diffusion capacitance. The maximum
diffusion capacitance is determined the Debye length for the electrons and
holes. The Debye length defines a lower limit for the width of the depletion
region.

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3.6 Hetero junctions


So far we discussed the behavior of homo junctions. A pn junction is a homo
junctions, if the bandgap for the n-types and the p-type semiconductors is the
same. The situation for a hetero junction is different. Here two semiconductor of
different bandgap form a junction. Heterojunctions occur in different areas
because of
- Technological reasons
- Electrical properties
The electric field in the space charge region is increased.
Solar cells: Higher open circuit voltage and better extraction of carriers
High mobility transistors: Faster transistors
- Optical properties
The layers with the higher bandgap can be used as an „optical window“.

A heterojunction is defined as a junction between two dissimilar semiconductors.


The two semiconductors are assumed to have a different energy bandgap Eg.
Furthermore, the two different semiconductors will have different dielectric
permittivity εs, different work function qΦs, and a different electron affinity qχ.

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3.6 Hetero junctions


The work function qΦs is defined as as the energy required to remove an
electron from the Fermi level EF to a position outside the material (vacuum
level).
The electron affinity qχ is the energy required to remove an electron from the
bottom of the conduction band to the vacuum level.

∆EC = q(χ 2 − χ1 )

∆EV = E g1 + qχ1 − (E g 2 + qχ 2 )
= ∆E g − ∆EC

Energy diagram of two


isolated semiconductors
M.S. Sze, Semiconductor Devices

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3.6 Hetero junctions


If the two semiconductors are joint the following band diagram is formed. We
assume that the lattice constant of the two materials is matched. Otherwise, the
number of traps at the interface is not neglectable.

∆EC = q(χ 2 − χ1 )

∆EV = E g1 + qχ1 − (E g 2 + qχ 2 )
= ∆E g − ∆EC

Energy diagram of two


isolated semiconductors

M.S. Sze, Semiconductor Devices

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3.6 Hetero junctions


There are two basic requirements in the construction of the energy
band diagram:
(a) the Fermi level must be the same on both sides of the interface in thermal
equilibrium,
(b) the vacuum level must be continuous and parallel to the band edges.
The discontinuity is unaffected by the doping level as long as the affinities and
the bandgap are not a function of the doping level.

Vbi = Vb1 + Vb 2 Built-in Voltage

Vb1 and Vb2 are the electrostatic potentials at equilibrium.


Assumption: Depletion approximation: ε1F1= ε2F2 and F1(x=0)=F2(x=0).

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3.6 Hetero junctions

ε 2 N 2 (Vbi − V ) Built-in Voltage semiconductor 1


Vb1 =
ε1N1 + ε 2 N 2

ε1 N1 (Vbi − V ) Built-in Voltage semiconductor 2


Vb 2 =
ε1N1 + ε 2 N 2

N1 and N2 are the doping concentrations in the semiconductor region 1 and


region 2. The width of the depletion region can be calculated by

2ε1ε 2 N 2 ⋅ (Vbi − V )
x1 = Width of the depletion region in
qN1 ⋅ (ε1 N1 + ε 2 N 2 ) semiconductor 1

2ε1ε 2 N 2 ⋅ (Vbi − V ) Width of the depletion region in


x2 =
qN 2 ⋅ (ε1N1 + ε 2 N 2 ) semiconductor 2

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3.7 Metal Semiconductor Contacts


Metal Semiconductor contacts are very important for all electronic devices,
because these contacts form the interconnection between the
semiconductor device and the outside world. In general it can be
distinguished between two different kinds of metal semiconductor contacts:
Schottky barriers or Schottky diodes on one side and ohmic contacts on the
other side. In the following both of these very important contacts will be
described. We will start with the Schottky diode.

Schematic energy
diagram for the
electrons in a metal
and a semiconductor.

Ref.: M.Shur, Introduction to Electronic Devices

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3.7.1 The Schottky Diode


The energy diagram of a metal and a semiconductor exhibits the major
difference between the two materials. For the metal the Fermi level is in the
conduction band, whereas the Fermi level for the semiconductor material is
in the bandgap depending on the distribution of carriers in the band. If the
metal and the semiconductor are brought together a transfer of electrons
from one material to the other and vice versa is observed. If the metal
semiconductor contact is under thermal equilibrium the Fermi level will be
constant through the entire contact.

Schematic energy
diagram for the
electrons in a metal
and a semiconductor
including the vacuum
energy level.

Ref.: G.W. Neudeck, The pn Junction diode


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3.7.1 The Schottky Diode


A more detailed picture of the two materials in terms of the energy levels is
given in the next graph. In this diagram a new energy level is introduced,
which is the macro potential or the vacuum energy level. The vacuum
energy level corresponds to the energy needed to remove an electron from
the system. It means that an electron is free to move in a surrounding
(vacuum), so that the electron can move away from the solid. The vacuum
energy level can be seen as a reference energy level. The vacuum energy
level can be relatively easy determined for the different materials. The
vacuum energy level allows a comparison of the energy levels for different
materials.
The energy required to remove an electron from the Fermi level EF to a
position outside the material (vacuum level) is called the work function Φ.
The work function can be defined for the metal ΦM and the semiconductor
ΦS.
The energy required to move an electron from the bottom of the conduction
band to the vacuum energy level is called the electron affinity χ.

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3.7.1 The Schottky Diode


Connecting the two materials leads to
a band bending. There are two basic
requirements in the construction of
the energy band diagram, which have
to be fulfilled:
(a) The Fermi level has to be
constant throughout the contact in
thermal equilibrium.
(b) The vacuum level has to be
continuous and parallel to the band
edges.

In this case the right part of the


energy diagram (semiconductor) is
pulled down, so that the bands bend
upwards to keep the vacuum level Metal Semiconductor barrier: (a) physical
continuous. contact, (b) energy bands before forming a
contact between the metal and the
Ref.: G.W. Neudeck, The pn Junction diode semiconductor, (c) in thermal equilibrium
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3.7.1 The Schottky Diode


The bending of the bands leads to a formation of a barrier for electrons. The
electrons have to overcome this energy barrier ΦB, which is the energy
difference between the metal work function ΦM and the electron affinity χ.
If ΦM > ΦS a Schottky barrier is formed at the interface between the metal and
the semiconductor. The work function of the semiconductor is controlled by the
doping level of the material. The work function of the metal is a material inherent
property. For example silver has a work function of 4.25eV and gold has work
function of 5.2eV. Both materials are high work function materials. Chromium
and Aluminum has a lower work function of <4eV. Therefore, the barrier height
can be controlled by the materials involved and the doping concentration of the
semiconductor. The formation of the barrier limits the current flow from the metal
to the semiconductor, whereas the current flow from the semiconductor to the
metal is not hindered. The Schottky barrier behaves like a diode or a rectifier.

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3.7.1 The Schottky Diode


A space charge region is formed at the
metal-semiconductor interface. The
charge distributions of a metal-
semiconductor and pn-junction are similar.
Based on the charge distribution in the
device the electric field distribution can be
calculated by solving the Poisson
equation. The second integration of the
charge distribution leads to the potential
distribution in the device. A built-in voltage
can be defined, which is equal to Vbi=(ΦM -
ΦS)/q.

Energy bands, charge distribution, electric


field and potential distribution of a Metal
Semiconductor barrier.
Ref.: G.W. Neudeck, The pn Junction diode
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3.7.1 The Schottky Diode


The work function differences between
different materials. The energy difference
varies with the given metal and the doping
concentration.

Work function difference as a


function of the dopant
concentration for aluminum and
poly silicon (gate).

Ref.: M.S. Sze, Semiconductor Devices

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3.7.1 The Schottky Diode


Applying a positive voltage (forward bias) to the Schottky barrier leads to the
lowering of the barrier, so that more electrons can overcome the barrier. For
negative bias (reverse voltage) the bands are bended more and the barrier
height is increased. The current flowing through a Schottky Barrier can be
described by an expression similar to a pn-junction.

 qV 
I = I 0 ⋅ exp  Schottky barrier under (Empirical)
 nkT  Forward bias

Schottky diode under


forward bias (a) and
reverse bias (b).

Ref.: G.W. Neudeck, The pn Junction diode

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3.7.2 The Ohmic Contact


A perfect Ohmic contact would be a contact which does not leads to a voltage
drop. A good ohmic contact would lead to a very small voltage drop across the
metal semiconductor interface. Furthermore, the contact exhibits a linear
behavior (I/V curve).
In general two ways can be distinguished how to achieve an ohmic contact. In
the first case a current is tunneling through a very thin barrier. In the other case
the work function of the metal is smaller than the work function of the
semiconductor (ΦM < ΦS).

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References
Michael Shur, Introduction to Electronic Devices, John Wiley & Sons;
(January 1996).
(Price: US$100), Audience: under graduate students
Simon M. Sze, Semiconductor Devices, Physics and Technology, John
Wiley & Sons; 2nd Edition (2001).
(Price: US$115), Audience: under graduate students
R.F. Pierret, G.W. Neudeck, Modular Series on Solid State Devices,
Volumes in the Series: Semicondcutor Fundamentals, The pn junction
diode, The bipolar junction transistor, Field effect devices,
(Price: US$25 per book), Audience: under graduate students
T. Fjeldly, T. Ytterdal, M. S. Shur, Introduction to device
modeling and circuit simulation, Wiley (1997)

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