Automatic Test-Pattern

Generation (ATPG) for

Combinational Circuits

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 Automatic Test-Pattern
Generation (ATPG) for
Combinational Circuits
 Definition
 Algorithms and representations
 Structural Test vs. Functional
 Definitions
 Research Space
 Completeness
 Algebra
 Kinds of algorithms

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 ATPG: Definition
 Automatic Test Pattern Generation (ATPG) = process
for the automatic generation of test vectors for an IC.
 Such algorithms usually employ other algorithms to
inject all possible faults into an IC representation and
apply fault collapsing criteria to reduce as much as
possible the # of faults to be considered (to generate
test vectors).
 The considered faults have then to be activated by the
test vectors, and their effects propagated to the IC
primary outputs.
 Controllability and Observability measures are
exploited by the majority of ATPG algorithms.
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 Functional/Structural ATPG
 ATPG functional (hypotetical) – generate a complete
test set for all input output combinations. Example
(64 bit ripple carry adder):
129 inputs, 65 outputs:
2129 input vectors
Using a 1 GHz ATE, 2.15 x 1022 years required
 ATPG structural (actual) – eliminates equivalent
faults and generates vectors oriented to a minimal
set of faults. Example:
1728 input vectors
0.000001728 s on a 1 GHz ATE
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 Algebras for ATPG
Goal: to represent simultaneously both fault-free and
faulty circuit values  faster ATPG

Good Failing
Symbol Meaning Machine Machine
D 1/0 1 0
D 0/1 0 1 Roth’s
0 0/0 0 0 Algebra
1 1/1 1 1
X X/X X X
G0 0/X 0 X
G1 1/X 1 X Muth’s
F0 X/0 X 0 Additions
F1 X/1 X 1

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 Fault Coverage
 Fault Coverage is the metric employed to evaluate
the efficiency of an ATPG algorithm.

# of detected faults
Fault coverage =
total # faults

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 ATPG: Research Space (I)
 An ATPG program could search test vectors over the
space of all possible input and output vectors for an
IC.
 Such a space could be represented by a Binary Tree.

Courtesy of V. D. Agrawal, Agere (USA)

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 Completeness of ATPG Algorithms
 An ATPG algorithm should be able to search the
whole binary tree, before concluding that a test vector
for a given fault does not exist.
 Definition: an ATPG algorithm is complete if it is able
to search the whole binary tree to generate a test (for a
hard to detect fault)  very important from the point
of view of the offered fault coverage.
 Untestable Fault – no test vector found, even though
having searched the whole tree.
 Combinational circuit: untestable faults show the
presence of unnecessary (redundant) hardware.

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 Redundances Identification
by ATPG
 The ATPG can be exploited to identify redundant
hardware in an IC.
 In fact, in a combinational circuit, if no test vector
exists for a single stuck-at  hardware is
redundant.
 Advantages of redundancies elimination:
usually, speed increases and power consumption
decreases;
The presence of an undetectable fault can mask
following faults.
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 Redundant Hardware
 Toactivate the fault it
should be A=B=1
E=1 the fault can
not be detected, but the
circuit behaves equally
with and without the
fault  undetectable
fault  redundant
hardware  possible
circuit semplification.
Courtesy of V. D. Agrawal, Agere (USA)

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 Fault Coverage and Efficiency
 Fault Coverage and Fault Efficiency are metrics to
evaluate ATPG efficiency.

# of detected faults
Fault coverage = Total # faults

Fault efficiency =
# of detected faults
Total # faults -- # undetectable faults

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 Some Algorithms for ATPG

 Exhaustive

 Random

 Path Sensitization (frequently used)

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 Exhaustive Algorithms
 For a circuit with n-inputs, it generates all 2n
patterns.

 Impractical (too expensive) unless the circuit can be

split in logic cones with less than 15 inputs 

Exhaustive ATPG for each cone;

Faults involving more cones can not be detected.

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 Random Algorithms
 Idea: to use
random vectors,
together with the
information given
by a fault
simulator.
 Used till coverages
of the 60-80%,
then another
ATPG has to be
employed.
Courtesy of V. D. Agrawal, Agere (USA)

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 Path Sensitization Algorithm
3 steps:

Fault Activation (Fault sensitization, or

activation, or excitation);

Propagation of the fault effects (Fault

Propagation, or path sensitization);

Line justification.

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 Example (I)
 We have to generate the test vector for B SA0B=1
(to activate the fault)  f = g = D

1
D

Courtesy of V. D. Agrawal, Agere (USA)

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 Example (II)
 We have to propagate the value to the output  let’s try
with the path f – h – k – L  propagation conditions

1
D
D
1 D D
D
0

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 Example (III)
 Line justification: We have to check the coherence
among the values required for propagation and
activation  1 on i can not be justified  we have to
change propagation path.

1 D
D
1 D D
0
D

1
1

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 Example (IV)
 Let’s choose the simultaneous propagation through
paths f – h – k – L and g – i – j – k – L  problem
(the D boundary disappears)

1
D
D
1 1
D D
D
1

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 Example (IV)
 Scegliamo la propagazione attraverso il cammino
g–i–j–k–L

D
0 D
1
D D D
1
1

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 Example (V)
 We have to justify h = 0  no problems  OK !
 test vector = (ABCD) = (0111) and L=0 if IC
fault free, L=1 if circuit with B SA0.

0
0 D
1 D
D D D
1
1

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 ATPG for Stuck-At only ?
 ATPG algorithms are mainly oriented to single
stuck-at (logical faults).

 There are algorithms and programs for electrical

level faults (e.g. Transistor stuck-on, delay, etc),
but they are very complex and less consolidated.

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 Controllability & Observability (I)
 Controllability: ability to assign a specific value
on each IC internal node by acting on the
primary inputs.
 Observability: ability to determine the value
present on each IC internal node by acting on
the IC primary inputs and observing the IC
primary outputs.
 Circuits with feedbacks and oscillators are
typically difficult to control.
 Sequential circuits and circuits with redundant
nodes are typically difficult to observe.

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 ATPG for sequential circuits

 Difficultiesin flip-flop initialization (could

mandate long test sequences).

 Low controllability/observability of the state

variables.

 The feedback loops are the main responsible of

such a complexity.

 Thus, more complex ATPG algorithms.

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