Course: Electronics – for Complete Beginners

Section 8: Monolithic Integrated Circuits

Lecture 2: Basic Logic Devices

Zeros and Ones

Robert Widlar apparently had no interest
in digital electronics, and had little respect
for the related technologies. He is quoted as
disgustedly uttering “Every idiot can count
to one!” in disappointment to Fairchild’s
decision to concentrate on developing digital
devices after not initially having much
success developing linear products. At his
job interview, Widlar had explained why to
Fairchild’s R&D manager saying, “What
they are doing is bullshit!” (He was hired
anyway.)
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Logic devices operate with single supply
voltages, and deal with simple two-state
signals. An input or output is either high or
low, which is usually represented as “1” or
“0”.
The voltage associated with a “1” is
usually close to whatever the supply voltage
is, with “0” being at ground potential, or
very close to it.
The Basic Logic Functions
The basic logic functions are AND and
OR.
The AND function provides a “1” output
only if all of its inputs are “1”.
A B Q
1 1 1
1 0 0
0 1 0
0 0 0

This is the schematic symbol for the dual-

input AND gate. AND gates can have any
number of inputs; but commonly have either
two, three or four, packaged in 14-pin DIPs
as “quad two-input”, “triple three-input, and
dual four-input ANDs. By convention, the
inputs are marked A, B, C, and so on, and
the output is marked Q. Nobody remembers
why the functions are called “gates”, or why
their output is marked “Q”.
The adjacent table is called a truth table.
It’s called a truth table because it shows
what the true output situation will be for any
combination of input propositions.
DIP means “dual in-line plastic”; a very
popular package for both linear and logic
ICs. High grade military/aerospace parts are
often found in a similar package made of
ceramic, sometimes called a “CerDIP”
(maybe because of a reluctance to use the
acronym “DIC”).
 The notch at one end of the DIP package
establishes its proper orientation on the
circuit board. If viewed with the notched end
being “north”, pin 1 is the immediately
adjacent pin to the “west”, and the highest
numbered pin is directly opposite on the
“east” side. Pin 1 is also sometimes
designated with a painted dot or dimple at
that location on the top of the package, as
shown on this 8-pin DIP …

The OR function provides a “1” output

whenever any one of its inputs is “1”.
A B Q
1 1 1
1 0 1
0 1 1
0 0 0

OR gates may also have multiple inputs;

usually two, three or four, packaged as
“quad two-input”, “triple three-input”, and
“dual four-input” devices in 14-pin DIPs.
A less common variation of the OR gate is
the exclusive OR, or XOR gate, which
provides a “1” output whenever one, but not
more than one, of its inputs rises to “1”.
A B Q
1 1 0
1 0 1
0 1 1
0 0 0

A third common device, known as a

BUFFER, doesn’t really provide any logic
function. It simply passes whatever logic
level appears at its input to its output.
A Q
1 1
0 0

Before the advent of CMOS logic, fan-out

was an important consideration. The term
refers to the maximum number of digital
inputs that the output of a single logic gate
can drive. TTL outputs can drive up to 10
 TTL inputs. In other words, a typical TTL
gate has a fan-out of 10.
When it’s necessary for a single TTL gate
to drive more than 10 other gates or devices,
a buffer can be used between that gate’s
output and the multiple inputs of the other
devices it must drive. TTL buffers have a
fan-out of 25 to 30.
The input impedance of CMOS gates is
generally so high that there is never any
need for buffers. CMOS buffers do exist,
nevertheless, for use as logic-level
converters where CMOS needs to be
interfaced with TTL logic, or as high sink
current drivers.
Buffers are usually packaged as “hex
buffers” (meaning six separate buffers) in
standard 14-pin DIP packages.
Negated Logic Functions
Practical circuitry uses negated versions of
these basic logic functions; namely NAND,
NOR and NOT gates. The functions are the
same, but the outputs are inverted, or
“negated”.
The NAND function provides a “0” output
only if all of its inputs are “1”.
A B Q
1 1 0
1 0 1
0 1 1
0 0 1

The small circle on the output of the

schematic symbol, sometimes called a
“negation bubble”, signifies that the output
is inverted at that point, identifying the gate
as a negated type.
The NOR function provides a “0” output
whenever any one of its inputs are “1”.
A B Q
1 1 0
1 0 0
0 1 0
0 0 1

A negated buffer is more commonly called

an INVERTER or NOT gate. It inverts
whatever logic level appears at its input,
providing the opposite level at its output. In
CMOS, there’s a difference between buffers
and inverters, the former having enhanced
current sink capabilities, and the latter
intended simply for providing signal
inversions.
A Q
1 0
0 1

So the question arises — why the

preference for negated logic functions?
(That question did occur to you, did it not?)
There are a couple of reasons, the first
being that the NAND and NOR functions can
be achieved using fewer transistors, so the
chips are simpler and faster.
The second, and more important answer is
that NAND and NOR gates are “universal
gates”, meaning that they can be used in
combination to implement any of the logic
functions.
 For example, as an exercise, try building a
circuit that will provide the OR function
using only interconnected NAND gates. That
is; given two inputs, your circuit will
provide a logical “1” output only when one,
or both, inputs rise to logical “1”. Its output
will otherwise remain at logical “0”.
The ability for a single gate type to be able
to mimic any other gate type is an attribute
exclusive to NAND and NOR gates. Because
of this, digital systems are commonly
designed around nothing but these gates,
usually with some inverters thrown in —
although by tying their inputs together,
NANDs and NORs can be used as simple
inverters too.
Here’s an answer for the NAND-to-OR
project you were given above. Did you come
up with something like this?
 A B Q
1 1 1
1 0 1
0 1 1
0 0 0

If you were trying to come up with a

NAND-to-NOR (because it sometimes makes
sense logistically to just use all NAND gates,
instead of adding a quad NOR with three
wasted gates in the same circuit board real
estate), you’d simply add another gate to
invert Q.
A B Q
1 1 0
1 0 0
0 1 0
0 0 1

In actual practice, if you had inverter gates

available, you could use three of them
instead of NAND gates with jumpered
inputs, but implementing the circuits as
shown is equally cost-effective, and usually
simplifies the circuit board layout.
 The Boolean Approach
George Boole was an English
mathematician who, in the middle 1800s,
gave us Boolean Algebra — a methodical
approach to logic.
Eighty-six years later, Claude Shannon, a
mathematician at MIT who is now
considered to be the “father of the
information age”, recognized that Boole’s
ideas could very handily be applied to the
design of electrical switching circuits, an
idea that he developed fully after joining
Bell Telephone Laboratories.
Today, Boolean Algebra is an important
tool used to design efficient and effective
electrical control circuits, and electronic
digital logic systems. In the previous
discussions, you probably found it
somewhat confusing to trace logic levels
through even these simple circuits … “Let’s
see; if this goes high, that goes low, and
when that goes low, then …”
 The Boolean approach permits engineers
to model logic systems on paper using a sort
of algebraic approach, with special logic
symbols and precise rules for manipulating
terms and reducing the expressions to the
simplest form. The results can then be easily
implemented in hardware with reasonable
expectations of success — as opposed to
attempting to design a complex circuit by
hay-wiring a bunch of gates on a
breadboard, and doing ad hoc fixes for the
TIFs and other surprises.
Learning more about Boolean Algebra is
beyond the scope of this course, but you will
at least be conversant with the term should it
ever arise in polite conversation … or a job
interview.
Complex Digital Devices
These basic gates — AND, OR, XOR,
NOT, NAND, NOR, and XNOR — are
combined in monolithic integrated circuits
of much increased complexity which
provide all sorts of useful functions, right up
to the vastly complex computer processor
chips.
The main components of an IC are
transistors, which may be bipolar or field
effect types. Advancing manufacturing
technologies made it possible to include
ever-increasing numbers of transistors on a
single chip, giving rise to a descriptive
terminology related to complexity.
Integration Scale Transistors
Small (SSI) up to 100
Medium (MSI) 100 – 1,000
Large (LSI) 1,000 – 20,000
Very Large (VLSI) 20,00 – 10-million
Ultra Large (ULSI) 10-million – 1-billion

These classifications are somewhat

arbitrary, some using gates rather than
transistors as the criteria. Since the industry
has matured, they’re now mostly a historical
footnote. But should anyone happen to use
one of these acronyms in a conversation (or
an interview), you’ll at least know what
they’re talking about.
 The gates we’ve been talking about would
be an example of SSI as would some simple
multiplexers and counters.
A multiplexer, or MUX, (also called a data
selector) is a digital switch that transfers
input data from multiple sources to a single
output line, the input chosen by “data select”
lines. These usually have 2, 4,8, or 16
inputs, with 1,2,3 or 4 select lines,
respectively.

The operation is very simple. In the two-

input case, with Sel low (logical 0) input A is
selected and connected to the output Z.
Taking Sel high (logical 1) connects input B
to Z, instead of input A.
A typical application would be the routing
of digital sound information from multiple
sources to a single surround-sound speaker
system.
A demultiplexer, or DeMUX (sometimes
called a decoder) reverses the operation,
routing output data to selected output
devices.

The logic works the same way; Sel causing

whatever is on Z to be routed to either A or
B. A typical application would be to route a
print stream to either a printer port or FAX
card.
 The asynchronous counter, also called a
ripple counter, is often used for timing
purposes or as a frequency divider.

Ripple counters are made by cascading

flip-flops, in this case, J-K flip-flops. The
input is a pulse train, usually labeled
CLOCK. As shown above, the output of the
first stage, FF0, changes state on the rising
edge of each clock pulse. The input to each
subsequent stage comes from the Q̄ outputs,
which are the compliment of the Q outputs.
The outputs of these stages therefore change
state on the rising edge of the preceding Q̄
output.
 We have yet to talk about binary numbers,
but the outputs of the ripple counter
represent the binary values 20, 21, 22, 23, and
so on and, taken together, provide a binary-
counted sequence of 0-1-2-3-4-5-6-7.
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So … you’re wondering: What’s all this
flip-flop stuff about anyway!?!
(Yes; as interested and inquisitive as you
are, I’m sure you were wondering that?)
This lecture has gotten long enough, so
let’s take a break, and we’ll find out more
about flip-flops, counters, and some other
digital functions in the next exciting
episode.
Then we’ll be talking more about binary
numbers, digital counters and other complex
logic devices.
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